128 lines
2.9 KiB
C
128 lines
2.9 KiB
C
#include "ROM.h"
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#ifndef CONFIG_H
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#define CONFIG_H
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#define MAJ_VERS 0x01
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#define MIN_VERS 0x0B
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#define MCU_328P 0x90
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#define MCU_1284P 0x91
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#define MODE_HOST 0x11
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#define MODE_TNC 0x12
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#if defined(__AVR_ATmega328P__)
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#define MCU_VARIANT MCU_328P
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#warning "Firmware is being compiled for atmega328p based boards"
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#elif defined(__AVR_ATmega1284P__)
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#define MCU_VARIANT MCU_1284P
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#warning "Firmware is being compiled for atmega1284p based boards"
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#else
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#error "The firmware cannot be compiled for the selected MCU variant"
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#endif
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#define MTU 500
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#define SINGLE_MTU 255
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#define HEADER_L 1
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#define CMD_L 4
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// MCU dependent configuration parameters
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#if MCU_VARIANT == MCU_328P
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const int pin_cs = 7;
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const int pin_reset = 6;
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const int pin_dio = 2;
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const int pin_led_rx = 5;
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const int pin_led_tx = 4;
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#define FLOW_CONTROL_ENABLED true
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#define QUEUE_SIZE 0
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#define EEPROM_SIZE 512
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#define EEPROM_OFFSET EEPROM_SIZE-EEPROM_RESERVED
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#endif
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#if MCU_VARIANT == MCU_1284P
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const int pin_cs = 4;
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const int pin_reset = 3;
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const int pin_dio = 2;
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const int pin_led_rx = 12;
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const int pin_led_tx = 13;
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#define FLOW_CONTROL_ENABLED true
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#define QUEUE_SIZE 24
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#define QUEUE_BUF_SIZE (QUEUE_SIZE+1)
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#define QUEUE_MEM QUEUE_BUF_SIZE * MTU
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#define EEPROM_SIZE 4096
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#define EEPROM_OFFSET EEPROM_SIZE-EEPROM_RESERVED
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#endif
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#define eeprom_addr(a) (a+EEPROM_OFFSET)
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// MCU independent configuration parameters
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const long serial_baudrate = 115200;
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const int lora_rx_turnaround_ms = 50;
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// SX1276 RSSI offset to get dBm value from
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// packet RSSI register
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const int rssi_offset = 157;
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const int snr_offset = 128;
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// Default LoRa settings
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int lora_sf = 0;
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int lora_cr = 5;
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int lora_txp = 0xFF;
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uint32_t lora_bw = 0;
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uint32_t lora_freq = 0;
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// Operational variables
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bool radio_locked = true;
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bool radio_online = false;
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bool hw_ready = false;
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bool promisc = false;
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uint8_t op_mode = MODE_HOST;
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uint8_t model = 0x00;
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uint8_t hwrev = 0x00;
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int last_rssi = -292;
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uint8_t last_rssi_raw = 0x00;
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int8_t last_snr = 0;
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size_t read_len = 0;
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uint8_t seq = 0xFF;
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uint8_t pbuf[MTU];
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uint8_t sbuf[MTU];
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uint8_t cbuf[CMD_L];
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#if QUEUE_SIZE > 0
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uint8_t tbuf[MTU];
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uint8_t qbuf[QUEUE_MEM];
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size_t queued_lengths[QUEUE_BUF_SIZE];
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#endif
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uint32_t stat_rx = 0;
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uint32_t stat_tx = 0;
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bool outbound_ready = false;
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size_t queue_head = 0;
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size_t queue_tail = 0;
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bool stat_signal_detected = false;
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bool stat_signal_synced = false;
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bool stat_rx_ongoing = false;
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bool dcd = false;
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bool dcd_led = false;
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bool dcd_waiting = false;
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uint16_t dcd_count = 0;
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uint16_t dcd_threshold = 15;
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uint32_t status_interval_ms = 3;
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uint32_t last_status_update = 0;
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// Status flags
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const uint8_t SIG_DETECT = 0x01;
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const uint8_t SIG_SYNCED = 0x02;
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const uint8_t RX_ONGOING = 0x04;
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#endif |