jacob.eva/RNode_Firmware_CE
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Cleanup

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This commit is contained in:
Mark Qvist 2024-02-13 12:56:14 +01:00
parent f229b78372
commit 32424b91a6
4 changed files with 17 additions and 33 deletions
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4
Makefile
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@ -118,8 +118,8 @@ upload-tbeam:
arduino-cli upload -p /dev/ttyACM0 --fqbn esp32:esp32:t-beam arduino-cli upload -p /dev/ttyACM0 --fqbn esp32:esp32:t-beam
@sleep 1 @sleep 1
rnodeconf /dev/ttyACM0 --firmware-hash $$(./partition_hashes ./build/esp32.esp32.t-beam/RNode_Firmware.ino.bin) rnodeconf /dev/ttyACM0 --firmware-hash $$(./partition_hashes ./build/esp32.esp32.t-beam/RNode_Firmware.ino.bin)
@sleep 3 # @sleep 3
python ./Release/esptool/esptool.py --chip esp32 --port /dev/ttyACM0 --baud 921600 --before default_reset --after hard_reset write_flash -z --flash_mode dio --flash_freq 80m --flash_size 4MB 0x210000 ./Release/console_image.bin # python ./Release/esptool/esptool.py --chip esp32 --port /dev/ttyACM0 --baud 921600 --before default_reset --after hard_reset write_flash -z --flash_mode dio --flash_freq 80m --flash_size 4MB 0x210000 ./Release/console_image.bin
upload-lora32_v10: upload-lora32_v10:
arduino-cli upload -p /dev/ttyUSB0 --fqbn esp32:esp32:ttgo-lora32 arduino-cli upload -p /dev/ttyUSB0 --fqbn esp32:esp32:ttgo-lora32

40
sx126x.cpp
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@ -9,28 +9,6 @@
#if MODEM == SX1262 #if MODEM == SX1262
#include "sx126x.h" #include "sx126x.h"
#define MCU_1284P 0x91
#define MCU_2560 0x92
#define MCU_ESP32 0x81
#define MCU_NRF52 0x71
#if defined(__AVR_ATmega1284P__)
#define PLATFORM PLATFORM_AVR
#define MCU_VARIANT MCU_1284P
#elif defined(__AVR_ATmega2560__)
#define PLATFORM PLATFORM_AVR
#define MCU_VARIANT MCU_2560
#elif defined(ESP32)
#define PLATFORM PLATFORM_ESP32
#define MCU_VARIANT MCU_ESP32
#elif defined(NRF52840_XXAA)
#define PLATFORM PLATFORM_NRF52
#define MCU_VARIANT MCU_NRF52
#endif
#ifndef MCU_VARIANT
#error No MCU variant defined, cannot compile
#endif
#if MCU_VARIANT == MCU_ESP32 #if MCU_VARIANT == MCU_ESP32
#if MCU_VARIANT == MCU_ESP32 and !defined(CONFIG_IDF_TARGET_ESP32S3) #if MCU_VARIANT == MCU_ESP32 and !defined(CONFIG_IDF_TARGET_ESP32S3)
#include "soc/rtc_wdt.h" #include "soc/rtc_wdt.h"
@ -132,9 +110,7 @@ sx126x::sx126x() :
} }
bool sx126x::preInit() { bool sx126x::preInit() {
// setup pins
pinMode(_ss, OUTPUT); pinMode(_ss, OUTPUT);
// set SS high
digitalWrite(_ss, HIGH); digitalWrite(_ss, HIGH);
#if BOARD_MODEL == BOARD_RNODE_NG_22 #if BOARD_MODEL == BOARD_RNODE_NG_22
@ -144,6 +120,7 @@ bool sx126x::preInit() {
#endif #endif
// check version (retry for up to 2 seconds) // check version (retry for up to 2 seconds)
// TODO: Actually read version registers, not syncwords
long start = millis(); long start = millis();
uint8_t syncmsb; uint8_t syncmsb;
uint8_t synclsb; uint8_t synclsb;
@ -342,9 +319,7 @@ void sx126x::setPacketParams(long preamble, uint8_t headermode, uint8_t length,
executeOpcode(OP_PACKET_PARAMS_6X, buf, 9); executeOpcode(OP_PACKET_PARAMS_6X, buf, 9);
} }
void sx126x::reset(void) {
int sx126x::begin(long frequency)
{
if (_reset != -1) { if (_reset != -1) {
pinMode(_reset, OUTPUT); pinMode(_reset, OUTPUT);
@ -354,6 +329,12 @@ int sx126x::begin(long frequency)
digitalWrite(_reset, HIGH); digitalWrite(_reset, HIGH);
delay(10); delay(10);
} }
}
int sx126x::begin(long frequency)
{
reset();
if (_busy != -1) { if (_busy != -1) {
pinMode(_busy, INPUT); pinMode(_busy, INPUT);
@ -797,8 +778,9 @@ long sx126x::getSignalBandwidth()
} }
void sx126x::handleLowDataRate(){ void sx126x::handleLowDataRate(){
_ldro = 1; // TODO: Why was this enabled without any logic to check LDRO conditions?
setModulationParams(_sf, _bw, _cr, _ldro); //_ldro = 1;
//setModulationParams(_sf, _bw, _cr, _ldro);
} }
void sx126x::optimizeModemSensitivity(){ void sx126x::optimizeModemSensitivity(){

2
sx126x.h
View File

@ -112,6 +112,8 @@ private:
void handleLowDataRate(); void handleLowDataRate();
void optimizeModemSensitivity(); void optimizeModemSensitivity();
void reset(void);
private: private:
SPISettings _spiSettings; SPISettings _spiSettings;
int _ss; int _ss;

4
sx127x.cpp
View File

@ -73,8 +73,8 @@
#define IRQ_RX_DONE_MASK_7X 0x40 #define IRQ_RX_DONE_MASK_7X 0x40
#define IRQ_PAYLOAD_CRC_ERROR_MASK_7X 0x20 #define IRQ_PAYLOAD_CRC_ERROR_MASK_7X 0x20
#define MAX_PKT_LENGTH 255 #define SYNC_WORD_7X 0x12
#define SYNC_WORD_7X 0x12 #define MAX_PKT_LENGTH 255
extern SPIClass SPI; extern SPIClass SPI;