2016-10-06 13:21:30 +02:00
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PROVIDE ( UART0 = 0x3ff40000 );
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PROVIDE ( SPI1 = 0x3ff42000 );
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PROVIDE ( SPI0 = 0x3ff43000 );
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PROVIDE ( GPIO = 0x3ff44000 );
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PROVIDE ( SIGMADELTA = 0x3ff44f00 );
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2017-09-12 08:40:52 +02:00
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PROVIDE ( RTCCNTL = 0x3ff48000 );
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PROVIDE ( RTCIO = 0x3ff48400 );
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PROVIDE ( SENS = 0x3ff48800 );
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2018-06-27 09:01:06 +02:00
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PROVIDE ( HINF = 0x3ff4B000 );
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2016-10-06 13:21:30 +02:00
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PROVIDE ( UHCI1 = 0x3ff4C000 );
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PROVIDE ( I2S0 = 0x3ff4F000 );
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PROVIDE ( UART1 = 0x3ff50000 );
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PROVIDE ( I2C0 = 0x3ff53000 );
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PROVIDE ( UHCI0 = 0x3ff54000 );
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2018-06-27 09:01:06 +02:00
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PROVIDE ( HOST = 0x3ff55000 );
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2016-10-06 13:21:30 +02:00
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PROVIDE ( RMT = 0x3ff56000 );
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2016-10-28 00:53:02 +02:00
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PROVIDE ( RMTMEM = 0x3ff56800 );
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2016-10-06 13:21:30 +02:00
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PROVIDE ( PCNT = 0x3ff57000 );
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2018-06-27 09:01:06 +02:00
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PROVIDE ( SLC = 0x3ff58000 );
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2016-10-06 13:21:30 +02:00
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PROVIDE ( LEDC = 0x3ff59000 );
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2017-05-15 20:31:11 +02:00
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PROVIDE ( MCPWM0 = 0x3ff5E000 );
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2016-10-06 13:21:30 +02:00
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PROVIDE ( TIMERG0 = 0x3ff5F000 );
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PROVIDE ( TIMERG1 = 0x3ff60000 );
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PROVIDE ( SPI2 = 0x3ff64000 );
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PROVIDE ( SPI3 = 0x3ff65000 );
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2017-10-24 00:21:00 +02:00
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PROVIDE ( SYSCON = 0x3ff66000 );
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2016-10-06 13:21:30 +02:00
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PROVIDE ( I2C1 = 0x3ff67000 );
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2017-10-24 00:21:00 +02:00
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PROVIDE ( SDMMC = 0x3ff68000 );
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2021-04-05 13:23:58 +02:00
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PROVIDE ( EMAC_DMA = 0x3ff69000 );
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PROVIDE ( EMAC_EXT = 0x3ff69800 );
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PROVIDE ( EMAC_MAC = 0x3ff6A000 );
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PROVIDE ( TWAI = 0x3ff6B000 );
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2018-09-21 08:39:36 +02:00
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PROVIDE ( CAN = 0x3ff6B000 );
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2017-05-15 20:31:11 +02:00
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PROVIDE ( MCPWM1 = 0x3ff6C000 );
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2016-10-06 13:21:30 +02:00
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PROVIDE ( I2S1 = 0x3ff6D000 );
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PROVIDE ( UART2 = 0x3ff6E000 );
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