2016-10-06 13:21:30 +02:00
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// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "esp32-hal-spi.h"
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2016-10-11 14:51:09 +02:00
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#include "esp32-hal.h"
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2016-10-06 13:21:30 +02:00
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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2016-10-11 14:51:09 +02:00
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#include "freertos/semphr.h"
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2016-10-06 13:21:30 +02:00
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#include "rom/ets_sys.h"
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#include "esp_attr.h"
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#include "esp_intr.h"
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#include "rom/gpio.h"
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#include "soc/spi_reg.h"
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2016-10-11 14:51:09 +02:00
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#include "soc/spi_struct.h"
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2016-10-06 13:21:30 +02:00
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#include "soc/io_mux_reg.h"
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#include "soc/gpio_sig_map.h"
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#include "soc/dport_reg.h"
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2017-01-16 11:12:13 +01:00
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#define SPI_CLK_IDX(p) ((p==0)?SPICLK_OUT_IDX:((p==1)?SPICLK_OUT_IDX:((p==2)?HSPICLK_OUT_IDX:((p==3)?VSPICLK_OUT_IDX:0))))
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2016-10-06 13:21:30 +02:00
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#define SPI_MISO_IDX(p) ((p==0)?SPIQ_OUT_IDX:((p==1)?SPIQ_OUT_IDX:((p==2)?HSPIQ_OUT_IDX:((p==3)?VSPIQ_OUT_IDX:0))))
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#define SPI_MOSI_IDX(p) ((p==0)?SPID_IN_IDX:((p==1)?SPID_IN_IDX:((p==2)?HSPID_IN_IDX:((p==3)?VSPID_IN_IDX:0))))
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#define SPI_SPI_SS_IDX(n) ((n==0)?SPICS0_OUT_IDX:((n==1)?SPICS1_OUT_IDX:((n==2)?SPICS2_OUT_IDX:SPICS0_OUT_IDX)))
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#define SPI_HSPI_SS_IDX(n) ((n==0)?HSPICS0_OUT_IDX:((n==1)?HSPICS1_OUT_IDX:((n==2)?HSPICS2_OUT_IDX:HSPICS0_OUT_IDX)))
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#define SPI_VSPI_SS_IDX(n) ((n==0)?VSPICS0_OUT_IDX:((n==1)?VSPICS1_OUT_IDX:((n==2)?VSPICS2_OUT_IDX:VSPICS0_OUT_IDX)))
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#define SPI_SS_IDX(p, n) ((p==0)?SPI_SPI_SS_IDX(n):((p==1)?SPI_SPI_SS_IDX(n):((p==2)?SPI_HSPI_SS_IDX(n):((p==3)?SPI_VSPI_SS_IDX(n):0))))
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#define SPI_INUM(u) (2)
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#define SPI_INTR_SOURCE(u) ((u==0)?ETS_SPI0_INTR_SOURCE:((u==1)?ETS_SPI1_INTR_SOURCE:((u==2)?ETS_SPI2_INTR_SOURCE:((p==3)?ETS_SPI3_INTR_SOURCE:0))))
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2016-10-11 14:51:09 +02:00
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struct spi_struct_t {
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spi_dev_t * dev;
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2016-11-18 14:07:25 +01:00
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#if !CONFIG_DISABLE_HAL_LOCKS
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xSemaphoreHandle lock;
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2016-11-18 14:07:25 +01:00
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#endif
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uint8_t num;
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};
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2016-11-18 14:07:25 +01:00
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#if CONFIG_DISABLE_HAL_LOCKS
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#define SPI_MUTEX_LOCK()
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#define SPI_MUTEX_UNLOCK()
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static spi_t _spi_bus_array[4] = {
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{(volatile spi_dev_t *)(DR_REG_SPI0_BASE), 0},
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{(volatile spi_dev_t *)(DR_REG_SPI1_BASE), 1},
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{(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 2},
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{(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 3}
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};
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#else
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#define SPI_MUTEX_LOCK() do {} while (xSemaphoreTake(spi->lock, portMAX_DELAY) != pdPASS)
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#define SPI_MUTEX_UNLOCK() xSemaphoreGive(spi->lock)
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static spi_t _spi_bus_array[4] = {
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{(volatile spi_dev_t *)(DR_REG_SPI0_BASE), NULL, 0},
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{(volatile spi_dev_t *)(DR_REG_SPI1_BASE), NULL, 1},
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{(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 2},
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{(volatile spi_dev_t *)(DR_REG_SPI3_BASE), NULL, 3}
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};
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2016-11-18 14:07:25 +01:00
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#endif
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2016-10-11 14:51:09 +02:00
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2016-10-06 13:21:30 +02:00
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void spiAttachSCK(spi_t * spi, int8_t sck)
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{
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if(!spi) {
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return;
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}
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if(sck < 0) {
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if(spi->num == HSPI) {
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sck = 14;
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} else if(spi->num == VSPI) {
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sck = 18;
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} else {
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sck = 6;
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}
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}
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pinMode(sck, OUTPUT);
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pinMatrixOutAttach(sck, SPI_CLK_IDX(spi->num), false, false);
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}
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void spiAttachMISO(spi_t * spi, int8_t miso)
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{
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if(!spi) {
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return;
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}
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if(miso < 0) {
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if(spi->num == HSPI) {
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miso = 12;
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} else if(spi->num == VSPI) {
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miso = 19;
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} else {
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miso = 7;
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}
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}
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2016-10-11 14:51:09 +02:00
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SPI_MUTEX_LOCK();
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2016-10-06 13:21:30 +02:00
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pinMode(miso, INPUT);
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pinMatrixInAttach(miso, SPI_MISO_IDX(spi->num), false);
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2016-10-11 14:51:09 +02:00
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SPI_MUTEX_UNLOCK();
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2016-10-06 13:21:30 +02:00
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}
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void spiAttachMOSI(spi_t * spi, int8_t mosi)
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{
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if(!spi) {
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return;
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}
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if(mosi < 0) {
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if(spi->num == HSPI) {
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mosi = 13;
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} else if(spi->num == VSPI) {
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mosi = 23;
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} else {
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mosi = 8;
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}
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}
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pinMode(mosi, OUTPUT);
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pinMatrixOutAttach(mosi, SPI_MOSI_IDX(spi->num), false, false);
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}
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void spiDetachSCK(spi_t * spi, int8_t sck)
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{
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if(!spi) {
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return;
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}
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if(sck < 0) {
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if(spi->num == HSPI) {
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sck = 14;
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} else if(spi->num == VSPI) {
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sck = 18;
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} else {
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sck = 6;
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}
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}
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pinMatrixOutDetach(sck, false, false);
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pinMode(sck, INPUT);
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}
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void spiDetachMISO(spi_t * spi, int8_t miso)
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{
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if(!spi) {
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return;
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}
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if(miso < 0) {
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if(spi->num == HSPI) {
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miso = 12;
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} else if(spi->num == VSPI) {
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miso = 19;
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} else {
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miso = 7;
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}
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}
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pinMatrixInDetach(SPI_MISO_IDX(spi->num), false, false);
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pinMode(miso, INPUT);
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}
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void spiDetachMOSI(spi_t * spi, int8_t mosi)
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{
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if(!spi) {
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return;
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}
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if(mosi < 0) {
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if(spi->num == HSPI) {
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mosi = 13;
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} else if(spi->num == VSPI) {
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mosi = 23;
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} else {
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mosi = 8;
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}
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}
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pinMatrixOutDetach(mosi, false, false);
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pinMode(mosi, INPUT);
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}
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void spiAttachSS(spi_t * spi, uint8_t cs_num, int8_t ss)
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{
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if(!spi) {
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return;
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}
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if(cs_num > 2) {
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return;
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}
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if(ss < 0) {
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cs_num = 0;
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if(spi->num == HSPI) {
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ss = 15;
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} else if(spi->num == VSPI) {
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ss = 5;
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} else {
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ss = 11;
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}
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}
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pinMode(ss, OUTPUT);
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pinMatrixOutAttach(ss, SPI_SS_IDX(spi->num, cs_num), false, false);
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spiEnableSSPins(spi, (1 << cs_num));
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}
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void spiDetachSS(spi_t * spi, int8_t ss)
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{
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if(!spi) {
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return;
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}
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if(ss < 0) {
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if(spi->num == HSPI) {
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ss = 15;
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} else if(spi->num == VSPI) {
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ss = 5;
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} else {
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ss = 11;
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}
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}
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pinMatrixOutDetach(ss, false, false);
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pinMode(ss, INPUT);
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}
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void spiEnableSSPins(spi_t * spi, uint8_t cs_mask)
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{
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if(!spi) {
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return;
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}
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2016-10-11 14:51:09 +02:00
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SPI_MUTEX_LOCK();
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2016-10-06 13:21:30 +02:00
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spi->dev->pin.val &= ~(cs_mask & SPI_CS_MASK_ALL);
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2016-10-11 14:51:09 +02:00
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SPI_MUTEX_UNLOCK();
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2016-10-06 13:21:30 +02:00
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}
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void spiDisableSSPins(spi_t * spi, uint8_t cs_mask)
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{
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if(!spi) {
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return;
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}
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2016-10-11 14:51:09 +02:00
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SPI_MUTEX_LOCK();
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2016-10-06 13:21:30 +02:00
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spi->dev->pin.val |= (cs_mask & SPI_CS_MASK_ALL);
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2016-10-11 14:51:09 +02:00
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SPI_MUTEX_UNLOCK();
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2016-10-06 13:21:30 +02:00
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}
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void spiSSEnable(spi_t * spi)
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{
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if(!spi) {
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return;
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}
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2016-10-11 14:51:09 +02:00
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SPI_MUTEX_LOCK();
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2016-10-06 13:21:30 +02:00
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spi->dev->user.cs_setup = 1;
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spi->dev->user.cs_hold = 1;
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2016-10-11 14:51:09 +02:00
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SPI_MUTEX_UNLOCK();
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2016-10-06 13:21:30 +02:00
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}
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void spiSSDisable(spi_t * spi)
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{
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if(!spi) {
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return;
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}
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2016-10-11 14:51:09 +02:00
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SPI_MUTEX_LOCK();
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2016-10-06 13:21:30 +02:00
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spi->dev->user.cs_setup = 0;
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spi->dev->user.cs_hold = 0;
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2016-10-11 14:51:09 +02:00
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SPI_MUTEX_UNLOCK();
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2016-10-06 13:21:30 +02:00
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}
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void spiSSSet(spi_t * spi)
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{
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if(!spi) {
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return;
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}
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2016-10-11 14:51:09 +02:00
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SPI_MUTEX_LOCK();
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2016-10-06 13:21:30 +02:00
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spi->dev->pin.cs_keep_active = 1;
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2016-10-11 14:51:09 +02:00
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SPI_MUTEX_UNLOCK();
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2016-10-06 13:21:30 +02:00
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}
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void spiSSClear(spi_t * spi)
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{
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if(!spi) {
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return;
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}
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2016-10-11 14:51:09 +02:00
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SPI_MUTEX_LOCK();
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2016-10-06 13:21:30 +02:00
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spi->dev->pin.cs_keep_active = 0;
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2016-10-11 14:51:09 +02:00
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SPI_MUTEX_UNLOCK();
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2016-10-06 13:21:30 +02:00
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}
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uint32_t spiGetClockDiv(spi_t * spi)
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{
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if(!spi) {
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return 0;
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}
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return spi->dev->clock.val;
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}
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void spiSetClockDiv(spi_t * spi, uint32_t clockDiv)
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{
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if(!spi) {
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return;
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}
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2016-10-11 14:51:09 +02:00
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SPI_MUTEX_LOCK();
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2016-10-06 13:21:30 +02:00
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spi->dev->clock.val = clockDiv;
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2016-10-11 14:51:09 +02:00
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SPI_MUTEX_UNLOCK();
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2016-10-06 13:21:30 +02:00
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}
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uint8_t spiGetDataMode(spi_t * spi)
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{
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if(!spi) {
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return 0;
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}
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bool idleEdge = spi->dev->pin.ck_idle_edge;
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bool outEdge = spi->dev->user.ck_out_edge;
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if(idleEdge) {
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if(outEdge) {
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return SPI_MODE3;
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}
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return SPI_MODE2;
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}
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if(outEdge) {
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return SPI_MODE1;
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}
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return SPI_MODE0;
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}
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void spiSetDataMode(spi_t * spi, uint8_t dataMode)
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{
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if(!spi) {
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return;
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}
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2016-10-11 14:51:09 +02:00
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SPI_MUTEX_LOCK();
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2016-10-06 13:21:30 +02:00
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switch (dataMode) {
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case SPI_MODE1:
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|
|
|
spi->dev->pin.ck_idle_edge = 0;
|
|
|
|
spi->dev->user.ck_out_edge = 1;
|
|
|
|
break;
|
|
|
|
case SPI_MODE2:
|
|
|
|
spi->dev->pin.ck_idle_edge = 1;
|
2017-05-05 08:59:18 +02:00
|
|
|
spi->dev->user.ck_out_edge = 1;
|
2016-10-06 13:21:30 +02:00
|
|
|
break;
|
|
|
|
case SPI_MODE3:
|
|
|
|
spi->dev->pin.ck_idle_edge = 1;
|
2017-05-05 08:59:18 +02:00
|
|
|
spi->dev->user.ck_out_edge = 0;
|
2016-10-06 13:21:30 +02:00
|
|
|
break;
|
|
|
|
case SPI_MODE0:
|
|
|
|
default:
|
|
|
|
spi->dev->pin.ck_idle_edge = 0;
|
|
|
|
spi->dev->user.ck_out_edge = 0;
|
|
|
|
break;
|
|
|
|
}
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_UNLOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
uint8_t spiGetBitOrder(spi_t * spi)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
return (spi->dev->ctrl.wr_bit_order | spi->dev->ctrl.rd_bit_order) == 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void spiSetBitOrder(spi_t * spi, uint8_t bitOrder)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_LOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
if (SPI_MSBFIRST == bitOrder) {
|
|
|
|
spi->dev->ctrl.wr_bit_order = 0;
|
|
|
|
spi->dev->ctrl.rd_bit_order = 0;
|
|
|
|
} else if (SPI_LSBFIRST == bitOrder) {
|
|
|
|
spi->dev->ctrl.wr_bit_order = 1;
|
|
|
|
spi->dev->ctrl.rd_bit_order = 1;
|
|
|
|
}
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_UNLOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
void spiStopBus(spi_t * spi)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_LOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
spi->dev->slave.trans_done = 0;
|
|
|
|
spi->dev->slave.slave_mode = 0;
|
|
|
|
spi->dev->pin.val = 0;
|
|
|
|
spi->dev->user.val = 0;
|
|
|
|
spi->dev->user1.val = 0;
|
|
|
|
spi->dev->ctrl.val = 0;
|
|
|
|
spi->dev->ctrl1.val = 0;
|
|
|
|
spi->dev->ctrl2.val = 0;
|
|
|
|
spi->dev->clock.val = 0;
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_UNLOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
spi_t * spiStartBus(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_t bitOrder)
|
|
|
|
{
|
2016-10-11 14:51:09 +02:00
|
|
|
if(spi_num > 3){
|
2016-10-06 13:21:30 +02:00
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2016-10-11 14:51:09 +02:00
|
|
|
spi_t * spi = &_spi_bus_array[spi_num];
|
|
|
|
|
2016-11-18 14:07:25 +01:00
|
|
|
#if !CONFIG_DISABLE_HAL_LOCKS
|
2016-10-11 14:51:09 +02:00
|
|
|
if(spi->lock == NULL){
|
|
|
|
spi->lock = xSemaphoreCreateMutex();
|
|
|
|
if(spi->lock == NULL) {
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
}
|
2016-11-18 14:07:25 +01:00
|
|
|
#endif
|
2016-10-06 13:21:30 +02:00
|
|
|
|
|
|
|
if(spi_num == HSPI) {
|
2017-09-13 16:21:34 +02:00
|
|
|
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI_CLK_EN);
|
|
|
|
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI_RST);
|
2016-10-06 13:21:30 +02:00
|
|
|
} else if(spi_num == VSPI) {
|
2017-05-15 19:53:09 +02:00
|
|
|
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI_CLK_EN_2);
|
|
|
|
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI_RST_2);
|
2016-10-06 13:21:30 +02:00
|
|
|
} else {
|
2017-09-13 16:21:34 +02:00
|
|
|
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI_CLK_EN_1);
|
|
|
|
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI_RST_1);
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
spiStopBus(spi);
|
|
|
|
spiSetDataMode(spi, dataMode);
|
|
|
|
spiSetBitOrder(spi, bitOrder);
|
|
|
|
spiSetClockDiv(spi, clockDiv);
|
|
|
|
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_LOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
spi->dev->user.usr_mosi = 1;
|
|
|
|
spi->dev->user.usr_miso = 1;
|
|
|
|
spi->dev->user.doutdin = 1;
|
|
|
|
|
|
|
|
int i;
|
|
|
|
for(i=0; i<16; i++) {
|
|
|
|
spi->dev->data_buf[i] = 0x00000000;
|
|
|
|
}
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_UNLOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
|
|
|
|
return spi;
|
|
|
|
}
|
|
|
|
|
|
|
|
void spiWaitReady(spi_t * spi)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
while(spi->dev->cmd.usr);
|
|
|
|
}
|
|
|
|
|
|
|
|
void spiWrite(spi_t * spi, uint32_t *data, uint8_t len)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
int i;
|
|
|
|
if(len > 16) {
|
|
|
|
len = 16;
|
|
|
|
}
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_LOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = (len * 32) - 1;
|
2017-02-01 01:13:56 +01:00
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
|
2016-10-06 13:21:30 +02:00
|
|
|
for(i=0; i<len; i++) {
|
|
|
|
spi->dev->data_buf[i] = data[i];
|
|
|
|
}
|
|
|
|
spi->dev->cmd.usr = 1;
|
2017-02-01 01:13:56 +01:00
|
|
|
while(spi->dev->cmd.usr);
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_UNLOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
|
|
|
|
2017-02-01 01:13:56 +01:00
|
|
|
void spiTransfer(spi_t * spi, uint32_t *data, uint8_t len)
|
2016-10-06 13:21:30 +02:00
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
int i;
|
|
|
|
if(len > 16) {
|
|
|
|
len = 16;
|
|
|
|
}
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_LOCK();
|
2017-02-01 01:13:56 +01:00
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = (len * 32) - 1;
|
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = (len * 32) - 1;
|
|
|
|
for(i=0; i<len; i++) {
|
|
|
|
spi->dev->data_buf[i] = data[i];
|
|
|
|
}
|
|
|
|
spi->dev->cmd.usr = 1;
|
2016-10-06 13:21:30 +02:00
|
|
|
while(spi->dev->cmd.usr);
|
|
|
|
for(i=0; i<len; i++) {
|
|
|
|
data[i] = spi->dev->data_buf[i];
|
|
|
|
}
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_UNLOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
void spiWriteByte(spi_t * spi, uint8_t data)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_LOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = 7;
|
2017-02-01 01:13:56 +01:00
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
|
2016-10-06 13:21:30 +02:00
|
|
|
spi->dev->data_buf[0] = data;
|
|
|
|
spi->dev->cmd.usr = 1;
|
2017-02-01 01:13:56 +01:00
|
|
|
while(spi->dev->cmd.usr);
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_UNLOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
|
|
|
|
2017-02-01 01:13:56 +01:00
|
|
|
uint8_t spiTransferByte(spi_t * spi, uint8_t data)
|
2016-10-06 13:21:30 +02:00
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return 0;
|
|
|
|
}
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_LOCK();
|
2017-02-01 01:13:56 +01:00
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = 7;
|
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = 7;
|
|
|
|
spi->dev->data_buf[0] = data;
|
|
|
|
spi->dev->cmd.usr = 1;
|
2016-10-06 13:21:30 +02:00
|
|
|
while(spi->dev->cmd.usr);
|
2016-10-11 14:51:09 +02:00
|
|
|
data = spi->dev->data_buf[0] & 0xFF;
|
|
|
|
SPI_MUTEX_UNLOCK();
|
|
|
|
return data;
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
|
|
|
|
2017-02-14 03:15:34 +01:00
|
|
|
uint32_t __spiTranslate24(uint32_t data)
|
2016-10-06 13:21:30 +02:00
|
|
|
{
|
2017-02-14 03:15:34 +01:00
|
|
|
union {
|
|
|
|
uint32_t l;
|
|
|
|
uint8_t b[4];
|
|
|
|
} out;
|
|
|
|
out.l = data;
|
|
|
|
return out.b[2] | (out.b[1] << 8) | (out.b[0] << 16);
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
|
|
|
|
2017-02-14 03:15:34 +01:00
|
|
|
uint32_t __spiTranslate32(uint32_t data)
|
2016-10-06 13:21:30 +02:00
|
|
|
{
|
2017-02-14 03:15:34 +01:00
|
|
|
union {
|
|
|
|
uint32_t l;
|
|
|
|
uint8_t b[4];
|
|
|
|
} out;
|
|
|
|
out.l = data;
|
|
|
|
return out.b[3] | (out.b[2] << 8) | (out.b[1] << 16) | (out.b[0] << 24);
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
void spiWriteWord(spi_t * spi, uint16_t data)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
2017-02-14 03:15:34 +01:00
|
|
|
if(!spi->dev->ctrl.wr_bit_order){
|
|
|
|
data = (data >> 8) | (data << 8);
|
|
|
|
}
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_LOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = 15;
|
2017-02-01 01:13:56 +01:00
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
|
2017-02-14 03:15:34 +01:00
|
|
|
spi->dev->data_buf[0] = data;
|
2016-10-06 13:21:30 +02:00
|
|
|
spi->dev->cmd.usr = 1;
|
2017-02-01 01:13:56 +01:00
|
|
|
while(spi->dev->cmd.usr);
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_UNLOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
|
|
|
|
2017-02-01 01:13:56 +01:00
|
|
|
uint16_t spiTransferWord(spi_t * spi, uint16_t data)
|
2016-10-06 13:21:30 +02:00
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return 0;
|
|
|
|
}
|
2017-02-14 03:15:34 +01:00
|
|
|
if(!spi->dev->ctrl.wr_bit_order){
|
|
|
|
data = (data >> 8) | (data << 8);
|
|
|
|
}
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_LOCK();
|
2017-02-01 01:13:56 +01:00
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = 15;
|
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = 15;
|
2017-02-14 03:15:34 +01:00
|
|
|
spi->dev->data_buf[0] = data;
|
2017-02-01 01:13:56 +01:00
|
|
|
spi->dev->cmd.usr = 1;
|
2016-10-06 13:21:30 +02:00
|
|
|
while(spi->dev->cmd.usr);
|
2017-02-14 03:15:34 +01:00
|
|
|
data = spi->dev->data_buf[0];
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_UNLOCK();
|
2017-02-14 03:15:34 +01:00
|
|
|
if(!spi->dev->ctrl.rd_bit_order){
|
|
|
|
data = (data >> 8) | (data << 8);
|
|
|
|
}
|
2016-10-11 14:51:09 +02:00
|
|
|
return data;
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
void spiWriteLong(spi_t * spi, uint32_t data)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
2017-02-14 03:15:34 +01:00
|
|
|
if(!spi->dev->ctrl.wr_bit_order){
|
|
|
|
data = __spiTranslate32(data);
|
|
|
|
}
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_LOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = 31;
|
2017-02-01 01:13:56 +01:00
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
|
2017-02-14 03:15:34 +01:00
|
|
|
spi->dev->data_buf[0] = data;
|
2016-10-06 13:21:30 +02:00
|
|
|
spi->dev->cmd.usr = 1;
|
2017-02-01 01:13:56 +01:00
|
|
|
while(spi->dev->cmd.usr);
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_UNLOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
|
|
|
|
2017-02-01 01:13:56 +01:00
|
|
|
uint32_t spiTransferLong(spi_t * spi, uint32_t data)
|
2016-10-06 13:21:30 +02:00
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return 0;
|
|
|
|
}
|
2017-02-14 03:15:34 +01:00
|
|
|
if(!spi->dev->ctrl.wr_bit_order){
|
|
|
|
data = __spiTranslate32(data);
|
|
|
|
}
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_LOCK();
|
2017-02-01 01:13:56 +01:00
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = 31;
|
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = 31;
|
2017-02-14 03:15:34 +01:00
|
|
|
spi->dev->data_buf[0] = data;
|
2017-02-01 01:13:56 +01:00
|
|
|
spi->dev->cmd.usr = 1;
|
2016-10-06 13:21:30 +02:00
|
|
|
while(spi->dev->cmd.usr);
|
2017-02-14 03:15:34 +01:00
|
|
|
data = spi->dev->data_buf[0];
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_UNLOCK();
|
2017-02-14 03:15:34 +01:00
|
|
|
if(!spi->dev->ctrl.rd_bit_order){
|
|
|
|
data = __spiTranslate32(data);
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
2017-02-14 03:15:34 +01:00
|
|
|
return data;
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
void __spiTransferBytes(spi_t * spi, uint8_t * data, uint8_t * out, uint32_t bytes)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if(bytes > 64) {
|
|
|
|
bytes = 64;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t words = (bytes + 3) / 4;//16 max
|
|
|
|
|
|
|
|
uint32_t wordsBuf[16] = {0,};
|
|
|
|
uint8_t * bytesBuf = (uint8_t *) wordsBuf;
|
|
|
|
|
|
|
|
if(data) {
|
2016-11-14 12:08:30 +01:00
|
|
|
memcpy(bytesBuf, data, bytes);//copy data to buffer
|
|
|
|
} else {
|
|
|
|
memset(bytesBuf, 0xFF, bytes);
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = ((bytes * 8) - 1);
|
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = ((bytes * 8) - 1);
|
|
|
|
|
|
|
|
for(i=0; i<words; i++) {
|
|
|
|
spi->dev->data_buf[i] = wordsBuf[i]; //copy buffer to spi fifo
|
|
|
|
}
|
|
|
|
|
|
|
|
spi->dev->cmd.usr = 1;
|
|
|
|
|
2017-02-01 01:13:56 +01:00
|
|
|
while(spi->dev->cmd.usr);
|
|
|
|
|
2016-10-06 13:21:30 +02:00
|
|
|
if(out) {
|
|
|
|
for(i=0; i<words; i++) {
|
|
|
|
wordsBuf[i] = spi->dev->data_buf[i];//copy spi fifo to buffer
|
|
|
|
}
|
2016-11-14 12:08:30 +01:00
|
|
|
memcpy(out, bytesBuf, bytes);//copy buffer to output
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void spiTransferBytes(spi_t * spi, uint8_t * data, uint8_t * out, uint32_t size)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_LOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
while(size) {
|
|
|
|
if(size > 64) {
|
|
|
|
__spiTransferBytes(spi, data, out, 64);
|
|
|
|
size -= 64;
|
|
|
|
if(data) {
|
|
|
|
data += 64;
|
|
|
|
}
|
|
|
|
if(out) {
|
|
|
|
out += 64;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
__spiTransferBytes(spi, data, out, size);
|
|
|
|
size = 0;
|
|
|
|
}
|
|
|
|
}
|
2016-10-11 14:51:09 +02:00
|
|
|
SPI_MUTEX_UNLOCK();
|
2016-10-06 13:21:30 +02:00
|
|
|
}
|
|
|
|
|
2017-02-14 03:15:34 +01:00
|
|
|
/*
|
|
|
|
* Manual Lock Management
|
|
|
|
* */
|
|
|
|
|
|
|
|
#define MSB_32_SET(var, val) { uint8_t * d = (uint8_t *)&(val); (var) = d[3] | (d[2] << 8) | (d[1] << 16) | (d[0] << 24); }
|
|
|
|
#define MSB_24_SET(var, val) { uint8_t * d = (uint8_t *)&(val); (var) = d[2] | (d[1] << 8) | (d[0] << 16); }
|
|
|
|
#define MSB_16_SET(var, val) { (var) = (((val) & 0xFF00) >> 8) | (((val) & 0xFF) << 8); }
|
2017-03-22 01:26:18 +01:00
|
|
|
#define MSB_PIX_SET(var, val) { uint8_t * d = (uint8_t *)&(val); (var) = d[1] | (d[0] << 8) | (d[3] << 16) | (d[2] << 24); }
|
2017-02-14 03:15:34 +01:00
|
|
|
|
|
|
|
void spiTransaction(spi_t * spi, uint32_t clockDiv, uint8_t dataMode, uint8_t bitOrder)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
SPI_MUTEX_LOCK();
|
|
|
|
spi->dev->clock.val = clockDiv;
|
|
|
|
switch (dataMode) {
|
|
|
|
case SPI_MODE1:
|
|
|
|
spi->dev->pin.ck_idle_edge = 0;
|
|
|
|
spi->dev->user.ck_out_edge = 1;
|
|
|
|
break;
|
|
|
|
case SPI_MODE2:
|
|
|
|
spi->dev->pin.ck_idle_edge = 1;
|
|
|
|
spi->dev->user.ck_out_edge = 0;
|
|
|
|
break;
|
|
|
|
case SPI_MODE3:
|
|
|
|
spi->dev->pin.ck_idle_edge = 1;
|
|
|
|
spi->dev->user.ck_out_edge = 1;
|
|
|
|
break;
|
|
|
|
case SPI_MODE0:
|
|
|
|
default:
|
|
|
|
spi->dev->pin.ck_idle_edge = 0;
|
|
|
|
spi->dev->user.ck_out_edge = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (SPI_MSBFIRST == bitOrder) {
|
|
|
|
spi->dev->ctrl.wr_bit_order = 0;
|
|
|
|
spi->dev->ctrl.rd_bit_order = 0;
|
|
|
|
} else if (SPI_LSBFIRST == bitOrder) {
|
|
|
|
spi->dev->ctrl.wr_bit_order = 1;
|
|
|
|
spi->dev->ctrl.rd_bit_order = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void spiSimpleTransaction(spi_t * spi)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
SPI_MUTEX_LOCK();
|
|
|
|
}
|
|
|
|
|
|
|
|
void spiEndTransaction(spi_t * spi)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
SPI_MUTEX_UNLOCK();
|
|
|
|
}
|
|
|
|
|
|
|
|
void spiWriteByteNL(spi_t * spi, uint8_t data)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = 7;
|
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
|
|
|
|
spi->dev->data_buf[0] = data;
|
|
|
|
spi->dev->cmd.usr = 1;
|
|
|
|
while(spi->dev->cmd.usr);
|
|
|
|
}
|
|
|
|
|
|
|
|
uint8_t spiTransferByteNL(spi_t * spi, uint8_t data)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = 7;
|
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = 7;
|
|
|
|
spi->dev->data_buf[0] = data;
|
|
|
|
spi->dev->cmd.usr = 1;
|
|
|
|
while(spi->dev->cmd.usr);
|
|
|
|
data = spi->dev->data_buf[0] & 0xFF;
|
|
|
|
return data;
|
|
|
|
}
|
|
|
|
|
|
|
|
void spiWriteShortNL(spi_t * spi, uint16_t data)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if(!spi->dev->ctrl.wr_bit_order){
|
|
|
|
MSB_16_SET(data, data);
|
|
|
|
}
|
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = 15;
|
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
|
|
|
|
spi->dev->data_buf[0] = data;
|
|
|
|
spi->dev->cmd.usr = 1;
|
|
|
|
while(spi->dev->cmd.usr);
|
|
|
|
}
|
|
|
|
|
|
|
|
uint16_t spiTransferShortNL(spi_t * spi, uint16_t data)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
if(!spi->dev->ctrl.wr_bit_order){
|
|
|
|
MSB_16_SET(data, data);
|
|
|
|
}
|
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = 15;
|
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = 15;
|
|
|
|
spi->dev->data_buf[0] = data;
|
|
|
|
spi->dev->cmd.usr = 1;
|
|
|
|
while(spi->dev->cmd.usr);
|
|
|
|
data = spi->dev->data_buf[0] & 0xFFFF;
|
|
|
|
if(!spi->dev->ctrl.rd_bit_order){
|
|
|
|
MSB_16_SET(data, data);
|
|
|
|
}
|
|
|
|
return data;
|
|
|
|
}
|
|
|
|
|
|
|
|
void spiWriteLongNL(spi_t * spi, uint32_t data)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if(!spi->dev->ctrl.wr_bit_order){
|
|
|
|
MSB_32_SET(data, data);
|
|
|
|
}
|
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = 31;
|
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
|
|
|
|
spi->dev->data_buf[0] = data;
|
|
|
|
spi->dev->cmd.usr = 1;
|
|
|
|
while(spi->dev->cmd.usr);
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t spiTransferLongNL(spi_t * spi, uint32_t data)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
if(!spi->dev->ctrl.wr_bit_order){
|
|
|
|
MSB_32_SET(data, data);
|
|
|
|
}
|
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = 31;
|
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = 31;
|
|
|
|
spi->dev->data_buf[0] = data;
|
|
|
|
spi->dev->cmd.usr = 1;
|
|
|
|
while(spi->dev->cmd.usr);
|
|
|
|
data = spi->dev->data_buf[0];
|
|
|
|
if(!spi->dev->ctrl.rd_bit_order){
|
|
|
|
MSB_32_SET(data, data);
|
|
|
|
}
|
|
|
|
return data;
|
|
|
|
}
|
|
|
|
|
|
|
|
void spiWriteNL(spi_t * spi, const void * data_in, size_t len){
|
|
|
|
size_t longs = len >> 2;
|
|
|
|
if(len & 3){
|
|
|
|
longs++;
|
|
|
|
}
|
|
|
|
uint32_t * data = (uint32_t*)data_in;
|
|
|
|
size_t c_len = 0, c_longs = 0;
|
|
|
|
|
|
|
|
while(len){
|
|
|
|
c_len = (len>64)?64:len;
|
|
|
|
c_longs = (longs > 16)?16:longs;
|
|
|
|
|
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = (c_len*8)-1;
|
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
|
|
|
|
for (int i=0; i<c_longs; i++) {
|
|
|
|
spi->dev->data_buf[i] = data[i];
|
|
|
|
}
|
|
|
|
spi->dev->cmd.usr = 1;
|
|
|
|
while(spi->dev->cmd.usr);
|
|
|
|
|
|
|
|
data += c_longs;
|
|
|
|
longs -= c_longs;
|
|
|
|
len -= c_len;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void spiTransferBytesNL(spi_t * spi, const void * data_in, uint8_t * data_out, size_t len){
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
size_t longs = len >> 2;
|
|
|
|
if(len & 3){
|
|
|
|
longs++;
|
|
|
|
}
|
|
|
|
uint32_t * data = (uint32_t*)data_in;
|
|
|
|
uint32_t * result = (uint32_t*)data_out;
|
|
|
|
size_t c_len = 0, c_longs = 0;
|
|
|
|
|
|
|
|
while(len){
|
|
|
|
c_len = (len>64)?64:len;
|
|
|
|
c_longs = (longs > 16)?16:longs;
|
|
|
|
|
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = (c_len*8)-1;
|
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = (c_len*8)-1;
|
|
|
|
if(data){
|
|
|
|
for (int i=0; i<c_longs; i++) {
|
|
|
|
spi->dev->data_buf[i] = data[i];
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
for (int i=0; i<c_longs; i++) {
|
|
|
|
spi->dev->data_buf[i] = 0xFFFFFFFF;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
spi->dev->cmd.usr = 1;
|
|
|
|
while(spi->dev->cmd.usr);
|
|
|
|
if(result){
|
|
|
|
for (int i=0; i<c_longs; i++) {
|
|
|
|
result[i] = spi->dev->data_buf[i];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if(data){
|
|
|
|
data += c_longs;
|
|
|
|
}
|
|
|
|
if(result){
|
|
|
|
result += c_longs;
|
|
|
|
}
|
|
|
|
longs -= c_longs;
|
|
|
|
len -= c_len;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void spiTransferBitsNL(spi_t * spi, uint32_t data, uint32_t * out, uint8_t bits)
|
|
|
|
{
|
|
|
|
if(!spi) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if(bits > 32) {
|
|
|
|
bits = 32;
|
|
|
|
}
|
|
|
|
uint32_t bytes = (bits + 7) / 8;//64 max
|
|
|
|
uint32_t mask = (((uint64_t)1 << bits) - 1) & 0xFFFFFFFF;
|
|
|
|
data = data & mask;
|
|
|
|
if(!spi->dev->ctrl.wr_bit_order){
|
|
|
|
if(bytes == 2) {
|
|
|
|
MSB_16_SET(data, data);
|
|
|
|
} else if(bytes == 3) {
|
|
|
|
MSB_24_SET(data, data);
|
|
|
|
} else {
|
|
|
|
MSB_32_SET(data, data);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = (bits - 1);
|
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = (bits - 1);
|
|
|
|
spi->dev->data_buf[0] = data;
|
|
|
|
spi->dev->cmd.usr = 1;
|
|
|
|
while(spi->dev->cmd.usr);
|
|
|
|
data = spi->dev->data_buf[0];
|
|
|
|
if(out) {
|
|
|
|
*out = data;
|
|
|
|
if(!spi->dev->ctrl.rd_bit_order){
|
|
|
|
if(bytes == 2) {
|
|
|
|
MSB_16_SET(*out, data);
|
|
|
|
} else if(bytes == 3) {
|
|
|
|
MSB_24_SET(*out, data);
|
|
|
|
} else {
|
|
|
|
MSB_32_SET(*out, data);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void spiWritePixelsNL(spi_t * spi, const void * data_in, size_t len){
|
|
|
|
size_t longs = len >> 2;
|
|
|
|
if(len & 3){
|
|
|
|
longs++;
|
|
|
|
}
|
|
|
|
bool msb = !spi->dev->ctrl.wr_bit_order;
|
|
|
|
uint32_t * data = (uint32_t*)data_in;
|
|
|
|
size_t c_len = 0, c_longs = 0, l_bytes = 0;
|
|
|
|
|
|
|
|
while(len){
|
|
|
|
c_len = (len>64)?64:len;
|
|
|
|
c_longs = (longs > 16)?16:longs;
|
|
|
|
l_bytes = (c_len & 3);
|
|
|
|
|
|
|
|
spi->dev->mosi_dlen.usr_mosi_dbitlen = (c_len*8)-1;
|
|
|
|
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
|
|
|
|
for (int i=0; i<c_longs; i++) {
|
|
|
|
if(msb){
|
|
|
|
if(l_bytes && i == (c_longs - 1)){
|
|
|
|
if(l_bytes == 2){
|
|
|
|
MSB_16_SET(spi->dev->data_buf[i], data[i]);
|
|
|
|
} else {
|
|
|
|
spi->dev->data_buf[i] = data[i] & 0xFF;
|
|
|
|
}
|
|
|
|
} else {
|
2017-03-22 01:26:18 +01:00
|
|
|
MSB_PIX_SET(spi->dev->data_buf[i], data[i]);
|
2017-02-14 03:15:34 +01:00
|
|
|
}
|
|
|
|
} else {
|
|
|
|
spi->dev->data_buf[i] = data[i];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
spi->dev->cmd.usr = 1;
|
|
|
|
while(spi->dev->cmd.usr);
|
|
|
|
|
|
|
|
data += c_longs;
|
|
|
|
longs -= c_longs;
|
|
|
|
len -= c_len;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Clock Calculators
|
|
|
|
*
|
|
|
|
* */
|
2016-10-06 13:21:30 +02:00
|
|
|
|
|
|
|
typedef union {
|
|
|
|
uint32_t regValue;
|
|
|
|
struct {
|
|
|
|
unsigned regL :6;
|
|
|
|
unsigned regH :6;
|
|
|
|
unsigned regN :6;
|
|
|
|
unsigned regPre :13;
|
|
|
|
unsigned regEQU :1;
|
|
|
|
};
|
|
|
|
} spiClk_t;
|
|
|
|
|
|
|
|
#define ClkRegToFreq(reg) (CPU_CLK_FREQ / (((reg)->regPre + 1) * ((reg)->regN + 1)))
|
|
|
|
|
|
|
|
uint32_t spiClockDivToFrequency(uint32_t clockDiv)
|
|
|
|
{
|
|
|
|
spiClk_t reg = { clockDiv };
|
|
|
|
return ClkRegToFreq(®);
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t spiFrequencyToClockDiv(uint32_t freq)
|
|
|
|
{
|
|
|
|
|
|
|
|
if(freq >= CPU_CLK_FREQ) {
|
|
|
|
return SPI_CLK_EQU_SYSCLK;
|
|
|
|
}
|
|
|
|
|
|
|
|
const spiClk_t minFreqReg = { 0x7FFFF000 };
|
|
|
|
uint32_t minFreq = ClkRegToFreq((spiClk_t*) &minFreqReg);
|
|
|
|
if(freq < minFreq) {
|
|
|
|
return minFreqReg.regValue;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint8_t calN = 1;
|
|
|
|
spiClk_t bestReg = { 0 };
|
|
|
|
int32_t bestFreq = 0;
|
|
|
|
|
|
|
|
while(calN <= 0x3F) {
|
|
|
|
spiClk_t reg = { 0 };
|
|
|
|
int32_t calFreq;
|
|
|
|
int32_t calPre;
|
|
|
|
int8_t calPreVari = -2;
|
|
|
|
|
|
|
|
reg.regN = calN;
|
|
|
|
|
|
|
|
while(calPreVari++ <= 1) {
|
|
|
|
calPre = (((CPU_CLK_FREQ / (reg.regN + 1)) / freq) - 1) + calPreVari;
|
|
|
|
if(calPre > 0x1FFF) {
|
|
|
|
reg.regPre = 0x1FFF;
|
|
|
|
} else if(calPre <= 0) {
|
|
|
|
reg.regPre = 0;
|
|
|
|
} else {
|
|
|
|
reg.regPre = calPre;
|
|
|
|
}
|
|
|
|
reg.regL = ((reg.regN + 1) / 2);
|
|
|
|
calFreq = ClkRegToFreq(®);
|
|
|
|
if(calFreq == (int32_t) freq) {
|
|
|
|
memcpy(&bestReg, ®, sizeof(bestReg));
|
|
|
|
break;
|
|
|
|
} else if(calFreq < (int32_t) freq) {
|
|
|
|
if(abs(freq - calFreq) < abs(freq - bestFreq)) {
|
|
|
|
bestFreq = calFreq;
|
|
|
|
memcpy(&bestReg, ®, sizeof(bestReg));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if(calFreq == (int32_t) freq) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
calN++;
|
|
|
|
}
|
|
|
|
return bestReg.regValue;
|
|
|
|
}
|
|
|
|
|