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IDF master d93887f9f (#5336)

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* Update toolchain

* Update package_esp32_index.template.json

* add optional component dependencies after Kconfig options are known (#5404)

Until this commit, Kconfig options (e.g. CONFIG_TINYUSB_ENABLED) were
used in conditions preceding idf_component_register to determine which
components need to be added to `arduino` component requirements.
However the Kconfig options aren't known at the early expansion stage,
when the component CMakeLists.txt files are expanded the first time
and requirements are evaluated. So all the conditions evaluated as if
the options were not set.
This commit changes the logic to only add these components as
dependencies when the Kconfig options are known. Dependencies become
"weak", which means that if one of the components isn't included into
the build for some reason, it is not added as a dependency.
This may happen, for example, if the component is not present in the
`components` directory or is excluded by setting `COMPONENTS` variable
in the project CMakeLists.txt file.
This also ensures that if the component is not present, it will not be
added as a dependency, and this will allow the build to proceed.

Follow-up to https://github.com/espressif/arduino-esp32/pull/5391.
Closes https://github.com/espressif/arduino-esp32/issues/5319.

* IDF master d93887f9f

* PlatformIO updates for CI (#5387)

* Update PlatformIO CI build script

- Switch to the latest toolchains 8.4.0 for ESP32, ESP32S2, ESP32C3
- Use PlatformIO from master branch for better robustness

* Update package.json for PlatformIO

Co-authored-by: Ivan Grokhotkov <ivan@espressif.com>
Co-authored-by: Valerii Koval <valeros@users.noreply.github.com>
This commit is contained in:
Me No Dev 2021-07-17 01:57:49 +03:00 committed by GitHub
parent 780588dce3
commit 16f4b0f5ba
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812 changed files with 29998 additions and 7365 deletions
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34
.github/scripts/install-platformio-esp32.sh vendored
View File

@ -1,19 +1,43 @@
#!/bin/bash
export PLATFORMIO_ESP32_PATH="$HOME/.platformio/packages/framework-arduinoespressif32"
PLATFORMIO_ESP32_URL="https://github.com/platformio/platform-espressif32.git#feature/idf-master"
PLATFORMIO_ESP32_URL="https://github.com/platformio/platform-espressif32.git#feature/arduino-idf-master"
XTENSA32_TOOLCHAIN_VERSION="8.4.0+2021r1"
XTENSA32S2_TOOLCHAIN_VERSION="8.4.0+2021r1"
RISCV_TOOLCHAIN_VERSION="8.4.0+2021r1"
ESPTOOLPY_VERSION="~1.30100.0"
ESPRESSIF_ORGANIZATION_NAME="espressif"
echo "Installing Python Wheel ..."
pip install wheel > /dev/null 2>&1
echo "Installing PlatformIO ..."
pip install -U https://github.com/platformio/platformio/archive/develop.zip > /dev/null 2>&1
pip install -U https://github.com/platformio/platformio/archive/master.zip > /dev/null 2>&1
echo "Installing Platform ESP32 ..."
python -m platformio platform install $PLATFORMIO_ESP32_URL > /dev/null 2>&1
python -m platformio platform install $PLATFORMIO_ESP32_URL > /dev/null 2>&1
echo "Replacing the framework version ..."
python -c "import json; import os; fp=open(os.path.expanduser('~/.platformio/platforms/espressif32/platform.json'), 'r+'); data=json.load(fp); data['packages']['framework-arduinoespressif32']['version'] = '*'; fp.seek(0); fp.truncate(); json.dump(data, fp); fp.close()"
echo "Replacing the package versions ..."
replace_script="import json; import os;"
replace_script+="fp=open(os.path.expanduser('~/.platformio/platforms/espressif32/platform.json'), 'r+');"
replace_script+="data=json.load(fp);"
# Use framework sources from the repository
replace_script+="data['packages']['framework-arduinoespressif32']['version'] = '*';"
replace_script+="del data['packages']['framework-arduinoespressif32']['owner'];"
# Use toolchain packages from the "espressif" organization
replace_script+="data['packages']['toolchain-xtensa-esp32']['owner']='$ESPRESSIF_ORGANIZATION_NAME';"
replace_script+="data['packages']['toolchain-xtensa-esp32s2']['owner']='$ESPRESSIF_ORGANIZATION_NAME';"
replace_script+="data['packages']['toolchain-riscv32-esp']['owner']='$ESPRESSIF_ORGANIZATION_NAME';"
# Update versions to use the upstream
replace_script+="data['packages']['toolchain-xtensa-esp32']['version']='$XTENSA32_TOOLCHAIN_VERSION';"
replace_script+="data['packages']['toolchain-xtensa-esp32s2']['version']='$XTENSA32S2_TOOLCHAIN_VERSION';"
replace_script+="data['packages']['toolchain-riscv32-esp']['version']='$RISCV_TOOLCHAIN_VERSION';"
# esptool.py may require an upstream version (for now platformio is the owner)
replace_script+="data['packages']['tool-esptoolpy']['version']='$ESPTOOLPY_VERSION';"
# Save results
replace_script+="fp.seek(0);fp.truncate();json.dump(data, fp, indent=2);fp.close()"
python -c "$replace_script"
if [ "$GITHUB_REPOSITORY" == "espressif/arduino-esp32" ]; then
echo "Linking Core..."

49
CMakeLists.txt
View File

@ -163,26 +163,16 @@ set(priv_includes cores/esp32/libb64)
set(requires spi_flash mbedtls mdns esp_adc_cal wifi_provisioning nghttp)
set(priv_requires fatfs nvs_flash app_update spiffs bootloader_support openssl bt esp_ipc)
if(IDF_TARGET MATCHES "esp32s2|esp32s3" AND CONFIG_TINYUSB_ENABLED)
list(APPEND priv_requires arduino_tinyusb)
endif()
if(NOT CONFIG_ARDUINO_SELECTIVE_COMPILATION OR CONFIG_ARDUINO_SELECTIVE_ArduinoOTA)
list(APPEND priv_requires esp_https_ota)
endif()
if(NOT CONFIG_ARDUINO_SELECTIVE_COMPILATION OR CONFIG_ARDUINO_SELECTIVE_LITTLEFS)
if(CONFIG_LITTLEFS_PAGE_SIZE)
list(APPEND priv_requires esp_littlefs)
endif()
endif()
idf_component_register(INCLUDE_DIRS ${includedirs} PRIV_INCLUDE_DIRS ${priv_includes} SRCS ${srcs} REQUIRES ${requires} PRIV_REQUIRES ${priv_requires})
if(IDF_TARGET STREQUAL "esp32")
target_compile_options(${COMPONENT_TARGET} PUBLIC -DARDUINO=10812 -DARDUINO_ESP32_DEV -DARDUINO_ARCH_ESP32 -DARDUINO_BOARD="ESP32_DEV" -DARDUINO_VARIANT="esp32" -DESP32)
endif()
if(IDF_TARGET STREQUAL "esp32s2")
target_compile_options(${COMPONENT_TARGET} PUBLIC -DARDUINO=10812 -DARDUINO_ESP32S2_DEV -DARDUINO_ARCH_ESP32 -DARDUINO_BOARD="ESP32S2_DEV" -DARDUINO_VARIANT="esp32s2" -DESP32)
endif()
string(TOUPPER ${CONFIG_IDF_TARGET} idf_target_caps)
target_compile_options(${COMPONENT_TARGET} PUBLIC
-DARDUINO=10812
-DARDUINO_${idf_target_caps}_DEV
-DARDUINO_ARCH_ESP32
-DARDUINO_BOARD="${idf_target_caps}_DEV"
-DARDUINO_VARIANT="${CONFIG_IDF_TARGET}"
-DESP32)
if(CONFIG_AUTOSTART_ARDUINO)
# in autostart mode, arduino-esp32 contains app_main() function and needs to
@ -195,3 +185,26 @@ if(CONFIG_AUTOSTART_ARDUINO)
# (As they are C++ symbol, we need to add the C++ mangled names.)
target_link_libraries(${COMPONENT_LIB} INTERFACE "-u _Z5setupv -u _Z4loopv")
endif()
# This function adds a dependency on the given component if the component is included into the build.
function(maybe_add_component component_name)
idf_build_get_property(components BUILD_COMPONENTS)
if (${component_name} IN_LIST components)
idf_component_get_property(lib_name ${component_name} COMPONENT_LIB)
target_link_libraries(${COMPONENT_LIB} PUBLIC ${lib_name})
endif()
endfunction()
if(IDF_TARGET MATCHES "esp32" AND CONFIG_ESP_RMAKER_TASK_STACK)
maybe_add_component(esp_rainmaker)
maybe_add_component(qrcode)
endif()
if(IDF_TARGET MATCHES "esp32s2|esp32s3" AND CONFIG_TINYUSB_ENABLED)
maybe_add_component(arduino_tinyusb)
endif()
if(NOT CONFIG_ARDUINO_SELECTIVE_COMPILATION OR CONFIG_ARDUINO_SELECTIVE_ArduinoOTA)
maybe_add_component(esp_https_ota)
endif()
if(NOT CONFIG_ARDUINO_SELECTIVE_COMPILATION OR CONFIG_ARDUINO_SELECTIVE_LITTLEFS)
maybe_add_component(esp_littlefs)
endif()

18
cores/esp32/esp32-hal-tinyusb.c
View File

@ -327,7 +327,7 @@ __attribute__ ((weak)) bool tinyusb_vendor_control_complete_cb(uint8_t rhport, t
/**
* @brief Handle WebUSB and Vendor requests.
*/
bool tud_vendor_control_request_cb(uint8_t rhport, tusb_control_request_t const * request)
bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request)
{
if(WEBUSB_ENABLED && (request->bRequest == VENDOR_REQUEST_WEBUSB
|| (request->bRequest == VENDOR_REQUEST_MICROSOFT && request->wIndex == 7))){
@ -346,14 +346,14 @@ bool tud_vendor_control_request_cb(uint8_t rhport, tusb_control_request_t const
return tinyusb_vendor_control_request_cb(rhport, request);
}
bool tud_vendor_control_complete_cb(uint8_t rhport, tusb_control_request_t const * request)
{
if(!WEBUSB_ENABLED || !(request->bRequest == VENDOR_REQUEST_WEBUSB
|| (request->bRequest == VENDOR_REQUEST_MICROSOFT && request->wIndex == 7))){
return tinyusb_vendor_control_complete_cb(rhport, request);
}
return true;
}
// bool tud_vendor_control_complete_cb(uint8_t rhport, tusb_control_request_t const * request)
// {
// if(!WEBUSB_ENABLED || !(request->bRequest == VENDOR_REQUEST_WEBUSB
// || (request->bRequest == VENDOR_REQUEST_MICROSOFT && request->wIndex == 7))){
// return tinyusb_vendor_control_complete_cb(rhport, request);
// }
// return true;
// }
/*
* Required Callbacks

18
libraries/WiFi/src/WiFiAP.cpp
View File

@ -50,7 +50,19 @@ esp_netif_t* get_esp_interface_netif(esp_interface_t interface);
esp_err_t set_esp_interface_ip(esp_interface_t interface, IPAddress local_ip=IPAddress(), IPAddress gateway=IPAddress(), IPAddress subnet=IPAddress());
static bool softap_config_equal(const wifi_config_t& lhs, const wifi_config_t& rhs);
static size_t _wifi_strncpy(char * dst, const char * src, size_t dst_len){
if(!dst || !src || !dst_len){
return 0;
}
size_t src_len = strlen(src);
if(src_len >= dst_len){
src_len = dst_len;
} else {
src_len += 1;
}
memcpy(dst, src, src_len);
return src_len;
}
/**
* compare two AP configurations
@ -98,12 +110,12 @@ void wifi_softap_config(wifi_config_t *wifi_config, const char * ssid=NULL, cons
wifi_config->ap.password[0] = 0;
wifi_config->ap.ftm_responder = ftm_responder;
if(ssid != NULL && ssid[0] != 0){
strncpy((char*)wifi_config->ap.ssid, ssid, 32);
_wifi_strncpy((char*)wifi_config->ap.ssid, ssid, 32);
wifi_config->ap.ssid_len = strlen(ssid);
if(password != NULL && password[0] != 0){
wifi_config->ap.authmode = authmode;
wifi_config->ap.pairwise_cipher = WIFI_CIPHER_TYPE_CCMP; // Disable by default enabled insecure TKIP and use just CCMP.
strncpy((char*)wifi_config->ap.password, password, 64);
_wifi_strncpy((char*)wifi_config->ap.password, password, 64);
}
}
}

1
libraries/WiFi/src/WiFiGeneric.cpp
View File

@ -41,7 +41,6 @@ extern "C" {
#include "lwip/err.h"
#include "lwip/dns.h"
#include "dhcpserver/dhcpserver_options.h"
#include "esp_ipc.h"
} //extern "C"

22
libraries/WiFi/src/WiFiSTA.cpp
View File

@ -53,6 +53,20 @@ esp_err_t set_esp_interface_dns(esp_interface_t interface, IPAddress main_dns=IP
esp_err_t set_esp_interface_ip(esp_interface_t interface, IPAddress local_ip=IPAddress(), IPAddress gateway=IPAddress(), IPAddress subnet=IPAddress());
static bool sta_config_equal(const wifi_config_t& lhs, const wifi_config_t& rhs);
static size_t _wifi_strncpy(char * dst, const char * src, size_t dst_len){
if(!dst || !src || !dst_len){
return 0;
}
size_t src_len = strlen(src);
if(src_len >= dst_len){
src_len = dst_len;
} else {
src_len += 1;
}
memcpy(dst, src, src_len);
return src_len;
}
/**
* compare two STA configurations
@ -82,10 +96,10 @@ static void wifi_sta_config(wifi_config_t * wifi_config, const char * ssid=NULL,
wifi_config->sta.ssid[0] = 0;
wifi_config->sta.password[0] = 0;
if(ssid != NULL && ssid[0] != 0){
strncpy((char*)wifi_config->sta.ssid, ssid, 32);
_wifi_strncpy((char*)wifi_config->sta.ssid, ssid, 32);
if(password != NULL && password[0] != 0){
wifi_config->sta.threshold.authmode = WIFI_AUTH_WEP;
strncpy((char*)wifi_config->sta.password, password, 64);
_wifi_strncpy((char*)wifi_config->sta.password, password, 64);
}
if(bssid != NULL){
wifi_config->sta.bssid_set = 1;
@ -161,11 +175,11 @@ wl_status_t WiFiSTAClass::begin(const char* ssid, const char *passphrase, int32_
wifi_config_t conf;
memset(&conf, 0, sizeof(wifi_config_t));
strncpy(reinterpret_cast<char*>(conf.sta.ssid), ssid, 32);
_wifi_strncpy(reinterpret_cast<char*>(conf.sta.ssid), ssid, 32);
conf.sta.scan_method = WIFI_ALL_CHANNEL_SCAN; //force full scan to be able to choose the nearest / strongest AP
if(passphrase) {
strncpy(reinterpret_cast<char*>(conf.sta.password), passphrase, 64);
_wifi_strncpy(reinterpret_cast<char*>(conf.sta.password), passphrase, 64);
}
wifi_config_t current_conf;

18
package.json
View File

@ -1,6 +1,16 @@
{
"name": "framework-arduinoespressif32",
"description": "Arduino Wiring-based Framework (ESP32 Core)",
"version": "0.0.0",
"name": "framework-arduinoespressif32",
"version": "0.0.0",
"description": "Arduino Wiring-based Framework for the Espressif ESP32, ESP32-S and ESP32-C series of SoCs",
"keywords": [
"framework",
"arduino",
"espressif",
"esp32"
],
"license": "LGPL-2.1-or-later",
"repository": {
"type": "git",
"url": "https://github.com/espressif/arduino-esp32"
}
}
}

201
package/package_esp32_index.template.json
View File

@ -33,20 +33,20 @@
}
],
"toolsDependencies": [
{
"packager": "esp32",
"name": "riscv32-esp-elf-gcc",
"version": "gcc8_4_0-esp-2021r1"
},
{
"packager": "esp32",
"name": "xtensa-esp32-elf-gcc",
"version": "gcc8_4_0-esp-2020r3"
"version": "gcc8_4_0-esp-2021r1"
},
{
"packager": "esp32",
"name": "xtensa-esp32s2-elf-gcc",
"version": "gcc8_4_0-esp-2020r3"
},
{
"packager": "esp32",
"name": "riscv32-esp-elf-gcc",
"version": "gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff"
"version": "gcc8_4_0-esp-2021r1"
},
{
"packager": "esp32",
@ -73,118 +73,125 @@
],
"tools": [
{
"name": "xtensa-esp32-elf-gcc",
"version": "gcc8_4_0-esp-2020r3",
"name": "riscv32-esp-elf-gcc",
"version": "gcc8_4_0-esp-2021r1",
"systems": [
{
"host": "i686-mingw32",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2020r3/xtensa-esp32-elf-gcc8_4_0-esp-2020r3-win32.zip",
"archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2020r3-win32.zip",
"checksum": "SHA-256:81cecd5493a3fcf2118977f3fd60bd0a13a4aeac8fe6760d912f96d2c34fab66",
"size": "104226379"
},
{
"host": "x86_64-apple-darwin",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2020r3/xtensa-esp32-elf-gcc8_4_0-esp-2020r3-macos.tar.gz",
"archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2020r3-macos.tar.gz",
"checksum": "SHA-256:6845f786303b26c4a55ede57487ba65bd25737232fe6104be03f25bb62f4631c",
"size": "92424226"
},
{
"host": "x86_64-pc-linux-gnu",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2020r3/xtensa-esp32-elf-gcc8_4_0-esp-2020r3-linux-amd64.tar.gz",
"archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2020r3-linux-amd64.tar.gz",
"checksum": "SHA-256:674080a12f9c5ebe5a3a5ce51c6deaeffe6dfb06d6416233df86f25b574e9279",
"size": "85731226"
},
{
"host": "i686-pc-linux-gnu",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2020r3/xtensa-esp32-elf-gcc8_4_0-esp-2020r3-linux-i686.tar.gz",
"archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2020r3-linux-i686.tar.gz",
"checksum": "SHA-256:076b7e05304e26aa6ec105c9e0dc74addca079bc2cae6e42ee7575c5ded29877",
"size": "87715092"
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r1/riscv32-esp-elf-gcc8_4_0-esp-2021r1-linux-amd64.tar.gz",
"archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r1-linux-amd64.tar.gz",
"checksum": "SHA-256:3459618f33bbd5f54d7d7783e807cb6eef6472a220f2f1eb3faced735b9d13bb",
"size": "152812483"
},
{
"host": "arm-linux-gnueabihf",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2020r3/xtensa-esp32-elf-gcc8_4_0-esp-2020r3-linux-armel.tar.gz",
"archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2020r3-linux-armel.tar.gz",
"checksum": "SHA-256:6771e011dffa2438ef84ff3474538b4a69df8f9d4cfae3b3707ca31c782ed7db",
"size": "83888892"
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r1/riscv32-esp-elf-gcc8_4_0-esp-2021r1-linux-armel.tar.gz",
"archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r1-linux-armel.tar.gz",
"checksum": "SHA-256:24b9e54b348bbd5fb816fc4c52abb47337c702beecdbba840750b7cfb9d38069",
"size": "151726623"
},
{
"host": "i686-pc-linux-gnu",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r1/riscv32-esp-elf-gcc8_4_0-esp-2021r1-linux-i686.tar.gz",
"archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r1-linux-i686.tar.gz",
"checksum": "SHA-256:954d340ebffef12a2ce9be1ea004e6f45a8863f1e6f41f46fd3f04f58499627c",
"size": "155430963"
},
{
"host": "x86_64-apple-darwin",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r1/riscv32-esp-elf-gcc8_4_0-esp-2021r1-macos.tar.gz",
"archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r1-macos.tar.gz",
"checksum": "SHA-256:612fb3a3f84f703222327bd16581df8f80fda8cdf137637fe5d611587d1b664e",
"size": "159836199"
},
{
"host": "i686-mingw32",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r1/riscv32-esp-elf-gcc8_4_0-esp-2021r1-win32.zip",
"archiveFileName": "riscv32-esp-elf-gcc8_4_0-esp-2021r1-win32.zip",
"checksum": "SHA-256:5711eb407ffe44adddbd1281b6b575a5645e7193ca78faefa27dc5bc5b662bec",
"size": "191266312"
}
]
},
{
"name": "xtensa-esp32-elf-gcc",
"version": "gcc8_4_0-esp-2021r1",
"systems": [
{
"host": "x86_64-pc-linux-gnu",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r1/xtensa-esp32-elf-gcc8_4_0-esp-2021r1-linux-amd64.tar.gz",
"archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r1-linux-amd64.tar.gz",
"checksum": "SHA-256:44a0b467b9d2b759ab48b2f27aed684581f33c96e2842992781c4e045992c5b0",
"size": "86361217"
},
{
"host": "arm-linux-gnueabihf",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r1/xtensa-esp32-elf-gcc8_4_0-esp-2021r1-linux-armel.tar.gz",
"archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r1-linux-armel.tar.gz",
"checksum": "SHA-256:fdacdb2a7bbf6293bcafda9b52463a4da8a2f3b7e1df9f83d35ff9d1efa22012",
"size": "84520407"
},
{
"host": "i686-pc-linux-gnu",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r1/xtensa-esp32-elf-gcc8_4_0-esp-2021r1-linux-i686.tar.gz",
"archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r1-linux-i686.tar.gz",
"checksum": "SHA-256:e2024096492dfaa50fc6ac336cd8faa2e395e8cebb617753eab0b5f16d3dd0dc",
"size": "88375391"
},
{
"host": "x86_64-apple-darwin",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r1/xtensa-esp32-elf-gcc8_4_0-esp-2021r1-macos.tar.gz",
"archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r1-macos.tar.gz",
"checksum": "SHA-256:7bbc6a2b94f009cd8a3351b9c7acf7a5caa1c4d3700500ead60f84965386a61b",
"size": "93357296"
},
{
"host": "i686-mingw32",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r1/xtensa-esp32-elf-gcc8_4_0-esp-2021r1-win32.zip",
"archiveFileName": "xtensa-esp32-elf-gcc8_4_0-esp-2021r1-win32.zip",
"checksum": "SHA-256:e4f9fdda192abfc9807e3e7fcd6e9fea30c1a0cf3f3c5a5c961b5114fc8c9b7e",
"size": "105603626"
}
]
},
{
"name": "xtensa-esp32s2-elf-gcc",
"version": "gcc8_4_0-esp-2020r3",
"version": "gcc8_4_0-esp-2021r1",
"systems": [
{
"host": "i686-mingw32",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2020r3/xtensa-esp32s2-elf-gcc8_4_0-esp-2020r3-win32.zip",
"archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2020r3-win32.zip",
"checksum": "SHA-256:d078d614ae864ae4a37fcb5b83323af0a5cfdbd8243607664becdd0f977a1e33",
"size": "104659541"
},
{
"host": "x86_64-apple-darwin",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2020r3/xtensa-esp32s2-elf-gcc8_4_0-esp-2020r3-macos.tar.gz",
"archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2020r3-macos.tar.gz",
"checksum": "SHA-256:fe19b0c873879d8d89ec040f4db04a3ab27d769d3fd5f55fe59a28b6b111d09c",
"size": "92817351"
},
{
"host": "x86_64-pc-linux-gnu",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2020r3/xtensa-esp32s2-elf-gcc8_4_0-esp-2020r3-linux-amd64.tar.gz",
"archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2020r3-linux-amd64.tar.gz",
"checksum": "SHA-256:40fafa47045167feda0cd07827db5207ebfeb4a3b6b24475957a921bc92805ed",
"size": "86069526"
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r1/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r1-linux-amd64.tar.gz",
"archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r1-linux-amd64.tar.gz",
"checksum": "SHA-256:b127baccfe6949ee7eaf3d0782ea772750a9b8e2732b16ce6bcc9dcd91f7209a",
"size": "86687290"
},
{
"host": "arm-linux-gnueabihf",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r1/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r1-linux-armel.tar.gz",
"archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r1-linux-armel.tar.gz",
"checksum": "SHA-256:7ca0d240f11e1c53c01a56257b0c968f876ab405142d1068d8c9b456d939554c",
"size": "84916701"
},
{
"host": "i686-pc-linux-gnu",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2020r3/xtensa-esp32s2-elf-gcc8_4_0-esp-2020r3-linux-i686.tar.gz",
"archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2020r3-linux-i686.tar.gz",
"checksum": "SHA-256:bd3a91166206a1a7ff7c572e15389e1938c3cdce588032a5e915be677a945638",
"size": "88053499"
},
{
"host": "arm-linux-gnueabihf",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2020r3/xtensa-esp32s2-elf-gcc8_4_0-esp-2020r3-linux-armel.tar.gz",
"archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2020r3-linux-armel.tar.gz",
"checksum": "SHA-256:6c1efec4c7829202279388ccb388e8a17a34464bc351d677c4f04d95ea4b4ce0",
"size": "84254468"
}
]
},
{
"name": "riscv32-esp-elf-gcc",
"version": "gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff",
"systems": [
{
"host": "i686-mingw32",
"url": "https://github.com/espressif/arduino-esp32/releases/download/1.0.6/riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-win32.zip",
"archiveFileName": "riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-win32.zip",
"checksum": "SHA-256:4f576b08620f57c270ac677cc94dce2767fff72d27a539e348d448f63b480d1f",
"size": "190014086"
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r1/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r1-linux-i686.tar.gz",
"archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r1-linux-i686.tar.gz",
"checksum": "SHA-256:9941f993ff84d1c606b45ffbeeb7bcdc5a72cf24e787bb9230390510fe3511c6",
"size": "88699953"
},
{
"host": "x86_64-apple-darwin",
"url": "https://github.com/espressif/arduino-esp32/releases/download/1.0.6/riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-macos.tar.gz",
"archiveFileName": "riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-macos.tar.gz",
"checksum": "SHA-256:35b1aef85b7e6b4268774f627e8e835d087bcf8b9972cfb6436614aa2e40d4a9",
"size": "158594401"
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r1/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r1-macos.tar.gz",
"archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r1-macos.tar.gz",
"checksum": "SHA-256:4b55b1a9ca7fc945be6fc3513802b6cece9264bee4cbca76013569cec2695973",
"size": "93757895"
},
{
"host": "x86_64-pc-linux-gnu",
"url": "https://github.com/espressif/arduino-esp32/releases/download/1.0.6/riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-linux-amd64.tar.gz",
"archiveFileName": "riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-linux-amd64.tar.gz",
"checksum": "SHA-256:425454c5c4e2cde5dd2dd3a1d398befc70addf71547840fb6d0ec4b307b08894",
"size": "152042971"
},
{
"host": "arm-linux-gnueabihf",
"url": "https://github.com/espressif/arduino-esp32/releases/download/1.0.6/riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-linux-armel.tar.gz",
"archiveFileName": "riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-linux-armel.tar.gz",
"checksum": "SHA-256:8ae098751b5196ca8a80d832cc9930bc4d639762a6cb22be3cfe0a8d71b2f230",
"size": "150801079"
"host": "i686-mingw32",
"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r1/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r1-win32.zip",
"archiveFileName": "xtensa-esp32s2-elf-gcc8_4_0-esp-2021r1-win32.zip",
"checksum": "SHA-256:c94ec1e45c81b7e4944d216bab4aa41d46849768d7761fd691661dab1a3df828",
"size": "106013515"
}
]
},

36
platform.txt
View File

File diff suppressed because one or more lines are too long

346
tools/esptool.py
View File

@ -68,7 +68,7 @@ except Exception:
raise
__version__ = "3.1-dev"
__version__ = "3.2-dev"
MAX_UINT32 = 0xffffffff
MAX_UINT24 = 0xffffff
@ -100,9 +100,10 @@ def _chip_to_rom_loader(chip):
'esp32': ESP32ROM,
'esp32s2': ESP32S2ROM,
'esp32s3beta2': ESP32S3BETA2ROM,
'esp32s3beta3': ESP32S3BETA3ROM,
'esp32s3': ESP32S3ROM,
'esp32c3': ESP32C3ROM,
'esp32c6beta': ESP32C6BETAROM,
'esp32h2': ESP32H2ROM,
}[chip]
@ -162,6 +163,11 @@ def stub_and_esp32_function_only(func):
return check_supported_function(func, lambda o: o.IS_STUB or isinstance(o, ESP32ROM))
def esp32s3_or_newer_function_only(func):
""" Attribute for a function only supported by ESP32S3/32C3 ROM """
return check_supported_function(func, lambda o: isinstance(o, ESP32S3ROM) or isinstance(o, ESP32C3ROM))
PYTHON2 = sys.version_info[0] < 3 # True if on pre-Python 3
# Function to return nth byte of a bitstring
@ -295,6 +301,9 @@ class ESPLoader(object):
# Device PIDs
USB_JTAG_SERIAL_PID = 0x1001
# Chip IDs that are no longer supported by esptool
UNSUPPORTED_CHIPS = {6: "ESP32-S3(beta 3)"}
def __init__(self, port=DEFAULT_PORT, baud=ESP_ROM_BAUD, trace_enabled=False):
"""Base constructor for ESPLoader bootloader interaction
@ -308,6 +317,7 @@ class ESPLoader(object):
"""
self.secure_download_mode = False # flag is set to True if esptool detects the ROM is in Secure Download Mode
self.stub_is_disabled = False # flag is set to True if esptool detects conditions which requires the stub to be disabled
if isinstance(port, basestring):
self._port = serial.serial_for_url(port)
@ -358,11 +368,13 @@ class ESPLoader(object):
sys.stdout.flush()
chip_magic_value = detect_port.read_reg(ESPLoader.CHIP_DETECT_MAGIC_REG_ADDR)
for cls in [ESP8266ROM, ESP32ROM, ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3BETA3ROM, ESP32C3ROM, ESP32C6BETAROM]:
for cls in [ESP8266ROM, ESP32ROM, ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3ROM, ESP32C3ROM, ESP32C6BETAROM, ESP32H2ROM]:
if chip_magic_value in cls.CHIP_DETECT_MAGIC_VALUE:
# don't connect a second time
inst = cls(detect_port._port, baud, trace_enabled=trace_enabled)
inst._post_connect()
inst.check_chip_id()
print(' %s' % inst.CHIP_NAME, end='')
if detect_port.sync_stub_detected:
inst = inst.STUB_CLASS(inst)
@ -644,7 +656,7 @@ class ESPLoader(object):
chip_magic_value = self.read_reg(ESPLoader.CHIP_DETECT_MAGIC_REG_ADDR)
if chip_magic_value not in self.CHIP_DETECT_MAGIC_VALUE:
actually = None
for cls in [ESP8266ROM, ESP32ROM, ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3BETA3ROM, ESP32C3ROM]:
for cls in [ESP8266ROM, ESP32ROM, ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3ROM, ESP32C3ROM, ESP32H2ROM]:
if chip_magic_value in cls.CHIP_DETECT_MAGIC_VALUE:
actually = cls
break
@ -656,6 +668,7 @@ class ESPLoader(object):
except UnsupportedCommandError:
self.secure_download_mode = True
self._post_connect()
self.check_chip_id()
def _post_connect(self):
"""
@ -751,7 +764,7 @@ class ESPLoader(object):
timeout = timeout_per_mb(ERASE_REGION_TIMEOUT_PER_MB, size) # ROM performs the erase up front
params = struct.pack('<IIII', erase_size, num_blocks, self.FLASH_WRITE_SIZE, offset)
if isinstance(self, (ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3BETA3ROM, ESP32C3ROM, ESP32C6BETAROM)) and not self.IS_STUB:
if isinstance(self, (ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3ROM, ESP32C3ROM, ESP32C6BETAROM, ESP32H2ROM)) and not self.IS_STUB:
params += struct.pack('<I', 1 if begin_rom_encrypted else 0)
self.check_command("enter Flash download mode", self.ESP_FLASH_BEGIN,
params, timeout=timeout)
@ -769,7 +782,7 @@ class ESPLoader(object):
""" Encrypt before writing to flash """
def flash_encrypt_block(self, data, seq, timeout=DEFAULT_TIMEOUT):
if isinstance(self, (ESP32S2ROM, ESP32C3ROM)) and not self.IS_STUB:
if isinstance(self, (ESP32S2ROM, ESP32C3ROM, ESP32H2ROM)) and not self.IS_STUB:
# ROM support performs the encrypted writes via the normal write command,
# triggered by flash_begin(begin_rom_encrypted=True)
return self.flash_block(data, seq, timeout)
@ -805,6 +818,14 @@ class ESPLoader(object):
# TODO: pack this as some kind of better data type
return (flags, flash_crypt_cnt, key_purposes)
@esp32s3_or_newer_function_only
def get_chip_info(self):
# TODO: this only works on the ESP32S3/C3 ROM code loader and needs to work in stub loader also
res = self.check_command('get security info', self.ESP_GET_SECURITY_INFO, b'')
res = struct.unpack("<IBBBBBBBBII", res)
chip_id, eco_version = res[-2], res[-1]
return (chip_id, eco_version)
@classmethod
def parse_flash_size_arg(cls, arg):
try:
@ -860,7 +881,7 @@ class ESPLoader(object):
timeout = timeout_per_mb(ERASE_REGION_TIMEOUT_PER_MB, write_size) # ROM performs the erase up front
print("Compressed %d bytes to %d..." % (size, compsize))
params = struct.pack('<IIII', write_size, num_blocks, self.FLASH_WRITE_SIZE, offset)
if isinstance(self, (ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3BETA3ROM, ESP32C3ROM, ESP32C6BETAROM)) and not self.IS_STUB:
if isinstance(self, (ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3ROM, ESP32C3ROM, ESP32C6BETAROM, ESP32H2ROM)) and not self.IS_STUB:
params += struct.pack('<I', 0) # extra param is to enter encrypted flash mode via ROM (not supported currently)
self.check_command("enter compressed flash mode", self.ESP_FLASH_DEFL_BEGIN, params, timeout=timeout)
if size != 0 and not self.IS_STUB:
@ -1191,6 +1212,17 @@ class ESPLoader(object):
# in the stub loader
self.command(self.ESP_RUN_USER_CODE, wait_response=False)
def check_chip_id(self):
try:
chip_id, _ = self.get_chip_info()
if chip_id != self.IMAGE_CHIP_ID:
print("WARNING: Chip ID {} ({}) doesn't match expected Chip ID {}. esptool may not work correctly."
.format(chip_id, self.UNSUPPORTED_CHIPS.get(chip_id, 'Unknown'), self.IMAGE_CHIP_ID))
# Try to flash anyways by disabling stub
self.stub_is_disabled = True
except NotImplementedInROMError:
pass
class ESP8266ROM(ESPLoader):
""" Access class for ESP8266 ROM bootloader
@ -1833,6 +1865,10 @@ class ESP32S2ROM(ESP32ROM):
class ESP32S3ROM(ESP32ROM):
CHIP_NAME = "ESP32-S3"
IMAGE_CHIP_ID = 9
CHIP_DETECT_MAGIC_VALUE = [0x9]
IROM_MAP_START = 0x42000000
IROM_MAP_END = 0x44000000
DROM_MAP_START = 0x3c000000
@ -1851,7 +1887,7 @@ class ESP32S3ROM(ESP32ROM):
FLASH_ENCRYPTED_WRITE_ALIGN = 16
# todo: use espefuse APIs to get this info
EFUSE_BASE = 0x6001A000 # BLOCK0 read base address
EFUSE_BASE = 0x60007000 # BLOCK0 read base address
MAC_EFUSE_REG = EFUSE_BASE + 0x044
EFUSE_RD_REG_BASE = EFUSE_BASE + 0x030 # BLOCK0 read base address
@ -1947,20 +1983,12 @@ class ESP32S3BETA2ROM(ESP32S3ROM):
CHIP_DETECT_MAGIC_VALUE = [0xeb004136]
EFUSE_BASE = 0x6001A000 # BLOCK0 read base address
def get_chip_description(self):
return "ESP32-S3(beta2)"
class ESP32S3BETA3ROM(ESP32S3ROM):
CHIP_NAME = "ESP32-S3(beta3)"
IMAGE_CHIP_ID = 6
CHIP_DETECT_MAGIC_VALUE = [0x9]
def get_chip_description(self):
return "ESP32-S3(beta3)"
class ESP32C3ROM(ESP32ROM):
CHIP_NAME = "ESP32-C3"
IMAGE_CHIP_ID = 5
@ -2087,8 +2115,122 @@ class ESP32C3ROM(ESP32ROM):
return any(p == self.PURPOSE_VAL_XTS_AES128_KEY for p in purposes)
class ESP32H2ROM(ESP32ROM):
CHIP_NAME = "ESP32-H2"
IMAGE_CHIP_ID = 10
IROM_MAP_START = 0x42000000
IROM_MAP_END = 0x42800000
DROM_MAP_START = 0x3c000000
DROM_MAP_END = 0x3c800000
SPI_REG_BASE = 0x60002000
SPI_USR_OFFS = 0x18
SPI_USR1_OFFS = 0x1C
SPI_USR2_OFFS = 0x20
SPI_MOSI_DLEN_OFFS = 0x24
SPI_MISO_DLEN_OFFS = 0x28
SPI_W0_OFFS = 0x58
BOOTLOADER_FLASH_OFFSET = 0x0
CHIP_DETECT_MAGIC_VALUE = [0xca26cc22]
UART_DATE_REG_ADDR = 0x60000000 + 0x7c
EFUSE_BASE = 0x6001A000
MAC_EFUSE_REG = EFUSE_BASE + 0x044
EFUSE_RD_REG_BASE = EFUSE_BASE + 0x030 # BLOCK0 read base address
EFUSE_PURPOSE_KEY0_REG = EFUSE_BASE + 0x34
EFUSE_PURPOSE_KEY0_SHIFT = 24
EFUSE_PURPOSE_KEY1_REG = EFUSE_BASE + 0x34
EFUSE_PURPOSE_KEY1_SHIFT = 28
EFUSE_PURPOSE_KEY2_REG = EFUSE_BASE + 0x38
EFUSE_PURPOSE_KEY2_SHIFT = 0
EFUSE_PURPOSE_KEY3_REG = EFUSE_BASE + 0x38
EFUSE_PURPOSE_KEY3_SHIFT = 4
EFUSE_PURPOSE_KEY4_REG = EFUSE_BASE + 0x38
EFUSE_PURPOSE_KEY4_SHIFT = 8
EFUSE_PURPOSE_KEY5_REG = EFUSE_BASE + 0x38
EFUSE_PURPOSE_KEY5_SHIFT = 12
EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG = EFUSE_RD_REG_BASE
EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT = 1 << 20
PURPOSE_VAL_XTS_AES128_KEY = 4
GPIO_STRAP_REG = 0x3f404038
FLASH_ENCRYPTED_WRITE_ALIGN = 16
MEMORY_MAP = []
def get_pkg_version(self):
num_word = 3
block1_addr = self.EFUSE_BASE + 0x044
word3 = self.read_reg(block1_addr + (4 * num_word))
pkg_version = (word3 >> 21) & 0x0F
return pkg_version
def get_chip_revision(self):
# reads WAFER_VERSION field from EFUSE_RD_MAC_SPI_SYS_3_REG
block1_addr = self.EFUSE_BASE + 0x044
num_word = 3
pos = 18
return (self.read_reg(block1_addr + (4 * num_word)) & (0x7 << pos)) >> pos
def get_chip_description(self):
chip_name = {
0: "ESP32-H2",
}.get(self.get_pkg_version(), "unknown ESP32-H2")
chip_revision = self.get_chip_revision()
return "%s (revision %d)" % (chip_name, chip_revision)
def get_chip_features(self):
return ["BLE/802.15.4"]
def get_crystal_freq(self):
return 40
def override_vddsdio(self, new_voltage):
raise NotImplementedInROMError("VDD_SDIO overrides are not supported for ESP32-H2")
def read_mac(self):
mac0 = self.read_reg(self.MAC_EFUSE_REG)
mac1 = self.read_reg(self.MAC_EFUSE_REG + 4) # only bottom 16 bits are MAC
bitstring = struct.pack(">II", mac1, mac0)[2:]
try:
return tuple(ord(b) for b in bitstring)
except TypeError: # Python 3, bitstring elements are already bytes
return tuple(bitstring)
def get_flash_crypt_config(self):
return None # doesn't exist on ESP32-H2
def get_key_block_purpose(self, key_block):
if key_block < 0 or key_block > 5:
raise FatalError("Valid key block numbers must be in range 0-5")
reg, shift = [(self.EFUSE_PURPOSE_KEY0_REG, self.EFUSE_PURPOSE_KEY0_SHIFT),
(self.EFUSE_PURPOSE_KEY1_REG, self.EFUSE_PURPOSE_KEY1_SHIFT),
(self.EFUSE_PURPOSE_KEY2_REG, self.EFUSE_PURPOSE_KEY2_SHIFT),
(self.EFUSE_PURPOSE_KEY3_REG, self.EFUSE_PURPOSE_KEY3_SHIFT),
(self.EFUSE_PURPOSE_KEY4_REG, self.EFUSE_PURPOSE_KEY4_SHIFT),
(self.EFUSE_PURPOSE_KEY5_REG, self.EFUSE_PURPOSE_KEY5_SHIFT)][key_block]
return (self.read_reg(reg) >> shift) & 0xF
def is_flash_encryption_key_valid(self):
# Need to see an AES-128 key
purposes = [self.get_key_block_purpose(b) for b in range(6)]
return any(p == self.PURPOSE_VAL_XTS_AES128_KEY for p in purposes)
class ESP32C6BETAROM(ESP32C3ROM):
CHIP_NAME = "ESP32-C6 BETA"
CHIP_NAME = "ESP32-C6(beta)"
IMAGE_CHIP_ID = 7
CHIP_DETECT_MAGIC_VALUE = [0x0da1806f]
@ -2165,7 +2307,7 @@ class ESP32S3BETA2StubLoader(ESP32S3BETA2ROM):
ESP32S3BETA2ROM.STUB_CLASS = ESP32S3BETA2StubLoader
class ESP32S3BETA3StubLoader(ESP32S3BETA3ROM):
class ESP32S3StubLoader(ESP32S3ROM):
""" Access class for ESP32S3 stub loader, runs on top of ROM.
(Basically the same as ESP32StubLoader, but different base class.
@ -2182,7 +2324,7 @@ class ESP32S3BETA3StubLoader(ESP32S3BETA3ROM):
self.flush_input() # resets _slip_reader
ESP32S3BETA3ROM.STUB_CLASS = ESP32S3BETA3StubLoader
ESP32S3ROM.STUB_CLASS = ESP32S3StubLoader
class ESP32C3StubLoader(ESP32C3ROM):
@ -2205,6 +2347,26 @@ class ESP32C3StubLoader(ESP32C3ROM):
ESP32C3ROM.STUB_CLASS = ESP32C3StubLoader
class ESP32H2StubLoader(ESP32H2ROM):
""" Access class for ESP32H2 stub loader, runs on top of ROM.
(Basically the same as ESP32StubLoader, but different base class.
Can possibly be made into a mixin.)
"""
FLASH_WRITE_SIZE = 0x4000 # matches MAX_WRITE_BLOCK in stub_loader.c
STATUS_BYTES_LENGTH = 2 # same as ESP8266, different to ESP32 ROM
IS_STUB = True
def __init__(self, rom_loader):
self.secure_download_mode = rom_loader.secure_download_mode
self._port = rom_loader._port
self._trace_enabled = rom_loader._trace_enabled
self.flush_input() # resets _slip_reader
ESP32H2ROM.STUB_CLASS = ESP32H2StubLoader
class ESPBOOTLOADER(object):
""" These are constants related to software ESP8266 bootloader, working with 'v2' image files """
@ -2231,12 +2393,14 @@ def LoadFirmwareImage(chip, filename):
return ESP32S2FirmwareImage(f)
elif chip == "esp32s3beta2":
return ESP32S3BETA2FirmwareImage(f)
elif chip == "esp32s3beta3":
return ESP32S3BETA3FirmwareImage(f)
elif chip == "esp32s3":
return ESP32S3FirmwareImage(f)
elif chip == 'esp32c3':
return ESP32C3FirmwareImage(f)
elif chip == 'esp32c6beta':
return ESP32C6BETAFirmwareImage(f)
elif chip == 'esp32h2':
return ESP32H2FirmwareImage(f)
else: # Otherwise, ESP8266 so look at magic to determine the image type
magic = ord(f.read(1))
f.seek(0)
@ -2861,12 +3025,12 @@ class ESP32S3BETA2FirmwareImage(ESP32FirmwareImage):
ESP32S3BETA2ROM.BOOTLOADER_IMAGE = ESP32S3BETA2FirmwareImage
class ESP32S3BETA3FirmwareImage(ESP32FirmwareImage):
class ESP32S3FirmwareImage(ESP32FirmwareImage):
""" ESP32S3 Firmware Image almost exactly the same as ESP32FirmwareImage """
ROM_LOADER = ESP32S3BETA3ROM
ROM_LOADER = ESP32S3ROM
ESP32S3BETA3ROM.BOOTLOADER_IMAGE = ESP32S3BETA3FirmwareImage
ESP32S3ROM.BOOTLOADER_IMAGE = ESP32S3FirmwareImage
class ESP32C3FirmwareImage(ESP32FirmwareImage):
@ -2885,6 +3049,14 @@ class ESP32C6BETAFirmwareImage(ESP32FirmwareImage):
ESP32C6BETAROM.BOOTLOADER_IMAGE = ESP32C6BETAFirmwareImage
class ESP32H2FirmwareImage(ESP32FirmwareImage):
""" ESP32H2 Firmware Image almost exactly the same as ESP32FirmwareImage """
ROM_LOADER = ESP32H2ROM
ESP32H2ROM.BOOTLOADER_IMAGE = ESP32H2FirmwareImage
class ELFFile(object):
SEC_TYPE_PROGBITS = 0x01
SEC_TYPE_STRTAB = 0x03
@ -3556,8 +3728,8 @@ def elf2image(args):
image = ESP32S3BETA2FirmwareImage()
if args.secure_pad_v2:
image.secure_pad = '2'
elif args.chip == 'esp32s3beta3':
image = ESP32S3BETA3FirmwareImage()
elif args.chip == 'esp32s3':
image = ESP32S3FirmwareImage()
if args.secure_pad_v2:
image.secure_pad = '2'
elif args.chip == 'esp32c3':
@ -3568,6 +3740,10 @@ def elf2image(args):
image = ESP32C6BETAFirmwareImage()
if args.secure_pad_v2:
image.secure_pad = '2'
elif args.chip == 'esp32h2':
image = ESP32H2FirmwareImage()
if args.secure_pad_v2:
image.secure_pad = '2'
elif args.version == '1': # ESP8266
image = ESP8266ROMFirmwareImage()
else:
@ -3777,7 +3953,7 @@ def main(argv=None, esp=None):
parser.add_argument('--chip', '-c',
help='Target chip type',
type=lambda c: c.lower().replace('-', ''), # support ESP32-S2, etc.
choices=['auto', 'esp8266', 'esp32', 'esp32s2', 'esp32s3beta2', 'esp32s3beta3', 'esp32c3', 'esp32c6beta'],
choices=['auto', 'esp8266', 'esp32', 'esp32s2', 'esp32s3beta2', 'esp32s3', 'esp32c3', 'esp32c6beta', 'esp32h2'],
default=os.environ.get('ESPTOOL_CHIP', 'auto'))
parser.add_argument(
@ -4074,6 +4250,7 @@ def main(argv=None, esp=None):
esp = esp or get_default_connected_device(ser_list, port=args.port, connect_attempts=args.connect_attempts,
initial_baud=initial_baud, chip=args.chip, trace=args.trace,
before=args.before)
if esp is None:
raise FatalError("Could not connect to an Espressif device on any of the %d available serial ports." % len(ser_list))
@ -4089,6 +4266,9 @@ def main(argv=None, esp=None):
if esp.secure_download_mode:
print("WARNING: Stub loader is not supported in Secure Download Mode, setting --no-stub")
args.no_stub = True
elif esp.stub_is_disabled:
print("WARNING: Stub loader has been disabled for compatibility, setting --no-stub")
args.no_stub = True
else:
esp = esp.run_stub()
@ -4461,43 +4641,43 @@ cnkzhBvw/MrJd2ggRbfkhSoJnzuOLC1/09oUe9xxwq5wQWWQyknHG78iFidT2hfzBAndl/ThGKpiwUqI
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/O3TorqC/3OhVVnmpVVl5p+0HxZXn2XQKDtRfrCpFtXgP2e46tEOP0kX8uGhndrst/8CeNOGkA==\
""")))
ESP32S3BETA3ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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ESP32S3ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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CxdX8t3A5xdQwJ0ffPoM/1zPQS5OWWxgPB+J0SFOlUMyiUzt4JzQx2hp5sM3HIGsjGC6E4CEljKZpf4KFv9AfQFsNoo+2w9A8Ceg7XN1vS2A9Cl29BU2p9hoKhTz1l9YRijmD0UCjzpiXqUZBOsmqCvlzI4CN7w2\
FKnSdxmHI+kXZjm12YbtPogFkpTrmuCittsSFfKAkABJWWW4zwHTAb8rx57dTTjEznkAhDW/jAtD+gkKAVqKDfgknANWoRgCPRDDEA+96vCVCYvMeay+AiV7wuXNEG7A8ysnH6eBFN01L1RJ+NxxZGn5a9em2OP2\
E/aKCyqDVE764Ph9sTiZ0r5YJEjovqSvyVAVC1ZCtDRO5EKVPqxg7NniVBTzlBvQ4an16/9VnnrcWXJQnLYitRuBPR1rhjhnNlJVCKl8z1AWYTvQ+iInx9nbcPZ7OMuubzAHryUnhogWpdP/OlO+km9ilE8hyS6b\
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qhr8tw1XPdzhJ+lCPjy0c5v99l8IC47W\
""")))
ESP32C3ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
eNqVWn1/E8cR/iqObezAL7S70r2tSYxEJGQZTGkKIVDRcLd750ISNRgRTFt99+4zM3t7ki2Z/mFLutvbnZ155pmXvf8cLurLxeHRTnU4nF1qvTu7tMmB/9ebXarMf/q/Ks/9j+QN7k9ml67wl6s8kWtVPvK/i/uz\
@ -4568,6 +4748,40 @@ HcSG6Bmd/lByDmzph2JEhHBK+So5MLWBo2cIBpQHUPGkjzgSKftN760HEYoeZ1R4H0Gfd9MbIEqliEl1
3kOKJG0jtmskBhVbpRimX+ggufbWXPyQtyrTxwfolqeoZFL0y9NZg355enYCl0/vH6CiTh/gMjrm0cu61zEnKjCHf96h1yt/ebcsLvCSpTVZFlubxyZcqRfLi0/t4GAQ5WGwKpaFvo0JXAWHOpTh/irGprEz8ep/\
TB3fMw==\
""")))
ESP32H2ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
eNrFWmt700YW/itpEpKWvc3Iug0tiU3tOE6AZftAKTymRRpJWWib3QQDobv+7zvvuUhyEhu+7Qcn9mg0c+ac97znIv1nf1FfLfbvbZX78ytj51c2fMosfMfHvD6ZX/k8fBvMrwo3v8ppdC8MFo/Dn/SH8CcOQ2n4\
X2+HP17ujunu+VVTvchojcPwxzwM6w8WYRSXm/nl/Ko24Vc0LMc7YYN8l2Uoo9n8qorGD2bb4V6TFGHjKHzC3Dwfhj+D+f78HDtgvfdhhYTWo1kuW4bRsEEdZLYufGnCFR+EL5tsvk9y/fc0zKvC/JLvbZosW3NB\
tx6xauik4VNVGZ2U14PwqegsapUXPkF1Lnz8AP+/X4os+XOccQjhJ90+JvzP3YhVcPum7nApW/MOw54MulP32/rvYQBePex3c2lYLM7GUE+wjxvwusGiwUbOn+rOsHe4qQg3++ZVZlmddsB25uk2Pw6bVNOwth0H\
FFThzlrVEI9xDdbjXcqYTWTMI+ybHELYcV9xltd32J/GwpJZOEad8gQCWcqYwG/nGEs6zouoLp6wCbAl/pfZXquyB2SUUZDbWV7CJFNMxXEKwAmyMcyxSV7LOjnpdDuczEXjFdWKavQoHrochb82gKpOeDS3rJ4c\
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vIgUSdpGbNdIDCo2SjFMv9BBcu2tufgRb1WmT/bQL09RyaTomKezBh3z9OQILp+e7qGiTh/iMnrm0au61zMnKjD7f96i9yt/ebcoLvGWpTVZFlubxyZcqc8Xl5/awcEgysNgVSwKfR0TuAoOtS/D/VWMTWNn4uX/\
AE/V398=\
""")))
def _main():

15
tools/platformio-build-esp32.py
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16
tools/platformio-build-esp32c3.py
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16
tools/platformio-build-esp32s2.py
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tools/sdk/esp32/bin/bootloader_dio_40m.bin
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7
tools/sdk/esp32/include/app_trace/include/esp_app_trace.h
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@ -18,8 +18,11 @@ extern "C" {
* Application trace data destinations bits.
*/
typedef enum {
ESP_APPTRACE_DEST_TRAX = 0x1, ///< JTAG destination
ESP_APPTRACE_DEST_UART0 = 0x2, ///< UART destination
ESP_APPTRACE_DEST_JTAG = 1, ///< JTAG destination
ESP_APPTRACE_DEST_TRAX = ESP_APPTRACE_DEST_JTAG, ///< xxx_TRAX name is obsolete, use more common xxx_JTAG
ESP_APPTRACE_DEST_UART0, ///< UART0 destination
ESP_APPTRACE_DEST_MAX = ESP_APPTRACE_DEST_UART0,
ESP_APPTRACE_DEST_NUM
} esp_apptrace_dest_t;
/**

41
tools/sdk/esp32/include/app_trace/include/esp_app_trace_util.h
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@ -12,6 +12,7 @@ extern "C" {
#include "freertos/FreeRTOS.h"
#include "esp_err.h"
#include "esp_timer.h"
/** Infinite waiting timeout */
#define ESP_APPTRACE_TMO_INFINITE ((uint32_t)-1)
@ -22,9 +23,9 @@ extern "C" {
* periodically to check timeout for expiration.
*/
typedef struct {
uint32_t start; ///< time interval start (in CPU ticks)
uint32_t tmo; ///< timeout value (in us)
uint32_t elapsed; ///< elapsed time (in us)
int64_t start; ///< time interval start (in us)
int64_t tmo; ///< timeout value (in us)
int64_t elapsed; ///< elapsed time (in us)
} esp_apptrace_tmo_t;
/**
@ -35,23 +36,23 @@ typedef struct {
*/
static inline void esp_apptrace_tmo_init(esp_apptrace_tmo_t *tmo, uint32_t user_tmo)
{
tmo->start = portGET_RUN_TIME_COUNTER_VALUE();
tmo->tmo = user_tmo;
tmo->start = esp_timer_get_time();
tmo->tmo = user_tmo == ESP_APPTRACE_TMO_INFINITE ? (int64_t)-1 : (int64_t)user_tmo;
tmo->elapsed = 0;
}
/**
* @brief Checks timeout for expiration.
*
* @param tmo Pointer to timeout structure to be initialized.
* @param tmo Pointer to timeout structure.
*
* @return ESP_OK on success, otherwise \see esp_err_t
* @return number of remaining us till tmo.
*/
esp_err_t esp_apptrace_tmo_check(esp_apptrace_tmo_t *tmo);
static inline uint32_t esp_apptrace_tmo_remaining_us(esp_apptrace_tmo_t *tmo)
{
return tmo->tmo != ESP_APPTRACE_TMO_INFINITE ? (tmo->elapsed - tmo->tmo) : ESP_APPTRACE_TMO_INFINITE;
return tmo->tmo != (int64_t)-1 ? (tmo->elapsed - tmo->tmo) : ESP_APPTRACE_TMO_INFINITE;
}
/** Tracing module synchronization lock */
@ -160,6 +161,30 @@ uint32_t esp_apptrace_rb_read_size_get(esp_apptrace_rb_t *rb);
*/
uint32_t esp_apptrace_rb_write_size_get(esp_apptrace_rb_t *rb);
int esp_apptrace_log_lock(void);
void esp_apptrace_log_unlock(void);
#define ESP_APPTRACE_LOG( format, ... ) \
do { \
esp_apptrace_log_lock(); \
esp_rom_printf(format, ##__VA_ARGS__); \
esp_apptrace_log_unlock(); \
} while(0)
#define ESP_APPTRACE_LOG_LEV( _L_, level, format, ... ) \
do { \
if (LOG_LOCAL_LEVEL >= level) { \
ESP_APPTRACE_LOG(LOG_FORMAT(_L_, format), esp_log_early_timestamp(), TAG, ##__VA_ARGS__); \
} \
} while(0)
#define ESP_APPTRACE_LOGE( format, ... ) ESP_APPTRACE_LOG_LEV(E, ESP_LOG_ERROR, format, ##__VA_ARGS__)
#define ESP_APPTRACE_LOGW( format, ... ) ESP_APPTRACE_LOG_LEV(W, ESP_LOG_WARN, format, ##__VA_ARGS__)
#define ESP_APPTRACE_LOGI( format, ... ) ESP_APPTRACE_LOG_LEV(I, ESP_LOG_INFO, format, ##__VA_ARGS__)
#define ESP_APPTRACE_LOGD( format, ... ) ESP_APPTRACE_LOG_LEV(D, ESP_LOG_DEBUG, format, ##__VA_ARGS__)
#define ESP_APPTRACE_LOGV( format, ... ) ESP_APPTRACE_LOG_LEV(V, ESP_LOG_VERBOSE, format, ##__VA_ARGS__)
#define ESP_APPTRACE_LOGO( format, ... ) ESP_APPTRACE_LOG_LEV(E, ESP_LOG_NONE, format, ##__VA_ARGS__)
#ifdef __cplusplus
}
#endif

4
tools/sdk/esp32/include/app_trace/include/esp_sysview_trace.h
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@ -12,7 +12,7 @@ extern "C" {
#include <stdarg.h>
#include "esp_err.h"
#include "SEGGER_RTT.h" // SEGGER_RTT_ESP32_Flush
#include "SEGGER_RTT.h" // SEGGER_RTT_ESP_Flush
#include "esp_app_trace_util.h" // ESP_APPTRACE_TMO_INFINITE
/**
@ -24,7 +24,7 @@ extern "C" {
*/
static inline esp_err_t esp_sysview_flush(uint32_t tmo)
{
SEGGER_RTT_ESP32_Flush(0, tmo);
SEGGER_RTT_ESP_Flush(0, tmo);
return ESP_OK;
}

2
tools/sdk/esp32/include/bootloader_support/include/bootloader_common.h
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@ -17,6 +17,8 @@
#include "esp32s3/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/rtc.h"
#endif
#ifdef __cplusplus

3
tools/sdk/esp32/include/bootloader_support/include/esp_app_format.h
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@ -15,7 +15,8 @@ typedef enum {
ESP_CHIP_ID_ESP32 = 0x0000, /*!< chip ID: ESP32 */
ESP_CHIP_ID_ESP32S2 = 0x0002, /*!< chip ID: ESP32-S2 */
ESP_CHIP_ID_ESP32C3 = 0x0005, /*!< chip ID: ESP32-C3 */
ESP_CHIP_ID_ESP32S3 = 0x0006, /*!< chip ID: ESP32-S3 */
ESP_CHIP_ID_ESP32S3 = 0x0009, /*!< chip ID: ESP32-S3 */
ESP_CHIP_ID_ESP32H2 = 0x000A, /*!< chip ID: ESP32-H2 */ // ESP32H2-TODO: IDF-3475
ESP_CHIP_ID_INVALID = 0xFFFF /*!< Invalid chip ID (we defined it to make sure the esp_chip_id_t is 2 bytes size) */
} __attribute__((packed)) esp_chip_id_t;

34
tools/sdk/esp32/include/bootloader_support/include/esp_flash_encrypt.h
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@ -14,6 +14,11 @@
#include "soc/efuse_periph.h"
#include "sdkconfig.h"
#ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
#include "esp_efuse.h"
#include "esp_efuse_table.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
@ -43,9 +48,17 @@ static inline /** @cond */ IRAM_ATTR /** @endcond */ bool esp_flash_encryption_e
{
uint32_t flash_crypt_cnt = 0;
#if CONFIG_IDF_TARGET_ESP32
flash_crypt_cnt = REG_GET_FIELD(EFUSE_BLK0_RDATA0_REG, EFUSE_RD_FLASH_CRYPT_CNT);
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
flash_crypt_cnt = REG_GET_FIELD(EFUSE_BLK0_RDATA0_REG, EFUSE_RD_FLASH_CRYPT_CNT);
#else
esp_efuse_read_field_blob(ESP_EFUSE_FLASH_CRYPT_CNT, &flash_crypt_cnt, ESP_EFUSE_FLASH_CRYPT_CNT[0]->bit_count);
#endif
#else
flash_crypt_cnt = REG_GET_FIELD(EFUSE_RD_REPEAT_DATA1_REG, EFUSE_SPI_BOOT_CRYPT_CNT);
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
flash_crypt_cnt = REG_GET_FIELD(EFUSE_RD_REPEAT_DATA1_REG, EFUSE_SPI_BOOT_CRYPT_CNT);
#else
esp_efuse_read_field_blob(ESP_EFUSE_SPI_BOOT_CRYPT_CNT, &flash_crypt_cnt, ESP_EFUSE_SPI_BOOT_CRYPT_CNT[0]->bit_count);
#endif
#endif
/* __builtin_parity is in flash, so we calculate parity inline */
bool enabled = false;
@ -151,6 +164,23 @@ esp_flash_enc_mode_t esp_get_flash_encryption_mode(void);
*/
void esp_flash_encryption_init_checks(void);
/** @brief Set all secure eFuse features related to flash encryption
*
* @return
* - ESP_OK - Successfully
*/
esp_err_t esp_flash_encryption_enable_secure_features(void);
/** @brief Switches Flash Encryption from "Development" to "Release"
*
* If already in "Release" mode, the function will do nothing.
* If flash encryption efuse is not enabled yet then abort.
* It burns:
* - "disable encrypt in dl mode"
* - set FLASH_CRYPT_CNT efuse to max
*/
void esp_flash_encryption_set_release_mode(void);
#ifdef __cplusplus
}
#endif

33
tools/sdk/esp32/include/bootloader_support/include/esp_secure_boot.h
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@ -25,6 +25,9 @@
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/efuse.h"
#include "esp32s3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/efuse.h"
#include "esp32h2/rom/secure_boot.h"
#endif
#ifdef CONFIG_SECURE_BOOT_V1_ENABLED
@ -44,6 +47,11 @@ extern "C" {
#define ESP_SECURE_BOOT_DIGEST_LEN 32
#ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
#include "esp_efuse.h"
#include "esp_efuse_table.h"
#endif
/** @brief Is secure boot currently enabled in hardware?
*
* This means that the ROM bootloader code will only boot
@ -55,12 +63,24 @@ static inline bool esp_secure_boot_enabled(void)
{
#if CONFIG_IDF_TARGET_ESP32
#ifdef CONFIG_SECURE_BOOT_V1_ENABLED
return REG_READ(EFUSE_BLK0_RDATA6_REG) & EFUSE_RD_ABS_DONE_0;
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
return REG_READ(EFUSE_BLK0_RDATA6_REG) & EFUSE_RD_ABS_DONE_0;
#else
return esp_efuse_read_field_bit(ESP_EFUSE_ABS_DONE_0);
#endif
#elif CONFIG_SECURE_BOOT_V2_ENABLED
return ets_use_secure_boot_v2();
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
return ets_use_secure_boot_v2();
#else
return esp_efuse_read_field_bit(ESP_EFUSE_ABS_DONE_1);
#endif
#endif
#else
return esp_rom_efuse_is_secure_boot_enabled();
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
return esp_rom_efuse_is_secure_boot_enabled();
#else
return esp_efuse_read_field_bit(ESP_EFUSE_SECURE_BOOT_EN);
#endif
#endif
return false; /* Secure Boot not enabled in menuconfig */
}
@ -263,6 +283,13 @@ esp_err_t esp_secure_boot_get_signature_blocks_for_running_app(bool digest_publi
#endif // !BOOTLOADER_BUILD && CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME
/** @brief Set all secure eFuse features related to secure_boot
*
* @return
* - ESP_OK - Successfully
*/
esp_err_t esp_secure_boot_enable_secure_features(void);
#ifdef __cplusplus
}
#endif

20
tools/sdk/esp32/include/bt/host/bluedroid/api/include/api/esp_blufi_api.h → tools/sdk/esp32/include/bt/common/api/include/api/esp_blufi_api.h
View File

@ -15,8 +15,6 @@
#ifndef __ESP_BLUFI_API_H__
#define __ESP_BLUFI_API_H__
#include "esp_bt_defs.h"
#include "esp_gatt_defs.h"
#include "esp_err.h"
#include "esp_wifi_types.h"
@ -115,6 +113,11 @@ typedef struct {
int8_t rssi; /**< signal strength of AP */
} esp_blufi_ap_record_t;
/// Bluetooth address length
#define ESP_BD_ADDR_LEN 6
/// Bluetooth device address
typedef uint8_t esp_bd_addr_t[ESP_BD_ADDR_LEN];
/**
* @brief BLUFI callback parameters union
*/
@ -404,19 +407,6 @@ esp_err_t esp_blufi_send_wifi_list(uint16_t apCount, esp_blufi_ap_record_t *list
*/
uint16_t esp_blufi_get_version(void);
/**
* @brief Close a connection a remote device.
*
* @param[in] gatts_if: GATT server access interface
* @param[in] conn_id: connection ID to be closed.
*
* @return
* - ESP_OK : success
* - other : failed
*
*/
esp_err_t esp_blufi_close(esp_gatt_if_t gatts_if, uint16_t conn_id);
/**
*
* @brief This function is called to send blufi error information

202
tools/sdk/esp32/include/bt/common/btc/profile/esp/blufi/include/blufi_int.h Normal file
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@ -0,0 +1,202 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef __BLUFI_INT_H__
#define __BLUFI_INT_H__
#include "btc/btc_task.h"
#include "esp_blufi_api.h"
#if (BLUFI_INCLUDED == TRUE)
#define BTC_BLUFI_GREAT_VER 0x01 //Version + Subversion
#define BTC_BLUFI_SUB_VER 0x02 //Version + Subversion
#define BTC_BLUFI_VERSION ((BTC_BLUFI_GREAT_VER<<8)|BTC_BLUFI_SUB_VER) //Version + Subversion
typedef UINT8 tGATT_IF;
/* service engine control block */
typedef struct {
/* Protocol reference */
tGATT_IF gatt_if;
UINT8 srvc_inst;
UINT16 handle_srvc;
UINT16 handle_char_p2e;
UINT16 handle_char_e2p;
UINT16 handle_descr_e2p;
UINT16 conn_id;
BOOLEAN is_connected;
BD_ADDR remote_bda;
UINT32 trans_id;
UINT8 congest;
UINT16 frag_size;
#define BLUFI_PREPAIR_BUF_MAX_SIZE 1024
uint8_t *prepare_buf;
int prepare_len;
/* Control reference */
esp_blufi_callbacks_t *cbs;
BOOLEAN enabled;
uint8_t send_seq;
uint8_t recv_seq;
uint8_t sec_mode;
uint8_t *aggr_buf;
uint16_t total_len;
uint16_t offset;
} tBLUFI_ENV;
/* BLUFI protocol */
struct blufi_hdr{
uint8_t type;
uint8_t fc;
uint8_t seq;
uint8_t data_len;
uint8_t data[0];
};
typedef struct blufi_hdr blufi_hd_t;
struct blufi_frag_hdr {
uint8_t type;
uint8_t fc;
uint8_t seq;
uint8_t data_len;
uint16_t total_len;
uint8_t content[0];
};
typedef struct blufi_frag_hdr blufi_frag_hdr_t;
#if GATT_DYNAMIC_MEMORY == FALSE
extern tBLUFI_ENV blufi_env;
#else
extern tBLUFI_ENV *blufi_env_ptr;
#define blufi_env (*blufi_env_ptr)
#endif
#define BLUFI_DATA_SEC_MODE_CHECK_MASK 0x01
#define BLUFI_DATA_SEC_MODE_ENC_MASK 0x02
#define BLUFI_CTRL_SEC_MODE_CHECK_MASK 0x10
#define BLUFI_CTRL_SEC_MODE_ENC_MASK 0x20
#define BLUFI_MAX_DATA_LEN 255
// packet type
#define BLUFI_TYPE_MASK 0x03
#define BLUFI_TYPE_SHIFT 0
#define BLUFI_SUBTYPE_MASK 0xFC
#define BLUFI_SUBTYPE_SHIFT 2
#define BLUFI_GET_TYPE(type) ((type) & BLUFI_TYPE_MASK)
#define BLUFI_GET_SUBTYPE(type) (((type) & BLUFI_SUBTYPE_MASK) >>BLUFI_SUBTYPE_SHIFT)
#define BLUFI_BUILD_TYPE(type, subtype) (((type) & BLUFI_TYPE_MASK) | ((subtype)<<BLUFI_SUBTYPE_SHIFT))
#define BLUFI_TYPE_CTRL 0x0
#define BLUFI_TYPE_CTRL_SUBTYPE_ACK 0x00
#define BLUFI_TYPE_CTRL_SUBTYPE_SET_SEC_MODE 0x01
#define BLUFI_TYPE_CTRL_SUBTYPE_SET_WIFI_OPMODE 0x02
#define BLUFI_TYPE_CTRL_SUBTYPE_CONN_TO_AP 0x03
#define BLUFI_TYPE_CTRL_SUBTYPE_DISCONN_FROM_AP 0x04
#define BLUFI_TYPE_CTRL_SUBTYPE_GET_WIFI_STATUS 0x05
#define BLUFI_TYPE_CTRL_SUBTYPE_DEAUTHENTICATE_STA 0x06
#define BLUFI_TYPE_CTRL_SUBTYPE_GET_VERSION 0x07
#define BLUFI_TYPE_CTRL_SUBTYPE_DISCONNECT_BLE 0x08
#define BLUFI_TYPE_CTRL_SUBTYPE_GET_WIFI_LIST 0x09
#define BLUFI_TYPE_DATA 0x1
#define BLUFI_TYPE_DATA_SUBTYPE_NEG 0x00
#define BLUFI_TYPE_DATA_SUBTYPE_STA_BSSID 0x01
#define BLUFI_TYPE_DATA_SUBTYPE_STA_SSID 0x02
#define BLUFI_TYPE_DATA_SUBTYPE_STA_PASSWD 0x03
#define BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_SSID 0x04
#define BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_PASSWD 0x05
#define BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_MAX_CONN_NUM 0x06
#define BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_AUTH_MODE 0x07
#define BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_CHANNEL 0x08
#define BLUFI_TYPE_DATA_SUBTYPE_USERNAME 0x09
#define BLUFI_TYPE_DATA_SUBTYPE_CA 0x0a
#define BLUFI_TYPE_DATA_SUBTYPE_CLIENT_CERT 0x0b
#define BLUFI_TYPE_DATA_SUBTYPE_SERVER_CERT 0x0c
#define BLUFI_TYPE_DATA_SUBTYPE_CLIENT_PRIV_KEY 0x0d
#define BLUFI_TYPE_DATA_SUBTYPE_SERVER_PRIV_KEY 0x0e
#define BLUFI_TYPE_DATA_SUBTYPE_WIFI_REP 0x0f
#define BLUFI_TYPE_DATA_SUBTYPE_REPLY_VERSION 0x10
#define BLUFI_TYPE_DATA_SUBTYPE_WIFI_LIST 0x11
#define BLUFI_TYPE_DATA_SUBTYPE_ERROR_INFO 0x12
#define BLUFI_TYPE_DATA_SUBTYPE_CUSTOM_DATA 0x13
#define BLUFI_TYPE_IS_CTRL(type) (BLUFI_GET_TYPE((type)) == BLUFI_TYPE_CTRL)
#define BLUFI_TYPE_IS_DATA(type) (BLUFI_GET_TYPE((type)) == BLUFI_TYPE_DATA)
#define BLUFI_TYPE_IS_CTRL_ACK(type) (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_ACK)
#define BLUFI_TYPE_IS_CTRL_START_NEG(type) (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_START_NEG)
#define BLUFI_TYPE_IS_CTRL_STOP_NEG(type) (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_STOP_NEG)
#define BLUFI_TYPE_IS_CTRL_SET_WIFI_OPMODE(type) (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_SET_WIFI_OPMODE)
#define BLUFI_TYPE_IS_CTRL_CONN_WIFI(type) (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_CONN_TO_AP)
#define BLUFI_TYPE_IS_CTRL_DISCONN_WIFI(type) (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_DISCONN_FROM_AP)
#define BLUFI_TYPE_IS_CTRL_GET_WIFI_STATUS(type) (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_GET_WIFI_STATUS)
#define BLUFI_TYPE_IS_CTRL_DEAUTHENTICATE_STA(type) (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_DEAUTHENTICATE_STA)
#define BLUFI_TYPE_IS_CTRL_GET_VERSION(type) (BLUFI_TYPE_IS_CTRL((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_CTRL_SUBTYPE_GET_VERSION)
#define BLUFI_TYPE_IS_DATA_NEG(type) (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_NEG)
#define BLUFI_TYPE_IS_DATA_STA_BSSID(type) (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_STA_BSSID)
#define BLUFI_TYPE_IS_DATA_STA_SSID(type) (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_STA_SSID)
#define BLUFI_TYPE_IS_DATA_STA_PASSWD(type) (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_STA_PASSWD)
#define BLUFI_TYPE_IS_DATA_SOFTAP_SSID(type) (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_SSID)
#define BLUFI_TYPE_IS_DATA_SOFTAP_PASSWD(type) (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_PASSWD)
#define BLUFI_TYPE_IS_DATA_SOFTAP_MAX_CONN_NUM(type) (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_MAX_CONN_NUM)
#define BLUFI_TYPE_IS_DATA_SOFTAP_AUTH_MODE(type) (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_AUTH_MODE)
#define BLUFI_TYPE_IS_DATA_SOFTAP_CHANNEL(type) (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_SOFTAP_CHANNEL)
#define BLUFI_TYPE_IS_DATA_USERNAME(type) (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_USERNAME)
#define BLUFI_TYPE_IS_DATA_CA(type) (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_CA)
#define BLUFI_TYPE_IS_DATA_CLEINT_CERT(type) (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_CLIENT_CERT)
#define BLUFI_TYPE_IS_DATA_SERVER_CERT(type) (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_SERVER_CERT)
#define BLUFI_TYPE_IS_DATA_CLIENT_PRIV_KEY(type) (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_CLIENT_PRIV_KEY)
#define BLUFI_TYPE_IS_DATA_SERVER_PRIV_KEY(type) (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_SERVER_PRIV_KEY)
#define BLUFI_TYPE_IS_DATA_ERROR_INFO(type) (BLUFI_TYPE_IS_DATA((type)) && BLUFI_GET_SUBTYPE((type)) == BLUFI_TYPE_DATA_SUBTYPE_ERROR_INFO)
// packet frame control
#define BLUFI_FC_ENC_MASK 0x01
#define BLUFI_FC_CHECK_MASK 0x02
#define BLUFI_FC_DIR_MASK 0x04
#define BLUFI_FC_REQ_ACK_MASK 0x08
#define BLUFI_FC_FRAG_MASK 0x10
#define BLUFI_FC_ENC 0x01
#define BLUFI_FC_CHECK 0x02
#define BLUFI_FC_DIR_P2E 0x00
#define BLUFI_FC_DIR_E2P 0x04
#define BLUFI_FC_REQ_ACK 0x08
#define BLUFI_FC_FRAG 0x10
#define BLUFI_FC_IS_ENC(fc) ((fc) & BLUFI_FC_ENC_MASK)
#define BLUFI_FC_IS_CHECK(fc) ((fc) & BLUFI_FC_CHECK_MASK)
#define BLUFI_FC_IS_DIR_P2E(fc) ((fc) & BLUFI_FC_DIR_P2E_MASK)
#define BLUFI_FC_IS_DIR_E2P(fc) (!((fc) & BLUFI_DIR_P2E_MASK))
#define BLUFI_FC_IS_REQ_ACK(fc) ((fc) & BLUFI_FC_REQ_ACK_MASK)
#define BLUFI_FC_IS_FRAG(fc) ((fc) & BLUFI_FC_FRAG_MASK)
/* default GATT MTU size over LE link
*/
#define GATT_DEF_BLE_MTU_SIZE 23
/* BLUFI HEADER + TOTAL(REMAIN) LENGTH + CRC + L2CAP RESERVED */
#define BLUFI_MTU_RESERVED_SIZE (sizeof(struct blufi_hdr) + 2 + 2 + 3)
#define BLUFI_FRAG_DATA_DEFAULT_LEN (GATT_DEF_BLE_MTU_SIZE - BLUFI_MTU_RESERVED_SIZE)
//function declare
void btc_blufi_protocol_handler(uint8_t type, uint8_t *data, int len);
void btc_blufi_send_encap(uint8_t type, uint8_t *data, int data_len);
void btc_blufi_set_callbacks(esp_blufi_callbacks_t *callbacks);
void btc_blufi_cb_deep_copy(btc_msg_t *msg, void *p_dest, void *p_src);
void btc_blufi_cb_deep_free(btc_msg_t *msg);
#endif /* __BLUFI_INT_H__ */
#endif ///BLUFI_INCLUDED == TRUE

77
tools/sdk/esp32/include/bt/common/btc/profile/esp/blufi/include/esp_blufi.h Normal file
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@ -0,0 +1,77 @@
#ifndef __ESP_BLUFI_H__
#define __ESP_BLUFI_H__
#include "esp_blufi_api.h"
#include "esp_err.h"
#ifdef CONFIG_BT_NIMBLE_ENABLED
#include "nimble/ble.h"
#include "modlog/modlog.h"
#endif
#ifdef CONFIG_BT_BLUEDROID_ENABLED
#include "esp_gap_ble_api.h"
#endif
#define BLUFI_APP_UUID 0xFFFF
#define BLUFI_DEVICE_NAME "BLUFI_DEVICE"
#ifdef CONFIG_BT_NIMBLE_ENABLED
struct ble_hs_cfg;
struct ble_gatt_register_ctxt;
struct gatt_value {
struct os_mbuf *buf;
uint16_t val_handle;
uint8_t type;
void *ptr;
};
#define SERVER_MAX_VALUES 3
#define MAX_VAL_SIZE 512
extern struct gatt_value gatt_values[SERVER_MAX_VALUES];
/* GATT server callback */
void esp_blufi_gatt_svr_register_cb(struct ble_gatt_register_ctxt *ctxt, void *arg);
/* Initialise gatt server */
int esp_blufi_gatt_svr_init(void);
void esp_blufi_btc_init(void);
#endif
#ifdef CONFIG_BT_BLUEDROID_ENABLED
/**
* @brief Close a connection a remote device.
*
* @param[in] gatts_if: GATT server access interface
* @param[in] conn_id: connection ID to be closed.
*
* @return
* - ESP_OK : success
* - other : failed
*
*/
esp_err_t esp_blufi_close(uint8_t gatts_if, uint16_t conn_id);
void esp_blufi_gap_event_handler(esp_gap_ble_cb_event_t event, esp_ble_gap_cb_param_t *param);
#endif
/* Initialise blufi profile */
uint8_t esp_blufi_init(void);
/* start advertising */
void bleprph_advertise(void);
/* send notifications */
void esp_blufi_send_notify(void *arg);
/* Deinitialise blufi */
void esp_blufi_deinit(void);
/* disconnect */
void esp_blufi_disconnect(void);
/* Stop advertisement */
void esp_blufi_adv_stop(void);
/* Start advertisement */
void esp_blufi_adv_start(void);
void esp_blufi_send_encap(void *arg);
#endif/* _ESP_BLUFI_ */

111
tools/sdk/esp32/include/bt/common/btc/profile/esp/include/btc_blufi_prf.h Normal file
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@ -0,0 +1,111 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef __BTC_BLUFI_PRF_H__
#define __BTC_BLUFI_PRF_H__
#include "blufi_int.h"
#include "btc/btc_task.h"
#include "esp_blufi_api.h"
#include "esp_err.h"
#ifdef CONFIG_BT_BLUEDROID_ENABLED
#include "stack/gatt_api.h"
#define ESP_BLUFI_ERROR GATT_ERROR
#define ESP_BLUFI_SUCCESS GATT_SUCCESS
#else
#define ESP_BLUFI_ERROR 0x85
#define ESP_BLUFI_SUCCESS 0x00
#endif
#define BT_BD_ADDR_STR "%02x:%02x:%02x:%02x:%02x:%02x"
#define BT_BD_ADDR_HEX(addr) addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]
#define GATT_UUID_CHAR_CLIENT_CONFIG 0x2902 /* Client Characteristic Configuration */
//define the blufi serivce uuid
#define BLUFI_SERVICE_UUID 0xFFFF
//define the blufi Char uuid (PHONE to ESP32)
#define BLUFI_CHAR_P2E_UUID 0xFF01
//define the blufi Char uuid (ESP32 to PHONE)
#define BLUFI_CHAR_E2P_UUID 0xFF02
//define the blufi Descriptor uuid (ESP32 to PHONE)
#define BLUFI_DESCR_E2P_UUID GATT_UUID_CHAR_CLIENT_CONFIG
//define the blufi APP ID
#define BLUFI_APP_UUID 0xFFFF
#define BLUFI_HDL_NUM 6
struct pkt_info{
uint8_t *pkt;
int pkt_len;
};
static const tBT_UUID blufi_srvc_uuid = {LEN_UUID_16, {BLUFI_SERVICE_UUID}};
static const tBT_UUID blufi_char_uuid_p2e = {LEN_UUID_16, {BLUFI_CHAR_P2E_UUID}};
static const tBT_UUID blufi_char_uuid_e2p = {LEN_UUID_16, {BLUFI_CHAR_E2P_UUID}};
static const tBT_UUID blufi_descr_uuid_e2p = {LEN_UUID_16, {BLUFI_DESCR_E2P_UUID}};
static const tBT_UUID blufi_app_uuid = {LEN_UUID_16, {BLUFI_APP_UUID}};
typedef enum {
BTC_BLUFI_ACT_INIT = 0,
BTC_BLUFI_ACT_DEINIT,
BTC_BLUFI_ACT_SEND_CFG_REPORT,
BTC_BLUFI_ACT_SEND_WIFI_LIST,
BTC_BLUFI_ACT_SEND_ERR_INFO,
BTC_BLUFI_ACT_SEND_CUSTOM_DATA,
} btc_blufi_act_t;
typedef union {
struct blufi_cfg_report {
wifi_mode_t opmode;
esp_blufi_sta_conn_state_t sta_conn_state;
uint8_t softap_conn_num;
esp_blufi_extra_info_t *extra_info;
int extra_info_len;
} wifi_conn_report;
/*
BTC_BLUFI_ACT_SEND_WIFI_LIST
*/
struct blufi_wifi_list {
uint16_t apCount;
esp_blufi_ap_record_t *list;
} wifi_list;
/*
BTC_BLUFI_ACT_SEND_ERR_INFO
*/
struct blufi_error_infor {
esp_blufi_error_state_t state;
} blufi_err_infor;
/*
BTC_BLUFI_ACT_SEND_CUSTOM_DATA
*/
struct blufi_custom_data {
uint8_t *data;
uint32_t data_len;
} custom_data;
} btc_blufi_args_t;
void btc_blufi_cb_to_app(esp_blufi_cb_event_t event, esp_blufi_cb_param_t *param);
void btc_blufi_cb_handler(btc_msg_t *msg);
void btc_blufi_call_handler(btc_msg_t *msg);
void btc_blufi_set_callbacks(esp_blufi_callbacks_t *callbacks);
void btc_blufi_recv_handler(uint8_t *data, int len);
void btc_blufi_send_notify(uint8_t *pkt, int pkt_len);
void btc_blufi_call_deep_copy(btc_msg_t *msg, void *p_dest, void *p_src);
void btc_blufi_call_deep_free(btc_msg_t *msg);
uint16_t btc_blufi_get_version(void);
#endif /* __BTC_BLUFI_PRF_H__ */

32
tools/sdk/esp32/include/config/sdkconfig.h
View File

@ -76,6 +76,7 @@
#define CONFIG_ARDUHAL_PARTITION_SCHEME "default"
#define CONFIG_COMPILER_OPTIMIZATION_PERF 1
#define CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE 1
#define CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL 2
#define CONFIG_COMPILER_HIDE_PATHS_MACROS 1
#define CONFIG_COMPILER_CXX_EXCEPTIONS 1
#define CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE 0
@ -150,7 +151,7 @@
#define CONFIG_BT_SSP_ENABLED 1
#define CONFIG_BT_BLE_ENABLED 1
#define CONFIG_BT_GATTS_ENABLE 1
#define CONFIG_BT_GATT_SR_PROFILES 8
#define CONFIG_BT_GATT_MAX_SR_PROFILES 8
#define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO 1
#define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MODE 0
#define CONFIG_BT_GATTC_ENABLE 1
@ -164,6 +165,7 @@
#define CONFIG_BT_SMP_ENABLE 1
#define CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT 30
#define CONFIG_BT_RESERVE_DRAM 0xdb5c
#define CONFIG_BT_NIMBLE_USE_ESP_TIMER 1
#define CONFIG_COAP_MBEDTLS_PSK 1
#define CONFIG_COAP_LOG_DEFAULT_LEVEL 0
#define CONFIG_ADC_DISABLE_DAC 1
@ -188,6 +190,18 @@
#define CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL 32768
#define CONFIG_SPIRAM_CACHE_WORKAROUND 1
#define CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW 1
#define CONFIG_SPIRAM_CACHE_LIBJMP_IN_IRAM 1
#define CONFIG_SPIRAM_CACHE_LIBMATH_IN_IRAM 1
#define CONFIG_SPIRAM_CACHE_LIBNUMPARSER_IN_IRAM 1
#define CONFIG_SPIRAM_CACHE_LIBIO_IN_IRAM 1
#define CONFIG_SPIRAM_CACHE_LIBTIME_IN_IRAM 1
#define CONFIG_SPIRAM_CACHE_LIBCHAR_IN_IRAM 1
#define CONFIG_SPIRAM_CACHE_LIBMEM_IN_IRAM 1
#define CONFIG_SPIRAM_CACHE_LIBSTR_IN_IRAM 1
#define CONFIG_SPIRAM_CACHE_LIBRAND_IN_IRAM 1
#define CONFIG_SPIRAM_CACHE_LIBENV_IN_IRAM 1
#define CONFIG_SPIRAM_CACHE_LIBFILE_IN_IRAM 1
#define CONFIG_SPIRAM_CACHE_LIBMISC_IN_IRAM 1
#define CONFIG_SPIRAM_BANKSWITCH_ENABLE 1
#define CONFIG_SPIRAM_BANKSWITCH_RESERVE 8
#define CONFIG_D0WD_PSRAM_CLK_IO 17
@ -233,6 +247,7 @@
#define CONFIG_HTTPD_MAX_URI_LEN 512
#define CONFIG_HTTPD_ERR_RESP_NO_DELAY 1
#define CONFIG_HTTPD_PURGE_BUF_LEN 32
#define CONFIG_HTTPD_WS_SUPPORT 1
#define CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA 1
#define CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP 1
#define CONFIG_ESP_MAC_ADDR_UNIVERSE_BT 1
@ -272,6 +287,7 @@
#define CONFIG_ESP_TIMER_TASK_STACK_SIZE 4096
#define CONFIG_ESP_TIMER_INTERRUPT_LEVEL 1
#define CONFIG_ESP_TIMER_IMPL_TG0_LAC 1
#define CONFIG_ESP32_WIFI_ENABLED 1
#define CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE 1
#define CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM 8
#define CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM 32
@ -336,6 +352,8 @@
#define CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE 0
#define CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER 1
#define CONFIG_FREERTOS_DEBUG_OCDAWARE 1
#define CONFIG_HAL_ASSERTION_EQUALS_SYSTEM 1
#define CONFIG_HAL_DEFAULT_ASSERTION_LEVEL 2
#define CONFIG_HEAP_POISONING_LIGHT 1
#define CONFIG_HEAP_TRACING_OFF 1
#define CONFIG_LIBSODIUM_USE_MBEDTLS_SHA 1
@ -358,10 +376,12 @@
#define CONFIG_LWIP_GARP_TMR_INTERVAL 60
#define CONFIG_LWIP_TCPIP_RECVMBOX_SIZE 32
#define CONFIG_LWIP_DHCP_RESTORE_LAST_IP 1
#define CONFIG_LWIP_DHCPS 1
#define CONFIG_LWIP_DHCPS_LEASE_UNIT 60
#define CONFIG_LWIP_DHCPS_MAX_STATION_NUM 8
#define CONFIG_LWIP_IPV6 1
#define CONFIG_LWIP_IPV6_NUM_ADDRESSES 3
#define CONFIG_LWIP_IPV6_RDNSS_MAX_DNS_SERVERS 0
#define CONFIG_LWIP_NETIF_LOOPBACK 1
#define CONFIG_LWIP_LOOPBACK_MAX_PBUFS 8
#define CONFIG_LWIP_MAX_ACTIVE_TCP 16
@ -392,6 +412,7 @@
#define CONFIG_LWIP_PPP_CHAP_SUPPORT 1
#define CONFIG_LWIP_PPP_MSCHAP_SUPPORT 1
#define CONFIG_LWIP_PPP_MPPE_SUPPORT 1
#define CONFIG_LWIP_ICMP 1
#define CONFIG_LWIP_MAX_RAW_PCBS 16
#define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
#define CONFIG_LWIP_SNTP_UPDATE_DELAY 3600000
@ -501,6 +522,7 @@
#define CONFIG_SPIFFS_USE_MAGIC_LENGTH 1
#define CONFIG_SPIFFS_META_LENGTH 4
#define CONFIG_SPIFFS_USE_MTIME 1
#define CONFIG_WS_TRANSPORT 1
#define CONFIG_WS_BUFFER_SIZE 1024
#define CONFIG_UNITY_ENABLE_FLOAT 1
#define CONFIG_UNITY_ENABLE_DOUBLE 1
@ -518,6 +540,7 @@
#define CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT 30
#define CONFIG_WPA_MBEDTLS_CRYPTO 1
#define CONFIG_IO_GLITCH_FILTER_TIME_MS 50
#define CONFIG_DSP_OPTIMIZATIONS_SUPPORTED 1
#define CONFIG_DSP_OPTIMIZED 1
#define CONFIG_DSP_OPTIMIZATION 1
#define CONFIG_DSP_MAX_FFT_SIZE_4096 1
@ -533,8 +556,13 @@
#define CONFIG_OV2640_SUPPORT 1
#define CONFIG_OV3660_SUPPORT 1
#define CONFIG_OV5640_SUPPORT 1
#define CONFIG_GC2145_SUPPORT 1
#define CONFIG_GC032A_SUPPORT 1
#define CONFIG_GC0308_SUPPORT 1
#define CONFIG_SCCB_HARDWARE_I2C_PORT1 1
#define CONFIG_GC_SENSOR_SUBSAMPLE_MODE 1
#define CONFIG_CAMERA_CORE0 1
#define CONFIG_CAMERA_DMA_BUFFER_SIZE_MAX 32768
#define CONFIG_LITTLEFS_MAX_PARTITIONS 3
#define CONFIG_LITTLEFS_PAGE_SIZE 256
#define CONFIG_LITTLEFS_OBJ_NAME_LEN 64
@ -658,5 +686,5 @@
#define CONFIG_ULP_COPROC_ENABLED CONFIG_ESP32_ULP_COPROC_ENABLED
#define CONFIG_ULP_COPROC_RESERVE_MEM CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
#define CONFIG_ARDUINO_IDF_COMMIT ""
#define CONFIG_ARDUINO_IDF_COMMIT "d93887f9f"
#define CONFIG_ARDUINO_IDF_BRANCH "master"

38
tools/sdk/esp32/include/console/esp_console.h
View File

@ -106,6 +106,21 @@ typedef struct {
{ \
}
#if CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
/**
* @brief Parameters for console device: USB-SERIAL-JTAG
*
* @note It's an empty structure for now, reserved for future
*
*/
typedef struct {
} esp_console_dev_usb_serial_jtag_config_t;
#define ESP_CONSOLE_DEV_USB_SERIAL_JTAG_CONFIG_DEFAULT() {}
#endif // CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
/**
* @brief initialize console module
* @param config console configuration
@ -331,6 +346,29 @@ esp_err_t esp_console_new_repl_uart(const esp_console_dev_uart_config_t *dev_con
*/
esp_err_t esp_console_new_repl_usb_cdc(const esp_console_dev_usb_cdc_config_t *dev_config, const esp_console_repl_config_t *repl_config, esp_console_repl_t **ret_repl);
#if CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
/**
* @brief Establish a console REPL (Read-eval-print loop) environment over USB-SERIAL-JTAG
*
* @param[in] dev_config USB-SERIAL-JTAG configuration
* @param[in] repl_config REPL configuration
* @param[out] ret_repl return REPL handle after initialization succeed, return NULL otherwise
*
* @note This is a all-in-one function to establish the environment needed for REPL, includes:
* - Initializes linenoise
* - Spawn new thread to run REPL in the background
*
* @attention This function is meant to be used in the examples to make the code more compact.
* Applications which use console functionality should be based on
* the underlying linenoise and esp_console functions.
*
* @return
* - ESP_OK on success
* - ESP_FAIL Parameter error
*/
esp_err_t esp_console_new_repl_usb_serial_jtag(const esp_console_dev_usb_serial_jtag_config_t *dev_config, const esp_console_repl_config_t *repl_config, esp_console_repl_t **ret_repl);
#endif // CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
/**
* @brief Start REPL environment
* @param[in] repl REPL handle returned from esp_console_new_repl_xxx

1
tools/sdk/esp32/include/console/linenoise/linenoise.h
View File

@ -69,6 +69,7 @@ void linenoiseHistoryFree(void);
void linenoiseClearScreen(void);
void linenoiseSetMultiLine(int ml);
void linenoiseSetDumbMode(int set);
bool linenoiseIsDumbMode(void);
void linenoisePrintKeyCodes(void);
void linenoiseAllowEmpty(bool);

2
tools/sdk/esp32/include/driver/include/driver/adc2_wifi_private.h
View File

@ -35,7 +35,7 @@ esp_err_t adc2_wifi_acquire(void);
*/
esp_err_t adc2_wifi_release(void);
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
/**
* @brief This API help ADC2 calibration constructor be linked.
*

20
tools/sdk/esp32/include/driver/include/driver/adc_common.h
View File

@ -45,7 +45,7 @@ typedef enum {
ADC1_CHANNEL_9, /*!< ADC1 channel 9 is GPIO10 */
ADC1_CHANNEL_MAX,
} adc1_channel_t;
#elif CONFIG_IDF_TARGET_ESP32C3
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
/**** `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
typedef enum {
ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO0 */
@ -72,7 +72,7 @@ typedef enum {
ADC2_CHANNEL_9, /*!< ADC2 channel 9 is GPIO26 (ESP32), GPIO20 (ESP32-S2) */
ADC2_CHANNEL_MAX,
} adc2_channel_t;
#elif CONFIG_IDF_TARGET_ESP32C3
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
/**** `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t` ********/
typedef enum {
ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO5 */
@ -103,7 +103,7 @@ typedef enum {
#define ADC_WIDTH_11Bit ADC_WIDTH_BIT_11
#define ADC_WIDTH_12Bit ADC_WIDTH_BIT_12
#if CONFIG_IDF_TARGET_ESP32C3
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
/**
* @brief Digital ADC DMA read max timeout value, it may make the ``adc_digi_read_bytes`` block forever if the OS supports
*/
@ -121,7 +121,7 @@ typedef enum {
ADC_ENCODE_MAX,
} adc_i2s_encode_t;
#if CONFIG_IDF_TARGET_ESP32C3
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
//This feature is currently supported on ESP32C3, will be supported on other chips soon
/**
* @brief Digital ADC DMA configuration
@ -167,7 +167,7 @@ void adc_power_acquire(void);
*/
void adc_power_release(void);
#if !CONFIG_IDF_TARGET_ESP32C3
#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
/**
* @brief Initialize ADC pad
* @param adc_unit ADC unit index
@ -177,7 +177,7 @@ void adc_power_release(void);
* - ESP_ERR_INVALID_ARG Parameter error
*/
esp_err_t adc_gpio_init(adc_unit_t adc_unit, adc_channel_t channel);
#endif //#if !CONFIG_IDF_TARGET_ESP32C3
#endif //#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
/*---------------------------------------------------------------
ADC Single Read Setting
@ -276,7 +276,7 @@ esp_err_t adc1_config_width(adc_bits_width_t width_bit);
*/
int adc1_get_raw(adc1_channel_t channel);
#if !CONFIG_IDF_TARGET_ESP32C3
#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
/**
* @brief Set ADC data invert
* @param adc_unit ADC unit index
@ -317,7 +317,7 @@ esp_err_t adc_set_data_width(adc_unit_t adc_unit, adc_bits_width_t width_bit);
* to be called to configure ADC1 channels, before ADC1 is used by the ULP.
*/
void adc1_ulp_enable(void);
#endif //#if !CONFIG_IDF_TARGET_ESP32C3
#endif //#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2
/**
* @brief Get the GPIO number of a specific ADC2 channel.
@ -477,7 +477,7 @@ esp_err_t adc_digi_deinit(void);
*/
esp_err_t adc_digi_controller_config(const adc_digi_config_t *config);
#if CONFIG_IDF_TARGET_ESP32C3
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
//This feature is currently supported on ESP32C3, will be supported on other chips soon
/*---------------------------------------------------------------
DMA setting
@ -537,7 +537,7 @@ esp_err_t adc_digi_read_bytes(uint8_t *buf, uint32_t length_max, uint32_t *out_l
*/
esp_err_t adc_digi_deinitialize(void);
#endif //#if CONFIG_IDF_TARGET_ESP32C3
#endif //#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
#ifdef __cplusplus
}

8
tools/sdk/esp32/include/driver/include/driver/dedic_gpio.h
View File

@ -30,10 +30,10 @@ typedef struct {
const int *gpio_array; /*!< Array of GPIO numbers, gpio_array[0] ~ gpio_array[size-1] <=> low_dedic_channel_num ~ high_dedic_channel_num */
size_t array_size; /*!< Number of GPIOs in gpio_array */
struct {
int in_en: 1; /*!< Enable input */
int in_invert: 1; /*!< Invert input signal */
int out_en: 1; /*!< Enable output */
int out_invert: 1; /*!< Invert output signal */
unsigned int in_en: 1; /*!< Enable input */
unsigned int in_invert: 1; /*!< Invert input signal */
unsigned int out_en: 1; /*!< Enable output */
unsigned int out_invert: 1; /*!< Invert output signal */
} flags; /*!< Flags to control specific behaviour of GPIO bundle */
} dedic_gpio_bundle_config_t;

8
tools/sdk/esp32/include/driver/include/driver/gpio.h
View File

@ -5,14 +5,18 @@
*/
#pragma once
#include "sdkconfig.h"
#include "esp_err.h"
#include <stdbool.h>
#include "esp_intr_alloc.h"
#if !CONFIG_IDF_TARGET_LINUX
#include <esp_types.h>
#include <esp_bit_defs.h>
#include "esp_attr.h"
#include "esp_intr_alloc.h"
#include "soc/soc_caps.h"
#include "soc/gpio_periph.h"
#endif // !CONFIG_IDF_TARGET_LINUX
#include "hal/gpio_types.h"
// |================================= WARNING ====================================================== |
@ -29,6 +33,8 @@
#include "esp32c3/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/gpio.h"
#endif
#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS

367
tools/sdk/esp32/include/driver/include/driver/i2c.h
View File

@ -36,6 +36,32 @@ extern "C" {
#define I2C_SCLK_SRC_FLAG_AWARE_DFS (1 << 0) /*!< For REF tick clock, it won't change with APB.*/
#define I2C_SCLK_SRC_FLAG_LIGHT_SLEEP (1 << 1) /*!< For light sleep mode.*/
/**
* @brief Minimum size, in bytes, of the internal private structure used to describe
* I2C commands link.
*/
#define I2C_INTERNAL_STRUCT_SIZE (24)
/**
* @brief The following macro is used to determine the recommended size of the
* buffer to pass to `i2c_cmd_link_create_static()` function.
* It requires one parameter, `TRANSACTIONS`, describing the number of transactions
* intended to be performed on the I2C port.
* For example, if one wants to perform a read on an I2C device register, `TRANSACTIONS`
* must be at least 2, because the commands required are the following:
* - write device register
* - read register content
*
* Signals such as "(repeated) start", "stop", "nack", "ack" shall not be counted.
*/
#define I2C_LINK_RECOMMENDED_SIZE(TRANSACTIONS) (2 * I2C_INTERNAL_STRUCT_SIZE + I2C_INTERNAL_STRUCT_SIZE * \
(5 * TRANSACTIONS)) /* Make the assumption that each transaction
* of the user is surrounded by a "start", device address
* and a "nack/ack" signal. Allocate one more room for
* "stop" signal at the end.
* Allocate 2 more internal struct size for headers.
*/
/**
* @brief I2C initialization parameters
*/
@ -62,18 +88,14 @@ typedef struct{
typedef void *i2c_cmd_handle_t; /*!< I2C command handle */
/**
* @brief I2C driver install
* @brief Install an I2C driver
*
* @param i2c_num I2C port number
* @param mode I2C mode( master or slave )
* @param slv_rx_buf_len receiving buffer size for slave mode
* @note
* Only slave mode will use this value, driver will ignore this value in master mode.
* @param slv_tx_buf_len sending buffer size for slave mode
* @note
* Only slave mode will use this value, driver will ignore this value in master mode.
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
* @param mode I2C mode (either master or slave)
* @param slv_rx_buf_len Receiving buffer size. Only slave mode will use this value, it is ignored in master mode.
* @param slv_tx_buf_len Sending buffer size. Only slave mode will use this value, it is ignored in master mode.
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values.
* See esp_intr_alloc.h for more info.
* @note
* In master mode, if the cache is likely to be disabled(such as write flash) and the slave is time-sensitive,
* `ESP_INTR_FLAG_IRAM` is suggested to be used. In this case, please use the memory allocated from internal RAM in i2c read and write function,
@ -82,17 +104,17 @@ typedef void *i2c_cmd_handle_t; /*!< I2C command handle */
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_FAIL Driver install error
* - ESP_FAIL Driver installation error
*/
esp_err_t i2c_driver_install(i2c_port_t i2c_num, i2c_mode_t mode, size_t slv_rx_buf_len, size_t slv_tx_buf_len, int intr_alloc_flags);
/**
* @brief I2C driver delete
* @brief Delete I2C driver
*
* @note This function does not guarantee thread safety.
* Please make sure that no thread will continuously hold semaphores before calling the delete function.
*
* @param i2c_num I2C port number
* @param i2c_num I2C port to delete
*
* @return
* - ESP_OK Success
@ -101,10 +123,10 @@ esp_err_t i2c_driver_install(i2c_port_t i2c_num, i2c_mode_t mode, size_t slv_rx_
esp_err_t i2c_driver_delete(i2c_port_t i2c_num);
/**
* @brief I2C parameter initialization
* @brief Configure an I2C bus with the given configuration.
*
* @param i2c_num I2C port number
* @param i2c_conf pointer to I2C parameter settings
* @param i2c_num I2C port to configure
* @param i2c_conf Pointer to the I2C configuration
*
* @return
* - ESP_OK Success
@ -135,14 +157,14 @@ esp_err_t i2c_reset_tx_fifo(i2c_port_t i2c_num);
esp_err_t i2c_reset_rx_fifo(i2c_port_t i2c_num);
/**
* @brief I2C isr handler register
* @brief Register an I2C ISR handler.
*
* @param i2c_num I2C port number
* @param fn isr handler function
* @param arg parameter for isr handler function
* @param i2c_num I2C port number to attach handler to
* @param fn ISR handler function
* @param arg Parameter for the ISR handler
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
* @param handle handle return from esp_intr_alloc.
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
* @param handle Handle return from esp_intr_alloc.
*
* @return
* - ESP_OK Success
@ -151,9 +173,9 @@ esp_err_t i2c_reset_rx_fifo(i2c_port_t i2c_num);
esp_err_t i2c_isr_register(i2c_port_t i2c_num, void (*fn)(void *), void *arg, int intr_alloc_flags, intr_handle_t *handle);
/**
* @brief to delete and free I2C isr.
* @brief Delete and free I2C ISR handle.
*
* @param handle handle of isr.
* @param handle Handle of isr to delete.
*
* @return
* - ESP_OK Success
@ -162,13 +184,13 @@ esp_err_t i2c_isr_register(i2c_port_t i2c_num, void (*fn)(void *), void *arg, in
esp_err_t i2c_isr_free(intr_handle_t handle);
/**
* @brief Configure GPIO signal for I2C sck and sda
* @brief Configure GPIO pins for I2C SCK and SDA signals.
*
* @param i2c_num I2C port number
* @param sda_io_num GPIO number for I2C sda signal
* @param scl_io_num GPIO number for I2C scl signal
* @param sda_pullup_en Whether to enable the internal pullup for sda pin
* @param scl_pullup_en Whether to enable the internal pullup for scl pin
* @param sda_io_num GPIO number for I2C SDA signal
* @param scl_io_num GPIO number for I2C SCL signal
* @param sda_pullup_en Enable the internal pullup for SDA pin
* @param scl_pullup_en Enable the internal pullup for SCL pin
* @param mode I2C mode
*
* @return
@ -179,191 +201,289 @@ esp_err_t i2c_set_pin(i2c_port_t i2c_num, int sda_io_num, int scl_io_num,
bool sda_pullup_en, bool scl_pullup_en, i2c_mode_t mode);
/**
* @brief Create and init I2C command link
* @note
* Before we build I2C command link, we need to call i2c_cmd_link_create() to create
* a command link.
* After we finish sending the commands, we need to call i2c_cmd_link_delete() to
* release and return the resources.
* @brief Perform a write to a device connected to a particular I2C port.
* This function is a wrapper to `i2c_master_start()`, `i2c_master_write()`, `i2c_master_read()`, etc...
* It shall only be called in I2C master mode.
*
* @return i2c command link handler
* @param i2c_num I2C port number to perform the transfer on
* @param device_address I2C device's 7-bit address
* @param write_buffer Bytes to send on the bus
* @param write_size Size, in bytes, of the write buffer
* @param ticks_to_wait Maximum ticks to wait before issuing a timeout.
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_FAIL Sending command error, slave hasn't ACK the transfer.
* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
*/
esp_err_t i2c_master_write_to_device(i2c_port_t i2c_num, uint8_t device_address,
const uint8_t* write_buffer, size_t write_size,
TickType_t ticks_to_wait);
/**
* @brief Perform a read to a device connected to a particular I2C port.
* This function is a wrapper to `i2c_master_start()`, `i2c_master_write()`, `i2c_master_read()`, etc...
* It shall only be called in I2C master mode.
*
* @param i2c_num I2C port number to perform the transfer on
* @param device_address I2C device's 7-bit address
* @param read_buffer Buffer to store the bytes received on the bus
* @param read_size Size, in bytes, of the read buffer
* @param ticks_to_wait Maximum ticks to wait before issuing a timeout.
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_FAIL Sending command error, slave hasn't ACK the transfer.
* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
*/
esp_err_t i2c_master_read_from_device(i2c_port_t i2c_num, uint8_t device_address,
uint8_t* read_buffer, size_t read_size,
TickType_t ticks_to_wait);
/**
* @brief Perform a write followed by a read to a device on the I2C bus.
* A repeated start signal is used between the `write` and `read`, thus, the bus is
* not released until the two transactions are finished.
* This function is a wrapper to `i2c_master_start()`, `i2c_master_write()`, `i2c_master_read()`, etc...
* It shall only be called in I2C master mode.
*
* @param i2c_num I2C port number to perform the transfer on
* @param device_address I2C device's 7-bit address
* @param write_buffer Bytes to send on the bus
* @param write_size Size, in bytes, of the write buffer
* @param read_buffer Buffer to store the bytes received on the bus
* @param read_size Size, in bytes, of the read buffer
* @param ticks_to_wait Maximum ticks to wait before issuing a timeout.
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_FAIL Sending command error, slave hasn't ACK the transfer.
* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
*/
esp_err_t i2c_master_write_read_device(i2c_port_t i2c_num, uint8_t device_address,
const uint8_t* write_buffer, size_t write_size,
uint8_t* read_buffer, size_t read_size,
TickType_t ticks_to_wait);
/**
* @brief Create and initialize an I2C commands list with a given buffer.
* All the allocations for data or signals (START, STOP, ACK, ...) will be
* performed within this buffer.
* This buffer must be valid during the whole transaction.
* After finishing the I2C transactions, it is required to call `i2c_cmd_link_delete_static()`.
*
* @note It is **highly** advised to not allocate this buffer on the stack. The size of the data
* used underneath may increase in the future, resulting in a possible stack overflow as the macro
* `I2C_LINK_RECOMMENDED_SIZE` would also return a bigger value.
* A better option is to use a buffer allocated statically or dynamically (with `malloc`).
*
* @param buffer Buffer to use for commands allocations
* @param size Size in bytes of the buffer
*
* @return Handle to the I2C command link or NULL if the buffer provided is too small, please
* use `I2C_LINK_RECOMMENDED_SIZE` macro to get the recommended size for the buffer.
*/
i2c_cmd_handle_t i2c_cmd_link_create_static(uint8_t* buffer, uint32_t size);
/**
* @brief Create and initialize an I2C commands list with a given buffer.
* After finishing the I2C transactions, it is required to call `i2c_cmd_link_delete()`
* to release and return the resources.
* The required bytes will be dynamically allocated.
*
* @return Handle to the I2C command link
*/
i2c_cmd_handle_t i2c_cmd_link_create(void);
/**
* @brief Free I2C command link
* @note
* Before we build I2C command link, we need to call i2c_cmd_link_create() to create
* a command link.
* After we finish sending the commands, we need to call i2c_cmd_link_delete() to
* release and return the resources.
* @brief Free the I2C commands list allocated statically with `i2c_cmd_link_create_static`.
*
* @param cmd_handle I2C command handle
* @param cmd_handle I2C commands list allocated statically. This handle should be created thanks to
* `i2c_cmd_link_create_static()` function
*/
void i2c_cmd_link_delete_static(i2c_cmd_handle_t cmd_handle);
/**
* @brief Free the I2C commands list
*
* @param cmd_handle I2C commands list. This handle should be created thanks to
* `i2c_cmd_link_create()` function
*/
void i2c_cmd_link_delete(i2c_cmd_handle_t cmd_handle);
/**
* @brief Queue command for I2C master to generate a start signal
* @note
* Only call this function in I2C master mode
* Call i2c_master_cmd_begin() to send all queued commands
* @brief Queue a "START signal" to the given commands list.
* This function shall only be called in I2C master mode.
* Call `i2c_master_cmd_begin()` to send all the queued commands.
*
* @param cmd_handle I2C cmd link
* @param cmd_handle I2C commands list
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_ERR_NO_MEM The static buffer used to create `cmd_handler` is too small
* - ESP_FAIL No more memory left on the heap
*/
esp_err_t i2c_master_start(i2c_cmd_handle_t cmd_handle);
/**
* @brief Queue command for I2C master to write one byte to I2C bus
* @note
* Only call this function in I2C master mode
* Call i2c_master_cmd_begin() to send all queued commands
* @brief Queue a "write byte" command to the commands list.
* A single byte will be sent on the I2C port. This function shall only be
* called in I2C master mode.
* Call `i2c_master_cmd_begin()` to send all queued commands
*
* @param cmd_handle I2C cmd link
* @param data I2C one byte command to write to bus
* @param ack_en enable ack check for master
* @param cmd_handle I2C commands list
* @param data Byte to send on the port
* @param ack_en Enable ACK signal
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_ERR_NO_MEM The static buffer used to create `cmd_handler` is too small
* - ESP_FAIL No more memory left on the heap
*/
esp_err_t i2c_master_write_byte(i2c_cmd_handle_t cmd_handle, uint8_t data, bool ack_en);
/**
* @brief Queue command for I2C master to write buffer to I2C bus
* @note
* Only call this function in I2C master mode
* Call i2c_master_cmd_begin() to send all queued commands
* @brief Queue a "write (multiple) bytes" command to the commands list.
* This function shall only be called in I2C master mode.
* Call `i2c_master_cmd_begin()` to send all queued commands
*
* @param cmd_handle I2C cmd link
* @param data data to send
* @note
* If the psram is enabled and intr_flag is `ESP_INTR_FLAG_IRAM`, please use the memory allocated from internal RAM.
* @param data_len data length
* @param ack_en enable ack check for master
* @param cmd_handle I2C commands list
* @param data Bytes to send. This buffer shall remain **valid** until the transaction is finished.
* If the PSRAM is enabled and `intr_flag` is set to `ESP_INTR_FLAG_IRAM`,
* `data` should be allocated from internal RAM.
* @param data_len Length, in bytes, of the data buffer
* @param ack_en Enable ACK signal
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_ERR_NO_MEM The static buffer used to create `cmd_handler` is too small
* - ESP_FAIL No more memory left on the heap
*/
esp_err_t i2c_master_write(i2c_cmd_handle_t cmd_handle, const uint8_t *data, size_t data_len, bool ack_en);
/**
* @brief Queue command for I2C master to read one byte from I2C bus
* @note
* Only call this function in I2C master mode
* Call i2c_master_cmd_begin() to send all queued commands
* @brief Queue a "read byte" command to the commands list.
* A single byte will be read on the I2C bus. This function shall only be
* called in I2C master mode.
* Call `i2c_master_cmd_begin()` to send all queued commands
*
* @param cmd_handle I2C cmd link
* @param data pointer accept the data byte
* @note
* If the psram is enabled and intr_flag is `ESP_INTR_FLAG_IRAM`, please use the memory allocated from internal RAM.
* @param ack ack value for read command
* @param cmd_handle I2C commands list
* @param data Pointer where the received byte will the stored. This buffer shall remain **valid**
* until the transaction is finished.
* @param ack ACK signal
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_ERR_NO_MEM The static buffer used to create `cmd_handler` is too small
* - ESP_FAIL No more memory left on the heap
*/
esp_err_t i2c_master_read_byte(i2c_cmd_handle_t cmd_handle, uint8_t *data, i2c_ack_type_t ack);
/**
* @brief Queue command for I2C master to read data from I2C bus
* @note
* Only call this function in I2C master mode
* Call i2c_master_cmd_begin() to send all queued commands
* @brief Queue a "read (multiple) bytes" command to the commands list.
* Multiple bytes will be read on the I2C bus. This function shall only be
* called in I2C master mode.
* Call `i2c_master_cmd_begin()` to send all queued commands
*
* @param cmd_handle I2C cmd link
* @param data data buffer to accept the data from bus
* @note
* If the psram is enabled and intr_flag is `ESP_INTR_FLAG_IRAM`, please use the memory allocated from internal RAM.
* @param data_len read data length
* @param ack ack value for read command
* @param cmd_handle I2C commands list
* @param data Pointer where the received bytes will the stored. This buffer shall remain **valid**
* until the transaction is finished.
* @param data_len Size, in bytes, of the `data` buffer
* @param ack ACK signal
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_ERR_NO_MEM The static buffer used to create `cmd_handler` is too small
* - ESP_FAIL No more memory left on the heap
*/
esp_err_t i2c_master_read(i2c_cmd_handle_t cmd_handle, uint8_t *data, size_t data_len, i2c_ack_type_t ack);
/**
* @brief Queue command for I2C master to generate a stop signal
* @note
* Only call this function in I2C master mode
* Call i2c_master_cmd_begin() to send all queued commands
* @brief Queue a "STOP signal" to the given commands list.
* This function shall only be called in I2C master mode.
* Call `i2c_master_cmd_begin()` to send all the queued commands.
*
* @param cmd_handle I2C cmd link
* @param cmd_handle I2C commands list
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_ERR_NO_MEM The static buffer used to create `cmd_handler` is too small
* - ESP_FAIL No more memory left on the heap
*/
esp_err_t i2c_master_stop(i2c_cmd_handle_t cmd_handle);
/**
* @brief I2C master send queued commands.
* This function will trigger sending all queued commands.
* @brief Send all the queued commands on the I2C bus, in master mode.
* The task will be blocked until all the commands have been sent out.
* The I2C APIs are not thread-safe, if you want to use one I2C port in different tasks,
* you need to take care of the multi-thread issue.
* @note
* Only call this function in I2C master mode
* This function shall only be called in I2C master mode.
*
* @param i2c_num I2C port number
* @param cmd_handle I2C command handler
* @param ticks_to_wait maximum wait ticks.
* @param cmd_handle I2C commands list
* @param ticks_to_wait Maximum ticks to wait before issuing a timeout.
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_FAIL Sending command error, slave doesn't ACK the transfer.
* - ESP_FAIL Sending command error, slave hasn't ACK the transfer.
* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
*/
esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle, TickType_t ticks_to_wait);
/**
* @brief I2C slave write data to internal ringbuffer, when tx fifo empty, isr will fill the hardware
* fifo from the internal ringbuffer
* @note
* Only call this function in I2C slave mode
* @brief Write bytes to internal ringbuffer of the I2C slave data. When the TX fifo empty, the ISR will
* fill the hardware FIFO with the internal ringbuffer's data.
* @note This function shall only be called in I2C slave mode.
*
* @param i2c_num I2C port number
* @param data data pointer to write into internal buffer
* @param size data size
* @param ticks_to_wait Maximum waiting ticks
* @param data Bytes to write into internal buffer
* @param size Size, in bytes, of `data` buffer
* @param ticks_to_wait Maximum ticks to wait.
*
* @return
* - ESP_FAIL(-1) Parameter error
* - Others(>=0) The number of data bytes that pushed to the I2C slave buffer.
* - ESP_FAIL (-1) Parameter error
* - Other (>=0) The number of data bytes pushed to the I2C slave buffer.
*/
int i2c_slave_write_buffer(i2c_port_t i2c_num, const uint8_t *data, int size, TickType_t ticks_to_wait);
/**
* @brief I2C slave read data from internal buffer. When I2C slave receive data, isr will copy received data
* from hardware rx fifo to internal ringbuffer. Then users can read from internal ringbuffer.
* @note
* Only call this function in I2C slave mode
* @brief Read bytes from I2C internal buffer. When the I2C bus receives data, the ISR will copy them
* from the hardware RX FIFO to the internal ringbuffer.
* Calling this function will then copy bytes from the internal ringbuffer to the `data` user buffer.
* @note This function shall only be called in I2C slave mode.
*
* @param i2c_num I2C port number
* @param data data pointer to accept data from internal buffer
* @param max_size Maximum data size to read
* @param data Buffer to fill with ringbuffer's bytes
* @param max_size Maximum bytes to read
* @param ticks_to_wait Maximum waiting ticks
*
* @return
* - ESP_FAIL(-1) Parameter error
* - Others(>=0) The number of data bytes that read from I2C slave buffer.
* - Others(>=0) The number of data bytes read from I2C slave buffer.
*/
int i2c_slave_read_buffer(i2c_port_t i2c_num, uint8_t *data, size_t max_size, TickType_t ticks_to_wait);
/**
* @brief set I2C master clock period
* @brief Set I2C master clock period
*
* @param i2c_num I2C port number
* @param high_period clock cycle number during SCL is high level, high_period is a 14 bit value
* @param low_period clock cycle number during SCL is low level, low_period is a 14 bit value
* @param high_period Clock cycle number during SCL is high level, high_period is a 14 bit value
* @param low_period Clock cycle number during SCL is low level, low_period is a 14 bit value
*
* @return
* - ESP_OK Success
@ -372,7 +492,7 @@ int i2c_slave_read_buffer(i2c_port_t i2c_num, uint8_t *data, size_t max_size, Ti
esp_err_t i2c_set_period(i2c_port_t i2c_num, int high_period, int low_period);
/**
* @brief get I2C master clock period
* @brief Get I2C master clock period
*
* @param i2c_num I2C port number
* @param high_period pointer to get clock cycle number during SCL is high level, will get a 14 bit value
@ -385,15 +505,14 @@ esp_err_t i2c_set_period(i2c_port_t i2c_num, int high_period, int low_period);
esp_err_t i2c_get_period(i2c_port_t i2c_num, int *high_period, int *low_period);
/**
* @brief enable hardware filter on I2C bus
* @brief Enable hardware filter on I2C bus
* Sometimes the I2C bus is disturbed by high frequency noise(about 20ns), or the rising edge of
* the SCL clock is very slow, these may cause the master state machine broken. enable hardware
* filter can filter out high frequency interference and make the master more stable.
* @note
* Enable filter will slow the SCL clock.
* the SCL clock is very slow, these may cause the master state machine to break.
* Enable hardware filter can filter out high frequency interference and make the master more stable.
* @note Enable filter will slow down the SCL clock.
*
* @param i2c_num I2C port number
* @param cyc_num the APB cycles need to be filtered(0<= cyc_num <=7).
* @param i2c_num I2C port number to filter
* @param cyc_num the APB cycles need to be filtered (0<= cyc_num <=7).
* When the period of a pulse is less than cyc_num * APB_cycle, the I2C controller will ignore this pulse.
*
* @return
@ -403,7 +522,7 @@ esp_err_t i2c_get_period(i2c_port_t i2c_num, int *high_period, int *low_period);
esp_err_t i2c_filter_enable(i2c_port_t i2c_num, uint8_t cyc_num);
/**
* @brief disable filter on I2C bus
* @brief Disable filter on I2C bus
*
* @param i2c_num I2C port number
*

70
tools/sdk/esp32/include/driver/include/driver/mcpwm.h
View File

@ -8,7 +8,6 @@
#include "soc/soc_caps.h"
#if SOC_MCPWM_SUPPORTED
#include "esp_err.h"
#include "soc/soc.h"
#include "driver/gpio.h"
@ -20,7 +19,6 @@
extern "C" {
#endif
/**
* @brief IO signals for the MCPWM
*
@ -130,6 +128,15 @@ typedef enum {
MCPWM_SELECT_F2, /*!<Select F2 as input*/
} mcpwm_fault_signal_t;
/**
* @brief MCPWM select sync signal input
*/
typedef enum {
MCPWM_SELECT_SYNC0 = 4, /*!<Select SYNC0 as input*/
MCPWM_SELECT_SYNC1, /*!<Select SYNC1 as input*/
MCPWM_SELECT_SYNC2, /*!<Select SYNC2 as input*/
} mcpwm_sync_signal_t;
/**
* @brief MCPWM select triggering level of fault signal
*/
@ -138,6 +145,62 @@ typedef enum {
MCPWM_HIGH_LEVEL_TGR, /*!<Fault condition occurs when fault input signal goes low to high*/
} mcpwm_fault_input_level_t;
/**
* @brief MCPWM select capture starts from which edge
*/
typedef enum {
MCPWM_NEG_EDGE = BIT(0), /*!<Capture the negative edge*/
MCPWM_POS_EDGE = BIT(1), /*!<Capture the positive edge*/
MCPWM_BOTH_EDGE = BIT(1) | BIT(0), /*!<Capture both edges*/
} mcpwm_capture_on_edge_t;
/**
* @brief Select type of MCPWM counter
*/
typedef enum {
MCPWM_FREEZE_COUNTER, /*!<Counter freeze */
MCPWM_UP_COUNTER, /*!<For asymmetric MCPWM*/
MCPWM_DOWN_COUNTER, /*!<For asymmetric MCPWM*/
MCPWM_UP_DOWN_COUNTER, /*!<For symmetric MCPWM, frequency is half of MCPWM frequency set*/
MCPWM_COUNTER_MAX, /*!<Maximum counter mode*/
} mcpwm_counter_type_t;
/**
* @brief Select type of MCPWM duty cycle mode
*/
typedef enum {
MCPWM_DUTY_MODE_0 = 0, /*!<Active high duty, i.e. duty cycle proportional to high time for asymmetric MCPWM*/
MCPWM_DUTY_MODE_1, /*!<Active low duty, i.e. duty cycle proportional to low time for asymmetric MCPWM, out of phase(inverted) MCPWM*/
MCPWM_HAL_GENERATOR_MODE_FORCE_LOW,
MCPWM_HAL_GENERATOR_MODE_FORCE_HIGH,
MCPWM_DUTY_MODE_MAX, /*!<Num of duty cycle modes*/
} mcpwm_duty_type_t;
/**
* @brief MCPWM deadtime types, used to generate deadtime, RED refers to rising edge delay and FED refers to falling edge delay
*/
typedef enum {
MCPWM_DEADTIME_BYPASS = 0, /*!<Bypass the deadtime*/
MCPWM_BYPASS_RED, /*!<MCPWMXA = no change, MCPWMXB = falling edge delay*/
MCPWM_BYPASS_FED, /*!<MCPWMXA = rising edge delay, MCPWMXB = no change*/
MCPWM_ACTIVE_HIGH_MODE, /*!<MCPWMXA = rising edge delay, MCPWMXB = falling edge delay*/
MCPWM_ACTIVE_LOW_MODE, /*!<MCPWMXA = compliment of rising edge delay, MCPWMXB = compliment of falling edge delay*/
MCPWM_ACTIVE_HIGH_COMPLIMENT_MODE, /*!<MCPWMXA = rising edge delay, MCPWMXB = compliment of falling edge delay*/
MCPWM_ACTIVE_LOW_COMPLIMENT_MODE, /*!<MCPWMXA = compliment of rising edge delay, MCPWMXB = falling edge delay*/
MCPWM_ACTIVE_RED_FED_FROM_PWMXA, /*!<MCPWMXA = MCPWMXB = rising edge delay as well as falling edge delay, generated from MCPWMXA*/
MCPWM_ACTIVE_RED_FED_FROM_PWMXB, /*!<MCPWMXA = MCPWMXB = rising edge delay as well as falling edge delay, generated from MCPWMXB*/
MCPWM_DEADTIME_TYPE_MAX,
} mcpwm_deadtime_type_t;
/**
* @brief MCPWM select action to be taken on the output when event happens
*/
typedef enum {
MCPWM_ACTION_NO_CHANGE = 0, /*!<No change in the output*/
MCPWM_ACTION_FORCE_LOW, /*!<Make output low*/
MCPWM_ACTION_FORCE_HIGH, /*!<Make output high*/
MCPWM_ACTION_TOGGLE, /*!<Make output toggle*/
} mcpwm_output_action_t;
/// @deprecated MCPWM select action to be taken on MCPWMXA when fault occurs
typedef mcpwm_output_action_t mcpwm_action_on_pwmxa_t;
@ -556,6 +619,9 @@ esp_err_t mcpwm_fault_deinit(mcpwm_unit_t mcpwm_num, mcpwm_fault_signal_t fault_
/**
* @brief Initialize capture submodule
*
* @note Enabling capture feature could also enable the capture interrupt,
* users have to register an interrupt handler by `mcpwm_isr_register`, and in there, query the capture data.
*
* @param mcpwm_num set MCPWM unit(0-1)
* @param cap_edge set capture edge, BIT(0) - negative edge, BIT(1) - positive edge
* @param cap_sig capture pin, which needs to be enabled

27
tools/sdk/esp32/include/driver/include/driver/sdio_slave.h
View File

@ -4,8 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _DRIVER_SDIO_SLAVE_H_
#define _DRIVER_SDIO_SLAVE_H_
#pragma once
#include "freertos/FreeRTOS.h"
#include "esp_err.h"
@ -132,6 +131,28 @@ esp_err_t sdio_slave_recv_unregister_buf(sdio_slave_buf_handle_t handle);
*/
esp_err_t sdio_slave_recv_load_buf(sdio_slave_buf_handle_t handle);
/** Get buffer of received data if exist with packet information. The driver returns the ownership of the buffer to the app.
*
* When you see return value is ``ESP_ERR_NOT_FINISHED``, you should call this API iteratively until the return value is ``ESP_OK``.
* All the continuous buffers returned with ``ESP_ERR_NOT_FINISHED``, together with the last buffer returned with ``ESP_OK``, belong to one packet from the host.
*
* You can call simpler ``sdio_slave_recv`` instead, if the host never send data longer than the Receiving buffer size,
* or you don't care about the packet boundary (e.g. the data is only a byte stream).
*
* @param handle_ret Handle of the buffer holding received data. Use this handle in ``sdio_slave_recv_load_buf()`` to receive in the same buffer again.
* @param wait Time to wait before data received.
*
* @note Call ``sdio_slave_load_buf`` with the handle to re-load the buffer onto the link list, and receive with the same buffer again.
* The address and length of the buffer got here is the same as got from `sdio_slave_get_buffer`.
*
* @return
* - ESP_ERR_INVALID_ARG if handle_ret is NULL
* - ESP_ERR_TIMEOUT if timeout before receiving new data
* - ESP_ERR_NOT_FINISHED if returned buffer is not the end of a packet from the host, should call this API again until the end of a packet
* - ESP_OK if success
*/
esp_err_t sdio_slave_recv_packet(sdio_slave_buf_handle_t* handle_ret, TickType_t wait);
/** Get received data if exist. The driver returns the ownership of the buffer to the app.
*
* @param handle_ret Handle to the buffer holding received data. Use this handle in ``sdio_slave_recv_load_buf`` to receive in the same buffer again.
@ -265,5 +286,3 @@ esp_err_t sdio_slave_wait_int(int pos, TickType_t wait);
#ifdef __cplusplus
}
#endif
#endif /*_DRIVER_SDIO_SLAVE_H */

2
tools/sdk/esp32/include/driver/include/driver/spi_common.h
View File

@ -9,8 +9,10 @@
#include <stdint.h>
#include <stdbool.h>
#include "esp_err.h"
#ifndef SPI_MOCK
#include "soc/lldesc.h"
#include "soc/spi_periph.h"
#endif
#include "hal/spi_types.h"
#include "sdkconfig.h"

93
tools/sdk/esp32/include/driver/include/driver/usb_serial_jtag.h Normal file
View File

@ -0,0 +1,93 @@
// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include "esp_err.h"
#include "freertos/FreeRTOS.h"
#include "freertos/semphr.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Configuration structure for the usb-serial-jtag-driver. Can be expanded in the future
*
* @note tx_buffer_size and rx_buffer_size must be > 0
*/
typedef struct {
uint32_t tx_buffer_size; /* Size of the buffer (in bytes) for the TX direction */
uint32_t rx_buffer_size; /* Size of the buffer (in bytes) for the RX direction */
} usb_serial_jtag_driver_config_t;
#define USB_SERIAL_JTAG_DRIVER_CONFIG_DEFAULT() (usb_serial_jtag_driver_config_t) {\
.rx_buffer_size = 256,\
.tx_buffer_size = 256,\
}
/**
* @brief Install USB-SERIAL-JTAG driver and set the USB-SERIAL-JTAG to the default configuration.
*
* USB-SERIAL-JTAG driver's ISR will be attached to the same CPU core that calls this function. Thus, users
* should ensure that the same core is used when calling `usb_serial_jtag_driver_uninstall()`.
*
* @note Blocking mode will result in usb_serial_jtag_write_bytes() blocking until all bytes have been written to the TX FIFO.
*
* @param usb_serial_jtag_driver_config_t Configuration for usb_serial_jtag driver.
*
* @return
* - ESP_OK Success
* - ESP_FAIL Failed for some reason.
*/
esp_err_t usb_serial_jtag_driver_install(usb_serial_jtag_driver_config_t *usb_serial_jtag_config);
/**
* @brief USB_SERIAL_JTAG read bytes from USB_SERIAL_JTAG buffer
*
* @param buf pointer to the buffer.
* @param length data length
* @param ticks_to_wait Timeout in RTOS ticks
*
* @return
* - The number of bytes read from USB_SERIAL FIFO
*/
int usb_serial_jtag_read_bytes(void* buf, uint32_t length, TickType_t ticks_to_wait);
/**
* @brief Send data to the USB-UART port from a given buffer and length,
*
* Please ensure the `tx_buffer_size is larger than 0`, if the 'tx_buffer_size' > 0, this function will return after copying all the data to tx ring buffer,
* USB_SERIAL_JTAG ISR will then move data from the ring buffer to TX FIFO gradually.
*
* @param src data buffer address
* @param size data length to send
* @param ticks_to_wait Timeout in RTOS ticks
*
* @return
* - The number of bytes pushed to the TX FIFO
*/
int usb_serial_jtag_write_bytes(const void* src, size_t size, TickType_t ticks_to_wait);
/**
* @brief Uninstall USB-SERIAL-JTAG driver.
*
* @return
* - ESP_OK Success
*/
esp_err_t usb_serial_jtag_driver_uninstall(void);
#ifdef __cplusplus
}
#endif

68
tools/sdk/esp32/include/efuse/esp32/include/esp_efuse.h
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@ -6,6 +6,9 @@
#pragma once
#include <esp_types.h>
#include <esp_err.h>
#ifdef __cplusplus
extern "C" {
#endif
@ -40,6 +43,71 @@ typedef enum {
EFUSE_CODING_SCHEME_REPEAT = 2, /**< Repeat coding */
} esp_efuse_coding_scheme_t;
/**
* @brief Type of key purpose (virtual because ESP32 has only fixed purposes for blocks)
*/
typedef enum {
ESP_EFUSE_KEY_PURPOSE_USER = 0, /**< BLOCK3 */
ESP_EFUSE_KEY_PURPOSE_SYSTEM = 1, /**< BLOCK0 */
ESP_EFUSE_KEY_PURPOSE_FLASH_ENCRYPTION = 2, /**< BLOCK1 */
ESP_EFUSE_KEY_PURPOSE_SECURE_BOOT_V2 = 3, /**< BLOCK2 */
ESP_EFUSE_KEY_PURPOSE_MAX, /**< MAX PURPOSE*/
} esp_efuse_purpose_t;
/**
* @brief Permanently update values written to the efuse write registers
*
* After updating EFUSE_BLKx_WDATAx_REG registers with new values to
* write, call this function to permanently write them to efuse.
*
* @note Setting bits in efuse is permanent, they cannot be unset.
*
* @note Due to this restriction you don't need to copy values to
* Efuse write registers from the matching read registers, bits which
* are set in the read register but unset in the matching write
* register will be unchanged when new values are burned.
*
* @note This function is not threadsafe, if calling code updates
* efuse values from multiple tasks then this is caller's
* responsibility to serialise.
*
* @deprecated Use the batch mode instead of directly call the burn command.
*
* After burning new efuses, the read registers are updated to match
* the new efuse values.
*/
void esp_efuse_burn_new_values(void) __attribute__ ((deprecated));
/* @brief Write random data to efuse key block write registers
*
* @note Caller is responsible for ensuring efuse
* block is empty and not write protected, before calling.
*
* @note Behaviour depends on coding scheme: a 256-bit key is
* generated and written for Coding Scheme "None", a 192-bit key
* is generated, extended to 256-bits by the Coding Scheme,
* and then writtten for 3/4 Coding Scheme.
*
* @note This function does not burn the new values, caller should
* call esp_efuse_burn_new_values() when ready to do this.
*
* @deprecated Use the code below instead of this function:
*
* @code{c}
* uint32_t key[8];
* size_t key_size = 256;
* if (coding_scheme == EFUSE_CODING_SCHEME_3_4) {
* key_size = 192;
* }
* bootloader_fill_random(key, key_size / 8);
* esp_efuse_write_block(EFUSE_BLK1, key, 0, key_size);
* @endcode
*
* @param blk_wdata0_reg Address of the first data write register
* in the block
*/
void esp_efuse_write_random_key(uint32_t blk_wdata0_reg) __attribute__ ((deprecated));
#ifdef __cplusplus
}

170
tools/sdk/esp32/include/efuse/include/esp_efuse.h
View File

@ -17,12 +17,25 @@ extern "C" {
#include "sdkconfig.h"
#include_next "esp_efuse.h"
#if CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/secure_boot.h"
#endif
#define ESP_ERR_EFUSE 0x1600 /*!< Base error code for efuse api. */
#define ESP_OK_EFUSE_CNT (ESP_ERR_EFUSE + 0x01) /*!< OK the required number of bits is set. */
#define ESP_ERR_EFUSE_CNT_IS_FULL (ESP_ERR_EFUSE + 0x02) /*!< Error field is full. */
#define ESP_ERR_EFUSE_REPEATED_PROG (ESP_ERR_EFUSE + 0x03) /*!< Error repeated programming of programmed bits is strictly forbidden. */
#define ESP_ERR_CODING (ESP_ERR_EFUSE + 0x04) /*!< Error while a encoding operation. */
#define ESP_ERR_NOT_ENOUGH_UNUSED_KEY_BLOCKS (ESP_ERR_EFUSE + 0x05) /*!< Error not enough unused key blocks available */
#define ESP_ERR_DAMAGED_READING (ESP_ERR_EFUSE + 0x06) /*!< Error. Burn or reset was done during a reading operation leads to damage read data. This error is internal to the efuse component and not returned by any public API. */
/**
* @brief Type definition for an eFuse field
@ -275,27 +288,6 @@ uint8_t esp_efuse_get_chip_ver(void);
*/
uint32_t esp_efuse_get_pkg_ver(void);
/**
* @brief Permanently update values written to the efuse write registers
*
* After updating EFUSE_BLKx_WDATAx_REG registers with new values to
* write, call this function to permanently write them to efuse.
*
* @note Setting bits in efuse is permanent, they cannot be unset.
*
* @note Due to this restriction you don't need to copy values to
* Efuse write registers from the matching read registers, bits which
* are set in the read register but unset in the matching write
* register will be unchanged when new values are burned.
*
* @note This function is not threadsafe, if calling code updates
* efuse values from multiple tasks then this is caller's
* responsibility to serialise.
*
* After burning new efuses, the read registers are updated to match
* the new efuse values.
*/
void esp_efuse_burn_new_values(void);
/**
* @brief Reset efuse write registers
@ -374,24 +366,6 @@ esp_err_t esp_efuse_set_rom_log_scheme(esp_efuse_rom_log_scheme_t log_scheme);
esp_err_t esp_efuse_enable_rom_secure_download_mode(void);
#endif
/**
* @brief Write random data to efuse key block write registers
*
* @note Caller is responsible for ensuring efuse
* block is empty and not write protected, before calling.
*
* @note Behaviour depends on coding scheme: a 256-bit key is
* generated and written for Coding Scheme "None", a 192-bit key
* is generated, extended to 256-bits by the Coding Scheme,
* and then writtten for 3/4 Coding Scheme.
*
* @note This function does not burn the new values, caller should
* call esp_efuse_burn_new_values() when ready to do this.
*
* @param blk_wdata0_reg Address of the first data write register
* in the block
*/
void esp_efuse_write_random_key(uint32_t blk_wdata0_reg);
/**
* @brief Return secure_version from efuse field.
@ -422,16 +396,28 @@ bool esp_efuse_check_secure_version(uint32_t secure_version);
*/
esp_err_t esp_efuse_update_secure_version(uint32_t secure_version);
#if defined(BOOTLOADER_BUILD) && defined(CONFIG_EFUSE_VIRTUAL) && !defined(CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH)
/**
* @brief Initializes eFuses API to keep eFuses in RAM.
*
* This function just copies all eFuses to RAM. IDF eFuse APIs perform all operators with RAM instead of real eFuse.
* (Used only in bootloader).
*/
void esp_efuse_init_virtual_mode_in_ram(void);
#endif
#ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
/**
* @brief Initializes variables: offset and size to simulate the work of an eFuse.
*
* Note: To simulate the work of an eFuse need to set CONFIG_BOOTLOADER_EFUSE_SECURE_VERSION_EMULATE option
* Note: To simulate the work of an eFuse need to set CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH option
* and to add in the partition.csv file a line `efuse_em, data, efuse, , 0x2000,`.
*
* @param[in] offset The starting address of the partition where the eFuse data will be located.
* @param[in] size The size of the partition.
*/
void esp_efuse_init(uint32_t offset, uint32_t size);
void esp_efuse_init_virtual_mode_in_flash(uint32_t offset, uint32_t size);
#endif
/**
* @brief Set the batch mode of writing fields.
@ -573,28 +559,44 @@ esp_err_t esp_efuse_set_key_dis_write(esp_efuse_block_t block);
*/
bool esp_efuse_key_block_unused(esp_efuse_block_t block);
#ifndef CONFIG_IDF_TARGET_ESP32
/**
* @brief Find a key block with the particular purpose set.
*
* @param[in] purpose Purpose to search for.
* @param[out] block Pointer in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX which will be set to the key block if found.
* Can be NULL, if only need to test the key block exists.
*
* @return
* - True: If found,
* - False: If not found (value at block pointer is unchanged).
*/
bool esp_efuse_find_purpose(esp_efuse_purpose_t purpose, esp_efuse_block_t *block);
/**
* @brief Type of key purpose
* @brief Returns a write protection of the key purpose field for an efuse key block.
*
* @param[in] block A key block in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX
*
* @note For ESP32: no keypurpose, it returns always True.
*
* @return True: The key purpose is write protected.
* False: The key purpose is writeable.
*/
typedef enum {
ESP_EFUSE_KEY_PURPOSE_USER = 0,
ESP_EFUSE_KEY_PURPOSE_RESERVED = 1,
ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 = 2,
ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 = 3,
ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY = 4,
ESP_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL = 5,
ESP_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG = 6,
ESP_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE = 7,
ESP_EFUSE_KEY_PURPOSE_HMAC_UP = 8,
ESP_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0 = 9,
ESP_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1 = 10,
ESP_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2 = 11,
ESP_EFUSE_KEY_PURPOSE_MAX,
} esp_efuse_purpose_t;
bool esp_efuse_get_keypurpose_dis_write(esp_efuse_block_t block);
/**
* @brief Returns the current purpose set for an efuse key block.
*
* @param[in] block A key block in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX
*
* @return
* - Value: If Successful, it returns the value of the purpose related to the given key block.
* - ESP_EFUSE_KEY_PURPOSE_MAX: Otherwise.
*/
esp_efuse_purpose_t esp_efuse_get_key_purpose(esp_efuse_block_t block);
#ifndef CONFIG_IDF_TARGET_ESP32
/**
* @brief Returns a pointer to a key purpose for an efuse key block.
*
@ -615,17 +617,6 @@ const esp_efuse_desc_t **esp_efuse_get_purpose_field(esp_efuse_block_t block);
*/
const esp_efuse_desc_t** esp_efuse_get_key(esp_efuse_block_t block);
/**
* @brief Returns the current purpose set for an efuse key block.
*
* @param[in] block A key block in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX
*
* @return
* - Value: If Successful, it returns the value of the purpose related to the given key block.
* - ESP_EFUSE_KEY_PURPOSE_MAX: Otherwise.
*/
esp_efuse_purpose_t esp_efuse_get_key_purpose(esp_efuse_block_t block);
/**
* @brief Sets a key purpose for an efuse key block.
*
@ -640,16 +631,6 @@ esp_efuse_purpose_t esp_efuse_get_key_purpose(esp_efuse_block_t block);
*/
esp_err_t esp_efuse_set_key_purpose(esp_efuse_block_t block, esp_efuse_purpose_t purpose);
/**
* @brief Returns a write protection of the key purpose field for an efuse key block.
*
* @param[in] block A key block in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX
*
* @return True: The key purpose is write protected.
* False: The key purpose is writeable.
*/
bool esp_efuse_get_keypurpose_dis_write(esp_efuse_block_t block);
/**
* @brief Sets a write protection of the key purpose field for an efuse key block.
*
@ -663,19 +644,6 @@ bool esp_efuse_get_keypurpose_dis_write(esp_efuse_block_t block);
*/
esp_err_t esp_efuse_set_keypurpose_dis_write(esp_efuse_block_t block);
/**
* @brief Find a key block with the particular purpose set.
*
* @param[in] purpose Purpose to search for.
* @param[out] block Pointer in the range EFUSE_BLK_KEY0..EFUSE_BLK_KEY_MAX which will be set to the key block if found.
* Can be NULL, if only need to test the key block exists.
*
* @return
* - True: If found,
* - False: If not found (value at block pointer is unchanged).
*/
bool esp_efuse_find_purpose(esp_efuse_purpose_t purpose, esp_efuse_block_t *block);
/**
* @brief Search for an unused key block and return the first one found.
*
@ -737,6 +705,8 @@ bool esp_efuse_get_write_protect_of_digest_revoke(unsigned num_digest);
*/
esp_err_t esp_efuse_set_write_protect_of_digest_revoke(unsigned num_digest);
#endif // not CONFIG_IDF_TARGET_ESP32
/**
* @brief Program a block of key data to an efuse block
*
@ -773,9 +743,21 @@ esp_err_t esp_efuse_write_key(esp_efuse_block_t block, esp_efuse_purpose_t purpo
* - ESP_ERR_EFUSE_REPEATED_PROG: Error repeated programming of programmed bits is strictly forbidden.
* - ESP_ERR_CODING: Error range of data does not match the coding scheme.
*/
esp_err_t esp_efuse_write_keys(esp_efuse_purpose_t purposes[], uint8_t keys[][32], unsigned number_of_keys);
esp_err_t esp_efuse_write_keys(const esp_efuse_purpose_t purposes[], uint8_t keys[][32], unsigned number_of_keys);
#endif // not CONFIG_IDF_TARGET_ESP32
#if CONFIG_ESP32_REV_MIN_3 || !CONFIG_IDF_TARGET_ESP32
/**
* @brief Read key digests from efuse. Any revoked/missing digests will be marked as NULL
*
* @param[out] trusted_keys The number of digest in range 0..2
*
* @return
* - ESP_OK: Successful.
* - ESP_FAIL: If trusted_keys is NULL or there is no valid digest.
*/
esp_err_t esp_secure_boot_read_key_digests(ets_secure_boot_key_digests_t *trusted_keys);
#endif
#ifdef __cplusplus
}

10
tools/sdk/esp32/include/esp-dsp/modules/common/include/dsp_common.h
View File

@ -17,7 +17,8 @@
#include <stdint.h>
#include <stdbool.h>
#include "dsp_err.h"
#include "esp_idf_version.h"
#include "soc/cpu.h"
#ifdef __cplusplus
extern "C"
@ -50,4 +51,11 @@ int dsp_power_of_two(int x);
}
#endif
// esp_cpu_get_ccount function is implemented in IDF 4.1 and later
#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0)
#define dsp_get_cpu_cycle_count esp_cpu_get_ccount
#else
#define dsp_get_cpu_cycle_count xthal_get_ccount
#endif
#endif // _dsp_common_H_

8
tools/sdk/esp32/include/esp-dsp/modules/common/include/dsp_tests.h
View File

@ -15,6 +15,9 @@
#ifndef _DSP_TESTS_H_
#define _DSP_TESTS_H_
#include <stdlib.h>
#include "esp_idf_version.h"
#define TEST_ASSERT_EXEC_IN_RANGE(min_exec, max_exec, actual) \
if (actual >= max_exec) { \
ESP_LOGE("", "Time error. Expected max: %i, reached: %i", (int)max_exec, (int)actual);\
@ -26,4 +29,9 @@
}
// memalign function is implemented in IDF 4.3 and later
#if ESP_IDF_VERSION <= ESP_IDF_VERSION_VAL(4, 3, 0)
#define memalign(align_, size_) malloc(size_)
#endif
#endif // _DSP_TESTS_H_

39
tools/sdk/esp32/include/esp-dsp/modules/common/include/dsp_types.h Normal file
View File

@ -0,0 +1,39 @@
#ifndef _dsp_types_H_
#define _dsp_types_H_
#include <stdint.h>
#include <stdbool.h>
// union to simplify access to the 16 bit data
typedef union sc16_u
{
struct
{
int16_t re;
int16_t im;
};
uint32_t data;
}sc16_t;
typedef union fc32_u
{
struct
{
float re;
float im;
};
uint64_t data;
}fc32_t;
typedef struct image2d_s
{
void* data; // could be int8_t, unt8_t, int16_t, unt16_t, float
int step_x; // step of elements by X
int step_y; // step of elements by Y, usually is 1
int stride_x; // stride width: size of the elements in X axis * by step_x + padding
int stride_y; // stride height: size of the elements in Y axis * by step_y + padding
// Point[x,y] = data[width*y*step_y + x*step_x];
// Full data size = width*height
} image2d_t;
#endif // _dsp_types_H_

3
tools/sdk/esp32/include/esp-dsp/modules/common/include/esp_dsp.h
View File

@ -49,6 +49,9 @@ extern "C"
// Support functions
#include "dsps_view.h"
// Image processing functions:
#include "dspi_dotprod.h"
#ifdef __cplusplus
}

4
tools/sdk/esp32/include/esp-dsp/modules/conv/include/dsps_conv_platform.h
View File

@ -1,6 +1,9 @@
#ifndef _dsps_conv_platform_H_
#define _dsps_conv_platform_H_
#include "sdkconfig.h"
#ifdef __XTENSA__
#include <xtensa/config/core-isa.h>
#include <xtensa/config/core-matmap.h>
@ -12,5 +15,6 @@
#define dsps_corr_f32_ae32_enabled 1
#endif
#endif // __XTENSA__
#endif // _dsps_conv_platform_H_

171
tools/sdk/esp32/include/esp-dsp/modules/dotprod/include/dspi_dotprod.h Normal file
View File

@ -0,0 +1,171 @@
// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _dspi_dotprod_H_
#define _dspi_dotprod_H_
#include "esp_log.h"
#include "dsp_err.h"
#include "dsp_types.h"
#include "dspi_dotprod_platform.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**@{*/
/**
* @brief dot product of two images
* Dot product calculation for two floating point images: *out_value += image[i*...] * src2[i*...]); i= [0..count_x*count_y)
* The extension (_ansi) use ANSI C and could be compiled and run on any platform.
* The extension (_ae32) is optimized for ESP32 chip.
*
* @param[in] in_image descriptor of the image
* @param[in] filter descriptor of the filter
* @param[out] out_value pointer to the output value
* @param[in] count_x amount of samples by X axis (count_x*step_X <= widdth)
* @param[in] count_y amount of samples by Y axis (count_y*step_Y <= height)
* @return
* - ESP_OK on success
* - One of the error codes from DSP library
*/
esp_err_t dspi_dotprod_f32_ansi(image2d_t* in_image, image2d_t* filter, float *out_value, int count_x, int count_y);
/**@}*/
/**@{*/
/**
* @brief dot product of two images
* Dot product calculation for two floating point images: *out_value += image[i*...] * src2[i*...]); i= [0..count_x*count_y)
* The extension (_ansi) use ANSI C and could be compiled and run on any platform.
* The extension (_ae32) is optimized for ESP32 chip.
*
* @param[in] in_image descriptor of the image
* @param[in] filter descriptor of the filter
* @param[out] out_value pointer to the output value
* @param[in] count_x amount of samples by X axis (count_x*step_X <= widdth)
* @param[in] count_y amount of samples by Y axis (count_y*step_Y <= height)
* @param[in] shift - result shift to right, by default must be 15 for int16_t or 7 for int8_t
* @return
* - ESP_OK on success
* - One of the error codes from DSP library
*/
esp_err_t dspi_dotprod_s16_ansi(image2d_t* in_image, image2d_t* filter, int16_t *out_value, int count_x, int count_y, int shift);
esp_err_t dspi_dotprod_u16_ansi(image2d_t* in_image, image2d_t* filter, uint16_t *out_value, int count_x, int count_y, int shift);
esp_err_t dspi_dotprod_s8_ansi(image2d_t* in_image, image2d_t* filter, int8_t *out_value, int count_x, int count_y, int shift);
esp_err_t dspi_dotprod_u8_ansi(image2d_t* in_image, image2d_t* filter, uint8_t *out_value, int count_x, int count_y, int shift);
esp_err_t dspi_dotprod_s16_aes3(image2d_t* in_image, image2d_t* filter, int16_t *out_value, int count_x, int count_y, int shift);
esp_err_t dspi_dotprod_u16_aes3(image2d_t* in_image, image2d_t* filter, uint16_t *out_value, int count_x, int count_y, int shift);
esp_err_t dspi_dotprod_s8_aes3(image2d_t* in_image, image2d_t* filter, int8_t *out_value, int count_x, int count_y, int shift);
esp_err_t dspi_dotprod_u8_aes3(image2d_t* in_image, image2d_t* filter, uint8_t *out_value, int count_x, int count_y, int shift);
/**@}*/
/**@{*/
/**
* @brief dot product of two images with input offset
* Dot product calculation for two floating point images: *out_value += (image[i*...] + offset) * src2[i*...]); i= [0..count_x*count_y)
* The extension (_ansi) use ANSI C and could be compiled and run on any platform.
* The extension (_ae32) is optimized for ESP32 chip.
*
* @param[in] in_image descriptor of the image
* @param[in] filter descriptor of the filter
* @param[out] out_value pointer to the output value
* @param[in] count_x amount of samples by X axis (count_x*step_X <= widdth)
* @param[in] count_y amount of samples by Y axis (count_y*step_Y <= height)
* @param[in] offset - input offset value.
* @return
* - ESP_OK on success
* - One of the error codes from DSP library
*/
esp_err_t dspi_dotprod_off_f32_ansi(image2d_t* in_image, image2d_t* filter, float *out_value, int count_x, int count_y, float offset);
/**@}*/
/**@{*/
/**
* @brief dot product of two images with input offset
* Dot product calculation for two floating point images: *out_value += (image[i*...] + offset) * src2[i*...]); i= [0..count_x*count_y)
* The extension (_ansi) use ANSI C and could be compiled and run on any platform.
* The extension (_ae32) is optimized for ESP32 chip.
*
* @param[in] in_image descriptor of the image
* @param[in] filter descriptor of the filter
* @param[out] out_value pointer to the output value
* @param[in] count_x amount of samples by X axis (count_x*step_X <= widdth)
* @param[in] count_y amount of samples by Y axis (count_y*step_Y <= height)
* @param[in] shift - result shift to right, by default must be 15 for int16_t or 7 for int8_t
* @param[in] offset - input offset value.
* @return
* - ESP_OK on success
* - One of the error codes from DSP library
*/
esp_err_t dspi_dotprod_off_s16_ansi(image2d_t* in_image, image2d_t* filter, int16_t *out_value, int count_x, int count_y, int shift, int16_t offset);
esp_err_t dspi_dotprod_off_u16_ansi(image2d_t* in_image, image2d_t* filter, uint16_t *out_value, int count_x, int count_y, int shift, uint16_t offset);
esp_err_t dspi_dotprod_off_s8_ansi(image2d_t* in_image, image2d_t* filter, int8_t *out_value, int count_x, int count_y, int shift, int8_t offset);
esp_err_t dspi_dotprod_off_u8_ansi(image2d_t* in_image, image2d_t* filter, uint8_t *out_value, int count_x, int count_y, int shift, uint8_t offset);
esp_err_t dspi_dotprod_off_s16_aes3(image2d_t* in_image, image2d_t* filter, int16_t *out_value, int count_x, int count_y, int shift, int16_t offset);
esp_err_t dspi_dotprod_off_u16_aes3(image2d_t* in_image, image2d_t* filter, uint16_t *out_value, int count_x, int count_y, int shift, uint16_t offset);
esp_err_t dspi_dotprod_off_s8_aes3(image2d_t* in_image, image2d_t* filter, int8_t *out_value, int count_x, int count_y, int shift, int8_t offset);
esp_err_t dspi_dotprod_off_u8_aes3(image2d_t* in_image, image2d_t* filter, uint8_t *out_value, int count_x, int count_y, int shift, uint8_t offset);
/**@}*/
#ifdef __cplusplus
}
#endif
#ifdef CONFIG_DSP_OPTIMIZED
#define dspi_dotprod_f32 dspi_dotprod_f32_ansi
#define dspi_dotprod_off_f32 dspi_dotprod_off_f32_ansi
#if (dspi_dotprod_aes3_enabled == 1)
#define dspi_dotprod_s16 dspi_dotprod_s16_aes3
#define dspi_dotprod_u16 dspi_dotprod_u16_aes3
#define dspi_dotprod_s8 dspi_dotprod_s8_aes3
#define dspi_dotprod_u8 dspi_dotprod_u8_aes3
#define dspi_dotprod_off_s16 dspi_dotprod_off_s16_aes3
#define dspi_dotprod_off_s8 dspi_dotprod_off_s8_aes3
#define dspi_dotprod_off_u16 dspi_dotprod_off_u16_aes3
#define dspi_dotprod_off_u8 dspi_dotprod_off_u8_aes3
#else
#define dspi_dotprod_s16 dspi_dotprod_s16_ansi
#define dspi_dotprod_s8 dspi_dotprod_s8_ansi
#define dspi_dotprod_u16 dspi_dotprod_u16_ansi
#define dspi_dotprod_u8 dspi_dotprod_u8_ansi
#define dspi_dotprod_off_s16 dspi_dotprod_off_s16_ansi
#define dspi_dotprod_off_s8 dspi_dotprod_off_s8_ansi
#define dspi_dotprod_off_u16 dspi_dotprod_off_u16_ansi
#define dspi_dotprod_off_u8 dspi_dotprod_off_u8_ansi
#endif
#endif
#ifdef CONFIG_DSP_ANSI
#define dspi_dotprod_f32 dspi_dotprod_f32_ansi
#define dspi_dotprod_off_f32 dspi_dotprod_off_f32_ansi
#define dspi_dotprod_s16 dspi_dotprod_s16_ansi
#define dspi_dotprod_s8 dspi_dotprod_s8_ansi
#define dspi_dotprod_off_s16 dspi_dotprod_off_s16_ansi
#define dspi_dotprod_off_s8 dspi_dotprod_off_s8_ansi
#define dspi_dotprod_u16 dspi_dotprod_u16_ansi
#define dspi_dotprod_u8 dspi_dotprod_u8_ansi
#define dspi_dotprod_off_u16 dspi_dotprod_off_u16_ansi
#define dspi_dotprod_off_u8 dspi_dotprod_off_u8_ansi
#endif
#endif // _dspi_dotprod_H_

16
tools/sdk/esp32/include/esp-dsp/modules/dotprod/include/dspi_dotprod_platform.h Normal file
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@ -0,0 +1,16 @@
#ifndef _dspi_dotprod_platform_H_
#define _dspi_dotprod_platform_H_
#include "sdkconfig.h"
#ifdef __XTENSA__
#include <xtensa/config/core-isa.h>
#include <xtensa/config/core-matmap.h>
#if CONFIG_IDF_TARGET_ESP32S3
#define dspi_dotprod_aes3_enabled 1
#endif
#endif // __XTENSA__
#endif // _dspi_dotprod_platform_H_

15
tools/sdk/esp32/include/esp-dsp/modules/dotprod/include/dsps_dotprod.h
View File

@ -64,6 +64,7 @@ esp_err_t dsps_dotprod_s16_ae32(const int16_t *src1, const int16_t *src2, int16_
*/
esp_err_t dsps_dotprod_f32_ansi(const float *src1, const float *src2, float *dest, int len);
esp_err_t dsps_dotprod_f32_ae32(const float *src1, const float *src2, float *dest, int len);
esp_err_t dsps_dotprod_f32_aes3(const float *src1, const float *src2, float *dest, int len);
/**@}*/
/**@{*/
@ -92,21 +93,23 @@ esp_err_t dsps_dotprode_f32_ae32(const float *src1, const float *src2, float *de
#endif
#if CONFIG_DSP_OPTIMIZED
#if (dsps_dotprod_s16_ae32_enabled == 1)
#define dsps_dotprod_s16 dsps_dotprod_s16_ae32
#else
#define dsps_dotprod_s16 dsps_dotprod_s16_ansi
#endif // dsps_dotprod_s16_ae32_enabled
#if (dsps_dotprod_f32_ae32_enabled == 1)
#if (dsps_dotprod_f32_aes3_enabled == 1)
#define dsps_dotprod_f32 dsps_dotprod_f32_aes3
#define dsps_dotprode_f32 dsps_dotprode_f32_ae32
#elif (dotprod_f32_ae32_enabled == 1)
#define dsps_dotprod_f32 dsps_dotprod_f32_ae32
#else
#define dsps_dotprod_f32 dsps_dotprod_f32_ansi
#endif // dsps_dotprod_f32_ae32_enabled
#if (dsps_dotprode_f32_ae32_enabled == 1)
#define dsps_dotprode_f32 dsps_dotprode_f32_ae32
#else
#define dsps_dotprod_f32 dsps_dotprod_f32_ansi
#define dsps_dotprode_f32 dsps_dotprode_f32_ansi
#endif // dsps_dotprode_f32_ae32_enabled
#endif // dsps_dotprod_f32_ae32_enabled
#else // CONFIG_DSP_OPTIMIZED
#define dsps_dotprod_s16 dsps_dotprod_s16_ansi

11
tools/sdk/esp32/include/esp-dsp/modules/dotprod/include/dsps_dotprod_platform.h
View File

@ -1,6 +1,9 @@
#ifndef _dsps_dotprod_platform_H_
#define _dsps_dotprod_platform_H_
#include "sdkconfig.h"
#ifdef __XTENSA__
#include <xtensa/config/core-isa.h>
#include <xtensa/config/core-matmap.h>
@ -17,5 +20,13 @@
#define dsps_dotprod_s16_ae32_enabled 1
#endif //
#endif // __XTENSA__
#if CONFIG_IDF_TARGET_ESP32S3
#define dsps_dotprod_s16_aes3_enabled 1
#define dsps_dotprod_f32_aes3_enabled 1
#endif
#endif // _dsps_dotprod_platform_H_

20
tools/sdk/esp32/include/esp-dsp/modules/fft/include/dsps_fft2r.h
View File

@ -18,6 +18,7 @@
#include "dsp_err.h"
#include "sdkconfig.h"
#include "dsps_fft_tables.h"
#include "dsps_fft2r_platform.h"
#ifndef CONFIG_DSP_MAX_FFT_SIZE
#define CONFIG_DSP_MAX_FFT_SIZE 4096
@ -94,13 +95,17 @@ void dsps_fft2r_deinit_sc16();
*/
esp_err_t dsps_fft2r_fc32_ansi_(float *data, int N, float *w);
esp_err_t dsps_fft2r_fc32_ae32_(float *data, int N, float *w);
esp_err_t dsps_fft2r_fc32_aes3_(float *data, int N, float *w);
esp_err_t dsps_fft2r_sc16_ansi_(int16_t *data, int N, int16_t *w);
esp_err_t dsps_fft2r_sc16_ae32_(int16_t *data, int N, int16_t *w);
esp_err_t dsps_fft2r_sc16_aes3_(int16_t *data, int N, int16_t *w);
/**@}*/
// This is workaround because linker generates permanent error when assembler uses
// direct access to the table pointer
#define dsps_fft2r_fc32_ae32(data, N) dsps_fft2r_fc32_ae32_(data, N, dsps_fft_w_table_fc32)
#define dsps_fft2r_fc32_aes3(data, N) dsps_fft2r_fc32_aes3_(data, N, dsps_fft_w_table_fc32)
#define dsps_fft2r_sc16_ae32(data, N) dsps_fft2r_sc16_ae32_(data, N, dsps_fft_w_table_sc16)
#define dsps_fft2r_sc16_aes3(data, N) dsps_fft2r_sc16_aes3_(data, N, dsps_fft_w_table_sc16)
#define dsps_fft2r_fc32_ansi(data, N) dsps_fft2r_fc32_ansi_(data, N, dsps_fft_w_table_fc32)
#define dsps_fft2r_sc16_ansi(data, N) dsps_fft2r_sc16_ansi_(data, N, dsps_fft_w_table_sc16)
@ -128,6 +133,7 @@ esp_err_t dsps_bit_rev2r_fc32(float *data, int N);
esp_err_t dsps_bit_rev_lookup_fc32_ansi(float *data, int reverse_size, uint16_t *reverse_tab);
esp_err_t dsps_bit_rev_lookup_fc32_ae32(float *data, int reverse_size, uint16_t *reverse_tab);
esp_err_t dsps_bit_rev_lookup_fc32_aes3(float *data, int reverse_size, uint16_t *reverse_tab);
/**
* @brief Generate coefficients table for the FFT radix 2
@ -202,20 +208,28 @@ esp_err_t dsps_gen_bitrev2r_table(int N, int step, char *name_ext);
#define dsps_bit_rev_fc32 dsps_bit_rev_fc32_ansi
#define dsps_cplx2reC_fc32 dsps_cplx2reC_fc32_ansi
#if (dsps_fft2r_fc32_ae32_enabled == 1)
#if (dsps_fft2r_fc32_aes3_enabled == 1)
#define dsps_fft2r_fc32 dsps_fft2r_fc32_aes3
#elif (dsps_fft2r_fc32_ae32_enabled == 1)
#define dsps_fft2r_fc32 dsps_fft2r_fc32_ae32
#else
#define dsps_fft2r_fc32 dsps_fft2r_fc32_ansi
#endif
#if (dsps_fft2r_sc16_ae32_enabled == 1)
#if (dsps_fft2r_sc16_aes3_enabled == 1)
#define dsps_fft2r_sc16 dsps_fft2r_sc16_aes3
#elif (dsps_fft2r_sc16_ae32_enabled == 1)
#define dsps_fft2r_sc16 dsps_fft2r_sc16_ae32
#else
#define dsps_fft2r_sc16 dsps_fft2r_sc16_ansi
#endif
#if (dsps_bit_rev_lookup_fc32_ae32_enabled == 1)
# define dsps_bit_rev_lookup_fc32 dsps_bit_rev_lookup_fc32_ae32
#if (dsps_fft2r_fc32_aes3_enabled)
#define dsps_bit_rev_lookup_fc32 dsps_bit_rev_lookup_fc32_aes3
#else
#define dsps_bit_rev_lookup_fc32 dsps_bit_rev_lookup_fc32_ae32
#endif // dsps_fft2r_fc32_aes3_enabled
#else
#define dsps_bit_rev_lookup_fc32 dsps_bit_rev_lookup_fc32_ansi
#endif

8
tools/sdk/esp32/include/esp-dsp/modules/fft/include/dsps_fft2r_platform.h
View File

@ -1,6 +1,9 @@
#ifndef _dsps_fft2r_platform_H_
#define _dsps_fft2r_platform_H_
#include "sdkconfig.h"
#ifdef __XTENSA__
#include <xtensa/config/core-isa.h>
#include <xtensa/config/core-matmap.h>
@ -22,7 +25,12 @@
#define dsps_bit_rev_lookup_fc32_ae32_enabled 1
#endif //
#endif // __XTENSA__
#if CONFIG_IDF_TARGET_ESP32S3
#define dsps_fft2r_fc32_aes3_enabled 1
#define dsps_fft2r_sc16_aes3_enabled 1
#endif
#endif // _dsps_fft2r_platform_H_

4
tools/sdk/esp32/include/esp-dsp/modules/fft/include/dsps_fft4r.h
View File

@ -81,6 +81,8 @@ void dsps_fft4r_deinit_fc32();
* @param[inout] data: input/output complex array. An elements located: Re[0], Im[0], ... Re[N-1], Im[N-1]
* result of FFT will be stored to this array.
* @param[in] N: Number of complex elements in input array
* @param[in] table: pointer to sin/cos table
* @param[in] table_size: size of the sin/cos table
*
* @return
* - ESP_OK on success
@ -130,6 +132,8 @@ esp_err_t dsps_bit_rev4r_sc16_ansi(int16_t *data, int N);
* result will be stored to the same array.
* Input1: input[0..N-1], Input2: input[N..2*N-1]
* @param[in] N: Number of complex elements in input array
* @param[in] table: pointer to sin/cos table
* @param[in] table_size: size of the sin/cos table
*
* @return
* - ESP_OK on success

4
tools/sdk/esp32/include/esp-dsp/modules/fft/include/dsps_fft4r_platform.h
View File

@ -1,6 +1,9 @@
#ifndef _dsps_fft4r_platform_H_
#define _dsps_fft4r_platform_H_
#include "sdkconfig.h"
#ifdef __XTENSA__
#include <xtensa/config/core-isa.h>
#include <xtensa/config/core-matmap.h>
@ -24,6 +27,7 @@
#define dsps_bit_rev_lookup_fc32_ae32_enabled 1
#endif //
#endif // __XTENSA__

1
tools/sdk/esp32/include/esp-dsp/modules/fir/include/dsps_fir.h
View File

@ -96,6 +96,7 @@ esp_err_t dsps_fird_init_f32(fir_f32_t *fir, float *coeffs, float *delay, int N,
*/
esp_err_t dsps_fir_f32_ansi(fir_f32_t *fir, const float *input, float *output, int len);
esp_err_t dsps_fir_f32_ae32(fir_f32_t *fir, const float *input, float *output, int len);
esp_err_t dsps_fir_f32_aes3(fir_f32_t *fir, const float *input, float *output, int len);
/**@}*/
/**@{*/

4
tools/sdk/esp32/include/esp-dsp/modules/fir/include/dsps_fir_platform.h
View File

@ -1,6 +1,9 @@
#ifndef _dsps_fir_platform_H_
#define _dsps_fir_platform_H_
#include "sdkconfig.h"
#ifdef __XTENSA__
#include <xtensa/config/core-isa.h>
#include <xtensa/config/core-matmap.h>
@ -11,5 +14,6 @@
#define dsps_fird_f32_ae32_enabled 1
#endif //
#endif // __XTENSA__
#endif // _dsps_fir_platform_H_

3
tools/sdk/esp32/include/esp-dsp/modules/iir/include/dsps_biquad.h
View File

@ -18,7 +18,7 @@
#include "dsp_err.h"
#include "dsps_add_platform.h"
#include "dsps_biquad_platform.h"
#ifdef __cplusplus
extern "C"
@ -45,6 +45,7 @@ extern "C"
*/
esp_err_t dsps_biquad_f32_ansi(const float *input, float *output, int len, float *coef, float *w);
esp_err_t dsps_biquad_f32_ae32(const float *input, float *output, int len, float *coef, float *w);
esp_err_t dsps_biquad_f32_aes3(const float *input, float *output, int len, float *coef, float *w);
/**@}*/

8
tools/sdk/esp32/include/esp-dsp/modules/iir/include/dsps_biquad_platform.h
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@ -1,14 +1,18 @@
#ifndef _dsps_biquad_platform_H_
#define _dsps_biquad_platform_H_
#include "sdkconfig.h"
#ifdef __XTENSA__
#include <xtensa/config/core-isa.h>
#include <xtensa/config/core-matmap.h>
#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
#define dsps_biquad_f32_ae32_enabled 1
#endif
#endif // __XTENSA__
#endif // _dsps_biquad_platform_H_
#endif // _dsps_biquad_platform_H_

4
tools/sdk/esp32/include/esp-dsp/modules/math/add/include/dsps_add_platform.h
View File

@ -1,6 +1,9 @@
#ifndef _dsps_add_platform_H_
#define _dsps_add_platform_H_
#include "sdkconfig.h"
#ifdef __XTENSA__
#include <xtensa/config/core-isa.h>
#include <xtensa/config/core-matmap.h>
@ -14,6 +17,7 @@
#if (XCHAL_HAVE_LOOPS == 1)
#define dsps_add_s16_ae32_enabled 1
#endif
#endif // __XTENSA__
#endif // _dsps_add_platform_H_

4
tools/sdk/esp32/include/esp-dsp/modules/math/addc/include/dsps_addc_platform.h
View File

@ -1,6 +1,9 @@
#ifndef _dsps_addc_platform_H_
#define _dsps_addc_platform_H_
#include "sdkconfig.h"
#ifdef __XTENSA__
#include <xtensa/config/core-isa.h>
#include <xtensa/config/core-matmap.h>
@ -10,6 +13,7 @@
#define dsps_addc_f32_ae32_enabled 1
#endif
#endif // __XTENSA__
#endif // _dsps_addc_platform_H_

4
tools/sdk/esp32/include/esp-dsp/modules/math/mul/include/dsps_mul_platform.h
View File

@ -1,6 +1,9 @@
#ifndef _dsps_mul_platform_H_
#define _dsps_mul_platform_H_
#include "sdkconfig.h"
#ifdef __XTENSA__
#include <xtensa/config/core-isa.h>
#include <xtensa/config/core-matmap.h>
@ -10,5 +13,6 @@
#define dsps_mul_f32_ae32_enabled 1
#endif
#endif // __XTENSA__
#endif // _dsps_mul_platform_H_

4
tools/sdk/esp32/include/esp-dsp/modules/math/mulc/include/dsps_mulc_platform.h
View File

@ -1,6 +1,9 @@
#ifndef _dsps_mulc_platform_H_
#define _dsps_mulc_platform_H_
#include "sdkconfig.h"
#ifdef __XTENSA__
#include <xtensa/config/core-isa.h>
#include <xtensa/config/core-matmap.h>
@ -16,6 +19,7 @@
#define dsps_mulc_s16_ae32_enabled 1
#endif //
#endif // __XTENSA__
#endif // _dsps_mulc_platform_H_

4
tools/sdk/esp32/include/esp-dsp/modules/math/sub/include/dsps_sub_platform.h
View File

@ -1,6 +1,9 @@
#ifndef _dsps_sub_platform_H_
#define _dsps_sub_platform_H_
#include "sdkconfig.h"
#ifdef __XTENSA__
#include <xtensa/config/core-isa.h>
#include <xtensa/config/core-matmap.h>
@ -10,5 +13,6 @@
#define dsps_sub_f32_ae32_enabled 1
#endif
#endif // __XTENSA__
#endif // _dsps_sub_platform_H_

82
tools/sdk/esp32/include/esp-dsp/modules/matrix/include/dspm_mult.h
View File

@ -43,6 +43,7 @@ extern "C"
*/
esp_err_t dspm_mult_f32_ansi(const float *A, const float *B, float *C, int m, int n, int k);
esp_err_t dspm_mult_f32_ae32(const float *A, const float *B, float *C, int m, int n, int k);
esp_err_t dspm_mult_f32_aes3(const float *A, const float *B, float *C, int m, int n, int k);
/**@}*/
@ -128,6 +129,7 @@ esp_err_t dspm_mult_4x4x4_f32_ae32(const float *A, const float *B, float *C);
*/
esp_err_t dspm_mult_s16_ansi(const int16_t *A, const int16_t *B, int16_t *C, int m, int n, int k, int shift);
esp_err_t dspm_mult_s16_ae32(const int16_t *A, const int16_t *B, int16_t *C, int m, int n, int k, int shift);
esp_err_t dspm_mult_s16_aes3(const int16_t *A, const int16_t *B, int16_t *C, int m, int n, int k, int shift);
/**@}*/
#ifdef __cplusplus
@ -136,46 +138,54 @@ esp_err_t dspm_mult_s16_ae32(const int16_t *A, const int16_t *B, int16_t *C, int
#if CONFIG_DSP_OPTIMIZED
#if (dspm_mult_s16_ae32_enabled == 1)
#define dspm_mult_s16 dspm_mult_s16_ae32
#else
#define dspm_mult_s16 dspm_mult_s16_ansi
#endif
#if (dspm_mult_f32_ae32_enabled == 1)
#define dspm_mult_f32 dspm_mult_f32_ae32
#else
#define dspm_mult_f32 dspm_mult_f32_ansi
#endif
#if (dspm_mult_s16_aes3_enabled == 1)
#define dspm_mult_s16 dspm_mult_s16_aes3
#elif (dspm_mult_s16_ae32_enabled == 1)
#define dspm_mult_s16 dspm_mult_s16_ae32
#else
#define dspm_mult_s16 dspm_mult_s16_ansi
#endif
#if (dspm_mult_3x3x1_f32_ae32_enabled == 1)
#define dspm_mult_3x3x1_f32 dspm_mult_3x3x1_f32_ae32
#else
#define dspm_mult_3x3x1_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 3, 3, 1)
#endif
#if (dspm_mult_3x3x3_f32_ae32_enabled == 1)
#define dspm_mult_3x3x3_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 3, 3, 3)
#else
#define dsps_sub_f32 dsps_sub_f32_ansi
#endif
#if (dspm_mult_4x4x1_f32_ae32_enabled == 1)
#define dspm_mult_4x4x1_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 4, 4, 1)
#else
#define dsps_sub_f32 dsps_sub_f32_ansi
#endif
#if (dspm_mult_4x4x4_f32_ae32_enabled == 1)
#define dspm_mult_4x4x4_f32 dspm_mult_4x4x4_f32_ae32
#else
#define dspm_mult_4x4x4_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 4, 4, 4)
#endif
#if (dspm_mult_f32_aes3_enabled == 1)
#define dspm_mult_f32 dspm_mult_f32_aes3
#elif (dspm_mult_f32_ae32_enabled == 1)
#define dspm_mult_f32 dspm_mult_f32_ae32
#else
#define dspm_mult_f32 dspm_mult_f32_ansi
#endif
#if (dspm_mult_3x3x1_f32_ae32_enabled == 1)
#define dspm_mult_3x3x1_f32 dspm_mult_3x3x1_f32_ae32
#else
#define dspm_mult_3x3x1_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 3, 3, 1)
#endif
#if (dspm_mult_3x3x3_f32_ae32_enabled == 1)
#define dspm_mult_3x3x3_f32(A,B,C) dspm_mult_3x3x3_f32_ae32(A,B,C)
#else
#define dspm_mult_3x3x3_f32(A,B,C) dspm_mult_f32_ansi(A,B,B,3,3,3);
#endif
#if (dspm_mult_4x4x1_f32_ae32_enabled == 1)
#define dspm_mult_4x4x1_f32(A,B,C) dspm_mult_4x4x1_f32_ae32(A,B,C)
#else
#define dspm_mult_4x4x1_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 4, 4, 1)
#endif
#if (dspm_mult_f32_aes3_enabled == 1)
#define dspm_mult_4x4x4_f32(A,B,C) dspm_mult_f32_aes3(A,B,C, 4, 4, 4)
#elif (dspm_mult_4x4x4_f32_ae32_enabled == 1)
#define dspm_mult_4x4x4_f32 dspm_mult_4x4x4_f32_ae32
#else
#define dspm_mult_4x4x4_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 4, 4, 4)
#endif
#else
#define dspm_mult_s16 dspm_mult_s16_ansi
#define dspm_mult_f32 dspm_mult_f32_ansi
#define dspm_mult_3x3x1_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 3, 3, 1)
#define dsps_sub_f32 dsps_sub_f32_ansi
#define dsps_sub_f32 dsps_sub_f32_ansi
#define dspm_mult_4x4x4_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 4, 4, 4)
#define dspm_mult_s16 dspm_mult_s16_ansi
#define dspm_mult_f32 dspm_mult_f32_ansi
#define dspm_mult_3x3x1_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 3, 3, 1)
#define dsps_sub_f32 dsps_sub_f32_ansi
#define dsps_add_f32 dsps_add_f32_ansi
#define dspm_mult_4x4x4_f32(A,B,C) dspm_mult_f32_ansi(A,B,C, 4, 4, 4)
#endif // CONFIG_DSP_OPTIMIZED

9
tools/sdk/esp32/include/esp-dsp/modules/matrix/include/dspm_mult_platform.h
View File

@ -1,8 +1,9 @@
#ifndef _dspm_mult_platform_H_
#define _dspm_mult_platform_H_
#include "sdkconfig.h"
#ifdef __XTENSA__
#include <xtensa/config/core-isa.h>
#include <xtensa/config/core-matmap.h>
@ -22,5 +23,11 @@
#define dspm_mult_s16_ae32_enabled 1
#endif
#endif // __XTENSA__
#if CONFIG_IDF_TARGET_ESP32S3
#define dspm_mult_f32_aes3_enabled 1
#define dspm_mult_s16_aes3_enabled 1
#endif
#endif // _dspm_mult_platform_H_

49
tools/sdk/esp32/include/esp32-camera/driver/include/sensor.h
View File

@ -11,23 +11,21 @@
#include <stdint.h>
#include <stdbool.h>
// Chip ID Registers
#define REG_PID 0x0A
#define REG_VER 0x0B
#define REG_MIDH 0x1C
#define REG_MIDL 0x1D
#define REG16_CHIDH 0x300A
#define REG16_CHIDL 0x300B
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
OV9650_PID = 0x96,
OV7725_PID = 0x77,
OV2640_PID = 0x26,
OV3660_PID = 0x36,
OV5640_PID = 0x56,
OV3660_PID = 0x3660,
OV5640_PID = 0x5640,
OV7670_PID = 0x76,
NT99141_PID = 0x14
NT99141_PID = 0x1410,
GC2145_PID = 0x2145,
GC032A_PID = 0x232a,
GC0308_PID = 0x9b,
} camera_pid_t;
typedef enum {
@ -37,18 +35,23 @@ typedef enum {
CAMERA_OV5640,
CAMERA_OV7670,
CAMERA_NT99141,
CAMERA_GC2145,
CAMERA_GC032A,
CAMERA_GC0308,
CAMERA_MODEL_MAX,
CAMERA_NONE,
CAMERA_UNKNOWN
} camera_model_t;
typedef enum {
OV2640_SCCB_ADDR = 0x30,
OV5640_SCCB_ADDR = 0x3C,
OV3660_SCCB_ADDR = 0x3C,
OV7725_SCCB_ADDR = 0x21,
OV7670_SCCB_ADDR = 0x21,
NT99141_SCCB_ADDR = 0x2A,
OV2640_SCCB_ADDR = 0x30,// 0x60 >> 1
OV5640_SCCB_ADDR = 0x3C,// 0x78 >> 1
OV3660_SCCB_ADDR = 0x3C,// 0x78 >> 1
OV7725_SCCB_ADDR = 0x21,// 0x42 >> 1
OV7670_SCCB_ADDR = 0x21,// 0x42 >> 1
NT99141_SCCB_ADDR = 0x2A,// 0x54 >> 1
GC2145_SCCB_ADDR = 0x3C,// 0x78 >> 1
GC032A_SCCB_ADDR = 0x21,// 0x42 >> 1
GC0308_SCCB_ADDR = 0x21,// 0x42 >> 1
} camera_sccb_addr_t;
typedef enum {
@ -92,9 +95,11 @@ typedef enum {
typedef struct {
const camera_model_t model;
const char *name;
const camera_sccb_addr_t sccb_addr;
const camera_pid_t pid;
const framesize_t max_size;
const bool support_jpeg;
} camera_sensor_info_t;
typedef enum {
@ -146,7 +151,7 @@ extern const camera_sensor_info_t camera_sensor[];
typedef struct {
uint8_t MIDH;
uint8_t MIDL;
uint8_t PID;
uint16_t PID;
uint8_t VER;
} sensor_id_t;
@ -231,4 +236,10 @@ typedef struct _sensor {
int (*set_xclk) (sensor_t *sensor, int timer, int xclk);
} sensor_t;
camera_sensor_info_t *esp_camera_sensor_get_info(sensor_id_t *id);
#ifdef __cplusplus
}
#endif
#endif /* __SENSOR_H__ */

18
tools/sdk/esp32/include/esp32/include/esp32/dport_access.h
View File

@ -1,16 +1,8 @@
// Copyright 2010-2017 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include <sdkconfig.h>

18
tools/sdk/esp32/include/esp32/include/esp32/himem.h
View File

@ -1,16 +1,8 @@
// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stddef.h>

18
tools/sdk/esp32/include/esp32/include/esp32/rtc.h
View File

@ -1,16 +1,8 @@
// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>

18
tools/sdk/esp32/include/esp32/include/esp32/spiram.h
View File

@ -1,16 +1,8 @@
// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __ESP_SPIRAM_H

2
tools/sdk/esp32/include/esp_common/include/esp_err.h
View File

@ -39,6 +39,8 @@ typedef int esp_err_t;
#define ESP_ERR_INVALID_CRC 0x109 /*!< CRC or checksum was invalid */
#define ESP_ERR_INVALID_VERSION 0x10A /*!< Version was invalid */
#define ESP_ERR_INVALID_MAC 0x10B /*!< MAC address was invalid */
#define ESP_ERR_NOT_FINISHED 0x10C /*!< There are items remained to retrieve */
#define ESP_ERR_WIFI_BASE 0x3000 /*!< Starting number of WiFi error codes */
#define ESP_ERR_MESH_BASE 0x4000 /*!< Starting number of MESH error codes */

34
tools/sdk/esp32/include/esp_eth/include/esp_eth_com.h
View File

@ -15,6 +15,7 @@
#include "esp_err.h"
#include "esp_event_base.h"
#include "hal/eth_types.h"
#ifdef __cplusplus
extern "C" {
@ -38,12 +39,6 @@ extern "C" {
*/
#define ETH_HEADER_LEN (14)
/**
* @brief Ethernet frame CRC length
*
*/
#define ETH_CRC_LEN (4)
/**
* @brief Optional 802.1q VLAN Tag length
*
@ -96,33 +91,6 @@ typedef enum {
ETH_CMD_G_DUPLEX_MODE, /*!< Get Duplex mode */
} esp_eth_io_cmd_t;
/**
* @brief Ethernet link status
*
*/
typedef enum {
ETH_LINK_UP, /*!< Ethernet link is up */
ETH_LINK_DOWN /*!< Ethernet link is down */
} eth_link_t;
/**
* @brief Ethernet speed
*
*/
typedef enum {
ETH_SPEED_10M, /*!< Ethernet speed is 10Mbps */
ETH_SPEED_100M /*!< Ethernet speed is 100Mbps */
} eth_speed_t;
/**
* @brief Ethernet duplex mode
*
*/
typedef enum {
ETH_DUPLEX_HALF, /*!< Ethernet is in half duplex */
ETH_DUPLEX_FULL /*!< Ethernet is in full duplex */
} eth_duplex_t;
/**
* @brief Ethernet mediator
*

2
tools/sdk/esp32/include/esp_hw_support/include/esp_chip_info.h
View File

@ -32,6 +32,7 @@ typedef enum {
CHIP_ESP32S2 = 2, //!< ESP32-S2
CHIP_ESP32S3 = 4, //!< ESP32-S3
CHIP_ESP32C3 = 5, //!< ESP32-C3
CHIP_ESP32H2 = 6, //!< ESP32-H2
} esp_chip_model_t;
/* Chip feature flags, used in esp_chip_info_t */
@ -39,6 +40,7 @@ typedef enum {
#define CHIP_FEATURE_WIFI_BGN BIT(1) //!< Chip has 2.4GHz WiFi
#define CHIP_FEATURE_BLE BIT(4) //!< Chip has Bluetooth LE
#define CHIP_FEATURE_BT BIT(5) //!< Chip has Bluetooth Classic
#define CHIP_FEATURE_IEEE802154 BIT(6) //!< Chip has IEEE 802.15.4
/**
* @brief The structure represents information about the chip

3
tools/sdk/esp32/include/esp_hw_support/include/esp_mac.h
View File

@ -26,6 +26,7 @@ typedef enum {
ESP_MAC_WIFI_SOFTAP,
ESP_MAC_BT,
ESP_MAC_ETH,
ESP_MAC_IEEE802154,
} esp_mac_type_t;
/** @cond */
@ -39,6 +40,8 @@ typedef enum {
#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES
#elif CONFIG_IDF_TARGET_ESP32C3
#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES
#elif CONFIG_IDF_TARGET_ESP32H2
#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32H2_UNIVERSAL_MAC_ADDRESSES
#endif
/** @endcond */

16
tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/clk.h Normal file
View File

@ -0,0 +1,16 @@
// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include "esp_private/esp_clk.h"

2
tools/sdk/esp32/include/esp_hw_support/include/soc_log.h
View File

@ -41,6 +41,8 @@
#include "esp32s3/rom/ets_sys.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/ets_sys.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/ets_sys.h"
#endif
#define SOC_LOGE(tag, fmt, ...) esp_rom_printf("%s(err): " fmt, tag, ##__VA_ARGS__)

27
tools/sdk/esp32/include/esp_netif/include/esp_netif_ip_addr.h
View File

@ -85,6 +85,9 @@ extern "C" {
#define ESP_IP4TOADDR(a,b,c,d) esp_netif_htonl(ESP_IP4TOUINT32(a, b, c, d))
#define ESP_IP4ADDR_INIT(a, b, c, d) { .type = ESP_IPADDR_TYPE_V4, .u_addr = { .ip4 = { .addr = ESP_IP4TOADDR(a, b, c, d) }}};
#define ESP_IP6ADDR_INIT(a, b, c, d) { .type = ESP_IPADDR_TYPE_V6, .u_addr = { .ip6 = { .addr = { a, b, c, d }, .zone = 0 }}};
struct esp_ip6_addr {
uint32_t addr[4];
uint8_t zone;
@ -124,6 +127,30 @@ typedef enum {
*/
esp_ip6_addr_type_t esp_netif_ip6_get_addr_type(esp_ip6_addr_t* ip6_addr);
/**
* @brief Copy IP addresses
*
* @param[out] dest destination IP
* @param[in] src source IP
*/
static inline void esp_netif_ip_addr_copy(esp_ip_addr_t *dest, const esp_ip_addr_t *src)
{
dest->type = src->type;
if (src->type == ESP_IPADDR_TYPE_V6) {
dest->u_addr.ip6.addr[0] = src->u_addr.ip6.addr[0];
dest->u_addr.ip6.addr[1] = src->u_addr.ip6.addr[1];
dest->u_addr.ip6.addr[2] = src->u_addr.ip6.addr[2];
dest->u_addr.ip6.addr[3] = src->u_addr.ip6.addr[3];
dest->u_addr.ip6.zone = src->u_addr.ip6.zone;
} else {
dest->u_addr.ip4.addr = src->u_addr.ip4.addr;
dest->u_addr.ip6.addr[1] = 0;
dest->u_addr.ip6.addr[2] = 0;
dest->u_addr.ip6.addr[3] = 0;
dest->u_addr.ip6.zone = 0;
}
}
#ifdef __cplusplus
}
#endif

3
tools/sdk/esp32/include/esp_netif/include/esp_netif_slip.h
View File

@ -76,4 +76,7 @@ void esp_netif_lwip_slip_raw_output(esp_netif_t *netif, void *buffer, size_t len
*/
const esp_ip6_addr_t *esp_slip_get_ip6(esp_netif_t *slip_netif);
#ifdef __cplusplus
}
#endif
#endif //_ESP_NETIF_SLIP_H_

2
tools/sdk/esp32/include/esp_phy/esp32/include/phy_init_data.h
View File

@ -83,7 +83,7 @@ static const esp_phy_init_data_t phy_init_data= { {
0x18,
0x18,
0x18,
LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 40, 84),
LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 40, 78),
LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 40, 72),
LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 40, 66),
LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 40, 60),

42
tools/sdk/esp32/include/esp_pm/include/esp32h2/pm.h Normal file
View File

@ -0,0 +1,42 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "esp_err.h"
#include "soc/rtc.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Power management config for ESP32H2
*
* Pass a pointer to this structure as an argument to esp_pm_configure function.
*/
typedef struct {
int max_freq_mhz; /*!< Maximum CPU frequency, in MHz */
int min_freq_mhz; /*!< Minimum CPU frequency to use when no locks are taken, in MHz */
bool light_sleep_enable; /*!< Enter light sleep when no locks are taken */
} esp_pm_config_esp32h2_t;
#ifdef __cplusplus
}
#endif

2
tools/sdk/esp32/include/esp_pm/include/esp_pm.h
View File

@ -25,6 +25,8 @@
#include "esp32s3/pm.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/pm.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/pm.h"
#endif
#ifdef __cplusplus

15
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/libc_stubs.h
View File

@ -27,7 +27,7 @@ extern "C" {
#endif
/*
ESP32 ROM code contains implementations of some of C library functions.
ESP32-C3 ROM code contains implementations of some of C library functions.
Whenever a function in ROM needs to use a syscall, it calls a pointer to the corresponding syscall
implementation defined in the following struct.
@ -65,7 +65,6 @@ struct syscall_stub_table
int (*_write_r)(struct _reent *r, int, const void *, int);
int (*_lseek_r)(struct _reent *r, int, int, int);
int (*_read_r)(struct _reent *r, int, void *, int);
#ifdef _RETARGETABLE_LOCKING
void (*_retarget_lock_init)(_LOCK_T *lock);
void (*_retarget_lock_init_recursive)(_LOCK_T *lock);
void (*_retarget_lock_close)(_LOCK_T lock);
@ -76,18 +75,6 @@ struct syscall_stub_table
int (*_retarget_lock_try_acquire_recursive)(_LOCK_T lock);
void (*_retarget_lock_release)(_LOCK_T lock);
void (*_retarget_lock_release_recursive)(_LOCK_T lock);
#else
void (*_lock_init)(_lock_t *lock);
void (*_lock_init_recursive)(_lock_t *lock);
void (*_lock_close)(_lock_t *lock);
void (*_lock_close_recursive)(_lock_t *lock);
void (*_lock_acquire)(_lock_t *lock);
void (*_lock_acquire_recursive)(_lock_t *lock);
int (*_lock_try_acquire)(_lock_t *lock);
int (*_lock_try_acquire_recursive)(_lock_t *lock);
void (*_lock_release)(_lock_t *lock);
void (*_lock_release_recursive)(_lock_t *lock);
#endif
int (*_printf_float)(struct _reent *data, void *pdata, FILE * fp, int (*pfunc) (struct _reent *, FILE *, const char *, size_t len), va_list * ap);
int (*_scanf_float) (struct _reent *rptr, void *pdata, FILE *fp, va_list *ap);
void (*__assert_func) (const char *file, int line, const char * func, const char *failedexpr) __attribute__((noreturn));

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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_AES_H_
#define _ROM_AES_H_
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
#define AES_BLOCK_SIZE 16
enum AES_TYPE {
AES_ENC,
AES_DEC,
};
enum AES_BITS {
AES128,
AES192,
AES256
};
void ets_aes_enable(void);
void ets_aes_disable(void);
void ets_aes_set_endian(bool key_word_swap, bool key_byte_swap,
bool in_word_swap, bool in_byte_swap,
bool out_word_swap, bool out_byte_swap);
int ets_aes_setkey(enum AES_TYPE type, const void *key, enum AES_BITS bits);
int ets_aes_setkey_enc(const void *key, enum AES_BITS bits);
int ets_aes_setkey_dec(const void *key, enum AES_BITS bits);
void ets_aes_block(const void *input, void *output);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_AES_H_ */

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// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
void ets_apb_backup_init_lock_func(void(* _apb_backup_lock)(void), void(* _apb_backup_unlock)(void));
#ifdef __cplusplus
}
#endif

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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_BIGINT_H_
#define _ROM_BIGINT_H_
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
void ets_bigint_enable(void);
void ets_bigint_disable(void);
int ets_bigint_multiply(const uint32_t *x, const uint32_t *y, uint32_t len_words);
int ets_bigint_modmult(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, uint32_t len_words);
int ets_bigint_modexp(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, bool constant_time, uint32_t len_words);
void ets_bigint_wait_finish(void);
int ets_bigint_getz(uint32_t *z, uint32_t len_words);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_BIGINT_H_ */

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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_CACHE_H_
#define _ROM_CACHE_H_
#include <stdint.h>
#include "esp_bit_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup cache_apis, cache operation related apis
* @brief cache apis
*/
/** @addtogroup cache_apis
* @{
*/
#define MIN_ICACHE_SIZE 16384
#define MAX_ICACHE_SIZE 16384
#define MIN_ICACHE_WAYS 8
#define MAX_ICACHE_WAYS 8
#define MAX_CACHE_WAYS 8
#define MIN_CACHE_LINE_SIZE 32
#define TAG_SIZE 4
#define MIN_ICACHE_BANK_NUM 1
#define MAX_ICACHE_BANK_NUM 1
#define CACHE_MEMORY_BANK_NUM 1
#define CACHE_MEMORY_IBANK_SIZE 0x4000
#define MAX_ITAG_BANK_ITEMS (MAX_ICACHE_SIZE / MAX_ICACHE_BANK_NUM / MIN_CACHE_LINE_SIZE)
#define MAX_ITAG_BLOCK_ITEMS (MAX_ICACHE_SIZE / MAX_ICACHE_BANK_NUM / MAX_ICACHE_WAYS / MIN_CACHE_LINE_SIZE)
#define MAX_ITAG_BANK_SIZE (MAX_ITAG_BANK_ITEMS * TAG_SIZE)
#define MAX_ITAG_BLOCK_SIZE (MAX_ITAG_BLOCK_ITEMS * TAG_SIZE)
typedef enum {
CACHE_DCACHE = 0,
CACHE_ICACHE0 = 1,
CACHE_ICACHE1 = 2,
} cache_t;
typedef enum {
CACHE_MEMORY_INVALID = 0,
CACHE_MEMORY_IBANK0 = BIT(0),
CACHE_MEMORY_IBANK1 = BIT(1),
CACHE_MEMORY_IBANK2 = BIT(2),
CACHE_MEMORY_IBANK3 = BIT(3),
CACHE_MEMORY_DBANK0 = BIT(0),
CACHE_MEMORY_DBANK1 = BIT(1),
CACHE_MEMORY_DBANK2 = BIT(2),
CACHE_MEMORY_DBANK3 = BIT(3),
} cache_array_t;
#define ICACHE_SIZE_16KB CACHE_SIZE_HALF
#define ICACHE_SIZE_32KB CACHE_SIZE_FULL
#define DCACHE_SIZE_32KB CACHE_SIZE_HALF
#define DCACHE_SIZE_64KB CACHE_SIZE_FULL
typedef enum {
CACHE_SIZE_HALF = 0, /*!< 8KB for icache and dcache */
CACHE_SIZE_FULL = 1, /*!< 16KB for icache and dcache */
} cache_size_t;
typedef enum {
CACHE_4WAYS_ASSOC = 0, /*!< 4 way associated cache */
CACHE_8WAYS_ASSOC = 1, /*!< 8 way associated cache */
} cache_ways_t;
typedef enum {
CACHE_LINE_SIZE_16B = 0, /*!< 16 Byte cache line size */
CACHE_LINE_SIZE_32B = 1, /*!< 32 Byte cache line size */
CACHE_LINE_SIZE_64B = 2, /*!< 64 Byte cache line size */
} cache_line_size_t;
typedef enum {
CACHE_AUTOLOAD_POSITIVE = 0, /*!< cache autoload step is positive */
CACHE_AUTOLOAD_NEGATIVE = 1, /*!< cache autoload step is negative */
} cache_autoload_order_t;
#define CACHE_AUTOLOAD_STEP(i) ((i) - 1)
typedef enum {
CACHE_AUTOLOAD_MISS_TRIGGER = 0, /*!< autoload only triggered by cache miss */
CACHE_AUTOLOAD_HIT_TRIGGER = 1, /*!< autoload only triggered by cache hit */
CACHE_AUTOLOAD_BOTH_TRIGGER = 2, /*!< autoload triggered both by cache miss and hit */
} cache_autoload_trigger_t;
typedef enum {
CACHE_FREEZE_ACK_BUSY = 0, /*!< in this mode, cache ack busy to CPU if a cache miss happens*/
CACHE_FREEZE_ACK_ERROR = 1, /*!< in this mode, cache ack wrong data to CPU and trigger an error if a cache miss happens */
} cache_freeze_mode_t;
struct cache_mode {
uint32_t cache_size; /*!< cache size in byte */
uint16_t cache_line_size; /*!< cache line size in byte */
uint8_t cache_ways; /*!< cache ways, always 4 */
uint8_t ibus; /*!< the cache index, 0 for dcache, 1 for icache */
};
struct icache_tag_item {
uint32_t valid:1; /*!< the tag item is valid or not */
uint32_t lock:1; /*!< the cache line is locked or not */
uint32_t fifo_cnt:3; /*!< fifo cnt, 0 ~ 3 for 4 ways cache */
uint32_t tag:13; /*!< the tag is the high part of the cache address, however is only 16MB (8MB Ibus + 8MB Dbus) range, and without low part */
uint32_t reserved:14;
};
struct autoload_config {
uint8_t order; /*!< autoload step is positive or negative */
uint8_t trigger; /*!< autoload trigger */
uint8_t ena0; /*!< autoload region0 enable */
uint8_t ena1; /*!< autoload region1 enable */
uint32_t addr0; /*!< autoload region0 start address */
uint32_t size0; /*!< autoload region0 size */
uint32_t addr1; /*!< autoload region1 start address */
uint32_t size1; /*!< autoload region1 size */
};
struct tag_group_info {
struct cache_mode mode; /*!< cache and cache mode */
uint32_t filter_addr; /*!< the address that used to generate the struct */
uint32_t vaddr_offset; /*!< virtual address offset of the cache ways */
uint32_t tag_addr[MAX_CACHE_WAYS]; /*!< tag memory address, only [0~mode.ways-1] is valid to use */
uint32_t cache_memory_offset[MAX_CACHE_WAYS]; /*!< cache memory address, only [0~mode.ways-1] is valid to use */
};
struct lock_config {
uint32_t addr; /*!< manual lock address*/
uint16_t size; /*!< manual lock size*/
uint16_t group; /*!< manual lock group, 0 or 1*/
};
struct cache_internal_stub_table {
uint32_t (* icache_line_size)(void);
uint32_t (* icache_addr)(uint32_t addr);
uint32_t (* dcache_addr)(uint32_t addr);
void (* invalidate_icache_items)(uint32_t addr, uint32_t items);
void (* lock_icache_items)(uint32_t addr, uint32_t items);
void (* unlock_icache_items)(uint32_t addr, uint32_t items);
uint32_t (* suspend_icache_autoload)(void);
void (* resume_icache_autoload)(uint32_t autoload);
void (* freeze_icache_enable)(cache_freeze_mode_t mode);
void (* freeze_icache_disable)(void);
int (* op_addr)(uint32_t start_addr, uint32_t size, uint32_t cache_line_size, uint32_t max_sync_num, void(* cache_Iop)(uint32_t, uint32_t));
};
/* Defined in the interface file, default value is rom_default_cache_internal_table */
extern const struct cache_internal_stub_table* rom_cache_internal_table_ptr;
typedef void (* cache_op_start)(void);
typedef void (* cache_op_end)(void);
typedef struct {
cache_op_start start;
cache_op_end end;
} cache_op_cb_t;
/* Defined in the interface file, default value is NULL */
extern const cache_op_cb_t* rom_cache_op_cb;
#define ESP_ROM_ERR_INVALID_ARG 1
#define MMU_SET_ADDR_ALIGNED_ERROR 2
#define MMU_SET_PASE_SIZE_ERROR 3
#define MMU_SET_VADDR_OUT_RANGE 4
#define CACHE_OP_ICACHE_Y 1
#define CACHE_OP_ICACHE_N 0
/**
* @brief Initialise cache mmu, mark all entries as invalid.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_MMU_Init(void);
/**
* @brief Set ICache mmu mapping.
* Please do not call this function in your SDK application.
*
* @param uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_INVALID for invalid. In
* esp32h2, external memory is always flash
*
* @param uint32_t vaddr : virtual address in CPU address space.
* Can be Iram0,Iram1,Irom0,Drom0 and AHB buses address.
* Should be aligned by psize.
*
* @param uint32_t paddr : physical address in external memory.
* Should be aligned by psize.
*
* @param uint32_t psize : page size of ICache, in kilobytes. Should be 64 here.
*
* @param uint32_t num : pages to be set.
*
* @param uint32_t fixed : 0 for physical pages grow with virtual pages, other for virtual pages map to same physical page.
*
* @return uint32_t: error status
* 0 : mmu set success
* 2 : vaddr or paddr is not aligned
* 3 : psize error
* 4 : vaddr is out of range
*/
int Cache_Ibus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr, uint32_t psize, uint32_t num, uint32_t fixed);
/**
* @brief Set DCache mmu mapping.
* Please do not call this function in your SDK application.
*
* @param uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_INVALID for invalid. In
* esp32h2, external memory is always flash
*
* @param uint32_t vaddr : virtual address in CPU address space.
* Can be DRam0, DRam1, DRom0, DPort and AHB buses address.
* Should be aligned by psize.
*
* @param uint32_t paddr : physical address in external memory.
* Should be aligned by psize.
*
* @param uint32_t psize : page size of DCache, in kilobytes. Should be 64 here.
*
* @param uint32_t num : pages to be set.
* @param uint32_t fixed : 0 for physical pages grow with virtual pages, other for virtual pages map to same physical page.
*
* @return uint32_t: error status
* 0 : mmu set success
* 2 : vaddr or paddr is not aligned
* 3 : psize error
* 4 : vaddr is out of range
*/
int Cache_Dbus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr, uint32_t psize, uint32_t num, uint32_t fixed);
/**
* @brief Count the pages in the bus room address which map to Flash.
* Please do not call this function in your SDK application.
*
* @param uint32_t bus : the bus to count with.
*
* @param uint32_t * page0_mapped : value should be initial by user, 0 for not mapped, other for mapped count.
*
* return uint32_t : the number of pages which map to Flash.
*/
uint32_t Cache_Count_Flash_Pages(uint32_t bus, uint32_t * page0_mapped);
/**
* @brief allocate memory to used by ICache.
* Please do not call this function in your SDK application.
*
* @param cache_array_t icache_low : the data array bank used by icache low part. Due to timing constraint, can only be CACHE_MEMORY_INVALID, CACHE_MEMORY_IBANK0
*
* return none
*/
void Cache_Occupy_ICache_MEMORY(cache_array_t icache_low);
/**
* @brief Get cache mode of ICache or DCache.
* Please do not call this function in your SDK application.
*
* @param struct cache_mode * mode : the pointer of cache mode struct, caller should set the icache field
*
* return none
*/
void Cache_Get_Mode(struct cache_mode * mode);
/**
* @brief set ICache modes: cache size, associate ways and cache line size.
* Please do not call this function in your SDK application.
*
* @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_HALF and CACHE_SIZE_FULL
*
* @param cache_ways_t ways : the associate ways of cache, can be CACHE_4WAYS_ASSOC and CACHE_8WAYS_ASSOC
*
* @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B, CACHE_LINE_SIZE_32B and CACHE_LINE_SIZE_64B
*
* return none
*/
void Cache_Set_ICache_Mode(cache_size_t cache_size, cache_ways_t ways, cache_line_size_t cache_line_size);
/**
* @brief set DCache modes: cache size, associate ways and cache line size.
* Please do not call this function in your SDK application.
*
* @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_8KB and CACHE_SIZE_16KB
*
* @param cache_ways_t ways : the associate ways of cache, can be CACHE_4WAYS_ASSOC and CACHE_8WAYS_ASSOC
*
* @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B, CACHE_LINE_SIZE_32B and CACHE_LINE_SIZE_64B
*
* return none
*/
void Cache_Set_DCache_Mode(cache_size_t cache_size, cache_ways_t ways, cache_line_size_t cache_line_size);
/**
* @brief check if the address is accessed through ICache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : the address to check.
*
* @return 1 if the address is accessed through ICache, 0 if not.
*/
uint32_t Cache_Address_Through_ICache(uint32_t addr);
/**
* @brief check if the address is accessed through DCache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : the address to check.
*
* @return 1 if the address is accessed through DCache, 0 if not.
*/
uint32_t Cache_Address_Through_DCache(uint32_t addr);
/**
* @brief Init mmu owner register to make i/d cache use half mmu entries.
*
* @param None
*
* @return None
*/
void Cache_Owner_Init(void);
/**
* @brief Invalidate the cache items for ICache.
* Operation will be done CACHE_LINE_SIZE aligned.
* If the region is not in ICache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr: start address to invalidate
*
* @param uint32_t items: cache lines to invalidate, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
*
* @return None
*/
void Cache_Invalidate_ICache_Items(uint32_t addr, uint32_t items);
/**
* @brief Invalidate the Cache items in the region from ICache or DCache.
* If the region is not in Cache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : invalidated region start address.
*
* @param uint32_t size : invalidated region size.
*
* @return 0 for success
* 1 for invalid argument
*/
int Cache_Invalidate_Addr(uint32_t addr, uint32_t size);
/**
* @brief Invalidate all cache items in ICache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Invalidate_ICache_All(void);
/**
* @brief Mask all buses through ICache and DCache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Mask_All(void);
/**
* @brief Suspend ICache auto preload operation, then you can resume it after some ICache operations.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return uint32_t : 0 for ICache not auto preload before suspend.
*/
uint32_t Cache_Suspend_ICache_Autoload(void);
/**
* @brief Resume ICache auto preload operation after some ICache operations.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : 0 for ICache not auto preload before suspend.
*
* @return None.
*/
void Cache_Resume_ICache_Autoload(uint32_t autoload);
/**
* @brief Start an ICache manual preload, will suspend auto preload of ICache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : start address of the preload region.
*
* @param uint32_t size : size of the preload region, should not exceed the size of ICache.
*
* @param uint32_t order : the preload order, 0 for positive, other for negative
*
* @return uint32_t : 0 for ICache not auto preload before manual preload.
*/
uint32_t Cache_Start_ICache_Preload(uint32_t addr, uint32_t size, uint32_t order);
/**
* @brief Return if the ICache manual preload done.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return uint32_t : 0 for ICache manual preload not done.
*/
uint32_t Cache_ICache_Preload_Done(void);
/**
* @brief End the ICache manual preload to resume auto preload of ICache.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : 0 for ICache not auto preload before manual preload.
*
* @return None
*/
void Cache_End_ICache_Preload(uint32_t autoload);
/**
* @brief Config autoload parameters of ICache.
* Please do not call this function in your SDK application.
*
* @param struct autoload_config * config : autoload parameters.
*
* @return None
*/
void Cache_Config_ICache_Autoload(const struct autoload_config * config);
/**
* @brief Enable auto preload for ICache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Enable_ICache_Autoload(void);
/**
* @brief Disable auto preload for ICache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Disable_ICache_Autoload(void);
/**
* @brief Config a group of prelock parameters of ICache.
* Please do not call this function in your SDK application.
*
* @param struct lock_config * config : a group of lock parameters.
*
* @return None
*/
void Cache_Enable_ICache_PreLock(const struct lock_config *config);
/**
* @brief Disable a group of prelock parameters for ICache.
* However, the locked data will not be released.
* Please do not call this function in your SDK application.
*
* @param uint16_t group : 0 for group0, 1 for group1.
*
* @return None
*/
void Cache_Disable_ICache_PreLock(uint16_t group);
/**
* @brief Lock the cache items for ICache.
* Operation will be done CACHE_LINE_SIZE aligned.
* If the region is not in ICache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr: start address to lock
*
* @param uint32_t items: cache lines to lock, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
*
* @return None
*/
void Cache_Lock_ICache_Items(uint32_t addr, uint32_t items);
/**
* @brief Unlock the cache items for ICache.
* Operation will be done CACHE_LINE_SIZE aligned.
* If the region is not in ICache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr: start address to unlock
*
* @param uint32_t items: cache lines to unlock, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
*
* @return None
*/
void Cache_Unlock_ICache_Items(uint32_t addr, uint32_t items);
/**
* @brief Lock the cache items in tag memory for ICache or DCache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : start address of lock region.
*
* @param uint32_t size : size of lock region.
*
* @return 0 for success
* 1 for invalid argument
*/
int Cache_Lock_Addr(uint32_t addr, uint32_t size);
/**
* @brief Unlock the cache items in tag memory for ICache or DCache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : start address of unlock region.
*
* @param uint32_t size : size of unlock region.
*
* @return 0 for success
* 1 for invalid argument
*/
int Cache_Unlock_Addr(uint32_t addr, uint32_t size);
/**
* @brief Disable ICache access for the cpu.
* This operation will make all ICache tag memory invalid, CPU can't access ICache, ICache will keep idle.
* Please do not call this function in your SDK application.
*
* @return uint32_t : auto preload enabled before
*/
uint32_t Cache_Disable_ICache(void);
/**
* @brief Enable ICache access for the cpu.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : ICache will preload then.
*
* @return None
*/
void Cache_Enable_ICache(uint32_t autoload);
/**
* @brief Suspend ICache access for the cpu.
* The ICache tag memory is still there, CPU can't access ICache, ICache will keep idle.
* Please do not change MMU, cache mode or tag memory(tag memory can be changed in some special case).
* Please do not call this function in your SDK application.
*
* @param None
*
* @return uint32_t : auto preload enabled before
*/
uint32_t Cache_Suspend_ICache(void);
/**
* @brief Resume ICache access for the cpu.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : ICache will preload then.
*
* @return None
*/
void Cache_Resume_ICache(uint32_t autoload);
/**
* @brief Get ICache cache line size
*
* @param None
*
* @return uint32_t: 16, 32, 64 Byte
*/
uint32_t Cache_Get_ICache_Line_Size(void);
/**
* @brief Set default mode from boot, 8KB ICache, 16Byte cache line size.
*
* @param None
*
* @return None
*/
void Cache_Set_Default_Mode(void);
/**
* @brief Set default mode from boot, 8KB ICache, 16Byte cache line size.
*
* @param None
*
* @return None
*/
void Cache_Enable_Defalut_ICache_Mode(void);
/**
* @brief Enable freeze for ICache.
* Any miss request will be rejected, including cpu miss and preload/autoload miss.
* Please do not call this function in your SDK application.
*
* @param cache_freeze_mode_t mode : 0 for assert busy 1 for assert hit
*
* @return None
*/
void Cache_Freeze_ICache_Enable(cache_freeze_mode_t mode);
/**
* @brief Disable freeze for ICache.
* Please do not call this function in your SDK application.
*
* @return None
*/
void Cache_Freeze_ICache_Disable(void);
/**
* @brief Travel tag memory to run a call back function.
* ICache and DCache are suspend when doing this.
* The callback will get the parameter tag_group_info, which will include a group of tag memory addresses and cache memory addresses.
* Please do not call this function in your SDK application.
*
* @param struct cache_mode * mode : the cache to check and the cache mode.
*
* @param uint32_t filter_addr : only the cache lines which may include the filter_address will be returned to the call back function.
* 0 for do not filter, all cache lines will be returned.
*
* @param void (* process)(struct tag_group_info *) : call back function, which may be called many times, a group(the addresses in the group are in the same position in the cache ways) a time.
*
* @return None
*/
void Cache_Travel_Tag_Memory(struct cache_mode * mode, uint32_t filter_addr, void (* process)(struct tag_group_info *));
/**
* @brief Get the virtual address from cache mode, cache tag and the virtual address offset of cache ways.
* Please do not call this function in your SDK application.
*
* @param struct cache_mode * mode : the cache to calculate the virtual address and the cache mode.
*
* @param uint32_t tag : the tag part fo a tag item, 12-14 bits.
*
* @param uint32_t addr_offset : the virtual address offset of the cache ways.
*
* @return uint32_t : the virtual address.
*/
uint32_t Cache_Get_Virtual_Addr(struct cache_mode *mode, uint32_t tag, uint32_t vaddr_offset);
/**
* @brief Get cache memory block base address.
* Please do not call this function in your SDK application.
*
* @param uint32_t icache : 0 for dcache, other for icache.
*
* @param uint32_t bank_no : 0 ~ 3 bank.
*
* @return uint32_t : the cache memory block base address, 0 if the block not used.
*/
uint32_t Cache_Get_Memory_BaseAddr(uint32_t icache, uint32_t bank_no);
/**
* @brief Get the cache memory address from cache mode, cache memory offset and the virtual address offset of cache ways.
* Please do not call this function in your SDK application.
*
* @param struct cache_mode * mode : the cache to calculate the virtual address and the cache mode.
*
* @param uint32_t cache_memory_offset : the cache memory offset of the whole cache (ICache or DCache) for the cache line.
*
* @param uint32_t addr_offset : the virtual address offset of the cache ways.
*
* @return uint32_t : the virtual address.
*/
uint32_t Cache_Get_Memory_Addr(struct cache_mode *mode, uint32_t cache_memory_offset, uint32_t vaddr_offset);
/**
* @brief Get the cache memory value by DRAM address.
* Please do not call this function in your SDK application.
*
* @param uint32_t cache_memory_addr : DRAM address for the cache memory, should be 4 byte aligned for IBus address.
*
* @return uint32_t : the word value of the address.
*/
uint32_t Cache_Get_Memory_value(uint32_t cache_memory_addr);
/**
* @}
*/
/**
* @brief Get the cache MMU IROM end address.
* Please do not call this function in your SDK application.
*
* @param void
*
* @return uint32_t : the word value of the address.
*/
uint32_t Cache_Get_IROM_MMU_End(void);
/**
* @brief Get the cache MMU DROM end address.
* Please do not call this function in your SDK application.
*
* @param void
*
* @return uint32_t : the word value of the address.
*/
uint32_t Cache_Get_DROM_MMU_End(void);
/**
* @brief Lock the permission control section configuration. After lock, any
* configuration modification will be bypass. Digital reset will clear the lock!
* Please do not call this function in your SDK application.
*
* @param int ibus : 1 for lock ibus pms, 0 for lock dbus pms
*
* @return None
*/
void Cache_Pms_Lock(int ibus);
/**
* @brief Set three ibus pms boundary address, which will determine pms reject section and section 1/2.
* Please do not call this function in your SDK application.
*
* @param uint32_t ibus_boundary0_addr : vaddress for split line0
*
* @param uint32_t ibus_boundary1_addr : vaddress for split line1
*
* @param uint32_t ibus_boundary2_addr : vaddress for split line2
*
* @return int : ESP_ROM_ERR_INVALID_ARG for invalid address, 0 for success
*/
int Cache_Ibus_Pms_Set_Addr(uint32_t ibus_boundary0_addr, uint32_t ibus_boundary1_addr, uint32_t ibus_boundary2_addr);
/**
* @brief Set three ibus pms attribute, which will determine pms in different section and world.
* Please do not call this function in your SDK application.
*
* @param uint32_t ibus_pms_sct2_attr : attr for section2
*
* @param uint32_t ibus_pms_sct1_attr : attr for section1
*
* @return None
*/
void Cache_Ibus_Pms_Set_Attr(uint32_t ibus_pms_sct2_attr, uint32_t ibus_pms_sct1_attr);
/**
* @brief Set three dbus pms boundary address, which will determine pms reject section and section 1/2.
* Please do not call this function in your SDK application.
*
* @param uint32_t dbus_boundary0_addr : vaddress for split line0
*
* @param uint32_t dbus_boundary1_addr : vaddress for split line1
*
* @param uint32_t dbus_boundary2_addr : vaddress for split line2
*
* @return int : ESP_ROM_ERR_INVALID_ARG for invalid address, 0 for success
*/
int Cache_Dbus_Pms_Set_Addr(uint32_t dbus_boundary0_addr, uint32_t dbus_boundary1_addr, uint32_t dbus_boundary2_addr);
/**
* @brief Set three dbus pms attribute, which will determine pms in different section and world.
* Please do not call this function in your SDK application.
*
* @param uint32_t dbus_pms_sct2_attr : attr for section2
*
* @param uint32_t dbus_pms_sct1_attr : attr for section1
*
* @return None
*/
void Cache_Dbus_Pms_Set_Attr(uint32_t dbus_pms_sct2_attr, uint32_t dbus_pms_sct1_attr);
/**
* @brief Used by SPI flash mmap
*
*/
uint32_t flash_instr_rodata_start_page(uint32_t bus);
uint32_t flash_instr_rodata_end_page(uint32_t bus);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_CACHE_H_ */

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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef ROM_CRC_H
#define ROM_CRC_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup crc_apis, uart configuration and communication related apis
* @brief crc apis
*/
/** @addtogroup crc_apis
* @{
*/
/* Standard CRC8/16/32 algorithms. */
// CRC-8 x8+x2+x1+1 0x07
// CRC16-CCITT x16+x12+x5+1 1021 ISO HDLC, ITU X.25, V.34/V.41/V.42, PPP-FCS
// CRC32:
//G(x) = x32 +x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x1 + 1
//If your buf is not continuous, you can use the first result to be the second parameter.
/**
* @brief Crc32 value that is in little endian.
*
* @param uint32_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint32_t crc32_le(uint32_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief Crc32 value that is in big endian.
*
* @param uint32_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint32_t crc32_be(uint32_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief Crc16 value that is in little endian.
*
* @param uint16_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint16_t crc16_le(uint16_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief Crc16 value that is in big endian.
*
* @param uint16_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint16_t crc16_be(uint16_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief Crc8 value that is in little endian.
*
* @param uint8_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint8_t crc8_le(uint8_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief Crc8 value that is in big endian.
*
* @param uint32_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint8_t crc8_be(uint8_t crc, uint8_t const *buf, uint32_t len);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif

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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#include <stdbool.h>
#define ETS_DS_MAX_BITS 3072
#define ETS_DS_IV_LEN 16
/* Length of parameter 'C' stored in flash (not including IV)
Comprises encrypted Y, M, rinv, md (32), mprime (4), length (4), padding (8)
Note that if ETS_DS_MAX_BITS<4096, 'C' needs to be split up when writing to hardware
*/
#define ETS_DS_C_LEN ((ETS_DS_MAX_BITS * 3 / 8) + 32 + 8 + 8)
/* Encrypted ETS data. Recommended to store in flash in this format.
*/
typedef struct {
/* RSA LENGTH register parameters
* (number of words in RSA key & operands, minus one).
*
*
* This value must match the length field encrypted and stored in 'c',
* or invalid results will be returned. (The DS peripheral will
* always use the value in 'c', not this value, so an attacker can't
* alter the DS peripheral results this way, it will just truncate or
* extend the message and the resulting signature in software.)
*/
unsigned rsa_length;
/* IV value used to encrypt 'c' */
uint8_t iv[ETS_DS_IV_LEN];
/* Encrypted Digital Signature parameters. Result of AES-CBC encryption
of plaintext values. Includes an encrypted message digest.
*/
uint8_t c[ETS_DS_C_LEN];
} ets_ds_data_t;
typedef enum {
ETS_DS_OK,
ETS_DS_INVALID_PARAM, /* Supplied parameters are invalid */
ETS_DS_INVALID_KEY, /* HMAC peripheral failed to supply key */
ETS_DS_INVALID_PADDING, /* 'c' decrypted with invalid padding */
ETS_DS_INVALID_DIGEST, /* 'c' decrypted with invalid digest */
} ets_ds_result_t;
void ets_ds_enable(void);
void ets_ds_disable(void);
/*
* @brief Start signing a message (or padded message digest) using the Digital Signature peripheral
*
* - @param message Pointer to message (or padded digest) containing the message to sign. Should be
* (data->rsa_length + 1)*4 bytes long. @param data Pointer to DS data. Can be a pointer to data
* in flash.
*
* Caller must have already called ets_ds_enable() and ets_hmac_calculate_downstream() before calling
* this function, and is responsible for calling ets_ds_finish_sign() and then
* ets_hmac_invalidate_downstream() afterwards.
*
* @return ETS_DS_OK if signature is in progress, ETS_DS_INVALID_PARAM if param is invalid,
* EST_DS_INVALID_KEY if key or HMAC peripheral is configured incorrectly.
*/
ets_ds_result_t ets_ds_start_sign(const void *message, const ets_ds_data_t *data);
/*
* @brief Returns true if the DS peripheral is busy following a call to ets_ds_start_sign()
*
* A result of false indicates that a call to ets_ds_finish_sign() will not block.
*
* Only valid if ets_ds_enable() has been called.
*/
bool ets_ds_is_busy(void);
/* @brief Finish signing a message using the Digital Signature peripheral
*
* Must be called after ets_ds_start_sign(). Can use ets_ds_busy() to wait until
* peripheral is no longer busy.
*
* - @param signature Pointer to buffer to contain the signature. Should be
* (data->rsa_length + 1)*4 bytes long.
* - @param data Should match the 'data' parameter passed to ets_ds_start_sign()
*
* @param ETS_DS_OK if signing succeeded, ETS_DS_INVALID_PARAM if param is invalid,
* ETS_DS_INVALID_DIGEST or ETS_DS_INVALID_PADDING if there is a problem with the
* encrypted data digest or padding bytes (in case of ETS_DS_INVALID_PADDING, a
* digest is produced anyhow.)
*/
ets_ds_result_t ets_ds_finish_sign(void *signature, const ets_ds_data_t *data);
/* Plaintext parameters used by Digital Signature.
Not used for signing with DS peripheral, but can be encrypted
in-device by calling ets_ds_encrypt_params()
*/
typedef struct {
uint32_t Y[ETS_DS_MAX_BITS / 32];
uint32_t M[ETS_DS_MAX_BITS / 32];
uint32_t Rb[ETS_DS_MAX_BITS / 32];
uint32_t M_prime;
uint32_t length;
} ets_ds_p_data_t;
typedef enum {
ETS_DS_KEY_HMAC, /* The HMAC key (as stored in efuse) */
ETS_DS_KEY_AES, /* The AES key (as derived from HMAC key by HMAC peripheral in downstream mode) */
} ets_ds_key_t;
/* @brief Encrypt DS parameters suitable for storing and later use with DS peripheral
*
* @param data Output buffer to store encrypted data, suitable for later use generating signatures.
* @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
* @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process is done and 'data' is stored.
* @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the corresponding HMAC key will be stored to efuse and then permanently erased.
* @param key_type Type of key stored in 'key' (either the AES-256 DS key, or an HMAC DS key from which the AES DS key is derived using HMAC peripheral)
*
* @return ETS_DS_INVALID_PARAM if any parameter is invalid, or ETS_DS_OK if 'data' is successfully generated from the input parameters.
*/
ets_ds_result_t ets_ds_encrypt_params(ets_ds_data_t *data, const void *iv, const ets_ds_p_data_t *p_data, const void *key, ets_ds_key_t key_type);
#ifdef __cplusplus
}
#endif

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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_EFUSE_H_
#define _ROM_EFUSE_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
/** \defgroup efuse_APIs efuse APIs
* @brief ESP32 efuse read/write APIs
* @attention
*
*/
/** @addtogroup efuse_APIs
* @{
*/
typedef enum {
ETS_EFUSE_KEY_PURPOSE_USER = 0,
ETS_EFUSE_KEY_PURPOSE_RESERVED = 1,
ETS_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY = 4,
ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL = 5,
ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG = 6,
ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE = 7,
ETS_EFUSE_KEY_PURPOSE_HMAC_UP = 8,
ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0 = 9,
ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1 = 10,
ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2 = 11,
ETS_EFUSE_KEY_PURPOSE_MAX,
} ets_efuse_purpose_t;
typedef enum {
ETS_EFUSE_BLOCK0 = 0,
ETS_EFUSE_MAC_SPI_SYS_0 = 1,
ETS_EFUSE_BLOCK_SYS_DATA = 2,
ETS_EFUSE_BLOCK_USR_DATA = 3,
ETS_EFUSE_BLOCK_KEY0 = 4,
ETS_EFUSE_BLOCK_KEY1 = 5,
ETS_EFUSE_BLOCK_KEY2 = 6,
ETS_EFUSE_BLOCK_KEY3 = 7,
ETS_EFUSE_BLOCK_KEY4 = 8,
ETS_EFUSE_BLOCK_KEY5 = 9,
ETS_EFUSE_BLOCK_KEY6 = 10,
ETS_EFUSE_BLOCK_MAX,
} ets_efuse_block_t;
/**
* @brief set timing accroding the apb clock, so no read error or write error happens.
*
* @param clock: apb clock in HZ, only accept 5M(in FPGA), 10M(in FPGA), 20M, 40M, 80M.
*
* @return : 0 if success, others if clock not accepted
*/
int ets_efuse_set_timing(uint32_t clock);
/**
* @brief Enable efuse subsystem. Called after reset. Doesn't need to be called again.
*/
void ets_efuse_start(void);
/**
* @brief Efuse read operation: copies data from physical efuses to efuse read registers.
*
* @param null
*
* @return : 0 if success, others if apb clock is not accepted
*/
int ets_efuse_read(void);
/**
* @brief Efuse write operation: Copies data from efuse write registers to efuse. Operates on a single block of efuses at a time.
*
* @note This function does not update read efuses, call ets_efuse_read() once all programming is complete.
*
* @return : 0 if success, others if apb clock is not accepted
*/
int ets_efuse_program(ets_efuse_block_t block);
/**
* @brief Set all Efuse program registers to zero.
*
* Call this before writing new data to the program registers.
*/
void ets_efuse_clear_program_registers(void);
/**
* @brief Program a block of key data to an efuse block
*
* @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6. Key block must be unused (@ref ets_efuse_key_block_unused).
* @param purpose Purpose to set for this key. Purpose must be already unset.
* @param data Pointer to data to write.
* @param data_len Length of data to write.
*
* @note This function also calls ets_efuse_program() for the specified block, and for block 0 (setting the purpose)
*/
int ets_efuse_write_key(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose, const void *data, size_t data_len);
/* @brief Return the address of a particular efuse block's first read register
*
* @param block Index of efuse block to look up
*
* @return 0 if block is invalid, otherwise a numeric read register address
* of the first word in the block.
*/
uint32_t ets_efuse_get_read_register_address(ets_efuse_block_t block);
/**
* @brief Return the current purpose set for an efuse key block
*
* @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6.
*/
ets_efuse_purpose_t ets_efuse_get_key_purpose(ets_efuse_block_t key_block);
/**
* @brief Find a key block with the particular purpose set
*
* @param purpose Purpose to search for.
* @param[out] key_block Pointer which will be set to the key block if found. Can be NULL, if only need to test the key block exists.
* @return true if found, false if not found. If false, value at key_block pointer is unchanged.
*/
bool ets_efuse_find_purpose(ets_efuse_purpose_t purpose, ets_efuse_block_t *key_block);
/**
* Return true if the key block is unused, false otherwise.
*
* An unused key block is all zero content, not read or write protected,
* and has purpose 0 (ETS_EFUSE_KEY_PURPOSE_USER)
*
* @param key_block key block to check.
*
* @return true if key block is unused, false if key block or used
* or the specified block index is not a key block.
*/
bool ets_efuse_key_block_unused(ets_efuse_block_t key_block);
/**
* @brief Search for an unused key block and return the first one found.
*
* See @ref ets_efuse_key_block_unused for a description of an unused key block.
*
* @return First unused key block, or ETS_EFUSE_BLOCK_MAX if no unused key block is found.
*/
ets_efuse_block_t ets_efuse_find_unused_key_block(void);
/**
* @brief Return the number of unused efuse key blocks (0-6)
*/
unsigned ets_efuse_count_unused_key_blocks(void);
/**
* @brief Calculate Reed-Solomon Encoding values for a block of efuse data.
*
* @param data Pointer to data buffer (length 32 bytes)
* @param rs_values Pointer to write encoded data to (length 12 bytes)
*/
void ets_efuse_rs_calculate(const void *data, void *rs_values);
/**
* @brief Read spi flash pads configuration from Efuse
*
* @return
* - 0 for default SPI pins.
* - 1 for default HSPI pins.
* - Other values define a custom pin configuration mask. Pins are encoded as per the EFUSE_SPICONFIG_RET_SPICLK,
* EFUSE_SPICONFIG_RET_SPIQ, EFUSE_SPICONFIG_RET_SPID, EFUSE_SPICONFIG_RET_SPICS0, EFUSE_SPICONFIG_RET_SPIHD macros.
* WP pin (for quad I/O modes) is not saved in efuse and not returned by this function.
*/
uint32_t ets_efuse_get_spiconfig(void);
/**
* @brief Read spi flash wp pad from Efuse
*
* @return
* - 0x3f for invalid.
* - 0~46 is valid.
*/
uint32_t ets_efuse_get_wp_pad(void);
/**
* @brief Read opi flash pads configuration from Efuse
*
* @return
* - 0 for default SPI pins.
* - Other values define a custom pin configuration mask. From the LSB, every 6 bits represent a GPIO number which stand for:
* DQS, D4, D5, D6, D7 accordingly.
*/
uint32_t ets_efuse_get_opiconfig(void);
/**
* @brief Read if download mode disabled from Efuse
*
* @return
* - true for efuse disable download mode.
* - false for efuse doesn't disable download mode.
*/
bool ets_efuse_download_modes_disabled(void);
/**
* @brief Read if legacy spi flash boot mode disabled from Efuse
*
* @return
* - true for efuse disable legacy spi flash boot mode.
* - false for efuse doesn't disable legacy spi flash boot mode.
*/
bool ets_efuse_legacy_spi_boot_mode_disabled(void);
/**
* @brief Read if uart print control value from Efuse
*
* @return
* - 0 for uart force print.
* - 1 for uart print when GPIO8 is low when digital reset.
* 2 for uart print when GPIO8 is high when digital reset.
* 3 for uart force slient
*/
uint32_t ets_efuse_get_uart_print_control(void);
/**
* @brief Read which channel will used by ROM to print
*
* @return
* - 0 for UART0.
* - 1 for UART1.
*/
uint32_t ets_efuse_get_uart_print_channel(void);
/**
* @brief Read if usb download mode disabled from Efuse
*
* (Also returns true if security download mode is enabled, as this mode
* disables USB download.)
*
* @return
* - true for efuse disable usb download mode.
* - false for efuse doesn't disable usb download mode.
*/
bool ets_efuse_usb_download_mode_disabled(void);
/**
* @brief Read if tiny basic mode disabled from Efuse
*
* @return
* - true for efuse disable tiny basic mode.
* - false for efuse doesn't disable tiny basic mode.
*/
bool ets_efuse_tiny_basic_mode_disabled(void);
/**
* @brief Read if usb module disabled from Efuse
*
* @return
* - true for efuse disable usb module.
* - false for efuse doesn't disable usb module.
*/
bool ets_efuse_usb_module_disabled(void);
/**
* @brief Read if security download modes enabled from Efuse
*
* @return
* - true for efuse enable security download mode.
* - false for efuse doesn't enable security download mode.
*/
bool ets_efuse_security_download_modes_enabled(void);
/**
* @brief Return true if secure boot is enabled in EFuse
*/
bool ets_efuse_secure_boot_enabled(void);
/**
* @brief Return true if secure boot aggressive revoke is enabled in EFuse
*/
bool ets_efuse_secure_boot_aggressive_revoke_enabled(void);
/**
* @brief Return true if cache encryption (flash, etc) is enabled from boot via EFuse
*/
bool ets_efuse_cache_encryption_enabled(void);
/**
* @brief Return true if EFuse indicates an external phy needs to be used for USB
*/
bool ets_efuse_usb_use_ext_phy(void);
/**
* @brief Return true if EFuse indicates USB device persistence is disabled
*/
bool ets_efuse_usb_force_nopersist(void);
/**
* @brief Return true if OPI pins GPIO33-37 are powered by VDDSPI, otherwise by VDD33CPU
*/
bool ets_efuse_flash_opi_5pads_power_sel_vddspi(void);
/**
* @brief Return true if EFuse indicates an opi flash is attached.
*/
bool ets_efuse_flash_opi_mode(void);
/**
* @brief Return true if EFuse indicates to send a flash resume command.
*/
bool ets_efuse_force_send_resume(void);
/**
* @brief return the time in us ROM boot need wait flash to power on from Efuse
*
* @return
* - uint32_t the time in us.
*/
uint32_t ets_efuse_get_flash_delay_us(void);
#define EFUSE_SPICONFIG_SPI_DEFAULTS 0
#define EFUSE_SPICONFIG_HSPI_DEFAULTS 1
#define EFUSE_SPICONFIG_RET_SPICLK_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPICLK_SHIFT 0
#define EFUSE_SPICONFIG_RET_SPICLK(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPICLK_SHIFT) & EFUSE_SPICONFIG_RET_SPICLK_MASK)
#define EFUSE_SPICONFIG_RET_SPIQ_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPIQ_SHIFT 6
#define EFUSE_SPICONFIG_RET_SPIQ(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPIQ_SHIFT) & EFUSE_SPICONFIG_RET_SPIQ_MASK)
#define EFUSE_SPICONFIG_RET_SPID_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPID_SHIFT 12
#define EFUSE_SPICONFIG_RET_SPID(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPID_SHIFT) & EFUSE_SPICONFIG_RET_SPID_MASK)
#define EFUSE_SPICONFIG_RET_SPICS0_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPICS0_SHIFT 18
#define EFUSE_SPICONFIG_RET_SPICS0(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPICS0_SHIFT) & EFUSE_SPICONFIG_RET_SPICS0_MASK)
#define EFUSE_SPICONFIG_RET_SPIHD_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPIHD_SHIFT 24
#define EFUSE_SPICONFIG_RET_SPIHD(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPIHD_SHIFT) & EFUSE_SPICONFIG_RET_SPIHD_MASK)
/**
* @brief Enable JTAG temporarily by writing a JTAG HMAC "key" into
* the JTAG_CTRL registers.
*
* Works if JTAG has been "soft" disabled by burning the EFUSE_SOFT_DIS_JTAG efuse.
*
* Will enable the HMAC module to generate a "downstream" HMAC value from a key already saved in efuse, and then write the JTAG HMAC "key" which will enable JTAG if the two keys match.
*
* @param jtag_hmac_key Pointer to a 32 byte array containing a valid key. Supplied by user.
* @param key_block Index of a key block containing the source for this key.
*
* @return ETS_FAILED if HMAC operation fails or invalid parameter, ETS_OK otherwise. ETS_OK doesn't necessarily mean that JTAG was enabled.
*/
int ets_jtag_enable_temporarily(const uint8_t *jtag_hmac_key, ets_efuse_block_t key_block);
/**
* @brief A crc8 algorithm used for MAC addresses in efuse
*
* @param unsigned char const *p : Pointer to original data.
*
* @param unsigned int len : Data length in byte.
*
* @return unsigned char: Crc value.
*/
unsigned char esp_crc8(unsigned char const *p, unsigned int len);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_EFUSE_H_ */

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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
/* Note: Most of esp_flash APIs in ROM are compatible with headers in ESP-IDF, this function
just adds ROM-specific parts
*/
struct spi_flash_chip_t;
typedef struct esp_flash_t esp_flash_t;
/* Structure to wrap "global" data used by esp_flash in ROM */
typedef struct {
/* Default SPI flash chip, ie main chip attached to the MCU
This chip is used if the 'chip' argument passed to esp_flash_xxx API functions is ever NULL
*/
esp_flash_t *default_chip;
/* Global API OS notification start/end/chip_check functions
These are used by ROM if no other host functions are configured.
*/
struct {
esp_err_t (*start)(esp_flash_t *chip);
esp_err_t (*end)(esp_flash_t *chip, esp_err_t err);
esp_err_t (*chip_check)(esp_flash_t **inout_chip);
} api_funcs;
} esp_flash_rom_global_data_t;
/** Access a pointer to the global data used by the ROM spi_flash driver
*/
esp_flash_rom_global_data_t *esp_flash_get_rom_global_data(void);
#ifdef __cplusplus
}
#endif

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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_ETS_SYS_H_
#define _ROM_ETS_SYS_H_
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup ets_sys_apis, ets system related apis
* @brief ets system apis
*/
/** @addtogroup ets_sys_apis
* @{
*/
/************************************************************************
* NOTE
* Many functions in this header files can't be run in FreeRTOS.
* Please see the comment of the Functions.
* There are also some functions that doesn't work on FreeRTOS
* without listed in the header, such as:
* xtos functions start with "_xtos_" in ld file.
*
***********************************************************************
*/
/** \defgroup ets_apis, Espressif Task Scheduler related apis
* @brief ets apis
*/
/** @addtogroup ets_apis
* @{
*/
typedef enum {
ETS_OK = 0, /**< return successful in ets*/
ETS_FAILED = 1 /**< return failed in ets*/
} ETS_STATUS;
typedef ETS_STATUS ets_status_t;
typedef uint32_t ETSSignal;
typedef uint32_t ETSParam;
typedef struct ETSEventTag ETSEvent; /**< Event transmit/receive in ets*/
struct ETSEventTag {
ETSSignal sig; /**< Event signal, in same task, different Event with different signal*/
ETSParam par; /**< Event parameter, sometimes without usage, then will be set as 0*/
};
typedef void (*ETSTask)(ETSEvent *e); /**< Type of the Task processer*/
typedef void (* ets_idle_cb_t)(void *arg); /**< Type of the system idle callback*/
/**
* @brief Start the Espressif Task Scheduler, which is an infinit loop. Please do not add code after it.
*
* @param none
*
* @return none
*/
void ets_run(void);
/**
* @brief Set the Idle callback, when Tasks are processed, will call the callback before CPU goto sleep.
*
* @param ets_idle_cb_t func : The callback function.
*
* @param void *arg : Argument of the callback.
*
* @return None
*/
void ets_set_idle_cb(ets_idle_cb_t func, void *arg);
/**
* @brief Init a task with processer, priority, queue to receive Event, queue length.
*
* @param ETSTask task : The task processer.
*
* @param uint8_t prio : Task priority, 0-31, bigger num with high priority, one priority with one task.
*
* @param ETSEvent *queue : Queue belongs to the task, task always receives Events, Queue is circular used.
*
* @param uint8_t qlen : Queue length.
*
* @return None
*/
void ets_task(ETSTask task, uint8_t prio, ETSEvent *queue, uint8_t qlen);
/**
* @brief Post an event to an Task.
*
* @param uint8_t prio : Priority of the Task.
*
* @param ETSSignal sig : Event signal.
*
* @param ETSParam par : Event parameter
*
* @return ETS_OK : post successful
* @return ETS_FAILED : post failed
*/
ETS_STATUS ets_post(uint8_t prio, ETSSignal sig, ETSParam par);
/**
* @}
*/
/** \defgroup ets_boot_apis, Boot routing related apis
* @brief ets boot apis
*/
/** @addtogroup ets_apis
* @{
*/
extern const char *const exc_cause_table[40]; ///**< excption cause that defined by the core.*/
/**
* @brief Set Pro cpu Entry code, code can be called in PRO CPU when booting is not completed.
* When Pro CPU booting is completed, Pro CPU will call the Entry code if not NULL.
*
* @param uint32_t start : the PRO Entry code address value in uint32_t
*
* @return None
*/
void ets_set_user_start(uint32_t start);
/**
* @brief Set Pro cpu Startup code, code can be called when booting is not completed, or in Entry code.
* When Entry code completed, CPU will call the Startup code if not NULL, else call ets_run.
*
* @param uint32_t callback : the Startup code address value in uint32_t
*
* @return None : post successful
*/
void ets_set_startup_callback(uint32_t callback);
/**
* @brief Set App cpu Entry code, code can be called in PRO CPU.
* When APP booting is completed, APP CPU will call the Entry code if not NULL.
*
* @param uint32_t start : the APP Entry code address value in uint32_t, stored in register APPCPU_CTRL_REG_D.
*
* @return None
*/
void ets_set_appcpu_boot_addr(uint32_t start);
/**
* @}
*/
/** \defgroup ets_printf_apis, ets_printf related apis used in ets
* @brief ets printf apis
*/
/** @addtogroup ets_printf_apis
* @{
*/
/**
* @brief Printf the strings to uart or other devices, similar with printf, simple than printf.
* Can not print float point data format, or longlong data format.
* So we maybe only use this in ROM.
*
* @param const char *fmt : See printf.
*
* @param ... : See printf.
*
* @return int : the length printed to the output device.
*/
int ets_printf(const char *fmt, ...);
/**
* @brief Set the uart channel of ets_printf(uart_tx_one_char).
* ROM will set it base on the efuse and gpio setting, however, this can be changed after booting.
*
* @param uart_no : 0 for UART0, 1 for UART1, 2 for UART2.
*
* @return None
*/
void ets_set_printf_channel(uint8_t uart_no);
/**
* @brief Get the uart channel of ets_printf(uart_tx_one_char).
*
* @return uint8_t uart channel used by ets_printf(uart_tx_one_char).
*/
uint8_t ets_get_printf_channel(void);
/**
* @brief Output a char to uart, which uart to output(which is in uart module in ROM) is not in scope of the function.
* Can not print float point data format, or longlong data format
*
* @param char c : char to output.
*
* @return None
*/
void ets_write_char_uart(char c);
/**
* @brief Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
* To install putc1, which is defaulted installed as ets_write_char_uart in none silent boot mode, as NULL in silent mode.
*
* @param void (*)(char) p: Output function to install.
*
* @return None
*/
void ets_install_putc1(void (*p)(char c));
/**
* @brief Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
* To install putc2, which is defaulted installed as NULL.
*
* @param void (*)(char) p: Output function to install.
*
* @return None
*/
void ets_install_putc2(void (*p)(char c));
/**
* @brief Install putc1 as ets_write_char_uart.
* In silent boot mode(to void interfere the UART attached MCU), we can call this function, after booting ok.
*
* @param None
*
* @return None
*/
void ets_install_uart_printf(void);
#define ETS_PRINTF(...) ets_printf(...)
#define ETS_ASSERT(v) do { \
if (!(v)) { \
ets_printf("%s %u \n", __FILE__, __LINE__); \
while (1) {}; \
} \
} while (0);
/**
* @}
*/
/** \defgroup ets_timer_apis, ets_timer related apis used in ets
* @brief ets timer apis
*/
/** @addtogroup ets_timer_apis
* @{
*/
typedef void ETSTimerFunc(void *timer_arg);/**< timer handler*/
typedef struct _ETSTIMER_ {
struct _ETSTIMER_ *timer_next; /**< timer linker*/
uint32_t timer_expire; /**< abstruct time when timer expire*/
uint32_t timer_period; /**< timer period, 0 means timer is not periodic repeated*/
ETSTimerFunc *timer_func; /**< timer handler*/
void *timer_arg; /**< timer handler argument*/
} ETSTimer;
/**
* @brief Init ets timer, this timer range is 640 us to 429496 ms
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_timer_init(void);
/**
* @brief In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_timer_deinit(void);
/**
* @brief Arm an ets timer, this timer range is 640 us to 429496 ms.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @param uint32_t tmout : Timer value in ms, range is 1 to 429496.
*
* @param bool repeat : Timer is periodic repeated.
*
* @return None
*/
void ets_timer_arm(ETSTimer *timer, uint32_t tmout, bool repeat);
/**
* @brief Arm an ets timer, this timer range is 640 us to 429496 ms.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @param uint32_t tmout : Timer value in us, range is 1 to 429496729.
*
* @param bool repeat : Timer is periodic repeated.
*
* @return None
*/
void ets_timer_arm_us(ETSTimer *ptimer, uint32_t us, bool repeat);
/**
* @brief Disarm an ets timer.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @return None
*/
void ets_timer_disarm(ETSTimer *timer);
/**
* @brief Set timer callback and argument.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @param ETSTimerFunc *pfunction : Timer callback.
*
* @param void *parg : Timer callback argument.
*
* @return None
*/
void ets_timer_setfn(ETSTimer *ptimer, ETSTimerFunc *pfunction, void *parg);
/**
* @brief Unset timer callback and argument to NULL.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @return None
*/
void ets_timer_done(ETSTimer *ptimer);
/**
* @brief CPU do while loop for some time.
* In FreeRTOS task, please call FreeRTOS apis.
*
* @param uint32_t us : Delay time in us.
*
* @return None
*/
void ets_delay_us(uint32_t us);
/**
* @brief Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
* Call this function when CPU frequency is changed.
*
* @param uint32_t ticks_per_us : CPU ticks per us.
*
* @return None
*/
void ets_update_cpu_frequency(uint32_t ticks_per_us);
/**
* @brief Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
*
* @note This function only sets the tick rate for the current CPU. It is located in ROM,
* so the deep sleep stub can use it even if IRAM is not initialized yet.
*
* @param uint32_t ticks_per_us : CPU ticks per us.
*
* @return None
*/
void ets_update_cpu_frequency_rom(uint32_t ticks_per_us);
/**
* @brief Get the real CPU ticks per us to the ets.
* This function do not return real CPU ticks per us, just the record in ets. It can be used to check with the real CPU frequency.
*
* @param None
*
* @return uint32_t : CPU ticks per us record in ets.
*/
uint32_t ets_get_cpu_frequency(void);
/**
* @brief Get xtal_freq value, If value not stored in RTC_STORE5, than store.
*
* @param None
*
* @return uint32_t : if stored in efuse(not 0)
* clock = ets_efuse_get_xtal_freq() * 1000000;
* else if analog_8M in efuse
* clock = ets_get_xtal_scale() * 625 / 16 * ets_efuse_get_8M_clock();
* else clock = 40M.
*/
uint32_t ets_get_xtal_freq(void);
/**
* @brief Get the apb divior by xtal frequency.
* When any types of reset happen, the default value is 2.
*
* @param None
*
* @return uint32_t : 1 or 2.
*/
uint32_t ets_get_xtal_div(void);
/**
* @brief Get apb_freq value, If value not stored in RTC_STORE5, than store.
*
* @param None
*
* @return uint32_t : if rtc store the value (RTC_STORE5 high 16 bits and low 16 bits with same value), read from rtc register.
* clock = (REG_READ(RTC_STORE5) & 0xffff) << 12;
* else store ets_get_detected_xtal_freq() in.
*/
uint32_t ets_get_apb_freq(void);
/**
* @}
*/
/** \defgroup ets_intr_apis, ets interrupt configure related apis
* @brief ets intr apis
*/
/** @addtogroup ets_intr_apis
* @{
*/
typedef void (* ets_isr_t)(void *);/**< interrupt handler type*/
/**
* @brief Attach a interrupt handler to a CPU interrupt number.
* This function equals to _xtos_set_interrupt_handler_arg(i, func, arg).
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param int i : CPU interrupt number.
*
* @param ets_isr_t func : Interrupt handler.
*
* @param void *arg : argument of the handler.
*
* @return None
*/
void ets_isr_attach(int i, ets_isr_t func, void *arg);
/**
* @brief Mask the interrupts which show in mask bits.
* This function equals to _xtos_ints_off(mask).
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param uint32_t mask : BIT(i) means mask CPU interrupt number i.
*
* @return None
*/
void ets_isr_mask(uint32_t mask);
/**
* @brief Unmask the interrupts which show in mask bits.
* This function equals to _xtos_ints_on(mask).
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param uint32_t mask : BIT(i) means mask CPU interrupt number i.
*
* @return None
*/
void ets_isr_unmask(uint32_t unmask);
/**
* @brief Lock the interrupt to level 2.
* This function direct set the CPU registers.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_intr_lock(void);
/**
* @brief Unlock the interrupt to level 0.
* This function direct set the CPU registers.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_intr_unlock(void);
/**
* @brief Unlock the interrupt to level 0, and CPU will go into power save mode(wait interrupt).
* This function direct set the CPU registers.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_waiti0(void);
/**
* @brief Attach an CPU interrupt to a hardware source.
* We have 4 steps to use an interrupt:
* 1.Attach hardware interrupt source to CPU. intr_matrix_set(0, ETS_WIFI_MAC_INTR_SOURCE, ETS_WMAC_INUM);
* 2.Set interrupt handler. xt_set_interrupt_handler(ETS_WMAC_INUM, func, NULL);
* 3.Enable interrupt for CPU. xt_ints_on(1 << ETS_WMAC_INUM);
* 4.Enable interrupt in the module.
*
* @param int cpu_no : The CPU which the interrupt number belongs.
*
* @param uint32_t model_num : The interrupt hardware source number, please see the interrupt hardware source table.
*
* @param uint32_t intr_num : The interrupt number CPU, please see the interrupt cpu using table.
*
* @return None
*/
void intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num);
/**
* @}
*/
#ifndef MAC2STR
#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
#endif
#define ETS_MEM_BAR() asm volatile ( "" : : : "memory" )
typedef enum {
OK = 0,
FAIL,
PENDING,
BUSY,
CANCEL,
} STATUS;
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_ETS_SYS_H_ */

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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_GPIO_H_
#define _ROM_GPIO_H_
#include <stdint.h>
#include <stdbool.h>
#include "esp_attr.h"
#include "soc/gpio_reg.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup gpio_apis, uart configuration and communication related apis
* @brief gpio apis
*/
/** @addtogroup gpio_apis
* @{
*/
#define GPIO_REG_READ(reg) READ_PERI_REG(reg)
#define GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(reg, val)
#define GPIO_ID_PIN0 0
#define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n))
#define GPIO_PIN_ADDR(i) (GPIO_PIN0_REG + i*4)
#define GPIO_FUNC_IN_HIGH 0x38
#define GPIO_FUNC_IN_LOW 0x3C
#define GPIO_ID_IS_PIN_REGISTER(reg_id) \
((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1)))
#define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0)
typedef enum {
GPIO_PIN_INTR_DISABLE = 0,
GPIO_PIN_INTR_POSEDGE = 1,
GPIO_PIN_INTR_NEGEDGE = 2,
GPIO_PIN_INTR_ANYEDGE = 3,
GPIO_PIN_INTR_LOLEVEL = 4,
GPIO_PIN_INTR_HILEVEL = 5
} GPIO_INT_TYPE;
#define GPIO_OUTPUT_SET(gpio_no, bit_value) \
((gpio_no < 32) ? gpio_output_set(bit_value<<gpio_no, (bit_value ? 0 : 1)<<gpio_no, 1<<gpio_no,0) : \
gpio_output_set_high(bit_value<<(gpio_no - 32), (bit_value ? 0 : 1)<<(gpio_no - 32), 1<<(gpio_no -32),0))
#define GPIO_DIS_OUTPUT(gpio_no) ((gpio_no < 32) ? gpio_output_set(0,0,0, 1<<gpio_no) : gpio_output_set_high(0,0,0, 1<<(gpio_no - 32)))
#define GPIO_INPUT_GET(gpio_no) ((gpio_no < 32) ? ((gpio_input_get()>>gpio_no)&BIT0) : ((gpio_input_get_high()>>(gpio_no - 32))&BIT0))
/* GPIO interrupt handler, registered through gpio_intr_handler_register */
typedef void (* gpio_intr_handler_fn_t)(uint32_t intr_mask, bool high, void *arg);
/**
* @brief Initialize GPIO. This includes reading the GPIO Configuration DataSet
* to initialize "output enables" and pin configurations for each gpio pin.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void gpio_init(void);
/**
* @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
* There is no particular ordering guaranteed; so if the order of writes is significant,
* calling code should divide a single call into multiple calls.
*
* @param uint32_t set_mask : the gpios that need high level.
*
* @param uint32_t clear_mask : the gpios that need low level.
*
* @param uint32_t enable_mask : the gpios that need be changed.
*
* @param uint32_t disable_mask : the gpios that need diable output.
*
* @return None
*/
void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
/**
* @brief Change GPIO(32-39) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0).
* There is no particular ordering guaranteed; so if the order of writes is significant,
* calling code should divide a single call into multiple calls.
*
* @param uint32_t set_mask : the gpios that need high level.
*
* @param uint32_t clear_mask : the gpios that need low level.
*
* @param uint32_t enable_mask : the gpios that need be changed.
*
* @param uint32_t disable_mask : the gpios that need diable output.
*
* @return None
*/
void gpio_output_set_high(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
/**
* @brief Sample the value of GPIO input pins(0-31) and returns a bitmask.
*
* @param None
*
* @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0.
*/
uint32_t gpio_input_get(void);
/**
* @brief Sample the value of GPIO input pins(32-39) and returns a bitmask.
*
* @param None
*
* @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO32.
*/
uint32_t gpio_input_get_high(void);
/**
* @brief Register an application-specific interrupt handler for GPIO pin interrupts.
* Once the interrupt handler is called, it will not be called again until after a call to gpio_intr_ack.
* Please do not call this function in SDK.
*
* @param gpio_intr_handler_fn_t fn : gpio application-specific interrupt handler
*
* @param void *arg : gpio application-specific interrupt handler argument.
*
* @return None
*/
void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg);
/**
* @brief Get gpio interrupts which happens but not processed.
* Please do not call this function in SDK.
*
* @param None
*
* @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO0.
*/
uint32_t gpio_intr_pending(void);
/**
* @brief Get gpio interrupts which happens but not processed.
* Please do not call this function in SDK.
*
* @param None
*
* @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO32.
*/
uint32_t gpio_intr_pending_high(void);
/**
* @brief Ack gpio interrupts to process pending interrupts.
* Please do not call this function in SDK.
*
* @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO0.
*
* @return None
*/
void gpio_intr_ack(uint32_t ack_mask);
/**
* @brief Ack gpio interrupts to process pending interrupts.
* Please do not call this function in SDK.
*
* @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO32.
*
* @return None
*/
void gpio_intr_ack_high(uint32_t ack_mask);
/**
* @brief Set GPIO to wakeup the ESP32.
* Please do not call this function in SDK.
*
* @param uint32_t i: gpio number.
*
* @param GPIO_INT_TYPE intr_state : only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be used
*
* @return None
*/
void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state);
/**
* @brief disable GPIOs to wakeup the ESP32.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void gpio_pin_wakeup_disable(void);
/**
* @brief set gpio input to a signal, one gpio can input to several signals.
*
* @param uint32_t gpio : gpio number, 0~0x2f
* gpio == 0x3C, input 0 to signal
* gpio == 0x3A, input nothing to signal
* gpio == 0x38, input 1 to signal
*
* @param uint32_t signal_idx : signal index.
*
* @param bool inv : the signal is inv or not
*
* @return None
*/
void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
/**
* @brief set signal output to gpio, one signal can output to several gpios.
*
* @param uint32_t gpio : gpio number, 0~0x2f
*
* @param uint32_t signal_idx : signal index.
* signal_idx == 0x100, cancel output put to the gpio
*
* @param bool out_inv : the signal output is invert or not
*
* @param bool oen_inv : the signal output enable is invert or not
*
* @return None
*/
void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_inv);
/**
* @brief Select pad as a gpio function from IOMUX.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_select_gpio(uint32_t gpio_num);
/**
* @brief Set pad driver capability.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @param uint32_t drv : 0-3
*
* @return None
*/
void gpio_pad_set_drv(uint32_t gpio_num, uint32_t drv);
/**
* @brief Pull up the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_pullup(uint32_t gpio_num);
/**
* @brief Pull down the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_pulldown(uint32_t gpio_num);
/**
* @brief Unhold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_unhold(uint32_t gpio_num);
/**
* @brief Hold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_hold(uint32_t gpio_num);
/**
* @brief enable gpio pad input.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_input_enable(uint32_t gpio_num);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_GPIO_H_ */

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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_HMAC_H_
#define _ROM_HMAC_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#include <stdlib.h>
#include "efuse.h"
void ets_hmac_enable(void);
void ets_hmac_disable(void);
/* Use the "upstream" HMAC key (ETS_EFUSE_KEY_PURPOSE_HMAC_UP)
to digest a message.
*/
int ets_hmac_calculate_message(ets_efuse_block_t key_block, const void *message, size_t message_len, uint8_t *hmac);
/* Calculate a downstream HMAC message to temporarily enable JTAG, or
to generate a Digital Signature data decryption key.
- purpose must be ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE
or ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG
- key_block must be in range ETS_EFUSE_BLOCK_KEY0 toETS_EFUSE_BLOCK_KEY6.
This efuse block must have the corresponding purpose set in "purpose", or
ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL.
The result of this HMAC calculation is only made available "downstream" to the
corresponding hardware module, and cannot be accessed by software.
*/
int ets_hmac_calculate_downstream(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose);
/* Invalidate a downstream HMAC value previously calculated by ets_hmac_calculate_downstream().
*
* - purpose must match a previous call to ets_hmac_calculate_downstream().
*
* After this function is called, the corresponding internal operation (JTAG or DS) will no longer
* have access to the generated key.
*/
int ets_hmac_invalidate_downstream(ets_efuse_purpose_t purpose);
#ifdef __cplusplus
}
#endif
#endif // _ROM_HMAC_H_

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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_LIBC_STUBS_H_
#define _ROM_LIBC_STUBS_H_
#include <sys/lock.h>
#include <stddef.h>
#include <stdint.h>
#include <stdio.h>
#include <stdarg.h>
#include <reent.h>
#include <errno.h>
#ifdef __cplusplus
extern "C" {
#endif
/*
ESP32 ROM code contains implementations of some of C library functions.
Whenever a function in ROM needs to use a syscall, it calls a pointer to the corresponding syscall
implementation defined in the following struct.
The table itself, by default, is not allocated in RAM. A global pointer syscall_table_ptr is used to
set the address
So, before using any of the C library functions (except for pure functions and memcpy/memset functions),
application must allocate syscall table structure for each CPU being used, and populate it with pointers
to actual implementations of corresponding syscalls.
*/
struct syscall_stub_table
{
struct _reent* (*__getreent)(void);
void* (*_malloc_r)(struct _reent *r, size_t);
void (*_free_r)(struct _reent *r, void*);
void* (*_realloc_r)(struct _reent *r, void*, size_t);
void* (*_calloc_r)(struct _reent *r, size_t, size_t);
void (*_abort)(void);
int (*_system_r)(struct _reent *r, const char*);
int (*_rename_r)(struct _reent *r, const char*, const char*);
clock_t (*_times_r)(struct _reent *r, struct tms *);
int (*_gettimeofday_r) (struct _reent *r, struct timeval *, void *);
void (*_raise_r)(struct _reent *r);
int (*_unlink_r)(struct _reent *r, const char*);
int (*_link_r)(struct _reent *r, const char*, const char*);
int (*_stat_r)(struct _reent *r, const char*, struct stat *);
int (*_fstat_r)(struct _reent *r, int, struct stat *);
void* (*_sbrk_r)(struct _reent *r, ptrdiff_t);
int (*_getpid_r)(struct _reent *r);
int (*_kill_r)(struct _reent *r, int, int);
void (*_exit_r)(struct _reent *r, int);
int (*_close_r)(struct _reent *r, int);
int (*_open_r)(struct _reent *r, const char *, int, int);
int (*_write_r)(struct _reent *r, int, const void *, int);
int (*_lseek_r)(struct _reent *r, int, int, int);
int (*_read_r)(struct _reent *r, int, void *, int);
#ifdef _RETARGETABLE_LOCKING
void (*_retarget_lock_init)(_LOCK_T *lock);
void (*_retarget_lock_init_recursive)(_LOCK_T *lock);
void (*_retarget_lock_close)(_LOCK_T lock);
void (*_retarget_lock_close_recursive)(_LOCK_T lock);
void (*_retarget_lock_acquire)(_LOCK_T lock);
void (*_retarget_lock_acquire_recursive)(_LOCK_T lock);
int (*_retarget_lock_try_acquire)(_LOCK_T lock);
int (*_retarget_lock_try_acquire_recursive)(_LOCK_T lock);
void (*_retarget_lock_release)(_LOCK_T lock);
void (*_retarget_lock_release_recursive)(_LOCK_T lock);
#else
void (*_lock_init)(_lock_t *lock);
void (*_lock_init_recursive)(_lock_t *lock);
void (*_lock_close)(_lock_t *lock);
void (*_lock_close_recursive)(_lock_t *lock);
void (*_lock_acquire)(_lock_t *lock);
void (*_lock_acquire_recursive)(_lock_t *lock);
int (*_lock_try_acquire)(_lock_t *lock);
int (*_lock_try_acquire_recursive)(_lock_t *lock);
void (*_lock_release)(_lock_t *lock);
void (*_lock_release_recursive)(_lock_t *lock);
#endif
int (*_printf_float)(struct _reent *data, void *pdata, FILE * fp, int (*pfunc) (struct _reent *, FILE *, const char *, size_t len), va_list * ap);
int (*_scanf_float) (struct _reent *rptr, void *pdata, FILE *fp, va_list *ap);
void (*__assert_func) (const char *file, int line, const char * func, const char *failedexpr) __attribute__((noreturn));
void (*__sinit) (struct _reent *r);
void (*_cleanup_r) (struct _reent* r);
};
extern struct syscall_stub_table *syscall_table_ptr;
#ifdef __cplusplus
} // extern "C"
#endif
#endif /* _ROM_LIBC_STUBS_H_ */

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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_LLDESC_H_
#define _ROM_LLDESC_H_
#include <stdint.h>
#include "sys/queue.h"
#ifdef __cplusplus
extern "C" {
#endif
#define LLDESC_TX_MBLK_SIZE 268 /* */
#define LLDESC_RX_SMBLK_SIZE 64 /* small block size, for small mgmt frame */
#define LLDESC_RX_MBLK_SIZE 524 /* rx is large sinec we want to contain mgmt frame in one block*/
#define LLDESC_RX_AMPDU_ENTRY_MBLK_SIZE 64 /* it is a small buffer which is a cycle link*/
#define LLDESC_RX_AMPDU_LEN_MBLK_SIZE 256 /*for ampdu entry*/
#ifdef ESP_MAC_5
#define LLDESC_TX_MBLK_NUM 116 /* 64K / 256 */
#define LLDESC_RX_MBLK_NUM 82 /* 64K / 512 MAX 172*/
#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM 4
#define LLDESC_RX_AMPDU_LEN_MLBK_NUM 12
#else
#ifdef SBUF_RXTX
#define LLDESC_TX_MBLK_NUM_MAX (2 * 48) /* 23K / 260 - 8 */
#define LLDESC_RX_MBLK_NUM_MAX (2 * 48) /* 23K / 524 */
#define LLDESC_TX_MBLK_NUM_MIN (2 * 16) /* 23K / 260 - 8 */
#define LLDESC_RX_MBLK_NUM_MIN (2 * 16) /* 23K / 524 */
#endif
#define LLDESC_TX_MBLK_NUM 10 //(2 * 32) /* 23K / 260 - 8 */
#ifdef IEEE80211_RX_AMPDU
#define LLDESC_RX_MBLK_NUM 30
#else
#define LLDESC_RX_MBLK_NUM 10
#endif /*IEEE80211_RX_AMPDU*/
#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM 4
#define LLDESC_RX_AMPDU_LEN_MLBK_NUM 8
#endif /* !ESP_MAC_5 */
/*
* SLC2 DMA Desc struct, aka lldesc_t
*
* --------------------------------------------------------------
* | own | EoF | sub_sof | 5'b0 | length [11:0] | size [11:0] |
* --------------------------------------------------------------
* | buf_ptr [31:0] |
* --------------------------------------------------------------
* | next_desc_ptr [31:0] |
* --------------------------------------------------------------
*/
/* this bitfield is start from the LSB!!! */
typedef struct lldesc_s {
volatile uint32_t size : 12,
length: 12,
offset: 5, /* h/w reserved 5bit, s/w use it as offset in buffer */
sosf : 1, /* start of sub-frame */
eof : 1, /* end of frame */
owner : 1; /* hw or sw */
volatile const uint8_t *buf; /* point to buffer data */
union {
volatile uint32_t empty;
STAILQ_ENTRY(lldesc_s) qe; /* pointing to the next desc */
};
} lldesc_t;
typedef struct tx_ampdu_entry_s {
uint32_t sub_len : 12,
dili_num : 7,
: 1,
null_byte: 2,
data : 1,
enc : 1,
seq : 8;
} tx_ampdu_entry_t;
typedef struct lldesc_chain_s {
lldesc_t *head;
lldesc_t *tail;
} lldesc_chain_t;
#ifdef SBUF_RXTX
enum sbuf_mask_s {
SBUF_MOVE_NO = 0,
SBUF_MOVE_TX2RX,
SBUF_MOVE_RX2TX,
} ;
#define SBUF_MOVE_STEP 8
#endif
#define LLDESC_SIZE sizeof(struct lldesc_s)
/* SLC Descriptor */
#define LLDESC_OWNER_MASK 0x80000000
#define LLDESC_OWNER_SHIFT 31
#define LLDESC_SW_OWNED 0
#define LLDESC_HW_OWNED 1
#define LLDESC_EOF_MASK 0x40000000
#define LLDESC_EOF_SHIFT 30
#define LLDESC_SOSF_MASK 0x20000000
#define LLDESC_SOSF_SHIFT 29
#define LLDESC_LENGTH_MASK 0x00fff000
#define LLDESC_LENGTH_SHIFT 12
#define LLDESC_SIZE_MASK 0x00000fff
#define LLDESC_SIZE_SHIFT 0
#define LLDESC_ADDR_MASK 0x000fffff
void lldesc_build_chain(uint8_t *descptr, uint32_t desclen, uint8_t *mblkptr, uint32_t buflen, uint32_t blksz, uint8_t owner,
lldesc_t **head,
#ifdef TO_HOST_RESTART
lldesc_t **one_before_tail,
#endif
lldesc_t **tail);
lldesc_t *lldesc_num2link(lldesc_t *head, uint16_t nblks);
lldesc_t *lldesc_set_owner(lldesc_t *head, uint16_t nblks, uint8_t owner);
static inline uint32_t lldesc_get_chain_length(lldesc_t *head)
{
lldesc_t *ds = head;
uint32_t len = 0;
while (ds) {
len += ds->length;
ds = STAILQ_NEXT(ds, qe);
}
return len;
}
static inline void lldesc_config(lldesc_t *ds, uint8_t owner, uint8_t eof, uint8_t sosf, uint16_t len)
{
ds->owner = owner;
ds->eof = eof;
ds->sosf = sosf;
ds->length = len;
}
#define LLDESC_CONFIG(_desc, _owner, _eof, _sosf, _len) do { \
(_desc)->owner = (_owner); \
(_desc)->eof = (_eof); \
(_desc)->sosf = (_sosf); \
(_desc)->length = (_len); \
} while(0)
#define LLDESC_FROM_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
#define LLDESC_MAC_RX_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, (ds)->size)
#define LLDESC_TO_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
#ifdef __cplusplus
}
#endif
#endif /* _ROM_LLDESC_H_ */

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