diff --git a/tools/sdk/bin/bootloader.bin b/tools/sdk/bin/bootloader.bin index fac18c4d..c0e6d1c1 100644 Binary files a/tools/sdk/bin/bootloader.bin and b/tools/sdk/bin/bootloader.bin differ diff --git a/tools/sdk/include/config/sdkconfig.h b/tools/sdk/include/config/sdkconfig.h index faf1423d..790e17d7 100644 --- a/tools/sdk/include/config/sdkconfig.h +++ b/tools/sdk/include/config/sdkconfig.h @@ -9,27 +9,23 @@ #define CONFIG_ESPTOOLPY_FLASHSIZE_4MB 1 #define CONFIG_ESPTOOLPY_FLASHFREQ "80m" #define CONFIG_NEWLIB_STDOUT_ADDCR 1 -#define CONFIG_TASK_WDT_CHECK_IDLE_TASK 1 #define CONFIG_ESPTOOLPY_FLASHSIZE "4MB" -#define CONFIG_INT_WDT 1 +#define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL 1 #define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 1 #define CONFIG_BT_RESERVE_DRAM 0x0 +#define CONFIG_LOG_BOOTLOADER_LEVEL_ERROR 1 #define CONFIG_LWIP_MAX_SOCKETS 4 #define CONFIG_ESP32_DEFAULT_CPU_FREQ_160 1 -#define CONFIG_ULP_COPROC_RESERVE_MEM 32 +#define CONFIG_ULP_COPROC_RESERVE_MEM 0 #define CONFIG_ESPTOOLPY_BAUD 921600 -#define CONFIG_INT_WDT_CHECK_CPU1 1 #define CONFIG_TOOLPREFIX "xtensa-esp32-elf-" #define CONFIG_LWIP_THREAD_LOCAL_STORAGE_INDEX 0 #define CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN 16384 #define CONFIG_ESP32_ENABLE_STACK_WIFI 1 -#define CONFIG_TASK_WDT 1 +#define CONFIG_LOG_DEFAULT_LEVEL_ERROR 1 #define CONFIG_MAIN_TASK_STACK_SIZE 4096 -#define CONFIG_TASK_WDT_TIMEOUT_S 5 -#define CONFIG_INT_WDT_TIMEOUT_MS 10 #define CONFIG_ESPTOOLPY_FLASHMODE "dio" -#define CONFIG_LOG_DEFAULT_LEVEL 0 -#define CONFIG_ULP_COPROC_ENABLED 1 +#define CONFIG_LOG_DEFAULT_LEVEL 1 #define CONFIG_ESPTOOLPY_FLASHMODE_DIO 1 #define CONFIG_PYTHON "python" #define CONFIG_ESPTOOLPY_COMPRESSED 1 @@ -39,22 +35,19 @@ #define CONFIG_ESPTOOLPY_FLASHFREQ_80M 1 #define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE 2048 #define CONFIG_PARTITION_TABLE_CUSTOM_APP_BIN_OFFSET 0x10000 -#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1 1 #define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 160 #define CONFIG_FREERTOS_HZ 1000 #define CONFIG_FREERTOS_ASSERT_FAIL_ABORT 1 -#define CONFIG_LOG_BOOTLOADER_LEVEL 0 +#define CONFIG_LOG_BOOTLOADER_LEVEL 1 #define CONFIG_ESPTOOLPY_BAUD_OTHER_VAL 115200 -#define CONFIG_LOG_BOOTLOADER_LEVEL_NONE 1 #define CONFIG_LWIP_SO_REUSE 1 -#define CONFIG_ESP32_DEBUG_OCDAWARE 1 -#define CONFIG_LOG_DEFAULT_LEVEL_NONE 1 #define CONFIG_FREERTOS_CORETIMER_0 1 #define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv" +#define CONFIG_OPTIMIZATION_LEVEL_DEBUG 1 #define CONFIG_SYSTEM_EVENT_QUEUE_SIZE 32 #define CONFIG_ESPTOOLPY_BAUD_921600B 1 #define CONFIG_APP_OFFSET 0x10000 #define CONFIG_MEMMAP_SMP 1 #define CONFIG_ESPTOOLPY_PORT "/dev/tty.SLAB_USBtoUART" -#define CONFIG_OPTIMIZATION_LEVEL_RELEASE 1 #define CONFIG_ESP32_PANIC_PRINT_HALT 1 +#define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_ERROR 1 diff --git a/tools/sdk/ld/esp32_out.ld b/tools/sdk/ld/esp32_out.ld index 8ff6b9a5..5e7cd392 100644 --- a/tools/sdk/ld/esp32_out.ld +++ b/tools/sdk/ld/esp32_out.ld @@ -45,8 +45,8 @@ MEMORY Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled. */ - rtc_slow_seg(RW) : org = 0x50000000 + 32, - len = 0x1000 - 32 + rtc_slow_seg(RW) : org = 0x50000000 + 0, + len = 0x1000 - 0 } /* Heap ends at top of dram0_0_seg */ _heap_end = 0x40000000 - 0x0; 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