diff --git a/boards.txt b/boards.txt index cac3bbc1..279a11e3 100644 --- a/boards.txt +++ b/boards.txt @@ -3116,8 +3116,8 @@ CoreESP32.upload.maximum_size=1310720 CoreESP32.upload.maximum_data_size=327680 CoreESP32.upload.wait_for_upload_port=true -CoreESP32.serial.disableDTR=true -CoreESP32.serial.disableRTS=true +CoreESP32.serial.disableDTR=false +CoreESP32.serial.disableRTS=false CoreESP32.build.mcu=esp32 CoreESP32.build.core=esp32 @@ -3131,6 +3131,24 @@ CoreESP32.build.boot=dio CoreESP32.build.partitions=default CoreESP32.build.defines= +CoreESP32.menu.PSRAM.disabled=Disabled +CoreESP32.menu.PSRAM.disabled.build.defines= +CoreESP32.menu.PSRAM.enabled=Enabled +CoreESP32.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM -mfix-esp32-psram-cache-issue + +CoreESP32.menu.PartitionScheme.default=Default +CoreESP32.menu.PartitionScheme.default.build.partitions=default +CoreESP32.menu.PartitionScheme.minimal=Minimal (2MB FLASH) +CoreESP32.menu.PartitionScheme.minimal.build.partitions=minimal +CoreESP32.menu.PartitionScheme.no_ota=No OTA (Large APP) +CoreESP32.menu.PartitionScheme.no_ota.build.partitions=no_ota +CoreESP32.menu.PartitionScheme.no_ota.upload.maximum_size=2097152 +CoreESP32.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (Large APPS with OTA) +CoreESP32.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs +CoreESP32.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080 +CoreESP32.menu.PartitionScheme.fatflash=16M Fat +CoreESP32.menu.PartitionScheme.fatflash.build.partitions=ffat + CoreESP32.menu.FlashFreq.80=80MHz CoreESP32.menu.FlashFreq.80.build.flash_freq=80m CoreESP32.menu.FlashFreq.40=40MHz @@ -3151,6 +3169,19 @@ CoreESP32.menu.UploadSpeed.460800.upload.speed=460800 CoreESP32.menu.UploadSpeed.512000.windows=512000 CoreESP32.menu.UploadSpeed.512000.upload.speed=512000 +CoreESP32.menu.DebugLevel.none=None +CoreESP32.menu.DebugLevel.none.build.code_debug=0 +CoreESP32.menu.DebugLevel.error=Error +CoreESP32.menu.DebugLevel.error.build.code_debug=1 +CoreESP32.menu.DebugLevel.warn=Warn +CoreESP32.menu.DebugLevel.warn.build.code_debug=2 +CoreESP32.menu.DebugLevel.info=Info +CoreESP32.menu.DebugLevel.info.build.code_debug=3 +CoreESP32.menu.DebugLevel.debug=Debug +CoreESP32.menu.DebugLevel.debug.build.code_debug=4 +CoreESP32.menu.DebugLevel.verbose=Verbose +CoreESP32.menu.DebugLevel.verbose.build.code_debug=5 + ##############################################################