diff --git a/platform.txt b/platform.txt
index d357971b..ee51f533 100644
--- a/platform.txt
+++ b/platform.txt
@@ -23,12 +23,12 @@ compiler.prefix={build.tarch}-{build.target}-elf-
 #
 # ESP32 Support Start
 #
-compiler.cpreprocessor.flags.esp32=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4-dev-2030-gd93887f9f-dirty" -DESP_PLATFORM   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/port/xtensa/include" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32" "-I{compiler.sdk.path}/include/soc/esp32/include" "-I{compiler.sdk.path}/include/hal/esp32/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/hal/platform_port/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/esp32" "-I{compiler.sdk.path}/include/esp_rom/include/esp32" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/esp32/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32/include" "-I{compiler.sdk.path}/include/xtensa/include" "-I{compiler.sdk.path}/include/xtensa/esp32/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/esp_phy/include" "-I{compiler.sdk.path}/include/esp_phy/esp32/include" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/xtensa" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/xtensa" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/include/esp_supplicant" "-I{compiler.sdk.path}/include/perfmon/include" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/bt/common/osi/include" "-I{compiler.sdk.path}/include/bt/include/esp32/include" "-I{compiler.sdk.path}/include/bt/common/api/include/api" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/blufi/include" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/include" "-I{compiler.sdk.path}/include/bt/host/bluedroid/api/include/api" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/port/include/coap" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/coap/libcoap/include/coap2" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_lcd/include" "-I{compiler.sdk.path}/include/esp_lcd/interface" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/ulp/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/button/button/include" "-I{compiler.sdk.path}/include/json_parser" "-I{compiler.sdk.path}/include/json_parser/jsmn/include" "-I{compiler.sdk.path}/include/json_generator" "-I{compiler.sdk.path}/include/esp_schedule/include" "-I{compiler.sdk.path}/include/esp_rainmaker/include" "-I{compiler.sdk.path}/include/qrcode/include" "-I{compiler.sdk.path}/include/ws2812_led" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dotprod/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/support/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/hann/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_harris/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/flat_top/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/iir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/add/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sub/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mul/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/addc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mulc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sqrt/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/matrix/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fft/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dct/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/conv/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/common/include" "-I{compiler.sdk.path}/include/esp-face/face_detection/include" "-I{compiler.sdk.path}/include/esp-face/face_recognition/include" "-I{compiler.sdk.path}/include/esp-face/object_detection/include" "-I{compiler.sdk.path}/include/esp-face/image_util/include" "-I{compiler.sdk.path}/include/esp-face/pose_estimation/include" "-I{compiler.sdk.path}/include/esp-face/lib/include" "-I{compiler.sdk.path}/include/esp32-camera/driver/include" "-I{compiler.sdk.path}/include/esp32-camera/conversions/include" "-I{compiler.sdk.path}/include/fb_gfx/include"
-compiler.c.elf.libs.esp32=-lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lbt -lcbor -lunity -lcmock -lcoap -lconsole -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_lcd -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lspiffs -lulp -lwifi_provisioning -lbutton -ljson_parser -ljson_generator -lesp_schedule -lesp_rainmaker -lqrcode -lws2812_led -lesp-dsp -lesp-face -lesp32-camera -lesp_littlefs -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_hid -lesp_lcd -lesp_local_ctrl -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lesp_adc_cal -lfatfs -lwear_levelling -lopenssl -lspiffs -lesp_rainmaker -lmqtt -lwifi_provisioning -lprotocomm -lbt -lbtdm_app -lprotobuf-c -lmdns -lconsole -ljson -ljson_parser -ljson_generator -lesp_schedule -lqrcode -lpe -lfd -lfr -ldetection_cat_face -ldetection -ldl -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lesp_phy -lphy -lesp_phy -lphy -lrtc -lxt_hal -lm -lnewlib -lstdc++ -lpthread -lgcc -lcxx -lapp_trace -lgcov -lapp_trace -lgcov -lc 
+compiler.cpreprocessor.flags.esp32=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4-dev-2313-gc69f0ec32" -DESP_PLATFORM   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/port/xtensa/include" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc/esp32" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32" "-I{compiler.sdk.path}/include/soc/esp32/include" "-I{compiler.sdk.path}/include/hal/esp32/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/hal/platform_port/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/esp32" "-I{compiler.sdk.path}/include/esp_rom/include/esp32" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/esp32/include" "-I{compiler.sdk.path}/include/xtensa/include" "-I{compiler.sdk.path}/include/xtensa/esp32/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/esp_phy/include" "-I{compiler.sdk.path}/include/esp_phy/esp32/include" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/xtensa" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/xtensa" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/include/esp_supplicant" "-I{compiler.sdk.path}/include/ieee802154/include" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/bt/common/osi/include" "-I{compiler.sdk.path}/include/bt/include/esp32/include" "-I{compiler.sdk.path}/include/bt/common/api/include/api" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/blufi/include" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/include" "-I{compiler.sdk.path}/include/bt/host/bluedroid/api/include/api" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/port/include/coap" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/coap/libcoap/include/coap2" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_lcd/include" "-I{compiler.sdk.path}/include/esp_lcd/interface" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/perfmon/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/ulp/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/button/button/include" "-I{compiler.sdk.path}/include/json_parser" "-I{compiler.sdk.path}/include/json_parser/jsmn/include" "-I{compiler.sdk.path}/include/json_generator" "-I{compiler.sdk.path}/include/esp_schedule/include" "-I{compiler.sdk.path}/include/esp_rainmaker/include" "-I{compiler.sdk.path}/include/qrcode/include" "-I{compiler.sdk.path}/include/ws2812_led" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dotprod/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/support/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/hann/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_harris/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/flat_top/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/iir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/add/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sub/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mul/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/addc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mulc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sqrt/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/matrix/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fft/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dct/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/conv/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/common/include" "-I{compiler.sdk.path}/include/esp-face/face_detection/include" "-I{compiler.sdk.path}/include/esp-face/face_recognition/include" "-I{compiler.sdk.path}/include/esp-face/object_detection/include" "-I{compiler.sdk.path}/include/esp-face/image_util/include" "-I{compiler.sdk.path}/include/esp-face/pose_estimation/include" "-I{compiler.sdk.path}/include/esp-face/lib/include" "-I{compiler.sdk.path}/include/esp32-camera/driver/include" "-I{compiler.sdk.path}/include/esp32-camera/conversions/include" "-I{compiler.sdk.path}/include/fb_gfx/include"
+compiler.c.elf.libs.esp32=-lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lbt -lcbor -lunity -lcmock -lcoap -lconsole -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_lcd -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lperfmon -lspiffs -lulp -lwifi_provisioning -lbutton -ljson_parser -ljson_generator -lesp_schedule -lesp_rainmaker -lqrcode -lws2812_led -lesp-dsp -lesp-face -lesp32-camera -lesp_littlefs -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_hid -lesp_lcd -lesp_local_ctrl -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lperfmon -lesp_adc_cal -lfatfs -lwear_levelling -lopenssl -lspiffs -lesp_rainmaker -lmqtt -lwifi_provisioning -lprotocomm -lbt -lbtdm_app -lprotobuf-c -lmdns -lconsole -ljson -ljson_parser -ljson_generator -lesp_schedule -lqrcode -lpe -lfd -lfr -ldetection_cat_face -ldetection -ldl -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lesp_phy -lphy -lesp_phy -lphy -lrtc -lxt_hal -lm -lnewlib -lstdc++ -lpthread -lgcc -lcxx -lapp_trace -lgcov -lapp_trace -lgcov -lc 
 compiler.c.flags.esp32=-mlongcalls -Wno-frame-address -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -O2 -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion -std=gnu99 -Wno-old-style-declaration  -MMD -c
 compiler.cpp.flags.esp32=-mlongcalls -Wno-frame-address -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -O2 -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion -std=gnu++11 -fexceptions -fno-rtti  -MMD -c
 compiler.S.flags.esp32=-ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -O2 -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion  -x assembler-with-cpp -MMD -c
-compiler.c.elf.flags.esp32=-T esp32.rom.redefined.ld -T esp32.rom.ld -T esp32.rom.api.ld -T esp32.rom.libgcc.ld -T esp32.rom.newlib-data.ld -T esp32.rom.syscalls.ld -T esp32_out.ld -T esp32.project.ld -T esp32.peripherals.ld  -mlongcalls -Wno-frame-address -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -u _Z5setupv -u _Z4loopv -Wl,--wrap=mbedtls_mpi_exp_mod -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u ld_include_panic_highint_hdl -u start_app -u start_app_other_cores -u __ubsan_include -Wl,--wrap=longjmp -u __assert_func -u vfs_include_syscalls_impl -u call_user_start_cpu0 -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -u __cxa_guard_dummy 
+compiler.c.elf.flags.esp32=-T esp32.rom.redefined.ld -T memory.ld -T sections.ld -T esp32.rom.ld -T esp32.rom.api.ld -T esp32.rom.libgcc.ld -T esp32.rom.newlib-data.ld -T esp32.rom.syscalls.ld -T esp32.peripherals.ld  -mlongcalls -Wno-frame-address -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -u _Z5setupv -u _Z4loopv -Wl,--wrap=mbedtls_mpi_exp_mod -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u ld_include_panic_highint_hdl -u start_app -u start_app_other_cores -u __ubsan_include -Wl,--wrap=longjmp -u __assert_func -u vfs_include_syscalls_impl -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -u __cxa_guard_dummy 
 compiler.ar.flags.esp32=cr
 build.extra_flags.esp32=-DARDUINO_SERIAL_PORT=0
 #
@@ -38,12 +38,12 @@ build.extra_flags.esp32=-DARDUINO_SERIAL_PORT=0
 #
 # ESP32S2 Support Start
 #
-compiler.cpreprocessor.flags.esp32s2=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4-dev-2030-gd93887f9f-dirty" -DESP_PLATFORM   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/port/xtensa/include" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32s2" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32s2/private_include" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32s2" "-I{compiler.sdk.path}/include/soc/esp32s2/include" "-I{compiler.sdk.path}/include/hal/esp32s2/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/hal/platform_port/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/esp32s2" "-I{compiler.sdk.path}/include/esp_rom/include/esp32s2" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/esp32s2/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32s2/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32s2/include" "-I{compiler.sdk.path}/include/xtensa/include" "-I{compiler.sdk.path}/include/xtensa/esp32s2/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/esp_phy/include" "-I{compiler.sdk.path}/include/esp_phy/esp32s2/include" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/xtensa" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32s2" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/xtensa" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/include/esp_supplicant" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/port/include/coap" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/coap/libcoap/include/coap2" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_https_server/include" "-I{compiler.sdk.path}/include/esp_lcd/include" "-I{compiler.sdk.path}/include/esp_lcd/interface" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32s2" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/perfmon/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/touch_element/include" "-I{compiler.sdk.path}/include/ulp/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/freertos/include/freertos" "-I{compiler.sdk.path}/include/arduino_tinyusb/tinyusb/src" "-I{compiler.sdk.path}/include/arduino_tinyusb/include" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dotprod/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/support/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/hann/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_harris/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/flat_top/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/iir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/add/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sub/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mul/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/addc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mulc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sqrt/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/matrix/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fft/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dct/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/conv/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/common/include" "-I{compiler.sdk.path}/include/esp-face/face_detection/include" "-I{compiler.sdk.path}/include/esp-face/face_recognition/include" "-I{compiler.sdk.path}/include/esp-face/object_detection/include" "-I{compiler.sdk.path}/include/esp-face/image_util/include" "-I{compiler.sdk.path}/include/esp-face/pose_estimation/include" "-I{compiler.sdk.path}/include/esp-face/lib/include" "-I{compiler.sdk.path}/include/esp32-camera/driver/include" "-I{compiler.sdk.path}/include/esp32-camera/conversions/include" "-I{compiler.sdk.path}/include/fb_gfx/include"
-compiler.c.elf.libs.esp32s2=-lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lcbor -lunity -lcmock -lcoap -lconsole -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_https_server -lesp_lcd -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lperfmon -lspiffs -ltouch_element -lulp -lusb -lwifi_provisioning -lesp-dsp -lesp-face -lesp32-camera -lesp_littlefs -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_hid -lesp_lcd -lesp_local_ctrl -lesp_https_server -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lmqtt -lperfmon -ltouch_element -lusb -lesp_adc_cal -lfatfs -lwear_levelling -lopenssl -lspiffs -lwifi_provisioning -lprotocomm -lprotobuf-c -lmdns -lconsole -ljson -larduino_tinyusb -lpe -lfd -lfr -ldetection_cat_face -ldetection -ldl -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lesp_phy -lphy -lesp_phy -lphy -lxt_hal -lm -lnewlib -lstdc++ -lpthread -lgcc -lcxx -lapp_trace -lgcov -lapp_trace -lgcov -lc 
+compiler.cpreprocessor.flags.esp32s2=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4-dev-2313-gc69f0ec32" -DESP_PLATFORM   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/port/xtensa/include" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc/esp32s2" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32s2" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32s2/private_include" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32s2" "-I{compiler.sdk.path}/include/soc/esp32s2/include" "-I{compiler.sdk.path}/include/hal/esp32s2/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/hal/platform_port/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/esp32s2" "-I{compiler.sdk.path}/include/esp_rom/include/esp32s2" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/xtensa/include" "-I{compiler.sdk.path}/include/xtensa/esp32s2/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32s2/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32s2/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/esp_phy/include" "-I{compiler.sdk.path}/include/esp_phy/esp32s2/include" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/xtensa" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32s2" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/xtensa" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/include/esp_supplicant" "-I{compiler.sdk.path}/include/ieee802154/include" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/port/include/coap" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/coap/libcoap/include/coap2" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_https_server/include" "-I{compiler.sdk.path}/include/esp_lcd/include" "-I{compiler.sdk.path}/include/esp_lcd/interface" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32s2" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/perfmon/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/touch_element/include" "-I{compiler.sdk.path}/include/ulp/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/freertos/include/freertos" "-I{compiler.sdk.path}/include/arduino_tinyusb/tinyusb/src" "-I{compiler.sdk.path}/include/arduino_tinyusb/include" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dotprod/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/support/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/hann/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_harris/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/flat_top/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/iir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/add/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sub/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mul/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/addc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mulc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sqrt/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/matrix/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fft/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dct/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/conv/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/common/include" "-I{compiler.sdk.path}/include/esp-face/face_detection/include" "-I{compiler.sdk.path}/include/esp-face/face_recognition/include" "-I{compiler.sdk.path}/include/esp-face/object_detection/include" "-I{compiler.sdk.path}/include/esp-face/image_util/include" "-I{compiler.sdk.path}/include/esp-face/pose_estimation/include" "-I{compiler.sdk.path}/include/esp-face/lib/include" "-I{compiler.sdk.path}/include/esp32-camera/driver/include" "-I{compiler.sdk.path}/include/esp32-camera/conversions/include" "-I{compiler.sdk.path}/include/fb_gfx/include"
+compiler.c.elf.libs.esp32s2=-lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lcbor -lunity -lcmock -lcoap -lconsole -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_https_server -lesp_lcd -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lperfmon -lspiffs -ltouch_element -lulp -lusb -lwifi_provisioning -lesp-dsp -lesp-face -lesp32-camera -lesp_littlefs -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_hid -lesp_lcd -lesp_local_ctrl -lesp_https_server -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lmqtt -lperfmon -ltouch_element -lusb -lesp_adc_cal -lfatfs -lwear_levelling -lopenssl -lspiffs -lwifi_provisioning -lprotocomm -lprotobuf-c -lmdns -lconsole -ljson -larduino_tinyusb -lpe -lfd -lfr -ldetection_cat_face -ldetection -ldl -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lxtensa -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lesp_phy -lphy -lesp_phy -lphy -lxt_hal -lm -lnewlib -lstdc++ -lpthread -lgcc -lcxx -lapp_trace -lgcov -lapp_trace -lgcov -lc 
 compiler.c.flags.esp32s2=-mlongcalls -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -O2 -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion -std=gnu99 -Wno-old-style-declaration  -MMD -c
 compiler.cpp.flags.esp32s2=-mlongcalls -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -O2 -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion -std=gnu++11 -fexceptions -fno-rtti  -MMD -c
 compiler.S.flags.esp32s2=-ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -O2 -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion  -x assembler-with-cpp -MMD -c
-compiler.c.elf.flags.esp32s2=-T esp32s2.rom.ld -T esp32s2.rom.api.ld -T esp32s2.rom.libgcc.ld -T esp32s2.rom.newlib-funcs.ld -T esp32s2.rom.newlib-data.ld -T esp32s2.rom.spiflash.ld -T esp32s2_out.ld -T esp32s2.project.ld -T esp32s2.peripherals.ld  -mlongcalls -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -u _Z5setupv -u _Z4loopv -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u ld_include_panic_highint_hdl -u start_app -u __ubsan_include -Wl,--wrap=longjmp -u __assert_func -u vfs_include_syscalls_impl -u call_user_start_cpu0 -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -u __cxa_guard_dummy 
+compiler.c.elf.flags.esp32s2=-T memory.ld -T sections.ld -T esp32s2.rom.ld -T esp32s2.rom.api.ld -T esp32s2.rom.libgcc.ld -T esp32s2.rom.newlib-funcs.ld -T esp32s2.rom.newlib-data.ld -T esp32s2.rom.spiflash.ld -T esp32s2.peripherals.ld  -mlongcalls -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -u _Z5setupv -u _Z4loopv -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u ld_include_panic_highint_hdl -u start_app -u __ubsan_include -Wl,--wrap=longjmp -u __assert_func -u vfs_include_syscalls_impl -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -u __cxa_guard_dummy 
 compiler.ar.flags.esp32s2=cr
 build.extra_flags.esp32s2=-DARDUINO_SERIAL_PORT={build.serial}
 #
@@ -53,12 +53,12 @@ build.extra_flags.esp32s2=-DARDUINO_SERIAL_PORT={build.serial}
 #
 # ESP32C3 Support Start
 #
-compiler.cpreprocessor.flags.esp32c3=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4-dev-2030-gd93887f9f-dirty" -DESP_PLATFORM   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/port/riscv/include" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32c3" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32c3/private_include" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32c3" "-I{compiler.sdk.path}/include/soc/esp32c3/include" "-I{compiler.sdk.path}/include/hal/esp32c3/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/hal/platform_port/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/esp32c3" "-I{compiler.sdk.path}/include/esp_rom/include/esp32c3" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/esp32c3/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32c3/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32c3/include" "-I{compiler.sdk.path}/include/riscv/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/esp_phy/include" "-I{compiler.sdk.path}/include/esp_phy/esp32c3/include" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/riscv" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32c3" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/riscv" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/include/esp_supplicant" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/bt/common/osi/include" "-I{compiler.sdk.path}/include/bt/include/esp32c3/include" "-I{compiler.sdk.path}/include/bt/common/api/include/api" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/blufi/include" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/include" "-I{compiler.sdk.path}/include/bt/host/bluedroid/api/include/api" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/port/include/coap" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/coap/libcoap/include/coap2" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_https_server/include" "-I{compiler.sdk.path}/include/esp_lcd/include" "-I{compiler.sdk.path}/include/esp_lcd/interface" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32c3" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/fb_gfx/include"
-compiler.c.elf.libs.esp32c3=-lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lbt -lcbor -lunity -lcmock -lcoap -lconsole -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_https_server -lesp_lcd -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lspiffs -lwifi_provisioning -lesp_littlefs -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_hid -lesp_lcd -lesp_local_ctrl -lesp_https_server -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lmqtt -lesp_adc_cal -lfatfs -lwear_levelling -lopenssl -lspiffs -lwifi_provisioning -lprotocomm -lbt -lbtdm_app -lprotobuf-c -lmdns -lconsole -ljson -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lesp_phy -lphy -lesp_phy -lphy -lbtbb -lm -lnewlib -lstdc++ -lpthread -lgcc -lcxx -lapp_trace -lgcov -lapp_trace -lgcov -lc 
+compiler.cpreprocessor.flags.esp32c3=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4-dev-2313-gc69f0ec32" -DESP_PLATFORM   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/port/riscv/include" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc/esp32c3" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32c3" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32c3/private_include" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32c3" "-I{compiler.sdk.path}/include/soc/esp32c3/include" "-I{compiler.sdk.path}/include/hal/esp32c3/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/hal/platform_port/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/esp32c3" "-I{compiler.sdk.path}/include/esp_rom/include/esp32c3" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/include/riscv" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/riscv/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32c3/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32c3/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/esp_phy/include" "-I{compiler.sdk.path}/include/esp_phy/esp32c3/include" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/riscv" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32c3" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/riscv" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/include/esp_supplicant" "-I{compiler.sdk.path}/include/ieee802154/include" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/bt/common/osi/include" "-I{compiler.sdk.path}/include/bt/include/esp32c3/include" "-I{compiler.sdk.path}/include/bt/common/api/include/api" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/blufi/include" "-I{compiler.sdk.path}/include/bt/common/btc/profile/esp/include" "-I{compiler.sdk.path}/include/bt/host/bluedroid/api/include/api" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/port/include/coap" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/coap/libcoap/include/coap2" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_https_server/include" "-I{compiler.sdk.path}/include/esp_lcd/include" "-I{compiler.sdk.path}/include/esp_lcd/interface" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32c3" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/fb_gfx/include"
+compiler.c.elf.libs.esp32c3=-lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lbt -lcbor -lunity -lcmock -lcoap -lconsole -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_https_server -lesp_lcd -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lspiffs -lwifi_provisioning -lesp_littlefs -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_hid -lesp_lcd -lesp_local_ctrl -lesp_https_server -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lmqtt -lesp_adc_cal -lfatfs -lwear_levelling -lopenssl -lspiffs -lwifi_provisioning -lprotocomm -lbt -lbtdm_app -lprotobuf-c -lmdns -lconsole -ljson -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lesp_ringbuf -lefuse -lesp_ipc -ldriver -lesp_pm -lmbedtls -lapp_update -lbootloader_support -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_phy -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lriscv -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lesp_phy -lphy -lesp_phy -lphy -lbtbb -lm -lnewlib -lstdc++ -lpthread -lgcc -lcxx -lapp_trace -lgcov -lapp_trace -lgcov -lc 
 compiler.c.flags.esp32c3=-march=rv32imc -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Wno-error=format= -nostartfiles -Wno-format -Og -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion -std=gnu99 -Wno-old-style-declaration  -MMD -c
 compiler.cpp.flags.esp32c3=-march=rv32imc -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Wno-error=format= -nostartfiles -Wno-format -Og -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion -std=gnu++11 -fno-exceptions -fno-rtti  -MMD -c
 compiler.S.flags.esp32c3=-ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Wno-error=format= -nostartfiles -Wno-format -Og -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -fno-jump-tables -fno-tree-switch-conversion  -x assembler-with-cpp -MMD -c
-compiler.c.elf.flags.esp32c3=-T esp32c3.rom.ld -T esp32c3.rom.api.ld -T esp32c3.rom.libgcc.ld -T esp32c3.rom.newlib.ld -T esp32c3.rom.version.ld -T esp32c3_out.ld -T esp32c3.project.ld -T esp32c3.peripherals.ld  -nostartfiles -march=rv32imc --specs=nosys.specs -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -u _Z5setupv -u _Z4loopv -Wl,--wrap=mbedtls_mpi_exp_mod -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u start_app -u __ubsan_include -u __assert_func -u vfs_include_syscalls_impl -u call_user_start_cpu0 -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -Wl,--wrap=_Unwind_SetEnableExceptionFdeSorting -Wl,--wrap=__register_frame_info_bases -Wl,--wrap=__register_frame_info -Wl,--wrap=__register_frame -Wl,--wrap=__register_frame_info_table_bases -Wl,--wrap=__register_frame_info_table -Wl,--wrap=__register_frame_table -Wl,--wrap=__deregister_frame_info_bases -Wl,--wrap=__deregister_frame_info -Wl,--wrap=_Unwind_Find_FDE -Wl,--wrap=_Unwind_GetGR -Wl,--wrap=_Unwind_GetCFA -Wl,--wrap=_Unwind_GetIP -Wl,--wrap=_Unwind_GetIPInfo -Wl,--wrap=_Unwind_GetRegionStart -Wl,--wrap=_Unwind_GetDataRelBase -Wl,--wrap=_Unwind_GetTextRelBase -Wl,--wrap=_Unwind_SetIP -Wl,--wrap=_Unwind_SetGR -Wl,--wrap=_Unwind_GetLanguageSpecificData -Wl,--wrap=_Unwind_FindEnclosingFunction -Wl,--wrap=_Unwind_Resume -Wl,--wrap=_Unwind_RaiseException -Wl,--wrap=_Unwind_DeleteException -Wl,--wrap=_Unwind_ForcedUnwind -Wl,--wrap=_Unwind_Resume_or_Rethrow -Wl,--wrap=_Unwind_Backtrace -Wl,--wrap=__cxa_call_unexpected -Wl,--wrap=__gxx_personality_v0 -u __cxa_guard_dummy -u __cxx_fatal_exception 
+compiler.c.elf.flags.esp32c3=-T memory.ld -T sections.ld -T esp32c3.rom.ld -T esp32c3.rom.api.ld -T esp32c3.rom.libgcc.ld -T esp32c3.rom.newlib.ld -T esp32c3.rom.version.ld -T esp32c3.peripherals.ld  -nostartfiles -march=rv32imc --specs=nosys.specs -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -u _Z5setupv -u _Z4loopv -Wl,--wrap=mbedtls_mpi_exp_mod -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u start_app -u __ubsan_include -u __assert_func -u vfs_include_syscalls_impl -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -Wl,--wrap=_Unwind_SetEnableExceptionFdeSorting -Wl,--wrap=__register_frame_info_bases -Wl,--wrap=__register_frame_info -Wl,--wrap=__register_frame -Wl,--wrap=__register_frame_info_table_bases -Wl,--wrap=__register_frame_info_table -Wl,--wrap=__register_frame_table -Wl,--wrap=__deregister_frame_info_bases -Wl,--wrap=__deregister_frame_info -Wl,--wrap=_Unwind_Find_FDE -Wl,--wrap=_Unwind_GetGR -Wl,--wrap=_Unwind_GetCFA -Wl,--wrap=_Unwind_GetIP -Wl,--wrap=_Unwind_GetIPInfo -Wl,--wrap=_Unwind_GetRegionStart -Wl,--wrap=_Unwind_GetDataRelBase -Wl,--wrap=_Unwind_GetTextRelBase -Wl,--wrap=_Unwind_SetIP -Wl,--wrap=_Unwind_SetGR -Wl,--wrap=_Unwind_GetLanguageSpecificData -Wl,--wrap=_Unwind_FindEnclosingFunction -Wl,--wrap=_Unwind_Resume -Wl,--wrap=_Unwind_RaiseException -Wl,--wrap=_Unwind_DeleteException -Wl,--wrap=_Unwind_ForcedUnwind -Wl,--wrap=_Unwind_Resume_or_Rethrow -Wl,--wrap=_Unwind_Backtrace -Wl,--wrap=__cxa_call_unexpected -Wl,--wrap=__gxx_personality_v0 -u __cxa_guard_dummy -u __cxx_fatal_exception 
 compiler.ar.flags.esp32c3=cr
 build.extra_flags.esp32c3=-DARDUINO_SERIAL_PORT=0
 #
diff --git a/tools/esptool.py b/tools/esptool.py
index 24ce8d9c..f615db23 100755
--- a/tools/esptool.py
+++ b/tools/esptool.py
@@ -317,7 +317,7 @@ class ESPLoader(object):
 
         """
         self.secure_download_mode = False  # flag is set to True if esptool detects the ROM is in Secure Download Mode
-        self.stub_is_disabled = False  # flag is set to True if esptool detects conditions which requires the stub to be disabled
+        self.stub_is_disabled = False  # flag is set to True if esptool detects conditions which require the stub to be disabled
 
         if isinstance(port, basestring):
             self._port = serial.serial_for_url(port)
@@ -531,9 +531,12 @@ class ESPLoader(object):
         if active_port.startswith("/dev/") and os.path.islink(active_port):
             active_port = os.path.realpath(active_port)
 
+        # The "cu" (call-up) device has to be used for outgoing communication on MacOS
+        if sys.platform == "darwin" and "tty" in active_port:
+            active_port = [active_port, active_port.replace("tty", "cu")]
         ports = list_ports.comports()
         for p in ports:
-            if p.device == active_port:
+            if p.device in active_port:
                 return p.pid
         print("\nFailed to get PID of a device on {}, using standard reset sequence.".format(active_port))
 
@@ -1739,18 +1742,41 @@ class ESP32S2ROM(ESP32ROM):
                   [0x50000000, 0x50002000, "RTC_DATA"]]
 
     def get_pkg_version(self):
+        num_word = 4
+        block1_addr = self.EFUSE_BASE + 0x044
+        word3 = self.read_reg(block1_addr + (4 * num_word))
+        pkg_version = (word3 >> 0) & 0x0F
+        return pkg_version
+
+    def get_flash_version(self):
         num_word = 3
         block1_addr = self.EFUSE_BASE + 0x044
         word3 = self.read_reg(block1_addr + (4 * num_word))
         pkg_version = (word3 >> 21) & 0x0F
         return pkg_version
 
+    def get_psram_version(self):
+        num_word = 3
+        block1_addr = self.EFUSE_BASE + 0x044
+        word3 = self.read_reg(block1_addr + (4 * num_word))
+        pkg_version = (word3 >> 28) & 0x0F
+        return pkg_version
+
+    def get_block2_version(self):
+        num_word = 4
+        block2_addr = self.EFUSE_BASE + 0x05C
+        word4 = self.read_reg(block2_addr + (4 * num_word))
+        block2_version = (word4 >> 4) & 0x07
+        return block2_version
+
     def get_chip_description(self):
         chip_name = {
             0: "ESP32-S2",
-            1: "ESP32-S2FH16",
-            2: "ESP32-S2FH32",
-        }.get(self.get_pkg_version(), "unknown ESP32-S2")
+            1: "ESP32-S2FH2",
+            2: "ESP32-S2FH4",
+            102: "ESP32-S2FNR2",
+            100: "ESP32-S2R2",
+        }.get(self.get_flash_version() + self.get_psram_version() * 100, "unknown ESP32-S2")
 
         return "%s" % (chip_name)
 
@@ -1760,22 +1786,27 @@ class ESP32S2ROM(ESP32ROM):
         if self.secure_download_mode:
             features += ["Secure Download Mode Enabled"]
 
-        pkg_version = self.get_pkg_version()
+        flash_version = {
+            0: "No Embedded Flash",
+            1: "Embedded Flash 2MB",
+            2: "Embedded Flash 4MB",
+        }.get(self.get_flash_version(), "Unknown Embedded Flash")
+        features += [flash_version]
 
-        if pkg_version in [1, 2]:
-            if pkg_version == 1:
-                features += ["Embedded 2MB Flash"]
-            elif pkg_version == 2:
-                features += ["Embedded 4MB Flash"]
-            features += ["105C temp rating"]
+        psram_version = {
+            0: "No Embedded PSRAM",
+            1: "Embedded PSRAM 2MB",
+            2: "Embedded PSRAM 4MB",
+        }.get(self.get_psram_version(), "Unknown Embedded PSRAM")
+        features += [psram_version]
 
-        num_word = 4
-        block2_addr = self.EFUSE_BASE + 0x05C
-        word4 = self.read_reg(block2_addr + (4 * num_word))
-        block2_version = (word4 >> 4) & 0x07
+        block2_version = {
+            0: "No calibration in BLK2 of efuse",
+            1: "ADC and temperature sensor calibration in BLK2 of efuse V1",
+            2: "ADC and temperature sensor calibration in BLK2 of efuse V2",
+        }.get(self.get_block2_version(), "Unknown Calibration in BLK2")
+        features += [block2_version]
 
-        if block2_version == 1:
-            features += ["ADC and temperature sensor calibration in BLK2 of efuse"]
         return features
 
     def get_crystal_freq(self):
@@ -1842,10 +1873,10 @@ class ESP32S2ROM(ESP32ROM):
         strap_reg = self.read_reg(self.GPIO_STRAP_REG)
         force_dl_reg = self.read_reg(self.RTC_CNTL_OPTION1_REG)
         if strap_reg & self.GPIO_STRAP_SPI_BOOT_MASK == 0 and force_dl_reg & self.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK == 0:
-            print("ERROR: {} chip was placed into download mode using GPIO0.\n"
+            print("WARNING: {} chip was placed into download mode using GPIO0.\n"
                   "esptool.py can not exit the download mode over USB. "
                   "To run the app, reset the chip manually.\n"
-                  "To suppress this error, set --after option to 'no_reset'.".format(self.get_chip_description()))
+                  "To suppress this note, set --after option to 'no_reset'.".format(self.get_chip_description()))
             raise SystemExit(1)
 
     def hard_reset(self):
@@ -2056,7 +2087,7 @@ class ESP32C3ROM(ESP32ROM):
         num_word = 3
         block1_addr = self.EFUSE_BASE + 0x044
         word3 = self.read_reg(block1_addr + (4 * num_word))
-        pkg_version = (word3 >> 21) & 0x0F
+        pkg_version = (word3 >> 21) & 0x07
         return pkg_version
 
     def get_chip_revision(self):
@@ -4266,7 +4297,7 @@ def main(argv=None, esp=None):
             if esp.secure_download_mode:
                 print("WARNING: Stub loader is not supported in Secure Download Mode, setting --no-stub")
                 args.no_stub = True
-            elif esp.stub_is_disabled:
+            elif not esp.IS_STUB and esp.stub_is_disabled:
                 print("WARNING: Stub loader has been disabled for compatibility, setting --no-stub")
                 args.no_stub = True
             else:
@@ -4604,80 +4635,83 @@ CVCBENeCsBTAdT6NcSsOl8ZiG2cFj9BsTQ8YsWfrs3haiLGiVsfW9Wq9s81W2032YujjtxJFWNpYVaPr
 H73CZ7ZvyLp4N2wqE7eYCuRKLDVWHuQSF5GGve/wobdaq1ujlv89IFvLekOnkZQ+rzZvT/A/rPz2+2V5Af9txZp8Vph5lqXhS3N6eXHdNebz1ITGurwsB/+/pa13N/lLb6IsSYxJP/8XjDX+9Q==\
 """)))
 ESP32S3BETA2ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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 """)))
 ESP32S3ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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 """)))
 ESP32C3ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
 eNqVWn1/E8cR/iqObezAL7S70r2tSYxEJGQZTGkKIVDRcLd750ISNRgRTFt99+4zM3t7ki2Z/mFLutvbnZ155pmXvf8cLurLxeHRTnU4nF1qvTu7tMmB/9ebXarMf/q/Ks/9j+QN7k9ml67wl6s8kWtVPvK/i/uz\
diff --git a/tools/platformio-build-esp32.py b/tools/platformio-build-esp32.py
index fb72f8db..05ba58ff 100644
--- a/tools/platformio-build-esp32.py
+++ b/tools/platformio-build-esp32.py
@@ -84,13 +84,13 @@ env.Append(
         "-Wl,--wrap=longjmp",
         "-Wl,--undefined=uxTopUsedPriority",
         "-T", "esp32.rom.redefined.ld",
+        "-T", "memory.ld",
+        "-T", "sections.ld",
         "-T", "esp32.rom.ld",
         "-T", "esp32.rom.api.ld",
         "-T", "esp32.rom.libgcc.ld",
         "-T", "esp32.rom.newlib-data.ld",
         "-T", "esp32.rom.syscalls.ld",
-        "-T", "esp32_out.ld",
-        "-T", "esp32.project.ld",
         "-T", "esp32.peripherals.ld",
         "-u", "_Z5setupv",
         "-u", "_Z4loopv",
@@ -104,7 +104,6 @@ env.Append(
         "-u", "__ubsan_include",
         "-u", "__assert_func",
         "-u", "vfs_include_syscalls_impl",
-        "-u", "call_user_start_cpu0",
         "-u", "app_main",
         "-u", "newlib_include_heap_impl",
         "-u", "newlib_include_syscalls_impl",
@@ -120,6 +119,7 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "freertos", "port", "xtensa", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_hw_support", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_hw_support", "include", "soc"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_hw_support", "include", "soc", "esp32"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_hw_support", "port", "esp32"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "heap", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "log", "include"),
@@ -142,14 +142,14 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_system", "port", "soc"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_system", "port", "public_compat"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp32", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "xtensa", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "xtensa", "esp32", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "driver", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "driver", "esp32", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_pm", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_ringbuf", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "efuse", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "efuse", "esp32", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "xtensa", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "xtensa", "esp32", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "vfs", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_wifi", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_event", "include"),
@@ -160,13 +160,13 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_phy", "esp32", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "app_trace", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_timer", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_ipc", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "mbedtls", "port", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "mbedtls", "mbedtls", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "mbedtls", "esp_crt_bundle", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "app_update", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "spi_flash", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "bootloader_support", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_ipc", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "nvs_flash", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "pthread", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_gdbstub", "include"),
@@ -177,7 +177,7 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "wpa_supplicant", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "wpa_supplicant", "port", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "wpa_supplicant", "include", "esp_supplicant"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "perfmon", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "ieee802154", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "asio", "asio", "asio", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "asio", "port", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "bt", "common", "osi", "include"),
@@ -231,6 +231,7 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "libsodium", "port_include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "mqtt", "esp-mqtt", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "openssl", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "perfmon", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "spiffs", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "ulp", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "wifi_provisioning", "include"),
@@ -285,7 +286,7 @@ env.Append(
     ],
 
     LIBS=[
-        "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lbt", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lconsole", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_lcd", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lspiffs", "-lulp", "-lwifi_provisioning", "-lbutton", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lesp_rainmaker", "-lqrcode", "-lws2812_led", "-lesp-dsp", "-lesp-face", "-lesp32-camera", "-lesp_littlefs", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_hid", "-lesp_lcd", "-lesp_local_ctrl", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lesp_adc_cal", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lspiffs", "-lesp_rainmaker", "-lmqtt", "-lwifi_provisioning", "-lprotocomm", "-lbt", "-lbtdm_app", "-lprotobuf-c", "-lmdns", "-lconsole", "-ljson", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lqrcode", "-lpe", "-lfd", "-lfr", "-ldetection_cat_face", "-ldetection", "-ldl", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lesp_phy", "-lphy", "-lesp_phy", "-lphy", "-lrtc", "-lxt_hal", "-lm", "-lnewlib", "-lstdc++", "-lpthread", "-lgcc", "-lcxx", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
+        "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lbt", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lconsole", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_lcd", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lperfmon", "-lspiffs", "-lulp", "-lwifi_provisioning", "-lbutton", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lesp_rainmaker", "-lqrcode", "-lws2812_led", "-lesp-dsp", "-lesp-face", "-lesp32-camera", "-lesp_littlefs", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_hid", "-lesp_lcd", "-lesp_local_ctrl", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lperfmon", "-lesp_adc_cal", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lspiffs", "-lesp_rainmaker", "-lmqtt", "-lwifi_provisioning", "-lprotocomm", "-lbt", "-lbtdm_app", "-lprotobuf-c", "-lmdns", "-lconsole", "-ljson", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lqrcode", "-lpe", "-lfd", "-lfr", "-ldetection_cat_face", "-ldetection", "-ldl", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lesp_phy", "-lphy", "-lesp_phy", "-lphy", "-lrtc", "-lxt_hal", "-lm", "-lnewlib", "-lstdc++", "-lpthread", "-lgcc", "-lcxx", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
     ],
 
     CPPDEFINES=[
@@ -294,7 +295,7 @@ env.Append(
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4-dev-2030-gd93887f9f-dirty\\"'),
+        ("IDF_VER", '\\"v4.4-dev-2313-gc69f0ec32\\"'),
         "ESP_PLATFORM",
         "ARDUINO_ARCH_ESP32",
         "ESP32",
diff --git a/tools/platformio-build-esp32c3.py b/tools/platformio-build-esp32c3.py
index 312646fd..7dec32b1 100644
--- a/tools/platformio-build-esp32c3.py
+++ b/tools/platformio-build-esp32c3.py
@@ -111,13 +111,13 @@ env.Append(
         "-Wl,--wrap=_Unwind_Backtrace",
         "-Wl,--wrap=__cxa_call_unexpected",
         "-Wl,--wrap=__gxx_personality_v0",
+        "-T", "memory.ld",
+        "-T", "sections.ld",
         "-T", "esp32c3.rom.ld",
         "-T", "esp32c3.rom.api.ld",
         "-T", "esp32c3.rom.libgcc.ld",
         "-T", "esp32c3.rom.newlib.ld",
         "-T", "esp32c3.rom.version.ld",
-        "-T", "esp32c3_out.ld",
-        "-T", "esp32c3.project.ld",
         "-T", "esp32c3.peripherals.ld",
         "-u", "_Z5setupv",
         "-u", "_Z4loopv",
@@ -129,7 +129,6 @@ env.Append(
         "-u", "__ubsan_include",
         "-u", "__assert_func",
         "-u", "vfs_include_syscalls_impl",
-        "-u", "call_user_start_cpu0",
         "-u", "app_main",
         "-u", "newlib_include_heap_impl",
         "-u", "newlib_include_syscalls_impl",
@@ -146,6 +145,7 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "freertos", "port", "riscv", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_hw_support", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_hw_support", "include", "soc"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_hw_support", "include", "soc", "esp32c3"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_hw_support", "port", "esp32c3"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_hw_support", "port", "esp32c3", "private_include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "heap", "include"),
@@ -167,15 +167,15 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_common", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_system", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_system", "port", "soc"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_system", "port", "include", "riscv"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_system", "port", "public_compat"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp32c3", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "riscv", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "driver", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "driver", "esp32c3", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_pm", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_ringbuf", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "efuse", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "efuse", "esp32c3", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "riscv", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "vfs", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_wifi", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_event", "include"),
@@ -186,13 +186,13 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_phy", "esp32c3", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "app_trace", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_timer", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_ipc", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "mbedtls", "port", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "mbedtls", "mbedtls", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "mbedtls", "esp_crt_bundle", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "app_update", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "spi_flash", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "bootloader_support", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_ipc", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "nvs_flash", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "pthread", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_gdbstub", "include"),
@@ -203,6 +203,7 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "wpa_supplicant", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "wpa_supplicant", "port", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "wpa_supplicant", "include", "esp_supplicant"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "ieee802154", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "asio", "asio", "asio", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "asio", "port", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "bt", "common", "osi", "include"),
@@ -271,7 +272,7 @@ env.Append(
     ],
 
     LIBS=[
-        "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lbt", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lconsole", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_https_server", "-lesp_lcd", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lspiffs", "-lwifi_provisioning", "-lesp_littlefs", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_hid", "-lesp_lcd", "-lesp_local_ctrl", "-lesp_https_server", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lmqtt", "-lesp_adc_cal", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lspiffs", "-lwifi_provisioning", "-lprotocomm", "-lbt", "-lbtdm_app", "-lprotobuf-c", "-lmdns", "-lconsole", "-ljson", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lesp_phy", "-lphy", "-lesp_phy", "-lphy", "-lbtbb", "-lm", "-lnewlib", "-lstdc++", "-lpthread", "-lgcc", "-lcxx", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
+        "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lbt", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lconsole", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_https_server", "-lesp_lcd", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lspiffs", "-lwifi_provisioning", "-lesp_littlefs", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_hid", "-lesp_lcd", "-lesp_local_ctrl", "-lesp_https_server", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lmqtt", "-lesp_adc_cal", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lspiffs", "-lwifi_provisioning", "-lprotocomm", "-lbt", "-lbtdm_app", "-lprotobuf-c", "-lmdns", "-lconsole", "-ljson", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lriscv", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lesp_phy", "-lphy", "-lesp_phy", "-lphy", "-lbtbb", "-lm", "-lnewlib", "-lstdc++", "-lpthread", "-lgcc", "-lcxx", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
     ],
 
     CPPDEFINES=[
@@ -280,7 +281,7 @@ env.Append(
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4-dev-2030-gd93887f9f-dirty\\"'),
+        ("IDF_VER", '\\"v4.4-dev-2313-gc69f0ec32\\"'),
         "ESP_PLATFORM",
         "ARDUINO_ARCH_ESP32",
         "ESP32",
diff --git a/tools/platformio-build-esp32s2.py b/tools/platformio-build-esp32s2.py
index cecf4e19..700ec502 100644
--- a/tools/platformio-build-esp32s2.py
+++ b/tools/platformio-build-esp32s2.py
@@ -79,14 +79,14 @@ env.Append(
         "-fno-lto",
         "-Wl,--wrap=longjmp",
         "-Wl,--undefined=uxTopUsedPriority",
+        "-T", "memory.ld",
+        "-T", "sections.ld",
         "-T", "esp32s2.rom.ld",
         "-T", "esp32s2.rom.api.ld",
         "-T", "esp32s2.rom.libgcc.ld",
         "-T", "esp32s2.rom.newlib-funcs.ld",
         "-T", "esp32s2.rom.newlib-data.ld",
         "-T", "esp32s2.rom.spiflash.ld",
-        "-T", "esp32s2_out.ld",
-        "-T", "esp32s2.project.ld",
         "-T", "esp32s2.peripherals.ld",
         "-u", "_Z5setupv",
         "-u", "_Z4loopv",
@@ -99,7 +99,6 @@ env.Append(
         "-u", "__ubsan_include",
         "-u", "__assert_func",
         "-u", "vfs_include_syscalls_impl",
-        "-u", "call_user_start_cpu0",
         "-u", "app_main",
         "-u", "newlib_include_heap_impl",
         "-u", "newlib_include_syscalls_impl",
@@ -115,6 +114,7 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "freertos", "port", "xtensa", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_hw_support", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_hw_support", "include", "soc"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_hw_support", "include", "soc", "esp32s2"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_hw_support", "port", "esp32s2"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_hw_support", "port", "esp32s2", "private_include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "heap", "include"),
@@ -137,15 +137,14 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_system", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_system", "port", "soc"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_system", "port", "public_compat"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp32s2", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "xtensa", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "xtensa", "esp32s2", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "driver", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "driver", "esp32s2", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_pm", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_ringbuf", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "efuse", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "efuse", "esp32s2", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "xtensa", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "xtensa", "esp32s2", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "vfs", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_wifi", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_event", "include"),
@@ -156,13 +155,13 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_phy", "esp32s2", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "app_trace", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_timer", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_ipc", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "mbedtls", "port", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "mbedtls", "mbedtls", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "mbedtls", "esp_crt_bundle", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "app_update", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "spi_flash", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "bootloader_support", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_ipc", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "nvs_flash", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "pthread", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_gdbstub", "include"),
@@ -173,6 +172,7 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "wpa_supplicant", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "wpa_supplicant", "port", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "wpa_supplicant", "include", "esp_supplicant"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "ieee802154", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "asio", "asio", "asio", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "asio", "port", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "cbor", "port", "include"),
@@ -272,7 +272,7 @@ env.Append(
     ],
 
     LIBS=[
-        "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lconsole", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_https_server", "-lesp_lcd", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lperfmon", "-lspiffs", "-ltouch_element", "-lulp", "-lusb", "-lwifi_provisioning", "-lesp-dsp", "-lesp-face", "-lesp32-camera", "-lesp_littlefs", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_hid", "-lesp_lcd", "-lesp_local_ctrl", "-lesp_https_server", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lmqtt", "-lperfmon", "-ltouch_element", "-lusb", "-lesp_adc_cal", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lspiffs", "-lwifi_provisioning", "-lprotocomm", "-lprotobuf-c", "-lmdns", "-lconsole", "-ljson", "-larduino_tinyusb", "-lpe", "-lfd", "-lfr", "-ldetection_cat_face", "-ldetection", "-ldl", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lesp_phy", "-lphy", "-lesp_phy", "-lphy", "-lxt_hal", "-lm", "-lnewlib", "-lstdc++", "-lpthread", "-lgcc", "-lcxx", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
+        "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lconsole", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_https_server", "-lesp_lcd", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lperfmon", "-lspiffs", "-ltouch_element", "-lulp", "-lusb", "-lwifi_provisioning", "-lesp-dsp", "-lesp-face", "-lesp32-camera", "-lesp_littlefs", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_hid", "-lesp_lcd", "-lesp_local_ctrl", "-lesp_https_server", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lmqtt", "-lperfmon", "-ltouch_element", "-lusb", "-lesp_adc_cal", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lspiffs", "-lwifi_provisioning", "-lprotocomm", "-lprotobuf-c", "-lmdns", "-lconsole", "-ljson", "-larduino_tinyusb", "-lpe", "-lfd", "-lfr", "-ldetection_cat_face", "-ldetection", "-ldl", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lesp_ringbuf", "-lefuse", "-lesp_ipc", "-ldriver", "-lesp_pm", "-lmbedtls", "-lapp_update", "-lbootloader_support", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_phy", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lxtensa", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lesp_phy", "-lphy", "-lesp_phy", "-lphy", "-lxt_hal", "-lm", "-lnewlib", "-lstdc++", "-lpthread", "-lgcc", "-lcxx", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
     ],
 
     CPPDEFINES=[
@@ -281,7 +281,7 @@ env.Append(
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4-dev-2030-gd93887f9f-dirty\\"'),
+        ("IDF_VER", '\\"v4.4-dev-2313-gc69f0ec32\\"'),
         "ESP_PLATFORM",
         "ARDUINO_ARCH_ESP32",
         "ESP32",
diff --git a/tools/sdk/esp32/bin/bootloader_dio_40m.bin b/tools/sdk/esp32/bin/bootloader_dio_40m.bin
index 5efd8923..90cfc391 100644
Binary files a/tools/sdk/esp32/bin/bootloader_dio_40m.bin and b/tools/sdk/esp32/bin/bootloader_dio_40m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_dio_80m.bin b/tools/sdk/esp32/bin/bootloader_dio_80m.bin
index cbbcf3b7..05f670d0 100644
Binary files a/tools/sdk/esp32/bin/bootloader_dio_80m.bin and b/tools/sdk/esp32/bin/bootloader_dio_80m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_dout_40m.bin b/tools/sdk/esp32/bin/bootloader_dout_40m.bin
index 218fa82a..0024c2e5 100644
Binary files a/tools/sdk/esp32/bin/bootloader_dout_40m.bin and b/tools/sdk/esp32/bin/bootloader_dout_40m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_dout_80m.bin b/tools/sdk/esp32/bin/bootloader_dout_80m.bin
index 81a9c9ed..aa6c6b72 100644
Binary files a/tools/sdk/esp32/bin/bootloader_dout_80m.bin and b/tools/sdk/esp32/bin/bootloader_dout_80m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_qio_40m.bin b/tools/sdk/esp32/bin/bootloader_qio_40m.bin
index a4e296c6..804bcf06 100644
Binary files a/tools/sdk/esp32/bin/bootloader_qio_40m.bin and b/tools/sdk/esp32/bin/bootloader_qio_40m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_qio_80m.bin b/tools/sdk/esp32/bin/bootloader_qio_80m.bin
index f34e5ffa..186c11d9 100644
Binary files a/tools/sdk/esp32/bin/bootloader_qio_80m.bin and b/tools/sdk/esp32/bin/bootloader_qio_80m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_qout_40m.bin b/tools/sdk/esp32/bin/bootloader_qout_40m.bin
index 509b525d..29e1ee58 100644
Binary files a/tools/sdk/esp32/bin/bootloader_qout_40m.bin and b/tools/sdk/esp32/bin/bootloader_qout_40m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_qout_80m.bin b/tools/sdk/esp32/bin/bootloader_qout_80m.bin
index 106f334e..c49f5d3d 100644
Binary files a/tools/sdk/esp32/bin/bootloader_qout_80m.bin and b/tools/sdk/esp32/bin/bootloader_qout_80m.bin differ
diff --git a/tools/sdk/esp32/include/app_update/include/esp_ota_ops.h b/tools/sdk/esp32/include/app_update/include/esp_ota_ops.h
index ee29cdac..6278ab79 100644
--- a/tools/sdk/esp32/include/app_update/include/esp_ota_ops.h
+++ b/tools/sdk/esp32/include/app_update/include/esp_ota_ops.h
@@ -14,6 +14,7 @@
 #include "esp_partition.h"
 #include "esp_image_format.h"
 #include "esp_flash_partitions.h"
+#include "soc/soc_caps.h"
 
 #ifdef __cplusplus
 extern "C"
diff --git a/tools/sdk/esp32/include/bootloader_support/include/bootloader_common.h b/tools/sdk/esp32/include/bootloader_support/include/bootloader_common.h
index 3fb97c65..2ff0e595 100644
--- a/tools/sdk/esp32/include/bootloader_support/include/bootloader_common.h
+++ b/tools/sdk/esp32/include/bootloader_support/include/bootloader_common.h
@@ -8,7 +8,8 @@
 #include "esp_flash_partitions.h"
 #include "esp_image_format.h"
 #include "esp_app_format.h"
-// RESET_REASON is declared in rom/rtc.h
+// [refactor-todo]: we shouldn't expose ROM header files in a public API header, remove them in v5.0
+// Tracked in IDF-1968
 #if CONFIG_IDF_TARGET_ESP32
 #include "esp32/rom/rtc.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
@@ -62,18 +63,37 @@ bool bootloader_common_ota_select_valid(const esp_ota_select_entry_t *s);
 bool bootloader_common_ota_select_invalid(const esp_ota_select_entry_t *s);
 
 /**
- * @brief Check if the GPIO input is a long hold or a short hold.
+ * @brief Check if a GPIO input is held low for a long period, short period, or not
+ * at all.
+ *
+ * This function will configure the specified GPIO as an input with internal pull-up enabled.
  *
- * Number of the GPIO input will be configured as an input with internal pull-up enabled.
  * If the GPIO input is held low continuously for delay_sec period then it is a long hold.
  * If the GPIO input is held low for less period then it is a short hold.
  *
  * @param[in] num_pin Number of the GPIO input.
  * @param[in] delay_sec Input must be driven low for at least this long, continuously.
- * @return esp_comm_gpio_hold_t Defines type of hold a GPIO in low state.
+ * @return esp_comm_gpio_hold_t Type of low level hold detected, if any.
  */
 esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio(uint32_t num_pin, uint32_t delay_sec);
 
+/**
+ * @brief Check if a GPIO input is held low or high for a long period, short period, or not
+ * at all.
+ *
+ * This function will configure the specified GPIO as an input with internal pull-up enabled.
+ *
+ * If the GPIO input is held at 'level' continuously for delay_sec period then it is a long hold.
+ * If the GPIO input is held at 'level' for less period then it is a short hold.
+ *
+ * @param[in] num_pin Number of the GPIO input.
+ * @param[in] delay_sec Input must be driven to 'level' for at least this long, continuously.
+ * @param[in] level Input pin level to trigger on hold
+ * @return esp_comm_gpio_hold_t Type of hold detected, if any.
+ */
+esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio_level(uint32_t num_pin, uint32_t delay_sec, bool level);
+
+
 /**
  * @brief Erase the partition data that is specified in the transferred list.
  *
diff --git a/tools/sdk/esp32/include/bt/include/esp32/include/esp_bt.h b/tools/sdk/esp32/include/bt/include/esp32/include/esp_bt.h
index c577fd65..c80dab20 100644
--- a/tools/sdk/esp32/include/bt/include/esp32/include/esp_bt.h
+++ b/tools/sdk/esp32/include/bt/include/esp32/include/esp_bt.h
@@ -25,6 +25,38 @@
 extern "C" {
 #endif
 
+#ifdef CONFIG_BT_ENABLED
+
+#define SOC_MEM_BT_DATA_START               0x3ffae6e0
+#define SOC_MEM_BT_DATA_END                 0x3ffaff10
+#define SOC_MEM_BT_EM_START                 0x3ffb0000
+#define SOC_MEM_BT_EM_END                   0x3ffb7cd8
+#define SOC_MEM_BT_EM_BTDM0_START           0x3ffb0000
+#define SOC_MEM_BT_EM_BTDM0_END             0x3ffb09a8
+#define SOC_MEM_BT_EM_BLE_START             0x3ffb09a8
+#define SOC_MEM_BT_EM_BLE_END               0x3ffb1ddc
+#define SOC_MEM_BT_EM_BTDM1_START           0x3ffb1ddc
+#define SOC_MEM_BT_EM_BTDM1_END             0x3ffb2730
+#define SOC_MEM_BT_EM_BREDR_START           0x3ffb2730
+#define SOC_MEM_BT_EM_BREDR_NO_SYNC_END     0x3ffb6388  //Not calculate with synchronize connection support
+#define SOC_MEM_BT_EM_BREDR_END             0x3ffb7cd8  //Calculate with synchronize connection support
+#define SOC_MEM_BT_EM_SYNC0_START           0x3ffb6388
+#define SOC_MEM_BT_EM_SYNC0_END             0x3ffb6bf8
+#define SOC_MEM_BT_EM_SYNC1_START           0x3ffb6bf8
+#define SOC_MEM_BT_EM_SYNC1_END             0x3ffb7468
+#define SOC_MEM_BT_EM_SYNC2_START           0x3ffb7468
+#define SOC_MEM_BT_EM_SYNC2_END             0x3ffb7cd8
+#define SOC_MEM_BT_BSS_START                0x3ffb8000
+#define SOC_MEM_BT_BSS_END                  0x3ffb9a20
+#define SOC_MEM_BT_MISC_START               0x3ffbdb28
+#define SOC_MEM_BT_MISC_END                 0x3ffbdb5c
+
+#define SOC_MEM_BT_EM_PER_SYNC_SIZE         0x870
+
+#define SOC_MEM_BT_EM_BREDR_REAL_END        (SOC_MEM_BT_EM_BREDR_NO_SYNC_END + CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF * SOC_MEM_BT_EM_PER_SYNC_SIZE)
+
+#endif //CONFIG_BT_ENABLED
+
 #define ESP_BT_CONTROLLER_CONFIG_MAGIC_VAL  0x20200622
 
 /**
diff --git a/tools/sdk/esp32/include/config/sdkconfig.h b/tools/sdk/esp32/include/config/sdkconfig.h
index 2b435fe0..e8837987 100644
--- a/tools/sdk/esp32/include/config/sdkconfig.h
+++ b/tools/sdk/esp32/include/config/sdkconfig.h
@@ -327,6 +327,8 @@
 #define CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB 8
 #define CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS 1000
 #define CONFIG_FMB_PORT_TASK_PRIO 10
+#define CONFIG_FMB_PORT_TASK_AFFINITY_CPU0 1
+#define CONFIG_FMB_PORT_TASK_AFFINITY 0x0
 #define CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT 20
 #define CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE 20
 #define CONFIG_FMB_CONTROLLER_STACK_SIZE 4096
@@ -454,6 +456,8 @@
 #define CONFIG_MBEDTLS_SSL_PROTO_DTLS 1
 #define CONFIG_MBEDTLS_SSL_ALPN 1
 #define CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS 1
+#define CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE 1
+#define CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE 1
 #define CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS 1
 #define CONFIG_MBEDTLS_AES_C 1
 #define CONFIG_MBEDTLS_RC4_DISABLED 1
@@ -686,5 +690,5 @@
 #define CONFIG_ULP_COPROC_ENABLED CONFIG_ESP32_ULP_COPROC_ENABLED
 #define CONFIG_ULP_COPROC_RESERVE_MEM CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
 #define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
-#define CONFIG_ARDUINO_IDF_COMMIT "d93887f9f"
+#define CONFIG_ARDUINO_IDF_COMMIT "c69f0ec32"
 #define CONFIG_ARDUINO_IDF_BRANCH "master"
diff --git a/tools/sdk/esp32/include/console/esp_console.h b/tools/sdk/esp32/include/console/esp_console.h
index 873f11b6..bd49cd83 100644
--- a/tools/sdk/esp32/include/console/esp_console.h
+++ b/tools/sdk/esp32/include/console/esp_console.h
@@ -48,6 +48,7 @@ typedef struct {
     uint32_t task_stack_size;      //!< repl task stack size
     uint32_t task_priority;        //!< repl task priority
     const char *prompt;            //!< prompt (NULL represents default: "esp> ")
+    size_t max_cmdline_length;     //!< maximum length of a command line. If 0, default value will be used
 } esp_console_repl_config_t;
 
 /**
@@ -61,6 +62,7 @@ typedef struct {
         .task_stack_size = 4096,          \
         .task_priority = 2,               \
         .prompt = NULL,                   \
+        .max_cmdline_length = 0,          \
 }
 
 /**
diff --git a/tools/sdk/esp32/include/console/linenoise/linenoise.h b/tools/sdk/esp32/include/console/linenoise/linenoise.h
index 610cacc6..730ba9b5 100644
--- a/tools/sdk/esp32/include/console/linenoise/linenoise.h
+++ b/tools/sdk/esp32/include/console/linenoise/linenoise.h
@@ -72,6 +72,7 @@ void linenoiseSetDumbMode(int set);
 bool linenoiseIsDumbMode(void);
 void linenoisePrintKeyCodes(void);
 void linenoiseAllowEmpty(bool);
+int linenoiseSetMaxLineLen(size_t len);
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32/include/driver/include/driver/i2c.h b/tools/sdk/esp32/include/driver/include/driver/i2c.h
index 4a5dcc26..22dcc8ab 100644
--- a/tools/sdk/esp32/include/driver/include/driver/i2c.h
+++ b/tools/sdk/esp32/include/driver/include/driver/i2c.h
@@ -74,14 +74,15 @@ typedef struct{
 
     union {
         struct {
-            uint32_t clk_speed;     /*!< I2C clock frequency for master mode, (no higher than 1MHz for now) */
-        } master;                   /*!< I2C master config */
+            uint32_t clk_speed;      /*!< I2C clock frequency for master mode, (no higher than 1MHz for now) */
+        } master;                    /*!< I2C master config */
         struct {
-            uint8_t addr_10bit_en;  /*!< I2C 10bit address mode enable for slave mode */
-            uint16_t slave_addr;    /*!< I2C address for slave mode */
-        } slave;                    /*!< I2C slave config */
+            uint8_t addr_10bit_en;   /*!< I2C 10bit address mode enable for slave mode */
+            uint16_t slave_addr;     /*!< I2C address for slave mode */
+            uint32_t maximum_speed;  /*!< I2C expected clock speed from SCL. */
+        } slave;                     /*!< I2C slave config */
     };
-    uint32_t clk_flags;             /*!< Bitwise of ``I2C_SCLK_SRC_FLAG_**FOR_DFS**`` for clk source choice*/
+    uint32_t clk_flags;              /*!< Bitwise of ``I2C_SCLK_SRC_FLAG_**FOR_DFS**`` for clk source choice*/
 } i2c_config_t;
 
 
diff --git a/tools/sdk/esp32/include/driver/include/driver/spi_master.h b/tools/sdk/esp32/include/driver/include/driver/spi_master.h
index da5f5b52..8582a332 100644
--- a/tools/sdk/esp32/include/driver/include/driver/spi_master.h
+++ b/tools/sdk/esp32/include/driver/include/driver/spi_master.h
@@ -105,7 +105,7 @@ typedef struct {
 #define SPI_TRANS_VARIABLE_ADDR       (1<<6)  ///< Use the ``address_bits`` in ``spi_transaction_ext_t`` rather than default value in ``spi_device_interface_config_t``.
 #define SPI_TRANS_VARIABLE_DUMMY      (1<<7)  ///< Use the ``dummy_bits`` in ``spi_transaction_ext_t`` rather than default value in ``spi_device_interface_config_t``.
 #define SPI_TRANS_SET_CD              (1<<7)  ///< Set the CD pin
-
+#define SPI_TRANS_CS_KEEP_ACTIVE      (1<<8)  ///< Keep CS active after data transfer
 /**
  * This structure describes one SPI transaction. The descriptor should not be modified until the transaction finishes.
  */
@@ -194,7 +194,8 @@ esp_err_t spi_bus_remove_device(spi_device_handle_t handle);
  * @param ticks_to_wait Ticks to wait until there's room in the queue; use portMAX_DELAY to
  *                      never time out.
  * @return
- *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_DEVICE_CS_KEEP_LOW flag is specified while
+ *                                 the bus was not acquired (`spi_device_acquire_bus()` should be called first)
  *         - ESP_ERR_TIMEOUT       if there was no room in the queue before ticks_to_wait expired
  *         - ESP_ERR_NO_MEM        if allocating DMA-capable temporary buffer failed
  *         - ESP_ERR_INVALID_STATE if previous transactions are not finished
@@ -257,7 +258,8 @@ esp_err_t spi_device_transmit(spi_device_handle_t handle, spi_transaction_t *tra
  *              currently only portMAX_DELAY is supported.
  *
  * @return
- *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_DEVICE_CS_KEEP_LOW flag is specified while
+ *                                 the bus was not acquired (`spi_device_acquire_bus()` should be called first)
  *         - ESP_ERR_TIMEOUT       if the device cannot get control of the bus before ``ticks_to_wait`` expired
  *         - ESP_ERR_NO_MEM        if allocating DMA-capable temporary buffer failed
  *         - ESP_ERR_INVALID_STATE if previous transactions are not finished
diff --git a/tools/sdk/esp32/include/driver/include/esp_private/gdma.h b/tools/sdk/esp32/include/driver/include/esp_private/gdma.h
index 5b548e08..88a45b56 100644
--- a/tools/sdk/esp32/include/driver/include/esp_private/gdma.h
+++ b/tools/sdk/esp32/include/driver/include/esp_private/gdma.h
@@ -38,7 +38,8 @@ typedef enum {
     GDMA_TRIG_PERIPH_ADC,  /*!< GDMA trigger peripheral: ADC */
     GDMA_TRIG_PERIPH_DAC,  /*!< GDMA trigger peripheral: DAC */
     GDMA_TRIG_PERIPH_LCD,  /*!< GDMA trigger peripheral: LCD */
-    GDMA_TRIG_PERIPH_CAM   /*!< GDMA trigger peripheral: CAM */
+    GDMA_TRIG_PERIPH_CAM,  /*!< GDMA trigger peripheral: CAM */
+    GDMA_TRIG_PERIPH_RMT,  /*!< GDMA trigger peripheral: RMT */
 } gdma_trigger_peripheral_t;
 
 /**
@@ -58,10 +59,23 @@ typedef struct {
     gdma_channel_handle_t sibling_chan; /*!< DMA sibling channel handle (NULL means having sibling is not necessary) */
     gdma_channel_direction_t direction; /*!< DMA channel direction */
     struct {
-        int reserve_sibling: 1;   /*!< If set, DMA channel allocator would prefer to allocate new channel in a new pair, and reserve sibling channel for future use */
+        int reserve_sibling: 1; /*!< If set, DMA channel allocator would prefer to allocate new channel in a new pair, and reserve sibling channel for future use */
     } flags;
 } gdma_channel_alloc_config_t;
 
+/**
+ * @brief GDMA transfer ability
+ *
+ * @note The alignment set in this structure is **not** a guarantee that gdma driver will take care of the nonalignment cases.
+ *       Actually the GDMA driver has no knowledge about the DMA buffer (address and size) used by upper layer.
+ *       So it's the responsibility of the **upper layer** to take care of the buffer address and size.
+ *
+ */
+typedef struct {
+    size_t sram_trans_align;  /*!< DMA transfer alignment for memory in SRAM, in bytes. The driver enables/disables burst mode based on this value. 0 means no alignment is required */
+    size_t psram_trans_align; /*!< DMA transfer alignment for memory in PSRAM, in bytes. The driver sets proper burst block size based on the alignment value. 0 means no alignment is required */
+} gdma_transfer_ability_t;
+
 /**
  * @brief Type of GDMA event data
  *
@@ -79,6 +93,9 @@ typedef struct {
  * @param event_data GDMA event data
  * @param user_data User registered data from `gdma_register_tx_event_callbacks` or `gdma_register_rx_event_callbacks`
  *
+ * @return Whether a task switch is needed after the callback function returns,
+ *         this is usually due to the callback wakes up some high priority task.
+ *
  */
 typedef bool (*gdma_event_callback_t)(gdma_channel_handle_t dma_chan, gdma_event_data_t *event_data, void *user_data);
 
@@ -171,6 +188,18 @@ esp_err_t gdma_connect(gdma_channel_handle_t dma_chan, gdma_trigger_t trig_perip
  */
 esp_err_t gdma_disconnect(gdma_channel_handle_t dma_chan);
 
+/**
+ * @brief Set DMA channel transfer ability
+ *
+ * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @param[in] ability Transfer ability, e.g. alignment
+ * @return
+ *      - ESP_OK: Set DMA channel transfer ability successfully
+ *      - ESP_ERR_INVALID_ARG: Set DMA channel transfer ability failed because of invalid argument
+ *      - ESP_FAIL: Set DMA channel transfer ability failed because of other error
+ */
+esp_err_t gdma_set_transfer_ability(gdma_channel_handle_t dma_chan, const gdma_transfer_ability_t *ability);
+
 /**
  * @brief Apply channel strategy for GDMA channel
  *
diff --git a/tools/sdk/esp32/include/esp_common/include/esp_check.h b/tools/sdk/esp32/include/esp_common/include/esp_check.h
index 3ee631c3..524cb376 100644
--- a/tools/sdk/esp32/include/esp_common/include/esp_check.h
+++ b/tools/sdk/esp32/include/esp_common/include/esp_check.h
@@ -30,7 +30,187 @@ extern "C" {
             return err_rc_;                                                                     \
         }                                                                                       \
     } while(0)
-#else
+
+/**
+ * A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                   \
+        esp_err_t err_rc_ = (x);                                                                \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
+            return err_rc_;                                                                     \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message,
+ * sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                               \
+        esp_err_t err_rc_ = (x);                                                                \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
+            ret = err_rc_;                                                                      \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                           \
+        esp_err_t err_rc_ = (x);                                                                \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
+            ret = err_rc_;                                                                      \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message
+ * and returns with the supplied 'err_code'.
+ */
+#define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                             \
+        if (unlikely(!(a))) {                                                                   \
+            return err_code;                                                                    \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                         \
+        if (unlikely(!(a))) {                                                                   \
+            return err_code;                                                                    \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message,
+ * sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                     \
+        if (unlikely(!(a))) {                                                                   \
+            ret = err_code;                                                                     \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while (0)
+
+/**
+ * A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                 \
+        if (unlikely(!(a))) {                                                                   \
+            ret = err_code;                                                                     \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while (0)
+
+#else // !CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT
+
+/**
+ * In the future, we want to switch to C++20. We also want to become compatible with clang.
+ * Hence, we provide two versions of the following macros. The first one is using the GNU extension \#\#__VA_ARGS__.
+ * The second one is using the C++20 feature __VA_OPT__(,). This allows users to compile their code with
+ * standard C++20 enabled instead of the GNU extension. Below C++20, we haven't found any good alternative to
+ * using \#\#__VA_ARGS__.
+ */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message and returns.
+ */
+#define ESP_RETURN_ON_ERROR(x, log_tag, format, ...) do {                                                  \
+        esp_err_t err_rc_ = (x);                                                                           \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                                 \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            return err_rc_;                                                                                \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                              \
+        esp_err_t err_rc_ = (x);                                                                           \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                                 \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);  \
+            return err_rc_;                                                                                \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message,
+ * sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                                          \
+        esp_err_t err_rc_ = (x);                                                                           \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                                 \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            ret = err_rc_;                                                                                 \
+            goto goto_tag;                                                                                 \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                                      \
+        esp_err_t err_rc_ = (x);                                                                           \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                                 \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);  \
+            ret = err_rc_;                                                                                 \
+            goto goto_tag;                                                                                 \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message
+ * and returns with the supplied 'err_code'.
+ */
+#define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                                        \
+        if (unlikely(!(a))) {                                                                              \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            return err_code;                                                                               \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                                    \
+        if (unlikely(!(a))) {                                                                              \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);  \
+            return err_code;                                                                               \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message,
+ * sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                                \
+        if (unlikely(!(a))) {                                                                              \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            ret = err_code;                                                                                \
+            goto goto_tag;                                                                                 \
+        }                                                                                                  \
+    } while (0)
+
+/**
+ * A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                            \
+        if (unlikely(!(a))) {                                                                              \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);  \
+            ret = err_code;                                                                                \
+            goto goto_tag;                                                                                 \
+        }                                                                                                  \
+    } while (0)
+
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message and returns.
+ */
 #define ESP_RETURN_ON_ERROR(x, log_tag, format, ...) do {                                       \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
@@ -38,19 +218,10 @@ extern "C" {
             return err_rc_;                                                                     \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                   \
-        esp_err_t err_rc_ = (x);                                                                \
-        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
-            return err_rc_;                                                                     \
-        }                                                                                       \
-    } while(0)
-#else
 #define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                   \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
@@ -58,21 +229,11 @@ extern "C" {
             return err_rc_;                                                                     \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message,
  * sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                               \
-        esp_err_t err_rc_ = (x);                                                                \
-        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
-            ret = err_rc_;                                                                      \
-            goto goto_tag;                                                                      \
-        }                                                                                       \
-    } while(0)
-#else
 #define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                               \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
@@ -81,20 +242,10 @@ extern "C" {
             goto goto_tag;                                                                      \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                           \
-        esp_err_t err_rc_ = (x);                                                                \
-        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
-            ret = err_rc_;                                                                      \
-            goto goto_tag;                                                                      \
-        }                                                                                       \
-    } while(0)
-#else
 #define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                           \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
@@ -103,57 +254,32 @@ extern "C" {
             goto goto_tag;                                                                      \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * Macro which can be used to check the condition. If the condition is not 'true', it prints the message
  * and returns with the supplied 'err_code'.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                             \
-        if (unlikely(!(a))) {                                                                   \
-            return err_code;                                                                    \
-        }                                                                                       \
-    } while(0)
-#else
 #define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                             \
         if (unlikely(!(a))) {                                                                   \
             ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);        \
             return err_code;                                                                    \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                         \
-        if (unlikely(!(a))) {                                                                   \
-            return err_code;                                                                    \
-        }                                                                                       \
-    } while(0)
-#else
 #define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                         \
         if (unlikely(!(a))) {                                                                   \
             ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);  \
             return err_code;                                                                    \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * Macro which can be used to check the condition. If the condition is not 'true', it prints the message,
  * sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                     \
-        if (unlikely(!(a))) {                                                                   \
-            ret = err_code;                                                                     \
-            goto goto_tag;                                                                      \
-        }                                                                                       \
-    } while (0)
-#else
 #define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                     \
         if (unlikely(!(a))) {                                                                   \
             ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);        \
@@ -161,19 +287,10 @@ extern "C" {
             goto goto_tag;                                                                      \
         }                                                                                       \
     } while (0)
-#endif
 
 /**
  * A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                 \
-        if (unlikely(!(a))) {                                                                   \
-            ret = err_code;                                                                     \
-            goto goto_tag;                                                                      \
-        }                                                                                       \
-    } while (0)
-#else
 #define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                 \
         if (unlikely(!(a))) {                                                                   \
             ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);  \
@@ -181,7 +298,11 @@ extern "C" {
             goto goto_tag;                                                                      \
         }                                                                                       \
     } while (0)
-#endif
+
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
+
+#endif // !CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT
+
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32/include/esp_common/include/esp_err.h b/tools/sdk/esp32/include/esp_common/include/esp_err.h
index 1f3b5553..d31bb9a0 100644
--- a/tools/sdk/esp32/include/esp_common/include/esp_err.h
+++ b/tools/sdk/esp32/include/esp_common/include/esp_err.h
@@ -132,7 +132,7 @@ void _esp_error_check_failed_without_abort(esp_err_t rc, const char *file, int l
  * serial output.
  * In comparison with ESP_ERROR_CHECK(), this prints the same error message but isn't terminating the program.
  */
-#ifdef NDEBUG
+#if defined NDEBUG || defined CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT
 #define ESP_ERROR_CHECK_WITHOUT_ABORT(x) ({                                         \
         esp_err_t err_rc_ = (x);                                                    \
         err_rc_;                                                                    \
diff --git a/tools/sdk/esp32/include/esp_eth/include/esp_eth_mac.h b/tools/sdk/esp32/include/esp_eth/include/esp_eth_mac.h
index 042c369f..f1e790c7 100644
--- a/tools/sdk/esp32/include/esp_eth/include/esp_eth_mac.h
+++ b/tools/sdk/esp32/include/esp_eth/include/esp_eth_mac.h
@@ -287,17 +287,98 @@ struct esp_eth_mac_s {
     esp_err_t (*del)(esp_eth_mac_t *mac);
 };
 
+/**
+ * @brief RMII Clock Mode Options
+ *
+ */
+typedef enum {
+    /**
+     * @brief Default values configured using Kconfig are going to be used when "Default" selected.
+     *
+     */
+    EMAC_CLK_DEFAULT,
+
+    /**
+     * @brief Input RMII Clock from external. EMAC Clock GPIO number needs to be configured when this option is selected.
+     *
+     * @note MAC will get RMII clock from outside. Note that ESP32 only supports GPIO0 to input the RMII clock.
+     *
+     */
+    EMAC_CLK_EXT_IN,
+
+    /**
+     * @brief Output RMII Clock from internal APLL Clock. EMAC Clock GPIO number needs to be configured when this option is selected.
+     *
+     */
+    EMAC_CLK_OUT
+} emac_rmii_clock_mode_t;
+
+/**
+ * @brief RMII Clock GPIO number Options
+ *
+ */
+typedef enum {
+    /**
+     * @brief MAC will get RMII clock from outside at this GPIO.
+     *
+     * @note ESP32 only supports GPIO0 to input the RMII clock.
+     *
+     */
+    EMAC_CLK_IN_GPIO = 0,
+
+    /**
+     * @brief Output RMII Clock from internal APLL Clock available at GPIO0
+     *
+     * @note GPIO0 can be set to output a pre-divided PLL clock (test only!). Enabling this option will configure GPIO0 to output a 50MHz clock.
+     * In fact this clock doesn’t have directly relationship with EMAC peripheral. Sometimes this clock won’t work well with your PHY chip.
+     * You might need to add some extra devices after GPIO0 (e.g. inverter). Note that outputting RMII clock on GPIO0 is an experimental practice.
+     * If you want the Ethernet to work with WiFi, don’t select GPIO0 output mode for stability.
+     *
+     */
+    EMAC_APPL_CLK_OUT_GPIO = 0,
+
+    /**
+     * @brief Output RMII Clock from internal APLL Clock available at GPIO16
+     *
+     */
+    EMAC_CLK_OUT_GPIO = 16,
+
+    /**
+     * @brief Inverted Output RMII Clock from internal APLL Clock available at GPIO17
+     *
+     */
+    EMAC_CLK_OUT_180_GPIO = 17
+} emac_rmii_clock_gpio_t;
+
+/**
+ * @brief Ethernet MAC Clock Configuration
+ *
+ */
+typedef union {
+    struct {
+        // MII interface is not fully implemented...
+        // Reserved for GPIO number, clock source, etc. in MII mode
+    } mii; /*!< EMAC MII Clock Configuration */
+    struct {
+        emac_rmii_clock_mode_t clock_mode; /*!< RMII Clock Mode Configuration */
+        emac_rmii_clock_gpio_t clock_gpio; /*!< RMII Clock GPIO Configuration */
+    } rmii; /*!< EMAC RMII Clock Configuration */
+} eth_mac_clock_config_t;
+
+
 /**
 * @brief Configuration of Ethernet MAC object
 *
 */
 typedef struct {
-    uint32_t sw_reset_timeout_ms; /*!< Software reset timeout value (Unit: ms) */
-    uint32_t rx_task_stack_size;  /*!< Stack size of the receive task */
-    uint32_t rx_task_prio;        /*!< Priority of the receive task */
-    int smi_mdc_gpio_num;         /*!< SMI MDC GPIO number, set to -1 could bypass the SMI GPIO configuration */
-    int smi_mdio_gpio_num;        /*!< SMI MDIO GPIO number, set to -1 could bypass the SMI GPIO configuration */
-    uint32_t flags;               /*!< Flags that specify extra capability for mac driver */
+    uint32_t sw_reset_timeout_ms;        /*!< Software reset timeout value (Unit: ms) */
+    uint32_t rx_task_stack_size;         /*!< Stack size of the receive task */
+    uint32_t rx_task_prio;               /*!< Priority of the receive task */
+    int smi_mdc_gpio_num;                /*!< SMI MDC GPIO number, set to -1 could bypass the SMI GPIO configuration */
+    int smi_mdio_gpio_num;               /*!< SMI MDIO GPIO number, set to -1 could bypass the SMI GPIO configuration */
+    uint32_t flags;                      /*!< Flags that specify extra capability for mac driver */
+    eth_data_interface_t interface;      /*!< EMAC Data interface to PHY (MII/RMII) */
+    eth_mac_clock_config_t clock_config; /*!< EMAC Interface clock configuration */
 } eth_mac_config_t;
 
 #define ETH_MAC_FLAG_WORK_WITH_CACHE_DISABLE (1 << 0) /*!< MAC driver can work when cache is disabled */
@@ -307,14 +388,23 @@ typedef struct {
  * @brief Default configuration for Ethernet MAC object
  *
  */
-#define ETH_MAC_DEFAULT_CONFIG()    \
-    {                               \
-        .sw_reset_timeout_ms = 100, \
-        .rx_task_stack_size = 4096, \
-        .rx_task_prio = 15,         \
-        .smi_mdc_gpio_num = 23,     \
-        .smi_mdio_gpio_num = 18,    \
-        .flags = 0,                 \
+#define ETH_MAC_DEFAULT_CONFIG()                          \
+    {                                                     \
+        .sw_reset_timeout_ms = 100,                       \
+        .rx_task_stack_size = 4096,                       \
+        .rx_task_prio = 15,                               \
+        .smi_mdc_gpio_num = 23,                           \
+        .smi_mdio_gpio_num = 18,                          \
+        .flags = 0,                                       \
+        .interface = EMAC_DATA_INTERFACE_RMII,            \
+        .clock_config =                                   \
+        {                                                 \
+            .rmii =                                       \
+            {                                             \
+                .clock_mode = EMAC_CLK_DEFAULT,           \
+                .clock_gpio = EMAC_CLK_IN_GPIO            \
+            }                                             \
+        }                                                 \
     }
 
 #if CONFIG_ETH_USE_ESP32_EMAC
diff --git a/tools/sdk/esp32/include/esp_event/include/esp_event.h b/tools/sdk/esp32/include/esp_event/include/esp_event.h
index b5d7b14d..2d39422d 100644
--- a/tools/sdk/esp32/include/esp_event/include/esp_event.h
+++ b/tools/sdk/esp32/include/esp_event/include/esp_event.h
@@ -48,6 +48,7 @@ typedef struct {
  *
  * @return
  *  - ESP_OK: Success
+ *  - ESP_ERR_INVALID_ARG: event_loop_args or event_loop was NULL
  *  - ESP_ERR_NO_MEM: Cannot allocate memory for event loops list
  *  - ESP_FAIL: Failed to create task loop
  *  - Others: Fail
@@ -57,7 +58,7 @@ esp_err_t esp_event_loop_create(const esp_event_loop_args_t *event_loop_args, es
 /**
  * @brief Delete an existing event loop.
  *
- * @param[in] event_loop event loop to delete
+ * @param[in] event_loop event loop to delete, must not be NULL
  *
  * @return
  *  - ESP_OK: Success
@@ -102,7 +103,7 @@ esp_err_t esp_event_loop_delete_default(void);
  * In cases where waiting on the queue times out, ESP_OK is returned and not ESP_ERR_TIMEOUT, since it is
  * normal behavior.
  *
- * @param[in] event_loop event loop to dispatch posted events from
+ * @param[in] event_loop event loop to dispatch posted events from, must not be NULL
  * @param[in] ticks_to_run number of ticks to run the loop
  *
  * @note encountering an unknown event that has been posted to the loop will only generate a warning, not an error.
@@ -158,7 +159,7 @@ esp_err_t esp_event_handler_register(esp_event_base_t event_base,
  * This function behaves in the same manner as esp_event_handler_register, except the additional
  * specification of the event loop to register the handler to.
  *
- * @param[in] event_loop the event loop to register this handler function to
+ * @param[in] event_loop the event loop to register this handler function to, must not be NULL
  * @param[in] event_base the base id of the event to register the handler for
  * @param[in] event_id the id of the event to register the handler for
  * @param[in] event_handler the handler function which gets called when the event is dispatched
@@ -197,7 +198,7 @@ esp_err_t esp_event_handler_register_with(esp_event_loop_handle_t event_loop,
  * Each registration yields a distinct instance object which identifies it over the registration
  * lifetime.
  *
- * @param[in] event_loop the event loop to register this handler function to
+ * @param[in] event_loop the event loop to register this handler function to, must not be NULL
  * @param[in] event_base the base id of the event to register the handler for
  * @param[in] event_id the id of the event to register the handler for
  * @param[in] event_handler the handler function which gets called when the event is dispatched
@@ -263,15 +264,15 @@ esp_err_t esp_event_handler_instance_register(esp_event_base_t event_base,
  * @note This function is obsolete and will be deprecated soon, please use esp_event_handler_instance_unregister()
  *       instead.
  *
- * This function can be used to unregister a handler so that it no longer gets called during dispatch.
- * Handlers can be unregistered for either: (1) specific events, (2) all events of a certain event base,
- * or (3) all events known by the system event loop
+ * Unregisters a handler so it will no longer be called during dispatch.
+ * Handlers can be unregistered for any combination of event_base and event_id which were previously registered.
+ * To unregister a handler, the event_base and event_id arguments must match exactly the arguments passed to
+ * esp_event_handler_register() when that handler was registered. Passing ESP_EVENT_ANY_BASE and/or ESP_EVENT_ANY_ID
+ * will only unregister handlers that were registered with the same wildcard arguments.
  *
- *  - specific events: specify exact event_base and event_id
- *  - all events of a certain base: specify exact event_base and use ESP_EVENT_ANY_ID as the event_id
- *  - all events known by the loop: use ESP_EVENT_ANY_BASE for event_base and ESP_EVENT_ANY_ID as the event_id
- *
- * This function ignores unregistration of handlers that has not been previously registered.
+ * @note When using ESP_EVENT_ANY_ID, handlers registered to specific event IDs using the same base will not be
+ *       unregistered. When using ESP_EVENT_ANY_BASE, events registered to specific bases will also not be
+ *       unregistered. This avoids accidental unregistration of handlers registered by other users or components.
  *
  * @param[in] event_base the base of the event with which to unregister the handler
  * @param[in] event_id the id of the event with which to unregister the handler
@@ -294,7 +295,7 @@ esp_err_t esp_event_handler_unregister(esp_event_base_t event_base,
  * This function behaves in the same manner as esp_event_handler_unregister, except the additional specification of
  * the event loop to unregister the handler with.
  *
- * @param[in] event_loop the event loop with which to unregister this handler function
+ * @param[in] event_loop the event loop with which to unregister this handler function, must not be NULL
  * @param[in] event_base the base of the event with which to unregister the handler
  * @param[in] event_id the id of the event with which to unregister the handler
  * @param[in] event_handler the handler to unregister
@@ -312,17 +313,18 @@ esp_err_t esp_event_handler_unregister_with(esp_event_loop_handle_t event_loop,
 /**
  * @brief Unregister a handler instance from a specific event loop.
  *
- * This function can be used to unregister a handler so that it no longer gets called during dispatch.
- * Handlers can be unregistered for either: (1) specific events, (2) all events of a certain event base,
- * or (3) all events known by the system event loop
+ * Unregisters a handler instance so it will no longer be called during dispatch.
+ * Handler instances can be unregistered for any combination of event_base and event_id which were previously
+ * registered. To unregister a handler instance, the event_base and event_id arguments must match exactly the
+ * arguments passed to esp_event_handler_instance_register() when that handler instance was registered.
+ * Passing ESP_EVENT_ANY_BASE and/or ESP_EVENT_ANY_ID will only unregister handler instances that were registered
+ * with the same wildcard arguments.
  *
- *  - specific events: specify exact event_base and event_id
- *  - all events of a certain base: specify exact event_base and use ESP_EVENT_ANY_ID as the event_id
- *  - all events known by the loop: use ESP_EVENT_ANY_BASE for event_base and ESP_EVENT_ANY_ID as the event_id
+ * @note When using ESP_EVENT_ANY_ID, handlers registered to specific event IDs using the same base will not be
+ *       unregistered. When using ESP_EVENT_ANY_BASE, events registered to specific bases will also not be
+ *       unregistered. This avoids accidental unregistration of handlers registered by other users or components.
  *
- * This function ignores unregistration of handler instances that have not been previously registered.
- *
- * @param[in] event_loop the event loop with which to unregister this handler function
+ * @param[in] event_loop the event loop with which to unregister this handler function, must not be NULL
  * @param[in] event_base the base of the event with which to unregister the handler
  * @param[in] event_id the id of the event with which to unregister the handler
  * @param[in] instance the instance object of the registration to be unregistered
@@ -388,7 +390,7 @@ esp_err_t esp_event_post(esp_event_base_t event_base,
  * This function behaves in the same manner as esp_event_post_to, except the additional specification of the event loop
  * to post the event to.
  *
- * @param[in] event_loop the event loop to post to
+ * @param[in] event_loop the event loop to post to, must not be NULL
  * @param[in] event_base the event base that identifies the event
  * @param[in] event_id the event id that identifies the event
  * @param[in] event_data the data, specific to the event occurence, that gets passed to the handler
@@ -441,7 +443,7 @@ esp_err_t esp_event_isr_post(esp_event_base_t event_base,
 /**
  * @brief Special variant of esp_event_post_to for posting events from interrupt handlers
  *
- * @param[in] event_loop the event loop to post to
+ * @param[in] event_loop the event loop to post to, must not be NULL
  * @param[in] event_base the event base that identifies the event
  * @param[in] event_id the event id that identifies the event
  * @param[in] event_data the data, specific to the event occurence, that gets passed to the handler
diff --git a/tools/sdk/esp32/include/esp_http_client/include/esp_http_client.h b/tools/sdk/esp32/include/esp_http_client/include/esp_http_client.h
index f6ef1da3..ab7e3c2e 100644
--- a/tools/sdk/esp32/include/esp_http_client/include/esp_http_client.h
+++ b/tools/sdk/esp32/include/esp_http_client/include/esp_http_client.h
@@ -167,6 +167,7 @@ typedef enum {
 #define ESP_ERR_HTTP_INVALID_TRANSPORT  (ESP_ERR_HTTP_BASE + 5)     /*!< There are no transport support for the input scheme */
 #define ESP_ERR_HTTP_CONNECTING         (ESP_ERR_HTTP_BASE + 6)     /*!< HTTP connection hasn't been established yet */
 #define ESP_ERR_HTTP_EAGAIN             (ESP_ERR_HTTP_BASE + 7)     /*!< Mapping of errno EAGAIN to esp_err_t */
+#define ESP_ERR_HTTP_CONNECTION_CLOSED  (ESP_ERR_HTTP_BASE + 8)     /*!< Read FIN from peer and the connection closed */
 
 /**
  * @brief      Start a HTTP session
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/esp_async_memcpy.h b/tools/sdk/esp32/include/esp_hw_support/include/esp_async_memcpy.h
index 67194e44..e95f9638 100644
--- a/tools/sdk/esp32/include/esp_hw_support/include/esp_async_memcpy.h
+++ b/tools/sdk/esp32/include/esp_hw_support/include/esp_async_memcpy.h
@@ -54,8 +54,10 @@ typedef bool (*async_memcpy_isr_cb_t)(async_memcpy_t mcp_hdl, async_memcpy_event
  *
  */
 typedef struct {
-    uint32_t backlog; /*!< Maximum number of streams that can be handled simultaneously */
-    uint32_t flags;   /*!< Extra flags to control async memcpy feature */
+    uint32_t backlog;          /*!< Maximum number of streams that can be handled simultaneously */
+    size_t sram_trans_align;   /*!< DMA transfer alignment (both in size and address) for SRAM memory */
+    size_t psram_trans_align;  /*!< DMA transfer alignment (both in size and address) for PSRAM memory */
+    uint32_t flags;            /*!< Extra flags to control async memcpy feature */
 } async_memcpy_config_t;
 
 /**
@@ -63,9 +65,11 @@ typedef struct {
  *
  */
 #define ASYNC_MEMCPY_DEFAULT_CONFIG() \
-    {                              \
-        .backlog = 8,              \
-        .flags = 0,                \
+    {                                 \
+        .backlog = 8,                 \
+        .sram_trans_align = 0,        \
+        .psram_trans_align = 0,       \
+        .flags = 0,                   \
     }
 
 /**
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/esp_mac.h b/tools/sdk/esp32/include/esp_hw_support/include/esp_mac.h
index 0d23d014..75e01ebb 100644
--- a/tools/sdk/esp32/include/esp_hw_support/include/esp_mac.h
+++ b/tools/sdk/esp32/include/esp_hw_support/include/esp_mac.h
@@ -60,7 +60,9 @@ typedef enum {
   * @note If not using a valid OUI, set the "locally administered" bit
   *       (bit value 0x02 in the first byte) to avoid collisions.
   *
-  * @param  mac base MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   *
   * @return ESP_OK on success
   *         ESP_ERR_INVALID_ARG If mac is NULL or is not a unicast MAC
@@ -72,7 +74,9 @@ esp_err_t esp_base_mac_addr_set(const uint8_t *mac);
   *
   * @note If no custom Base MAC has been set, this returns the pre-programmed Espressif base MAC address.
   *
-  * @param  mac base MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   *
   * @return ESP_OK on success
   *         ESP_ERR_INVALID_MAC base MAC address has not been set
@@ -91,7 +95,9 @@ esp_err_t esp_base_mac_addr_get(uint8_t *mac);
   *
   * @note This function is currently only supported on ESP32.
   *
-  * @param  mac  base MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   *
   * @return ESP_OK on success
   *         ESP_ERR_INVALID_VERSION An invalid MAC version field was read from BLK3 of EFUSE
@@ -102,7 +108,9 @@ esp_err_t esp_efuse_mac_get_custom(uint8_t *mac);
 /**
   * @brief  Return base MAC address which is factory-programmed by Espressif in EFUSE.
   *
-  * @param  mac  base MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   *
   * @return ESP_OK on success
   */
@@ -115,12 +123,14 @@ esp_err_t esp_efuse_mac_get_default(uint8_t *mac);
   * Then calculates the MAC address of the specific interface requested,
   * refer to ESP-IDF Programming Guide for the algorithm.
   *
-  * @param  mac  MAC address of the interface, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   * @param  type Type of MAC address to return
   *
   * @return ESP_OK on success
   */
-esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type);
+esp_err_t esp_read_mac(uint8_t *mac, esp_mac_type_t type);
 
 /**
   * @brief Derive local MAC address from universal MAC address.
@@ -133,12 +143,14 @@ esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type);
   * address, then the first octet is XORed with 0x4 in order to create a different
   * locally administered MAC address.
   *
-  * @param  local_mac  Derived local MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   * @param  universal_mac  Source universal MAC address, length: 6 bytes.
   *
   * @return ESP_OK on success
   */
-esp_err_t esp_derive_local_mac(uint8_t* local_mac, const uint8_t* universal_mac);
+esp_err_t esp_derive_local_mac(uint8_t *local_mac, const uint8_t *universal_mac);
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/compare_set.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/compare_set.h
index 5a11ab16..ddbaeb7e 100644
--- a/tools/sdk/esp32/include/esp_hw_support/include/soc/compare_set.h
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/compare_set.h
@@ -17,7 +17,7 @@
 #include <stdint.h>
 #include <stdbool.h>
 #include "soc/cpu.h"
-#include "soc/soc_memory_layout.h"
+#include "soc/soc_memory_types.h"
 
 #if __XTENSA__
 #include "xtensa/xtruntime.h"
diff --git a/tools/sdk/esp32/include/esp32/include/esp32/dport_access.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32/dport_access.h
similarity index 100%
rename from tools/sdk/esp32/include/esp32/include/esp32/dport_access.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp32/dport_access.h
diff --git a/tools/sdk/esp32/include/esp32/include/esp32/himem.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32/himem.h
similarity index 100%
rename from tools/sdk/esp32/include/esp32/include/esp32/himem.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp32/himem.h
diff --git a/tools/sdk/esp32/include/esp32/include/esp32/rtc.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32/rtc.h
similarity index 100%
rename from tools/sdk/esp32/include/esp32/include/esp32/rtc.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp32/rtc.h
diff --git a/tools/sdk/esp32/include/esp32/include/esp32/spiram.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32/spiram.h
similarity index 99%
rename from tools/sdk/esp32/include/esp32/include/esp32/spiram.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp32/spiram.h
index 91b26ee4..e58712d1 100644
--- a/tools/sdk/esp32/include/esp32/include/esp32/spiram.h
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32/spiram.h
@@ -108,9 +108,8 @@ esp_err_t esp_spiram_reserve_dma_pool(size_t size);
  */
 bool esp_spiram_is_initialized(void);
 
-
-#endif
-
 #ifdef __cplusplus
 }
 #endif
+
+#endif //  __ESP_SPIRAM_H
diff --git a/tools/sdk/esp32c3/include/esp32c3/include/esp32c3/dport_access.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/dport_access.h
similarity index 100%
rename from tools/sdk/esp32c3/include/esp32c3/include/esp32c3/dport_access.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/dport_access.h
diff --git a/tools/sdk/esp32c3/include/esp32c3/include/esp_crypto_lock.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/esp_crypto_lock.h
similarity index 100%
rename from tools/sdk/esp32c3/include/esp32c3/include/esp_crypto_lock.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/esp_crypto_lock.h
diff --git a/tools/sdk/esp32c3/include/esp32c3/include/esp_ds.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/esp_ds.h
similarity index 100%
rename from tools/sdk/esp32c3/include/esp32c3/include/esp_ds.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/esp_ds.h
diff --git a/tools/sdk/esp32c3/include/esp32c3/include/esp_hmac.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/esp_hmac.h
similarity index 100%
rename from tools/sdk/esp32c3/include/esp32c3/include/esp_hmac.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/esp_hmac.h
diff --git a/tools/sdk/esp32c3/include/esp32c3/include/esp32c3/memprot.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/memprot.h
similarity index 99%
rename from tools/sdk/esp32c3/include/esp32c3/include/esp32c3/memprot.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/memprot.h
index 094f28f4..0d7e6ca4 100644
--- a/tools/sdk/esp32c3/include/esp32c3/include/esp32c3/memprot.h
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/memprot.h
@@ -20,6 +20,8 @@
 #pragma once
 
 #include <stdbool.h>
+#include <stdint.h>
+
 #include "esp_attr.h"
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32c3/include/esp32c3/include/esp32c3/rtc.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/rtc.h
similarity index 100%
rename from tools/sdk/esp32c3/include/esp32c3/include/esp32c3/rtc.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp32c3/rtc.h
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/dport_access.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/dport_access.h
new file mode 100644
index 00000000..f3f7007a
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/dport_access.h
@@ -0,0 +1,42 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_DPORT_ACCESS_H_
+#define _ESP_DPORT_ACCESS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Read a sequence of DPORT registers to the buffer.
+ *
+ * @param[out] buff_out  Contains the read data.
+ * @param[in]  address   Initial address for reading registers.
+ * @param[in]  num_words The number of words.
+ */
+void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
+
+#define DPORT_STALL_OTHER_CPU_START()
+#define DPORT_STALL_OTHER_CPU_END()
+#define DPORT_INTERRUPT_DISABLE()
+#define DPORT_INTERRUPT_RESTORE()
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_DPORT_ACCESS_H_ */
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/esp_crypto_lock.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/esp_crypto_lock.h
new file mode 100644
index 00000000..3149d346
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/esp_crypto_lock.h
@@ -0,0 +1,76 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Acquire lock for HMAC cryptography peripheral
+ *
+ * Internally also locks the SHA peripheral, as the HMAC depends on the SHA peripheral
+ */
+void esp_crypto_hmac_lock_acquire(void);
+
+/**
+ * @brief Release lock for HMAC cryptography peripheral
+ *
+ * Internally also releases the SHA peripheral, as the HMAC depends on the SHA peripheral
+ */
+void esp_crypto_hmac_lock_release(void);
+
+/**
+ * @brief Acquire lock for DS cryptography peripheral
+ *
+ * Internally also locks the HMAC (which locks SHA), AES and MPI  peripheral, as the DS depends on these peripherals
+ */
+void esp_crypto_ds_lock_acquire(void);
+
+/**
+ * @brief Release lock for DS cryptography peripheral
+ *
+ * Internally also releases the HMAC (which locks SHA), AES and MPI  peripheral, as the DS depends on these peripherals
+ */
+void esp_crypto_ds_lock_release(void);
+
+/**
+ * @brief Acquire lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_acquire(void);
+
+/**
+ * @brief Release lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_release(void);
+
+
+/**
+ * @brief Acquire lock for the mpi cryptography peripheral.
+ *
+ */
+void esp_crypto_mpi_lock_acquire(void);
+
+/**
+ * @brief Release lock for the mpi/rsa cryptography peripheral.
+ *
+ */
+void esp_crypto_mpi_lock_release(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/esp_ds.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/esp_ds.h
new file mode 100644
index 00000000..79e963fc
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/esp_ds.h
@@ -0,0 +1,218 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_hmac.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP32H2_ERR_HW_CRYPTO_DS_HMAC_FAIL           ESP_ERR_HW_CRYPTO_BASE + 0x1 /*!< HMAC peripheral problem */
+#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_KEY         ESP_ERR_HW_CRYPTO_BASE + 0x2 /*!< given HMAC key isn't correct,
+                                                                                HMAC peripheral problem */
+#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_DIGEST      ESP_ERR_HW_CRYPTO_BASE + 0x4 /*!< message digest check failed,
+                                                                                result is invalid */
+#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_PADDING     ESP_ERR_HW_CRYPTO_BASE + 0x5 /*!< padding check failed, but result
+                                                                                   is produced anyway and can be read*/
+
+#define ESP_DS_IV_BIT_LEN 128
+#define ESP_DS_IV_LEN (ESP_DS_IV_BIT_LEN / 8)
+#define ESP_DS_SIGNATURE_MAX_BIT_LEN 3072
+#define ESP_DS_SIGNATURE_MD_BIT_LEN 256
+#define ESP_DS_SIGNATURE_M_PRIME_BIT_LEN 32
+#define ESP_DS_SIGNATURE_L_BIT_LEN 32
+#define ESP_DS_SIGNATURE_PADDING_BIT_LEN 64
+
+/* Length of parameter 'C' stored in flash, in bytes
+   - Operands Y, M and r_bar; each 3072 bits
+   - Operand MD (message digest); 256 bits
+   - Operands M' and L; each 32 bits
+   - Operand beta (padding value; 64 bits
+*/
+#define ESP_DS_C_LEN (((ESP_DS_SIGNATURE_MAX_BIT_LEN * 3 \
+        + ESP_DS_SIGNATURE_MD_BIT_LEN   \
+        + ESP_DS_SIGNATURE_M_PRIME_BIT_LEN   \
+        + ESP_DS_SIGNATURE_L_BIT_LEN   \
+        + ESP_DS_SIGNATURE_PADDING_BIT_LEN) / 8))
+
+typedef struct esp_ds_context esp_ds_context_t;
+
+typedef enum {
+    ESP_DS_RSA_1024 = (1024 / 32) - 1,
+    ESP_DS_RSA_2048 = (2048 / 32) - 1,
+    ESP_DS_RSA_3072 = (3072 / 32) - 1
+} esp_digital_signature_length_t;
+
+/**
+ * Encrypted private key data. Recommended to store in flash in this format.
+ *
+ * @note This struct has to match to one from the ROM code! This documentation is mostly taken from there.
+ */
+typedef struct esp_digital_signature_data {
+    /**
+     * RSA LENGTH register parameters
+     * (number of words in RSA key & operands, minus one).
+     *
+     * Max value 127 (for RSA 3072).
+     *
+     * This value must match the length field encrypted and stored in 'c',
+     * or invalid results will be returned. (The DS peripheral will
+     * always use the value in 'c', not this value, so an attacker can't
+     * alter the DS peripheral results this way, it will just truncate or
+     * extend the message and the resulting signature in software.)
+     *
+     * @note In IDF, the enum type length is the same as of type unsigned, so they can be used interchangably.
+     *       See the ROM code for the original declaration of struct \c ets_ds_data_t.
+     */
+    esp_digital_signature_length_t rsa_length;
+
+    /**
+     * IV value used to encrypt 'c'
+     */
+    uint32_t iv[ESP_DS_IV_BIT_LEN / 32];
+
+    /**
+     * Encrypted Digital Signature parameters. Result of AES-CBC encryption
+     * of plaintext values. Includes an encrypted message digest.
+     */
+    uint8_t c[ESP_DS_C_LEN];
+} esp_ds_data_t;
+
+/**
+ * Plaintext parameters used by Digital Signature.
+ *
+ * This is only used for encrypting the RSA parameters by calling esp_ds_encrypt_params().
+ * Afterwards, the result can be stored in flash or in other persistent memory.
+ * The encryption is a prerequisite step before any signature operation can be done.
+ */
+typedef struct {
+    uint32_t  Y[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA exponent
+    uint32_t  M[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA modulus
+    uint32_t Rb[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA r inverse operand
+    uint32_t M_prime;                               //!< RSA M prime operand
+    uint32_t length;                                //!< RSA length in words (32 bit)
+} esp_ds_p_data_t;
+
+/**
+ * @brief Sign the message with a hardware key from specific key slot.
+ *
+ * This function is a wrapper around \c esp_ds_finish_sign() and \c esp_ds_start_sign(), so do not use them
+ * in parallel.
+ * It blocks until the signing is finished and then returns the signature.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components during its entire execution time.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ *
+ * @return
+ *      - ESP_OK if successful, the signature was written to the parameter \c signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches.
+ */
+esp_err_t esp_ds_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        void *signature);
+
+/**
+ * @brief Start the signing process.
+ *
+ * This function yields a context object which needs to be passed to \c esp_ds_finish_sign() to finish the signing
+ * process.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components, so the user has to ensure to call
+ *       \c esp_ds_finish_sign() in a timely manner.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param esp_ds_ctx the context object which is needed for finishing the signing process later
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation was started now and has to be finished with \c esp_ds_finish_sign()
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ */
+esp_err_t esp_ds_start_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        esp_ds_context_t **esp_ds_ctx);
+
+/**
+ * Return true if the DS peripheral is busy, otherwise false.
+ *
+ * @note Only valid if \c esp_ds_start_sign() was called before.
+ */
+bool esp_ds_is_busy(void);
+
+/**
+ * @brief Finish the signing process.
+ *
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ * @param esp_ds_ctx the context object retreived by \c esp_ds_start_sign()
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *        This means that the encrypted RSA key parameters are invalid, indicating that they may have been tampered
+ *        with or indicating a flash error, etc.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches (see TRM for more details).
+ */
+esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx);
+
+/**
+ * @brief Encrypt the private key parameters.
+ *
+ * The encryption is a prerequisite step before any signature operation can be done.
+ * It is not strictly necessary to use this encryption function, the encryption could also happen on an external
+ * device.
+ *
+ * @param data Output buffer to store encrypted data, suitable for later use generating signatures.
+ *        The allocated memory must be in internal memory and word aligned since it's filled by DMA. Both is asserted
+ *        at run time.
+ * @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
+ * @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process
+ *        is done and 'data' is stored.
+ * @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the
+ *        corresponding HMAC key will be stored to efuse and then permanently erased.
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or p_data->rsa_length is too long
+ */
+esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
+        const void *iv,
+        const esp_ds_p_data_t *p_data,
+        const void *key);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/esp_hmac.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/esp_hmac.h
new file mode 100644
index 00000000..391ba12f
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/esp_hmac.h
@@ -0,0 +1,67 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_HMAC_H_
+#define _ESP_HMAC_H_
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * The possible efuse keys for the HMAC peripheral
+ */
+typedef enum {
+    HMAC_KEY0 = 0,
+    HMAC_KEY1,
+    HMAC_KEY2,
+    HMAC_KEY3,
+    HMAC_KEY4,
+    HMAC_KEY5,
+    HMAC_KEY_MAX
+} hmac_key_id_t;
+
+/**
+ * @brief
+ * Calculate the HMAC of a given message.
+ *
+ * Calculate the HMAC \c hmac of a given message \c message with length \c message_len.
+ * SHA256 is used for the calculation (fixed on ESP32S2).
+ *
+ * @note Uses the HMAC peripheral in "upstream" mode.
+ *
+ * @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calcuation.
+ *        The corresponding purpose field of the key block in the efuse must be set to the HMAC upstream purpose value.
+ * @param message the message for which to calculate the HMAC
+ * @param message_len message length
+ *             return ESP_ERR_INVALID_STATE if unsuccessful
+ * @param [out] hmac the hmac result; the buffer behind the provided pointer must be 32 bytes long
+ *
+ * @return
+ *      * ESP_OK, if the calculation was successful,
+ *      * ESP_FAIL, if the hmac calculation failed
+ */
+esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
+        const void *message,
+        size_t message_len,
+        uint8_t *hmac);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ESP_HMAC_H_
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/memprot.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/memprot.h
new file mode 100644
index 00000000..2567b604
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/memprot.h
@@ -0,0 +1,456 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/* INTERNAL API
+ * generic interface to PMS memory protection features
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_attr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef IRAM_SRAM_START
+#define IRAM_SRAM_START             0x4037C000
+#endif
+
+#ifndef DRAM_SRAM_START
+#define DRAM_SRAM_START             0x3FC7C000
+#endif
+
+#ifndef MAP_DRAM_TO_IRAM
+#define MAP_DRAM_TO_IRAM(addr)       (addr - DRAM_SRAM_START + IRAM_SRAM_START)
+#endif
+
+#ifndef MAP_IRAM_TO_DRAM
+#define MAP_IRAM_TO_DRAM(addr)       (addr - IRAM_SRAM_START + DRAM_SRAM_START)
+#endif
+
+typedef enum {
+    MEMPROT_NONE =              0x00000000,
+    MEMPROT_IRAM0_SRAM =        0x00000001,
+    MEMPROT_DRAM0_SRAM =        0x00000002,
+    MEMPROT_ALL =               0xFFFFFFFF
+} mem_type_prot_t;
+
+typedef enum {
+    MEMPROT_SPLITLINE_NONE = 0,
+    MEMPROT_IRAM0_DRAM0_SPLITLINE,
+    MEMPROT_IRAM0_LINE_0_SPLITLINE,
+    MEMPROT_IRAM0_LINE_1_SPLITLINE,
+    MEMPROT_DRAM0_DMA_LINE_0_SPLITLINE,
+    MEMPROT_DRAM0_DMA_LINE_1_SPLITLINE
+} split_line_t;
+
+typedef enum {
+    MEMPROT_PMS_AREA_NONE = 0,
+    MEMPROT_IRAM0_PMS_AREA_0,
+    MEMPROT_IRAM0_PMS_AREA_1,
+    MEMPROT_IRAM0_PMS_AREA_2,
+    MEMPROT_IRAM0_PMS_AREA_3,
+    MEMPROT_DRAM0_PMS_AREA_0,
+    MEMPROT_DRAM0_PMS_AREA_1,
+    MEMPROT_DRAM0_PMS_AREA_2,
+    MEMPROT_DRAM0_PMS_AREA_3
+} pms_area_t;
+
+typedef enum
+{
+    MEMPROT_PMS_WORLD_0 = 0,
+    MEMPROT_PMS_WORLD_1,
+    MEMPROT_PMS_WORLD_2,
+    MEMPROT_PMS_WORLD_INVALID = 0xFFFFFFFF
+} pms_world_t;
+
+typedef enum
+{
+    MEMPROT_PMS_OP_READ = 0,
+    MEMPROT_PMS_OP_WRITE,
+    MEMPROT_PMS_OP_FETCH,
+    MEMPROT_PMS_OP_INVALID = 0xFFFFFFFF
+} pms_operation_type_t;
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+const char *esp_memprot_mem_type_to_str(mem_type_prot_t mem_type);
+
+/**
+ * @brief Converts Split line type to string
+ *
+ * @param line_type Split line type (see split_line_t enum)
+ */
+const char *esp_memprot_split_line_to_str(split_line_t line_type);
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type (see pms_area_t enum)
+ */
+const char *esp_memprot_pms_to_str(pms_area_t area_type);
+
+/**
+ * @brief Returns PMS splitting address for given Split line type
+ *
+ * The value is taken from PMS configuration registers (IRam0 range)
+ * For details on split lines see 'esp_memprot_set_prot_int' function description
+ *
+ * @param line_type Split line type (see split_line_t enum)
+ *
+ * @return appropriate split line address
+ */
+uint32_t *esp_memprot_get_split_addr(split_line_t line_type);
+
+/**
+ * @brief Returns default main IRAM/DRAM splitting address
+ *
+ * The address value is given by _iram_text_end global (IRam0 range)
+
+ * @return Main I/D split line (IRam0_DRam0_Split_Addr)
+ */
+void *esp_memprot_get_default_main_split_addr(void);
+
+/**
+ * @brief Sets a lock for the main IRAM/DRAM splitting address
+ *
+ * Locks can be unlocked only by digital system reset
+ */
+void esp_memprot_set_split_line_lock(void);
+
+/**
+ * @brief Gets a lock status for the main IRAM/DRAM splitting address
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_split_line_lock(void);
+
+/**
+ * @brief Sets required split line address
+ *
+ * @param line_type Split line type (see split_line_t enum)
+ * @param line_addr target address from a memory range relevant to given line_type (IRAM/DRAM)
+ */
+void esp_memprot_set_split_line(split_line_t line_type, const void *line_addr);
+
+/**
+ * @brief Sets a lock for PMS Area settings of required Memory type
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_pms_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS Area settings of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_pms_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Sets permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
+ *
+ * @param area_type IRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag
+ * @param w Write permission flag
+ * @param x Execute permission flag
+ */
+void esp_memprot_iram_set_pms_area(pms_area_t area_type, bool r, bool w, bool x);
+
+/**
+ * @brief Gets current permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
+ *
+ * @param area_type IRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag holder
+ * @param w Write permission flag holder
+ * @param x Execute permission flag holder
+ */
+void esp_memprot_iram_get_pms_area(pms_area_t area_type, bool *r, bool *w, bool *x);
+
+/**
+ * @brief Sets permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
+ *
+ * @param area_type DRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag
+ * @param w Write permission flag
+ */
+void esp_memprot_dram_set_pms_area(pms_area_t area_type, bool r, bool w);
+
+/**
+ * @brief Gets current permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
+ *
+ * @param area_type DRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag holder
+ * @param w Write permission flag holder
+ */
+void esp_memprot_dram_get_pms_area(pms_area_t area_type, bool *r, bool *w);
+
+/**
+ * @brief Sets a lock for PMS interrupt monitor settings of required Memory type
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_monitor_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS interrupt monitor settings of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_monitor_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Enable PMS violation interrupt monitoring of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ * @param enable/disable
+ */
+void esp_memprot_set_monitor_en(mem_type_prot_t mem_type, bool enable);
+
+/**
+ * @brief Gets enable/disable status for PMS interrupt monitor settings of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (enabled/disabled)
+ */
+bool esp_memprot_get_monitor_en(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets CPU ID for currently active PMS violation interrupt
+ *
+ * @return CPU ID (CPU_PRO for ESP32H2)
+ */
+int IRAM_ATTR esp_memprot_intr_get_cpuid(void);
+
+/**
+ * @brief Clears current interrupt ON flag for given Memory type
+ *
+ * Interrupt clearing happens in two steps:
+ *      1. Interrupt CLR flag is set (to clear the interrupt ON status)
+ *      2. Interrupt CLR flag is reset (to allow further monitoring)
+ * This operation is non-atomic by PMS module design
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void IRAM_ATTR esp_memprot_monitor_clear_intr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns active PMS violation interrupt (if any)
+ *
+ * This function iterates through supported Memory type status registers
+ * and returns the first interrupt-on flag. If none is found active,
+ * MEMPROT_NONE is returned.
+ * Order of checking (in current version):
+ *      1. MEMPROT_IRAM0_SRAM
+ *      2. MEMPROT_DRAM0_SRAM
+ *
+ * @return mem_type Memory protection type related to active interrupt found (see mem_type_prot_t enum)
+ */
+mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
+
+/**
+ * @brief Checks whether any violation interrupt is active
+ *
+ * @return true/false (yes/no)
+ */
+bool IRAM_ATTR esp_memprot_is_locked_any(void);
+
+/**
+ * @brief Checks whether any violation interrupt is enabled
+ *
+ * @return true/false (yes/no)
+ */
+bool IRAM_ATTR esp_memprot_is_intr_ena_any(void);
+
+/**
+ * @brief Checks whether any violation interrupt is enabled
+ *
+ * @return true/false (yes/no)
+ */
+bool IRAM_ATTR esp_memprot_get_violate_intr_on(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns the address which caused the violation interrupt (if any)
+ *
+ * The address is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return faulting address
+ */
+uint32_t IRAM_ATTR esp_memprot_get_violate_addr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns the World identifier of the code causing the violation interrupt (if any)
+ *
+ * The value is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return World identifier (see pms_world_t enum)
+ */
+pms_world_t IRAM_ATTR esp_memprot_get_violate_world(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns Read or Write operation type which caused the violation interrupt (if any)
+ *
+ * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return PMS operation type relevant to mem_type parameter (se pms_operation_type_t)
+ */
+pms_operation_type_t IRAM_ATTR esp_memprot_get_violate_wr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns LoadStore flag of the operation type which caused the violation interrupt (if any)
+ *
+ * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
+ * Effective only on IRam0 access
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (LoadStore bit on/off)
+ */
+bool IRAM_ATTR esp_memprot_get_violate_loadstore(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns byte-enables for the address which caused the violation interrupt (if any)
+ *
+ * The value is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return byte-enables
+ */
+uint32_t IRAM_ATTR esp_memprot_get_violate_byte_en(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns raw contents of DRam0 status register 1
+ *
+ * @return 32-bit register value
+ */
+uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_1(void);
+
+/**
+ * @brief Returns raw contents of DRam0 status register 2
+ *
+ * @return 32-bit register value
+ */
+uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_2(void);
+
+/**
+ * @brief Returns raw contents of IRam0 status register
+ *
+ * @return 32-bit register value
+ */
+uint32_t IRAM_ATTR esp_memprot_get_iram_status_reg(void);
+
+/**
+ * @brief Register PMS violation interrupt in global interrupt matrix for given Memory type
+ *
+ * Memory protection components uses specific interrupt number, see ETS_MEMPROT_ERR_INUM
+ * The registration makes the panic-handler routine being called when the interrupt appears
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_intr_matrix(mem_type_prot_t mem_type);
+
+/**
+ * @brief Convenient routine for setting the PMS defaults
+ *
+ * Called on application startup, depending on CONFIG_ESP_SYSTEM_MEMPROT_FEATURE Kconfig settings
+ * For implementation details see 'esp_memprot_set_prot_int' description
+ *
+ * @param invoke_panic_handler register all interrupts for panic handling (true/false)
+ * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
+ * @param mem_type_mask 32-bit field of specific PMS parts to configure (see 'esp_memprot_set_prot_int')
+ */
+void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
+
+/**
+ * @brief Internal routine for setting the PMS defaults
+ *
+ * Called on application startup from within 'esp_memprot_set_prot'. Allows setting a specific splitting address
+ * (main I/D split line) - see the parameter 'split_addr'. If the 'split_addr' equals to NULL, default I/D split line
+ * is used (&_iram_text_end) and all the remaining lines share the same address.
+ * The function sets all the split lines and PMS areas to the same space,
+ * ie there is a single instruction space and single data space at the end.
+ * The PMS split lines and permission areas scheme described below:
+ *
+ *                            DRam0/DMA                                     IRam0
+ *                              -----------------------------------------------
+ *                    ...       |                 IRam0_PMS_0                 |
+ *               DRam0_PMS_0   -----------------------------------------------    IRam0_line1_Split_addr
+ *                    ...       |                 IRam0_PMS_1                 |
+ *                    ...       -----------------------------------------------   IRam0_line0_Split_addr
+ *                              |                 IRam0_PMS_2                 |
+ *                              ===============================================   IRam0_DRam0_Split_addr (main I/D)
+ *                              |                 DRam0_PMS_1                 |
+ * DRam0_DMA_line0_Split_addr   -----------------------------------------------       ...
+ *                              |                 DRam0_PMS_2                 |       ...
+ * DRam0_DMA_line1_Split_addr   -----------------------------------------------   IRam0_PMS_3
+ *                              |                 DRam0_PMS_3                 |       ...
+ *                              -----------------------------------------------
+ *
+ * Default settings provided by 'esp_memprot_set_prot_int' are as follows:
+ *
+ *                            DRam0/DMA                                     IRam0
+ *                              -----------------------------------------------
+ *                              |   IRam0_PMS_0 = IRam0_PMS_1 = IRam0_PMS_2   |
+ *                              |                 DRam0_PMS_0                 |   IRam0_line1_Split_addr
+ * DRam0_DMA_line0_Split_addr   |                                             |             =
+ *               =              ===============================================   IRam0_line0_Split_addr
+ * DRam0_DMA_line1_Split_addr   |                                             |             =
+ *                              |   DRam0_PMS_1 = DRam0_PMS_2 = DRam0_PMS_3   |   IRam0_DRam0_Split_addr (main I/D)
+ *                              |                 IRam0_PMS_3                 |
+ *                              -----------------------------------------------
+ *
+ * Once the memprot feature is locked, it can be unlocked only by digital system reset
+ *
+ * @param invoke_panic_handler register all the violation interrupts for panic handling (true/false)
+ * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
+ * @param split_addr specific main I/D adrees or NULL to use default ($_iram_text_end)
+ * @param mem_type_mask 32-bit field of specific PMS parts to configure (members of mem_type_prot_t)
+ */
+void esp_memprot_set_prot_int(bool invoke_panic_handler, bool lock_feature, void *split_addr, uint32_t *mem_type_mask);
+
+/**
+ * @brief Returns raw contents of PMS interrupt monitor register for given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return 32-bit register value
+ */
+uint32_t esp_memprot_get_monitor_enable_reg(mem_type_prot_t mem_type);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/rtc.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/rtc.h
new file mode 100644
index 00000000..cca748df
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32h2/rtc.h
@@ -0,0 +1,40 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp32h2/rtc.h
+ *
+ * This file contains declarations of rtc related functions.
+ */
+
+/**
+ * @brief Get current value of RTC counter in microseconds
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter in microseconds
+ */
+uint64_t esp_rtc_get_time_us(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp32s2/include/esp32s2/dport_access.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/dport_access.h
similarity index 98%
rename from tools/sdk/esp32s2/include/esp32s2/include/esp32s2/dport_access.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/dport_access.h
index ffb43c07..6ba6fd65 100644
--- a/tools/sdk/esp32s2/include/esp32s2/include/esp32s2/dport_access.h
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/dport_access.h
@@ -15,6 +15,8 @@
 #ifndef _ESP_DPORT_ACCESS_H_
 #define _ESP_DPORT_ACCESS_H_
 
+#include <stdint.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
diff --git a/tools/sdk/esp32s2/include/esp32s2/include/esp_crypto_lock.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/esp_crypto_lock.h
similarity index 100%
rename from tools/sdk/esp32s2/include/esp32s2/include/esp_crypto_lock.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/esp_crypto_lock.h
diff --git a/tools/sdk/esp32s2/include/esp32s2/include/esp_ds.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/esp_ds.h
similarity index 100%
rename from tools/sdk/esp32s2/include/esp32s2/include/esp_ds.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/esp_ds.h
diff --git a/tools/sdk/esp32s2/include/esp32s2/include/esp_hmac.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/esp_hmac.h
similarity index 100%
rename from tools/sdk/esp32s2/include/esp32s2/include/esp_hmac.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/esp_hmac.h
diff --git a/tools/sdk/esp32s2/include/esp32s2/include/esp32s2/memprot.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/memprot.h
similarity index 100%
rename from tools/sdk/esp32s2/include/esp32s2/include/esp32s2/memprot.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/memprot.h
diff --git a/tools/sdk/esp32s2/include/esp32s2/include/esp32s2/rtc.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/rtc.h
similarity index 100%
rename from tools/sdk/esp32s2/include/esp32s2/include/esp32s2/rtc.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/rtc.h
diff --git a/tools/sdk/esp32s2/include/esp32s2/include/esp32s2/spiram.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/spiram.h
similarity index 100%
rename from tools/sdk/esp32s2/include/esp32s2/include/esp32s2/spiram.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s2/spiram.h
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/dport_access.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/dport_access.h
new file mode 100644
index 00000000..f3f7007a
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/dport_access.h
@@ -0,0 +1,42 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_DPORT_ACCESS_H_
+#define _ESP_DPORT_ACCESS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Read a sequence of DPORT registers to the buffer.
+ *
+ * @param[out] buff_out  Contains the read data.
+ * @param[in]  address   Initial address for reading registers.
+ * @param[in]  num_words The number of words.
+ */
+void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
+
+#define DPORT_STALL_OTHER_CPU_START()
+#define DPORT_STALL_OTHER_CPU_END()
+#define DPORT_INTERRUPT_DISABLE()
+#define DPORT_INTERRUPT_RESTORE()
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_DPORT_ACCESS_H_ */
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/esp_crypto_lock.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/esp_crypto_lock.h
new file mode 100644
index 00000000..781ac077
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/esp_crypto_lock.h
@@ -0,0 +1,53 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * This API should be used by all components which use the SHA, AES, HMAC and DS crypto hardware on the ESP32S3.
+ * Not all of them can be used in parallel because they use the same underlying module.
+ * E.g., HMAC uses SHA or DS uses HMAC and AES. See the ESP32S3 Technical Reference Manual for more details.
+ *
+ * Other unrelated components must not use it.
+ */
+
+/**
+ * @brief Acquire lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_acquire(void);
+
+/**
+ * @brief Release lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_release(void);
+
+/**
+ * Acquire lock for the MPI/RSA cryptography peripheral
+ */
+void esp_crypto_mpi_lock_acquire(void);
+
+/**
+ * Release lock for the MPI/RSA cryptography peripheral
+ */
+void esp_crypto_mpi_lock_release(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/memprot.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/memprot.h
new file mode 100644
index 00000000..7e47a8cf
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/memprot.h
@@ -0,0 +1,492 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/* INTERNAL API
+ * generic interface to MMU memory protection features
+ */
+
+#pragma once
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_attr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    MEMPROT_NONE =              0x00000000,
+    MEMPROT_IRAM0_SRAM =        0x00000001,
+    MEMPROT_DRAM0_SRAM =        0x00000002,
+    MEMPROT_IRAM0_RTCFAST =     0x00000004,
+    MEMPROT_DRAM0_RTCFAST =     0x00000008,
+    MEMPROT_PERI1_RTCSLOW =     0x00000010,
+    MEMPROT_PERI2_RTCSLOW_0 =   0x00000020,
+    MEMPROT_PERI2_RTCSLOW_1 =   0x00000040,
+    MEMPROT_ALL =               0xFFFFFFFF
+} mem_type_prot_t;
+
+
+/**
+ * @brief Returns splitting address for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Splitting address for the memory region required.
+ * The address is given by region-specific global symbol exported from linker script,
+ * it is not read out from related configuration register.
+ */
+uint32_t *IRAM_ATTR esp_memprot_get_split_addr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Initializes illegal memory access control (MMU) for required memory section.
+ *
+ * All memory access interrupts share ETS_MEMACCESS_ERR_INUM input channel, it is caller's
+ * responsibility to properly detect actual intr. source as well as possible prioritization in case
+ * of multiple source reported during one intr.handling routine run
+ *
+ *  @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+void esp_memprot_intr_init(mem_type_prot_t mem_type);
+
+/**
+ * @brief Enable/disable the memory protection interrupt
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param enable enable/disable
+ */
+void esp_memprot_intr_ena(mem_type_prot_t mem_type, bool enable);
+
+/**
+ * @brief Sets a request for clearing interrupt-on flag for specified memory region (register write)
+ *
+ * @note When called without actual interrupt-on flag set, subsequent occurrence of related interrupt is ignored.
+ * Should be used only after the real interrupt appears, typically as the last step in interrupt handler's routine.
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+void esp_memprot_clear_intr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Detects which memory protection interrupt is active
+ *
+ * @note Check order
+ *          MEMPROT_IRAM0_SRAM
+ *          MEMPROT_IRAM0_RTCFAST
+ *          MEMPROT_DRAM0_SRAM
+ *          MEMPROT_DRAM0_RTCFAST
+ *
+ * @return Memory protection area type (see mem_type_prot_t enum)
+ */
+mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
+
+/**
+ * @brief Gets interrupt status register contents for specified memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Contents of status register
+ */
+uint32_t esp_memprot_get_fault_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Get details of given interrupt status
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param faulting_address Faulting address causing the interrupt [out]
+ * @param op_type Operation being processed at the faulting address [out]
+ *               IRAM0: 0 - read, 1 - write
+ *               DRAM0: 0 - read, 1 - write
+ * @param op_subtype Additional info for op_type [out]
+ *               IRAM0: 0 - instruction segment access, 1 - data segment access
+ *               DRAM0: 0 - non-atomic operation, 1 - atomic operation
+ */
+void IRAM_ATTR esp_memprot_get_fault_status(mem_type_prot_t mem_type, uint32_t **faulting_address, uint32_t *op_type, uint32_t *op_subtype);
+
+/**
+ * @brief Gets string representation of required memory region identifier
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return mem_type as string
+ */
+const char *IRAM_ATTR esp_memprot_type_to_str(mem_type_prot_t mem_type);
+
+/**
+ * @brief Detects whether any of the interrupt locks is active (requires digital system reset to unlock)
+ *
+ * @return true/false
+ */
+bool esp_memprot_is_locked_any(void);
+
+/**
+ * @brief Sets lock for specified memory region.
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets lock status for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets permission control configuration register contents for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Permission control register contents
+ */
+uint32_t esp_memprot_get_conf_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt permission settings for unified management block
+ *
+ * Gets interrupt permission settings register contents for required memory region, returns settings for unified management blocks
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Permission settings register contents
+ */
+uint32_t esp_memprot_get_perm_uni_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt permission settings for split management block
+ *
+ * Gets interrupt permission settings register contents for required memory region, returns settings for split management blocks
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Permission settings register contents
+ */
+uint32_t esp_memprot_get_perm_split_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Detects whether any of the memory protection interrupts is enabled
+ *
+ * @return true/false
+ */
+bool esp_memprot_is_intr_ena_any(void);
+
+/**
+ * @brief Gets interrupt-enabled flag for given memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Interrupt-enabled value
+ */
+uint32_t esp_memprot_get_intr_ena_bit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt-active flag for given memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Interrupt-active value
+ */
+uint32_t esp_memprot_get_intr_on_bit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt-clear request flag for given memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Interrupt-clear request value
+ */
+uint32_t esp_memprot_get_intr_clr_bit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets read permission value for specified block and memory region
+ *
+ * Returns read permission bit value for required unified-management block (0-3) in given memory region.
+ * Applicable to all memory types.
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ *
+ * @return Read permission value for required block
+ */
+uint32_t esp_memprot_get_uni_block_read_bit(mem_type_prot_t mem_type, uint32_t block);
+
+/**
+ * @brief Gets write permission value for specified block and memory region
+ *
+ * Returns write permission bit value for required unified-management block (0-3) in given memory region.
+ * Applicable to all memory types.
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ *
+ * @return Write permission value for required block
+ */
+uint32_t esp_memprot_get_uni_block_write_bit(mem_type_prot_t mem_type, uint32_t block);
+
+/**
+ * @brief Gets execute permission value for specified block and memory region
+ *
+ * Returns execute permission bit value for required unified-management block (0-3) in given memory region.
+ * Applicable only to IRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ *
+ * @return Execute permission value for required block
+ */
+uint32_t esp_memprot_get_uni_block_exec_bit(mem_type_prot_t mem_type, uint32_t block);
+
+/**
+ * @brief Sets permissions for specified block in DRAM region
+ *
+ * Sets Read and Write permission for specified unified-management block (0-3) in given memory region.
+ * Applicable only to DRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ * @param write_perm Write permission flag
+ * @param read_perm Read permission flag
+ */
+void esp_memprot_set_uni_block_perm_dram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm);
+
+/**
+ * @brief Sets permissions for high and low memory segment in DRAM region
+ *
+ * Sets Read and Write permission for both low and high memory segments given by splitting address.
+ * The splitting address must be equal to or higher then beginning of block 5
+ * Applicable only to DRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_set_prot_dram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
+
+/**
+ * @brief Sets permissions for specified block in IRAM region
+ *
+ * Sets Read, Write and Execute permission for specified unified-management block (0-3) in given memory region.
+ * Applicable only to IRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ * @param write_perm Write permission flag
+ * @param exec_perm Execute permission flag
+ */
+void esp_memprot_set_uni_block_perm_iram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm, bool exec_perm);
+
+/**
+ * @brief Sets permissions for high and low memory segment in IRAM region
+ *
+ * Sets Read, Write and Execute permission for both low and high memory segments given by splitting address.
+ * The splitting address must be equal to or higher then beginning of block 5
+ * Applicable only to IRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_set_prot_iram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
+
+/**
+ * @brief Activates memory protection for all supported memory region types
+ *
+ * @note The feature is disabled when JTAG interface is connected
+ *
+ * @param invoke_panic_handler map mem.prot interrupt to ETS_MEMACCESS_ERR_INUM and thus invokes panic handler when fired ('true' not suitable for testing)
+ * @param lock_feature sets LOCK bit, see esp_memprot_set_lock() ('true' not suitable for testing)
+ * @param mem_type_mask holds a set of required memory protection types (bitmask built of mem_type_prot_t). NULL means default (MEMPROT_ALL in this version)
+ */
+void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
+
+/**
+ * @brief Get permission settings bits for IRAM0 split mgmt. Only IRAM0 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_get_perm_split_bits_iram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+
+/**
+ * @brief Get permission settings bits for DRAM0 split mgmt. Only DRAM0 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_get_perm_split_bits_dram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
+
+/**
+ * @brief Sets permissions for high and low memory segment in PERIBUS1 region
+ *
+ * Sets Read and Write permission for both low and high memory segments given by splitting address.
+ * Applicable only to PERIBUS1 memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_set_prot_peri1(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
+
+/**
+ * @brief Get permission settings bits for PERIBUS1 split mgmt. Only PERIBUS1 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_get_perm_split_bits_peri1(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
+
+/**
+ * @brief Get permission settings bits for PERIBUS2 split mgmt. Only PERIBUS2 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_get_perm_split_bits_peri2(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+
+/**
+ * @brief Sets permissions for high and low memory segment in PERIBUS2 region
+ *
+ * Sets Read Write permission for both low and high memory segments given by splitting address.
+ * Applicable only to PERIBUS2 memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_set_prot_peri2(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
+
+/**
+ * @brief Get permissions for specified memory type. Irrelevant bits are ignored
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_get_permissions(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+
+/**
+ * @brief Get Read permission settings for low and high regions of given memory type
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Read permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_get_perm_read(mem_type_prot_t mem_type, bool *lr, bool *hr);
+
+/**
+ * @brief Get Write permission settings for low and high regions of given memory type
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Write permission flag
+ * @param hr High segment Write permission flag
+ */
+void esp_memprot_get_perm_write(mem_type_prot_t mem_type, bool *lw, bool *hw);
+
+/**
+ * @brief Get Execute permission settings for low and high regions of given memory type
+ * Applicable only to IBUS-compatible memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Exec permission flag
+ * @param hr High segment Exec permission flag
+ */
+void esp_memprot_get_perm_exec(mem_type_prot_t mem_type, bool *lx, bool *hx);
+
+/**
+ * @brief Returns the lowest address in required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+uint32_t esp_memprot_get_low_limit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns the highest address in required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+uint32_t esp_memprot_get_high_limit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Sets READ permission bit for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Read permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_set_read_perm(mem_type_prot_t mem_type, bool lr, bool hr);
+
+/**
+ * @brief Sets WRITE permission bit for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Write permission flag
+ * @param hr High segment Write permission flag
+ */
+void esp_memprot_set_write_perm(mem_type_prot_t mem_type, bool lw, bool hw);
+
+/**
+ * @brief Sets EXECUTE permission bit for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Exec permission flag
+ * @param hr High segment Exec permission flag
+ */
+void esp_memprot_set_exec_perm(mem_type_prot_t mem_type, bool lx, bool hx);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/rtc.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/rtc.h
new file mode 100644
index 00000000..296292e2
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/rtc.h
@@ -0,0 +1,39 @@
+// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp32s2/rtc.h
+ *
+ * This file contains declarations of rtc related functions.
+ */
+
+/**
+ * @brief Get current value of RTC counter in microseconds
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter in microseconds
+ */
+uint64_t esp_rtc_get_time_us(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/spiram.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/spiram.h
new file mode 100644
index 00000000..105a6054
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp32s3/spiram.h
@@ -0,0 +1,146 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef __ESP_SPIRAM_H
+#define __ESP_SPIRAM_H
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Initialize spiram interface/hardware. Normally called from cpu_start.c.
+ *
+ * @return ESP_OK on success
+ */
+esp_err_t esp_spiram_init(void);
+
+/**
+ * @brief Configure Cache/MMU for access to external SPI RAM.
+ *
+ * Normally this function is called from cpu_start, if CONFIG_SPIRAM_BOOT_INIT
+ * option is enabled. Applications which need to enable SPI RAM at run time
+ * can disable CONFIG_SPIRAM_BOOT_INIT, and call this function later.
+ *
+ * @attention this function must be called with flash cache disabled.
+ */
+void esp_spiram_init_cache(void);
+
+
+/**
+ * @brief Memory test for SPI RAM. Should be called after SPI RAM is initialized and
+ * (in case of a dual-core system) the app CPU is online. This test overwrites the
+ * memory with crap, so do not call after e.g. the heap allocator has stored important
+ * stuff in SPI RAM.
+ *
+ * @return true on success, false on failed memory test
+ */
+bool esp_spiram_test(void);
+
+
+/**
+ * @brief Add the initialized SPI RAM to the heap allocator.
+ */
+esp_err_t esp_spiram_add_to_heapalloc(void);
+
+
+/**
+ * @brief Get the size of the attached SPI RAM chip selected in menuconfig
+ *
+ * @return Size in bytes, or 0 if no external RAM chip support compiled in.
+ */
+size_t esp_spiram_get_size(void);
+
+
+/**
+ * @brief Force a writeback of the data in the SPI RAM cache. This is to be called whenever
+ * cache is disabled, because disabling cache on the ESP32 discards the data in the SPI
+ * RAM cache.
+ *
+ * This is meant for use from within the SPI flash code.
+ */
+void esp_spiram_writeback_cache(void);
+
+
+
+/**
+ * @brief Reserve a pool of internal memory for specific DMA/internal allocations
+ *
+ * @param size Size of reserved pool in bytes
+ *
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NO_MEM when no memory available for pool
+ */
+esp_err_t esp_spiram_reserve_dma_pool(size_t size);
+
+#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS
+
+extern int _instruction_reserved_start, _instruction_reserved_end;
+
+/**
+ * @brief Get the start page number of the instruction in SPI flash
+ *
+ * @return start page number
+ */
+uint32_t instruction_flash_start_page_get(void);
+/**
+ * @brief Get the end page number of the instruction in SPI flash
+ *
+ * @return end page number
+ */
+uint32_t instruction_flash_end_page_get(void);
+/**
+ * @brief Get the offset of instruction from SPI flash to SPI RAM
+ *
+ * @return instruction offset
+ */
+int instruction_flash2spiram_offset(void);
+#endif
+
+#if CONFIG_SPIRAM_RODATA
+
+extern int _rodata_reserved_start, _rodata_reserved_end;
+
+/**
+ * @brief Get the start page number of the rodata in SPI flash
+ *
+ * @return start page number
+ */
+uint32_t rodata_flash_start_page_get(void);
+/**
+ * @brief Get the end page number of the rodata in SPI flash
+ *
+ * @return end page number
+ */
+uint32_t rodata_flash_end_page_get(void);
+/**
+ * @brief Get the offset number of rodata from SPI flash to SPI RAM
+ *
+ * @return rodata offset
+ */
+int rodata_flash2spiram_offset(void);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32/include/esp32/include/esp_himem.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp_himem.h
similarity index 100%
rename from tools/sdk/esp32/include/esp32/include/esp_himem.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp_himem.h
diff --git a/tools/sdk/esp32/include/esp32/include/esp_spiram.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/esp_spiram.h
similarity index 100%
rename from tools/sdk/esp32/include/esp32/include/esp_spiram.h
rename to tools/sdk/esp32/include/esp_hw_support/include/soc/esp_spiram.h
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/soc/spinlock.h b/tools/sdk/esp32/include/esp_hw_support/include/soc/spinlock.h
index 5370642a..66baa930 100644
--- a/tools/sdk/esp32/include/esp_hw_support/include/soc/spinlock.h
+++ b/tools/sdk/esp32/include/esp_hw_support/include/soc/spinlock.h
@@ -18,7 +18,6 @@
 #include "sdkconfig.h"
 #include "soc/cpu.h"
 #include "hal/cpu_hal.h"
-#include "soc/soc_memory_layout.h"
 #include "soc/compare_set.h"
 
 #if __XTENSA__
diff --git a/tools/sdk/esp32/include/esp_hw_support/port/esp32/spiram_psram.h b/tools/sdk/esp32/include/esp_hw_support/port/esp32/spiram_psram.h
new file mode 100644
index 00000000..263fb924
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_hw_support/port/esp32/spiram_psram.h
@@ -0,0 +1,70 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+#ifndef _PSRAM_H
+#define _PSRAM_H
+#include "soc/spi_periph.h"
+#include "esp_err.h"
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    PSRAM_CACHE_F80M_S40M = 0,
+    PSRAM_CACHE_F40M_S40M,
+    PSRAM_CACHE_F80M_S80M,
+    PSRAM_CACHE_MAX,
+} psram_cache_mode_t;
+
+typedef enum {
+    PSRAM_SIZE_16MBITS = 0,
+    PSRAM_SIZE_32MBITS = 1,
+    PSRAM_SIZE_64MBITS = 2,
+    PSRAM_SIZE_MAX,
+} psram_size_t;
+
+/*
+See the TRM, chapter PID/MPU/MMU, header 'External RAM' for the definitions of these modes.
+
+Important is that NORMAL works with the app CPU cache disabled, but gives huge cache coherency
+issues when both app and pro CPU are enabled. LOWHIGH and EVENODD do not have these coherency
+issues but cannot be used when the app CPU cache is disabled.
+*/
+
+typedef enum {
+    PSRAM_VADDR_MODE_NORMAL=0, ///< App and pro CPU use their own flash cache for external RAM access
+    PSRAM_VADDR_MODE_LOWHIGH,  ///< App and pro CPU share external RAM caches: pro CPU has low 2M, app CPU has high 2M
+    PSRAM_VADDR_MODE_EVENODD,  ///< App and pro CPU share external RAM caches: pro CPU does even 32yte ranges, app does odd ones.
+} psram_vaddr_mode_t;
+
+/**
+ * @brief get psram size
+ * @return
+ *     - PSRAM_SIZE_MAX if psram not enabled or not valid
+ *     - PSRAM size
+ */
+psram_size_t psram_get_size(void);
+
+/**
+ * @brief psram cache enable function
+ *
+ * Esp-idf uses this to initialize cache for psram, mapping it into the main memory
+ * address space.
+ *
+ * @param mode       SPI mode to access psram in
+ * @param vaddrmode  Mode the psram cache works in.
+ * @return ESP_OK on success, ESP_ERR_INVALID_STATE when VSPI peripheral is needed but cannot be claimed.
+ */
+esp_err_t psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vaddrmode);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32/include/esp_rom/include/esp32/rom/rtc.h b/tools/sdk/esp32/include/esp_rom/include/esp32/rom/rtc.h
index 79ad9b0a..2be040aa 100644
--- a/tools/sdk/esp32/include/esp_rom/include/esp32/rom/rtc.h
+++ b/tools/sdk/esp32/include/esp_rom/include/esp32/rom/rtc.h
@@ -22,6 +22,7 @@
 
 #include "soc/soc.h"
 #include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -98,6 +99,19 @@ typedef enum {
     RTCWDT_RTC_RESET       = 16     /**<16, RTC Watch dog reset digital core and rtc module*/
 } RESET_REASON;
 
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)SW_RESET == RESET_REASON_CORE_SW, "SW_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TGWDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TGWDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)SW_CPU_RESET == RESET_REASON_CPU0_SW, "SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+
 typedef enum {
     NO_SLEEP        = 0,
     EXT_EVENT0_TRIG = BIT0,
diff --git a/tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/rtc.h b/tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/rtc.h
index fcbfddc1..76ece7e8 100644
--- a/tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/rtc.h
+++ b/tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/rtc.h
@@ -22,6 +22,7 @@
 
 #include "soc/soc.h"
 #include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -99,6 +100,20 @@ typedef enum {
     SUPER_WDT_RESET        = 18,    /**<11, super watchdog reset digital core and rtc module*/
 } RESET_REASON;
 
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
+
 typedef enum {
     NO_SLEEP        = 0,
     EXT_EVENT0_TRIG = BIT0,
diff --git a/tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/rtc.h b/tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/rtc.h
index fcbfddc1..76ece7e8 100644
--- a/tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/rtc.h
+++ b/tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/rtc.h
@@ -22,6 +22,7 @@
 
 #include "soc/soc.h"
 #include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -99,6 +100,20 @@ typedef enum {
     SUPER_WDT_RESET        = 18,    /**<11, super watchdog reset digital core and rtc module*/
 } RESET_REASON;
 
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
+
 typedef enum {
     NO_SLEEP        = 0,
     EXT_EVENT0_TRIG = BIT0,
diff --git a/tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/rtc.h b/tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/rtc.h
index 509b6fd4..d46e5d7b 100644
--- a/tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/rtc.h
+++ b/tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/rtc.h
@@ -22,6 +22,7 @@
 
 #include "soc/soc.h"
 #include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -98,6 +99,21 @@ typedef enum {
     GLITCH_RTC_RESET       = 19,    /**<19, glitch reset digital core and rtc module*/
 } RESET_REASON;
 
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
+_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
+
 typedef enum {
     NO_SLEEP        = 0,
     EXT_EVENT0_TRIG = BIT0,
diff --git a/tools/sdk/esp32/include/esp_rom/include/esp32s3/rom/rtc.h b/tools/sdk/esp32/include/esp_rom/include/esp32s3/rom/rtc.h
index c1a31a38..09d2376e 100644
--- a/tools/sdk/esp32/include/esp_rom/include/esp32s3/rom/rtc.h
+++ b/tools/sdk/esp32/include/esp_rom/include/esp32s3/rom/rtc.h
@@ -17,6 +17,7 @@
 #include <stdbool.h>
 #include <stdint.h>
 #include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -93,6 +94,22 @@ typedef enum {
     EFUSE_RESET            = 20,    /**<20, efuse reset digital core*/
 } RESET_REASON;
 
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
+_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
+_Static_assert((soc_reset_reason_t)EFUSE_RESET == RESET_REASON_CORE_EFUSE_CRC, "EFUSE_RESET != RESET_REASON_CORE_EFUSE_CRC");
+
 typedef enum {
     NO_SLEEP        = 0,
     EXT_EVENT0_TRIG = BIT0,
diff --git a/tools/sdk/esp32/include/esp_rom/include/esp_rom_sys.h b/tools/sdk/esp32/include/esp_rom/include/esp_rom_sys.h
index a5b01ade..9bf73ade 100644
--- a/tools/sdk/esp32/include/esp_rom/include/esp_rom_sys.h
+++ b/tools/sdk/esp32/include/esp_rom/include/esp_rom_sys.h
@@ -14,12 +14,13 @@
 
 #pragma once
 
+#include <stdint.h>
+#include "soc/reset_reasons.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include <stdint.h>
-
 /**
  * @brief Print formated string to console device
  * @note float and long long data are not supported!
@@ -51,6 +52,14 @@ void esp_rom_install_channel_putc(int channel, void (*putc)(char c));
  */
 void esp_rom_install_uart_printf(void);
 
+/**
+ * @brief Get reset reason of CPU
+ *
+ * @param cpu_no CPU number
+ * @return Reset reason code (see in soc/reset_reasons.h)
+ */
+soc_reset_reason_t esp_rom_get_reset_reason(int cpu_no);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/esp_system/include/eh_frame_parser.h b/tools/sdk/esp32/include/esp_system/include/eh_frame_parser.h
new file mode 100644
index 00000000..f99f63bb
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_system/include/eh_frame_parser.h
@@ -0,0 +1,35 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef EH_FRAME_PARSER_H
+#define EH_FRAME_PARSER_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Print backtrace for the given execution frame.
+ *
+ * @param frame_or Snapshot of the CPU registers when the program stopped its
+ *                 normal execution. This frame is usually generated on the
+ *                 stack when an exception or an interrupt occurs.
+ */
+void esp_eh_frame_print_backtrace(const void *frame_or);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32/include/freertos/port/xtensa/include/freertos/portmacro.h b/tools/sdk/esp32/include/freertos/port/xtensa/include/freertos/portmacro.h
index 222a5ae8..eeabdf78 100644
--- a/tools/sdk/esp32/include/freertos/port/xtensa/include/freertos/portmacro.h
+++ b/tools/sdk/esp32/include/freertos/port/xtensa/include/freertos/portmacro.h
@@ -308,11 +308,22 @@ static inline void uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t comp
 void vPortYield( void );
 void vPortEvaluateYieldFromISR(int argc, ...);
 void _frxt_setup_switch( void );
+
 /**
  * Macro to count number of arguments of a __VA_ARGS__ used to support portYIELD_FROM_ISR with,
- * or without arguments.
+ * or without arguments. The macro counts only 0 or 1 arguments.
+ *
+ * In the future, we want to switch to C++20. We also want to become compatible with clang.
+ * Hence, we provide two versions of the following macros which are using variadic arguments.
+ * The first one is using the GNU extension ##__VA_ARGS__. The second one is using the C++20 feature __VA_OPT__(,).
+ * This allows users to compile their code with standard C++20 enabled instead of the GNU extension.
+ * Below C++20, we haven't found any good alternative to using ##__VA_ARGS__.
  */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define portGET_ARGUMENT_COUNT(...) portGET_ARGUMENT_COUNT_INNER(0 __VA_OPT__(,) __VA_ARGS__,1,0)
+#else
 #define portGET_ARGUMENT_COUNT(...) portGET_ARGUMENT_COUNT_INNER(0, ##__VA_ARGS__,1,0)
+#endif
 #define portGET_ARGUMENT_COUNT_INNER(zero, one, count, ...) count
 
 _Static_assert(portGET_ARGUMENT_COUNT() == 0, "portGET_ARGUMENT_COUNT() result does not match for 0 arguments");
@@ -325,7 +336,11 @@ _Static_assert(portGET_ARGUMENT_COUNT(1) == 1, "portGET_ARGUMENT_COUNT() result
  *          it was developed to support both usages of portYIELD inside of an ISR. Any other usage form
  *          might result in undesired behaviour
  */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define portYIELD_FROM_ISR(...) vPortEvaluateYieldFromISR(portGET_ARGUMENT_COUNT(__VA_ARGS__) __VA_OPT__(,) __VA_ARGS__)
+#else
 #define portYIELD_FROM_ISR(...) vPortEvaluateYieldFromISR(portGET_ARGUMENT_COUNT(__VA_ARGS__), ##__VA_ARGS__)
+#endif
 
 /* Yielding within an API call (when interrupts are off), means the yield should be delayed
    until interrupts are re-enabled.
diff --git a/tools/sdk/esp32/include/hal/esp32/include/hal/spi_ll.h b/tools/sdk/esp32/include/hal/esp32/include/hal/spi_ll.h
index d26dcab1..426d7208 100644
--- a/tools/sdk/esp32/include/hal/esp32/include/hal/spi_ll.h
+++ b/tools/sdk/esp32/include/hal/esp32/include/hal/spi_ll.h
@@ -496,6 +496,16 @@ static inline void spi_ll_master_select_cs(spi_dev_t *hw, int cs_id)
     hw->pin.cs2_dis = (cs_id == 2) ? 0 : 1;
 }
 
+/**
+ * Keep Chip Select activated after the current transaction.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param keep_active if 0 don't keep CS activated, else keep CS activated
+ */
+static inline void spi_ll_master_keep_cs(spi_dev_t *hw, int keep_active) {
+    hw->pin.cs_keep_active = (keep_active != 0) ? 1 : 0;
+}
+
 /*------------------------------------------------------------------------------
  * Configs: parameters
  *----------------------------------------------------------------------------*/
@@ -744,7 +754,7 @@ static inline void spi_ll_set_mosi_bitlen(spi_dev_t *hw, size_t bitlen)
  */
 static inline void spi_ll_slave_set_rx_bitlen(spi_dev_t *hw, size_t bitlen)
 {
-    hw->slv_wrbuf_dlen.bit_len = bitlen - 1;
+    hw->slv_rdbuf_dlen.bit_len = bitlen - 1;
 }
 
 /**
@@ -755,7 +765,7 @@ static inline void spi_ll_slave_set_rx_bitlen(spi_dev_t *hw, size_t bitlen)
  */
 static inline void spi_ll_slave_set_tx_bitlen(spi_dev_t *hw, size_t bitlen)
 {
-    hw->slv_rdbuf_dlen.bit_len = bitlen - 1;
+    hw->slv_wrbuf_dlen.bit_len = bitlen - 1;
 }
 
 /**
diff --git a/tools/sdk/esp32/include/hal/include/hal/adc_types.h b/tools/sdk/esp32/include/hal/include/hal/adc_types.h
index bf71cb43..c0f6661f 100644
--- a/tools/sdk/esp32/include/hal/include/hal/adc_types.h
+++ b/tools/sdk/esp32/include/hal/include/hal/adc_types.h
@@ -133,7 +133,7 @@ typedef struct {
 -                                         2: 11 bit;
 -                                         3: 12 bit. */
             int8_t channel:   4;   /*!< ADC channel index. */
-#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+#elif CONFIG_IDF_TARGET_ESP32S2
             uint8_t reserved:  2;   /*!< reserved0 */
             uint8_t channel:   4;   /*!< ADC channel index. */
 #elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
@@ -295,7 +295,7 @@ typedef struct {
 #endif
 } adc_digi_config_t;
 
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+#if CONFIG_IDF_TARGET_ESP32S2
 /**
  * @brief ADC digital controller (DMA mode) interrupt type options.
  */
diff --git a/tools/sdk/esp32/include/hal/include/hal/dma_types.h b/tools/sdk/esp32/include/hal/include/hal/dma_types.h
index 7583bf6f..66c8677e 100644
--- a/tools/sdk/esp32/include/hal/include/hal/dma_types.h
+++ b/tools/sdk/esp32/include/hal/include/hal/dma_types.h
@@ -14,12 +14,12 @@
 
 #pragma once
 
+#include <stdint.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include <stdint.h>
-
 /**
  * @brief Type of DMA descriptor
  *
@@ -43,3 +43,7 @@ _Static_assert(sizeof(dma_descriptor_t) == 12, "dma_descriptor_t should occupy 1
 #define DMA_DESCRIPTOR_BUFFER_OWNER_CPU (0)   /*!< DMA buffer is allowed to be accessed by CPU */
 #define DMA_DESCRIPTOR_BUFFER_OWNER_DMA (1)   /*!< DMA buffer is allowed to be accessed by DMA engine */
 #define DMA_DESCRIPTOR_BUFFER_MAX_SIZE (4095) /*!< Maximum size of the buffer that can be attached to descriptor */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/hal/include/hal/eth_types.h b/tools/sdk/esp32/include/hal/include/hal/eth_types.h
index 72494845..21961895 100644
--- a/tools/sdk/esp32/include/hal/include/hal/eth_types.h
+++ b/tools/sdk/esp32/include/hal/include/hal/eth_types.h
@@ -24,8 +24,8 @@
 *
 */
 typedef enum {
-    EMAC_INTERFACE_MII,     /*!< Media Independent Interface */
-    EMAC_INTERFACE_RMII     /*!< Reduced Media Independent Interface */
+    EMAC_DATA_INTERFACE_RMII,    /*!< Reduced Media Independent Interface */
+    EMAC_DATA_INTERFACE_MII,     /*!< Media Independent Interface */
 } eth_data_interface_t;
 
 /**
diff --git a/tools/sdk/esp32/include/hal/include/hal/i2c_hal.h b/tools/sdk/esp32/include/hal/include/hal/i2c_hal.h
index ae1c95be..b255878c 100644
--- a/tools/sdk/esp32/include/hal/include/hal/i2c_hal.h
+++ b/tools/sdk/esp32/include/hal/include/hal/i2c_hal.h
@@ -110,6 +110,16 @@ typedef struct {
  */
 #define i2c_hal_slave_clr_rx_it(hal)    i2c_ll_slave_clr_rx_it((hal)->dev)
 
+/**
+ * @brief  Set the source clock. This function is meant to be used in
+ *         slave mode, in order to select a source clock abe to handle
+ *         the expected SCL frequency.
+ *
+ * @param  hal Context of the HAL layer
+ * @param  src_clk Source clock to use choosen from `i2c_sclk_t` type
+ */
+#define i2c_hal_set_source_clk(hal, src_clk) i2c_ll_set_source_clk((hal)->dev, src_clk)
+
 /**
  * @brief  Init the I2C master.
  *
diff --git a/tools/sdk/esp32/include/hal/include/hal/sha_types.h b/tools/sdk/esp32/include/hal/include/hal/sha_types.h
index 275ca60c..547124b5 100644
--- a/tools/sdk/esp32/include/hal/include/hal/sha_types.h
+++ b/tools/sdk/esp32/include/hal/include/hal/sha_types.h
@@ -19,25 +19,26 @@
 /* Use enum from rom for backwards compatibility */
 #if CONFIG_IDF_TARGET_ESP32
 #include "esp32/rom/sha.h"
-typedef enum SHA_TYPE esp_sha_type;
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/sha.h"
-typedef SHA_TYPE esp_sha_type;
 #elif CONFIG_IDF_TARGET_ESP32S3
 #include "esp32s3/rom/sha.h"
-typedef SHA_TYPE esp_sha_type;
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/sha.h"
-typedef SHA_TYPE esp_sha_type;
 #elif CONFIG_IDF_TARGET_ESP32H2
 #include "esp32h2/rom/sha.h"
-typedef SHA_TYPE esp_sha_type;
 #endif
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+/* Use enum from rom for backwards compatibility */
+#if CONFIG_IDF_TARGET_ESP32
+typedef enum SHA_TYPE esp_sha_type;
+#else
+typedef SHA_TYPE esp_sha_type;
+#endif
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32/include/hal/include/hal/spi_flash_hal.h b/tools/sdk/esp32/include/hal/include/hal/spi_flash_hal.h
index 6690b9c6..dbbb5ff5 100644
--- a/tools/sdk/esp32/include/hal/include/hal/spi_flash_hal.h
+++ b/tools/sdk/esp32/include/hal/include/hal/spi_flash_hal.h
@@ -25,7 +25,7 @@
 #include "hal/spi_flash_ll.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
-#include "soc/soc_memory_layout.h"
+#include "soc/soc_memory_types.h"
 
 /* Hardware host-specific constants */
 #define SPI_FLASH_HAL_MAX_WRITE_BYTES 64
diff --git a/tools/sdk/esp32/include/hal/include/hal/spi_hal.h b/tools/sdk/esp32/include/hal/include/hal/spi_hal.h
index 1c4dc3a0..b37c7c92 100644
--- a/tools/sdk/esp32/include/hal/include/hal/spi_hal.h
+++ b/tools/sdk/esp32/include/hal/include/hal/spi_hal.h
@@ -101,6 +101,7 @@ typedef struct {
     uint8_t *send_buffer;               ///< Data to be sent
     uint8_t *rcv_buffer;                ///< Buffer to hold the receive data.
     spi_ll_io_mode_t io_mode;           ///< IO mode of the master
+    int cs_keep_active;                 ///< Keep CS active after transaction
 } spi_hal_trans_config_t;
 
 /**
diff --git a/tools/sdk/esp32/include/hal/include/hal/twai_types.h b/tools/sdk/esp32/include/hal/include/hal/twai_types.h
index 5c51dba6..f4d5ef52 100644
--- a/tools/sdk/esp32/include/hal/include/hal/twai_types.h
+++ b/tools/sdk/esp32/include/hal/include/hal/twai_types.h
@@ -61,9 +61,9 @@ extern "C" {
  * @note The available bit rates are dependent on the chip target and revision.
  */
 #if (SOC_TWAI_BRP_MAX > 256)
-#define TWAI_TIMING_CONFIG_1KBITS()     {.brp = 4000, .tseg_1 = 15, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
-#define TWAI_TIMING_CONFIG_5KBITS()     {.brp = 800, .tseg_1 = 15, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
-#define TWAI_TIMING_CONFIG_10KBITS()    {.brp = 400, .tseg_1 = 15, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_1KBITS()     {.brp = 4000, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_5KBITS()     {.brp = 800, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_10KBITS()    {.brp = 400, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
 #endif
 #if (SOC_TWAI_BRP_MAX > 128) || (CONFIG_ESP32_REV_MIN >= 2)
 #define TWAI_TIMING_CONFIG_12_5KBITS()  {.brp = 256, .tseg_1 = 16, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
diff --git a/tools/sdk/esp32/include/hal/include/hal/uart_hal.h b/tools/sdk/esp32/include/hal/include/hal/uart_hal.h
index d236431d..f7b94888 100644
--- a/tools/sdk/esp32/include/hal/include/hal/uart_hal.h
+++ b/tools/sdk/esp32/include/hal/include/hal/uart_hal.h
@@ -124,6 +124,16 @@ typedef struct {
  */
 #define uart_hal_is_tx_idle(hal)  uart_ll_is_tx_idle((hal)->dev)
 
+/**
+ * @brief  Configure the UART core reset
+ *
+ * @param  hal Context of the HAL layer
+ * @param  Set true to enable the core reset, otherwise set it false
+ *
+ * @return None
+ */
+#define uart_hal_set_reset_core(hal, core_rst_en)  uart_ll_set_reset_core((hal)->dev, core_rst_en)
+
 /**
  * @brief  Read data from the UART rxfifo
  *
diff --git a/tools/sdk/esp32/include/heap/include/heap_memory_layout.h b/tools/sdk/esp32/include/heap/include/heap_memory_layout.h
new file mode 100644
index 00000000..5ad5ad85
--- /dev/null
+++ b/tools/sdk/esp32/include/heap/include/heap_memory_layout.h
@@ -0,0 +1,113 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "sdkconfig.h"
+
+#define SOC_MEMORY_TYPE_NO_PRIOS 3
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Type descriptor holds a description for a particular type of memory on a particular SoC.
+ */
+typedef struct {
+    const char *name;  ///< Name of this memory type
+    uint32_t caps[SOC_MEMORY_TYPE_NO_PRIOS]; ///< Capabilities for this memory type (as a prioritised set)
+    bool aliased_iram;   ///< If true, this is data memory that is is also mapped in IRAM
+    bool startup_stack; ///< If true, memory of this type is used for ROM stack during startup
+} soc_memory_type_desc_t;
+
+/* Constant table of tag descriptors for all this SoC's tags */
+extern const soc_memory_type_desc_t soc_memory_types[];
+extern const size_t soc_memory_type_count;
+
+/* Region descriptor holds a description for a particular region of memory on a particular SoC.
+ */
+typedef struct {
+    intptr_t start;  ///< Start address of the region
+    size_t size;            ///< Size of the region in bytes
+    size_t type;             ///< Type of the region (index into soc_memory_types array)
+    intptr_t iram_address; ///< If non-zero, is equivalent address in IRAM
+} soc_memory_region_t;
+
+extern const soc_memory_region_t soc_memory_regions[];
+extern const size_t soc_memory_region_count;
+
+/* Region descriptor holds a description for a particular region of
+   memory reserved on this SoC for a particular use (ie not available
+   for stack/heap usage.) */
+typedef struct {
+    intptr_t start;
+    intptr_t end;
+} soc_reserved_region_t;
+
+/* Use this macro to reserved a fixed region of RAM (hardcoded addresses)
+ * for a particular purpose.
+ *
+ * Usually used to mark out memory addresses needed for hardware or ROM code
+ * purposes.
+ *
+ * Don't call this macro from user code which can use normal C static allocation
+ * instead.
+ *
+ * @param START Start address to be reserved.
+ * @param END One after the address of the last byte to be reserved. (ie length of
+ * the reserved region is (END - START) in bytes.
+ * @param NAME Name for the reserved region. Must be a valid variable name,
+ * unique to this source file.
+ */
+#define SOC_RESERVE_MEMORY_REGION(START, END, NAME)     \
+    __attribute__((section(".reserved_memory_address"))) __attribute__((used)) \
+    static soc_reserved_region_t reserved_region_##NAME = { START, END };
+
+/* Return available memory regions for this SoC. Each available memory
+ * region is a contiguous piece of memory which is not being used by
+ * static data, used by ROM code, or reserved by a component using
+ * the SOC_RESERVE_MEMORY_REGION() macro.
+ *
+ * This result is soc_memory_regions[] minus all regions reserved
+ * via the SOC_RESERVE_MEMORY_REGION() macro (which may also split
+ * some regions up.)
+ *
+ * At startup, all available memory returned by this function is
+ * registered as heap space.
+ *
+ * @note OS-level startup function only, not recommended to call from
+ * app code.
+ *
+ * @param regions Pointer to an array for reading available regions into.
+ * Size of the array should be at least the result of
+ * soc_get_available_memory_region_max_count(). Entries in the array
+ * will be ordered by memory address.
+ *
+ * @return Number of entries copied to 'regions'. Will be no greater than
+ * the result of soc_get_available_memory_region_max_count().
+ */
+size_t soc_get_available_memory_regions(soc_memory_region_t *regions);
+
+/* Return the maximum number of available memory regions which could be
+ * returned by soc_get_available_memory_regions(). Used to size the
+ * array passed to that function.
+ */
+size_t soc_get_available_memory_region_max_count(void);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/heap/include/soc/soc_memory_layout.h b/tools/sdk/esp32/include/heap/include/soc/soc_memory_layout.h
new file mode 100644
index 00000000..189cf602
--- /dev/null
+++ b/tools/sdk/esp32/include/heap/include/soc/soc_memory_layout.h
@@ -0,0 +1,21 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/**
+ * Compatibility header file.
+ */
+#pragma once
+
+#include "heap_memory_layout.h"
+#include "soc/soc_memory_types.h"
diff --git a/tools/sdk/esp32/include/idf_test/include/esp32/idf_performance_target.h b/tools/sdk/esp32/include/idf_test/include/esp32/idf_performance_target.h
index f9f0c414..5700d9f3 100644
--- a/tools/sdk/esp32/include/idf_test/include/esp32/idf_performance_target.h
+++ b/tools/sdk/esp32/include/idf_test/include/esp32/idf_performance_target.h
@@ -98,7 +98,8 @@
 #endif
 
 #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  73500
+//Collect data and correct it later
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  0
 #endif
 #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
 #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  (261*1000)
diff --git a/tools/sdk/esp32/include/ieee802154/include/esp_ieee802154.h b/tools/sdk/esp32/include/ieee802154/include/esp_ieee802154.h
new file mode 100644
index 00000000..a8d4678e
--- /dev/null
+++ b/tools/sdk/esp32/include/ieee802154/include/esp_ieee802154.h
@@ -0,0 +1,367 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_ieee802154_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief  Initialize the IEEE 802.15.4 subsystem.
+ *
+ */
+void esp_ieee802154_enable(void);
+
+/**
+ * @brief  Deinitialize the IEEE 802.15.4 subsystem.
+ *
+ */
+void esp_ieee802154_disable(void);
+
+/**
+ * @brief  Get the operational channel.
+ *
+ * @return The channel number (11~26).
+ *
+ */
+uint8_t esp_ieee802154_get_channel(void);
+
+/**
+ * @brief  Set the operational channel.
+ *
+ * @param[in]  channel  The channel number (11-26).
+ *
+ */
+void esp_ieee802154_set_channnel(uint8_t channel);
+
+/**
+ * @brief  Get the transmit power.
+ *
+ * @return The transmit power in dBm.
+ *
+ */
+int8_t esp_ieee802154_get_txpower(void);
+
+/**
+ * @brief  Set the transmit power.
+ *
+ * @param[in]  power  The transmit power in dBm.
+ *
+ */
+void esp_ieee802154_set_txpower(int8_t power);
+
+/**
+ * @brief  Get the promiscuous mode.
+ *
+ * @return
+ *      - True   The promiscuous mode is enabled.
+ *      - False  The promiscuous mode is disabled.
+ *
+ */
+bool esp_ieee802154_get_promiscuous(void);
+
+/**
+ * @brief  Set the promiscuous mode.
+ *
+ * @param[in]  enable  The promiscuous mode to be set.
+ *
+ */
+void esp_ieee802154_set_promiscuous(bool enable);
+
+/**
+ * @brief  Get the IEEE 802.15.4 Radio state.
+ *
+ * @return  The IEEE 802.15.4 Radio state, refer to esp_ieee802154_state_t.
+ *
+ */
+esp_ieee802154_state_t esp_ieee802154_get_state(void);
+
+/**
+ * @brief  Set the IEEE 802.15.4 Radio to sleep state.
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_FAIL on failure due to invalid state.
+ *
+ */
+esp_err_t esp_ieee802154_sleep(void);
+
+/**
+ * @brief  Set the IEEE 802.15.4 Radio to receive state.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_FAIL on failure due to invalid state.
+ *
+ * Note: Radio will continue receiving until it receives a valid frame.
+ *       Ref to esp_ieee802154_receive_done().
+ *
+ */
+esp_err_t esp_ieee802154_receive(void);
+
+/**
+ * @brief  Transmit the given frame.
+ *
+ * @param[in]  frame  The pointer to the frame, the frame format:
+ *                    |-----------------------------------------------------------------------|
+ *                    | Len | MHR |              MAC Payload                          |  FCS  |
+ *                    |-----------------------------------------------------------------------|
+ * @param[in]  cca    Perform CCA before transmission if it's true, otherwise transmit the frame directly.
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_FAIL on failure due to invalid state.
+ *
+ * Note: The transmit result will be reported via esp_ieee802154_transmit_done()
+ *       or esp_ieee802154_transmit_failed().
+ *
+ */
+esp_err_t esp_ieee802154_transmit(const uint8_t *frame, bool cca);
+
+/**
+ * @brief  Set the time to wait for the ack frame.
+ *
+ * @param[in]  timeout  The time to wait for the ack frame, in symbol unit (16 us).
+ *                      Default: 0x006C, Range: 0x0000 - 0xFFFF.
+ *
+ */
+void esp_ieee802154_set_ack_timeout(uint32_t timeout);
+
+/**
+ * @brief  Get the device PAN ID.
+ *
+ * @return  The device PAN ID.
+ *
+ */
+uint16_t esp_ieee802154_get_panid(void);
+
+/**
+ * @brief  Set the device PAN ID.
+ *
+ * @param[in]  panid  The device PAN ID.
+ *
+ */
+void esp_ieee802154_set_panid(uint16_t panid);
+
+/**
+ * @brief  Get the device short address.
+ *
+ * @return  The device short address.
+ *
+ */
+uint16_t esp_ieee802154_get_short_address(void);
+
+/**
+ * @brief  Set the device short address.
+ *
+ * @param[in]  short_address  The device short address.
+ *
+ */
+void esp_ieee802154_set_short_address(uint16_t short_address);
+
+/**
+ * @brief  Get the device extended address.
+ *
+ * @param[out]  ext_addr  The pointer to the device extended address.
+ *
+ */
+void esp_ieee802154_get_extended_address(uint8_t *ext_addr);
+
+/**
+ * @brief  Set the device extended address.
+ *
+ * @param[in]  ext_addr  The pointer to the device extended address.
+ *
+ */
+void esp_ieee802154_set_extended_address(const uint8_t *ext_addr);
+
+/**
+ * @brief  Get the auto frame pending mode.
+ *
+ * @return  The auto frame pending mode, refer to esp_ieee802154_pending_mode_t.
+ *
+ */
+esp_ieee802154_pending_mode_t esp_ieee802154_get_pending_mode(void);
+
+/**
+ * @brief  Set the auto frame pending mode.
+ *
+ * @param[in]  pending_mode  The auto frame pending mode, refer to esp_ieee802154_pending_mode_t.
+ *
+ */
+void esp_ieee802154_set_pending_mode(esp_ieee802154_pending_mode_t pending_mode);
+
+/**
+ * @brief  Add address to the source matching table.
+ *
+ * @param[in]  addr      The pointer to the address.
+ * @param[in]  is_short  Short address or Extended address.
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_ERR_NO_MEM if the pending table is full.
+ *
+ */
+esp_err_t esp_ieee802154_add_pending_addr(const uint8_t *addr, bool is_short);
+
+/**
+ * @brief  Remove address from the source matching table.
+ *
+ * @param[in]  addr      The pointer to the address.
+ * @param[in]  is_short  Short address or Extended address.
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_ERR_NOT_FOUND if the address was not found from the source matching table.
+ *
+ */
+esp_err_t esp_ieee802154_clear_pending_addr(const uint8_t *addr, bool is_short);
+
+/**
+ * @brief  Clear the source matching table to empty.
+ *
+ * @param[in]  is_short  Clear Short address table or Extended address table.
+ *
+ */
+void esp_ieee802154_reset_pending_table(bool is_short);
+
+/**
+ * @brief  Get the CCA threshold.
+ *
+ * @return  The CCA threshold in dBm.
+ *
+ */
+int8_t esp_ieee802154_get_cca_threshold(void);
+
+/**
+ * @brief  Set the CCA threshold.
+ *
+ * @param[in]  cca_threshold  The CCA threshold in dBm.
+ *
+ */
+void esp_ieee802154_set_cca_threshold(int8_t cca_threshold);
+
+/**
+ * @brief  Get the CCA mode.
+ *
+ * @return  The CCA mode, refer to esp_ieee802154_cca_mode_t.
+ *
+ */
+esp_ieee802154_cca_mode_t esp_ieee802154_get_cca_mode(void);
+
+/**
+ * @brief  Set the CCA mode.
+ *
+ * @param[in]  cca_mode  The CCA mode, refer to esp_ieee802154_cca_mode_t.
+ *
+ */
+void esp_ieee802154_set_cca_mode(esp_ieee802154_cca_mode_t cca_mode);
+
+/**
+ * @brief  Enable rx_on_when_idle mode, radio will receive during idle.
+ *
+ * @param[in]  enable  Enable/Disable rx_on_when_idle mode.
+ *
+ */
+void esp_ieee802154_set_rx_when_idle(bool enable);
+
+/**
+ * @brief  Get the rx_on_when_idle mode.
+ *
+ * @return  rx_on_when_idle mode.
+ *
+ */
+bool esp_ieee802154_get_rx_when_idle(void);
+
+/**
+ * @brief  Perform energy detection.
+ *
+ * @param[in]  duration  The duration of energy detection, in symbol unit (16 us).
+ *                       The result will be reported via esp_ieee802154_energy_detect_done().
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_FAIL on failure due to invalid state.
+ *
+ */
+esp_err_t esp_ieee802154_energy_detect(uint32_t duration);
+
+
+/** Below are the events generated by IEEE 802.15.4 subsystem, which are in ISR context **/
+/**
+ * @brief  A Frame was received.
+ *
+ * @param[in]  frame  The point to the received frame, frame format:
+ *                    |-----------------------------------------------------------------------|
+ *                    | Len | MHR |              MAC Payload                       (no FCS)   |
+ *                    |-----------------------------------------------------------------------|
+ * @param[in]  frame_info  More information of the received frame, refer to esp_ieee802154_frame_info_t.
+ *
+ */
+extern void esp_ieee802154_receive_done(uint8_t *frame, esp_ieee802154_frame_info_t *frame_info);
+
+/**
+ * @brief  The SFD field of the frame was received.
+ *
+ */
+extern void esp_ieee802154_receive_sfd_done(void);
+
+/**
+ * @brief  The Frame Transmission succeeded.
+ *
+ * @param[in]  frame           The pointer to the transmitted frame.
+ * @param[in]  ack             The received ACK frame, it could be NULL if the transmitted frame's AR bit is not set.
+ * @param[in]  ack_frame_info  More information of the ACK frame, refer to esp_ieee802154_frame_info_t.
+ *
+ * Note: refer to esp_ieee802154_transmit().
+ *
+ */
+extern void esp_ieee802154_transmit_done(const uint8_t *frame, const uint8_t *ack, esp_ieee802154_frame_info_t *ack_frame_info);
+
+/**
+ * @brief  The Frame Transmission failed.
+ *
+ * @param[in]  frame  The pointer to the frame.
+ * @param[in]  error  The transmission failure reason, refer to esp_ieee802154_tx_error_t.
+ *
+ * Note: refer to esp_ieee802154_transmit().
+ *
+ */
+extern void esp_ieee802154_transmit_failed(const uint8_t *frame, esp_ieee802154_tx_error_t error);
+
+/**
+ * @brief  The SFD field of the frame was transmitted.
+ *
+ */
+extern void esp_ieee802154_transmit_sfd_done(uint8_t *frame);
+
+/**
+ * @brief  The energy detection done.
+ *
+ * @param[in]  power  The detected power level, in dBm.
+ *
+ * Note: refer to esp_ieee802154_energy_detect().
+ *
+ */
+extern void esp_ieee802154_energy_detect_done(int8_t power);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/ieee802154/include/esp_ieee802154_types.h b/tools/sdk/esp32/include/ieee802154/include/esp_ieee802154_types.h
new file mode 100644
index 00000000..6979991c
--- /dev/null
+++ b/tools/sdk/esp32/include/ieee802154/include/esp_ieee802154_types.h
@@ -0,0 +1,79 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief The radio state types.
+ */
+typedef enum {
+    ESP_IEEE802154_RADIO_DISABLE,   /*!< Radio not up */
+    ESP_IEEE802154_RADIO_SLEEP,     /*!< Radio in the sleep state */
+    ESP_IEEE802154_RADIO_RECEIVE,   /*!< Radio in the receive state */
+    ESP_IEEE802154_RADIO_TRANSMIT,  /*!< Radio in the transmit state */
+} esp_ieee802154_state_t;
+
+/**
+ * @brief The transmit error types.
+ */
+typedef enum {
+    ESP_IEEE802154_TX_ERR_NONE,         /*!< No transmit error */
+    ESP_IEEE802154_TX_ERR_CCA_BUSY,     /*!< Channel is busy */
+    ESP_IEEE802154_TX_ERR_ABORT,        /*!< Transmit abort */
+    ESP_IEEE802154_TX_ERR_NO_ACK,       /*!< No Ack frame received until timeout */
+    ESP_IEEE802154_TX_ERR_INVALID_ACK,  /*!< Invalid Ack frame */
+    ESP_IEEE802154_TX_ERR_COEXIST,      /*!< Rejected by coexist system */
+} esp_ieee802154_tx_error_t;
+
+/**
+ * @brief The CCA mode types.
+ */
+typedef enum {
+    ESP_IEEE802154_CCA_MODE_CARRIER,         /*!< Carrier only */
+    ESP_IEEE802154_CCA_MODE_ED,              /*!< Energy Detect only */
+    ESP_IEEE802154_CCA_MODE_CARRIER_OR_ED,   /*!< Carrier or Energy Detect */
+    ESP_IEEE802154_CCA_MODE_CARRIER_AND_ED,  /*!< Carrier and Energy Detect */
+} esp_ieee802154_cca_mode_t;
+
+/**
+ * @brief The frame pending mode types.
+ */
+typedef enum {
+    ESP_IEEE802154_AUTO_PENDING_DISABLE,   /*!< Frame pending bit always set to 1 in the ack to Data Request */
+    ESP_IEEE802154_AUTO_PENDING_ENABLE,    /*!< Frame pending bit set to 1 if src address matches, in the ack to Data Request */
+    ESP_IEEE802154_AUTO_PENDING_ENHANCED,  /*!< Frame pending bit set to 1 if src address matches, in all ack frames */
+} esp_ieee802154_pending_mode_t;
+
+/**
+ * @brief The information of received 15.4 frame.
+ *
+ */
+typedef struct {
+    bool pending;                /*!< The frame was acked with frame pending set */
+    uint8_t channel;             /*!< Channel */
+    int8_t rssi;                 /*!< RSSI */
+    uint8_t lqi;                 /*!< LQI */
+    uint64_t timestamp;          /*!< The timestamp when the frame's SFD field was received */
+} esp_ieee802154_frame_info_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/log/include/esp_log.h b/tools/sdk/esp32/include/log/include/esp_log.h
index 6fb4476d..cf7bcd60 100644
--- a/tools/sdk/esp32/include/log/include/esp_log.h
+++ b/tools/sdk/esp32/include/log/include/esp_log.h
@@ -295,6 +295,26 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 /** @endcond */
 
 /// macro to output logs in startup code, before heap allocator and syscalls have been initialized. log at ``ESP_LOG_ERROR`` level. @see ``printf``,``ESP_LOGE``,``ESP_DRAM_LOGE``
+#define portGET_ARGUMENT_COUNT_INNER(zero, one, count, ...) count
+
+/**
+ * In the future, we want to switch to C++20. We also want to become compatible with clang.
+ * Hence, we provide two versions of the following macros which are using variadic arguments.
+ * The first one is using the GNU extension \#\#__VA_ARGS__. The second one is using the C++20 feature __VA_OPT__(,).
+ * This allows users to compile their code with standard C++20 enabled instead of the GNU extension.
+ * Below C++20, we haven't found any good alternative to using \#\#__VA_ARGS__.
+ */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_EARLY_LOGE( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_ERROR,   E __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_WARN`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGW( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_WARN,    W __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_INFO`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGI( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_INFO,    I __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_DEBUG`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGD( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_DEBUG,   D __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGV( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_VERBOSE, V __VA_OPT__(,) __VA_ARGS__)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #define ESP_EARLY_LOGE( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_ERROR,   E, ##__VA_ARGS__)
 /// macro to output logs in startup code at ``ESP_LOG_WARN`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
 #define ESP_EARLY_LOGW( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_WARN,    W, ##__VA_ARGS__)
@@ -304,6 +324,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 #define ESP_EARLY_LOGD( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_DEBUG,   D, ##__VA_ARGS__)
 /// macro to output logs in startup code at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
 #define ESP_EARLY_LOGV( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_VERBOSE, V, ##__VA_ARGS__)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 
 #ifdef BOOTLOADER_BUILD
 #define _ESP_LOG_EARLY_ENABLED(log_level) (LOG_LOCAL_LEVEL >= (log_level))
@@ -319,12 +340,21 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
         }} while(0)
 
 #ifndef BOOTLOADER_BUILD
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_LOGE( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_ERROR,   tag, format __VA_OPT__(,) __VA_ARGS__)
+#define ESP_LOGW( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_WARN,    tag, format __VA_OPT__(,) __VA_ARGS__)
+#define ESP_LOGI( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_INFO,    tag, format __VA_OPT__(,) __VA_ARGS__)
+#define ESP_LOGD( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_DEBUG,   tag, format __VA_OPT__(,) __VA_ARGS__)
+#define ESP_LOGV( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_VERBOSE, tag, format __VA_OPT__(,) __VA_ARGS__)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #define ESP_LOGE( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_ERROR,   tag, format, ##__VA_ARGS__)
 #define ESP_LOGW( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_WARN,    tag, format, ##__VA_ARGS__)
 #define ESP_LOGI( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_INFO,    tag, format, ##__VA_ARGS__)
 #define ESP_LOGD( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_DEBUG,   tag, format, ##__VA_ARGS__)
 #define ESP_LOGV( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_VERBOSE, tag, format, ##__VA_ARGS__)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #else
+
 /**
  * Macro to output logs at ESP_LOG_ERROR level.
  *
@@ -334,6 +364,17 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
  *
  * @see ``printf``
  */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_LOGE( tag, format, ... )  ESP_EARLY_LOGE(tag, format __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_WARN`` level.  @see ``ESP_LOGE``
+#define ESP_LOGW( tag, format, ... )  ESP_EARLY_LOGW(tag, format __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_INFO`` level.  @see ``ESP_LOGE``
+#define ESP_LOGI( tag, format, ... )  ESP_EARLY_LOGI(tag, format __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_DEBUG`` level.  @see ``ESP_LOGE``
+#define ESP_LOGD( tag, format, ... )  ESP_EARLY_LOGD(tag, format __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_LOGE``
+#define ESP_LOGV( tag, format, ... )  ESP_EARLY_LOGV(tag, format __VA_OPT__(,) __VA_ARGS__)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #define ESP_LOGE( tag, format, ... )  ESP_EARLY_LOGE(tag, format, ##__VA_ARGS__)
 /// macro to output logs at ``ESP_LOG_WARN`` level.  @see ``ESP_LOGE``
 #define ESP_LOGW( tag, format, ... )  ESP_EARLY_LOGW(tag, format, ##__VA_ARGS__)
@@ -343,6 +384,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 #define ESP_LOGD( tag, format, ... )  ESP_EARLY_LOGD(tag, format, ##__VA_ARGS__)
 /// macro to output logs at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_LOGE``
 #define ESP_LOGV( tag, format, ... )  ESP_EARLY_LOGV(tag, format, ##__VA_ARGS__)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #endif  // BOOTLOADER_BUILD
 
 /** runtime macro to output logs at a specified level.
@@ -354,6 +396,25 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
  *
  * @see ``printf``
  */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#if CONFIG_LOG_TIMESTAMP_SOURCE_RTOS
+#define ESP_LOG_LEVEL(level, tag, format, ...) do {                     \
+        if (level==ESP_LOG_ERROR )          { esp_log_write(ESP_LOG_ERROR,      tag, LOG_FORMAT(E, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_WARN )      { esp_log_write(ESP_LOG_WARN,       tag, LOG_FORMAT(W, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_DEBUG )     { esp_log_write(ESP_LOG_DEBUG,      tag, LOG_FORMAT(D, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_VERBOSE )   { esp_log_write(ESP_LOG_VERBOSE,    tag, LOG_FORMAT(V, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else                                { esp_log_write(ESP_LOG_INFO,       tag, LOG_FORMAT(I, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+    } while(0)
+#elif CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM
+#define ESP_LOG_LEVEL(level, tag, format, ...) do {                     \
+        if (level==ESP_LOG_ERROR )          { esp_log_write(ESP_LOG_ERROR,      tag, LOG_SYSTEM_TIME_FORMAT(E, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_WARN )      { esp_log_write(ESP_LOG_WARN,       tag, LOG_SYSTEM_TIME_FORMAT(W, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_DEBUG )     { esp_log_write(ESP_LOG_DEBUG,      tag, LOG_SYSTEM_TIME_FORMAT(D, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_VERBOSE )   { esp_log_write(ESP_LOG_VERBOSE,    tag, LOG_SYSTEM_TIME_FORMAT(V, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else                                { esp_log_write(ESP_LOG_INFO,       tag, LOG_SYSTEM_TIME_FORMAT(I, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+    } while(0)
+#endif //CONFIG_LOG_TIMESTAMP_SOURCE_xxx
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #if CONFIG_LOG_TIMESTAMP_SOURCE_RTOS
 #define ESP_LOG_LEVEL(level, tag, format, ...) do {                     \
         if (level==ESP_LOG_ERROR )          { esp_log_write(ESP_LOG_ERROR,      tag, LOG_FORMAT(E, format), esp_log_timestamp(), tag, ##__VA_ARGS__); } \
@@ -371,6 +432,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
         else                                { esp_log_write(ESP_LOG_INFO,       tag, LOG_SYSTEM_TIME_FORMAT(I, format), esp_log_system_timestamp(), tag, ##__VA_ARGS__); } \
     } while(0)
 #endif //CONFIG_LOG_TIMESTAMP_SOURCE_xxx
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 
 /** runtime macro to output logs at a specified level. Also check the level with ``LOG_LOCAL_LEVEL``.
  *
@@ -397,6 +459,17 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
  *
  * @see ``esp_rom_printf``,``ESP_LOGE``
  */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_DRAM_LOGE( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_ERROR,   E __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_WARN`` level.  @see ``ESP_DRAM_LOGW``,``ESP_LOGW``, ``esp_rom_printf``
+#define ESP_DRAM_LOGW( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_WARN,    W __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_INFO`` level.  @see ``ESP_DRAM_LOGI``,``ESP_LOGI``, ``esp_rom_printf``
+#define ESP_DRAM_LOGI( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_INFO,    I __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_DEBUG`` level.  @see ``ESP_DRAM_LOGD``,``ESP_LOGD``, ``esp_rom_printf``
+#define ESP_DRAM_LOGD( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_DEBUG,   D __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_DRAM_LOGV``,``ESP_LOGV``, ``esp_rom_printf``
+#define ESP_DRAM_LOGV( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_VERBOSE, V __VA_OPT__(,) __VA_ARGS__)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #define ESP_DRAM_LOGE( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_ERROR,   E, ##__VA_ARGS__)
 /// macro to output logs when the cache is disabled at ``ESP_LOG_WARN`` level.  @see ``ESP_DRAM_LOGW``,``ESP_LOGW``, ``esp_rom_printf``
 #define ESP_DRAM_LOGW( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_WARN,    W, ##__VA_ARGS__)
@@ -406,14 +479,22 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 #define ESP_DRAM_LOGD( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_DEBUG,   D, ##__VA_ARGS__)
 /// macro to output logs when the cache is disabled at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_DRAM_LOGV``,``ESP_LOGV``, ``esp_rom_printf``
 #define ESP_DRAM_LOGV( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_VERBOSE, V, ##__VA_ARGS__)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 
 /** @cond */
 #define _ESP_LOG_DRAM_LOG_FORMAT(letter, format)  DRAM_STR(#letter " %s: " format "\n")
 
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_DRAM_LOG_IMPL(tag, format, log_level, log_tag_letter, ...) do {                                  \
+        if (_ESP_LOG_EARLY_ENABLED(log_level)) {                                                             \
+            esp_rom_printf(_ESP_LOG_DRAM_LOG_FORMAT(log_tag_letter, format), tag __VA_OPT__(,) __VA_ARGS__); \
+        }} while(0)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #define ESP_DRAM_LOG_IMPL(tag, format, log_level, log_tag_letter, ...) do {                       \
         if (_ESP_LOG_EARLY_ENABLED(log_level)) {                                                  \
             esp_rom_printf(_ESP_LOG_DRAM_LOG_FORMAT(log_tag_letter, format), tag, ##__VA_ARGS__); \
         }} while(0)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 /** @endcond */
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/aria.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/aria.h
index 13763d42..20f43f22 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/aria.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/aria.h
@@ -88,14 +88,14 @@
 /* MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED is deprecated and should not be used. */
 #define MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED      -0x0058  /**< ARIA hardware accelerator failed. */
 
-#if !defined(MBEDTLS_ARIA_ALT)
-// Regular implementation
-//
-
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+#if !defined(MBEDTLS_ARIA_ALT)
+// Regular implementation
+//
+
 /**
  * \brief The ARIA context-type definition.
  */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
index 9615090f..6f1201bf 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
@@ -71,6 +71,46 @@
 
 #include "bignum.h"
 
+
+/*
+ * Conversion macros for embedded constants:
+ * build lists of mbedtls_mpi_uint's from lists of unsigned char's grouped by 8, 4 or 2
+ */
+#if defined(MBEDTLS_HAVE_INT32)
+
+#define MBEDTLS_BYTES_TO_T_UINT_4( a, b, c, d )               \
+    ( (mbedtls_mpi_uint) (a) <<  0 ) |                        \
+    ( (mbedtls_mpi_uint) (b) <<  8 ) |                        \
+    ( (mbedtls_mpi_uint) (c) << 16 ) |                        \
+    ( (mbedtls_mpi_uint) (d) << 24 )
+
+#define MBEDTLS_BYTES_TO_T_UINT_2( a, b )                   \
+    MBEDTLS_BYTES_TO_T_UINT_4( a, b, 0, 0 )
+
+#define MBEDTLS_BYTES_TO_T_UINT_8( a, b, c, d, e, f, g, h ) \
+    MBEDTLS_BYTES_TO_T_UINT_4( a, b, c, d ),                \
+    MBEDTLS_BYTES_TO_T_UINT_4( e, f, g, h )
+
+#else /* 64-bits */
+
+#define MBEDTLS_BYTES_TO_T_UINT_8( a, b, c, d, e, f, g, h )   \
+    ( (mbedtls_mpi_uint) (a) <<  0 ) |                        \
+    ( (mbedtls_mpi_uint) (b) <<  8 ) |                        \
+    ( (mbedtls_mpi_uint) (c) << 16 ) |                        \
+    ( (mbedtls_mpi_uint) (d) << 24 ) |                        \
+    ( (mbedtls_mpi_uint) (e) << 32 ) |                        \
+    ( (mbedtls_mpi_uint) (f) << 40 ) |                        \
+    ( (mbedtls_mpi_uint) (g) << 48 ) |                        \
+    ( (mbedtls_mpi_uint) (h) << 56 )
+
+#define MBEDTLS_BYTES_TO_T_UINT_4( a, b, c, d )             \
+    MBEDTLS_BYTES_TO_T_UINT_8( a, b, c, d, 0, 0, 0, 0 )
+
+#define MBEDTLS_BYTES_TO_T_UINT_2( a, b )                   \
+    MBEDTLS_BYTES_TO_T_UINT_8( a, b, 0, 0, 0, 0, 0, 0 )
+
+#endif /* bits in mbedtls_mpi_uint */
+
 #if defined(MBEDTLS_HAVE_ASM)
 
 #ifndef asm
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/config.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/config.h
index 6b45021d..b1d67f7a 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/config.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/config.h
@@ -453,7 +453,7 @@
  *       be overridden, but the wrapper functions mbedtls_aes_decrypt and mbedtls_aes_encrypt
  *       must stay untouched.
  *
- * \note If you use the AES_xxx_ALT macros, then is is recommended to also set
+ * \note If you use the AES_xxx_ALT macros, then it is recommended to also set
  *       MBEDTLS_AES_ROM_TABLES in order to help the linker garbage-collect the AES
  *       tables.
  *
@@ -1746,6 +1746,23 @@
  */
 //#define MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
 
+/**
+ * \def MBEDTLS_TEST_HOOKS
+ *
+ * Enable features for invasive testing such as introspection functions and
+ * hooks for fault injection. This enables additional unit tests.
+ *
+ * Merely enabling this feature should not change the behavior of the product.
+ * It only adds new code, and new branching points where the default behavior
+ * is the same as when this feature is disabled.
+ * However, this feature increases the attack surface: there is an added
+ * risk of vulnerabilities, and more gadgets that can make exploits easier.
+ * Therefore this feature must never be enabled in production.
+ *
+ * Uncomment to enable invasive tests.
+ */
+//#define MBEDTLS_TEST_HOOKS
+
 /**
  * \def MBEDTLS_THREADING_ALT
  *
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
index 278fbbbb..6c099adf 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
@@ -214,6 +214,13 @@ typedef struct mbedtls_ctr_drbg_context
     void *p_entropy;            /*!< The context for the entropy function. */
 
 #if defined(MBEDTLS_THREADING_C)
+    /* Invariant: the mutex is initialized if and only if f_entropy != NULL.
+     * This means that the mutex is initialized during the initial seeding
+     * in mbedtls_ctr_drbg_seed() and freed in mbedtls_ctr_drbg_free().
+     *
+     * Note that this invariant may change without notice. Do not rely on it
+     * and do not access the mutex directly in application code.
+     */
     mbedtls_threading_mutex_t mutex;
 #endif
 }
@@ -277,6 +284,15 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
  *                      device.
  */
 #endif
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      after this function returns successfully,
+ *                      it is safe to call mbedtls_ctr_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
 /**
  * \param ctx           The CTR_DRBG context to seed.
  *                      It must have been initialized with
@@ -286,6 +302,8 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
  *                      the same context unless you call
  *                      mbedtls_ctr_drbg_free() and mbedtls_ctr_drbg_init()
  *                      again first.
+ *                      After a failed call to mbedtls_ctr_drbg_seed(),
+ *                      you must call mbedtls_ctr_drbg_free().
  * \param f_entropy     The entropy callback, taking as arguments the
  *                      \p p_entropy context, the buffer to fill, and the
  *                      length of the buffer.
@@ -377,6 +395,11 @@ void mbedtls_ctr_drbg_set_reseed_interval( mbedtls_ctr_drbg_context *ctx,
  * \brief               This function reseeds the CTR_DRBG context, that is
  *                      extracts data from the entropy source.
  *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
  * \param ctx           The CTR_DRBG context.
  * \param additional    Additional data to add to the state. Can be \c NULL.
  * \param len           The length of the additional data.
@@ -394,6 +417,11 @@ int mbedtls_ctr_drbg_reseed( mbedtls_ctr_drbg_context *ctx,
 /**
  * \brief              This function updates the state of the CTR_DRBG context.
  *
+ * \note               This function is not thread-safe. It is not safe
+ *                     to call this function if another thread might be
+ *                     concurrently obtaining random numbers from the same
+ *                     context or updating or reseeding the same context.
+ *
  * \param ctx          The CTR_DRBG context.
  * \param additional   The data to update the state with. This must not be
  *                     \c NULL unless \p add_len is \c 0.
@@ -417,6 +445,11 @@ int mbedtls_ctr_drbg_update_ret( mbedtls_ctr_drbg_context *ctx,
  * This function automatically reseeds if the reseed counter is exceeded
  * or prediction resistance is enabled.
  *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
  * \param p_rng         The CTR_DRBG context. This must be a pointer to a
  *                      #mbedtls_ctr_drbg_context structure.
  * \param output        The buffer to fill.
@@ -445,8 +478,16 @@ int mbedtls_ctr_drbg_random_with_add( void *p_rng,
  *
  * This function automatically reseeds if the reseed counter is exceeded
  * or prediction resistance is enabled.
- *
- *
+ */
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      it is safe to call mbedtls_ctr_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
+/**
  * \param p_rng         The CTR_DRBG context. This must be a pointer to a
  *                      #mbedtls_ctr_drbg_context structure.
  * \param output        The buffer to fill.
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecp.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecp.h
index bdc750eb..e4a1ed81 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecp.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ecp.h
@@ -154,6 +154,40 @@ typedef struct mbedtls_ecp_point
 }
 mbedtls_ecp_point;
 
+/* Determine the minimum safe value of MBEDTLS_ECP_MAX_BITS. */
+#if !defined(MBEDTLS_ECP_C)
+#define MBEDTLS_ECP_MAX_BITS_MIN 0
+/* Note: the curves must be listed in DECREASING size! */
+#elif defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 521
+#elif defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 512
+#elif defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 448
+#elif defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 384
+#elif defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 384
+#elif defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 256
+#elif defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 256
+#elif defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 256
+#elif defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 255
+#elif defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 225 // n is slightly above 2^224
+#elif defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 224
+#elif defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 192
+#elif defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 192
+#else
+#error "MBEDTLS_ECP_C enabled, but no curve?"
+#endif
+
 #if !defined(MBEDTLS_ECP_ALT)
 /*
  * default mbed TLS elliptic curve arithmetic implementation
@@ -228,7 +262,13 @@ mbedtls_ecp_group;
  * \{
  */
 
-#if !defined(MBEDTLS_ECP_MAX_BITS)
+#if defined(MBEDTLS_ECP_MAX_BITS)
+
+#if MBEDTLS_ECP_MAX_BITS < MBEDTLS_ECP_MAX_BITS_MIN
+#error "MBEDTLS_ECP_MAX_BITS is smaller than the largest supported curve"
+#endif
+
+#else
 /**
  * The maximum size of the groups, that is, of \c N and \c P.
  */
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/entropy.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/entropy.h
index 1e1d3f56..1d6e9b82 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/entropy.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/entropy.h
@@ -147,13 +147,15 @@ mbedtls_entropy_source_state;
  */
 typedef struct mbedtls_entropy_context
 {
-    int accumulator_started;
+    int accumulator_started; /* 0 after init.
+                              * 1 after the first update.
+                              * -1 after free. */
 #if defined(MBEDTLS_ENTROPY_SHA512_ACCUMULATOR)
     mbedtls_sha512_context  accumulator;
 #else
     mbedtls_sha256_context  accumulator;
 #endif
-    int             source_count;
+    int             source_count; /* Number of entries used in source. */
     mbedtls_entropy_source_state    source[MBEDTLS_ENTROPY_MAX_SOURCES];
 #if defined(MBEDTLS_HAVEGE_C)
     mbedtls_havege_state    havege_data;
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
index 970c033c..5718e187 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
@@ -128,6 +128,14 @@ typedef struct mbedtls_hmac_drbg_context
     void *p_entropy;            /*!< context for the entropy function        */
 
 #if defined(MBEDTLS_THREADING_C)
+    /* Invariant: the mutex is initialized if and only if
+     * md_ctx->md_info != NULL. This means that the mutex is initialized
+     * during the initial seeding in mbedtls_hmac_drbg_seed() or
+     * mbedtls_hmac_drbg_seed_buf() and freed in mbedtls_ctr_drbg_free().
+     *
+     * Note that this invariant may change without notice. Do not rely on it
+     * and do not access the mutex directly in application code.
+     */
     mbedtls_threading_mutex_t mutex;
 #endif
 } mbedtls_hmac_drbg_context;
@@ -177,7 +185,17 @@ void mbedtls_hmac_drbg_init( mbedtls_hmac_drbg_context *ctx );
  * \note                During the initial seeding, this function calls
  *                      the entropy source to obtain a nonce
  *                      whose length is half the entropy length.
- *
+ */
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      after this function returns successfully,
+ *                      it is safe to call mbedtls_hmac_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
+/**
  * \param ctx           HMAC_DRBG context to be seeded.
  * \param md_info       MD algorithm to use for HMAC_DRBG.
  * \param f_entropy     The entropy callback, taking as arguments the
@@ -216,7 +234,17 @@ int mbedtls_hmac_drbg_seed( mbedtls_hmac_drbg_context *ctx,
  *
  * This function is meant for use in algorithms that need a pseudorandom
  * input such as deterministic ECDSA.
- *
+ */
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      after this function returns successfully,
+ *                      it is safe to call mbedtls_hmac_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
+/**
  * \param ctx           HMAC_DRBG context to be initialised.
  * \param md_info       MD algorithm to use for HMAC_DRBG.
  * \param data          Concatenation of the initial entropy string and
@@ -279,6 +307,11 @@ void mbedtls_hmac_drbg_set_reseed_interval( mbedtls_hmac_drbg_context *ctx,
 /**
  * \brief               This function updates the state of the HMAC_DRBG context.
  *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
  * \param ctx           The HMAC_DRBG context.
  * \param additional    The data to update the state with.
  *                      If this is \c NULL, there is no additional data.
@@ -295,6 +328,11 @@ int mbedtls_hmac_drbg_update_ret( mbedtls_hmac_drbg_context *ctx,
  * \brief               This function reseeds the HMAC_DRBG context, that is
  *                      extracts data from the entropy source.
  *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
  * \param ctx           The HMAC_DRBG context.
  * \param additional    Additional data to add to the state.
  *                      If this is \c NULL, there is no additional data
@@ -320,6 +358,11 @@ int mbedtls_hmac_drbg_reseed( mbedtls_hmac_drbg_context *ctx,
  * This function automatically reseeds if the reseed counter is exceeded
  * or prediction resistance is enabled.
  *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
  * \param p_rng         The HMAC_DRBG context. This must be a pointer to a
  *                      #mbedtls_hmac_drbg_context structure.
  * \param output        The buffer to fill.
@@ -349,7 +392,16 @@ int mbedtls_hmac_drbg_random_with_add( void *p_rng,
  *
  * This function automatically reseeds if the reseed counter is exceeded
  * or prediction resistance is enabled.
- *
+ */
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      it is safe to call mbedtls_ctr_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
+/**
  * \param p_rng         The HMAC_DRBG context. This must be a pointer to a
  *                      #mbedtls_hmac_drbg_context structure.
  * \param output        The buffer to fill.
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
index 00fea7db..c6e1a027 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
@@ -151,6 +151,7 @@ int mbedtls_net_connect( mbedtls_net_context *ctx, const char *host, const char
  *
  * \return         0 if successful, or one of:
  *                      MBEDTLS_ERR_NET_SOCKET_FAILED,
+ *                      MBEDTLS_ERR_NET_UNKNOWN_HOST,
  *                      MBEDTLS_ERR_NET_BIND_FAILED,
  *                      MBEDTLS_ERR_NET_LISTEN_FAILED
  *
@@ -170,6 +171,8 @@ int mbedtls_net_bind( mbedtls_net_context *ctx, const char *bind_ip, const char
  *                  can be NULL if client_ip is null
  *
  * \return          0 if successful, or
+ *                  MBEDTLS_ERR_NET_SOCKET_FAILED,
+ *                  MBEDTLS_ERR_NET_BIND_FAILED,
  *                  MBEDTLS_ERR_NET_ACCEPT_FAILED, or
  *                  MBEDTLS_ERR_NET_BUFFER_TOO_SMALL if buf_size is too small,
  *                  MBEDTLS_ERR_SSL_WANT_READ if bind_fd was set to
@@ -182,6 +185,10 @@ int mbedtls_net_accept( mbedtls_net_context *bind_ctx,
 /**
  * \brief          Check and wait for the context to be ready for read/write
  *
+ * \note           The current implementation of this function uses
+ *                 select() and returns an error if the file descriptor
+ *                 is \c FD_SETSIZE or greater.
+ *
  * \param ctx      Socket to check
  * \param rw       Bitflag composed of MBEDTLS_NET_POLL_READ and
  *                 MBEDTLS_NET_POLL_WRITE specifying the events
@@ -263,16 +270,21 @@ int mbedtls_net_send( void *ctx, const unsigned char *buf, size_t len );
  *                 'timeout' seconds. If no error occurs, the actual amount
  *                 read is returned.
  *
+ * \note           The current implementation of this function uses
+ *                 select() and returns an error if the file descriptor
+ *                 is \c FD_SETSIZE or greater.
+ *
  * \param ctx      Socket
  * \param buf      The buffer to write to
  * \param len      Maximum length of the buffer
  * \param timeout  Maximum number of milliseconds to wait for data
  *                 0 means no timeout (wait forever)
  *
- * \return         the number of bytes received,
- *                 or a non-zero error code:
- *                 MBEDTLS_ERR_SSL_TIMEOUT if the operation timed out,
+ * \return         The number of bytes received if successful.
+ *                 MBEDTLS_ERR_SSL_TIMEOUT if the operation timed out.
  *                 MBEDTLS_ERR_SSL_WANT_READ if interrupted by a signal.
+ *                 Another negative error code (MBEDTLS_ERR_NET_xxx)
+ *                 for other failures.
  *
  * \note           This function will block (until data becomes available or
  *                 timeout is reached) even if the socket is set to
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/padlock.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/padlock.h
index d8246e2c..0e4a6bbf 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/padlock.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/padlock.h
@@ -98,7 +98,7 @@ extern "C" {
  *
  * \param feature  The feature to detect
  *
- * \return         1 if CPU has support for the feature, 0 otherwise
+ * \return         non-zero if CPU has support for the feature, 0 otherwise
  */
 int mbedtls_padlock_has_support( int feature );
 
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/rsa.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/rsa.h
index 188c37cf..b2f65334 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/rsa.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/rsa.h
@@ -124,7 +124,10 @@ extern "C" {
  */
 typedef struct mbedtls_rsa_context
 {
-    int ver;                    /*!<  Always 0.*/
+    int ver;                    /*!<  Reserved for internal purposes.
+                                 *    Do not set this field in application
+                                 *    code. Its meaning might change without
+                                 *    notice. */
     size_t len;                 /*!<  The size of \p N in Bytes. */
 
     mbedtls_mpi N;              /*!<  The public modulus. */
@@ -154,6 +157,7 @@ typedef struct mbedtls_rsa_context
                                      mask generating function used in the
                                      EME-OAEP and EMSA-PSS encodings. */
 #if defined(MBEDTLS_THREADING_C)
+    /* Invariant: the mutex is initialized iff ver != 0. */
     mbedtls_threading_mutex_t mutex;    /*!<  Thread-safety mutex. */
 #endif
 }
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl.h
index fe33ac8d..0abeb430 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl.h
@@ -2237,7 +2237,7 @@ void mbedtls_ssl_conf_dhm_min_bitlen( mbedtls_ssl_config *conf,
 #if defined(MBEDTLS_ECP_C)
 /**
  * \brief          Set the allowed curves in order of preference.
- *                 (Default: all defined curves.)
+ *                 (Default: all defined curves in order of decreasing size.)
  *
  *                 On server: this only affects selection of the ECDHE curve;
  *                 the curves used for ECDH and ECDSA are determined by the
@@ -2269,7 +2269,9 @@ void mbedtls_ssl_conf_curves( mbedtls_ssl_config *conf,
 #if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
 /**
  * \brief          Set the allowed hashes for signatures during the handshake.
- *                 (Default: all available hashes except MD5.)
+ *                 (Default: all SHA-2 hashes, largest first. Also SHA-1 if
+ *                 the compile-time option
+ *                 `MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE` is enabled.)
  *
  * \note           This only affects which hashes are offered and can be used
  *                 for signatures during the handshake. Hashes for message
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
index a10a4341..a83f5e66 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
@@ -124,7 +124,7 @@ void mbedtls_ssl_ticket_init( mbedtls_ssl_ticket_context *ctx );
  *                  Recommended value: 86400 (one day).
  *
  * \note            It is highly recommended to select a cipher that is at
- *                  least as strong as the the strongest ciphersuite
+ *                  least as strong as the strongest ciphersuite
  *                  supported. Usually that means a 256-bit key.
  *
  * \note            The lifetime of the keys is twice the lifetime of tickets.
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/threading.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/threading.h
index a8183a6e..45161ce4 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/threading.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/threading.h
@@ -73,6 +73,9 @@ extern "C" {
 typedef struct mbedtls_threading_mutex_t
 {
     pthread_mutex_t mutex;
+    /* is_valid is 0 after a failed init or a free, and nonzero after a
+     * successful init. This field is not considered part of the public
+     * API of Mbed TLS and may change without notice. */
     char is_valid;
 } mbedtls_threading_mutex_t;
 #endif
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/version.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/version.h
index 5f0a8f11..49cbeb00 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/version.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/version.h
@@ -65,16 +65,16 @@
  */
 #define MBEDTLS_VERSION_MAJOR  2
 #define MBEDTLS_VERSION_MINOR  16
-#define MBEDTLS_VERSION_PATCH  9
+#define MBEDTLS_VERSION_PATCH  11
 
 /**
  * The single version number has the following structure:
  *    MMNNPP00
  *    Major version | Minor version | Patch version
  */
-#define MBEDTLS_VERSION_NUMBER         0x02100900
-#define MBEDTLS_VERSION_STRING         "2.16.9"
-#define MBEDTLS_VERSION_STRING_FULL    "mbed TLS 2.16.9"
+#define MBEDTLS_VERSION_NUMBER         0x02100B00
+#define MBEDTLS_VERSION_STRING         "2.16.11"
+#define MBEDTLS_VERSION_STRING_FULL    "mbed TLS 2.16.11"
 
 #if defined(MBEDTLS_VERSION_C)
 
diff --git a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
index c38e0c05..30da1909 100644
--- a/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
+++ b/tools/sdk/esp32/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
@@ -229,12 +229,21 @@ typedef void mbedtls_x509_crt_restart_ctx;
 /**
  * Default security profile. Should provide a good balance between security
  * and compatibility with current deployments.
+ *
+ * This profile permits:
+ * - SHA2 hashes.
+ * - All supported elliptic curves.
+ * - RSA with 2048 bits and above.
+ *
+ * New minor versions of Mbed TLS may extend this profile, for example if
+ * new curves are added to the library. New minor versions of Mbed TLS will
+ * not reduce this profile unless serious security concerns require it.
  */
 extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_default;
 
 /**
  * Expected next default profile. Recommended for new deployments.
- * Currently targets a 128-bit security level, except for RSA-2048.
+ * Currently targets a 128-bit security level, except for allowing RSA-2048.
  */
 extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_next;
 
diff --git a/tools/sdk/esp32/include/mbedtls/port/include/mbedtls/esp_config.h b/tools/sdk/esp32/include/mbedtls/port/include/mbedtls/esp_config.h
index 1ff7ea4a..f36ebf9b 100644
--- a/tools/sdk/esp32/include/mbedtls/port/include/mbedtls/esp_config.h
+++ b/tools/sdk/esp32/include/mbedtls/port/include/mbedtls/esp_config.h
@@ -1193,7 +1193,11 @@
  *
  * Comment to skip keyUsage checking for both CA and leaf certificates.
  */
+#ifdef CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE
 #define MBEDTLS_X509_CHECK_KEY_USAGE
+#else
+#undef MBEDTLS_X509_CHECK_KEY_USAGE
+#endif
 
 /**
  * \def MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
@@ -1206,7 +1210,11 @@
  *
  * Comment to skip extendedKeyUsage checking for certificates.
  */
+#ifdef CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
 #define MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+#else
+#undef MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+#endif
 
 /**
  * \def MBEDTLS_X509_RSASSA_PSS_SUPPORT
diff --git a/tools/sdk/esp32/include/newlib/platform_include/sys/dirent.h b/tools/sdk/esp32/include/newlib/platform_include/sys/dirent.h
index 4626ae14..bfa49f5e 100644
--- a/tools/sdk/esp32/include/newlib/platform_include/sys/dirent.h
+++ b/tools/sdk/esp32/include/newlib/platform_include/sys/dirent.h
@@ -19,11 +19,16 @@
 
 /**
  * This header file provides POSIX-compatible definitions of directory
- * access functions and related data types.
+ * access data types. Starting with newlib 3.3, related functions are defined
+ * in 'dirent.h' bundled with newlib.
  * See http://pubs.opengroup.org/onlinepubs/7908799/xsh/dirent.h.html
  * for reference.
  */
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
  * @brief Opaque directory structure
  */
@@ -57,3 +62,7 @@ void seekdir(DIR* pdir, long loc);
 void rewinddir(DIR* pdir);
 int closedir(DIR* pdir);
 int readdir_r(DIR* pdir, struct dirent* entry, struct dirent** out_dirent);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/protocomm/include/transports/protocomm_ble.h b/tools/sdk/esp32/include/protocomm/include/transports/protocomm_ble.h
index b30d5707..a9e7b6a2 100644
--- a/tools/sdk/esp32/include/protocomm/include/transports/protocomm_ble.h
+++ b/tools/sdk/esp32/include/protocomm/include/transports/protocomm_ble.h
@@ -26,6 +26,14 @@ extern "C" {
  */
 #define MAX_BLE_DEVNAME_LEN 29
 #define BLE_UUID128_VAL_LENGTH  16
+ /**
+ * Theoretically, the limit for max manufacturer length remains same as BLE
+ * device name i.e. 31 bytes (max scan response size) - 1 byte (length) - 1
+ * byte (type) = 29 bytes
+ * However, manufacturer data goes along with BLE device name in scan response.
+ * So, it is important to understand the actual length should be smaller than
+ * (29 - (BLE device name length) - 2). */
+#define MAX_BLE_MANUFACTURER_DATA_LEN 29
 
 /**
  * @brief   This structure maps handler required by protocomm layer to
@@ -59,6 +67,16 @@ typedef struct protocomm_ble_config {
      */
     uint8_t      service_uuid[BLE_UUID128_VAL_LENGTH];
 
+    /**
+     * BLE device manufacturer data pointer in advertisement
+     */
+    uint8_t      *manufacturer_data;
+
+    /**
+     * BLE device manufacturer data length in advertisement
+     */
+    ssize_t      manufacturer_data_len;
+
     /**
      * Number of entries in the Name-UUID lookup table
      */
diff --git a/tools/sdk/esp32/include/soc/esp32/include/soc/reset_reasons.h b/tools/sdk/esp32/include/soc/esp32/include/soc/reset_reasons.h
new file mode 100644
index 00000000..0190096b
--- /dev/null
+++ b/tools/sdk/esp32/include/soc/esp32/include/soc/reset_reasons.h
@@ -0,0 +1,58 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+//+-----------------------------------------------Terminology---------------------------------------------+
+//|                                                                                                       |
+//| CPU Reset:    Reset CPU core only, once reset done, CPU will execute from reset vector                |
+//|                                                                                                       |
+//| Core Reset:   Reset the whole digital system except RTC sub-system                                    |
+//|                                                                                                       |
+//| System Reset: Reset the whole digital system, including RTC sub-system                                |
+//|                                                                                                       |
+//| Chip Reset:   Reset the whole chip, including the analog part                                         |
+//|                                                                                                       |
+//+-------------------------------------------------------------------------------------------------------+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Naming conventions: RESET_REASON_{reset level}_{reset reason}
+ * @note refer to TRM: <Reset and Clock> chapter
+ */
+typedef enum {
+    RESET_REASON_CHIP_POWER_ON   = 0x01, // Power on reset
+    RESET_REASON_CORE_SW         = 0x03, // Software resets the digital core
+    RESET_REASON_CORE_DEEP_SLEEP = 0x05, // Deep sleep reset the digital core
+    RESET_REASON_CORE_SDIO       = 0x06, // SDIO module resets the digital core
+    RESET_REASON_CORE_MWDT0      = 0x07, // Main watch dog 0 resets digital core
+    RESET_REASON_CORE_MWDT1      = 0x08, // Main watch dog 1 resets digital core
+    RESET_REASON_CORE_RTC_WDT    = 0x09, // RTC watch dog resets digital core
+    RESET_REASON_CPU0_MWDT0      = 0x0B, // Main watch dog 0 resets CPU 0
+    RESET_REASON_CPU1_MWDT1      = 0x0B, // Main watch dog 1 resets CPU 1
+    RESET_REASON_CPU0_SW         = 0x0C, // Software resets CPU 0
+    RESET_REASON_CPU1_SW         = 0x0C, // Software resets CPU 1
+    RESET_REASON_CPU0_RTC_WDT    = 0x0D, // RTC watch dog resets CPU 0
+    RESET_REASON_CPU1_RTC_WDT    = 0x0D, // RTC watch dog resets CPU 1
+    RESET_REASON_CPU1_CPU0       = 0x0E, // CPU0 resets CPU1 by DPORT_APPCPU_RESETTING
+    RESET_REASON_SYS_BROWN_OUT   = 0x0F, // Reset when the VDD voltage is not stable
+    RESET_REASON_SYS_RTC_WDT     = 0x10, // RTC watch dog resets digital core and rtc module
+} soc_reset_reason_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/soc/include/soc/soc_memory_layout.h b/tools/sdk/esp32/include/soc/include/soc/soc_memory_types.h
similarity index 55%
rename from tools/sdk/esp32c3/include/soc/include/soc/soc_memory_layout.h
rename to tools/sdk/esp32/include/soc/include/soc/soc_memory_types.h
index 2da5b729..cf0d7ff1 100644
--- a/tools/sdk/esp32c3/include/soc/include/soc/soc_memory_layout.h
+++ b/tools/sdk/esp32/include/soc/include/soc/soc_memory_types.h
@@ -22,124 +22,9 @@
 #include "sdkconfig.h"
 #include "esp_attr.h"
 
-#ifdef CONFIG_BT_ENABLED
-
-#define SOC_MEM_BT_DATA_START               0x3ffae6e0
-#define SOC_MEM_BT_DATA_END                 0x3ffaff10
-#define SOC_MEM_BT_EM_START                 0x3ffb0000
-#define SOC_MEM_BT_EM_END                   0x3ffb7cd8
-#define SOC_MEM_BT_EM_BTDM0_START           0x3ffb0000
-#define SOC_MEM_BT_EM_BTDM0_END             0x3ffb09a8
-#define SOC_MEM_BT_EM_BLE_START             0x3ffb09a8
-#define SOC_MEM_BT_EM_BLE_END               0x3ffb1ddc
-#define SOC_MEM_BT_EM_BTDM1_START           0x3ffb1ddc
-#define SOC_MEM_BT_EM_BTDM1_END             0x3ffb2730
-#define SOC_MEM_BT_EM_BREDR_START           0x3ffb2730
-#define SOC_MEM_BT_EM_BREDR_NO_SYNC_END     0x3ffb6388  //Not calculate with synchronize connection support
-#define SOC_MEM_BT_EM_BREDR_END             0x3ffb7cd8  //Calculate with synchronize connection support
-#define SOC_MEM_BT_EM_SYNC0_START           0x3ffb6388
-#define SOC_MEM_BT_EM_SYNC0_END             0x3ffb6bf8
-#define SOC_MEM_BT_EM_SYNC1_START           0x3ffb6bf8
-#define SOC_MEM_BT_EM_SYNC1_END             0x3ffb7468
-#define SOC_MEM_BT_EM_SYNC2_START           0x3ffb7468
-#define SOC_MEM_BT_EM_SYNC2_END             0x3ffb7cd8
-#define SOC_MEM_BT_BSS_START                0x3ffb8000
-#define SOC_MEM_BT_BSS_END                  0x3ffb9a20
-#define SOC_MEM_BT_MISC_START               0x3ffbdb28
-#define SOC_MEM_BT_MISC_END                 0x3ffbdb5c
-
-#define SOC_MEM_BT_EM_PER_SYNC_SIZE         0x870
-
-#define SOC_MEM_BT_EM_BREDR_REAL_END        (SOC_MEM_BT_EM_BREDR_NO_SYNC_END + CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF * SOC_MEM_BT_EM_PER_SYNC_SIZE)
-
-#endif //CONFIG_BT_ENABLED
-
-#define SOC_MEMORY_TYPE_NO_PRIOS 3
-
-/* Type descriptor holds a description for a particular type of memory on a particular SoC.
- */
-typedef struct {
-    const char *name;  ///< Name of this memory type
-    uint32_t caps[SOC_MEMORY_TYPE_NO_PRIOS]; ///< Capabilities for this memory type (as a prioritised set)
-    bool aliased_iram;   ///< If true, this is data memory that is is also mapped in IRAM
-    bool startup_stack; ///< If true, memory of this type is used for ROM stack during startup
-} soc_memory_type_desc_t;
-
-/* Constant table of tag descriptors for all this SoC's tags */
-extern const soc_memory_type_desc_t soc_memory_types[];
-extern const size_t soc_memory_type_count;
-
-/* Region descriptor holds a description for a particular region of memory on a particular SoC.
- */
-typedef struct
-{
-    intptr_t start;  ///< Start address of the region
-    size_t size;            ///< Size of the region in bytes
-    size_t type;             ///< Type of the region (index into soc_memory_types array)
-    intptr_t iram_address; ///< If non-zero, is equivalent address in IRAM
-} soc_memory_region_t;
-
-extern const soc_memory_region_t soc_memory_regions[];
-extern const size_t soc_memory_region_count;
-
-/* Region descriptor holds a description for a particular region of
-   memory reserved on this SoC for a particular use (ie not available
-   for stack/heap usage.) */
-typedef struct
-{
-    intptr_t start;
-    intptr_t end;
-} soc_reserved_region_t;
-
-/* Use this macro to reserved a fixed region of RAM (hardcoded addresses)
- * for a particular purpose.
- *
- * Usually used to mark out memory addresses needed for hardware or ROM code
- * purposes.
- *
- * Don't call this macro from user code which can use normal C static allocation
- * instead.
- *
- * @param START Start address to be reserved.
- * @param END One after the address of the last byte to be reserved. (ie length of
- * the reserved region is (END - START) in bytes.
- * @param NAME Name for the reserved region. Must be a valid variable name,
- * unique to this source file.
- */
-#define SOC_RESERVE_MEMORY_REGION(START, END, NAME)     \
-    __attribute__((section(".reserved_memory_address"))) __attribute__((used)) \
-    static soc_reserved_region_t reserved_region_##NAME = { START, END };
-
-/* Return available memory regions for this SoC. Each available memory
- * region is a contiguous piece of memory which is not being used by
- * static data, used by ROM code, or reserved by a component using
- * the SOC_RESERVE_MEMORY_REGION() macro.
- *
- * This result is soc_memory_regions[] minus all regions reserved
- * via the SOC_RESERVE_MEMORY_REGION() macro (which may also split
- * some regions up.)
- *
- * At startup, all available memory returned by this function is
- * registered as heap space.
- *
- * @note OS-level startup function only, not recommended to call from
- * app code.
- *
- * @param regions Pointer to an array for reading available regions into.
- * Size of the array should be at least the result of
- * soc_get_available_memory_region_max_count(). Entries in the array
- * will be ordered by memory address.
- *
- * @return Number of entries copied to 'regions'. Will be no greater than
- * the result of soc_get_available_memory_region_max_count().
- */
-size_t soc_get_available_memory_regions(soc_memory_region_t *regions);
-
-/* Return the maximum number of available memory regions which could be
- * returned by soc_get_available_memory_regions(). Used to size the
- * array passed to that function.
- */
-size_t soc_get_available_memory_region_max_count(void);
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 inline static bool IRAM_ATTR esp_ptr_dma_capable(const void *p)
 {
@@ -148,7 +33,7 @@ inline static bool IRAM_ATTR esp_ptr_dma_capable(const void *p)
 
 inline static bool IRAM_ATTR esp_ptr_dma_ext_capable(const void *p)
 {
-#if CONFIG_IDF_TARGET_ESP32S2  || CONFIG_IDF_TARGET_ESP32S3
+#ifdef SOC_PSRAM_DMA_CAPABLE
     return (intptr_t)p >= SOC_DMA_EXT_LOW && (intptr_t)p < SOC_DMA_EXT_HIGH;
 #else
     return false;
@@ -302,3 +187,7 @@ inline static bool IRAM_ATTR esp_stack_ptr_is_sane(uint32_t sp)
 #endif
         ;
 }
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/wifi_provisioning/include/wifi_provisioning/scheme_ble.h b/tools/sdk/esp32/include/wifi_provisioning/include/wifi_provisioning/scheme_ble.h
index ed30d818..fc19e16b 100644
--- a/tools/sdk/esp32/include/wifi_provisioning/include/wifi_provisioning/scheme_ble.h
+++ b/tools/sdk/esp32/include/wifi_provisioning/include/wifi_provisioning/scheme_ble.h
@@ -77,6 +77,29 @@ void wifi_prov_scheme_ble_event_cb_free_bt  (void *user_data, wifi_prov_cb_event
  */
 esp_err_t wifi_prov_scheme_ble_set_service_uuid(uint8_t *uuid128);
 
+/**
+ * @brief   Set manufacturer specific data in scan response
+ *
+ * This must be called before starting provisioning, i.e. before
+ * making a call to wifi_prov_mgr_start_provisioning().
+ *
+ * @note    It is important to understand that length of custom manufacturer
+ *          data should be within limits. The manufacturer data goes into scan
+ *          response along with BLE device name. By default, BLE device name
+ *          length is of 11 Bytes, however it can vary as per application use
+ *          case. So, one has to honour the scan response data size limits i.e.
+ *          (mfg_data_len + 2) < 31 - (device_name_length + 2 ). If the
+ *          mfg_data length exceeds this limit, the length will be truncated.
+ *
+ * @param[in] mfg_data      Custom manufacturer data
+ * @param[in] mfg_data_len  Manufacturer data length
+ *
+ * @return
+ *  - ESP_OK              : Success
+ *  - ESP_ERR_INVALID_ARG : Null argument
+ */
+esp_err_t wifi_prov_scheme_ble_set_mfg_data(uint8_t *mfg_data, ssize_t mfg_data_len);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/ld/esp32.ld b/tools/sdk/esp32/ld/esp32.ld
deleted file mode 100644
index 49b2bc3b..00000000
--- a/tools/sdk/esp32/ld/esp32.ld
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-/* ESP32 Linker Script Memory Layout
-
-   This file describes the memory layout (memory blocks) as virtual
-   memory addresses.
-
-   esp32.project.ld contains output sections to link compiler output
-   into these memory blocks.
-
-   ***
-
-   This linker script is passed through the C preprocessor to include
-   configuration options.
-
-   Please use preprocessor features sparingly! Restrict
-   to simple macros with numeric values, and/or #if/#endif blocks.
-*/
-#include "sdkconfig.h"
-
-/* If BT is not built at all */
-#ifndef CONFIG_BT_RESERVE_DRAM
-#define CONFIG_BT_RESERVE_DRAM 0
-#endif
-
-#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
-#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE)
-#elif defined(CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP)
-#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE)
-#else
-#define ESP_BOOTLOADER_RESERVE_RTC 0
-#endif
-
-#if defined(CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE)
-
-ASSERT((CONFIG_ESP32_FIXED_STATIC_RAM_SIZE <= 0x2c200),
-          "Fixed static ram data does not fit.")
-
-#define DRAM0_0_SEG_LEN CONFIG_ESP32_FIXED_STATIC_RAM_SIZE
-
-#else
-#define DRAM0_0_SEG_LEN 0x2c200
-#endif
-
-MEMORY
-{
-  /* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
-  of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but
-  are connected to the data port of the CPU and eg allow bytewise access. */
-
-  /* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */
-  iram0_0_seg (RX) :                 org = 0x40080000, len = 0x20000
-
-#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-  /* Even though the segment name is iram, it is actually mapped to flash
-  */
-  iram0_2_seg (RX) :                 org = 0x400D0020, len = 0x330000-0x20
-
-  /*
-    (0x20 offset above is a convenience for the app binary image generation.
-    Flash cache has 64KB pages. The .bin file which is flashed to the chip
-    has a 0x18 byte file header, and each segment has a 0x08 byte segment
-    header. Setting this offset makes it simple to meet the flash cache MMU's
-    constraint that (paddr % 64KB == vaddr % 64KB).)
-  */
-#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-
-
-  /* Shared data RAM, excluding memory reserved for ROM bss/data/stack.
-
-     Enabling Bluetooth & Trace Memory features in menuconfig will decrease
-     the amount of RAM available.
-
-     Note: Length of this section *should* be 0x50000, and this extra DRAM is available
-     in heap at runtime. However due to static ROM memory usage at this 176KB mark, the
-     additional static memory temporarily cannot be used.
-  */
-  dram0_0_seg (RW) :                 org = 0x3FFB0000 + CONFIG_BT_RESERVE_DRAM,
-                                     len = DRAM0_0_SEG_LEN - CONFIG_BT_RESERVE_DRAM
-
-#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-  /* Flash mapped constant data */
-  drom0_0_seg (R) :                  org = 0x3F400020, len = 0x400000-0x20
-
-  /* (See iram0_2_seg for meaning of 0x20 offset in the above.) */
-#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-
-  /* RTC fast memory (executable). Persists over deep sleep.
-   */
-  rtc_iram_seg(RWX) :                org = 0x400C0000, len = 0x2000
-
-  /* RTC fast memory (same block as above), viewed from data bus */
-  rtc_data_seg(RW) :                 org = 0x3ff80000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC
-
-  /* RTC slow memory (data accessible). Persists over deep sleep.
-
-     Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.
-  */
-  rtc_slow_seg(RW)  :                org = 0x50000000 + CONFIG_ESP32_ULP_COPROC_RESERVE_MEM,
-                                     len = 0x2000 - CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
-
-  /* external memory ,including data and text */
-  extern_ram_seg(RWX)  :             org = 0x3F800000,
-                                     len = 0x400000
-}
-
-#if defined(CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE)
-/* static data ends at defined address */
-_static_data_end = 0x3FFB0000 + DRAM0_0_SEG_LEN;
-#else
-_static_data_end = _bss_end;
-#endif
-
-/* Heap ends at top of dram0_0_seg */
-_heap_end = 0x40000000 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM;
-
-_data_seg_org = ORIGIN(rtc_data_seg);
-
-/* The lines below define location alias for .rtc.data section based on Kconfig option.
-   When the option is not defined then use slow memory segment
-   else the data will be placed in fast memory segment */
-#ifndef CONFIG_ESP32_RTCDATA_IN_FAST_MEM
-REGION_ALIAS("rtc_data_location", rtc_slow_seg );
-#else
-REGION_ALIAS("rtc_data_location", rtc_data_seg );
-#endif
-
-#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-  REGION_ALIAS("default_code_seg", iram0_2_seg);
-#else
-  REGION_ALIAS("default_code_seg", iram0_0_seg);
-#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-
-#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-  REGION_ALIAS("default_rodata_seg", drom0_0_seg);
-#else
-  REGION_ALIAS("default_rodata_seg", dram0_0_seg);
-#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-
-/**
- *  If rodata default segment is placed in `drom0_0_seg`, then flash's first rodata section must
- *  also be first in the segment.
- */
-#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-  ASSERT(_rodata_start == ORIGIN(default_rodata_seg),
-         ".flash.appdesc section must be placed at the beginning of the rodata segment.")
-#endif
diff --git a/tools/sdk/esp32/ld/esp32.rom.api.ld b/tools/sdk/esp32/ld/esp32.rom.api.ld
index cf0b143f..be023b85 100644
--- a/tools/sdk/esp32/ld/esp32.rom.api.ld
+++ b/tools/sdk/esp32/ld/esp32.rom.api.ld
@@ -37,3 +37,4 @@ PROVIDE ( esp_rom_md5_final  = 0x4005db1c );
 PROVIDE ( esp_rom_printf   = ets_printf );
 PROVIDE ( esp_rom_delay_us = ets_delay_us );
 PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
+PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
diff --git a/tools/sdk/esp32/ld/libbtdm_app.a b/tools/sdk/esp32/ld/libbtdm_app.a
index 79a7e047..723e31ac 100644
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diff --git a/tools/sdk/esp32/ld/esp32_out.ld b/tools/sdk/esp32/ld/memory.ld
similarity index 100%
rename from tools/sdk/esp32/ld/esp32_out.ld
rename to tools/sdk/esp32/ld/memory.ld
diff --git a/tools/sdk/esp32/ld/esp32.project.ld b/tools/sdk/esp32/ld/sections.ld
similarity index 99%
rename from tools/sdk/esp32/ld/esp32.project.ld
rename to tools/sdk/esp32/ld/sections.ld
index 105f374c..c769c5cd 100644
--- a/tools/sdk/esp32/ld/esp32.project.ld
+++ b/tools/sdk/esp32/ld/sections.ld
@@ -1,6 +1,6 @@
 /* Automatically generated file; DO NOT EDIT */
 /* Espressif IoT Development Framework Linker Script */
-/* Generated from: /Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/esp32/ld/esp32.project.ld.in */
+/* Generated from: /home/runner/work/esp32-arduino-lib-builder/esp32-arduino-lib-builder/esp-idf/components/esp_system/ld/esp32/sections.ld.in */
 
 /*
  * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
@@ -587,8 +587,8 @@ SECTIONS
     _bss_start = ABSOLUTE(.);
 
     *(.bss .bss.*)
-    *(.ext_ram.bss .ext_ram.bss.*)
     *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
+    *(.ext_ram.bss .ext_ram.bss.*)
     *(COMMON)
     _bt_bss_start = ABSOLUTE(.);
     *libbt.a:(.bss .bss.* COMMON)
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diff --git a/tools/sdk/esp32/lib/libpthread.a b/tools/sdk/esp32/lib/libpthread.a
index 06f115ba..0dee2cb7 100644
Binary files a/tools/sdk/esp32/lib/libpthread.a and b/tools/sdk/esp32/lib/libpthread.a differ
diff --git a/tools/sdk/esp32/lib/libqrcode.a b/tools/sdk/esp32/lib/libqrcode.a
index 89e378bc..b4c22929 100644
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diff --git a/tools/sdk/esp32/lib/libsdmmc.a b/tools/sdk/esp32/lib/libsdmmc.a
index 8ffc8540..79be7976 100644
Binary files a/tools/sdk/esp32/lib/libsdmmc.a and b/tools/sdk/esp32/lib/libsdmmc.a differ
diff --git a/tools/sdk/esp32/lib/libsoc.a b/tools/sdk/esp32/lib/libsoc.a
index 1fe3f48c..a1501524 100644
Binary files a/tools/sdk/esp32/lib/libsoc.a and b/tools/sdk/esp32/lib/libsoc.a differ
diff --git a/tools/sdk/esp32/lib/libspi_flash.a b/tools/sdk/esp32/lib/libspi_flash.a
index c660838f..7f87115d 100644
Binary files a/tools/sdk/esp32/lib/libspi_flash.a and b/tools/sdk/esp32/lib/libspi_flash.a differ
diff --git a/tools/sdk/esp32/lib/libspiffs.a b/tools/sdk/esp32/lib/libspiffs.a
index a5e18279..305a7e18 100644
Binary files a/tools/sdk/esp32/lib/libspiffs.a and b/tools/sdk/esp32/lib/libspiffs.a differ
diff --git a/tools/sdk/esp32/lib/libtcp_transport.a b/tools/sdk/esp32/lib/libtcp_transport.a
index 7ba965e9..924c1590 100644
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diff --git a/tools/sdk/esp32/lib/libtcpip_adapter.a b/tools/sdk/esp32/lib/libtcpip_adapter.a
index 46afa271..f6bd2070 100644
Binary files a/tools/sdk/esp32/lib/libtcpip_adapter.a and b/tools/sdk/esp32/lib/libtcpip_adapter.a differ
diff --git a/tools/sdk/esp32/lib/libulp.a b/tools/sdk/esp32/lib/libulp.a
index a92064d9..fd69ead0 100644
Binary files a/tools/sdk/esp32/lib/libulp.a and b/tools/sdk/esp32/lib/libulp.a differ
diff --git a/tools/sdk/esp32/lib/libunity.a b/tools/sdk/esp32/lib/libunity.a
index 11743d63..fb9451c0 100644
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diff --git a/tools/sdk/esp32/lib/libvfs.a b/tools/sdk/esp32/lib/libvfs.a
index d6536cc5..e9a64993 100644
Binary files a/tools/sdk/esp32/lib/libvfs.a and b/tools/sdk/esp32/lib/libvfs.a differ
diff --git a/tools/sdk/esp32/lib/libwear_levelling.a b/tools/sdk/esp32/lib/libwear_levelling.a
index ae583179..c9095ff0 100644
Binary files a/tools/sdk/esp32/lib/libwear_levelling.a and b/tools/sdk/esp32/lib/libwear_levelling.a differ
diff --git a/tools/sdk/esp32/lib/libwifi_provisioning.a b/tools/sdk/esp32/lib/libwifi_provisioning.a
index ecc6d239..416eb86b 100644
Binary files a/tools/sdk/esp32/lib/libwifi_provisioning.a and b/tools/sdk/esp32/lib/libwifi_provisioning.a differ
diff --git a/tools/sdk/esp32/lib/libwpa_supplicant.a b/tools/sdk/esp32/lib/libwpa_supplicant.a
index 4e794be9..6fec046e 100644
Binary files a/tools/sdk/esp32/lib/libwpa_supplicant.a and b/tools/sdk/esp32/lib/libwpa_supplicant.a differ
diff --git a/tools/sdk/esp32/lib/libws2812_led.a b/tools/sdk/esp32/lib/libws2812_led.a
index 6ab1b56e..8f5a2f5b 100644
Binary files a/tools/sdk/esp32/lib/libws2812_led.a and b/tools/sdk/esp32/lib/libws2812_led.a differ
diff --git a/tools/sdk/esp32/lib/libxtensa.a b/tools/sdk/esp32/lib/libxtensa.a
index 0e10b936..768abffe 100644
Binary files a/tools/sdk/esp32/lib/libxtensa.a and b/tools/sdk/esp32/lib/libxtensa.a differ
diff --git a/tools/sdk/esp32/sdkconfig b/tools/sdk/esp32/sdkconfig
index 641b9b41..f6b53e2d 100644
--- a/tools/sdk/esp32/sdkconfig
+++ b/tools/sdk/esp32/sdkconfig
@@ -629,7 +629,6 @@ CONFIG_ESP_ERR_TO_NAME_LOOKUP=y
 CONFIG_ETH_ENABLED=y
 CONFIG_ETH_USE_ESP32_EMAC=y
 CONFIG_ETH_PHY_INTERFACE_RMII=y
-# CONFIG_ETH_PHY_INTERFACE_MII is not set
 CONFIG_ETH_RMII_CLK_INPUT=y
 # CONFIG_ETH_RMII_CLK_OUTPUT is not set
 CONFIG_ETH_RMII_CLK_IN_GPIO=0
@@ -888,6 +887,10 @@ CONFIG_FMB_SERIAL_BUF_SIZE=256
 CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB=8
 CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS=1000
 CONFIG_FMB_PORT_TASK_PRIO=10
+# CONFIG_FMB_PORT_TASK_AFFINITY_NO_AFFINITY is not set
+CONFIG_FMB_PORT_TASK_AFFINITY_CPU0=y
+# CONFIG_FMB_PORT_TASK_AFFINITY_CPU1 is not set
+CONFIG_FMB_PORT_TASK_AFFINITY=0x0
 # CONFIG_FMB_CONTROLLER_SLAVE_ID_SUPPORT is not set
 CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT=20
 CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE=20
@@ -1207,6 +1210,8 @@ CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y
 CONFIG_MBEDTLS_SSL_PROTO_DTLS=y
 CONFIG_MBEDTLS_SSL_ALPN=y
 CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y
+CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE=y
+CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE=y
 CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y
 
 #
diff --git a/tools/sdk/esp32c3/bin/bootloader_dio_40m.bin b/tools/sdk/esp32c3/bin/bootloader_dio_40m.bin
index 42fb74a0..0d314c54 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_dio_40m.bin and b/tools/sdk/esp32c3/bin/bootloader_dio_40m.bin differ
diff --git a/tools/sdk/esp32c3/bin/bootloader_dio_80m.bin b/tools/sdk/esp32c3/bin/bootloader_dio_80m.bin
index a7af70a6..869cbb1a 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_dio_80m.bin and b/tools/sdk/esp32c3/bin/bootloader_dio_80m.bin differ
diff --git a/tools/sdk/esp32c3/bin/bootloader_dout_40m.bin b/tools/sdk/esp32c3/bin/bootloader_dout_40m.bin
index 2f59d284..afc66b4b 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_dout_40m.bin and b/tools/sdk/esp32c3/bin/bootloader_dout_40m.bin differ
diff --git a/tools/sdk/esp32c3/bin/bootloader_dout_80m.bin b/tools/sdk/esp32c3/bin/bootloader_dout_80m.bin
index c6eb67af..da7da2cd 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_dout_80m.bin and b/tools/sdk/esp32c3/bin/bootloader_dout_80m.bin differ
diff --git a/tools/sdk/esp32c3/bin/bootloader_qio_40m.bin b/tools/sdk/esp32c3/bin/bootloader_qio_40m.bin
index d996e2ff..c9e3e7e0 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_qio_40m.bin and b/tools/sdk/esp32c3/bin/bootloader_qio_40m.bin differ
diff --git a/tools/sdk/esp32c3/bin/bootloader_qio_80m.bin b/tools/sdk/esp32c3/bin/bootloader_qio_80m.bin
index 453c90e7..28102fdd 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_qio_80m.bin and b/tools/sdk/esp32c3/bin/bootloader_qio_80m.bin differ
diff --git a/tools/sdk/esp32c3/bin/bootloader_qout_40m.bin b/tools/sdk/esp32c3/bin/bootloader_qout_40m.bin
index 45803b7c..e2cdf7c9 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_qout_40m.bin and b/tools/sdk/esp32c3/bin/bootloader_qout_40m.bin differ
diff --git a/tools/sdk/esp32c3/bin/bootloader_qout_80m.bin b/tools/sdk/esp32c3/bin/bootloader_qout_80m.bin
index 3361caf0..9c6a9cd8 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_qout_80m.bin and b/tools/sdk/esp32c3/bin/bootloader_qout_80m.bin differ
diff --git a/tools/sdk/esp32c3/include/app_update/include/esp_ota_ops.h b/tools/sdk/esp32c3/include/app_update/include/esp_ota_ops.h
index ee29cdac..6278ab79 100644
--- a/tools/sdk/esp32c3/include/app_update/include/esp_ota_ops.h
+++ b/tools/sdk/esp32c3/include/app_update/include/esp_ota_ops.h
@@ -14,6 +14,7 @@
 #include "esp_partition.h"
 #include "esp_image_format.h"
 #include "esp_flash_partitions.h"
+#include "soc/soc_caps.h"
 
 #ifdef __cplusplus
 extern "C"
diff --git a/tools/sdk/esp32c3/include/bootloader_support/include/bootloader_common.h b/tools/sdk/esp32c3/include/bootloader_support/include/bootloader_common.h
index 3fb97c65..2ff0e595 100644
--- a/tools/sdk/esp32c3/include/bootloader_support/include/bootloader_common.h
+++ b/tools/sdk/esp32c3/include/bootloader_support/include/bootloader_common.h
@@ -8,7 +8,8 @@
 #include "esp_flash_partitions.h"
 #include "esp_image_format.h"
 #include "esp_app_format.h"
-// RESET_REASON is declared in rom/rtc.h
+// [refactor-todo]: we shouldn't expose ROM header files in a public API header, remove them in v5.0
+// Tracked in IDF-1968
 #if CONFIG_IDF_TARGET_ESP32
 #include "esp32/rom/rtc.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
@@ -62,18 +63,37 @@ bool bootloader_common_ota_select_valid(const esp_ota_select_entry_t *s);
 bool bootloader_common_ota_select_invalid(const esp_ota_select_entry_t *s);
 
 /**
- * @brief Check if the GPIO input is a long hold or a short hold.
+ * @brief Check if a GPIO input is held low for a long period, short period, or not
+ * at all.
+ *
+ * This function will configure the specified GPIO as an input with internal pull-up enabled.
  *
- * Number of the GPIO input will be configured as an input with internal pull-up enabled.
  * If the GPIO input is held low continuously for delay_sec period then it is a long hold.
  * If the GPIO input is held low for less period then it is a short hold.
  *
  * @param[in] num_pin Number of the GPIO input.
  * @param[in] delay_sec Input must be driven low for at least this long, continuously.
- * @return esp_comm_gpio_hold_t Defines type of hold a GPIO in low state.
+ * @return esp_comm_gpio_hold_t Type of low level hold detected, if any.
  */
 esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio(uint32_t num_pin, uint32_t delay_sec);
 
+/**
+ * @brief Check if a GPIO input is held low or high for a long period, short period, or not
+ * at all.
+ *
+ * This function will configure the specified GPIO as an input with internal pull-up enabled.
+ *
+ * If the GPIO input is held at 'level' continuously for delay_sec period then it is a long hold.
+ * If the GPIO input is held at 'level' for less period then it is a short hold.
+ *
+ * @param[in] num_pin Number of the GPIO input.
+ * @param[in] delay_sec Input must be driven to 'level' for at least this long, continuously.
+ * @param[in] level Input pin level to trigger on hold
+ * @return esp_comm_gpio_hold_t Type of hold detected, if any.
+ */
+esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio_level(uint32_t num_pin, uint32_t delay_sec, bool level);
+
+
 /**
  * @brief Erase the partition data that is specified in the transferred list.
  *
diff --git a/tools/sdk/esp32c3/include/config/sdkconfig.h b/tools/sdk/esp32c3/include/config/sdkconfig.h
index 4bc7dacb..970aa8d1 100644
--- a/tools/sdk/esp32c3/include/config/sdkconfig.h
+++ b/tools/sdk/esp32c3/include/config/sdkconfig.h
@@ -288,6 +288,7 @@
 #define CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB 8
 #define CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS 1000
 #define CONFIG_FMB_PORT_TASK_PRIO 10
+#define CONFIG_FMB_PORT_TASK_AFFINITY 0x7FFFFFFF
 #define CONFIG_FMB_CONTROLLER_SLAVE_ID_SUPPORT 1
 #define CONFIG_FMB_CONTROLLER_SLAVE_ID 0x00112233
 #define CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT 20
@@ -415,6 +416,8 @@
 #define CONFIG_MBEDTLS_SSL_PROTO_TLS1_2 1
 #define CONFIG_MBEDTLS_SSL_ALPN 1
 #define CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS 1
+#define CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE 1
+#define CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE 1
 #define CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS 1
 #define CONFIG_MBEDTLS_AES_C 1
 #define CONFIG_MBEDTLS_CAMELLIA_C 1
@@ -621,5 +624,5 @@
 #define CONFIG_TIMER_TASK_STACK_SIZE CONFIG_ESP_TIMER_TASK_STACK_SIZE
 #define CONFIG_TOOLPREFIX CONFIG_SDK_TOOLPREFIX
 #define CONFIG_UDP_RECVMBOX_SIZE CONFIG_LWIP_UDP_RECVMBOX_SIZE
-#define CONFIG_ARDUINO_IDF_COMMIT "d93887f9f"
+#define CONFIG_ARDUINO_IDF_COMMIT "c69f0ec32"
 #define CONFIG_ARDUINO_IDF_BRANCH "master"
diff --git a/tools/sdk/esp32c3/include/console/esp_console.h b/tools/sdk/esp32c3/include/console/esp_console.h
index 873f11b6..bd49cd83 100644
--- a/tools/sdk/esp32c3/include/console/esp_console.h
+++ b/tools/sdk/esp32c3/include/console/esp_console.h
@@ -48,6 +48,7 @@ typedef struct {
     uint32_t task_stack_size;      //!< repl task stack size
     uint32_t task_priority;        //!< repl task priority
     const char *prompt;            //!< prompt (NULL represents default: "esp> ")
+    size_t max_cmdline_length;     //!< maximum length of a command line. If 0, default value will be used
 } esp_console_repl_config_t;
 
 /**
@@ -61,6 +62,7 @@ typedef struct {
         .task_stack_size = 4096,          \
         .task_priority = 2,               \
         .prompt = NULL,                   \
+        .max_cmdline_length = 0,          \
 }
 
 /**
diff --git a/tools/sdk/esp32c3/include/console/linenoise/linenoise.h b/tools/sdk/esp32c3/include/console/linenoise/linenoise.h
index 610cacc6..730ba9b5 100644
--- a/tools/sdk/esp32c3/include/console/linenoise/linenoise.h
+++ b/tools/sdk/esp32c3/include/console/linenoise/linenoise.h
@@ -72,6 +72,7 @@ void linenoiseSetDumbMode(int set);
 bool linenoiseIsDumbMode(void);
 void linenoisePrintKeyCodes(void);
 void linenoiseAllowEmpty(bool);
+int linenoiseSetMaxLineLen(size_t len);
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32c3/include/driver/esp32c3/include/driver/temp_sensor.h b/tools/sdk/esp32c3/include/driver/esp32c3/include/driver/temp_sensor.h
index 9e227c71..d5d3ee3d 100644
--- a/tools/sdk/esp32c3/include/driver/esp32c3/include/driver/temp_sensor.h
+++ b/tools/sdk/esp32c3/include/driver/esp32c3/include/driver/temp_sensor.h
@@ -54,7 +54,7 @@ esp_err_t temp_sensor_get_config(temp_sensor_config_t *tsens);
  * @brief Start temperature sensor measure.
  * @return
  *     - ESP_OK Success
- *     - ESP_ERR_INVALID_ARG
+ *     - ESP_ERR_INVALID_STATE if temperature sensor is started already.
  */
 esp_err_t temp_sensor_start(void);
 
@@ -62,6 +62,7 @@ esp_err_t temp_sensor_start(void);
  * @brief Stop temperature sensor measure.
  * @return
  *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_STATE if temperature sensor is stopped already.
  */
 esp_err_t temp_sensor_stop(void);
 
diff --git a/tools/sdk/esp32c3/include/driver/include/driver/i2c.h b/tools/sdk/esp32c3/include/driver/include/driver/i2c.h
index 4a5dcc26..22dcc8ab 100644
--- a/tools/sdk/esp32c3/include/driver/include/driver/i2c.h
+++ b/tools/sdk/esp32c3/include/driver/include/driver/i2c.h
@@ -74,14 +74,15 @@ typedef struct{
 
     union {
         struct {
-            uint32_t clk_speed;     /*!< I2C clock frequency for master mode, (no higher than 1MHz for now) */
-        } master;                   /*!< I2C master config */
+            uint32_t clk_speed;      /*!< I2C clock frequency for master mode, (no higher than 1MHz for now) */
+        } master;                    /*!< I2C master config */
         struct {
-            uint8_t addr_10bit_en;  /*!< I2C 10bit address mode enable for slave mode */
-            uint16_t slave_addr;    /*!< I2C address for slave mode */
-        } slave;                    /*!< I2C slave config */
+            uint8_t addr_10bit_en;   /*!< I2C 10bit address mode enable for slave mode */
+            uint16_t slave_addr;     /*!< I2C address for slave mode */
+            uint32_t maximum_speed;  /*!< I2C expected clock speed from SCL. */
+        } slave;                     /*!< I2C slave config */
     };
-    uint32_t clk_flags;             /*!< Bitwise of ``I2C_SCLK_SRC_FLAG_**FOR_DFS**`` for clk source choice*/
+    uint32_t clk_flags;              /*!< Bitwise of ``I2C_SCLK_SRC_FLAG_**FOR_DFS**`` for clk source choice*/
 } i2c_config_t;
 
 
diff --git a/tools/sdk/esp32c3/include/driver/include/driver/spi_master.h b/tools/sdk/esp32c3/include/driver/include/driver/spi_master.h
index da5f5b52..8582a332 100644
--- a/tools/sdk/esp32c3/include/driver/include/driver/spi_master.h
+++ b/tools/sdk/esp32c3/include/driver/include/driver/spi_master.h
@@ -105,7 +105,7 @@ typedef struct {
 #define SPI_TRANS_VARIABLE_ADDR       (1<<6)  ///< Use the ``address_bits`` in ``spi_transaction_ext_t`` rather than default value in ``spi_device_interface_config_t``.
 #define SPI_TRANS_VARIABLE_DUMMY      (1<<7)  ///< Use the ``dummy_bits`` in ``spi_transaction_ext_t`` rather than default value in ``spi_device_interface_config_t``.
 #define SPI_TRANS_SET_CD              (1<<7)  ///< Set the CD pin
-
+#define SPI_TRANS_CS_KEEP_ACTIVE      (1<<8)  ///< Keep CS active after data transfer
 /**
  * This structure describes one SPI transaction. The descriptor should not be modified until the transaction finishes.
  */
@@ -194,7 +194,8 @@ esp_err_t spi_bus_remove_device(spi_device_handle_t handle);
  * @param ticks_to_wait Ticks to wait until there's room in the queue; use portMAX_DELAY to
  *                      never time out.
  * @return
- *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_DEVICE_CS_KEEP_LOW flag is specified while
+ *                                 the bus was not acquired (`spi_device_acquire_bus()` should be called first)
  *         - ESP_ERR_TIMEOUT       if there was no room in the queue before ticks_to_wait expired
  *         - ESP_ERR_NO_MEM        if allocating DMA-capable temporary buffer failed
  *         - ESP_ERR_INVALID_STATE if previous transactions are not finished
@@ -257,7 +258,8 @@ esp_err_t spi_device_transmit(spi_device_handle_t handle, spi_transaction_t *tra
  *              currently only portMAX_DELAY is supported.
  *
  * @return
- *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_DEVICE_CS_KEEP_LOW flag is specified while
+ *                                 the bus was not acquired (`spi_device_acquire_bus()` should be called first)
  *         - ESP_ERR_TIMEOUT       if the device cannot get control of the bus before ``ticks_to_wait`` expired
  *         - ESP_ERR_NO_MEM        if allocating DMA-capable temporary buffer failed
  *         - ESP_ERR_INVALID_STATE if previous transactions are not finished
diff --git a/tools/sdk/esp32c3/include/driver/include/esp_private/gdma.h b/tools/sdk/esp32c3/include/driver/include/esp_private/gdma.h
index 5b548e08..88a45b56 100644
--- a/tools/sdk/esp32c3/include/driver/include/esp_private/gdma.h
+++ b/tools/sdk/esp32c3/include/driver/include/esp_private/gdma.h
@@ -38,7 +38,8 @@ typedef enum {
     GDMA_TRIG_PERIPH_ADC,  /*!< GDMA trigger peripheral: ADC */
     GDMA_TRIG_PERIPH_DAC,  /*!< GDMA trigger peripheral: DAC */
     GDMA_TRIG_PERIPH_LCD,  /*!< GDMA trigger peripheral: LCD */
-    GDMA_TRIG_PERIPH_CAM   /*!< GDMA trigger peripheral: CAM */
+    GDMA_TRIG_PERIPH_CAM,  /*!< GDMA trigger peripheral: CAM */
+    GDMA_TRIG_PERIPH_RMT,  /*!< GDMA trigger peripheral: RMT */
 } gdma_trigger_peripheral_t;
 
 /**
@@ -58,10 +59,23 @@ typedef struct {
     gdma_channel_handle_t sibling_chan; /*!< DMA sibling channel handle (NULL means having sibling is not necessary) */
     gdma_channel_direction_t direction; /*!< DMA channel direction */
     struct {
-        int reserve_sibling: 1;   /*!< If set, DMA channel allocator would prefer to allocate new channel in a new pair, and reserve sibling channel for future use */
+        int reserve_sibling: 1; /*!< If set, DMA channel allocator would prefer to allocate new channel in a new pair, and reserve sibling channel for future use */
     } flags;
 } gdma_channel_alloc_config_t;
 
+/**
+ * @brief GDMA transfer ability
+ *
+ * @note The alignment set in this structure is **not** a guarantee that gdma driver will take care of the nonalignment cases.
+ *       Actually the GDMA driver has no knowledge about the DMA buffer (address and size) used by upper layer.
+ *       So it's the responsibility of the **upper layer** to take care of the buffer address and size.
+ *
+ */
+typedef struct {
+    size_t sram_trans_align;  /*!< DMA transfer alignment for memory in SRAM, in bytes. The driver enables/disables burst mode based on this value. 0 means no alignment is required */
+    size_t psram_trans_align; /*!< DMA transfer alignment for memory in PSRAM, in bytes. The driver sets proper burst block size based on the alignment value. 0 means no alignment is required */
+} gdma_transfer_ability_t;
+
 /**
  * @brief Type of GDMA event data
  *
@@ -79,6 +93,9 @@ typedef struct {
  * @param event_data GDMA event data
  * @param user_data User registered data from `gdma_register_tx_event_callbacks` or `gdma_register_rx_event_callbacks`
  *
+ * @return Whether a task switch is needed after the callback function returns,
+ *         this is usually due to the callback wakes up some high priority task.
+ *
  */
 typedef bool (*gdma_event_callback_t)(gdma_channel_handle_t dma_chan, gdma_event_data_t *event_data, void *user_data);
 
@@ -171,6 +188,18 @@ esp_err_t gdma_connect(gdma_channel_handle_t dma_chan, gdma_trigger_t trig_perip
  */
 esp_err_t gdma_disconnect(gdma_channel_handle_t dma_chan);
 
+/**
+ * @brief Set DMA channel transfer ability
+ *
+ * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @param[in] ability Transfer ability, e.g. alignment
+ * @return
+ *      - ESP_OK: Set DMA channel transfer ability successfully
+ *      - ESP_ERR_INVALID_ARG: Set DMA channel transfer ability failed because of invalid argument
+ *      - ESP_FAIL: Set DMA channel transfer ability failed because of other error
+ */
+esp_err_t gdma_set_transfer_ability(gdma_channel_handle_t dma_chan, const gdma_transfer_ability_t *ability);
+
 /**
  * @brief Apply channel strategy for GDMA channel
  *
diff --git a/tools/sdk/esp32c3/include/efuse/esp32c3/include/esp_efuse_table.h b/tools/sdk/esp32c3/include/efuse/esp32c3/include/esp_efuse_table.h
index 465d5c29..96fba509 100644
--- a/tools/sdk/esp32c3/include/efuse/esp32c3/include/esp_efuse_table.h
+++ b/tools/sdk/esp32c3/include/efuse/esp32c3/include/esp_efuse_table.h
@@ -9,7 +9,7 @@ extern "C" {
 #endif
 
 
-// md5_digest_table 9e42b2f9dd879191ca75ad0cf50841a1
+// md5_digest_table 7a50fdd084e3b80b143c5bd2a36f9c26
 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
 // If you want to change some fields, you need to change esp_efuse_table.csv file
 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
diff --git a/tools/sdk/esp32c3/include/esp_common/include/esp_check.h b/tools/sdk/esp32c3/include/esp_common/include/esp_check.h
index 3ee631c3..524cb376 100644
--- a/tools/sdk/esp32c3/include/esp_common/include/esp_check.h
+++ b/tools/sdk/esp32c3/include/esp_common/include/esp_check.h
@@ -30,7 +30,187 @@ extern "C" {
             return err_rc_;                                                                     \
         }                                                                                       \
     } while(0)
-#else
+
+/**
+ * A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                   \
+        esp_err_t err_rc_ = (x);                                                                \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
+            return err_rc_;                                                                     \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message,
+ * sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                               \
+        esp_err_t err_rc_ = (x);                                                                \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
+            ret = err_rc_;                                                                      \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                           \
+        esp_err_t err_rc_ = (x);                                                                \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
+            ret = err_rc_;                                                                      \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message
+ * and returns with the supplied 'err_code'.
+ */
+#define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                             \
+        if (unlikely(!(a))) {                                                                   \
+            return err_code;                                                                    \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                         \
+        if (unlikely(!(a))) {                                                                   \
+            return err_code;                                                                    \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message,
+ * sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                     \
+        if (unlikely(!(a))) {                                                                   \
+            ret = err_code;                                                                     \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while (0)
+
+/**
+ * A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                 \
+        if (unlikely(!(a))) {                                                                   \
+            ret = err_code;                                                                     \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while (0)
+
+#else // !CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT
+
+/**
+ * In the future, we want to switch to C++20. We also want to become compatible with clang.
+ * Hence, we provide two versions of the following macros. The first one is using the GNU extension \#\#__VA_ARGS__.
+ * The second one is using the C++20 feature __VA_OPT__(,). This allows users to compile their code with
+ * standard C++20 enabled instead of the GNU extension. Below C++20, we haven't found any good alternative to
+ * using \#\#__VA_ARGS__.
+ */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message and returns.
+ */
+#define ESP_RETURN_ON_ERROR(x, log_tag, format, ...) do {                                                  \
+        esp_err_t err_rc_ = (x);                                                                           \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                                 \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            return err_rc_;                                                                                \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                              \
+        esp_err_t err_rc_ = (x);                                                                           \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                                 \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);  \
+            return err_rc_;                                                                                \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message,
+ * sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                                          \
+        esp_err_t err_rc_ = (x);                                                                           \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                                 \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            ret = err_rc_;                                                                                 \
+            goto goto_tag;                                                                                 \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                                      \
+        esp_err_t err_rc_ = (x);                                                                           \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                                 \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);  \
+            ret = err_rc_;                                                                                 \
+            goto goto_tag;                                                                                 \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message
+ * and returns with the supplied 'err_code'.
+ */
+#define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                                        \
+        if (unlikely(!(a))) {                                                                              \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            return err_code;                                                                               \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                                    \
+        if (unlikely(!(a))) {                                                                              \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);  \
+            return err_code;                                                                               \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message,
+ * sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                                \
+        if (unlikely(!(a))) {                                                                              \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            ret = err_code;                                                                                \
+            goto goto_tag;                                                                                 \
+        }                                                                                                  \
+    } while (0)
+
+/**
+ * A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                            \
+        if (unlikely(!(a))) {                                                                              \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);  \
+            ret = err_code;                                                                                \
+            goto goto_tag;                                                                                 \
+        }                                                                                                  \
+    } while (0)
+
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message and returns.
+ */
 #define ESP_RETURN_ON_ERROR(x, log_tag, format, ...) do {                                       \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
@@ -38,19 +218,10 @@ extern "C" {
             return err_rc_;                                                                     \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                   \
-        esp_err_t err_rc_ = (x);                                                                \
-        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
-            return err_rc_;                                                                     \
-        }                                                                                       \
-    } while(0)
-#else
 #define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                   \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
@@ -58,21 +229,11 @@ extern "C" {
             return err_rc_;                                                                     \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message,
  * sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                               \
-        esp_err_t err_rc_ = (x);                                                                \
-        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
-            ret = err_rc_;                                                                      \
-            goto goto_tag;                                                                      \
-        }                                                                                       \
-    } while(0)
-#else
 #define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                               \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
@@ -81,20 +242,10 @@ extern "C" {
             goto goto_tag;                                                                      \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                           \
-        esp_err_t err_rc_ = (x);                                                                \
-        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
-            ret = err_rc_;                                                                      \
-            goto goto_tag;                                                                      \
-        }                                                                                       \
-    } while(0)
-#else
 #define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                           \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
@@ -103,57 +254,32 @@ extern "C" {
             goto goto_tag;                                                                      \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * Macro which can be used to check the condition. If the condition is not 'true', it prints the message
  * and returns with the supplied 'err_code'.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                             \
-        if (unlikely(!(a))) {                                                                   \
-            return err_code;                                                                    \
-        }                                                                                       \
-    } while(0)
-#else
 #define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                             \
         if (unlikely(!(a))) {                                                                   \
             ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);        \
             return err_code;                                                                    \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                         \
-        if (unlikely(!(a))) {                                                                   \
-            return err_code;                                                                    \
-        }                                                                                       \
-    } while(0)
-#else
 #define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                         \
         if (unlikely(!(a))) {                                                                   \
             ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);  \
             return err_code;                                                                    \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * Macro which can be used to check the condition. If the condition is not 'true', it prints the message,
  * sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                     \
-        if (unlikely(!(a))) {                                                                   \
-            ret = err_code;                                                                     \
-            goto goto_tag;                                                                      \
-        }                                                                                       \
-    } while (0)
-#else
 #define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                     \
         if (unlikely(!(a))) {                                                                   \
             ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);        \
@@ -161,19 +287,10 @@ extern "C" {
             goto goto_tag;                                                                      \
         }                                                                                       \
     } while (0)
-#endif
 
 /**
  * A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                 \
-        if (unlikely(!(a))) {                                                                   \
-            ret = err_code;                                                                     \
-            goto goto_tag;                                                                      \
-        }                                                                                       \
-    } while (0)
-#else
 #define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                 \
         if (unlikely(!(a))) {                                                                   \
             ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);  \
@@ -181,7 +298,11 @@ extern "C" {
             goto goto_tag;                                                                      \
         }                                                                                       \
     } while (0)
-#endif
+
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
+
+#endif // !CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT
+
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32c3/include/esp_common/include/esp_err.h b/tools/sdk/esp32c3/include/esp_common/include/esp_err.h
index 1f3b5553..d31bb9a0 100644
--- a/tools/sdk/esp32c3/include/esp_common/include/esp_err.h
+++ b/tools/sdk/esp32c3/include/esp_common/include/esp_err.h
@@ -132,7 +132,7 @@ void _esp_error_check_failed_without_abort(esp_err_t rc, const char *file, int l
  * serial output.
  * In comparison with ESP_ERROR_CHECK(), this prints the same error message but isn't terminating the program.
  */
-#ifdef NDEBUG
+#if defined NDEBUG || defined CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT
 #define ESP_ERROR_CHECK_WITHOUT_ABORT(x) ({                                         \
         esp_err_t err_rc_ = (x);                                                    \
         err_rc_;                                                                    \
diff --git a/tools/sdk/esp32c3/include/esp_eth/include/esp_eth_mac.h b/tools/sdk/esp32c3/include/esp_eth/include/esp_eth_mac.h
index 042c369f..f1e790c7 100644
--- a/tools/sdk/esp32c3/include/esp_eth/include/esp_eth_mac.h
+++ b/tools/sdk/esp32c3/include/esp_eth/include/esp_eth_mac.h
@@ -287,17 +287,98 @@ struct esp_eth_mac_s {
     esp_err_t (*del)(esp_eth_mac_t *mac);
 };
 
+/**
+ * @brief RMII Clock Mode Options
+ *
+ */
+typedef enum {
+    /**
+     * @brief Default values configured using Kconfig are going to be used when "Default" selected.
+     *
+     */
+    EMAC_CLK_DEFAULT,
+
+    /**
+     * @brief Input RMII Clock from external. EMAC Clock GPIO number needs to be configured when this option is selected.
+     *
+     * @note MAC will get RMII clock from outside. Note that ESP32 only supports GPIO0 to input the RMII clock.
+     *
+     */
+    EMAC_CLK_EXT_IN,
+
+    /**
+     * @brief Output RMII Clock from internal APLL Clock. EMAC Clock GPIO number needs to be configured when this option is selected.
+     *
+     */
+    EMAC_CLK_OUT
+} emac_rmii_clock_mode_t;
+
+/**
+ * @brief RMII Clock GPIO number Options
+ *
+ */
+typedef enum {
+    /**
+     * @brief MAC will get RMII clock from outside at this GPIO.
+     *
+     * @note ESP32 only supports GPIO0 to input the RMII clock.
+     *
+     */
+    EMAC_CLK_IN_GPIO = 0,
+
+    /**
+     * @brief Output RMII Clock from internal APLL Clock available at GPIO0
+     *
+     * @note GPIO0 can be set to output a pre-divided PLL clock (test only!). Enabling this option will configure GPIO0 to output a 50MHz clock.
+     * In fact this clock doesn’t have directly relationship with EMAC peripheral. Sometimes this clock won’t work well with your PHY chip.
+     * You might need to add some extra devices after GPIO0 (e.g. inverter). Note that outputting RMII clock on GPIO0 is an experimental practice.
+     * If you want the Ethernet to work with WiFi, don’t select GPIO0 output mode for stability.
+     *
+     */
+    EMAC_APPL_CLK_OUT_GPIO = 0,
+
+    /**
+     * @brief Output RMII Clock from internal APLL Clock available at GPIO16
+     *
+     */
+    EMAC_CLK_OUT_GPIO = 16,
+
+    /**
+     * @brief Inverted Output RMII Clock from internal APLL Clock available at GPIO17
+     *
+     */
+    EMAC_CLK_OUT_180_GPIO = 17
+} emac_rmii_clock_gpio_t;
+
+/**
+ * @brief Ethernet MAC Clock Configuration
+ *
+ */
+typedef union {
+    struct {
+        // MII interface is not fully implemented...
+        // Reserved for GPIO number, clock source, etc. in MII mode
+    } mii; /*!< EMAC MII Clock Configuration */
+    struct {
+        emac_rmii_clock_mode_t clock_mode; /*!< RMII Clock Mode Configuration */
+        emac_rmii_clock_gpio_t clock_gpio; /*!< RMII Clock GPIO Configuration */
+    } rmii; /*!< EMAC RMII Clock Configuration */
+} eth_mac_clock_config_t;
+
+
 /**
 * @brief Configuration of Ethernet MAC object
 *
 */
 typedef struct {
-    uint32_t sw_reset_timeout_ms; /*!< Software reset timeout value (Unit: ms) */
-    uint32_t rx_task_stack_size;  /*!< Stack size of the receive task */
-    uint32_t rx_task_prio;        /*!< Priority of the receive task */
-    int smi_mdc_gpio_num;         /*!< SMI MDC GPIO number, set to -1 could bypass the SMI GPIO configuration */
-    int smi_mdio_gpio_num;        /*!< SMI MDIO GPIO number, set to -1 could bypass the SMI GPIO configuration */
-    uint32_t flags;               /*!< Flags that specify extra capability for mac driver */
+    uint32_t sw_reset_timeout_ms;        /*!< Software reset timeout value (Unit: ms) */
+    uint32_t rx_task_stack_size;         /*!< Stack size of the receive task */
+    uint32_t rx_task_prio;               /*!< Priority of the receive task */
+    int smi_mdc_gpio_num;                /*!< SMI MDC GPIO number, set to -1 could bypass the SMI GPIO configuration */
+    int smi_mdio_gpio_num;               /*!< SMI MDIO GPIO number, set to -1 could bypass the SMI GPIO configuration */
+    uint32_t flags;                      /*!< Flags that specify extra capability for mac driver */
+    eth_data_interface_t interface;      /*!< EMAC Data interface to PHY (MII/RMII) */
+    eth_mac_clock_config_t clock_config; /*!< EMAC Interface clock configuration */
 } eth_mac_config_t;
 
 #define ETH_MAC_FLAG_WORK_WITH_CACHE_DISABLE (1 << 0) /*!< MAC driver can work when cache is disabled */
@@ -307,14 +388,23 @@ typedef struct {
  * @brief Default configuration for Ethernet MAC object
  *
  */
-#define ETH_MAC_DEFAULT_CONFIG()    \
-    {                               \
-        .sw_reset_timeout_ms = 100, \
-        .rx_task_stack_size = 4096, \
-        .rx_task_prio = 15,         \
-        .smi_mdc_gpio_num = 23,     \
-        .smi_mdio_gpio_num = 18,    \
-        .flags = 0,                 \
+#define ETH_MAC_DEFAULT_CONFIG()                          \
+    {                                                     \
+        .sw_reset_timeout_ms = 100,                       \
+        .rx_task_stack_size = 4096,                       \
+        .rx_task_prio = 15,                               \
+        .smi_mdc_gpio_num = 23,                           \
+        .smi_mdio_gpio_num = 18,                          \
+        .flags = 0,                                       \
+        .interface = EMAC_DATA_INTERFACE_RMII,            \
+        .clock_config =                                   \
+        {                                                 \
+            .rmii =                                       \
+            {                                             \
+                .clock_mode = EMAC_CLK_DEFAULT,           \
+                .clock_gpio = EMAC_CLK_IN_GPIO            \
+            }                                             \
+        }                                                 \
     }
 
 #if CONFIG_ETH_USE_ESP32_EMAC
diff --git a/tools/sdk/esp32c3/include/esp_event/include/esp_event.h b/tools/sdk/esp32c3/include/esp_event/include/esp_event.h
index b5d7b14d..2d39422d 100644
--- a/tools/sdk/esp32c3/include/esp_event/include/esp_event.h
+++ b/tools/sdk/esp32c3/include/esp_event/include/esp_event.h
@@ -48,6 +48,7 @@ typedef struct {
  *
  * @return
  *  - ESP_OK: Success
+ *  - ESP_ERR_INVALID_ARG: event_loop_args or event_loop was NULL
  *  - ESP_ERR_NO_MEM: Cannot allocate memory for event loops list
  *  - ESP_FAIL: Failed to create task loop
  *  - Others: Fail
@@ -57,7 +58,7 @@ esp_err_t esp_event_loop_create(const esp_event_loop_args_t *event_loop_args, es
 /**
  * @brief Delete an existing event loop.
  *
- * @param[in] event_loop event loop to delete
+ * @param[in] event_loop event loop to delete, must not be NULL
  *
  * @return
  *  - ESP_OK: Success
@@ -102,7 +103,7 @@ esp_err_t esp_event_loop_delete_default(void);
  * In cases where waiting on the queue times out, ESP_OK is returned and not ESP_ERR_TIMEOUT, since it is
  * normal behavior.
  *
- * @param[in] event_loop event loop to dispatch posted events from
+ * @param[in] event_loop event loop to dispatch posted events from, must not be NULL
  * @param[in] ticks_to_run number of ticks to run the loop
  *
  * @note encountering an unknown event that has been posted to the loop will only generate a warning, not an error.
@@ -158,7 +159,7 @@ esp_err_t esp_event_handler_register(esp_event_base_t event_base,
  * This function behaves in the same manner as esp_event_handler_register, except the additional
  * specification of the event loop to register the handler to.
  *
- * @param[in] event_loop the event loop to register this handler function to
+ * @param[in] event_loop the event loop to register this handler function to, must not be NULL
  * @param[in] event_base the base id of the event to register the handler for
  * @param[in] event_id the id of the event to register the handler for
  * @param[in] event_handler the handler function which gets called when the event is dispatched
@@ -197,7 +198,7 @@ esp_err_t esp_event_handler_register_with(esp_event_loop_handle_t event_loop,
  * Each registration yields a distinct instance object which identifies it over the registration
  * lifetime.
  *
- * @param[in] event_loop the event loop to register this handler function to
+ * @param[in] event_loop the event loop to register this handler function to, must not be NULL
  * @param[in] event_base the base id of the event to register the handler for
  * @param[in] event_id the id of the event to register the handler for
  * @param[in] event_handler the handler function which gets called when the event is dispatched
@@ -263,15 +264,15 @@ esp_err_t esp_event_handler_instance_register(esp_event_base_t event_base,
  * @note This function is obsolete and will be deprecated soon, please use esp_event_handler_instance_unregister()
  *       instead.
  *
- * This function can be used to unregister a handler so that it no longer gets called during dispatch.
- * Handlers can be unregistered for either: (1) specific events, (2) all events of a certain event base,
- * or (3) all events known by the system event loop
+ * Unregisters a handler so it will no longer be called during dispatch.
+ * Handlers can be unregistered for any combination of event_base and event_id which were previously registered.
+ * To unregister a handler, the event_base and event_id arguments must match exactly the arguments passed to
+ * esp_event_handler_register() when that handler was registered. Passing ESP_EVENT_ANY_BASE and/or ESP_EVENT_ANY_ID
+ * will only unregister handlers that were registered with the same wildcard arguments.
  *
- *  - specific events: specify exact event_base and event_id
- *  - all events of a certain base: specify exact event_base and use ESP_EVENT_ANY_ID as the event_id
- *  - all events known by the loop: use ESP_EVENT_ANY_BASE for event_base and ESP_EVENT_ANY_ID as the event_id
- *
- * This function ignores unregistration of handlers that has not been previously registered.
+ * @note When using ESP_EVENT_ANY_ID, handlers registered to specific event IDs using the same base will not be
+ *       unregistered. When using ESP_EVENT_ANY_BASE, events registered to specific bases will also not be
+ *       unregistered. This avoids accidental unregistration of handlers registered by other users or components.
  *
  * @param[in] event_base the base of the event with which to unregister the handler
  * @param[in] event_id the id of the event with which to unregister the handler
@@ -294,7 +295,7 @@ esp_err_t esp_event_handler_unregister(esp_event_base_t event_base,
  * This function behaves in the same manner as esp_event_handler_unregister, except the additional specification of
  * the event loop to unregister the handler with.
  *
- * @param[in] event_loop the event loop with which to unregister this handler function
+ * @param[in] event_loop the event loop with which to unregister this handler function, must not be NULL
  * @param[in] event_base the base of the event with which to unregister the handler
  * @param[in] event_id the id of the event with which to unregister the handler
  * @param[in] event_handler the handler to unregister
@@ -312,17 +313,18 @@ esp_err_t esp_event_handler_unregister_with(esp_event_loop_handle_t event_loop,
 /**
  * @brief Unregister a handler instance from a specific event loop.
  *
- * This function can be used to unregister a handler so that it no longer gets called during dispatch.
- * Handlers can be unregistered for either: (1) specific events, (2) all events of a certain event base,
- * or (3) all events known by the system event loop
+ * Unregisters a handler instance so it will no longer be called during dispatch.
+ * Handler instances can be unregistered for any combination of event_base and event_id which were previously
+ * registered. To unregister a handler instance, the event_base and event_id arguments must match exactly the
+ * arguments passed to esp_event_handler_instance_register() when that handler instance was registered.
+ * Passing ESP_EVENT_ANY_BASE and/or ESP_EVENT_ANY_ID will only unregister handler instances that were registered
+ * with the same wildcard arguments.
  *
- *  - specific events: specify exact event_base and event_id
- *  - all events of a certain base: specify exact event_base and use ESP_EVENT_ANY_ID as the event_id
- *  - all events known by the loop: use ESP_EVENT_ANY_BASE for event_base and ESP_EVENT_ANY_ID as the event_id
+ * @note When using ESP_EVENT_ANY_ID, handlers registered to specific event IDs using the same base will not be
+ *       unregistered. When using ESP_EVENT_ANY_BASE, events registered to specific bases will also not be
+ *       unregistered. This avoids accidental unregistration of handlers registered by other users or components.
  *
- * This function ignores unregistration of handler instances that have not been previously registered.
- *
- * @param[in] event_loop the event loop with which to unregister this handler function
+ * @param[in] event_loop the event loop with which to unregister this handler function, must not be NULL
  * @param[in] event_base the base of the event with which to unregister the handler
  * @param[in] event_id the id of the event with which to unregister the handler
  * @param[in] instance the instance object of the registration to be unregistered
@@ -388,7 +390,7 @@ esp_err_t esp_event_post(esp_event_base_t event_base,
  * This function behaves in the same manner as esp_event_post_to, except the additional specification of the event loop
  * to post the event to.
  *
- * @param[in] event_loop the event loop to post to
+ * @param[in] event_loop the event loop to post to, must not be NULL
  * @param[in] event_base the event base that identifies the event
  * @param[in] event_id the event id that identifies the event
  * @param[in] event_data the data, specific to the event occurence, that gets passed to the handler
@@ -441,7 +443,7 @@ esp_err_t esp_event_isr_post(esp_event_base_t event_base,
 /**
  * @brief Special variant of esp_event_post_to for posting events from interrupt handlers
  *
- * @param[in] event_loop the event loop to post to
+ * @param[in] event_loop the event loop to post to, must not be NULL
  * @param[in] event_base the event base that identifies the event
  * @param[in] event_id the event id that identifies the event
  * @param[in] event_data the data, specific to the event occurence, that gets passed to the handler
diff --git a/tools/sdk/esp32c3/include/esp_http_client/include/esp_http_client.h b/tools/sdk/esp32c3/include/esp_http_client/include/esp_http_client.h
index f6ef1da3..ab7e3c2e 100644
--- a/tools/sdk/esp32c3/include/esp_http_client/include/esp_http_client.h
+++ b/tools/sdk/esp32c3/include/esp_http_client/include/esp_http_client.h
@@ -167,6 +167,7 @@ typedef enum {
 #define ESP_ERR_HTTP_INVALID_TRANSPORT  (ESP_ERR_HTTP_BASE + 5)     /*!< There are no transport support for the input scheme */
 #define ESP_ERR_HTTP_CONNECTING         (ESP_ERR_HTTP_BASE + 6)     /*!< HTTP connection hasn't been established yet */
 #define ESP_ERR_HTTP_EAGAIN             (ESP_ERR_HTTP_BASE + 7)     /*!< Mapping of errno EAGAIN to esp_err_t */
+#define ESP_ERR_HTTP_CONNECTION_CLOSED  (ESP_ERR_HTTP_BASE + 8)     /*!< Read FIN from peer and the connection closed */
 
 /**
  * @brief      Start a HTTP session
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/esp_async_memcpy.h b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_async_memcpy.h
index 67194e44..e95f9638 100644
--- a/tools/sdk/esp32c3/include/esp_hw_support/include/esp_async_memcpy.h
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_async_memcpy.h
@@ -54,8 +54,10 @@ typedef bool (*async_memcpy_isr_cb_t)(async_memcpy_t mcp_hdl, async_memcpy_event
  *
  */
 typedef struct {
-    uint32_t backlog; /*!< Maximum number of streams that can be handled simultaneously */
-    uint32_t flags;   /*!< Extra flags to control async memcpy feature */
+    uint32_t backlog;          /*!< Maximum number of streams that can be handled simultaneously */
+    size_t sram_trans_align;   /*!< DMA transfer alignment (both in size and address) for SRAM memory */
+    size_t psram_trans_align;  /*!< DMA transfer alignment (both in size and address) for PSRAM memory */
+    uint32_t flags;            /*!< Extra flags to control async memcpy feature */
 } async_memcpy_config_t;
 
 /**
@@ -63,9 +65,11 @@ typedef struct {
  *
  */
 #define ASYNC_MEMCPY_DEFAULT_CONFIG() \
-    {                              \
-        .backlog = 8,              \
-        .flags = 0,                \
+    {                                 \
+        .backlog = 8,                 \
+        .sram_trans_align = 0,        \
+        .psram_trans_align = 0,       \
+        .flags = 0,                   \
     }
 
 /**
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/esp_mac.h b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_mac.h
index 0d23d014..75e01ebb 100644
--- a/tools/sdk/esp32c3/include/esp_hw_support/include/esp_mac.h
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_mac.h
@@ -60,7 +60,9 @@ typedef enum {
   * @note If not using a valid OUI, set the "locally administered" bit
   *       (bit value 0x02 in the first byte) to avoid collisions.
   *
-  * @param  mac base MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   *
   * @return ESP_OK on success
   *         ESP_ERR_INVALID_ARG If mac is NULL or is not a unicast MAC
@@ -72,7 +74,9 @@ esp_err_t esp_base_mac_addr_set(const uint8_t *mac);
   *
   * @note If no custom Base MAC has been set, this returns the pre-programmed Espressif base MAC address.
   *
-  * @param  mac base MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   *
   * @return ESP_OK on success
   *         ESP_ERR_INVALID_MAC base MAC address has not been set
@@ -91,7 +95,9 @@ esp_err_t esp_base_mac_addr_get(uint8_t *mac);
   *
   * @note This function is currently only supported on ESP32.
   *
-  * @param  mac  base MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   *
   * @return ESP_OK on success
   *         ESP_ERR_INVALID_VERSION An invalid MAC version field was read from BLK3 of EFUSE
@@ -102,7 +108,9 @@ esp_err_t esp_efuse_mac_get_custom(uint8_t *mac);
 /**
   * @brief  Return base MAC address which is factory-programmed by Espressif in EFUSE.
   *
-  * @param  mac  base MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   *
   * @return ESP_OK on success
   */
@@ -115,12 +123,14 @@ esp_err_t esp_efuse_mac_get_default(uint8_t *mac);
   * Then calculates the MAC address of the specific interface requested,
   * refer to ESP-IDF Programming Guide for the algorithm.
   *
-  * @param  mac  MAC address of the interface, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   * @param  type Type of MAC address to return
   *
   * @return ESP_OK on success
   */
-esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type);
+esp_err_t esp_read_mac(uint8_t *mac, esp_mac_type_t type);
 
 /**
   * @brief Derive local MAC address from universal MAC address.
@@ -133,12 +143,14 @@ esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type);
   * address, then the first octet is XORed with 0x4 in order to create a different
   * locally administered MAC address.
   *
-  * @param  local_mac  Derived local MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   * @param  universal_mac  Source universal MAC address, length: 6 bytes.
   *
   * @return ESP_OK on success
   */
-esp_err_t esp_derive_local_mac(uint8_t* local_mac, const uint8_t* universal_mac);
+esp_err_t esp_derive_local_mac(uint8_t *local_mac, const uint8_t *universal_mac);
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/compare_set.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/compare_set.h
index 5a11ab16..ddbaeb7e 100644
--- a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/compare_set.h
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/compare_set.h
@@ -17,7 +17,7 @@
 #include <stdint.h>
 #include <stdbool.h>
 #include "soc/cpu.h"
-#include "soc/soc_memory_layout.h"
+#include "soc/soc_memory_types.h"
 
 #if __XTENSA__
 #include "xtensa/xtruntime.h"
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32/dport_access.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32/dport_access.h
new file mode 100644
index 00000000..4f473940
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32/dport_access.h
@@ -0,0 +1,47 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#include <stdint.h>
+
+#include <sdkconfig.h>
+
+#ifndef _ESP_DPORT_ACCESS_H_
+#define _ESP_DPORT_ACCESS_H_
+
+#include "xtensa/xtruntime.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void esp_dport_access_stall_other_cpu_start(void);
+void esp_dport_access_stall_other_cpu_end(void);
+void esp_dport_access_int_init(void);
+void esp_dport_access_int_pause(void);
+void esp_dport_access_int_resume(void);
+void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
+uint32_t esp_dport_access_reg_read(uint32_t reg);
+uint32_t esp_dport_access_sequence_reg_read(uint32_t reg);
+//This routine does not stop the dport routines in any way that is recoverable. Please
+//only call in case of panic().
+void esp_dport_access_int_abort(void);
+
+#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM)
+#define DPORT_STALL_OTHER_CPU_START()
+#define DPORT_STALL_OTHER_CPU_END()
+#define DPORT_INTERRUPT_DISABLE()
+#define DPORT_INTERRUPT_RESTORE()
+#else
+#define DPORT_STALL_OTHER_CPU_START()   esp_dport_access_stall_other_cpu_start()
+#define DPORT_STALL_OTHER_CPU_END()     esp_dport_access_stall_other_cpu_end()
+#define DPORT_INTERRUPT_DISABLE()       unsigned int intLvl = XTOS_SET_INTLEVEL(CONFIG_ESP32_DPORT_DIS_INTERRUPT_LVL)
+#define DPORT_INTERRUPT_RESTORE()       XTOS_RESTORE_JUST_INTLEVEL(intLvl)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_DPORT_ACCESS_H_ */
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32/himem.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32/himem.h
new file mode 100644
index 00000000..e3e85a4b
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32/himem.h
@@ -0,0 +1,143 @@
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stddef.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//Opaque pointers as handles for ram/range data
+typedef struct esp_himem_ramdata_t *esp_himem_handle_t;
+typedef struct esp_himem_rangedata_t *esp_himem_rangehandle_t;
+
+//ESP32 MMU block size
+#define ESP_HIMEM_BLKSZ (0x8000)
+
+#define ESP_HIMEM_MAPFLAG_RO 1 /*!< Indicates that a mapping will only be read from. Note that this is unused for now. */
+
+/**
+ * @brief Allocate a block in high memory
+ *
+ * @param size Size of the to-be-allocated block, in bytes. Note that this needs to be
+ *             a multiple of the external RAM mmu block size (32K).
+ * @param[out] handle_out Handle to be returned
+ * @returns - ESP_OK if succesful
+ *          - ESP_ERR_NO_MEM if out of memory
+ *          - ESP_ERR_INVALID_SIZE if size is not a multiple of 32K
+ */
+esp_err_t esp_himem_alloc(size_t size, esp_himem_handle_t *handle_out);
+
+
+/**
+ * @brief Allocate a memory region to map blocks into
+ *
+ * This allocates a contiguous CPU memory region that can be used to map blocks
+ * of physical memory into.
+ *
+ * @param size Size of the range to be allocated. Note this needs to be a multiple of
+ *             the external RAM mmu block size (32K).
+ * @param[out] handle_out Handle to be returned
+ * @returns - ESP_OK if succesful
+ *          - ESP_ERR_NO_MEM if out of memory or address space
+ *          - ESP_ERR_INVALID_SIZE if size is not a multiple of 32K
+ */
+esp_err_t esp_himem_alloc_map_range(size_t size, esp_himem_rangehandle_t *handle_out);
+
+/**
+ * @brief Map a block of high memory into the CPUs address space
+ *
+ * This effectively makes the block available for read/write operations.
+ *
+ * @note The region to be mapped needs to have offsets and sizes that are aligned to the
+ *       SPI RAM MMU block size (32K)
+ *
+ * @param handle Handle to the block of memory, as given by esp_himem_alloc
+ * @param range Range handle to map the memory in
+ * @param ram_offset Offset into the block of physical memory of the block to map
+ * @param range_offset Offset into the address range where the block will be mapped
+ * @param len Length of region to map
+ * @param flags One of ESP_HIMEM_MAPFLAG_*
+ * @param[out] out_ptr Pointer to variable to store resulting memory pointer in
+ * @returns - ESP_OK if the memory could be mapped
+ *          - ESP_ERR_INVALID_ARG if offset, range or len aren't MMU-block-aligned (32K)
+ *          - ESP_ERR_INVALID_SIZE if the offsets/lengths don't fit in the allocated memory or range
+ *          - ESP_ERR_INVALID_STATE if a block in the selected ram offset/length is already mapped, or
+ *                                  if a block in the selected range offset/length already has a mapping.
+ */
+esp_err_t esp_himem_map(esp_himem_handle_t handle, esp_himem_rangehandle_t range, size_t ram_offset, size_t range_offset, size_t len, int flags, void **out_ptr);
+
+
+/**
+ * @brief Free a block of physical memory
+ *
+ * This clears out the associated handle making the memory available for re-allocation again.
+ * This will only succeed if none of the memory blocks currently have a mapping.
+ *
+ * @param handle Handle to the block of memory, as given by esp_himem_alloc
+ * @returns - ESP_OK if the memory is succesfully freed
+ *          - ESP_ERR_INVALID_ARG if the handle still is (partially) mapped
+ */
+esp_err_t esp_himem_free(esp_himem_handle_t handle);
+
+
+
+/**
+ * @brief Free a mapping range
+ *
+ * This clears out the associated handle making the range available for re-allocation again.
+ * This will only succeed if none of the range blocks currently are used for a mapping.
+ *
+ * @param handle Handle to the range block, as given by esp_himem_alloc_map_range
+ * @returns - ESP_OK if the memory is succesfully freed
+ *          - ESP_ERR_INVALID_ARG if the handle still is (partially) mapped to
+ */
+esp_err_t esp_himem_free_map_range(esp_himem_rangehandle_t handle);
+
+
+/**
+ * @brief Unmap a region
+ *
+ * @param range Range handle
+ * @param ptr Pointer returned by esp_himem_map
+ * @param len Length of the block to be unmapped. Must be aligned to the SPI RAM MMU blocksize (32K)
+ * @returns - ESP_OK if the memory is succesfully unmapped,
+ *          - ESP_ERR_INVALID_ARG if ptr or len are invalid.
+ */
+esp_err_t esp_himem_unmap(esp_himem_rangehandle_t range, void *ptr, size_t len);
+
+
+/**
+ * @brief Get total amount of memory under control of himem API
+ *
+ * @returns Amount of memory, in bytes
+ */
+size_t esp_himem_get_phys_size(void);
+
+/**
+ * @brief Get free amount of memory under control of himem API
+ *
+ * @returns Amount of free memory, in bytes
+ */
+size_t esp_himem_get_free_size(void);
+
+
+/**
+ * @brief Get amount of SPI memory address space needed for bankswitching
+ *
+ * @note This is also weakly defined in esp32/spiram.c and returns 0 there, so
+ *       if no other function in this file is used, no memory is reserved.
+ *
+ * @returns Amount of reserved area, in bytes
+ */
+size_t esp_himem_reserved_area_size(void);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32/rtc.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32/rtc.h
new file mode 100644
index 00000000..4149546f
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32/rtc.h
@@ -0,0 +1,31 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp32/rtc.h
+ *
+ * This file contains declarations of rtc related functions.
+ */
+
+/**
+ * @brief Get current value of RTC counter in microseconds
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter in microseconds
+ */
+uint64_t esp_rtc_get_time_us(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32/spiram.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32/spiram.h
new file mode 100644
index 00000000..e58712d1
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32/spiram.h
@@ -0,0 +1,115 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+#ifndef __ESP_SPIRAM_H
+#define __ESP_SPIRAM_H
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    ESP_SPIRAM_SIZE_16MBITS = 0,   /*!< SPI RAM size is 16 MBits */
+    ESP_SPIRAM_SIZE_32MBITS = 1,   /*!< SPI RAM size is 32 MBits */
+    ESP_SPIRAM_SIZE_64MBITS = 2,   /*!< SPI RAM size is 64 MBits */
+    ESP_SPIRAM_SIZE_INVALID,       /*!< SPI RAM size is invalid */
+} esp_spiram_size_t;
+
+/**
+ * @brief get SPI RAM size
+ * @return
+ *     - ESP_SPIRAM_SIZE_INVALID if SPI RAM not enabled or not valid
+ *     - SPI RAM size
+ */
+esp_spiram_size_t esp_spiram_get_chip_size(void);
+
+/**
+ * @brief Initialize spiram interface/hardware. Normally called from cpu_start.c.
+ *
+ * @return ESP_OK on success
+ */
+esp_err_t esp_spiram_init(void);
+
+/**
+ * @brief Configure Cache/MMU for access to external SPI RAM.
+ *
+ * Normally this function is called from cpu_start, if CONFIG_SPIRAM_BOOT_INIT
+ * option is enabled. Applications which need to enable SPI RAM at run time
+ * can disable CONFIG_SPIRAM_BOOT_INIT, and call this function later.
+ *
+ * @attention this function must be called with flash cache disabled.
+ */
+void esp_spiram_init_cache(void);
+
+
+/**
+ * @brief Memory test for SPI RAM. Should be called after SPI RAM is initialized and
+ * (in case of a dual-core system) the app CPU is online. This test overwrites the
+ * memory with crap, so do not call after e.g. the heap allocator has stored important
+ * stuff in SPI RAM.
+ *
+ * @return true on success, false on failed memory test
+ */
+bool esp_spiram_test(void);
+
+
+/**
+ * @brief Add the initialized SPI RAM to the heap allocator.
+ */
+esp_err_t esp_spiram_add_to_heapalloc(void);
+
+
+/**
+ * @brief Get the size of the attached SPI RAM chip selected in menuconfig
+ *
+ * @return Size in bytes, or 0 if no external RAM chip support compiled in.
+ */
+size_t esp_spiram_get_size(void);
+
+
+/**
+ * @brief Force a writeback of the data in the SPI RAM cache. This is to be called whenever
+ * cache is disabled, because disabling cache on the ESP32 discards the data in the SPI
+ * RAM cache.
+ *
+ * This is meant for use from within the SPI flash code.
+ */
+void esp_spiram_writeback_cache(void);
+
+
+
+/**
+ * @brief Reserve a pool of internal memory for specific DMA/internal allocations
+ *
+ * @param size Size of reserved pool in bytes
+ *
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NO_MEM when no memory available for pool
+ */
+esp_err_t esp_spiram_reserve_dma_pool(size_t size);
+
+
+/**
+ * @brief If SPI RAM(PSRAM) has been initialized
+ *
+ * @return
+ *          - true SPI RAM has been initialized successfully
+ *          - false SPI RAM hasn't been initialized or initialized failed
+ */
+bool esp_spiram_is_initialized(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //  __ESP_SPIRAM_H
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/dport_access.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/dport_access.h
new file mode 100644
index 00000000..f3f7007a
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/dport_access.h
@@ -0,0 +1,42 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_DPORT_ACCESS_H_
+#define _ESP_DPORT_ACCESS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Read a sequence of DPORT registers to the buffer.
+ *
+ * @param[out] buff_out  Contains the read data.
+ * @param[in]  address   Initial address for reading registers.
+ * @param[in]  num_words The number of words.
+ */
+void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
+
+#define DPORT_STALL_OTHER_CPU_START()
+#define DPORT_STALL_OTHER_CPU_END()
+#define DPORT_INTERRUPT_DISABLE()
+#define DPORT_INTERRUPT_RESTORE()
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_DPORT_ACCESS_H_ */
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/esp_crypto_lock.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/esp_crypto_lock.h
new file mode 100644
index 00000000..3149d346
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/esp_crypto_lock.h
@@ -0,0 +1,76 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Acquire lock for HMAC cryptography peripheral
+ *
+ * Internally also locks the SHA peripheral, as the HMAC depends on the SHA peripheral
+ */
+void esp_crypto_hmac_lock_acquire(void);
+
+/**
+ * @brief Release lock for HMAC cryptography peripheral
+ *
+ * Internally also releases the SHA peripheral, as the HMAC depends on the SHA peripheral
+ */
+void esp_crypto_hmac_lock_release(void);
+
+/**
+ * @brief Acquire lock for DS cryptography peripheral
+ *
+ * Internally also locks the HMAC (which locks SHA), AES and MPI  peripheral, as the DS depends on these peripherals
+ */
+void esp_crypto_ds_lock_acquire(void);
+
+/**
+ * @brief Release lock for DS cryptography peripheral
+ *
+ * Internally also releases the HMAC (which locks SHA), AES and MPI  peripheral, as the DS depends on these peripherals
+ */
+void esp_crypto_ds_lock_release(void);
+
+/**
+ * @brief Acquire lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_acquire(void);
+
+/**
+ * @brief Release lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_release(void);
+
+
+/**
+ * @brief Acquire lock for the mpi cryptography peripheral.
+ *
+ */
+void esp_crypto_mpi_lock_acquire(void);
+
+/**
+ * @brief Release lock for the mpi/rsa cryptography peripheral.
+ *
+ */
+void esp_crypto_mpi_lock_release(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/esp_ds.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/esp_ds.h
new file mode 100644
index 00000000..911e44c8
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/esp_ds.h
@@ -0,0 +1,218 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_hmac.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP32C3_ERR_HW_CRYPTO_DS_HMAC_FAIL           ESP_ERR_HW_CRYPTO_BASE + 0x1 /*!< HMAC peripheral problem */
+#define ESP32C3_ERR_HW_CRYPTO_DS_INVALID_KEY         ESP_ERR_HW_CRYPTO_BASE + 0x2 /*!< given HMAC key isn't correct,
+                                                                                HMAC peripheral problem */
+#define ESP32C3_ERR_HW_CRYPTO_DS_INVALID_DIGEST      ESP_ERR_HW_CRYPTO_BASE + 0x4 /*!< message digest check failed,
+                                                                                result is invalid */
+#define ESP32C3_ERR_HW_CRYPTO_DS_INVALID_PADDING     ESP_ERR_HW_CRYPTO_BASE + 0x5 /*!< padding check failed, but result
+                                                                                   is produced anyway and can be read*/
+
+#define ESP_DS_IV_BIT_LEN 128
+#define ESP_DS_IV_LEN (ESP_DS_IV_BIT_LEN / 8)
+#define ESP_DS_SIGNATURE_MAX_BIT_LEN 3072
+#define ESP_DS_SIGNATURE_MD_BIT_LEN 256
+#define ESP_DS_SIGNATURE_M_PRIME_BIT_LEN 32
+#define ESP_DS_SIGNATURE_L_BIT_LEN 32
+#define ESP_DS_SIGNATURE_PADDING_BIT_LEN 64
+
+/* Length of parameter 'C' stored in flash, in bytes
+   - Operands Y, M and r_bar; each 3072 bits
+   - Operand MD (message digest); 256 bits
+   - Operands M' and L; each 32 bits
+   - Operand beta (padding value; 64 bits
+*/
+#define ESP_DS_C_LEN (((ESP_DS_SIGNATURE_MAX_BIT_LEN * 3 \
+        + ESP_DS_SIGNATURE_MD_BIT_LEN   \
+        + ESP_DS_SIGNATURE_M_PRIME_BIT_LEN   \
+        + ESP_DS_SIGNATURE_L_BIT_LEN   \
+        + ESP_DS_SIGNATURE_PADDING_BIT_LEN) / 8))
+
+typedef struct esp_ds_context esp_ds_context_t;
+
+typedef enum {
+    ESP_DS_RSA_1024 = (1024 / 32) - 1,
+    ESP_DS_RSA_2048 = (2048 / 32) - 1,
+    ESP_DS_RSA_3072 = (3072 / 32) - 1
+} esp_digital_signature_length_t;
+
+/**
+ * Encrypted private key data. Recommended to store in flash in this format.
+ *
+ * @note This struct has to match to one from the ROM code! This documentation is mostly taken from there.
+ */
+typedef struct esp_digital_signature_data {
+    /**
+     * RSA LENGTH register parameters
+     * (number of words in RSA key & operands, minus one).
+     *
+     * Max value 127 (for RSA 3072).
+     *
+     * This value must match the length field encrypted and stored in 'c',
+     * or invalid results will be returned. (The DS peripheral will
+     * always use the value in 'c', not this value, so an attacker can't
+     * alter the DS peripheral results this way, it will just truncate or
+     * extend the message and the resulting signature in software.)
+     *
+     * @note In IDF, the enum type length is the same as of type unsigned, so they can be used interchangably.
+     *       See the ROM code for the original declaration of struct \c ets_ds_data_t.
+     */
+    esp_digital_signature_length_t rsa_length;
+
+    /**
+     * IV value used to encrypt 'c'
+     */
+    uint32_t iv[ESP_DS_IV_BIT_LEN / 32];
+
+    /**
+     * Encrypted Digital Signature parameters. Result of AES-CBC encryption
+     * of plaintext values. Includes an encrypted message digest.
+     */
+    uint8_t c[ESP_DS_C_LEN];
+} esp_ds_data_t;
+
+/**
+ * Plaintext parameters used by Digital Signature.
+ *
+ * This is only used for encrypting the RSA parameters by calling esp_ds_encrypt_params().
+ * Afterwards, the result can be stored in flash or in other persistent memory.
+ * The encryption is a prerequisite step before any signature operation can be done.
+ */
+typedef struct {
+    uint32_t  Y[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA exponent
+    uint32_t  M[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA modulus
+    uint32_t Rb[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA r inverse operand
+    uint32_t M_prime;                               //!< RSA M prime operand
+    uint32_t length;                                //!< RSA length in words (32 bit)
+} esp_ds_p_data_t;
+
+/**
+ * @brief Sign the message with a hardware key from specific key slot.
+ *
+ * This function is a wrapper around \c esp_ds_finish_sign() and \c esp_ds_start_sign(), so do not use them
+ * in parallel.
+ * It blocks until the signing is finished and then returns the signature.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components during its entire execution time.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ *
+ * @return
+ *      - ESP_OK if successful, the signature was written to the parameter \c signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches.
+ */
+esp_err_t esp_ds_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        void *signature);
+
+/**
+ * @brief Start the signing process.
+ *
+ * This function yields a context object which needs to be passed to \c esp_ds_finish_sign() to finish the signing
+ * process.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components, so the user has to ensure to call
+ *       \c esp_ds_finish_sign() in a timely manner.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param esp_ds_ctx the context object which is needed for finishing the signing process later
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation was started now and has to be finished with \c esp_ds_finish_sign()
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ */
+esp_err_t esp_ds_start_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        esp_ds_context_t **esp_ds_ctx);
+
+/**
+ * Return true if the DS peripheral is busy, otherwise false.
+ *
+ * @note Only valid if \c esp_ds_start_sign() was called before.
+ */
+bool esp_ds_is_busy(void);
+
+/**
+ * @brief Finish the signing process.
+ *
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ * @param esp_ds_ctx the context object retreived by \c esp_ds_start_sign()
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *        This means that the encrypted RSA key parameters are invalid, indicating that they may have been tampered
+ *        with or indicating a flash error, etc.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches (see TRM for more details).
+ */
+esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx);
+
+/**
+ * @brief Encrypt the private key parameters.
+ *
+ * The encryption is a prerequisite step before any signature operation can be done.
+ * It is not strictly necessary to use this encryption function, the encryption could also happen on an external
+ * device.
+ *
+ * @param data Output buffer to store encrypted data, suitable for later use generating signatures.
+ *        The allocated memory must be in internal memory and word aligned since it's filled by DMA. Both is asserted
+ *        at run time.
+ * @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
+ * @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process
+ *        is done and 'data' is stored.
+ * @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the
+ *        corresponding HMAC key will be stored to efuse and then permanently erased.
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or p_data->rsa_length is too long
+ */
+esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
+        const void *iv,
+        const esp_ds_p_data_t *p_data,
+        const void *key);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/esp_hmac.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/esp_hmac.h
new file mode 100644
index 00000000..391ba12f
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/esp_hmac.h
@@ -0,0 +1,67 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_HMAC_H_
+#define _ESP_HMAC_H_
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * The possible efuse keys for the HMAC peripheral
+ */
+typedef enum {
+    HMAC_KEY0 = 0,
+    HMAC_KEY1,
+    HMAC_KEY2,
+    HMAC_KEY3,
+    HMAC_KEY4,
+    HMAC_KEY5,
+    HMAC_KEY_MAX
+} hmac_key_id_t;
+
+/**
+ * @brief
+ * Calculate the HMAC of a given message.
+ *
+ * Calculate the HMAC \c hmac of a given message \c message with length \c message_len.
+ * SHA256 is used for the calculation (fixed on ESP32S2).
+ *
+ * @note Uses the HMAC peripheral in "upstream" mode.
+ *
+ * @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calcuation.
+ *        The corresponding purpose field of the key block in the efuse must be set to the HMAC upstream purpose value.
+ * @param message the message for which to calculate the HMAC
+ * @param message_len message length
+ *             return ESP_ERR_INVALID_STATE if unsuccessful
+ * @param [out] hmac the hmac result; the buffer behind the provided pointer must be 32 bytes long
+ *
+ * @return
+ *      * ESP_OK, if the calculation was successful,
+ *      * ESP_FAIL, if the hmac calculation failed
+ */
+esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
+        const void *message,
+        size_t message_len,
+        uint8_t *hmac);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ESP_HMAC_H_
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/memprot.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/memprot.h
new file mode 100644
index 00000000..0d7e6ca4
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/memprot.h
@@ -0,0 +1,457 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/* INTERNAL API
+ * generic interface to PMS memory protection features
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "esp_attr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef IRAM_SRAM_START
+#define IRAM_SRAM_START             0x4037C000
+#endif
+
+#ifndef DRAM_SRAM_START
+#define DRAM_SRAM_START             0x3FC7C000
+#endif
+
+#ifndef MAP_DRAM_TO_IRAM
+#define MAP_DRAM_TO_IRAM(addr)       (addr - DRAM_SRAM_START + IRAM_SRAM_START)
+#endif
+
+#ifndef MAP_IRAM_TO_DRAM
+#define MAP_IRAM_TO_DRAM(addr)       (addr - IRAM_SRAM_START + DRAM_SRAM_START)
+#endif
+
+typedef enum {
+    MEMPROT_NONE =              0x00000000,
+    MEMPROT_IRAM0_SRAM =        0x00000001,
+    MEMPROT_DRAM0_SRAM =        0x00000002,
+    MEMPROT_ALL =               0xFFFFFFFF
+} mem_type_prot_t;
+
+typedef enum {
+    MEMPROT_SPLITLINE_NONE = 0,
+    MEMPROT_IRAM0_DRAM0_SPLITLINE,
+    MEMPROT_IRAM0_LINE_0_SPLITLINE,
+    MEMPROT_IRAM0_LINE_1_SPLITLINE,
+    MEMPROT_DRAM0_DMA_LINE_0_SPLITLINE,
+    MEMPROT_DRAM0_DMA_LINE_1_SPLITLINE
+} split_line_t;
+
+typedef enum {
+    MEMPROT_PMS_AREA_NONE = 0,
+    MEMPROT_IRAM0_PMS_AREA_0,
+    MEMPROT_IRAM0_PMS_AREA_1,
+    MEMPROT_IRAM0_PMS_AREA_2,
+    MEMPROT_IRAM0_PMS_AREA_3,
+    MEMPROT_DRAM0_PMS_AREA_0,
+    MEMPROT_DRAM0_PMS_AREA_1,
+    MEMPROT_DRAM0_PMS_AREA_2,
+    MEMPROT_DRAM0_PMS_AREA_3
+} pms_area_t;
+
+typedef enum
+{
+    MEMPROT_PMS_WORLD_0 = 0,
+    MEMPROT_PMS_WORLD_1,
+    MEMPROT_PMS_WORLD_2,
+    MEMPROT_PMS_WORLD_INVALID = 0xFFFFFFFF
+} pms_world_t;
+
+typedef enum
+{
+    MEMPROT_PMS_OP_READ = 0,
+    MEMPROT_PMS_OP_WRITE,
+    MEMPROT_PMS_OP_FETCH,
+    MEMPROT_PMS_OP_INVALID = 0xFFFFFFFF
+} pms_operation_type_t;
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+const char *esp_memprot_mem_type_to_str(mem_type_prot_t mem_type);
+
+/**
+ * @brief Converts Split line type to string
+ *
+ * @param line_type Split line type (see split_line_t enum)
+ */
+const char *esp_memprot_split_line_to_str(split_line_t line_type);
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type (see pms_area_t enum)
+ */
+const char *esp_memprot_pms_to_str(pms_area_t area_type);
+
+/**
+ * @brief Returns PMS splitting address for given Split line type
+ *
+ * The value is taken from PMS configuration registers (IRam0 range)
+ * For details on split lines see 'esp_memprot_set_prot_int' function description
+ *
+ * @param line_type Split line type (see split_line_t enum)
+ *
+ * @return appropriate split line address
+ */
+uint32_t *esp_memprot_get_split_addr(split_line_t line_type);
+
+/**
+ * @brief Returns default main IRAM/DRAM splitting address
+ *
+ * The address value is given by _iram_text_end global (IRam0 range)
+
+ * @return Main I/D split line (IRam0_DRam0_Split_Addr)
+ */
+void *esp_memprot_get_default_main_split_addr(void);
+
+/**
+ * @brief Sets a lock for the main IRAM/DRAM splitting address
+ *
+ * Locks can be unlocked only by digital system reset
+ */
+void esp_memprot_set_split_line_lock(void);
+
+/**
+ * @brief Gets a lock status for the main IRAM/DRAM splitting address
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_split_line_lock(void);
+
+/**
+ * @brief Sets required split line address
+ *
+ * @param line_type Split line type (see split_line_t enum)
+ * @param line_addr target address from a memory range relevant to given line_type (IRAM/DRAM)
+ */
+void esp_memprot_set_split_line(split_line_t line_type, const void *line_addr);
+
+/**
+ * @brief Sets a lock for PMS Area settings of required Memory type
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_pms_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS Area settings of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_pms_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Sets permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
+ *
+ * @param area_type IRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag
+ * @param w Write permission flag
+ * @param x Execute permission flag
+ */
+void esp_memprot_iram_set_pms_area(pms_area_t area_type, bool r, bool w, bool x);
+
+/**
+ * @brief Gets current permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
+ *
+ * @param area_type IRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag holder
+ * @param w Write permission flag holder
+ * @param x Execute permission flag holder
+ */
+void esp_memprot_iram_get_pms_area(pms_area_t area_type, bool *r, bool *w, bool *x);
+
+/**
+ * @brief Sets permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
+ *
+ * @param area_type DRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag
+ * @param w Write permission flag
+ */
+void esp_memprot_dram_set_pms_area(pms_area_t area_type, bool r, bool w);
+
+/**
+ * @brief Gets current permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
+ *
+ * @param area_type DRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag holder
+ * @param w Write permission flag holder
+ */
+void esp_memprot_dram_get_pms_area(pms_area_t area_type, bool *r, bool *w);
+
+/**
+ * @brief Sets a lock for PMS interrupt monitor settings of required Memory type
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_monitor_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS interrupt monitor settings of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_monitor_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Enable PMS violation interrupt monitoring of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ * @param enable/disable
+ */
+void esp_memprot_set_monitor_en(mem_type_prot_t mem_type, bool enable);
+
+/**
+ * @brief Gets enable/disable status for PMS interrupt monitor settings of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (enabled/disabled)
+ */
+bool esp_memprot_get_monitor_en(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets CPU ID for currently active PMS violation interrupt
+ *
+ * @return CPU ID (CPU_PRO for ESP32C3)
+ */
+int IRAM_ATTR esp_memprot_intr_get_cpuid(void);
+
+/**
+ * @brief Clears current interrupt ON flag for given Memory type
+ *
+ * Interrupt clearing happens in two steps:
+ *      1. Interrupt CLR flag is set (to clear the interrupt ON status)
+ *      2. Interrupt CLR flag is reset (to allow further monitoring)
+ * This operation is non-atomic by PMS module design
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void IRAM_ATTR esp_memprot_monitor_clear_intr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns active PMS violation interrupt (if any)
+ *
+ * This function iterates through supported Memory type status registers
+ * and returns the first interrupt-on flag. If none is found active,
+ * MEMPROT_NONE is returned.
+ * Order of checking (in current version):
+ *      1. MEMPROT_IRAM0_SRAM
+ *      2. MEMPROT_DRAM0_SRAM
+ *
+ * @return mem_type Memory protection type related to active interrupt found (see mem_type_prot_t enum)
+ */
+mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
+
+/**
+ * @brief Checks whether any violation interrupt is active
+ *
+ * @return true/false (yes/no)
+ */
+bool IRAM_ATTR esp_memprot_is_locked_any(void);
+
+/**
+ * @brief Checks whether any violation interrupt is enabled
+ *
+ * @return true/false (yes/no)
+ */
+bool IRAM_ATTR esp_memprot_is_intr_ena_any(void);
+
+/**
+ * @brief Checks whether any violation interrupt is enabled
+ *
+ * @return true/false (yes/no)
+ */
+bool IRAM_ATTR esp_memprot_get_violate_intr_on(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns the address which caused the violation interrupt (if any)
+ *
+ * The address is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return faulting address
+ */
+uint32_t IRAM_ATTR esp_memprot_get_violate_addr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns the World identifier of the code causing the violation interrupt (if any)
+ *
+ * The value is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return World identifier (see pms_world_t enum)
+ */
+pms_world_t IRAM_ATTR esp_memprot_get_violate_world(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns Read or Write operation type which caused the violation interrupt (if any)
+ *
+ * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return PMS operation type relevant to mem_type parameter (se pms_operation_type_t)
+ */
+pms_operation_type_t IRAM_ATTR esp_memprot_get_violate_wr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns LoadStore flag of the operation type which caused the violation interrupt (if any)
+ *
+ * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
+ * Effective only on IRam0 access
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (LoadStore bit on/off)
+ */
+bool IRAM_ATTR esp_memprot_get_violate_loadstore(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns byte-enables for the address which caused the violation interrupt (if any)
+ *
+ * The value is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return byte-enables
+ */
+uint32_t IRAM_ATTR esp_memprot_get_violate_byte_en(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns raw contents of DRam0 status register 1
+ *
+ * @return 32-bit register value
+ */
+uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_1(void);
+
+/**
+ * @brief Returns raw contents of DRam0 status register 2
+ *
+ * @return 32-bit register value
+ */
+uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_2(void);
+
+/**
+ * @brief Returns raw contents of IRam0 status register
+ *
+ * @return 32-bit register value
+ */
+uint32_t IRAM_ATTR esp_memprot_get_iram_status_reg(void);
+
+/**
+ * @brief Register PMS violation interrupt in global interrupt matrix for given Memory type
+ *
+ * Memory protection components uses specific interrupt number, see ETS_MEMPROT_ERR_INUM
+ * The registration makes the panic-handler routine being called when the interrupt appears
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_intr_matrix(mem_type_prot_t mem_type);
+
+/**
+ * @brief Convenient routine for setting the PMS defaults
+ *
+ * Called on application startup, depending on CONFIG_ESP_SYSTEM_MEMPROT_FEATURE Kconfig settings
+ * For implementation details see 'esp_memprot_set_prot_int' description
+ *
+ * @param invoke_panic_handler register all interrupts for panic handling (true/false)
+ * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
+ * @param mem_type_mask 32-bit field of specific PMS parts to configure (see 'esp_memprot_set_prot_int')
+ */
+void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
+
+/**
+ * @brief Internal routine for setting the PMS defaults
+ *
+ * Called on application startup from within 'esp_memprot_set_prot'. Allows setting a specific splitting address
+ * (main I/D split line) - see the parameter 'split_addr'. If the 'split_addr' equals to NULL, default I/D split line
+ * is used (&_iram_text_end) and all the remaining lines share the same address.
+ * The function sets all the split lines and PMS areas to the same space,
+ * ie there is a single instruction space and single data space at the end.
+ * The PMS split lines and permission areas scheme described below:
+ *
+ *                            DRam0/DMA                                     IRam0
+ *                              -----------------------------------------------
+ *                    ...       |                 IRam0_PMS_0                 |
+ *               DRam0_PMS_0   -----------------------------------------------    IRam0_line1_Split_addr
+ *                    ...       |                 IRam0_PMS_1                 |
+ *                    ...       -----------------------------------------------   IRam0_line0_Split_addr
+ *                              |                 IRam0_PMS_2                 |
+ *                              ===============================================   IRam0_DRam0_Split_addr (main I/D)
+ *                              |                 DRam0_PMS_1                 |
+ * DRam0_DMA_line0_Split_addr   -----------------------------------------------       ...
+ *                              |                 DRam0_PMS_2                 |       ...
+ * DRam0_DMA_line1_Split_addr   -----------------------------------------------   IRam0_PMS_3
+ *                              |                 DRam0_PMS_3                 |       ...
+ *                              -----------------------------------------------
+ *
+ * Default settings provided by 'esp_memprot_set_prot_int' are as follows:
+ *
+ *                            DRam0/DMA                                     IRam0
+ *                              -----------------------------------------------
+ *                              |   IRam0_PMS_0 = IRam0_PMS_1 = IRam0_PMS_2   |
+ *                              |                 DRam0_PMS_0                 |   IRam0_line1_Split_addr
+ * DRam0_DMA_line0_Split_addr   |                                             |             =
+ *               =              ===============================================   IRam0_line0_Split_addr
+ * DRam0_DMA_line1_Split_addr   |                                             |             =
+ *                              |   DRam0_PMS_1 = DRam0_PMS_2 = DRam0_PMS_3   |   IRam0_DRam0_Split_addr (main I/D)
+ *                              |                 IRam0_PMS_3                 |
+ *                              -----------------------------------------------
+ *
+ * Once the memprot feature is locked, it can be unlocked only by digital system reset
+ *
+ * @param invoke_panic_handler register all the violation interrupts for panic handling (true/false)
+ * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
+ * @param split_addr specific main I/D adrees or NULL to use default ($_iram_text_end)
+ * @param mem_type_mask 32-bit field of specific PMS parts to configure (members of mem_type_prot_t)
+ */
+void esp_memprot_set_prot_int(bool invoke_panic_handler, bool lock_feature, void *split_addr, uint32_t *mem_type_mask);
+
+/**
+ * @brief Returns raw contents of PMS interrupt monitor register for given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return 32-bit register value
+ */
+uint32_t esp_memprot_get_monitor_enable_reg(mem_type_prot_t mem_type);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/rtc.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/rtc.h
new file mode 100644
index 00000000..b090ae5c
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32c3/rtc.h
@@ -0,0 +1,40 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp32c3/rtc.h
+ *
+ * This file contains declarations of rtc related functions.
+ */
+
+/**
+ * @brief Get current value of RTC counter in microseconds
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter in microseconds
+ */
+uint64_t esp_rtc_get_time_us(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/dport_access.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/dport_access.h
new file mode 100644
index 00000000..f3f7007a
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/dport_access.h
@@ -0,0 +1,42 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_DPORT_ACCESS_H_
+#define _ESP_DPORT_ACCESS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Read a sequence of DPORT registers to the buffer.
+ *
+ * @param[out] buff_out  Contains the read data.
+ * @param[in]  address   Initial address for reading registers.
+ * @param[in]  num_words The number of words.
+ */
+void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
+
+#define DPORT_STALL_OTHER_CPU_START()
+#define DPORT_STALL_OTHER_CPU_END()
+#define DPORT_INTERRUPT_DISABLE()
+#define DPORT_INTERRUPT_RESTORE()
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_DPORT_ACCESS_H_ */
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/esp_crypto_lock.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/esp_crypto_lock.h
new file mode 100644
index 00000000..3149d346
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/esp_crypto_lock.h
@@ -0,0 +1,76 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Acquire lock for HMAC cryptography peripheral
+ *
+ * Internally also locks the SHA peripheral, as the HMAC depends on the SHA peripheral
+ */
+void esp_crypto_hmac_lock_acquire(void);
+
+/**
+ * @brief Release lock for HMAC cryptography peripheral
+ *
+ * Internally also releases the SHA peripheral, as the HMAC depends on the SHA peripheral
+ */
+void esp_crypto_hmac_lock_release(void);
+
+/**
+ * @brief Acquire lock for DS cryptography peripheral
+ *
+ * Internally also locks the HMAC (which locks SHA), AES and MPI  peripheral, as the DS depends on these peripherals
+ */
+void esp_crypto_ds_lock_acquire(void);
+
+/**
+ * @brief Release lock for DS cryptography peripheral
+ *
+ * Internally also releases the HMAC (which locks SHA), AES and MPI  peripheral, as the DS depends on these peripherals
+ */
+void esp_crypto_ds_lock_release(void);
+
+/**
+ * @brief Acquire lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_acquire(void);
+
+/**
+ * @brief Release lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_release(void);
+
+
+/**
+ * @brief Acquire lock for the mpi cryptography peripheral.
+ *
+ */
+void esp_crypto_mpi_lock_acquire(void);
+
+/**
+ * @brief Release lock for the mpi/rsa cryptography peripheral.
+ *
+ */
+void esp_crypto_mpi_lock_release(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/esp_ds.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/esp_ds.h
new file mode 100644
index 00000000..79e963fc
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/esp_ds.h
@@ -0,0 +1,218 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_hmac.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP32H2_ERR_HW_CRYPTO_DS_HMAC_FAIL           ESP_ERR_HW_CRYPTO_BASE + 0x1 /*!< HMAC peripheral problem */
+#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_KEY         ESP_ERR_HW_CRYPTO_BASE + 0x2 /*!< given HMAC key isn't correct,
+                                                                                HMAC peripheral problem */
+#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_DIGEST      ESP_ERR_HW_CRYPTO_BASE + 0x4 /*!< message digest check failed,
+                                                                                result is invalid */
+#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_PADDING     ESP_ERR_HW_CRYPTO_BASE + 0x5 /*!< padding check failed, but result
+                                                                                   is produced anyway and can be read*/
+
+#define ESP_DS_IV_BIT_LEN 128
+#define ESP_DS_IV_LEN (ESP_DS_IV_BIT_LEN / 8)
+#define ESP_DS_SIGNATURE_MAX_BIT_LEN 3072
+#define ESP_DS_SIGNATURE_MD_BIT_LEN 256
+#define ESP_DS_SIGNATURE_M_PRIME_BIT_LEN 32
+#define ESP_DS_SIGNATURE_L_BIT_LEN 32
+#define ESP_DS_SIGNATURE_PADDING_BIT_LEN 64
+
+/* Length of parameter 'C' stored in flash, in bytes
+   - Operands Y, M and r_bar; each 3072 bits
+   - Operand MD (message digest); 256 bits
+   - Operands M' and L; each 32 bits
+   - Operand beta (padding value; 64 bits
+*/
+#define ESP_DS_C_LEN (((ESP_DS_SIGNATURE_MAX_BIT_LEN * 3 \
+        + ESP_DS_SIGNATURE_MD_BIT_LEN   \
+        + ESP_DS_SIGNATURE_M_PRIME_BIT_LEN   \
+        + ESP_DS_SIGNATURE_L_BIT_LEN   \
+        + ESP_DS_SIGNATURE_PADDING_BIT_LEN) / 8))
+
+typedef struct esp_ds_context esp_ds_context_t;
+
+typedef enum {
+    ESP_DS_RSA_1024 = (1024 / 32) - 1,
+    ESP_DS_RSA_2048 = (2048 / 32) - 1,
+    ESP_DS_RSA_3072 = (3072 / 32) - 1
+} esp_digital_signature_length_t;
+
+/**
+ * Encrypted private key data. Recommended to store in flash in this format.
+ *
+ * @note This struct has to match to one from the ROM code! This documentation is mostly taken from there.
+ */
+typedef struct esp_digital_signature_data {
+    /**
+     * RSA LENGTH register parameters
+     * (number of words in RSA key & operands, minus one).
+     *
+     * Max value 127 (for RSA 3072).
+     *
+     * This value must match the length field encrypted and stored in 'c',
+     * or invalid results will be returned. (The DS peripheral will
+     * always use the value in 'c', not this value, so an attacker can't
+     * alter the DS peripheral results this way, it will just truncate or
+     * extend the message and the resulting signature in software.)
+     *
+     * @note In IDF, the enum type length is the same as of type unsigned, so they can be used interchangably.
+     *       See the ROM code for the original declaration of struct \c ets_ds_data_t.
+     */
+    esp_digital_signature_length_t rsa_length;
+
+    /**
+     * IV value used to encrypt 'c'
+     */
+    uint32_t iv[ESP_DS_IV_BIT_LEN / 32];
+
+    /**
+     * Encrypted Digital Signature parameters. Result of AES-CBC encryption
+     * of plaintext values. Includes an encrypted message digest.
+     */
+    uint8_t c[ESP_DS_C_LEN];
+} esp_ds_data_t;
+
+/**
+ * Plaintext parameters used by Digital Signature.
+ *
+ * This is only used for encrypting the RSA parameters by calling esp_ds_encrypt_params().
+ * Afterwards, the result can be stored in flash or in other persistent memory.
+ * The encryption is a prerequisite step before any signature operation can be done.
+ */
+typedef struct {
+    uint32_t  Y[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA exponent
+    uint32_t  M[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA modulus
+    uint32_t Rb[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA r inverse operand
+    uint32_t M_prime;                               //!< RSA M prime operand
+    uint32_t length;                                //!< RSA length in words (32 bit)
+} esp_ds_p_data_t;
+
+/**
+ * @brief Sign the message with a hardware key from specific key slot.
+ *
+ * This function is a wrapper around \c esp_ds_finish_sign() and \c esp_ds_start_sign(), so do not use them
+ * in parallel.
+ * It blocks until the signing is finished and then returns the signature.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components during its entire execution time.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ *
+ * @return
+ *      - ESP_OK if successful, the signature was written to the parameter \c signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches.
+ */
+esp_err_t esp_ds_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        void *signature);
+
+/**
+ * @brief Start the signing process.
+ *
+ * This function yields a context object which needs to be passed to \c esp_ds_finish_sign() to finish the signing
+ * process.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components, so the user has to ensure to call
+ *       \c esp_ds_finish_sign() in a timely manner.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param esp_ds_ctx the context object which is needed for finishing the signing process later
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation was started now and has to be finished with \c esp_ds_finish_sign()
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ */
+esp_err_t esp_ds_start_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        esp_ds_context_t **esp_ds_ctx);
+
+/**
+ * Return true if the DS peripheral is busy, otherwise false.
+ *
+ * @note Only valid if \c esp_ds_start_sign() was called before.
+ */
+bool esp_ds_is_busy(void);
+
+/**
+ * @brief Finish the signing process.
+ *
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ * @param esp_ds_ctx the context object retreived by \c esp_ds_start_sign()
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *        This means that the encrypted RSA key parameters are invalid, indicating that they may have been tampered
+ *        with or indicating a flash error, etc.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches (see TRM for more details).
+ */
+esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx);
+
+/**
+ * @brief Encrypt the private key parameters.
+ *
+ * The encryption is a prerequisite step before any signature operation can be done.
+ * It is not strictly necessary to use this encryption function, the encryption could also happen on an external
+ * device.
+ *
+ * @param data Output buffer to store encrypted data, suitable for later use generating signatures.
+ *        The allocated memory must be in internal memory and word aligned since it's filled by DMA. Both is asserted
+ *        at run time.
+ * @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
+ * @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process
+ *        is done and 'data' is stored.
+ * @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the
+ *        corresponding HMAC key will be stored to efuse and then permanently erased.
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or p_data->rsa_length is too long
+ */
+esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
+        const void *iv,
+        const esp_ds_p_data_t *p_data,
+        const void *key);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/esp_hmac.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/esp_hmac.h
new file mode 100644
index 00000000..391ba12f
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/esp_hmac.h
@@ -0,0 +1,67 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_HMAC_H_
+#define _ESP_HMAC_H_
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * The possible efuse keys for the HMAC peripheral
+ */
+typedef enum {
+    HMAC_KEY0 = 0,
+    HMAC_KEY1,
+    HMAC_KEY2,
+    HMAC_KEY3,
+    HMAC_KEY4,
+    HMAC_KEY5,
+    HMAC_KEY_MAX
+} hmac_key_id_t;
+
+/**
+ * @brief
+ * Calculate the HMAC of a given message.
+ *
+ * Calculate the HMAC \c hmac of a given message \c message with length \c message_len.
+ * SHA256 is used for the calculation (fixed on ESP32S2).
+ *
+ * @note Uses the HMAC peripheral in "upstream" mode.
+ *
+ * @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calcuation.
+ *        The corresponding purpose field of the key block in the efuse must be set to the HMAC upstream purpose value.
+ * @param message the message for which to calculate the HMAC
+ * @param message_len message length
+ *             return ESP_ERR_INVALID_STATE if unsuccessful
+ * @param [out] hmac the hmac result; the buffer behind the provided pointer must be 32 bytes long
+ *
+ * @return
+ *      * ESP_OK, if the calculation was successful,
+ *      * ESP_FAIL, if the hmac calculation failed
+ */
+esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
+        const void *message,
+        size_t message_len,
+        uint8_t *hmac);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ESP_HMAC_H_
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/memprot.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/memprot.h
new file mode 100644
index 00000000..2567b604
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/memprot.h
@@ -0,0 +1,456 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/* INTERNAL API
+ * generic interface to PMS memory protection features
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_attr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef IRAM_SRAM_START
+#define IRAM_SRAM_START             0x4037C000
+#endif
+
+#ifndef DRAM_SRAM_START
+#define DRAM_SRAM_START             0x3FC7C000
+#endif
+
+#ifndef MAP_DRAM_TO_IRAM
+#define MAP_DRAM_TO_IRAM(addr)       (addr - DRAM_SRAM_START + IRAM_SRAM_START)
+#endif
+
+#ifndef MAP_IRAM_TO_DRAM
+#define MAP_IRAM_TO_DRAM(addr)       (addr - IRAM_SRAM_START + DRAM_SRAM_START)
+#endif
+
+typedef enum {
+    MEMPROT_NONE =              0x00000000,
+    MEMPROT_IRAM0_SRAM =        0x00000001,
+    MEMPROT_DRAM0_SRAM =        0x00000002,
+    MEMPROT_ALL =               0xFFFFFFFF
+} mem_type_prot_t;
+
+typedef enum {
+    MEMPROT_SPLITLINE_NONE = 0,
+    MEMPROT_IRAM0_DRAM0_SPLITLINE,
+    MEMPROT_IRAM0_LINE_0_SPLITLINE,
+    MEMPROT_IRAM0_LINE_1_SPLITLINE,
+    MEMPROT_DRAM0_DMA_LINE_0_SPLITLINE,
+    MEMPROT_DRAM0_DMA_LINE_1_SPLITLINE
+} split_line_t;
+
+typedef enum {
+    MEMPROT_PMS_AREA_NONE = 0,
+    MEMPROT_IRAM0_PMS_AREA_0,
+    MEMPROT_IRAM0_PMS_AREA_1,
+    MEMPROT_IRAM0_PMS_AREA_2,
+    MEMPROT_IRAM0_PMS_AREA_3,
+    MEMPROT_DRAM0_PMS_AREA_0,
+    MEMPROT_DRAM0_PMS_AREA_1,
+    MEMPROT_DRAM0_PMS_AREA_2,
+    MEMPROT_DRAM0_PMS_AREA_3
+} pms_area_t;
+
+typedef enum
+{
+    MEMPROT_PMS_WORLD_0 = 0,
+    MEMPROT_PMS_WORLD_1,
+    MEMPROT_PMS_WORLD_2,
+    MEMPROT_PMS_WORLD_INVALID = 0xFFFFFFFF
+} pms_world_t;
+
+typedef enum
+{
+    MEMPROT_PMS_OP_READ = 0,
+    MEMPROT_PMS_OP_WRITE,
+    MEMPROT_PMS_OP_FETCH,
+    MEMPROT_PMS_OP_INVALID = 0xFFFFFFFF
+} pms_operation_type_t;
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+const char *esp_memprot_mem_type_to_str(mem_type_prot_t mem_type);
+
+/**
+ * @brief Converts Split line type to string
+ *
+ * @param line_type Split line type (see split_line_t enum)
+ */
+const char *esp_memprot_split_line_to_str(split_line_t line_type);
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type (see pms_area_t enum)
+ */
+const char *esp_memprot_pms_to_str(pms_area_t area_type);
+
+/**
+ * @brief Returns PMS splitting address for given Split line type
+ *
+ * The value is taken from PMS configuration registers (IRam0 range)
+ * For details on split lines see 'esp_memprot_set_prot_int' function description
+ *
+ * @param line_type Split line type (see split_line_t enum)
+ *
+ * @return appropriate split line address
+ */
+uint32_t *esp_memprot_get_split_addr(split_line_t line_type);
+
+/**
+ * @brief Returns default main IRAM/DRAM splitting address
+ *
+ * The address value is given by _iram_text_end global (IRam0 range)
+
+ * @return Main I/D split line (IRam0_DRam0_Split_Addr)
+ */
+void *esp_memprot_get_default_main_split_addr(void);
+
+/**
+ * @brief Sets a lock for the main IRAM/DRAM splitting address
+ *
+ * Locks can be unlocked only by digital system reset
+ */
+void esp_memprot_set_split_line_lock(void);
+
+/**
+ * @brief Gets a lock status for the main IRAM/DRAM splitting address
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_split_line_lock(void);
+
+/**
+ * @brief Sets required split line address
+ *
+ * @param line_type Split line type (see split_line_t enum)
+ * @param line_addr target address from a memory range relevant to given line_type (IRAM/DRAM)
+ */
+void esp_memprot_set_split_line(split_line_t line_type, const void *line_addr);
+
+/**
+ * @brief Sets a lock for PMS Area settings of required Memory type
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_pms_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS Area settings of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_pms_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Sets permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
+ *
+ * @param area_type IRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag
+ * @param w Write permission flag
+ * @param x Execute permission flag
+ */
+void esp_memprot_iram_set_pms_area(pms_area_t area_type, bool r, bool w, bool x);
+
+/**
+ * @brief Gets current permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
+ *
+ * @param area_type IRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag holder
+ * @param w Write permission flag holder
+ * @param x Execute permission flag holder
+ */
+void esp_memprot_iram_get_pms_area(pms_area_t area_type, bool *r, bool *w, bool *x);
+
+/**
+ * @brief Sets permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
+ *
+ * @param area_type DRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag
+ * @param w Write permission flag
+ */
+void esp_memprot_dram_set_pms_area(pms_area_t area_type, bool r, bool w);
+
+/**
+ * @brief Gets current permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
+ *
+ * @param area_type DRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag holder
+ * @param w Write permission flag holder
+ */
+void esp_memprot_dram_get_pms_area(pms_area_t area_type, bool *r, bool *w);
+
+/**
+ * @brief Sets a lock for PMS interrupt monitor settings of required Memory type
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_monitor_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS interrupt monitor settings of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_monitor_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Enable PMS violation interrupt monitoring of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ * @param enable/disable
+ */
+void esp_memprot_set_monitor_en(mem_type_prot_t mem_type, bool enable);
+
+/**
+ * @brief Gets enable/disable status for PMS interrupt monitor settings of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (enabled/disabled)
+ */
+bool esp_memprot_get_monitor_en(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets CPU ID for currently active PMS violation interrupt
+ *
+ * @return CPU ID (CPU_PRO for ESP32H2)
+ */
+int IRAM_ATTR esp_memprot_intr_get_cpuid(void);
+
+/**
+ * @brief Clears current interrupt ON flag for given Memory type
+ *
+ * Interrupt clearing happens in two steps:
+ *      1. Interrupt CLR flag is set (to clear the interrupt ON status)
+ *      2. Interrupt CLR flag is reset (to allow further monitoring)
+ * This operation is non-atomic by PMS module design
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void IRAM_ATTR esp_memprot_monitor_clear_intr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns active PMS violation interrupt (if any)
+ *
+ * This function iterates through supported Memory type status registers
+ * and returns the first interrupt-on flag. If none is found active,
+ * MEMPROT_NONE is returned.
+ * Order of checking (in current version):
+ *      1. MEMPROT_IRAM0_SRAM
+ *      2. MEMPROT_DRAM0_SRAM
+ *
+ * @return mem_type Memory protection type related to active interrupt found (see mem_type_prot_t enum)
+ */
+mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
+
+/**
+ * @brief Checks whether any violation interrupt is active
+ *
+ * @return true/false (yes/no)
+ */
+bool IRAM_ATTR esp_memprot_is_locked_any(void);
+
+/**
+ * @brief Checks whether any violation interrupt is enabled
+ *
+ * @return true/false (yes/no)
+ */
+bool IRAM_ATTR esp_memprot_is_intr_ena_any(void);
+
+/**
+ * @brief Checks whether any violation interrupt is enabled
+ *
+ * @return true/false (yes/no)
+ */
+bool IRAM_ATTR esp_memprot_get_violate_intr_on(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns the address which caused the violation interrupt (if any)
+ *
+ * The address is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return faulting address
+ */
+uint32_t IRAM_ATTR esp_memprot_get_violate_addr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns the World identifier of the code causing the violation interrupt (if any)
+ *
+ * The value is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return World identifier (see pms_world_t enum)
+ */
+pms_world_t IRAM_ATTR esp_memprot_get_violate_world(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns Read or Write operation type which caused the violation interrupt (if any)
+ *
+ * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return PMS operation type relevant to mem_type parameter (se pms_operation_type_t)
+ */
+pms_operation_type_t IRAM_ATTR esp_memprot_get_violate_wr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns LoadStore flag of the operation type which caused the violation interrupt (if any)
+ *
+ * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
+ * Effective only on IRam0 access
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (LoadStore bit on/off)
+ */
+bool IRAM_ATTR esp_memprot_get_violate_loadstore(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns byte-enables for the address which caused the violation interrupt (if any)
+ *
+ * The value is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return byte-enables
+ */
+uint32_t IRAM_ATTR esp_memprot_get_violate_byte_en(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns raw contents of DRam0 status register 1
+ *
+ * @return 32-bit register value
+ */
+uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_1(void);
+
+/**
+ * @brief Returns raw contents of DRam0 status register 2
+ *
+ * @return 32-bit register value
+ */
+uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_2(void);
+
+/**
+ * @brief Returns raw contents of IRam0 status register
+ *
+ * @return 32-bit register value
+ */
+uint32_t IRAM_ATTR esp_memprot_get_iram_status_reg(void);
+
+/**
+ * @brief Register PMS violation interrupt in global interrupt matrix for given Memory type
+ *
+ * Memory protection components uses specific interrupt number, see ETS_MEMPROT_ERR_INUM
+ * The registration makes the panic-handler routine being called when the interrupt appears
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_intr_matrix(mem_type_prot_t mem_type);
+
+/**
+ * @brief Convenient routine for setting the PMS defaults
+ *
+ * Called on application startup, depending on CONFIG_ESP_SYSTEM_MEMPROT_FEATURE Kconfig settings
+ * For implementation details see 'esp_memprot_set_prot_int' description
+ *
+ * @param invoke_panic_handler register all interrupts for panic handling (true/false)
+ * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
+ * @param mem_type_mask 32-bit field of specific PMS parts to configure (see 'esp_memprot_set_prot_int')
+ */
+void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
+
+/**
+ * @brief Internal routine for setting the PMS defaults
+ *
+ * Called on application startup from within 'esp_memprot_set_prot'. Allows setting a specific splitting address
+ * (main I/D split line) - see the parameter 'split_addr'. If the 'split_addr' equals to NULL, default I/D split line
+ * is used (&_iram_text_end) and all the remaining lines share the same address.
+ * The function sets all the split lines and PMS areas to the same space,
+ * ie there is a single instruction space and single data space at the end.
+ * The PMS split lines and permission areas scheme described below:
+ *
+ *                            DRam0/DMA                                     IRam0
+ *                              -----------------------------------------------
+ *                    ...       |                 IRam0_PMS_0                 |
+ *               DRam0_PMS_0   -----------------------------------------------    IRam0_line1_Split_addr
+ *                    ...       |                 IRam0_PMS_1                 |
+ *                    ...       -----------------------------------------------   IRam0_line0_Split_addr
+ *                              |                 IRam0_PMS_2                 |
+ *                              ===============================================   IRam0_DRam0_Split_addr (main I/D)
+ *                              |                 DRam0_PMS_1                 |
+ * DRam0_DMA_line0_Split_addr   -----------------------------------------------       ...
+ *                              |                 DRam0_PMS_2                 |       ...
+ * DRam0_DMA_line1_Split_addr   -----------------------------------------------   IRam0_PMS_3
+ *                              |                 DRam0_PMS_3                 |       ...
+ *                              -----------------------------------------------
+ *
+ * Default settings provided by 'esp_memprot_set_prot_int' are as follows:
+ *
+ *                            DRam0/DMA                                     IRam0
+ *                              -----------------------------------------------
+ *                              |   IRam0_PMS_0 = IRam0_PMS_1 = IRam0_PMS_2   |
+ *                              |                 DRam0_PMS_0                 |   IRam0_line1_Split_addr
+ * DRam0_DMA_line0_Split_addr   |                                             |             =
+ *               =              ===============================================   IRam0_line0_Split_addr
+ * DRam0_DMA_line1_Split_addr   |                                             |             =
+ *                              |   DRam0_PMS_1 = DRam0_PMS_2 = DRam0_PMS_3   |   IRam0_DRam0_Split_addr (main I/D)
+ *                              |                 IRam0_PMS_3                 |
+ *                              -----------------------------------------------
+ *
+ * Once the memprot feature is locked, it can be unlocked only by digital system reset
+ *
+ * @param invoke_panic_handler register all the violation interrupts for panic handling (true/false)
+ * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
+ * @param split_addr specific main I/D adrees or NULL to use default ($_iram_text_end)
+ * @param mem_type_mask 32-bit field of specific PMS parts to configure (members of mem_type_prot_t)
+ */
+void esp_memprot_set_prot_int(bool invoke_panic_handler, bool lock_feature, void *split_addr, uint32_t *mem_type_mask);
+
+/**
+ * @brief Returns raw contents of PMS interrupt monitor register for given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return 32-bit register value
+ */
+uint32_t esp_memprot_get_monitor_enable_reg(mem_type_prot_t mem_type);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/rtc.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/rtc.h
new file mode 100644
index 00000000..cca748df
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32h2/rtc.h
@@ -0,0 +1,40 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp32h2/rtc.h
+ *
+ * This file contains declarations of rtc related functions.
+ */
+
+/**
+ * @brief Get current value of RTC counter in microseconds
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter in microseconds
+ */
+uint64_t esp_rtc_get_time_us(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/dport_access.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/dport_access.h
new file mode 100644
index 00000000..6ba6fd65
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/dport_access.h
@@ -0,0 +1,42 @@
+// Copyright 2010-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_DPORT_ACCESS_H_
+#define _ESP_DPORT_ACCESS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Read a sequence of DPORT registers to the buffer.
+ *
+ * @param[out] buff_out  Contains the read data.
+ * @param[in]  address   Initial address for reading registers.
+ * @param[in]  num_words The number of words.
+ */
+void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
+
+#define DPORT_STALL_OTHER_CPU_START()
+#define DPORT_STALL_OTHER_CPU_END()
+#define DPORT_INTERRUPT_DISABLE()
+#define DPORT_INTERRUPT_RESTORE()
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_DPORT_ACCESS_H_ */
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/esp_crypto_lock.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/esp_crypto_lock.h
new file mode 100644
index 00000000..e1df0399
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/esp_crypto_lock.h
@@ -0,0 +1,51 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * This API should be used by all components which use the SHA, AES, HMAC and DS crypto hardware on the ESP32S2.
+ * They can not be used in parallel because they use the same DMA or are calling each other.
+ * E.g., HMAC uses SHA or DS uses HMAC and AES. See the ESP32S2 Technical Reference Manual for more details.
+ *
+ * Other unrelated components must not use it.
+ */
+
+/**
+ * Acquire lock for the AES and SHA cryptography peripherals, which both use the crypto DMA.
+ */
+void esp_crypto_dma_lock_acquire(void);
+
+/**
+ * Release lock for the AES and SHA cryptography peripherals, which both use the crypto DMA.
+ */
+void esp_crypto_dma_lock_release(void);
+
+/**
+ * Acquire lock for the MPI/RSA cryptography peripheral
+ */
+void esp_crypto_mpi_lock_acquire(void);
+
+/**
+ * Release lock for the MPI/RSA cryptography peripheral
+ */
+void esp_crypto_mpi_lock_release(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/esp_ds.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/esp_ds.h
new file mode 100644
index 00000000..12906377
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/esp_ds.h
@@ -0,0 +1,198 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_hmac.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL           ESP_ERR_HW_CRYPTO_BASE + 0x1 /*!< HMAC peripheral problem */
+#define ESP_ERR_HW_CRYPTO_DS_INVALID_KEY         ESP_ERR_HW_CRYPTO_BASE + 0x2 /*!< given HMAC key isn't correct,
+                                                                                HMAC peripheral problem */
+#define ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST      ESP_ERR_HW_CRYPTO_BASE + 0x4 /*!< message digest check failed,
+                                                                                result is invalid */
+#define ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING     ESP_ERR_HW_CRYPTO_BASE + 0x5 /*!< padding check failed, but result
+                                                                                   is produced anyway and can be read*/
+
+#define ESP_DS_IV_LEN 16
+
+/* Length of parameter 'C' stored in flash */
+#define ESP_DS_C_LEN (12672 / 8)
+
+typedef struct esp_ds_context esp_ds_context_t;
+
+typedef enum {
+    ESP_DS_RSA_1024 = (1024 / 32) - 1,
+    ESP_DS_RSA_2048 = (2048 / 32) - 1,
+    ESP_DS_RSA_3072 = (3072 / 32) - 1,
+    ESP_DS_RSA_4096 = (4096 / 32) - 1
+} esp_digital_signature_length_t;
+
+/**
+ * Encrypted private key data. Recommended to store in flash in this format.
+ *
+ * @note This struct has to match to one from the ROM code! This documentation is mostly taken from there.
+ */
+typedef struct esp_digital_signature_data {
+    /**
+     * RSA LENGTH register parameters
+     * (number of words in RSA key & operands, minus one).
+     *
+     * Max value 127 (for RSA 4096).
+     *
+     * This value must match the length field encrypted and stored in 'c',
+     * or invalid results will be returned. (The DS peripheral will
+     * always use the value in 'c', not this value, so an attacker can't
+     * alter the DS peripheral results this way, it will just truncate or
+     * extend the message and the resulting signature in software.)
+     *
+     * @note In IDF, the enum type length is the same as of type unsigned, so they can be used interchangably.
+     *       See the ROM code for the original declaration of struct \c ets_ds_data_t.
+     */
+    esp_digital_signature_length_t rsa_length;
+
+    /**
+     * IV value used to encrypt 'c'
+     */
+    uint8_t iv[ESP_DS_IV_LEN];
+
+    /**
+     * Encrypted Digital Signature parameters. Result of AES-CBC encryption
+     * of plaintext values. Includes an encrypted message digest.
+     */
+    uint8_t c[ESP_DS_C_LEN];
+} esp_ds_data_t;
+
+/** Plaintext parameters used by Digital Signature.
+ *
+ * Not used for signing with DS peripheral, but can be encrypted
+ * in-device by calling esp_ds_encrypt_params()
+ *
+ * @note This documentation is mostly taken from the ROM code.
+ */
+typedef struct {
+    uint32_t Y[4096/32];                    //!< RSA exponent
+    uint32_t M[4096/32];                    //!< RSA modulus
+    uint32_t Rb[4096/32];                   //!< RSA r inverse operand
+    uint32_t M_prime;                       //!< RSA M prime operand
+    esp_digital_signature_length_t length;  //!< RSA length
+} esp_ds_p_data_t;
+
+/**
+ * Sign the message.
+ *
+ * This function is a wrapper around \c esp_ds_finish_sign() and \c esp_ds_start_sign(), so do not use them
+ * in parallel.
+ * It blocks until the signing is finished and then returns the signature.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components during its entire execution time.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ *
+ * @return
+ *      - ESP_OK if successful, the signature was written to the parameter \c signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches.
+ */
+esp_err_t esp_ds_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        void *signature);
+
+/**
+ * Start the signing process.
+ *
+ * This function yields a context object which needs to be passed to \c esp_ds_finish_sign() to finish the signing
+ * process.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components, so the user has to ensure to call
+ *       \c esp_ds_finish_sign() in a timely manner.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param esp_ds_ctx the context object which is needed for finishing the signing process later
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation was started now and has to be finished with \c esp_ds_finish_sign()
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ */
+esp_err_t esp_ds_start_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        esp_ds_context_t **esp_ds_ctx);
+
+/**
+ * Return true if the DS peripheral is busy, otherwise false.
+ *
+ * @note Only valid if \c esp_ds_start_sign() was called before.
+ */
+bool esp_ds_is_busy(void);
+
+/**
+ * Finish the signing process.
+ *
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ * @param esp_ds_ctx the context object retreived by \c esp_ds_start_sign()
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches.
+ */
+esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx);
+
+/**
+ * Encrypt the private key parameters.
+ *
+ * @param data Output buffer to store encrypted data, suitable for later use generating signatures.
+ *        The allocated memory must be in internal memory and word aligned since it's filled by DMA. Both is asserted
+ *        at run time.
+ * @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
+ * @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process
+ *        is done and 'data' is stored.
+ * @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the
+ *        corresponding HMAC key will be stored to efuse and then permanently erased.
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or p_data->rsa_length is too long
+ */
+esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
+        const void *iv,
+        const esp_ds_p_data_t *p_data,
+        const void *key);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/esp_hmac.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/esp_hmac.h
new file mode 100644
index 00000000..5fa836c4
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/esp_hmac.h
@@ -0,0 +1,99 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_HMAC_H_
+#define _ESP_HMAC_H_
+
+#include "esp_err.h"
+#include "stdbool.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * The possible efuse keys for the HMAC peripheral
+ */
+typedef enum {
+    HMAC_KEY0 = 0,
+    HMAC_KEY1,
+    HMAC_KEY2,
+    HMAC_KEY3,
+    HMAC_KEY4,
+    HMAC_KEY5,
+    HMAC_KEY_MAX
+} hmac_key_id_t;
+
+/**
+ * @brief
+ * Calculate the HMAC of a given message.
+ *
+ * Calculate the HMAC \c hmac of a given message \c message with length \c message_len.
+ * SHA256 is used for the calculation (fixed on ESP32S2).
+ *
+ * @note Uses the HMAC peripheral in "upstream" mode.
+ *
+ * @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calcuation.
+ *        The corresponding purpose field of the key block in the efuse must be set to the HMAC upstream purpose value.
+ * @param message the message for which to calculate the HMAC
+ * @param message_len message length
+ *             return ESP_ERR_INVALID_STATE if unsuccessful
+ * @param [out] hmac the hmac result; the buffer behind the provided pointer must be 32 bytes long
+ *
+ * @return
+ *      * ESP_OK, if the calculation was successful,
+ *      * ESP_FAIL, if the hmac calculation failed
+ */
+esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
+        const void *message,
+        size_t message_len,
+        uint8_t *hmac);
+
+/**
+ * @brief
+ * Use HMAC peripheral in Downstream mode to re-enable the JTAG, if it is not permanently disable by HW.
+ * In downstream mode HMAC calculations perfomred by peripheral used internally and not provided back to user.
+ *
+ * @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calculation.
+ *        The corresponding purpose field of the key block in the efuse must be set to HMAC downstream purpose.
+ *
+ * @param token Pre calculated HMAC value of the 32-byte 0x00 using SHA-256 and the known private HMAC key. The key is already
+ *        programmed to a eFuse key block. The key block number is provided as the first parameter to this function.
+ *
+ * @return
+ *      * ESP_OK, if the calculation was successful,
+ *                if the calculated HMAC value matches with provided token,
+ *                JTAG will be re-enable otherwise JTAG will remain disabled.
+ *                Return value does not indicate the JTAG status.
+ *      * ESP_FAIL, if the hmac calculation failed or JTAG is permanently disabled by EFUSE_HARD_DIS_JTAG eFuse parameter.
+ *      * ESP_ERR_INVALID_ARG, invalid input arguments
+ */
+esp_err_t esp_hmac_jtag_enable(hmac_key_id_t key_id,
+        const uint8_t *token);
+
+/**
+ *  @brief
+ *  Disable the JTAG which might be enable using the HMAC downstream mode. This function just clear the result generated by
+ *  JTAG key by calling esp_hmac_jtag_enable() API.
+ *
+ *  @return
+ *       * ESP_OK return ESP_OK after writing the HMAC_SET_INVALIDATE_JTAG_REG with value 1.
+ */
+esp_err_t esp_hmac_jtag_disable(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ESP_HMAC_H_
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/memprot.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/memprot.h
new file mode 100644
index 00000000..c63fb395
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/memprot.h
@@ -0,0 +1,518 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/* INTERNAL API
+ * generic interface to MMU memory protection features
+ */
+
+#pragma once
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_attr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//convenient constants for better code readabilty
+#define RD_ENA                  true
+#define RD_DIS                  false
+#define WR_ENA                  true
+#define WR_DIS                  false
+#define EX_ENA                  true
+#define EX_DIS                  false
+#define RD_LOW_ENA              true
+#define RD_LOW_DIS              false
+#define WR_LOW_ENA              true
+#define WR_LOW_DIS              false
+#define EX_LOW_ENA              true
+#define EX_LOW_DIS              false
+#define RD_HIGH_ENA             true
+#define RD_HIGH_DIS             false
+#define WR_HIGH_ENA             true
+#define WR_HIGH_DIS             false
+#define EX_HIGH_ENA             true
+#define EX_HIGH_DIS             false
+#define PANIC_HNDL_ON           true
+#define PANIC_HNDL_OFF          false
+#define MEMPROT_LOCK            true
+#define MEMPROT_UNLOCK          false
+#define DEF_SPLIT_LINE          NULL
+
+//memory range types
+typedef enum {
+    MEMPROT_NONE =              0x00000000,
+    MEMPROT_IRAM0_SRAM =        0x00000001, //0x40020000-0x4006FFFF, RWX
+    MEMPROT_DRAM0_SRAM =        0x00000002, //0x3FFB0000-0x3FFFFFFF, RW
+    MEMPROT_IRAM0_RTCFAST =     0x00000004, //0x40070000-0x40071FFF, RWX
+    MEMPROT_DRAM0_RTCFAST =     0x00000008, //0x3FF9E000-0x3FF9FFFF, RW
+    MEMPROT_PERI1_RTCSLOW =     0x00000010, //0x3F421000-0x3F423000, RW
+    MEMPROT_PERI2_RTCSLOW_0 =   0x00000020, //0x50001000-0x50003000, RWX
+    MEMPROT_PERI2_RTCSLOW_1 =   0x00000040, //0x60002000-0x60004000, RWX
+    MEMPROT_ALL =               0xFFFFFFFF
+} mem_type_prot_t;
+
+
+/**
+ * @brief Returns splitting address for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Splitting address for the memory region required.
+ * The address is given by region-specific global symbol exported from linker script,
+ * it is not read out from related configuration register.
+ */
+uint32_t *IRAM_ATTR esp_memprot_get_split_addr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Initializes illegal memory access control (MMU) for required memory section.
+ *
+ * All memory access interrupts share ETS_MEMACCESS_ERR_INUM input channel, it is caller's
+ * responsibility to properly detect actual intr. source as well as possible prioritization in case
+ * of multiple source reported during one intr.handling routine run
+ *
+ *  @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+void esp_memprot_intr_init(mem_type_prot_t mem_type);
+
+/**
+ * @brief Enable/disable the memory protection interrupt
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param enable enable/disable
+ */
+void esp_memprot_intr_ena(mem_type_prot_t mem_type, bool enable);
+
+/**
+ * @brief Sets a request for clearing interrupt-on flag for specified memory region (register write)
+ *
+ * @note When called without actual interrupt-on flag set, subsequent occurrence of related interrupt is ignored.
+ * Should be used only after the real interrupt appears, typically as the last step in interrupt handler's routine.
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+void esp_memprot_clear_intr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Detects which memory protection interrupt is active
+ *
+ * @note Check order
+ *          MEMPROT_IRAM0_SRAM
+ *          MEMPROT_IRAM0_RTCFAST
+ *          MEMPROT_DRAM0_SRAM
+ *          MEMPROT_DRAM0_RTCFAST
+ *
+ * @return Memory protection area type (see mem_type_prot_t enum)
+ */
+mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
+
+/**
+ * @brief Gets interrupt status register contents for specified memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Contents of status register
+ */
+uint32_t esp_memprot_get_fault_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Get details of given interrupt status
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param faulting_address Faulting address causing the interrupt [out]
+ * @param op_type Operation being processed at the faulting address [out]
+ *               IRAM0: 0 - read, 1 - write
+ *               DRAM0: 0 - read, 1 - write
+ * @param op_subtype Additional info for op_type [out]
+ *               IRAM0: 0 - instruction segment access, 1 - data segment access
+ *               DRAM0: 0 - non-atomic operation, 1 - atomic operation
+ */
+void IRAM_ATTR esp_memprot_get_fault_status(mem_type_prot_t mem_type, uint32_t **faulting_address, uint32_t *op_type, uint32_t *op_subtype);
+
+/**
+ * @brief Gets string representation of required memory region identifier
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return mem_type as string
+ */
+const char *IRAM_ATTR esp_memprot_type_to_str(mem_type_prot_t mem_type);
+
+/**
+ * @brief Detects whether any of the interrupt locks is active (requires digital system reset to unlock)
+ *
+ * @return true/false
+ */
+bool esp_memprot_is_locked_any(void);
+
+/**
+ * @brief Sets lock for specified memory region.
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets lock status for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets permission control configuration register contents for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Permission control register contents
+ */
+uint32_t esp_memprot_get_conf_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt permission settings for unified management block
+ *
+ * Gets interrupt permission settings register contents for required memory region, returns settings for unified management blocks
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Permission settings register contents
+ */
+uint32_t esp_memprot_get_perm_uni_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt permission settings for split management block
+ *
+ * Gets interrupt permission settings register contents for required memory region, returns settings for split management blocks
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Permission settings register contents
+ */
+uint32_t esp_memprot_get_perm_split_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Detects whether any of the memory protection interrupts is enabled
+ *
+ * @return true/false
+ */
+bool esp_memprot_is_intr_ena_any(void);
+
+/**
+ * @brief Gets interrupt-enabled flag for given memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Interrupt-enabled value
+ */
+uint32_t esp_memprot_get_intr_ena_bit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt-active flag for given memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Interrupt-active value
+ */
+uint32_t esp_memprot_get_intr_on_bit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt-clear request flag for given memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Interrupt-clear request value
+ */
+uint32_t esp_memprot_get_intr_clr_bit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets read permission value for specified block and memory region
+ *
+ * Returns read permission bit value for required unified-management block (0-3) in given memory region.
+ * Applicable to all memory types.
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ *
+ * @return Read permission value for required block
+ */
+uint32_t esp_memprot_get_uni_block_read_bit(mem_type_prot_t mem_type, uint32_t block);
+
+/**
+ * @brief Gets write permission value for specified block and memory region
+ *
+ * Returns write permission bit value for required unified-management block (0-3) in given memory region.
+ * Applicable to all memory types.
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ *
+ * @return Write permission value for required block
+ */
+uint32_t esp_memprot_get_uni_block_write_bit(mem_type_prot_t mem_type, uint32_t block);
+
+/**
+ * @brief Gets execute permission value for specified block and memory region
+ *
+ * Returns execute permission bit value for required unified-management block (0-3) in given memory region.
+ * Applicable only to IRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ *
+ * @return Execute permission value for required block
+ */
+uint32_t esp_memprot_get_uni_block_exec_bit(mem_type_prot_t mem_type, uint32_t block);
+
+/**
+ * @brief Sets permissions for specified block in DRAM region
+ *
+ * Sets Read and Write permission for specified unified-management block (0-3) in given memory region.
+ * Applicable only to DRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ * @param write_perm Write permission flag
+ * @param read_perm Read permission flag
+ */
+void esp_memprot_set_uni_block_perm_dram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm);
+
+/**
+ * @brief Sets permissions for high and low memory segment in DRAM region
+ *
+ * Sets Read and Write permission for both low and high memory segments given by splitting address.
+ * The splitting address must be equal to or higher then beginning of block 5
+ * Applicable only to DRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_set_prot_dram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
+
+/**
+ * @brief Sets permissions for specified block in IRAM region
+ *
+ * Sets Read, Write and Execute permission for specified unified-management block (0-3) in given memory region.
+ * Applicable only to IRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ * @param write_perm Write permission flag
+ * @param exec_perm Execute permission flag
+ */
+void esp_memprot_set_uni_block_perm_iram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm, bool exec_perm);
+
+/**
+ * @brief Sets permissions for high and low memory segment in IRAM region
+ *
+ * Sets Read, Write and Execute permission for both low and high memory segments given by splitting address.
+ * The splitting address must be equal to or higher then beginning of block 5
+ * Applicable only to IRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_set_prot_iram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
+
+/**
+ * @brief Activates memory protection for all supported memory region types
+ *
+ * @note The feature is disabled when JTAG interface is connected
+ *
+ * @param invoke_panic_handler map mem.prot interrupt to ETS_MEMACCESS_ERR_INUM and thus invokes panic handler when fired ('true' not suitable for testing)
+ * @param lock_feature sets LOCK bit, see esp_memprot_set_lock() ('true' not suitable for testing)
+ * @param mem_type_mask holds a set of required memory protection types (bitmask built of mem_type_prot_t). NULL means default (MEMPROT_ALL in this version)
+ */
+void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
+
+/**
+ * @brief Get permission settings bits for IRAM0 split mgmt. Only IRAM0 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_get_perm_split_bits_iram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+
+/**
+ * @brief Get permission settings bits for DRAM0 split mgmt. Only DRAM0 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_get_perm_split_bits_dram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
+
+/**
+ * @brief Sets permissions for high and low memory segment in PERIBUS1 region
+ *
+ * Sets Read and Write permission for both low and high memory segments given by splitting address.
+ * Applicable only to PERIBUS1 memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_set_prot_peri1(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
+
+/**
+ * @brief Get permission settings bits for PERIBUS1 split mgmt. Only PERIBUS1 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_get_perm_split_bits_peri1(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
+
+/**
+ * @brief Get permission settings bits for PERIBUS2 split mgmt. Only PERIBUS2 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_get_perm_split_bits_peri2(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+
+/**
+ * @brief Sets permissions for high and low memory segment in PERIBUS2 region
+ *
+ * Sets Read Write permission for both low and high memory segments given by splitting address.
+ * Applicable only to PERIBUS2 memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_set_prot_peri2(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
+
+/**
+ * @brief Get permissions for specified memory type. Irrelevant bits are ignored
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_get_permissions(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+
+/**
+ * @brief Get Read permission settings for low and high regions of given memory type
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Read permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_get_perm_read(mem_type_prot_t mem_type, bool *lr, bool *hr);
+
+/**
+ * @brief Get Write permission settings for low and high regions of given memory type
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Write permission flag
+ * @param hr High segment Write permission flag
+ */
+void esp_memprot_get_perm_write(mem_type_prot_t mem_type, bool *lw, bool *hw);
+
+/**
+ * @brief Get Execute permission settings for low and high regions of given memory type
+ * Applicable only to IBUS-compatible memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Exec permission flag
+ * @param hr High segment Exec permission flag
+ */
+void esp_memprot_get_perm_exec(mem_type_prot_t mem_type, bool *lx, bool *hx);
+
+/**
+ * @brief Returns the lowest address in required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+uint32_t esp_memprot_get_low_limit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns the highest address in required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+uint32_t esp_memprot_get_high_limit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Sets READ permission bit for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Read permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_set_read_perm(mem_type_prot_t mem_type, bool lr, bool hr);
+
+/**
+ * @brief Sets WRITE permission bit for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Write permission flag
+ * @param hr High segment Write permission flag
+ */
+void esp_memprot_set_write_perm(mem_type_prot_t mem_type, bool lw, bool hw);
+
+/**
+ * @brief Sets EXECUTE permission bit for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Exec permission flag
+ * @param hr High segment Exec permission flag
+ */
+void esp_memprot_set_exec_perm(mem_type_prot_t mem_type, bool lx, bool hx);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/rtc.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/rtc.h
new file mode 100644
index 00000000..296292e2
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/rtc.h
@@ -0,0 +1,39 @@
+// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp32s2/rtc.h
+ *
+ * This file contains declarations of rtc related functions.
+ */
+
+/**
+ * @brief Get current value of RTC counter in microseconds
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter in microseconds
+ */
+uint64_t esp_rtc_get_time_us(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp32s2/include/esp_spiram.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/spiram.h
similarity index 62%
rename from tools/sdk/esp32s2/include/esp32s2/include/esp_spiram.h
rename to tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/spiram.h
index b02335d6..cc2b4c85 100644
--- a/tools/sdk/esp32s2/include/esp32s2/include/esp_spiram.h
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s2/spiram.h
@@ -18,6 +18,7 @@
 
 #include <stddef.h>
 #include <stdint.h>
+#include <stdbool.h>
 #include "esp_err.h"
 
 #ifdef __cplusplus
@@ -78,6 +79,66 @@ size_t esp_spiram_get_size(void);
 void esp_spiram_writeback_cache(void);
 
 
+
+/**
+ * @brief Reserve a pool of internal memory for specific DMA/internal allocations
+ *
+ * @param size Size of reserved pool in bytes
+ *
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NO_MEM when no memory available for pool
+ */
+esp_err_t esp_spiram_reserve_dma_pool(size_t size);
+
+#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS
+
+extern int _instruction_reserved_start, _instruction_reserved_end;
+
+/**
+ * @brief Get the start page number of the instruction in SPI flash
+ *
+ * @return start page number
+ */
+uint32_t instruction_flash_start_page_get(void);
+/**
+ * @brief Get the end page number of the instruction in SPI flash
+ *
+ * @return end page number
+ */
+uint32_t instruction_flash_end_page_get(void);
+/**
+ * @brief Get the offset of instruction from SPI flash to SPI RAM
+ *
+ * @return instruction offset
+ */
+int instruction_flash2spiram_offset(void);
+#endif
+
+#if CONFIG_SPIRAM_RODATA
+
+extern int _rodata_reserved_start, _rodata_reserved_end;
+
+/**
+ * @brief Get the start page number of the rodata in SPI flash
+ *
+ * @return start page number
+ */
+uint32_t rodata_flash_start_page_get(void);
+/**
+ * @brief Get the end page number of the rodata in SPI flash
+ *
+ * @return end page number
+ */
+uint32_t rodata_flash_end_page_get(void);
+/**
+ * @brief Get the offset number of rodata from SPI flash to SPI RAM
+ *
+ * @return rodata offset
+ */
+int rodata_flash2spiram_offset(void);
+#endif
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/dport_access.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/dport_access.h
new file mode 100644
index 00000000..f3f7007a
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/dport_access.h
@@ -0,0 +1,42 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_DPORT_ACCESS_H_
+#define _ESP_DPORT_ACCESS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Read a sequence of DPORT registers to the buffer.
+ *
+ * @param[out] buff_out  Contains the read data.
+ * @param[in]  address   Initial address for reading registers.
+ * @param[in]  num_words The number of words.
+ */
+void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
+
+#define DPORT_STALL_OTHER_CPU_START()
+#define DPORT_STALL_OTHER_CPU_END()
+#define DPORT_INTERRUPT_DISABLE()
+#define DPORT_INTERRUPT_RESTORE()
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_DPORT_ACCESS_H_ */
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/esp_crypto_lock.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/esp_crypto_lock.h
new file mode 100644
index 00000000..781ac077
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/esp_crypto_lock.h
@@ -0,0 +1,53 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * This API should be used by all components which use the SHA, AES, HMAC and DS crypto hardware on the ESP32S3.
+ * Not all of them can be used in parallel because they use the same underlying module.
+ * E.g., HMAC uses SHA or DS uses HMAC and AES. See the ESP32S3 Technical Reference Manual for more details.
+ *
+ * Other unrelated components must not use it.
+ */
+
+/**
+ * @brief Acquire lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_acquire(void);
+
+/**
+ * @brief Release lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_release(void);
+
+/**
+ * Acquire lock for the MPI/RSA cryptography peripheral
+ */
+void esp_crypto_mpi_lock_acquire(void);
+
+/**
+ * Release lock for the MPI/RSA cryptography peripheral
+ */
+void esp_crypto_mpi_lock_release(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/memprot.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/memprot.h
new file mode 100644
index 00000000..7e47a8cf
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/memprot.h
@@ -0,0 +1,492 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/* INTERNAL API
+ * generic interface to MMU memory protection features
+ */
+
+#pragma once
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_attr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    MEMPROT_NONE =              0x00000000,
+    MEMPROT_IRAM0_SRAM =        0x00000001,
+    MEMPROT_DRAM0_SRAM =        0x00000002,
+    MEMPROT_IRAM0_RTCFAST =     0x00000004,
+    MEMPROT_DRAM0_RTCFAST =     0x00000008,
+    MEMPROT_PERI1_RTCSLOW =     0x00000010,
+    MEMPROT_PERI2_RTCSLOW_0 =   0x00000020,
+    MEMPROT_PERI2_RTCSLOW_1 =   0x00000040,
+    MEMPROT_ALL =               0xFFFFFFFF
+} mem_type_prot_t;
+
+
+/**
+ * @brief Returns splitting address for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Splitting address for the memory region required.
+ * The address is given by region-specific global symbol exported from linker script,
+ * it is not read out from related configuration register.
+ */
+uint32_t *IRAM_ATTR esp_memprot_get_split_addr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Initializes illegal memory access control (MMU) for required memory section.
+ *
+ * All memory access interrupts share ETS_MEMACCESS_ERR_INUM input channel, it is caller's
+ * responsibility to properly detect actual intr. source as well as possible prioritization in case
+ * of multiple source reported during one intr.handling routine run
+ *
+ *  @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+void esp_memprot_intr_init(mem_type_prot_t mem_type);
+
+/**
+ * @brief Enable/disable the memory protection interrupt
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param enable enable/disable
+ */
+void esp_memprot_intr_ena(mem_type_prot_t mem_type, bool enable);
+
+/**
+ * @brief Sets a request for clearing interrupt-on flag for specified memory region (register write)
+ *
+ * @note When called without actual interrupt-on flag set, subsequent occurrence of related interrupt is ignored.
+ * Should be used only after the real interrupt appears, typically as the last step in interrupt handler's routine.
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+void esp_memprot_clear_intr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Detects which memory protection interrupt is active
+ *
+ * @note Check order
+ *          MEMPROT_IRAM0_SRAM
+ *          MEMPROT_IRAM0_RTCFAST
+ *          MEMPROT_DRAM0_SRAM
+ *          MEMPROT_DRAM0_RTCFAST
+ *
+ * @return Memory protection area type (see mem_type_prot_t enum)
+ */
+mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
+
+/**
+ * @brief Gets interrupt status register contents for specified memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Contents of status register
+ */
+uint32_t esp_memprot_get_fault_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Get details of given interrupt status
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param faulting_address Faulting address causing the interrupt [out]
+ * @param op_type Operation being processed at the faulting address [out]
+ *               IRAM0: 0 - read, 1 - write
+ *               DRAM0: 0 - read, 1 - write
+ * @param op_subtype Additional info for op_type [out]
+ *               IRAM0: 0 - instruction segment access, 1 - data segment access
+ *               DRAM0: 0 - non-atomic operation, 1 - atomic operation
+ */
+void IRAM_ATTR esp_memprot_get_fault_status(mem_type_prot_t mem_type, uint32_t **faulting_address, uint32_t *op_type, uint32_t *op_subtype);
+
+/**
+ * @brief Gets string representation of required memory region identifier
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return mem_type as string
+ */
+const char *IRAM_ATTR esp_memprot_type_to_str(mem_type_prot_t mem_type);
+
+/**
+ * @brief Detects whether any of the interrupt locks is active (requires digital system reset to unlock)
+ *
+ * @return true/false
+ */
+bool esp_memprot_is_locked_any(void);
+
+/**
+ * @brief Sets lock for specified memory region.
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets lock status for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets permission control configuration register contents for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Permission control register contents
+ */
+uint32_t esp_memprot_get_conf_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt permission settings for unified management block
+ *
+ * Gets interrupt permission settings register contents for required memory region, returns settings for unified management blocks
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Permission settings register contents
+ */
+uint32_t esp_memprot_get_perm_uni_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt permission settings for split management block
+ *
+ * Gets interrupt permission settings register contents for required memory region, returns settings for split management blocks
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Permission settings register contents
+ */
+uint32_t esp_memprot_get_perm_split_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Detects whether any of the memory protection interrupts is enabled
+ *
+ * @return true/false
+ */
+bool esp_memprot_is_intr_ena_any(void);
+
+/**
+ * @brief Gets interrupt-enabled flag for given memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Interrupt-enabled value
+ */
+uint32_t esp_memprot_get_intr_ena_bit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt-active flag for given memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Interrupt-active value
+ */
+uint32_t esp_memprot_get_intr_on_bit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt-clear request flag for given memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Interrupt-clear request value
+ */
+uint32_t esp_memprot_get_intr_clr_bit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets read permission value for specified block and memory region
+ *
+ * Returns read permission bit value for required unified-management block (0-3) in given memory region.
+ * Applicable to all memory types.
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ *
+ * @return Read permission value for required block
+ */
+uint32_t esp_memprot_get_uni_block_read_bit(mem_type_prot_t mem_type, uint32_t block);
+
+/**
+ * @brief Gets write permission value for specified block and memory region
+ *
+ * Returns write permission bit value for required unified-management block (0-3) in given memory region.
+ * Applicable to all memory types.
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ *
+ * @return Write permission value for required block
+ */
+uint32_t esp_memprot_get_uni_block_write_bit(mem_type_prot_t mem_type, uint32_t block);
+
+/**
+ * @brief Gets execute permission value for specified block and memory region
+ *
+ * Returns execute permission bit value for required unified-management block (0-3) in given memory region.
+ * Applicable only to IRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ *
+ * @return Execute permission value for required block
+ */
+uint32_t esp_memprot_get_uni_block_exec_bit(mem_type_prot_t mem_type, uint32_t block);
+
+/**
+ * @brief Sets permissions for specified block in DRAM region
+ *
+ * Sets Read and Write permission for specified unified-management block (0-3) in given memory region.
+ * Applicable only to DRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ * @param write_perm Write permission flag
+ * @param read_perm Read permission flag
+ */
+void esp_memprot_set_uni_block_perm_dram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm);
+
+/**
+ * @brief Sets permissions for high and low memory segment in DRAM region
+ *
+ * Sets Read and Write permission for both low and high memory segments given by splitting address.
+ * The splitting address must be equal to or higher then beginning of block 5
+ * Applicable only to DRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_set_prot_dram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
+
+/**
+ * @brief Sets permissions for specified block in IRAM region
+ *
+ * Sets Read, Write and Execute permission for specified unified-management block (0-3) in given memory region.
+ * Applicable only to IRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ * @param write_perm Write permission flag
+ * @param exec_perm Execute permission flag
+ */
+void esp_memprot_set_uni_block_perm_iram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm, bool exec_perm);
+
+/**
+ * @brief Sets permissions for high and low memory segment in IRAM region
+ *
+ * Sets Read, Write and Execute permission for both low and high memory segments given by splitting address.
+ * The splitting address must be equal to or higher then beginning of block 5
+ * Applicable only to IRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_set_prot_iram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
+
+/**
+ * @brief Activates memory protection for all supported memory region types
+ *
+ * @note The feature is disabled when JTAG interface is connected
+ *
+ * @param invoke_panic_handler map mem.prot interrupt to ETS_MEMACCESS_ERR_INUM and thus invokes panic handler when fired ('true' not suitable for testing)
+ * @param lock_feature sets LOCK bit, see esp_memprot_set_lock() ('true' not suitable for testing)
+ * @param mem_type_mask holds a set of required memory protection types (bitmask built of mem_type_prot_t). NULL means default (MEMPROT_ALL in this version)
+ */
+void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
+
+/**
+ * @brief Get permission settings bits for IRAM0 split mgmt. Only IRAM0 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_get_perm_split_bits_iram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+
+/**
+ * @brief Get permission settings bits for DRAM0 split mgmt. Only DRAM0 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_get_perm_split_bits_dram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
+
+/**
+ * @brief Sets permissions for high and low memory segment in PERIBUS1 region
+ *
+ * Sets Read and Write permission for both low and high memory segments given by splitting address.
+ * Applicable only to PERIBUS1 memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_set_prot_peri1(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
+
+/**
+ * @brief Get permission settings bits for PERIBUS1 split mgmt. Only PERIBUS1 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_get_perm_split_bits_peri1(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
+
+/**
+ * @brief Get permission settings bits for PERIBUS2 split mgmt. Only PERIBUS2 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_get_perm_split_bits_peri2(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+
+/**
+ * @brief Sets permissions for high and low memory segment in PERIBUS2 region
+ *
+ * Sets Read Write permission for both low and high memory segments given by splitting address.
+ * Applicable only to PERIBUS2 memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_set_prot_peri2(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
+
+/**
+ * @brief Get permissions for specified memory type. Irrelevant bits are ignored
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_get_permissions(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+
+/**
+ * @brief Get Read permission settings for low and high regions of given memory type
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Read permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_get_perm_read(mem_type_prot_t mem_type, bool *lr, bool *hr);
+
+/**
+ * @brief Get Write permission settings for low and high regions of given memory type
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Write permission flag
+ * @param hr High segment Write permission flag
+ */
+void esp_memprot_get_perm_write(mem_type_prot_t mem_type, bool *lw, bool *hw);
+
+/**
+ * @brief Get Execute permission settings for low and high regions of given memory type
+ * Applicable only to IBUS-compatible memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Exec permission flag
+ * @param hr High segment Exec permission flag
+ */
+void esp_memprot_get_perm_exec(mem_type_prot_t mem_type, bool *lx, bool *hx);
+
+/**
+ * @brief Returns the lowest address in required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+uint32_t esp_memprot_get_low_limit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns the highest address in required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+uint32_t esp_memprot_get_high_limit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Sets READ permission bit for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Read permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_set_read_perm(mem_type_prot_t mem_type, bool lr, bool hr);
+
+/**
+ * @brief Sets WRITE permission bit for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Write permission flag
+ * @param hr High segment Write permission flag
+ */
+void esp_memprot_set_write_perm(mem_type_prot_t mem_type, bool lw, bool hw);
+
+/**
+ * @brief Sets EXECUTE permission bit for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Exec permission flag
+ * @param hr High segment Exec permission flag
+ */
+void esp_memprot_set_exec_perm(mem_type_prot_t mem_type, bool lx, bool hx);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/rtc.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/rtc.h
new file mode 100644
index 00000000..296292e2
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/rtc.h
@@ -0,0 +1,39 @@
+// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp32s2/rtc.h
+ *
+ * This file contains declarations of rtc related functions.
+ */
+
+/**
+ * @brief Get current value of RTC counter in microseconds
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter in microseconds
+ */
+uint64_t esp_rtc_get_time_us(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/spiram.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/spiram.h
new file mode 100644
index 00000000..105a6054
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp32s3/spiram.h
@@ -0,0 +1,146 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef __ESP_SPIRAM_H
+#define __ESP_SPIRAM_H
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Initialize spiram interface/hardware. Normally called from cpu_start.c.
+ *
+ * @return ESP_OK on success
+ */
+esp_err_t esp_spiram_init(void);
+
+/**
+ * @brief Configure Cache/MMU for access to external SPI RAM.
+ *
+ * Normally this function is called from cpu_start, if CONFIG_SPIRAM_BOOT_INIT
+ * option is enabled. Applications which need to enable SPI RAM at run time
+ * can disable CONFIG_SPIRAM_BOOT_INIT, and call this function later.
+ *
+ * @attention this function must be called with flash cache disabled.
+ */
+void esp_spiram_init_cache(void);
+
+
+/**
+ * @brief Memory test for SPI RAM. Should be called after SPI RAM is initialized and
+ * (in case of a dual-core system) the app CPU is online. This test overwrites the
+ * memory with crap, so do not call after e.g. the heap allocator has stored important
+ * stuff in SPI RAM.
+ *
+ * @return true on success, false on failed memory test
+ */
+bool esp_spiram_test(void);
+
+
+/**
+ * @brief Add the initialized SPI RAM to the heap allocator.
+ */
+esp_err_t esp_spiram_add_to_heapalloc(void);
+
+
+/**
+ * @brief Get the size of the attached SPI RAM chip selected in menuconfig
+ *
+ * @return Size in bytes, or 0 if no external RAM chip support compiled in.
+ */
+size_t esp_spiram_get_size(void);
+
+
+/**
+ * @brief Force a writeback of the data in the SPI RAM cache. This is to be called whenever
+ * cache is disabled, because disabling cache on the ESP32 discards the data in the SPI
+ * RAM cache.
+ *
+ * This is meant for use from within the SPI flash code.
+ */
+void esp_spiram_writeback_cache(void);
+
+
+
+/**
+ * @brief Reserve a pool of internal memory for specific DMA/internal allocations
+ *
+ * @param size Size of reserved pool in bytes
+ *
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NO_MEM when no memory available for pool
+ */
+esp_err_t esp_spiram_reserve_dma_pool(size_t size);
+
+#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS
+
+extern int _instruction_reserved_start, _instruction_reserved_end;
+
+/**
+ * @brief Get the start page number of the instruction in SPI flash
+ *
+ * @return start page number
+ */
+uint32_t instruction_flash_start_page_get(void);
+/**
+ * @brief Get the end page number of the instruction in SPI flash
+ *
+ * @return end page number
+ */
+uint32_t instruction_flash_end_page_get(void);
+/**
+ * @brief Get the offset of instruction from SPI flash to SPI RAM
+ *
+ * @return instruction offset
+ */
+int instruction_flash2spiram_offset(void);
+#endif
+
+#if CONFIG_SPIRAM_RODATA
+
+extern int _rodata_reserved_start, _rodata_reserved_end;
+
+/**
+ * @brief Get the start page number of the rodata in SPI flash
+ *
+ * @return start page number
+ */
+uint32_t rodata_flash_start_page_get(void);
+/**
+ * @brief Get the end page number of the rodata in SPI flash
+ *
+ * @return end page number
+ */
+uint32_t rodata_flash_end_page_get(void);
+/**
+ * @brief Get the offset number of rodata from SPI flash to SPI RAM
+ *
+ * @return rodata offset
+ */
+int rodata_flash2spiram_offset(void);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp_himem.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp_himem.h
new file mode 100644
index 00000000..c3ac9f52
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp_himem.h
@@ -0,0 +1,2 @@
+#warning esp_himem.h has been replaced by esp32/himem.h, please include esp32/himem.h instead
+#include "esp32/himem.h"
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp_spiram.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp_spiram.h
new file mode 100644
index 00000000..eabd6b6b
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/esp_spiram.h
@@ -0,0 +1,2 @@
+#warning esp_spiram.h has been replaced by esp32/spiram.h, please include esp32/spiram.h instead
+#include "esp32/spiram.h"
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/spinlock.h b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/spinlock.h
index 5370642a..66baa930 100644
--- a/tools/sdk/esp32c3/include/esp_hw_support/include/soc/spinlock.h
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/soc/spinlock.h
@@ -18,7 +18,6 @@
 #include "sdkconfig.h"
 #include "soc/cpu.h"
 #include "hal/cpu_hal.h"
-#include "soc/soc_memory_layout.h"
 #include "soc/compare_set.h"
 
 #if __XTENSA__
diff --git a/tools/sdk/esp32c3/include/esp_rom/include/esp32/rom/rtc.h b/tools/sdk/esp32c3/include/esp_rom/include/esp32/rom/rtc.h
index 79ad9b0a..2be040aa 100644
--- a/tools/sdk/esp32c3/include/esp_rom/include/esp32/rom/rtc.h
+++ b/tools/sdk/esp32c3/include/esp_rom/include/esp32/rom/rtc.h
@@ -22,6 +22,7 @@
 
 #include "soc/soc.h"
 #include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -98,6 +99,19 @@ typedef enum {
     RTCWDT_RTC_RESET       = 16     /**<16, RTC Watch dog reset digital core and rtc module*/
 } RESET_REASON;
 
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)SW_RESET == RESET_REASON_CORE_SW, "SW_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TGWDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TGWDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)SW_CPU_RESET == RESET_REASON_CPU0_SW, "SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+
 typedef enum {
     NO_SLEEP        = 0,
     EXT_EVENT0_TRIG = BIT0,
diff --git a/tools/sdk/esp32c3/include/esp_rom/include/esp32c3/rom/rtc.h b/tools/sdk/esp32c3/include/esp_rom/include/esp32c3/rom/rtc.h
index fcbfddc1..76ece7e8 100644
--- a/tools/sdk/esp32c3/include/esp_rom/include/esp32c3/rom/rtc.h
+++ b/tools/sdk/esp32c3/include/esp_rom/include/esp32c3/rom/rtc.h
@@ -22,6 +22,7 @@
 
 #include "soc/soc.h"
 #include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -99,6 +100,20 @@ typedef enum {
     SUPER_WDT_RESET        = 18,    /**<11, super watchdog reset digital core and rtc module*/
 } RESET_REASON;
 
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
+
 typedef enum {
     NO_SLEEP        = 0,
     EXT_EVENT0_TRIG = BIT0,
diff --git a/tools/sdk/esp32c3/include/esp_rom/include/esp32h2/rom/rtc.h b/tools/sdk/esp32c3/include/esp_rom/include/esp32h2/rom/rtc.h
index fcbfddc1..76ece7e8 100644
--- a/tools/sdk/esp32c3/include/esp_rom/include/esp32h2/rom/rtc.h
+++ b/tools/sdk/esp32c3/include/esp_rom/include/esp32h2/rom/rtc.h
@@ -22,6 +22,7 @@
 
 #include "soc/soc.h"
 #include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -99,6 +100,20 @@ typedef enum {
     SUPER_WDT_RESET        = 18,    /**<11, super watchdog reset digital core and rtc module*/
 } RESET_REASON;
 
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
+
 typedef enum {
     NO_SLEEP        = 0,
     EXT_EVENT0_TRIG = BIT0,
diff --git a/tools/sdk/esp32c3/include/esp_rom/include/esp32s2/rom/rtc.h b/tools/sdk/esp32c3/include/esp_rom/include/esp32s2/rom/rtc.h
index 509b6fd4..d46e5d7b 100644
--- a/tools/sdk/esp32c3/include/esp_rom/include/esp32s2/rom/rtc.h
+++ b/tools/sdk/esp32c3/include/esp_rom/include/esp32s2/rom/rtc.h
@@ -22,6 +22,7 @@
 
 #include "soc/soc.h"
 #include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -98,6 +99,21 @@ typedef enum {
     GLITCH_RTC_RESET       = 19,    /**<19, glitch reset digital core and rtc module*/
 } RESET_REASON;
 
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
+_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
+
 typedef enum {
     NO_SLEEP        = 0,
     EXT_EVENT0_TRIG = BIT0,
diff --git a/tools/sdk/esp32c3/include/esp_rom/include/esp32s3/rom/rtc.h b/tools/sdk/esp32c3/include/esp_rom/include/esp32s3/rom/rtc.h
index c1a31a38..09d2376e 100644
--- a/tools/sdk/esp32c3/include/esp_rom/include/esp32s3/rom/rtc.h
+++ b/tools/sdk/esp32c3/include/esp_rom/include/esp32s3/rom/rtc.h
@@ -17,6 +17,7 @@
 #include <stdbool.h>
 #include <stdint.h>
 #include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -93,6 +94,22 @@ typedef enum {
     EFUSE_RESET            = 20,    /**<20, efuse reset digital core*/
 } RESET_REASON;
 
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
+_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
+_Static_assert((soc_reset_reason_t)EFUSE_RESET == RESET_REASON_CORE_EFUSE_CRC, "EFUSE_RESET != RESET_REASON_CORE_EFUSE_CRC");
+
 typedef enum {
     NO_SLEEP        = 0,
     EXT_EVENT0_TRIG = BIT0,
diff --git a/tools/sdk/esp32c3/include/esp_rom/include/esp_rom_sys.h b/tools/sdk/esp32c3/include/esp_rom/include/esp_rom_sys.h
index a5b01ade..9bf73ade 100644
--- a/tools/sdk/esp32c3/include/esp_rom/include/esp_rom_sys.h
+++ b/tools/sdk/esp32c3/include/esp_rom/include/esp_rom_sys.h
@@ -14,12 +14,13 @@
 
 #pragma once
 
+#include <stdint.h>
+#include "soc/reset_reasons.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include <stdint.h>
-
 /**
  * @brief Print formated string to console device
  * @note float and long long data are not supported!
@@ -51,6 +52,14 @@ void esp_rom_install_channel_putc(int channel, void (*putc)(char c));
  */
 void esp_rom_install_uart_printf(void);
 
+/**
+ * @brief Get reset reason of CPU
+ *
+ * @param cpu_no CPU number
+ * @return Reset reason code (see in soc/reset_reasons.h)
+ */
+soc_reset_reason_t esp_rom_get_reset_reason(int cpu_no);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/include/esp_system/include/eh_frame_parser.h b/tools/sdk/esp32c3/include/esp_system/include/eh_frame_parser.h
new file mode 100644
index 00000000..f99f63bb
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_system/include/eh_frame_parser.h
@@ -0,0 +1,35 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef EH_FRAME_PARSER_H
+#define EH_FRAME_PARSER_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Print backtrace for the given execution frame.
+ *
+ * @param frame_or Snapshot of the CPU registers when the program stopped its
+ *                 normal execution. This frame is usually generated on the
+ *                 stack when an exception or an interrupt occurs.
+ */
+void esp_eh_frame_print_backtrace(const void *frame_or);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_system/port/include/riscv/eh_frame_parser_impl.h b/tools/sdk/esp32c3/include/esp_system/port/include/riscv/eh_frame_parser_impl.h
new file mode 100644
index 00000000..14e3e655
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_system/port/include/riscv/eh_frame_parser_impl.h
@@ -0,0 +1,65 @@
+
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/**
+ * @file DWARF Exception Frames parser header
+ *
+ * This file describes the frame types for RISC-V, required for
+ * parsing `eh_frame` and `eh_frame_hdr`.
+ *
+ */
+
+#ifndef EH_FRAME_PARSER_IMPL_H
+#define EH_FRAME_PARSER_IMPL_H
+
+#include "riscv/rvruntime-frames.h"
+
+/**
+ * @brief Define the Executionframe as RvExcFrame for this implementation.
+ */
+typedef RvExcFrame ExecutionFrame;
+
+/**
+ * @brief Number of registers in the ExecutionFrame structure.
+ *
+ * This will be used to define and initialize the DWARF machine state.
+ * In practice, we only have 16 registers that are callee saved, thus, we could
+ * only save them and ignore the rest. However, code to calculate mapping of
+ * CPU registers to DWARF registers would take more than the 16 registers we
+ * would save... so save all registers.
+ */
+#define EXECUTION_FRAME_MAX_REGS   (32)
+
+/**
+ * @brief Reference the PC register of the execution frame.
+ */
+#define EXECUTION_FRAME_PC(frame)   ((frame).mepc)
+
+/**
+ * @brief Reference the SP register of the execution frame.
+ */
+#define EXECUTION_FRAME_SP(frame)   ((frame).sp)
+
+/**
+ * @brief Index of SP register in the execution frame.
+ */
+#define EXECUTION_FRAME_SP_REG      (offsetof(RvExcFrame, sp)/sizeof(uint32_t))
+
+/**
+ * @brief Get register i of the execution frame.
+ */
+#define EXECUTION_FRAME_REG(frame, i) (((uint32_t*) (frame))[(i)])
+
+#endif // _EH_FRAME_PARSER_IMPL_H
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/memprot_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/memprot_ll.h
index 367dfc1b..ef3f15f9 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/memprot_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/memprot_ll.h
@@ -42,6 +42,18 @@ extern "C" {
 #define I_D_SPLIT_LINE_SHIFT        0x9
 #define I_D_FAULT_ADDR_SHIFT        0x2
 
+typedef union {
+    struct {
+        uint32_t cat0       : 2;
+        uint32_t cat1       : 2;
+        uint32_t cat2       : 2;
+        uint32_t res0       : 8;
+        uint32_t splitaddr  : 8;
+        uint32_t res1       : 10;
+    };
+    uint32_t val;
+} constrain_reg_fields_t;
+
 static inline void memprot_ll_set_iram0_dram0_split_line_lock(void)
 {
     REG_WRITE(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_0_REG, 1);
@@ -54,9 +66,21 @@ static inline bool memprot_ll_get_iram0_dram0_split_line_lock(void)
 
 static inline void* memprot_ll_get_split_addr_from_reg(uint32_t regval, uint32_t base)
 {
-    return (void*)
-        (base + ((regval & SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_SPLITADDR_M)
-        >> (SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SRAM_SPLITADDR_S - I_D_SPLIT_LINE_SHIFT)));
+    constrain_reg_fields_t reg_val;
+    reg_val.val = regval;
+
+    uint32_t off = reg_val.splitaddr << 9;
+
+    if (reg_val.cat0 == 0x1 || reg_val.cat0 == 0x2) {
+        return (void *)(base + off);
+    } else if (reg_val.cat1 == 0x1 || reg_val.cat1 == 0x2) {
+        return (void *)(base + I_D_SRAM_SEGMENT_SIZE + off);
+    } else if (reg_val.cat2 == 0x1 || reg_val.cat2 == 0x2) {
+        return (void *)(base + (2 * I_D_SRAM_SEGMENT_SIZE) + off);
+    } else {
+        /* Either the register was not configured at all or incorrectly configured */
+        return NULL;
+    }
 }
 
 /* ******************************************************************************************************
@@ -382,22 +406,22 @@ static inline void memprot_ll_set_dram0_split_line(const void *line_addr, uint32
 
 static inline void memprot_ll_set_dram0_split_line_D_0(const void *line_addr)
 {
-    memprot_ll_set_dram0_split_line(line_addr, SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_2_REG);
+    memprot_ll_set_dram0_split_line(line_addr, SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_4_REG);
 }
 
 static inline void memprot_ll_set_dram0_split_line_D_1(const void *line_addr)
 {
-    memprot_ll_set_dram0_split_line(line_addr, SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_3_REG);
+    memprot_ll_set_dram0_split_line(line_addr, SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_5_REG);
 }
 
 static inline void* memprot_ll_get_dram0_split_line_D_0(void)
 {
-    return memprot_ll_get_split_addr_from_reg(REG_READ(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_2_REG), SOC_DIRAM_DRAM_LOW);
+    return memprot_ll_get_split_addr_from_reg(REG_READ(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_4_REG), SOC_DIRAM_DRAM_LOW);
 }
 
 static inline void* memprot_ll_get_dram0_split_line_D_1(void)
 {
-    return memprot_ll_get_split_addr_from_reg(REG_READ(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_3_REG), SOC_DIRAM_DRAM_LOW);
+    return memprot_ll_get_split_addr_from_reg(REG_READ(SENSITIVE_CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_5_REG), SOC_DIRAM_DRAM_LOW);
 }
 
 
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/spi_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/spi_ll.h
index dbaecbbe..8d2c1079 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/spi_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/spi_ll.h
@@ -136,6 +136,8 @@ static inline void spi_ll_slave_init(spi_dev_t *hw)
     hw->user.usr_miso_highpart = 0;
     hw->user.usr_mosi_highpart = 0;
 
+    // Configure DMA In-Link to not be terminated when transaction bit counter exceeds
+    hw->dma_conf.rx_eof_en = 0;
     hw->dma_conf.dma_seg_trans_en = 0;
 
     //Disable unneeded ints
@@ -584,7 +586,6 @@ static inline void spi_ll_master_set_io_mode(spi_dev_t *hw, spi_ll_io_mode_t io_
 static inline void spi_ll_slave_set_seg_mode(spi_dev_t *hw, bool seg_trans)
 {
     hw->dma_conf.dma_seg_trans_en = seg_trans;
-    hw->dma_conf.rx_eof_en = seg_trans;
 }
 
 /**
@@ -603,6 +604,16 @@ static inline void spi_ll_master_select_cs(spi_dev_t *hw, int cs_id)
     hw->misc.cs5_dis = (cs_id == 5) ? 0 : 1;
 }
 
+/**
+ * Keep Chip Select activated after the current transaction.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param keep_active if 0 don't keep CS activated, else keep CS activated
+ */
+static inline void spi_ll_master_keep_cs(spi_dev_t *hw, int keep_active) {
+    hw->misc.cs_keep_active = (keep_active != 0) ? 1 : 0;
+}
+
 /*------------------------------------------------------------------------------
  * Configs: parameters
  *----------------------------------------------------------------------------*/
@@ -819,7 +830,7 @@ static inline void spi_ll_set_miso_bitlen(spi_dev_t *hw, size_t bitlen)
  */
 static inline void spi_ll_slave_set_rx_bitlen(spi_dev_t *hw, size_t bitlen)
 {
-    spi_ll_set_mosi_bitlen(hw, bitlen);
+    //This is not used in esp32c3
 }
 
 /**
@@ -830,7 +841,7 @@ static inline void spi_ll_slave_set_rx_bitlen(spi_dev_t *hw, size_t bitlen)
  */
 static inline void spi_ll_slave_set_tx_bitlen(spi_dev_t *hw, size_t bitlen)
 {
-    spi_ll_set_mosi_bitlen(hw, bitlen);
+    //This is not used in esp32c3
 }
 
 /**
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/uart_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/uart_ll.h
index 237dcb9e..64f2f40b 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/uart_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/uart_ll.h
@@ -58,9 +58,8 @@ typedef enum {
     UART_INTR_CMD_CHAR_DET     = (0x1 << 18),
 } uart_intr_t;
 
-static inline void uart_ll_reset_core(uart_dev_t *hw) {
-    hw->clk_conf.rst_core = 1;
-    hw->clk_conf.rst_core = 0;
+static inline void uart_ll_set_reset_core(uart_dev_t *hw, bool core_rst_en) {
+    hw->clk_conf.rst_core = core_rst_en;
 }
 
 static inline void uart_ll_sclk_enable(uart_dev_t *hw) {
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/adc_types.h b/tools/sdk/esp32c3/include/hal/include/hal/adc_types.h
index bf71cb43..c0f6661f 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/adc_types.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/adc_types.h
@@ -133,7 +133,7 @@ typedef struct {
 -                                         2: 11 bit;
 -                                         3: 12 bit. */
             int8_t channel:   4;   /*!< ADC channel index. */
-#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+#elif CONFIG_IDF_TARGET_ESP32S2
             uint8_t reserved:  2;   /*!< reserved0 */
             uint8_t channel:   4;   /*!< ADC channel index. */
 #elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
@@ -295,7 +295,7 @@ typedef struct {
 #endif
 } adc_digi_config_t;
 
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+#if CONFIG_IDF_TARGET_ESP32S2
 /**
  * @brief ADC digital controller (DMA mode) interrupt type options.
  */
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/dma_types.h b/tools/sdk/esp32c3/include/hal/include/hal/dma_types.h
index 7583bf6f..66c8677e 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/dma_types.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/dma_types.h
@@ -14,12 +14,12 @@
 
 #pragma once
 
+#include <stdint.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include <stdint.h>
-
 /**
  * @brief Type of DMA descriptor
  *
@@ -43,3 +43,7 @@ _Static_assert(sizeof(dma_descriptor_t) == 12, "dma_descriptor_t should occupy 1
 #define DMA_DESCRIPTOR_BUFFER_OWNER_CPU (0)   /*!< DMA buffer is allowed to be accessed by CPU */
 #define DMA_DESCRIPTOR_BUFFER_OWNER_DMA (1)   /*!< DMA buffer is allowed to be accessed by DMA engine */
 #define DMA_DESCRIPTOR_BUFFER_MAX_SIZE (4095) /*!< Maximum size of the buffer that can be attached to descriptor */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/eth_types.h b/tools/sdk/esp32c3/include/hal/include/hal/eth_types.h
index 72494845..21961895 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/eth_types.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/eth_types.h
@@ -24,8 +24,8 @@
 *
 */
 typedef enum {
-    EMAC_INTERFACE_MII,     /*!< Media Independent Interface */
-    EMAC_INTERFACE_RMII     /*!< Reduced Media Independent Interface */
+    EMAC_DATA_INTERFACE_RMII,    /*!< Reduced Media Independent Interface */
+    EMAC_DATA_INTERFACE_MII,     /*!< Media Independent Interface */
 } eth_data_interface_t;
 
 /**
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/i2c_hal.h b/tools/sdk/esp32c3/include/hal/include/hal/i2c_hal.h
index ae1c95be..b255878c 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/i2c_hal.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/i2c_hal.h
@@ -110,6 +110,16 @@ typedef struct {
  */
 #define i2c_hal_slave_clr_rx_it(hal)    i2c_ll_slave_clr_rx_it((hal)->dev)
 
+/**
+ * @brief  Set the source clock. This function is meant to be used in
+ *         slave mode, in order to select a source clock abe to handle
+ *         the expected SCL frequency.
+ *
+ * @param  hal Context of the HAL layer
+ * @param  src_clk Source clock to use choosen from `i2c_sclk_t` type
+ */
+#define i2c_hal_set_source_clk(hal, src_clk) i2c_ll_set_source_clk((hal)->dev, src_clk)
+
 /**
  * @brief  Init the I2C master.
  *
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/sha_types.h b/tools/sdk/esp32c3/include/hal/include/hal/sha_types.h
index 275ca60c..547124b5 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/sha_types.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/sha_types.h
@@ -19,25 +19,26 @@
 /* Use enum from rom for backwards compatibility */
 #if CONFIG_IDF_TARGET_ESP32
 #include "esp32/rom/sha.h"
-typedef enum SHA_TYPE esp_sha_type;
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/sha.h"
-typedef SHA_TYPE esp_sha_type;
 #elif CONFIG_IDF_TARGET_ESP32S3
 #include "esp32s3/rom/sha.h"
-typedef SHA_TYPE esp_sha_type;
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/sha.h"
-typedef SHA_TYPE esp_sha_type;
 #elif CONFIG_IDF_TARGET_ESP32H2
 #include "esp32h2/rom/sha.h"
-typedef SHA_TYPE esp_sha_type;
 #endif
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+/* Use enum from rom for backwards compatibility */
+#if CONFIG_IDF_TARGET_ESP32
+typedef enum SHA_TYPE esp_sha_type;
+#else
+typedef SHA_TYPE esp_sha_type;
+#endif
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/spi_flash_hal.h b/tools/sdk/esp32c3/include/hal/include/hal/spi_flash_hal.h
index 6690b9c6..dbbb5ff5 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/spi_flash_hal.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/spi_flash_hal.h
@@ -25,7 +25,7 @@
 #include "hal/spi_flash_ll.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
-#include "soc/soc_memory_layout.h"
+#include "soc/soc_memory_types.h"
 
 /* Hardware host-specific constants */
 #define SPI_FLASH_HAL_MAX_WRITE_BYTES 64
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/spi_hal.h b/tools/sdk/esp32c3/include/hal/include/hal/spi_hal.h
index 1c4dc3a0..b37c7c92 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/spi_hal.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/spi_hal.h
@@ -101,6 +101,7 @@ typedef struct {
     uint8_t *send_buffer;               ///< Data to be sent
     uint8_t *rcv_buffer;                ///< Buffer to hold the receive data.
     spi_ll_io_mode_t io_mode;           ///< IO mode of the master
+    int cs_keep_active;                 ///< Keep CS active after transaction
 } spi_hal_trans_config_t;
 
 /**
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/twai_types.h b/tools/sdk/esp32c3/include/hal/include/hal/twai_types.h
index 5c51dba6..f4d5ef52 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/twai_types.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/twai_types.h
@@ -61,9 +61,9 @@ extern "C" {
  * @note The available bit rates are dependent on the chip target and revision.
  */
 #if (SOC_TWAI_BRP_MAX > 256)
-#define TWAI_TIMING_CONFIG_1KBITS()     {.brp = 4000, .tseg_1 = 15, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
-#define TWAI_TIMING_CONFIG_5KBITS()     {.brp = 800, .tseg_1 = 15, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
-#define TWAI_TIMING_CONFIG_10KBITS()    {.brp = 400, .tseg_1 = 15, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_1KBITS()     {.brp = 4000, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_5KBITS()     {.brp = 800, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_10KBITS()    {.brp = 400, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
 #endif
 #if (SOC_TWAI_BRP_MAX > 128) || (CONFIG_ESP32_REV_MIN >= 2)
 #define TWAI_TIMING_CONFIG_12_5KBITS()  {.brp = 256, .tseg_1 = 16, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/uart_hal.h b/tools/sdk/esp32c3/include/hal/include/hal/uart_hal.h
index d236431d..f7b94888 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/uart_hal.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/uart_hal.h
@@ -124,6 +124,16 @@ typedef struct {
  */
 #define uart_hal_is_tx_idle(hal)  uart_ll_is_tx_idle((hal)->dev)
 
+/**
+ * @brief  Configure the UART core reset
+ *
+ * @param  hal Context of the HAL layer
+ * @param  Set true to enable the core reset, otherwise set it false
+ *
+ * @return None
+ */
+#define uart_hal_set_reset_core(hal, core_rst_en)  uart_ll_set_reset_core((hal)->dev, core_rst_en)
+
 /**
  * @brief  Read data from the UART rxfifo
  *
diff --git a/tools/sdk/esp32c3/include/heap/include/heap_memory_layout.h b/tools/sdk/esp32c3/include/heap/include/heap_memory_layout.h
new file mode 100644
index 00000000..5ad5ad85
--- /dev/null
+++ b/tools/sdk/esp32c3/include/heap/include/heap_memory_layout.h
@@ -0,0 +1,113 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "sdkconfig.h"
+
+#define SOC_MEMORY_TYPE_NO_PRIOS 3
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Type descriptor holds a description for a particular type of memory on a particular SoC.
+ */
+typedef struct {
+    const char *name;  ///< Name of this memory type
+    uint32_t caps[SOC_MEMORY_TYPE_NO_PRIOS]; ///< Capabilities for this memory type (as a prioritised set)
+    bool aliased_iram;   ///< If true, this is data memory that is is also mapped in IRAM
+    bool startup_stack; ///< If true, memory of this type is used for ROM stack during startup
+} soc_memory_type_desc_t;
+
+/* Constant table of tag descriptors for all this SoC's tags */
+extern const soc_memory_type_desc_t soc_memory_types[];
+extern const size_t soc_memory_type_count;
+
+/* Region descriptor holds a description for a particular region of memory on a particular SoC.
+ */
+typedef struct {
+    intptr_t start;  ///< Start address of the region
+    size_t size;            ///< Size of the region in bytes
+    size_t type;             ///< Type of the region (index into soc_memory_types array)
+    intptr_t iram_address; ///< If non-zero, is equivalent address in IRAM
+} soc_memory_region_t;
+
+extern const soc_memory_region_t soc_memory_regions[];
+extern const size_t soc_memory_region_count;
+
+/* Region descriptor holds a description for a particular region of
+   memory reserved on this SoC for a particular use (ie not available
+   for stack/heap usage.) */
+typedef struct {
+    intptr_t start;
+    intptr_t end;
+} soc_reserved_region_t;
+
+/* Use this macro to reserved a fixed region of RAM (hardcoded addresses)
+ * for a particular purpose.
+ *
+ * Usually used to mark out memory addresses needed for hardware or ROM code
+ * purposes.
+ *
+ * Don't call this macro from user code which can use normal C static allocation
+ * instead.
+ *
+ * @param START Start address to be reserved.
+ * @param END One after the address of the last byte to be reserved. (ie length of
+ * the reserved region is (END - START) in bytes.
+ * @param NAME Name for the reserved region. Must be a valid variable name,
+ * unique to this source file.
+ */
+#define SOC_RESERVE_MEMORY_REGION(START, END, NAME)     \
+    __attribute__((section(".reserved_memory_address"))) __attribute__((used)) \
+    static soc_reserved_region_t reserved_region_##NAME = { START, END };
+
+/* Return available memory regions for this SoC. Each available memory
+ * region is a contiguous piece of memory which is not being used by
+ * static data, used by ROM code, or reserved by a component using
+ * the SOC_RESERVE_MEMORY_REGION() macro.
+ *
+ * This result is soc_memory_regions[] minus all regions reserved
+ * via the SOC_RESERVE_MEMORY_REGION() macro (which may also split
+ * some regions up.)
+ *
+ * At startup, all available memory returned by this function is
+ * registered as heap space.
+ *
+ * @note OS-level startup function only, not recommended to call from
+ * app code.
+ *
+ * @param regions Pointer to an array for reading available regions into.
+ * Size of the array should be at least the result of
+ * soc_get_available_memory_region_max_count(). Entries in the array
+ * will be ordered by memory address.
+ *
+ * @return Number of entries copied to 'regions'. Will be no greater than
+ * the result of soc_get_available_memory_region_max_count().
+ */
+size_t soc_get_available_memory_regions(soc_memory_region_t *regions);
+
+/* Return the maximum number of available memory regions which could be
+ * returned by soc_get_available_memory_regions(). Used to size the
+ * array passed to that function.
+ */
+size_t soc_get_available_memory_region_max_count(void);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/heap/include/soc/soc_memory_layout.h b/tools/sdk/esp32c3/include/heap/include/soc/soc_memory_layout.h
new file mode 100644
index 00000000..189cf602
--- /dev/null
+++ b/tools/sdk/esp32c3/include/heap/include/soc/soc_memory_layout.h
@@ -0,0 +1,21 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/**
+ * Compatibility header file.
+ */
+#pragma once
+
+#include "heap_memory_layout.h"
+#include "soc/soc_memory_types.h"
diff --git a/tools/sdk/esp32c3/include/idf_test/include/esp32/idf_performance_target.h b/tools/sdk/esp32c3/include/idf_test/include/esp32/idf_performance_target.h
index f9f0c414..5700d9f3 100644
--- a/tools/sdk/esp32c3/include/idf_test/include/esp32/idf_performance_target.h
+++ b/tools/sdk/esp32c3/include/idf_test/include/esp32/idf_performance_target.h
@@ -98,7 +98,8 @@
 #endif
 
 #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  73500
+//Collect data and correct it later
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  0
 #endif
 #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
 #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  (261*1000)
diff --git a/tools/sdk/esp32c3/include/ieee802154/include/esp_ieee802154.h b/tools/sdk/esp32c3/include/ieee802154/include/esp_ieee802154.h
new file mode 100644
index 00000000..a8d4678e
--- /dev/null
+++ b/tools/sdk/esp32c3/include/ieee802154/include/esp_ieee802154.h
@@ -0,0 +1,367 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_ieee802154_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief  Initialize the IEEE 802.15.4 subsystem.
+ *
+ */
+void esp_ieee802154_enable(void);
+
+/**
+ * @brief  Deinitialize the IEEE 802.15.4 subsystem.
+ *
+ */
+void esp_ieee802154_disable(void);
+
+/**
+ * @brief  Get the operational channel.
+ *
+ * @return The channel number (11~26).
+ *
+ */
+uint8_t esp_ieee802154_get_channel(void);
+
+/**
+ * @brief  Set the operational channel.
+ *
+ * @param[in]  channel  The channel number (11-26).
+ *
+ */
+void esp_ieee802154_set_channnel(uint8_t channel);
+
+/**
+ * @brief  Get the transmit power.
+ *
+ * @return The transmit power in dBm.
+ *
+ */
+int8_t esp_ieee802154_get_txpower(void);
+
+/**
+ * @brief  Set the transmit power.
+ *
+ * @param[in]  power  The transmit power in dBm.
+ *
+ */
+void esp_ieee802154_set_txpower(int8_t power);
+
+/**
+ * @brief  Get the promiscuous mode.
+ *
+ * @return
+ *      - True   The promiscuous mode is enabled.
+ *      - False  The promiscuous mode is disabled.
+ *
+ */
+bool esp_ieee802154_get_promiscuous(void);
+
+/**
+ * @brief  Set the promiscuous mode.
+ *
+ * @param[in]  enable  The promiscuous mode to be set.
+ *
+ */
+void esp_ieee802154_set_promiscuous(bool enable);
+
+/**
+ * @brief  Get the IEEE 802.15.4 Radio state.
+ *
+ * @return  The IEEE 802.15.4 Radio state, refer to esp_ieee802154_state_t.
+ *
+ */
+esp_ieee802154_state_t esp_ieee802154_get_state(void);
+
+/**
+ * @brief  Set the IEEE 802.15.4 Radio to sleep state.
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_FAIL on failure due to invalid state.
+ *
+ */
+esp_err_t esp_ieee802154_sleep(void);
+
+/**
+ * @brief  Set the IEEE 802.15.4 Radio to receive state.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_FAIL on failure due to invalid state.
+ *
+ * Note: Radio will continue receiving until it receives a valid frame.
+ *       Ref to esp_ieee802154_receive_done().
+ *
+ */
+esp_err_t esp_ieee802154_receive(void);
+
+/**
+ * @brief  Transmit the given frame.
+ *
+ * @param[in]  frame  The pointer to the frame, the frame format:
+ *                    |-----------------------------------------------------------------------|
+ *                    | Len | MHR |              MAC Payload                          |  FCS  |
+ *                    |-----------------------------------------------------------------------|
+ * @param[in]  cca    Perform CCA before transmission if it's true, otherwise transmit the frame directly.
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_FAIL on failure due to invalid state.
+ *
+ * Note: The transmit result will be reported via esp_ieee802154_transmit_done()
+ *       or esp_ieee802154_transmit_failed().
+ *
+ */
+esp_err_t esp_ieee802154_transmit(const uint8_t *frame, bool cca);
+
+/**
+ * @brief  Set the time to wait for the ack frame.
+ *
+ * @param[in]  timeout  The time to wait for the ack frame, in symbol unit (16 us).
+ *                      Default: 0x006C, Range: 0x0000 - 0xFFFF.
+ *
+ */
+void esp_ieee802154_set_ack_timeout(uint32_t timeout);
+
+/**
+ * @brief  Get the device PAN ID.
+ *
+ * @return  The device PAN ID.
+ *
+ */
+uint16_t esp_ieee802154_get_panid(void);
+
+/**
+ * @brief  Set the device PAN ID.
+ *
+ * @param[in]  panid  The device PAN ID.
+ *
+ */
+void esp_ieee802154_set_panid(uint16_t panid);
+
+/**
+ * @brief  Get the device short address.
+ *
+ * @return  The device short address.
+ *
+ */
+uint16_t esp_ieee802154_get_short_address(void);
+
+/**
+ * @brief  Set the device short address.
+ *
+ * @param[in]  short_address  The device short address.
+ *
+ */
+void esp_ieee802154_set_short_address(uint16_t short_address);
+
+/**
+ * @brief  Get the device extended address.
+ *
+ * @param[out]  ext_addr  The pointer to the device extended address.
+ *
+ */
+void esp_ieee802154_get_extended_address(uint8_t *ext_addr);
+
+/**
+ * @brief  Set the device extended address.
+ *
+ * @param[in]  ext_addr  The pointer to the device extended address.
+ *
+ */
+void esp_ieee802154_set_extended_address(const uint8_t *ext_addr);
+
+/**
+ * @brief  Get the auto frame pending mode.
+ *
+ * @return  The auto frame pending mode, refer to esp_ieee802154_pending_mode_t.
+ *
+ */
+esp_ieee802154_pending_mode_t esp_ieee802154_get_pending_mode(void);
+
+/**
+ * @brief  Set the auto frame pending mode.
+ *
+ * @param[in]  pending_mode  The auto frame pending mode, refer to esp_ieee802154_pending_mode_t.
+ *
+ */
+void esp_ieee802154_set_pending_mode(esp_ieee802154_pending_mode_t pending_mode);
+
+/**
+ * @brief  Add address to the source matching table.
+ *
+ * @param[in]  addr      The pointer to the address.
+ * @param[in]  is_short  Short address or Extended address.
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_ERR_NO_MEM if the pending table is full.
+ *
+ */
+esp_err_t esp_ieee802154_add_pending_addr(const uint8_t *addr, bool is_short);
+
+/**
+ * @brief  Remove address from the source matching table.
+ *
+ * @param[in]  addr      The pointer to the address.
+ * @param[in]  is_short  Short address or Extended address.
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_ERR_NOT_FOUND if the address was not found from the source matching table.
+ *
+ */
+esp_err_t esp_ieee802154_clear_pending_addr(const uint8_t *addr, bool is_short);
+
+/**
+ * @brief  Clear the source matching table to empty.
+ *
+ * @param[in]  is_short  Clear Short address table or Extended address table.
+ *
+ */
+void esp_ieee802154_reset_pending_table(bool is_short);
+
+/**
+ * @brief  Get the CCA threshold.
+ *
+ * @return  The CCA threshold in dBm.
+ *
+ */
+int8_t esp_ieee802154_get_cca_threshold(void);
+
+/**
+ * @brief  Set the CCA threshold.
+ *
+ * @param[in]  cca_threshold  The CCA threshold in dBm.
+ *
+ */
+void esp_ieee802154_set_cca_threshold(int8_t cca_threshold);
+
+/**
+ * @brief  Get the CCA mode.
+ *
+ * @return  The CCA mode, refer to esp_ieee802154_cca_mode_t.
+ *
+ */
+esp_ieee802154_cca_mode_t esp_ieee802154_get_cca_mode(void);
+
+/**
+ * @brief  Set the CCA mode.
+ *
+ * @param[in]  cca_mode  The CCA mode, refer to esp_ieee802154_cca_mode_t.
+ *
+ */
+void esp_ieee802154_set_cca_mode(esp_ieee802154_cca_mode_t cca_mode);
+
+/**
+ * @brief  Enable rx_on_when_idle mode, radio will receive during idle.
+ *
+ * @param[in]  enable  Enable/Disable rx_on_when_idle mode.
+ *
+ */
+void esp_ieee802154_set_rx_when_idle(bool enable);
+
+/**
+ * @brief  Get the rx_on_when_idle mode.
+ *
+ * @return  rx_on_when_idle mode.
+ *
+ */
+bool esp_ieee802154_get_rx_when_idle(void);
+
+/**
+ * @brief  Perform energy detection.
+ *
+ * @param[in]  duration  The duration of energy detection, in symbol unit (16 us).
+ *                       The result will be reported via esp_ieee802154_energy_detect_done().
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_FAIL on failure due to invalid state.
+ *
+ */
+esp_err_t esp_ieee802154_energy_detect(uint32_t duration);
+
+
+/** Below are the events generated by IEEE 802.15.4 subsystem, which are in ISR context **/
+/**
+ * @brief  A Frame was received.
+ *
+ * @param[in]  frame  The point to the received frame, frame format:
+ *                    |-----------------------------------------------------------------------|
+ *                    | Len | MHR |              MAC Payload                       (no FCS)   |
+ *                    |-----------------------------------------------------------------------|
+ * @param[in]  frame_info  More information of the received frame, refer to esp_ieee802154_frame_info_t.
+ *
+ */
+extern void esp_ieee802154_receive_done(uint8_t *frame, esp_ieee802154_frame_info_t *frame_info);
+
+/**
+ * @brief  The SFD field of the frame was received.
+ *
+ */
+extern void esp_ieee802154_receive_sfd_done(void);
+
+/**
+ * @brief  The Frame Transmission succeeded.
+ *
+ * @param[in]  frame           The pointer to the transmitted frame.
+ * @param[in]  ack             The received ACK frame, it could be NULL if the transmitted frame's AR bit is not set.
+ * @param[in]  ack_frame_info  More information of the ACK frame, refer to esp_ieee802154_frame_info_t.
+ *
+ * Note: refer to esp_ieee802154_transmit().
+ *
+ */
+extern void esp_ieee802154_transmit_done(const uint8_t *frame, const uint8_t *ack, esp_ieee802154_frame_info_t *ack_frame_info);
+
+/**
+ * @brief  The Frame Transmission failed.
+ *
+ * @param[in]  frame  The pointer to the frame.
+ * @param[in]  error  The transmission failure reason, refer to esp_ieee802154_tx_error_t.
+ *
+ * Note: refer to esp_ieee802154_transmit().
+ *
+ */
+extern void esp_ieee802154_transmit_failed(const uint8_t *frame, esp_ieee802154_tx_error_t error);
+
+/**
+ * @brief  The SFD field of the frame was transmitted.
+ *
+ */
+extern void esp_ieee802154_transmit_sfd_done(uint8_t *frame);
+
+/**
+ * @brief  The energy detection done.
+ *
+ * @param[in]  power  The detected power level, in dBm.
+ *
+ * Note: refer to esp_ieee802154_energy_detect().
+ *
+ */
+extern void esp_ieee802154_energy_detect_done(int8_t power);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/ieee802154/include/esp_ieee802154_types.h b/tools/sdk/esp32c3/include/ieee802154/include/esp_ieee802154_types.h
new file mode 100644
index 00000000..6979991c
--- /dev/null
+++ b/tools/sdk/esp32c3/include/ieee802154/include/esp_ieee802154_types.h
@@ -0,0 +1,79 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief The radio state types.
+ */
+typedef enum {
+    ESP_IEEE802154_RADIO_DISABLE,   /*!< Radio not up */
+    ESP_IEEE802154_RADIO_SLEEP,     /*!< Radio in the sleep state */
+    ESP_IEEE802154_RADIO_RECEIVE,   /*!< Radio in the receive state */
+    ESP_IEEE802154_RADIO_TRANSMIT,  /*!< Radio in the transmit state */
+} esp_ieee802154_state_t;
+
+/**
+ * @brief The transmit error types.
+ */
+typedef enum {
+    ESP_IEEE802154_TX_ERR_NONE,         /*!< No transmit error */
+    ESP_IEEE802154_TX_ERR_CCA_BUSY,     /*!< Channel is busy */
+    ESP_IEEE802154_TX_ERR_ABORT,        /*!< Transmit abort */
+    ESP_IEEE802154_TX_ERR_NO_ACK,       /*!< No Ack frame received until timeout */
+    ESP_IEEE802154_TX_ERR_INVALID_ACK,  /*!< Invalid Ack frame */
+    ESP_IEEE802154_TX_ERR_COEXIST,      /*!< Rejected by coexist system */
+} esp_ieee802154_tx_error_t;
+
+/**
+ * @brief The CCA mode types.
+ */
+typedef enum {
+    ESP_IEEE802154_CCA_MODE_CARRIER,         /*!< Carrier only */
+    ESP_IEEE802154_CCA_MODE_ED,              /*!< Energy Detect only */
+    ESP_IEEE802154_CCA_MODE_CARRIER_OR_ED,   /*!< Carrier or Energy Detect */
+    ESP_IEEE802154_CCA_MODE_CARRIER_AND_ED,  /*!< Carrier and Energy Detect */
+} esp_ieee802154_cca_mode_t;
+
+/**
+ * @brief The frame pending mode types.
+ */
+typedef enum {
+    ESP_IEEE802154_AUTO_PENDING_DISABLE,   /*!< Frame pending bit always set to 1 in the ack to Data Request */
+    ESP_IEEE802154_AUTO_PENDING_ENABLE,    /*!< Frame pending bit set to 1 if src address matches, in the ack to Data Request */
+    ESP_IEEE802154_AUTO_PENDING_ENHANCED,  /*!< Frame pending bit set to 1 if src address matches, in all ack frames */
+} esp_ieee802154_pending_mode_t;
+
+/**
+ * @brief The information of received 15.4 frame.
+ *
+ */
+typedef struct {
+    bool pending;                /*!< The frame was acked with frame pending set */
+    uint8_t channel;             /*!< Channel */
+    int8_t rssi;                 /*!< RSSI */
+    uint8_t lqi;                 /*!< LQI */
+    uint64_t timestamp;          /*!< The timestamp when the frame's SFD field was received */
+} esp_ieee802154_frame_info_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/log/include/esp_log.h b/tools/sdk/esp32c3/include/log/include/esp_log.h
index 6fb4476d..cf7bcd60 100644
--- a/tools/sdk/esp32c3/include/log/include/esp_log.h
+++ b/tools/sdk/esp32c3/include/log/include/esp_log.h
@@ -295,6 +295,26 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 /** @endcond */
 
 /// macro to output logs in startup code, before heap allocator and syscalls have been initialized. log at ``ESP_LOG_ERROR`` level. @see ``printf``,``ESP_LOGE``,``ESP_DRAM_LOGE``
+#define portGET_ARGUMENT_COUNT_INNER(zero, one, count, ...) count
+
+/**
+ * In the future, we want to switch to C++20. We also want to become compatible with clang.
+ * Hence, we provide two versions of the following macros which are using variadic arguments.
+ * The first one is using the GNU extension \#\#__VA_ARGS__. The second one is using the C++20 feature __VA_OPT__(,).
+ * This allows users to compile their code with standard C++20 enabled instead of the GNU extension.
+ * Below C++20, we haven't found any good alternative to using \#\#__VA_ARGS__.
+ */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_EARLY_LOGE( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_ERROR,   E __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_WARN`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGW( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_WARN,    W __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_INFO`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGI( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_INFO,    I __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_DEBUG`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGD( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_DEBUG,   D __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGV( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_VERBOSE, V __VA_OPT__(,) __VA_ARGS__)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #define ESP_EARLY_LOGE( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_ERROR,   E, ##__VA_ARGS__)
 /// macro to output logs in startup code at ``ESP_LOG_WARN`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
 #define ESP_EARLY_LOGW( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_WARN,    W, ##__VA_ARGS__)
@@ -304,6 +324,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 #define ESP_EARLY_LOGD( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_DEBUG,   D, ##__VA_ARGS__)
 /// macro to output logs in startup code at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
 #define ESP_EARLY_LOGV( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_VERBOSE, V, ##__VA_ARGS__)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 
 #ifdef BOOTLOADER_BUILD
 #define _ESP_LOG_EARLY_ENABLED(log_level) (LOG_LOCAL_LEVEL >= (log_level))
@@ -319,12 +340,21 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
         }} while(0)
 
 #ifndef BOOTLOADER_BUILD
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_LOGE( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_ERROR,   tag, format __VA_OPT__(,) __VA_ARGS__)
+#define ESP_LOGW( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_WARN,    tag, format __VA_OPT__(,) __VA_ARGS__)
+#define ESP_LOGI( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_INFO,    tag, format __VA_OPT__(,) __VA_ARGS__)
+#define ESP_LOGD( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_DEBUG,   tag, format __VA_OPT__(,) __VA_ARGS__)
+#define ESP_LOGV( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_VERBOSE, tag, format __VA_OPT__(,) __VA_ARGS__)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #define ESP_LOGE( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_ERROR,   tag, format, ##__VA_ARGS__)
 #define ESP_LOGW( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_WARN,    tag, format, ##__VA_ARGS__)
 #define ESP_LOGI( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_INFO,    tag, format, ##__VA_ARGS__)
 #define ESP_LOGD( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_DEBUG,   tag, format, ##__VA_ARGS__)
 #define ESP_LOGV( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_VERBOSE, tag, format, ##__VA_ARGS__)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #else
+
 /**
  * Macro to output logs at ESP_LOG_ERROR level.
  *
@@ -334,6 +364,17 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
  *
  * @see ``printf``
  */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_LOGE( tag, format, ... )  ESP_EARLY_LOGE(tag, format __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_WARN`` level.  @see ``ESP_LOGE``
+#define ESP_LOGW( tag, format, ... )  ESP_EARLY_LOGW(tag, format __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_INFO`` level.  @see ``ESP_LOGE``
+#define ESP_LOGI( tag, format, ... )  ESP_EARLY_LOGI(tag, format __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_DEBUG`` level.  @see ``ESP_LOGE``
+#define ESP_LOGD( tag, format, ... )  ESP_EARLY_LOGD(tag, format __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_LOGE``
+#define ESP_LOGV( tag, format, ... )  ESP_EARLY_LOGV(tag, format __VA_OPT__(,) __VA_ARGS__)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #define ESP_LOGE( tag, format, ... )  ESP_EARLY_LOGE(tag, format, ##__VA_ARGS__)
 /// macro to output logs at ``ESP_LOG_WARN`` level.  @see ``ESP_LOGE``
 #define ESP_LOGW( tag, format, ... )  ESP_EARLY_LOGW(tag, format, ##__VA_ARGS__)
@@ -343,6 +384,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 #define ESP_LOGD( tag, format, ... )  ESP_EARLY_LOGD(tag, format, ##__VA_ARGS__)
 /// macro to output logs at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_LOGE``
 #define ESP_LOGV( tag, format, ... )  ESP_EARLY_LOGV(tag, format, ##__VA_ARGS__)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #endif  // BOOTLOADER_BUILD
 
 /** runtime macro to output logs at a specified level.
@@ -354,6 +396,25 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
  *
  * @see ``printf``
  */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#if CONFIG_LOG_TIMESTAMP_SOURCE_RTOS
+#define ESP_LOG_LEVEL(level, tag, format, ...) do {                     \
+        if (level==ESP_LOG_ERROR )          { esp_log_write(ESP_LOG_ERROR,      tag, LOG_FORMAT(E, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_WARN )      { esp_log_write(ESP_LOG_WARN,       tag, LOG_FORMAT(W, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_DEBUG )     { esp_log_write(ESP_LOG_DEBUG,      tag, LOG_FORMAT(D, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_VERBOSE )   { esp_log_write(ESP_LOG_VERBOSE,    tag, LOG_FORMAT(V, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else                                { esp_log_write(ESP_LOG_INFO,       tag, LOG_FORMAT(I, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+    } while(0)
+#elif CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM
+#define ESP_LOG_LEVEL(level, tag, format, ...) do {                     \
+        if (level==ESP_LOG_ERROR )          { esp_log_write(ESP_LOG_ERROR,      tag, LOG_SYSTEM_TIME_FORMAT(E, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_WARN )      { esp_log_write(ESP_LOG_WARN,       tag, LOG_SYSTEM_TIME_FORMAT(W, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_DEBUG )     { esp_log_write(ESP_LOG_DEBUG,      tag, LOG_SYSTEM_TIME_FORMAT(D, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_VERBOSE )   { esp_log_write(ESP_LOG_VERBOSE,    tag, LOG_SYSTEM_TIME_FORMAT(V, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else                                { esp_log_write(ESP_LOG_INFO,       tag, LOG_SYSTEM_TIME_FORMAT(I, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+    } while(0)
+#endif //CONFIG_LOG_TIMESTAMP_SOURCE_xxx
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #if CONFIG_LOG_TIMESTAMP_SOURCE_RTOS
 #define ESP_LOG_LEVEL(level, tag, format, ...) do {                     \
         if (level==ESP_LOG_ERROR )          { esp_log_write(ESP_LOG_ERROR,      tag, LOG_FORMAT(E, format), esp_log_timestamp(), tag, ##__VA_ARGS__); } \
@@ -371,6 +432,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
         else                                { esp_log_write(ESP_LOG_INFO,       tag, LOG_SYSTEM_TIME_FORMAT(I, format), esp_log_system_timestamp(), tag, ##__VA_ARGS__); } \
     } while(0)
 #endif //CONFIG_LOG_TIMESTAMP_SOURCE_xxx
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 
 /** runtime macro to output logs at a specified level. Also check the level with ``LOG_LOCAL_LEVEL``.
  *
@@ -397,6 +459,17 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
  *
  * @see ``esp_rom_printf``,``ESP_LOGE``
  */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_DRAM_LOGE( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_ERROR,   E __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_WARN`` level.  @see ``ESP_DRAM_LOGW``,``ESP_LOGW``, ``esp_rom_printf``
+#define ESP_DRAM_LOGW( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_WARN,    W __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_INFO`` level.  @see ``ESP_DRAM_LOGI``,``ESP_LOGI``, ``esp_rom_printf``
+#define ESP_DRAM_LOGI( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_INFO,    I __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_DEBUG`` level.  @see ``ESP_DRAM_LOGD``,``ESP_LOGD``, ``esp_rom_printf``
+#define ESP_DRAM_LOGD( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_DEBUG,   D __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_DRAM_LOGV``,``ESP_LOGV``, ``esp_rom_printf``
+#define ESP_DRAM_LOGV( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_VERBOSE, V __VA_OPT__(,) __VA_ARGS__)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #define ESP_DRAM_LOGE( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_ERROR,   E, ##__VA_ARGS__)
 /// macro to output logs when the cache is disabled at ``ESP_LOG_WARN`` level.  @see ``ESP_DRAM_LOGW``,``ESP_LOGW``, ``esp_rom_printf``
 #define ESP_DRAM_LOGW( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_WARN,    W, ##__VA_ARGS__)
@@ -406,14 +479,22 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 #define ESP_DRAM_LOGD( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_DEBUG,   D, ##__VA_ARGS__)
 /// macro to output logs when the cache is disabled at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_DRAM_LOGV``,``ESP_LOGV``, ``esp_rom_printf``
 #define ESP_DRAM_LOGV( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_VERBOSE, V, ##__VA_ARGS__)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 
 /** @cond */
 #define _ESP_LOG_DRAM_LOG_FORMAT(letter, format)  DRAM_STR(#letter " %s: " format "\n")
 
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_DRAM_LOG_IMPL(tag, format, log_level, log_tag_letter, ...) do {                                  \
+        if (_ESP_LOG_EARLY_ENABLED(log_level)) {                                                             \
+            esp_rom_printf(_ESP_LOG_DRAM_LOG_FORMAT(log_tag_letter, format), tag __VA_OPT__(,) __VA_ARGS__); \
+        }} while(0)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #define ESP_DRAM_LOG_IMPL(tag, format, log_level, log_tag_letter, ...) do {                       \
         if (_ESP_LOG_EARLY_ENABLED(log_level)) {                                                  \
             esp_rom_printf(_ESP_LOG_DRAM_LOG_FORMAT(log_tag_letter, format), tag, ##__VA_ARGS__); \
         }} while(0)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 /** @endcond */
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/aria.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/aria.h
index 13763d42..20f43f22 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/aria.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/aria.h
@@ -88,14 +88,14 @@
 /* MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED is deprecated and should not be used. */
 #define MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED      -0x0058  /**< ARIA hardware accelerator failed. */
 
-#if !defined(MBEDTLS_ARIA_ALT)
-// Regular implementation
-//
-
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+#if !defined(MBEDTLS_ARIA_ALT)
+// Regular implementation
+//
+
 /**
  * \brief The ARIA context-type definition.
  */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
index 9615090f..6f1201bf 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
@@ -71,6 +71,46 @@
 
 #include "bignum.h"
 
+
+/*
+ * Conversion macros for embedded constants:
+ * build lists of mbedtls_mpi_uint's from lists of unsigned char's grouped by 8, 4 or 2
+ */
+#if defined(MBEDTLS_HAVE_INT32)
+
+#define MBEDTLS_BYTES_TO_T_UINT_4( a, b, c, d )               \
+    ( (mbedtls_mpi_uint) (a) <<  0 ) |                        \
+    ( (mbedtls_mpi_uint) (b) <<  8 ) |                        \
+    ( (mbedtls_mpi_uint) (c) << 16 ) |                        \
+    ( (mbedtls_mpi_uint) (d) << 24 )
+
+#define MBEDTLS_BYTES_TO_T_UINT_2( a, b )                   \
+    MBEDTLS_BYTES_TO_T_UINT_4( a, b, 0, 0 )
+
+#define MBEDTLS_BYTES_TO_T_UINT_8( a, b, c, d, e, f, g, h ) \
+    MBEDTLS_BYTES_TO_T_UINT_4( a, b, c, d ),                \
+    MBEDTLS_BYTES_TO_T_UINT_4( e, f, g, h )
+
+#else /* 64-bits */
+
+#define MBEDTLS_BYTES_TO_T_UINT_8( a, b, c, d, e, f, g, h )   \
+    ( (mbedtls_mpi_uint) (a) <<  0 ) |                        \
+    ( (mbedtls_mpi_uint) (b) <<  8 ) |                        \
+    ( (mbedtls_mpi_uint) (c) << 16 ) |                        \
+    ( (mbedtls_mpi_uint) (d) << 24 ) |                        \
+    ( (mbedtls_mpi_uint) (e) << 32 ) |                        \
+    ( (mbedtls_mpi_uint) (f) << 40 ) |                        \
+    ( (mbedtls_mpi_uint) (g) << 48 ) |                        \
+    ( (mbedtls_mpi_uint) (h) << 56 )
+
+#define MBEDTLS_BYTES_TO_T_UINT_4( a, b, c, d )             \
+    MBEDTLS_BYTES_TO_T_UINT_8( a, b, c, d, 0, 0, 0, 0 )
+
+#define MBEDTLS_BYTES_TO_T_UINT_2( a, b )                   \
+    MBEDTLS_BYTES_TO_T_UINT_8( a, b, 0, 0, 0, 0, 0, 0 )
+
+#endif /* bits in mbedtls_mpi_uint */
+
 #if defined(MBEDTLS_HAVE_ASM)
 
 #ifndef asm
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/config.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/config.h
index 6b45021d..b1d67f7a 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/config.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/config.h
@@ -453,7 +453,7 @@
  *       be overridden, but the wrapper functions mbedtls_aes_decrypt and mbedtls_aes_encrypt
  *       must stay untouched.
  *
- * \note If you use the AES_xxx_ALT macros, then is is recommended to also set
+ * \note If you use the AES_xxx_ALT macros, then it is recommended to also set
  *       MBEDTLS_AES_ROM_TABLES in order to help the linker garbage-collect the AES
  *       tables.
  *
@@ -1746,6 +1746,23 @@
  */
 //#define MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
 
+/**
+ * \def MBEDTLS_TEST_HOOKS
+ *
+ * Enable features for invasive testing such as introspection functions and
+ * hooks for fault injection. This enables additional unit tests.
+ *
+ * Merely enabling this feature should not change the behavior of the product.
+ * It only adds new code, and new branching points where the default behavior
+ * is the same as when this feature is disabled.
+ * However, this feature increases the attack surface: there is an added
+ * risk of vulnerabilities, and more gadgets that can make exploits easier.
+ * Therefore this feature must never be enabled in production.
+ *
+ * Uncomment to enable invasive tests.
+ */
+//#define MBEDTLS_TEST_HOOKS
+
 /**
  * \def MBEDTLS_THREADING_ALT
  *
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
index 278fbbbb..6c099adf 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
@@ -214,6 +214,13 @@ typedef struct mbedtls_ctr_drbg_context
     void *p_entropy;            /*!< The context for the entropy function. */
 
 #if defined(MBEDTLS_THREADING_C)
+    /* Invariant: the mutex is initialized if and only if f_entropy != NULL.
+     * This means that the mutex is initialized during the initial seeding
+     * in mbedtls_ctr_drbg_seed() and freed in mbedtls_ctr_drbg_free().
+     *
+     * Note that this invariant may change without notice. Do not rely on it
+     * and do not access the mutex directly in application code.
+     */
     mbedtls_threading_mutex_t mutex;
 #endif
 }
@@ -277,6 +284,15 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
  *                      device.
  */
 #endif
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      after this function returns successfully,
+ *                      it is safe to call mbedtls_ctr_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
 /**
  * \param ctx           The CTR_DRBG context to seed.
  *                      It must have been initialized with
@@ -286,6 +302,8 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
  *                      the same context unless you call
  *                      mbedtls_ctr_drbg_free() and mbedtls_ctr_drbg_init()
  *                      again first.
+ *                      After a failed call to mbedtls_ctr_drbg_seed(),
+ *                      you must call mbedtls_ctr_drbg_free().
  * \param f_entropy     The entropy callback, taking as arguments the
  *                      \p p_entropy context, the buffer to fill, and the
  *                      length of the buffer.
@@ -377,6 +395,11 @@ void mbedtls_ctr_drbg_set_reseed_interval( mbedtls_ctr_drbg_context *ctx,
  * \brief               This function reseeds the CTR_DRBG context, that is
  *                      extracts data from the entropy source.
  *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
  * \param ctx           The CTR_DRBG context.
  * \param additional    Additional data to add to the state. Can be \c NULL.
  * \param len           The length of the additional data.
@@ -394,6 +417,11 @@ int mbedtls_ctr_drbg_reseed( mbedtls_ctr_drbg_context *ctx,
 /**
  * \brief              This function updates the state of the CTR_DRBG context.
  *
+ * \note               This function is not thread-safe. It is not safe
+ *                     to call this function if another thread might be
+ *                     concurrently obtaining random numbers from the same
+ *                     context or updating or reseeding the same context.
+ *
  * \param ctx          The CTR_DRBG context.
  * \param additional   The data to update the state with. This must not be
  *                     \c NULL unless \p add_len is \c 0.
@@ -417,6 +445,11 @@ int mbedtls_ctr_drbg_update_ret( mbedtls_ctr_drbg_context *ctx,
  * This function automatically reseeds if the reseed counter is exceeded
  * or prediction resistance is enabled.
  *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
  * \param p_rng         The CTR_DRBG context. This must be a pointer to a
  *                      #mbedtls_ctr_drbg_context structure.
  * \param output        The buffer to fill.
@@ -445,8 +478,16 @@ int mbedtls_ctr_drbg_random_with_add( void *p_rng,
  *
  * This function automatically reseeds if the reseed counter is exceeded
  * or prediction resistance is enabled.
- *
- *
+ */
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      it is safe to call mbedtls_ctr_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
+/**
  * \param p_rng         The CTR_DRBG context. This must be a pointer to a
  *                      #mbedtls_ctr_drbg_context structure.
  * \param output        The buffer to fill.
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecp.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecp.h
index bdc750eb..e4a1ed81 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecp.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ecp.h
@@ -154,6 +154,40 @@ typedef struct mbedtls_ecp_point
 }
 mbedtls_ecp_point;
 
+/* Determine the minimum safe value of MBEDTLS_ECP_MAX_BITS. */
+#if !defined(MBEDTLS_ECP_C)
+#define MBEDTLS_ECP_MAX_BITS_MIN 0
+/* Note: the curves must be listed in DECREASING size! */
+#elif defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 521
+#elif defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 512
+#elif defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 448
+#elif defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 384
+#elif defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 384
+#elif defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 256
+#elif defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 256
+#elif defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 256
+#elif defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 255
+#elif defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 225 // n is slightly above 2^224
+#elif defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 224
+#elif defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 192
+#elif defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 192
+#else
+#error "MBEDTLS_ECP_C enabled, but no curve?"
+#endif
+
 #if !defined(MBEDTLS_ECP_ALT)
 /*
  * default mbed TLS elliptic curve arithmetic implementation
@@ -228,7 +262,13 @@ mbedtls_ecp_group;
  * \{
  */
 
-#if !defined(MBEDTLS_ECP_MAX_BITS)
+#if defined(MBEDTLS_ECP_MAX_BITS)
+
+#if MBEDTLS_ECP_MAX_BITS < MBEDTLS_ECP_MAX_BITS_MIN
+#error "MBEDTLS_ECP_MAX_BITS is smaller than the largest supported curve"
+#endif
+
+#else
 /**
  * The maximum size of the groups, that is, of \c N and \c P.
  */
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/entropy.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/entropy.h
index 1e1d3f56..1d6e9b82 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/entropy.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/entropy.h
@@ -147,13 +147,15 @@ mbedtls_entropy_source_state;
  */
 typedef struct mbedtls_entropy_context
 {
-    int accumulator_started;
+    int accumulator_started; /* 0 after init.
+                              * 1 after the first update.
+                              * -1 after free. */
 #if defined(MBEDTLS_ENTROPY_SHA512_ACCUMULATOR)
     mbedtls_sha512_context  accumulator;
 #else
     mbedtls_sha256_context  accumulator;
 #endif
-    int             source_count;
+    int             source_count; /* Number of entries used in source. */
     mbedtls_entropy_source_state    source[MBEDTLS_ENTROPY_MAX_SOURCES];
 #if defined(MBEDTLS_HAVEGE_C)
     mbedtls_havege_state    havege_data;
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
index 970c033c..5718e187 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
@@ -128,6 +128,14 @@ typedef struct mbedtls_hmac_drbg_context
     void *p_entropy;            /*!< context for the entropy function        */
 
 #if defined(MBEDTLS_THREADING_C)
+    /* Invariant: the mutex is initialized if and only if
+     * md_ctx->md_info != NULL. This means that the mutex is initialized
+     * during the initial seeding in mbedtls_hmac_drbg_seed() or
+     * mbedtls_hmac_drbg_seed_buf() and freed in mbedtls_ctr_drbg_free().
+     *
+     * Note that this invariant may change without notice. Do not rely on it
+     * and do not access the mutex directly in application code.
+     */
     mbedtls_threading_mutex_t mutex;
 #endif
 } mbedtls_hmac_drbg_context;
@@ -177,7 +185,17 @@ void mbedtls_hmac_drbg_init( mbedtls_hmac_drbg_context *ctx );
  * \note                During the initial seeding, this function calls
  *                      the entropy source to obtain a nonce
  *                      whose length is half the entropy length.
- *
+ */
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      after this function returns successfully,
+ *                      it is safe to call mbedtls_hmac_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
+/**
  * \param ctx           HMAC_DRBG context to be seeded.
  * \param md_info       MD algorithm to use for HMAC_DRBG.
  * \param f_entropy     The entropy callback, taking as arguments the
@@ -216,7 +234,17 @@ int mbedtls_hmac_drbg_seed( mbedtls_hmac_drbg_context *ctx,
  *
  * This function is meant for use in algorithms that need a pseudorandom
  * input such as deterministic ECDSA.
- *
+ */
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      after this function returns successfully,
+ *                      it is safe to call mbedtls_hmac_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
+/**
  * \param ctx           HMAC_DRBG context to be initialised.
  * \param md_info       MD algorithm to use for HMAC_DRBG.
  * \param data          Concatenation of the initial entropy string and
@@ -279,6 +307,11 @@ void mbedtls_hmac_drbg_set_reseed_interval( mbedtls_hmac_drbg_context *ctx,
 /**
  * \brief               This function updates the state of the HMAC_DRBG context.
  *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
  * \param ctx           The HMAC_DRBG context.
  * \param additional    The data to update the state with.
  *                      If this is \c NULL, there is no additional data.
@@ -295,6 +328,11 @@ int mbedtls_hmac_drbg_update_ret( mbedtls_hmac_drbg_context *ctx,
  * \brief               This function reseeds the HMAC_DRBG context, that is
  *                      extracts data from the entropy source.
  *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
  * \param ctx           The HMAC_DRBG context.
  * \param additional    Additional data to add to the state.
  *                      If this is \c NULL, there is no additional data
@@ -320,6 +358,11 @@ int mbedtls_hmac_drbg_reseed( mbedtls_hmac_drbg_context *ctx,
  * This function automatically reseeds if the reseed counter is exceeded
  * or prediction resistance is enabled.
  *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
  * \param p_rng         The HMAC_DRBG context. This must be a pointer to a
  *                      #mbedtls_hmac_drbg_context structure.
  * \param output        The buffer to fill.
@@ -349,7 +392,16 @@ int mbedtls_hmac_drbg_random_with_add( void *p_rng,
  *
  * This function automatically reseeds if the reseed counter is exceeded
  * or prediction resistance is enabled.
- *
+ */
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      it is safe to call mbedtls_ctr_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
+/**
  * \param p_rng         The HMAC_DRBG context. This must be a pointer to a
  *                      #mbedtls_hmac_drbg_context structure.
  * \param output        The buffer to fill.
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
index 00fea7db..c6e1a027 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
@@ -151,6 +151,7 @@ int mbedtls_net_connect( mbedtls_net_context *ctx, const char *host, const char
  *
  * \return         0 if successful, or one of:
  *                      MBEDTLS_ERR_NET_SOCKET_FAILED,
+ *                      MBEDTLS_ERR_NET_UNKNOWN_HOST,
  *                      MBEDTLS_ERR_NET_BIND_FAILED,
  *                      MBEDTLS_ERR_NET_LISTEN_FAILED
  *
@@ -170,6 +171,8 @@ int mbedtls_net_bind( mbedtls_net_context *ctx, const char *bind_ip, const char
  *                  can be NULL if client_ip is null
  *
  * \return          0 if successful, or
+ *                  MBEDTLS_ERR_NET_SOCKET_FAILED,
+ *                  MBEDTLS_ERR_NET_BIND_FAILED,
  *                  MBEDTLS_ERR_NET_ACCEPT_FAILED, or
  *                  MBEDTLS_ERR_NET_BUFFER_TOO_SMALL if buf_size is too small,
  *                  MBEDTLS_ERR_SSL_WANT_READ if bind_fd was set to
@@ -182,6 +185,10 @@ int mbedtls_net_accept( mbedtls_net_context *bind_ctx,
 /**
  * \brief          Check and wait for the context to be ready for read/write
  *
+ * \note           The current implementation of this function uses
+ *                 select() and returns an error if the file descriptor
+ *                 is \c FD_SETSIZE or greater.
+ *
  * \param ctx      Socket to check
  * \param rw       Bitflag composed of MBEDTLS_NET_POLL_READ and
  *                 MBEDTLS_NET_POLL_WRITE specifying the events
@@ -263,16 +270,21 @@ int mbedtls_net_send( void *ctx, const unsigned char *buf, size_t len );
  *                 'timeout' seconds. If no error occurs, the actual amount
  *                 read is returned.
  *
+ * \note           The current implementation of this function uses
+ *                 select() and returns an error if the file descriptor
+ *                 is \c FD_SETSIZE or greater.
+ *
  * \param ctx      Socket
  * \param buf      The buffer to write to
  * \param len      Maximum length of the buffer
  * \param timeout  Maximum number of milliseconds to wait for data
  *                 0 means no timeout (wait forever)
  *
- * \return         the number of bytes received,
- *                 or a non-zero error code:
- *                 MBEDTLS_ERR_SSL_TIMEOUT if the operation timed out,
+ * \return         The number of bytes received if successful.
+ *                 MBEDTLS_ERR_SSL_TIMEOUT if the operation timed out.
  *                 MBEDTLS_ERR_SSL_WANT_READ if interrupted by a signal.
+ *                 Another negative error code (MBEDTLS_ERR_NET_xxx)
+ *                 for other failures.
  *
  * \note           This function will block (until data becomes available or
  *                 timeout is reached) even if the socket is set to
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/padlock.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/padlock.h
index d8246e2c..0e4a6bbf 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/padlock.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/padlock.h
@@ -98,7 +98,7 @@ extern "C" {
  *
  * \param feature  The feature to detect
  *
- * \return         1 if CPU has support for the feature, 0 otherwise
+ * \return         non-zero if CPU has support for the feature, 0 otherwise
  */
 int mbedtls_padlock_has_support( int feature );
 
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/rsa.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/rsa.h
index 188c37cf..b2f65334 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/rsa.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/rsa.h
@@ -124,7 +124,10 @@ extern "C" {
  */
 typedef struct mbedtls_rsa_context
 {
-    int ver;                    /*!<  Always 0.*/
+    int ver;                    /*!<  Reserved for internal purposes.
+                                 *    Do not set this field in application
+                                 *    code. Its meaning might change without
+                                 *    notice. */
     size_t len;                 /*!<  The size of \p N in Bytes. */
 
     mbedtls_mpi N;              /*!<  The public modulus. */
@@ -154,6 +157,7 @@ typedef struct mbedtls_rsa_context
                                      mask generating function used in the
                                      EME-OAEP and EMSA-PSS encodings. */
 #if defined(MBEDTLS_THREADING_C)
+    /* Invariant: the mutex is initialized iff ver != 0. */
     mbedtls_threading_mutex_t mutex;    /*!<  Thread-safety mutex. */
 #endif
 }
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl.h
index fe33ac8d..0abeb430 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl.h
@@ -2237,7 +2237,7 @@ void mbedtls_ssl_conf_dhm_min_bitlen( mbedtls_ssl_config *conf,
 #if defined(MBEDTLS_ECP_C)
 /**
  * \brief          Set the allowed curves in order of preference.
- *                 (Default: all defined curves.)
+ *                 (Default: all defined curves in order of decreasing size.)
  *
  *                 On server: this only affects selection of the ECDHE curve;
  *                 the curves used for ECDH and ECDSA are determined by the
@@ -2269,7 +2269,9 @@ void mbedtls_ssl_conf_curves( mbedtls_ssl_config *conf,
 #if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
 /**
  * \brief          Set the allowed hashes for signatures during the handshake.
- *                 (Default: all available hashes except MD5.)
+ *                 (Default: all SHA-2 hashes, largest first. Also SHA-1 if
+ *                 the compile-time option
+ *                 `MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE` is enabled.)
  *
  * \note           This only affects which hashes are offered and can be used
  *                 for signatures during the handshake. Hashes for message
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
index a10a4341..a83f5e66 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
@@ -124,7 +124,7 @@ void mbedtls_ssl_ticket_init( mbedtls_ssl_ticket_context *ctx );
  *                  Recommended value: 86400 (one day).
  *
  * \note            It is highly recommended to select a cipher that is at
- *                  least as strong as the the strongest ciphersuite
+ *                  least as strong as the strongest ciphersuite
  *                  supported. Usually that means a 256-bit key.
  *
  * \note            The lifetime of the keys is twice the lifetime of tickets.
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/threading.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/threading.h
index a8183a6e..45161ce4 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/threading.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/threading.h
@@ -73,6 +73,9 @@ extern "C" {
 typedef struct mbedtls_threading_mutex_t
 {
     pthread_mutex_t mutex;
+    /* is_valid is 0 after a failed init or a free, and nonzero after a
+     * successful init. This field is not considered part of the public
+     * API of Mbed TLS and may change without notice. */
     char is_valid;
 } mbedtls_threading_mutex_t;
 #endif
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/version.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/version.h
index 5f0a8f11..49cbeb00 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/version.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/version.h
@@ -65,16 +65,16 @@
  */
 #define MBEDTLS_VERSION_MAJOR  2
 #define MBEDTLS_VERSION_MINOR  16
-#define MBEDTLS_VERSION_PATCH  9
+#define MBEDTLS_VERSION_PATCH  11
 
 /**
  * The single version number has the following structure:
  *    MMNNPP00
  *    Major version | Minor version | Patch version
  */
-#define MBEDTLS_VERSION_NUMBER         0x02100900
-#define MBEDTLS_VERSION_STRING         "2.16.9"
-#define MBEDTLS_VERSION_STRING_FULL    "mbed TLS 2.16.9"
+#define MBEDTLS_VERSION_NUMBER         0x02100B00
+#define MBEDTLS_VERSION_STRING         "2.16.11"
+#define MBEDTLS_VERSION_STRING_FULL    "mbed TLS 2.16.11"
 
 #if defined(MBEDTLS_VERSION_C)
 
diff --git a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
index c38e0c05..30da1909 100644
--- a/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
+++ b/tools/sdk/esp32c3/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
@@ -229,12 +229,21 @@ typedef void mbedtls_x509_crt_restart_ctx;
 /**
  * Default security profile. Should provide a good balance between security
  * and compatibility with current deployments.
+ *
+ * This profile permits:
+ * - SHA2 hashes.
+ * - All supported elliptic curves.
+ * - RSA with 2048 bits and above.
+ *
+ * New minor versions of Mbed TLS may extend this profile, for example if
+ * new curves are added to the library. New minor versions of Mbed TLS will
+ * not reduce this profile unless serious security concerns require it.
  */
 extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_default;
 
 /**
  * Expected next default profile. Recommended for new deployments.
- * Currently targets a 128-bit security level, except for RSA-2048.
+ * Currently targets a 128-bit security level, except for allowing RSA-2048.
  */
 extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_next;
 
diff --git a/tools/sdk/esp32c3/include/mbedtls/port/include/mbedtls/esp_config.h b/tools/sdk/esp32c3/include/mbedtls/port/include/mbedtls/esp_config.h
index 1ff7ea4a..f36ebf9b 100644
--- a/tools/sdk/esp32c3/include/mbedtls/port/include/mbedtls/esp_config.h
+++ b/tools/sdk/esp32c3/include/mbedtls/port/include/mbedtls/esp_config.h
@@ -1193,7 +1193,11 @@
  *
  * Comment to skip keyUsage checking for both CA and leaf certificates.
  */
+#ifdef CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE
 #define MBEDTLS_X509_CHECK_KEY_USAGE
+#else
+#undef MBEDTLS_X509_CHECK_KEY_USAGE
+#endif
 
 /**
  * \def MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
@@ -1206,7 +1210,11 @@
  *
  * Comment to skip extendedKeyUsage checking for certificates.
  */
+#ifdef CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
 #define MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+#else
+#undef MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+#endif
 
 /**
  * \def MBEDTLS_X509_RSASSA_PSS_SUPPORT
diff --git a/tools/sdk/esp32c3/include/newlib/platform_include/sys/dirent.h b/tools/sdk/esp32c3/include/newlib/platform_include/sys/dirent.h
index 4626ae14..bfa49f5e 100644
--- a/tools/sdk/esp32c3/include/newlib/platform_include/sys/dirent.h
+++ b/tools/sdk/esp32c3/include/newlib/platform_include/sys/dirent.h
@@ -19,11 +19,16 @@
 
 /**
  * This header file provides POSIX-compatible definitions of directory
- * access functions and related data types.
+ * access data types. Starting with newlib 3.3, related functions are defined
+ * in 'dirent.h' bundled with newlib.
  * See http://pubs.opengroup.org/onlinepubs/7908799/xsh/dirent.h.html
  * for reference.
  */
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
  * @brief Opaque directory structure
  */
@@ -57,3 +62,7 @@ void seekdir(DIR* pdir, long loc);
 void rewinddir(DIR* pdir);
 int closedir(DIR* pdir);
 int readdir_r(DIR* pdir, struct dirent* entry, struct dirent** out_dirent);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/protocomm/include/transports/protocomm_ble.h b/tools/sdk/esp32c3/include/protocomm/include/transports/protocomm_ble.h
index b30d5707..a9e7b6a2 100644
--- a/tools/sdk/esp32c3/include/protocomm/include/transports/protocomm_ble.h
+++ b/tools/sdk/esp32c3/include/protocomm/include/transports/protocomm_ble.h
@@ -26,6 +26,14 @@ extern "C" {
  */
 #define MAX_BLE_DEVNAME_LEN 29
 #define BLE_UUID128_VAL_LENGTH  16
+ /**
+ * Theoretically, the limit for max manufacturer length remains same as BLE
+ * device name i.e. 31 bytes (max scan response size) - 1 byte (length) - 1
+ * byte (type) = 29 bytes
+ * However, manufacturer data goes along with BLE device name in scan response.
+ * So, it is important to understand the actual length should be smaller than
+ * (29 - (BLE device name length) - 2). */
+#define MAX_BLE_MANUFACTURER_DATA_LEN 29
 
 /**
  * @brief   This structure maps handler required by protocomm layer to
@@ -59,6 +67,16 @@ typedef struct protocomm_ble_config {
      */
     uint8_t      service_uuid[BLE_UUID128_VAL_LENGTH];
 
+    /**
+     * BLE device manufacturer data pointer in advertisement
+     */
+    uint8_t      *manufacturer_data;
+
+    /**
+     * BLE device manufacturer data length in advertisement
+     */
+    ssize_t      manufacturer_data_len;
+
     /**
      * Number of entries in the Name-UUID lookup table
      */
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/reset_reasons.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/reset_reasons.h
new file mode 100644
index 00000000..0bb99f58
--- /dev/null
+++ b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/reset_reasons.h
@@ -0,0 +1,61 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+//+-----------------------------------------------Terminology---------------------------------------------+
+//|                                                                                                       |
+//| CPU Reset:    Reset CPU core only, once reset done, CPU will execute from reset vector                |
+//|                                                                                                       |
+//| Core Reset:   Reset the whole digital system except RTC sub-system                                    |
+//|                                                                                                       |
+//| System Reset: Reset the whole digital system, including RTC sub-system                                |
+//|                                                                                                       |
+//| Chip Reset:   Reset the whole chip, including the analog part                                         |
+//|                                                                                                       |
+//+-------------------------------------------------------------------------------------------------------+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Naming conventions: RESET_REASON_{reset level}_{reset reason}
+ * @note refer to TRM: <Reset and Clock> chapter
+ */
+typedef enum {
+    RESET_REASON_CHIP_POWER_ON   = 0x01, // Power on reset
+    RESET_REASON_CHIP_BROWN_OUT  = 0x01, // VDD voltage is not stable and resets the chip
+    RESET_REASON_CHIP_SUPER_WDT  = 0x01, // Super watch dog resets the chip
+    RESET_REASON_CORE_SW         = 0x03, // Software resets the digital core by RTC_CNTL_SW_SYS_RST
+    RESET_REASON_CORE_DEEP_SLEEP = 0x05, // Deep sleep reset the digital core
+    RESET_REASON_CORE_MWDT0      = 0x07, // Main watch dog 0 resets digital core
+    RESET_REASON_CORE_MWDT1      = 0x08, // Main watch dog 1 resets digital core
+    RESET_REASON_CORE_RTC_WDT    = 0x09, // RTC watch dog resets digital core
+    RESET_REASON_CPU0_MWDT0      = 0x0B, // Main watch dog 0 resets CPU 0
+    RESET_REASON_CPU0_SW         = 0x0C, // Software resets CPU 0 by RTC_CNTL_SW_PROCPU_RST
+    RESET_REASON_CPU0_RTC_WDT    = 0x0D, // RTC watch dog resets CPU 0
+    RESET_REASON_SYS_BROWN_OUT   = 0x0F, // VDD voltage is not stable and resets the digital core
+    RESET_REASON_SYS_RTC_WDT     = 0x10, // RTC watch dog resets digital core and rtc module
+    RESET_REASON_CPU0_MWDT1      = 0x11, // Main watch dog 1 resets CPU 0
+    RESET_REASON_SYS_SUPER_WDT   = 0x12, // Super watch dog resets the digital core and rtc module
+    RESET_REASON_SYS_CLK_GLITCH  = 0x13, // Glitch on clock resets the digital core and rtc module
+    RESET_REASON_CORE_EFUSE_CRC  = 0x14, // eFuse CRC error resets the digital core
+    RESET_REASON_CORE_PWR_GLITCH = 0x17, // Glitch on power resets the digital core
+} soc_reset_reason_t;
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/soc_caps.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/soc_caps.h
index eef3d9c1..65a923d2 100644
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/soc_caps.h
+++ b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/soc_caps.h
@@ -13,6 +13,8 @@
 #define SOC_HMAC_SUPPORTED              1
 #define SOC_ASYNC_MEMCPY_SUPPORTED      1
 #define SOC_USB_SERIAL_JTAG_SUPPORTED   1
+#define SOC_TEMP_SENSOR_SUPPORTED       1
+#define SOC_FLASH_ENCRYPTION_XTS_AES      1
 
 /*-------------------------- COMMON CAPS ---------------------------------------*/
 #define SOC_SUPPORTS_SECURE_DL_MODE     1
@@ -243,6 +245,7 @@
 
 #define SOC_UART_SUPPORT_RTC_CLK    (1)
 #define SOC_UART_SUPPORT_XTAL_CLK   (1)
+#define SOC_UART_REQUIRE_CORE_RESET (1)
 
 // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
 #define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND   (1)
diff --git a/tools/sdk/esp32/include/soc/include/soc/soc_memory_layout.h b/tools/sdk/esp32c3/include/soc/include/soc/soc_memory_types.h
similarity index 55%
rename from tools/sdk/esp32/include/soc/include/soc/soc_memory_layout.h
rename to tools/sdk/esp32c3/include/soc/include/soc/soc_memory_types.h
index 2da5b729..cf0d7ff1 100644
--- a/tools/sdk/esp32/include/soc/include/soc/soc_memory_layout.h
+++ b/tools/sdk/esp32c3/include/soc/include/soc/soc_memory_types.h
@@ -22,124 +22,9 @@
 #include "sdkconfig.h"
 #include "esp_attr.h"
 
-#ifdef CONFIG_BT_ENABLED
-
-#define SOC_MEM_BT_DATA_START               0x3ffae6e0
-#define SOC_MEM_BT_DATA_END                 0x3ffaff10
-#define SOC_MEM_BT_EM_START                 0x3ffb0000
-#define SOC_MEM_BT_EM_END                   0x3ffb7cd8
-#define SOC_MEM_BT_EM_BTDM0_START           0x3ffb0000
-#define SOC_MEM_BT_EM_BTDM0_END             0x3ffb09a8
-#define SOC_MEM_BT_EM_BLE_START             0x3ffb09a8
-#define SOC_MEM_BT_EM_BLE_END               0x3ffb1ddc
-#define SOC_MEM_BT_EM_BTDM1_START           0x3ffb1ddc
-#define SOC_MEM_BT_EM_BTDM1_END             0x3ffb2730
-#define SOC_MEM_BT_EM_BREDR_START           0x3ffb2730
-#define SOC_MEM_BT_EM_BREDR_NO_SYNC_END     0x3ffb6388  //Not calculate with synchronize connection support
-#define SOC_MEM_BT_EM_BREDR_END             0x3ffb7cd8  //Calculate with synchronize connection support
-#define SOC_MEM_BT_EM_SYNC0_START           0x3ffb6388
-#define SOC_MEM_BT_EM_SYNC0_END             0x3ffb6bf8
-#define SOC_MEM_BT_EM_SYNC1_START           0x3ffb6bf8
-#define SOC_MEM_BT_EM_SYNC1_END             0x3ffb7468
-#define SOC_MEM_BT_EM_SYNC2_START           0x3ffb7468
-#define SOC_MEM_BT_EM_SYNC2_END             0x3ffb7cd8
-#define SOC_MEM_BT_BSS_START                0x3ffb8000
-#define SOC_MEM_BT_BSS_END                  0x3ffb9a20
-#define SOC_MEM_BT_MISC_START               0x3ffbdb28
-#define SOC_MEM_BT_MISC_END                 0x3ffbdb5c
-
-#define SOC_MEM_BT_EM_PER_SYNC_SIZE         0x870
-
-#define SOC_MEM_BT_EM_BREDR_REAL_END        (SOC_MEM_BT_EM_BREDR_NO_SYNC_END + CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF * SOC_MEM_BT_EM_PER_SYNC_SIZE)
-
-#endif //CONFIG_BT_ENABLED
-
-#define SOC_MEMORY_TYPE_NO_PRIOS 3
-
-/* Type descriptor holds a description for a particular type of memory on a particular SoC.
- */
-typedef struct {
-    const char *name;  ///< Name of this memory type
-    uint32_t caps[SOC_MEMORY_TYPE_NO_PRIOS]; ///< Capabilities for this memory type (as a prioritised set)
-    bool aliased_iram;   ///< If true, this is data memory that is is also mapped in IRAM
-    bool startup_stack; ///< If true, memory of this type is used for ROM stack during startup
-} soc_memory_type_desc_t;
-
-/* Constant table of tag descriptors for all this SoC's tags */
-extern const soc_memory_type_desc_t soc_memory_types[];
-extern const size_t soc_memory_type_count;
-
-/* Region descriptor holds a description for a particular region of memory on a particular SoC.
- */
-typedef struct
-{
-    intptr_t start;  ///< Start address of the region
-    size_t size;            ///< Size of the region in bytes
-    size_t type;             ///< Type of the region (index into soc_memory_types array)
-    intptr_t iram_address; ///< If non-zero, is equivalent address in IRAM
-} soc_memory_region_t;
-
-extern const soc_memory_region_t soc_memory_regions[];
-extern const size_t soc_memory_region_count;
-
-/* Region descriptor holds a description for a particular region of
-   memory reserved on this SoC for a particular use (ie not available
-   for stack/heap usage.) */
-typedef struct
-{
-    intptr_t start;
-    intptr_t end;
-} soc_reserved_region_t;
-
-/* Use this macro to reserved a fixed region of RAM (hardcoded addresses)
- * for a particular purpose.
- *
- * Usually used to mark out memory addresses needed for hardware or ROM code
- * purposes.
- *
- * Don't call this macro from user code which can use normal C static allocation
- * instead.
- *
- * @param START Start address to be reserved.
- * @param END One after the address of the last byte to be reserved. (ie length of
- * the reserved region is (END - START) in bytes.
- * @param NAME Name for the reserved region. Must be a valid variable name,
- * unique to this source file.
- */
-#define SOC_RESERVE_MEMORY_REGION(START, END, NAME)     \
-    __attribute__((section(".reserved_memory_address"))) __attribute__((used)) \
-    static soc_reserved_region_t reserved_region_##NAME = { START, END };
-
-/* Return available memory regions for this SoC. Each available memory
- * region is a contiguous piece of memory which is not being used by
- * static data, used by ROM code, or reserved by a component using
- * the SOC_RESERVE_MEMORY_REGION() macro.
- *
- * This result is soc_memory_regions[] minus all regions reserved
- * via the SOC_RESERVE_MEMORY_REGION() macro (which may also split
- * some regions up.)
- *
- * At startup, all available memory returned by this function is
- * registered as heap space.
- *
- * @note OS-level startup function only, not recommended to call from
- * app code.
- *
- * @param regions Pointer to an array for reading available regions into.
- * Size of the array should be at least the result of
- * soc_get_available_memory_region_max_count(). Entries in the array
- * will be ordered by memory address.
- *
- * @return Number of entries copied to 'regions'. Will be no greater than
- * the result of soc_get_available_memory_region_max_count().
- */
-size_t soc_get_available_memory_regions(soc_memory_region_t *regions);
-
-/* Return the maximum number of available memory regions which could be
- * returned by soc_get_available_memory_regions(). Used to size the
- * array passed to that function.
- */
-size_t soc_get_available_memory_region_max_count(void);
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 inline static bool IRAM_ATTR esp_ptr_dma_capable(const void *p)
 {
@@ -148,7 +33,7 @@ inline static bool IRAM_ATTR esp_ptr_dma_capable(const void *p)
 
 inline static bool IRAM_ATTR esp_ptr_dma_ext_capable(const void *p)
 {
-#if CONFIG_IDF_TARGET_ESP32S2  || CONFIG_IDF_TARGET_ESP32S3
+#ifdef SOC_PSRAM_DMA_CAPABLE
     return (intptr_t)p >= SOC_DMA_EXT_LOW && (intptr_t)p < SOC_DMA_EXT_HIGH;
 #else
     return false;
@@ -302,3 +187,7 @@ inline static bool IRAM_ATTR esp_stack_ptr_is_sane(uint32_t sp)
 #endif
         ;
 }
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/wifi_provisioning/include/wifi_provisioning/scheme_ble.h b/tools/sdk/esp32c3/include/wifi_provisioning/include/wifi_provisioning/scheme_ble.h
index ed30d818..fc19e16b 100644
--- a/tools/sdk/esp32c3/include/wifi_provisioning/include/wifi_provisioning/scheme_ble.h
+++ b/tools/sdk/esp32c3/include/wifi_provisioning/include/wifi_provisioning/scheme_ble.h
@@ -77,6 +77,29 @@ void wifi_prov_scheme_ble_event_cb_free_bt  (void *user_data, wifi_prov_cb_event
  */
 esp_err_t wifi_prov_scheme_ble_set_service_uuid(uint8_t *uuid128);
 
+/**
+ * @brief   Set manufacturer specific data in scan response
+ *
+ * This must be called before starting provisioning, i.e. before
+ * making a call to wifi_prov_mgr_start_provisioning().
+ *
+ * @note    It is important to understand that length of custom manufacturer
+ *          data should be within limits. The manufacturer data goes into scan
+ *          response along with BLE device name. By default, BLE device name
+ *          length is of 11 Bytes, however it can vary as per application use
+ *          case. So, one has to honour the scan response data size limits i.e.
+ *          (mfg_data_len + 2) < 31 - (device_name_length + 2 ). If the
+ *          mfg_data length exceeds this limit, the length will be truncated.
+ *
+ * @param[in] mfg_data      Custom manufacturer data
+ * @param[in] mfg_data_len  Manufacturer data length
+ *
+ * @return
+ *  - ESP_OK              : Success
+ *  - ESP_ERR_INVALID_ARG : Null argument
+ */
+esp_err_t wifi_prov_scheme_ble_set_mfg_data(uint8_t *mfg_data, ssize_t mfg_data_len);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/ld/esp32c3.ld b/tools/sdk/esp32c3/ld/esp32c3.ld
deleted file mode 100644
index 63a26c42..00000000
--- a/tools/sdk/esp32c3/ld/esp32c3.ld
+++ /dev/null
@@ -1,118 +0,0 @@
-/**
- *                    ESP32-C3 Linker Script Memory Layout
- * This file describes the memory layout (memory blocks) by virtual memory addresses.
- * This linker script is passed through the C preprocessor to include configuration options.
- * Please use preprocessor features sparingly!
- * Restrict to simple macros with numeric values, and/or #if/#endif blocks.
- */
-
-#include "sdkconfig.h"
-
-#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
-#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE)
-#elif defined(CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP)
-#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE)
-#else
-#define ESP_BOOTLOADER_RESERVE_RTC 0
-#endif
-
-#define SRAM_IRAM_START     0x4037C000
-#define SRAM_DRAM_START     0x3FC7C000
-#define ICACHE_SIZE         0x4000 /* ICache size is fixed to 16KB on ESP32-C3 */
-#define I_D_SRAM_OFFSET     (SRAM_IRAM_START - SRAM_DRAM_START)
-#define SRAM_DRAM_END       0x403D0000 - I_D_SRAM_OFFSET  /* 2nd stage bootloader iram_loader_seg start address */
-
-#define SRAM_IRAM_ORG       (SRAM_IRAM_START + ICACHE_SIZE)
-#define SRAM_DRAM_ORG       (SRAM_DRAM_START + ICACHE_SIZE)
-
-#define I_D_SRAM_SIZE       SRAM_DRAM_END - SRAM_DRAM_ORG
-
-#if CONFIG_ESP32C3_USE_FIXED_STATIC_RAM_SIZE
-ASSERT((CONFIG_ESP32C3_FIXED_STATIC_RAM_SIZE <= I_D_SRAM_SIZE), "Fixed static ram data does not fit.")
-#define DRAM0_0_SEG_LEN CONFIG_ESP3C3_FIXED_STATIC_RAM_SIZE
-#else
-#define DRAM0_0_SEG_LEN I_D_SRAM_SIZE
-#endif // CONFIG_ESP32C3_USE_FIXED_STATIC_RAM_SIZE
-MEMORY
-{
-  /**
-   *  All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
-   *  of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but
-   *  are connected to the data port of the CPU and eg allow byte-wise access.
-   */
-
-  /* IRAM for PRO CPU. */
-  iram0_0_seg (RX) :                 org = SRAM_IRAM_ORG, len = I_D_SRAM_SIZE
-
-#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-  /* Flash mapped instruction data */
-  iram0_2_seg (RX) :                 org = 0x42000020, len = 0x8000000-0x20
-
-  /**
-   * (0x20 offset above is a convenience for the app binary image generation.
-   * Flash cache has 64KB pages. The .bin file which is flashed to the chip
-   * has a 0x18 byte file header, and each segment has a 0x08 byte segment
-   * header. Setting this offset makes it simple to meet the flash cache MMU's
-   * constraint that (paddr % 64KB == vaddr % 64KB).)
-   */
-#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-
-  /**
-   * Shared data RAM, excluding memory reserved for ROM bss/data/stack.
-   * Enabling Bluetooth & Trace Memory features in menuconfig will decrease the amount of RAM available.
-   */
-  dram0_0_seg (RW) :                 org = SRAM_DRAM_ORG, len = DRAM0_0_SEG_LEN
-
-#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-  /* Flash mapped constant data */
-  drom0_0_seg (R) :                  org = 0x3C000020, len = 0x8000000-0x20
-
-  /* (See iram0_2_seg for meaning of 0x20 offset in the above.) */
-#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-
-  /**
-   * RTC fast memory (executable). Persists over deep sleep.
-   */
-  rtc_iram_seg(RWX) :                org = 0x50000000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC
-}
-
-#if CONFIG_ESP32C3_USE_FIXED_STATIC_RAM_SIZE
-/* static data ends at defined address */
-_static_data_end = 0x3FCA0000 + DRAM0_0_SEG_LEN;
-#else
-_static_data_end = _bss_end;
-#endif // CONFIG_ESP32C3_USE_FIXED_STATIC_RAM_SIZE
-
-/* Heap ends at top of dram0_0_seg */
-_heap_end = 0x40000000;
-
-_data_seg_org = ORIGIN(rtc_data_seg);
-
-/**
- *  The lines below define location alias for .rtc.data section
- *  As C3 only has RTC fast memory, this is not configurable like on other targets
- */
-REGION_ALIAS("rtc_data_seg", rtc_iram_seg );
-REGION_ALIAS("rtc_slow_seg", rtc_iram_seg );
-REGION_ALIAS("rtc_data_location", rtc_iram_seg );
-
-#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-  REGION_ALIAS("default_code_seg", iram0_2_seg);
-#else
-  REGION_ALIAS("default_code_seg", iram0_0_seg);
-#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-
-#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-  REGION_ALIAS("default_rodata_seg", drom0_0_seg);
-#else
-  REGION_ALIAS("default_rodata_seg", dram0_0_seg);
-#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-
-/**
- *  If rodata default segment is placed in `drom0_0_seg`, then flash's first rodata section must
- *  also be first in the segment.
- */
-#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-  ASSERT(_flash_rodata_dummy_start == ORIGIN(default_rodata_seg),
-         ".flash_rodata_dummy section must be placed at the beginning of the rodata segment.")
-#endif
diff --git a/tools/sdk/esp32c3/ld/esp32c3.rom.api.ld b/tools/sdk/esp32c3/ld/esp32c3.rom.api.ld
index 5c6671d9..5530bf0d 100644
--- a/tools/sdk/esp32c3/ld/esp32c3.rom.api.ld
+++ b/tools/sdk/esp32c3/ld/esp32c3.rom.api.ld
@@ -33,3 +33,4 @@ PROVIDE ( esp_rom_md5_final  = MD5Final );
 
 PROVIDE ( esp_rom_printf   = ets_printf );
 PROVIDE ( esp_rom_delay_us = ets_delay_us );
+PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
diff --git a/tools/sdk/esp32c3/ld/esp32c3_out.ld b/tools/sdk/esp32c3/ld/memory.ld
similarity index 95%
rename from tools/sdk/esp32c3/ld/esp32c3_out.ld
rename to tools/sdk/esp32c3/ld/memory.ld
index 04bf683e..3267ab1f 100644
--- a/tools/sdk/esp32c3/ld/esp32c3_out.ld
+++ b/tools/sdk/esp32c3/ld/memory.ld
@@ -21,7 +21,7 @@ MEMORY
   /* IRAM for PRO CPU. */
   iram0_0_seg (RX) : org = (0x4037C000 + 0x4000), len = 0x403D0000 - (0x4037C000 - 0x3FC7C000) - (0x3FC7C000 + 0x4000)
   /* Flash mapped instruction data */
-  iram0_2_seg (RX) : org = 0x42000020, len = 0x8000000-0x20
+  iram0_2_seg (RX) : org = 0x42000020, len = 0x800000-0x20
   /**
    * (0x20 offset above is a convenience for the app binary image generation.
    * Flash cache has 64KB pages. The .bin file which is flashed to the chip
@@ -35,7 +35,7 @@ MEMORY
    */
   dram0_0_seg (RW) : org = (0x3FC7C000 + 0x4000), len = 0x403D0000 - (0x4037C000 - 0x3FC7C000) - (0x3FC7C000 + 0x4000)
   /* Flash mapped constant data */
-  drom0_0_seg (R) : org = 0x3C000020, len = 0x8000000-0x20
+  drom0_0_seg (R) : org = 0x3C000020, len = 0x800000-0x20
   /* (See iram0_2_seg for meaning of 0x20 offset in the above.) */
   /**
    * RTC fast memory (executable). Persists over deep sleep.
diff --git a/tools/sdk/esp32c3/ld/esp32c3.project.ld b/tools/sdk/esp32c3/ld/sections.ld
similarity index 97%
rename from tools/sdk/esp32c3/ld/esp32c3.project.ld
rename to tools/sdk/esp32c3/ld/sections.ld
index 7bce8090..fca4b594 100644
--- a/tools/sdk/esp32c3/ld/esp32c3.project.ld
+++ b/tools/sdk/esp32c3/ld/sections.ld
@@ -1,6 +1,6 @@
 /* Automatically generated file; DO NOT EDIT */
 /* Espressif IoT Development Framework Linker Script */
-/* Generated from: /Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/esp32c3/ld/esp32c3.project.ld.in */
+/* Generated from: /home/runner/work/esp32-arduino-lib-builder/esp32-arduino-lib-builder/esp-idf/components/esp_system/ld/esp32c3/sections.ld.in */
 
 /* Default entry point */
 ENTRY(call_start_cpu0);
@@ -57,8 +57,6 @@ SECTIONS
    * data/rodata, including from any source file
    * named rtc_wake_stub*.c and the data marked with
    * RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
-   * The memory location of the data is dependent on
-   * CONFIG_ESP32C3_RTCDATA_IN_FAST_MEM option.
    */
   .rtc.data :
   {
@@ -91,7 +89,6 @@ SECTIONS
    * and will be retained during deep sleep.
    * User data marked with RTC_NOINIT_ATTR will be placed
    * into this section. See the file "esp_attr.h" for more information.
-   * The memory location of the data is dependent on CONFIG_ESP32C3_RTCDATA_IN_FAST_MEM option.
    */
   .rtc_noinit (NOLOAD):
   {
@@ -306,8 +303,8 @@ SECTIONS
     _bss_start = ABSOLUTE(.);
 
     *(.bss .bss.*)
-    *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
     *(.ext_ram.bss .ext_ram.bss.*)
+    *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
     *(COMMON)
     _bt_bss_start = ABSOLUTE(.);
     *libbt.a:(.bss .bss.* COMMON)
@@ -431,9 +428,6 @@ SECTIONS
     *(.gcc_except_table .gcc_except_table.*)
     *(.gnu.linkonce.e.*)
     *(.gnu.version_r)
-    . = (. + 3) & ~ 3;
-    __eh_frame = ABSOLUTE(.);
-    KEEP(*(.eh_frame))
     . = (. + 7) & ~ 3;
     /*
      * C++ constructor and destructor tables
@@ -484,7 +478,27 @@ SECTIONS
     *(.srodata.*)
     _thread_local_end = ABSOLUTE(.);
     _rodata_reserved_end = ABSOLUTE(.);
-    . = ALIGN(4);
+    . = ALIGN(ALIGNOF(.eh_frame));
+  } > default_rodata_seg
+
+  /* Keep this section shall be at least aligned on 4 */
+  .eh_frame : ALIGN(8)
+  {
+    __eh_frame = ABSOLUTE(.);
+    KEEP (*(.eh_frame))
+    __eh_frame_end = ABSOLUTE(.);
+    /* Guarantee that this section and the next one will be merged by making
+     * them adjacent. */
+    . = ALIGN(ALIGNOF(.eh_frame_hdr));
+  } > default_rodata_seg
+
+  /* To avoid any exception in C++ exception frame unwinding code, this section
+   * shall be aligned on 8. */
+  .eh_frame_hdr : ALIGN(8)
+  {
+    __eh_frame_hdr = ABSOLUTE(.);
+    KEEP (*(.eh_frame_hdr))
+    __eh_frame_hdr_end = ABSOLUTE(.);
   } > default_rodata_seg
 
   .flash.rodata_noload (NOLOAD) :
diff --git a/tools/sdk/esp32c3/lib/libapp_trace.a b/tools/sdk/esp32c3/lib/libapp_trace.a
index 0349837b..a34c8f64 100644
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diff --git a/tools/sdk/esp32c3/lib/libapp_update.a b/tools/sdk/esp32c3/lib/libapp_update.a
index d92a7803..1067acf0 100644
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diff --git a/tools/sdk/esp32c3/lib/libasio.a b/tools/sdk/esp32c3/lib/libasio.a
index dc387c9b..3b5e286f 100644
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diff --git a/tools/sdk/esp32c3/lib/libbootloader_support.a b/tools/sdk/esp32c3/lib/libbootloader_support.a
index 16e047b9..8df3f29d 100644
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diff --git a/tools/sdk/esp32c3/lib/libbt.a b/tools/sdk/esp32c3/lib/libbt.a
index 925b612d..1da513fa 100644
Binary files a/tools/sdk/esp32c3/lib/libbt.a and b/tools/sdk/esp32c3/lib/libbt.a differ
diff --git a/tools/sdk/esp32c3/lib/libcbor.a b/tools/sdk/esp32c3/lib/libcbor.a
index 5c6097e5..450982ca 100644
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diff --git a/tools/sdk/esp32c3/lib/libcmock.a b/tools/sdk/esp32c3/lib/libcmock.a
index 560ec07f..83c28caa 100644
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diff --git a/tools/sdk/esp32c3/lib/libcoap.a b/tools/sdk/esp32c3/lib/libcoap.a
index 76d67743..8237ecd6 100644
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diff --git a/tools/sdk/esp32c3/lib/libconsole.a b/tools/sdk/esp32c3/lib/libconsole.a
index 91c33b51..756dc0fe 100644
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diff --git a/tools/sdk/esp32c3/lib/libcxx.a b/tools/sdk/esp32c3/lib/libcxx.a
index ef3371c4..54097a0d 100644
Binary files a/tools/sdk/esp32c3/lib/libcxx.a and b/tools/sdk/esp32c3/lib/libcxx.a differ
diff --git a/tools/sdk/esp32c3/lib/libdriver.a b/tools/sdk/esp32c3/lib/libdriver.a
index c9e35082..0a9452b0 100644
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diff --git a/tools/sdk/esp32c3/lib/libefuse.a b/tools/sdk/esp32c3/lib/libefuse.a
index 16ff859b..82e146db 100644
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diff --git a/tools/sdk/esp32c3/lib/libesp-tls.a b/tools/sdk/esp32c3/lib/libesp-tls.a
index a6f2e74d..1024583b 100644
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diff --git a/tools/sdk/esp32c3/lib/libesp32c3.a b/tools/sdk/esp32c3/lib/libesp32c3.a
deleted file mode 100644
index a4c61b60..00000000
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diff --git a/tools/sdk/esp32c3/lib/libesp_adc_cal.a b/tools/sdk/esp32c3/lib/libesp_adc_cal.a
index 18938152..e1c5cb80 100644
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diff --git a/tools/sdk/esp32c3/lib/libesp_common.a b/tools/sdk/esp32c3/lib/libesp_common.a
index 1930b5a8..b3c60865 100644
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diff --git a/tools/sdk/esp32c3/lib/libesp_eth.a b/tools/sdk/esp32c3/lib/libesp_eth.a
index 71abe822..c7224bd7 100644
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diff --git a/tools/sdk/esp32c3/lib/libesp_event.a b/tools/sdk/esp32c3/lib/libesp_event.a
index 16beee12..6731890e 100644
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diff --git a/tools/sdk/esp32c3/lib/libwifi_provisioning.a b/tools/sdk/esp32c3/lib/libwifi_provisioning.a
index 43290e93..53296937 100644
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diff --git a/tools/sdk/esp32c3/lib/libwpa_supplicant.a b/tools/sdk/esp32c3/lib/libwpa_supplicant.a
index 231fa073..7d4dd17f 100644
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diff --git a/tools/sdk/esp32c3/sdkconfig b/tools/sdk/esp32c3/sdkconfig
index 961c53d3..616ed46e 100644
--- a/tools/sdk/esp32c3/sdkconfig
+++ b/tools/sdk/esp32c3/sdkconfig
@@ -756,6 +756,7 @@ CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y
 CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE=y
 CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y
 CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y
+# CONFIG_ESP_SYSTEM_USE_EH_FRAME is not set
 
 #
 # Memory protection
@@ -893,6 +894,7 @@ CONFIG_FMB_SERIAL_BUF_SIZE=256
 CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB=8
 CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS=1000
 CONFIG_FMB_PORT_TASK_PRIO=10
+CONFIG_FMB_PORT_TASK_AFFINITY=0x7FFFFFFF
 CONFIG_FMB_CONTROLLER_SLAVE_ID_SUPPORT=y
 CONFIG_FMB_CONTROLLER_SLAVE_ID=0x00112233
 CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT=20
@@ -1204,6 +1206,8 @@ CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y
 # CONFIG_MBEDTLS_SSL_PROTO_DTLS is not set
 CONFIG_MBEDTLS_SSL_ALPN=y
 CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y
+CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE=y
+CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE=y
 CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y
 
 #
diff --git a/tools/sdk/esp32s2/bin/bootloader_dio_40m.bin b/tools/sdk/esp32s2/bin/bootloader_dio_40m.bin
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index 28709e31..0f50b9b9 100644
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diff --git a/tools/sdk/esp32s2/bin/bootloader_dout_40m.bin b/tools/sdk/esp32s2/bin/bootloader_dout_40m.bin
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diff --git a/tools/sdk/esp32s2/bin/bootloader_qio_40m.bin b/tools/sdk/esp32s2/bin/bootloader_qio_40m.bin
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diff --git a/tools/sdk/esp32s2/bin/bootloader_qout_40m.bin b/tools/sdk/esp32s2/bin/bootloader_qout_40m.bin
index 1c9b1ca0..cf7d987a 100644
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diff --git a/tools/sdk/esp32s2/bin/bootloader_qout_80m.bin b/tools/sdk/esp32s2/bin/bootloader_qout_80m.bin
index b05fdd0e..b25fc18f 100644
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diff --git a/tools/sdk/esp32s2/include/app_update/include/esp_ota_ops.h b/tools/sdk/esp32s2/include/app_update/include/esp_ota_ops.h
index ee29cdac..6278ab79 100644
--- a/tools/sdk/esp32s2/include/app_update/include/esp_ota_ops.h
+++ b/tools/sdk/esp32s2/include/app_update/include/esp_ota_ops.h
@@ -14,6 +14,7 @@
 #include "esp_partition.h"
 #include "esp_image_format.h"
 #include "esp_flash_partitions.h"
+#include "soc/soc_caps.h"
 
 #ifdef __cplusplus
 extern "C"
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu.h
index 18de3bf9..114c827b 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu.h
@@ -36,6 +36,7 @@
 //--------------------------------------------------------------------+
 // Common Definitions
 //--------------------------------------------------------------------+
+
 // DFU Protocol
 typedef enum
 {
@@ -77,28 +78,28 @@ typedef enum {
 
 // DFU Status
 typedef enum {
-  DFU_STATUS_OK              = 0x00,
-  DFU_STATUS_ERRTARGET       = 0x01,
-  DFU_STATUS_ERRFILE         = 0x02,
-  DFU_STATUS_ERRWRITE        = 0x03,
-  DFU_STATUS_ERRERASE        = 0x04,
-  DFU_STATUS_ERRCHECK_ERASED = 0x05,
-  DFU_STATUS_ERRPROG         = 0x06,
-  DFU_STATUS_ERRVERIFY       = 0x07,
-  DFU_STATUS_ERRADDRESS      = 0x08,
-  DFU_STATUS_ERRNOTDONE      = 0x09,
-  DFU_STATUS_ERRFIRMWARE     = 0x0A,
-  DFU_STATUS_ERRVENDOR       = 0x0B,
-  DFU_STATUS_ERRUSBR         = 0x0C,
-  DFU_STATUS_ERRPOR          = 0x0D,
-  DFU_STATUS_ERRUNKNOWN      = 0x0E,
-  DFU_STATUS_ERRSTALLEDPKT   = 0x0F,
-} dfu_device_status_t;
+  DFU_STATUS_OK               = 0x00,
+  DFU_STATUS_ERR_TARGET       = 0x01,
+  DFU_STATUS_ERR_FILE         = 0x02,
+  DFU_STATUS_ERR_WRITE        = 0x03,
+  DFU_STATUS_ERR_ERASE        = 0x04,
+  DFU_STATUS_ERR_CHECK_ERASED = 0x05,
+  DFU_STATUS_ERR_PROG         = 0x06,
+  DFU_STATUS_ERR_VERIFY       = 0x07,
+  DFU_STATUS_ERR_ADDRESS      = 0x08,
+  DFU_STATUS_ERR_NOTDONE      = 0x09,
+  DFU_STATUS_ERR_FIRMWARE     = 0x0A,
+  DFU_STATUS_ERR_VENDOR       = 0x0B,
+  DFU_STATUS_ERR_USBR         = 0x0C,
+  DFU_STATUS_ERR_POR          = 0x0D,
+  DFU_STATUS_ERR_UNKNOWN      = 0x0E,
+  DFU_STATUS_ERR_STALLEDPKT   = 0x0F,
+} dfu_status_t;
 
-#define DFU_FUNC_ATTR_CAN_DOWNLOAD_BITMASK              (1 << 0)
-#define DFU_FUNC_ATTR_CAN_UPLOAD_BITMASK                (1 << 1)
-#define DFU_FUNC_ATTR_MANIFESTATION_TOLERANT_BITMASK    (1 << 2)
-#define DFU_FUNC_ATTR_WILL_DETACH_BITMASK               (1 << 3)
+#define DFU_ATTR_CAN_DOWNLOAD              (1u << 0)
+#define DFU_ATTR_CAN_UPLOAD                (1u << 1)
+#define DFU_ATTR_MANIFESTATION_TOLERANT    (1u << 2)
+#define DFU_ATTR_WILL_DETACH               (1u << 3)
 
 // DFU Status Request Payload
 typedef struct TU_ATTR_PACKED
@@ -107,9 +108,9 @@ typedef struct TU_ATTR_PACKED
   uint8_t bwPollTimeout[3];
   uint8_t bState;
   uint8_t iString;
-} dfu_status_req_payload_t;
+} dfu_status_response_t;
 
-TU_VERIFY_STATIC( sizeof(dfu_status_req_payload_t) == 6, "size is not correct");
+TU_VERIFY_STATIC( sizeof(dfu_status_response_t) == 6, "size is not correct");
 
 #ifdef __cplusplus
  }
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu_device.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu_device.h
index 9a09a46b..fecf8596 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu_device.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu_device.h
@@ -33,38 +33,54 @@
   extern "C" {
 #endif
 
+//--------------------------------------------------------------------+
+// Class Driver Default Configure & Validation
+//--------------------------------------------------------------------+
+
+#if !defined(CFG_TUD_DFU_XFER_BUFSIZE)
+  #error "CFG_TUD_DFU_XFER_BUFSIZE must be defined, it has to be set to the buffer size used in TUD_DFU_DESCRIPTOR"
+#endif
+
+//--------------------------------------------------------------------+
+// Application API
+//--------------------------------------------------------------------+
+
+// Must be called when the application is done with flashing started by
+// tud_dfu_download_cb() and tud_dfu_manifest_cb().
+// status is DFU_STATUS_OK if successful, any other error status will cause state to enter dfuError
+void tud_dfu_finish_flashing(uint8_t status);
 
 //--------------------------------------------------------------------+
 // Application Callback API (weak is optional)
 //--------------------------------------------------------------------+
-// Invoked during DFU_MANIFEST_SYNC get status request to check if firmware
-// is valid
-bool tud_dfu_firmware_valid_check_cb(void);
 
-// Invoked when a DFU_DNLOAD request is received
-// This callback takes the wBlockNum chunk of length length and provides it
-// to the application at the data pointer.  This data is only valid for this
-// call, so the app must use it not or copy it.
-void tud_dfu_req_dnload_data_cb(uint16_t wBlockNum, uint8_t* data, uint16_t length);
+// Note: alt is used as the partition number, in order to support multiple partitions like FLASH, EEPROM, etc.
 
-// Must be called when the application is done using the last block of data
-// provided by tud_dfu_req_dnload_data_cb
-void tud_dfu_dnload_complete(void);
+// Invoked right before tud_dfu_download_cb() (state=DFU_DNBUSY) or tud_dfu_manifest_cb() (state=DFU_MANIFEST)
+// Application return timeout in milliseconds (bwPollTimeout) for the next download/manifest operation.
+// During this period, USB host won't try to communicate with us.
+uint32_t tud_dfu_get_timeout_cb(uint8_t alt, uint8_t state);
 
-// Invoked during the last DFU_DNLOAD request, signifying that the host believes
-// it is done transmitting data.
-// Return true if the application agrees there is no more data
-// Return false if the device disagrees, which will stall the pipe, and the Host
-//              should initiate a recovery procedure
-bool tud_dfu_device_data_done_check_cb(void);
+// Invoked when received DFU_DNLOAD (wLength>0) following by DFU_GETSTATUS (state=DFU_DNBUSY) requests
+// This callback could be returned before flashing op is complete (async).
+// Once finished flashing, application must call tud_dfu_finish_flashing()
+void tud_dfu_download_cb (uint8_t alt, uint16_t block_num, uint8_t const *data, uint16_t length);
+
+// Invoked when download process is complete, received DFU_DNLOAD (wLength=0) following by DFU_GETSTATUS (state=Manifest)
+// Application can do checksum, or actual flashing if buffered entire image previously.
+// Once finished flashing, application must call tud_dfu_finish_flashing()
+void tud_dfu_manifest_cb(uint8_t alt);
+
+// Invoked when received DFU_UPLOAD request
+// Application must populate data with up to length bytes and
+// Return the number of written bytes
+TU_ATTR_WEAK uint16_t tud_dfu_upload_cb(uint8_t alt, uint16_t block_num, uint8_t* data, uint16_t length);
+
+// Invoked when a DFU_DETACH request is received
+TU_ATTR_WEAK void tud_dfu_detach_cb(void);
 
 // Invoked when the Host has terminated a download or upload transfer
-TU_ATTR_WEAK void tud_dfu_abort_cb(void);
-
-// Invoked when a DFU_UPLOAD request is received
-// This callback must populate data with up to length bytes
-// Return the number of bytes to write
-uint16_t tud_dfu_req_upload_data_cb(uint16_t block_num, uint8_t* data, uint16_t length);
+TU_ATTR_WEAK void tud_dfu_abort_cb(uint8_t alt);
 
 //--------------------------------------------------------------------+
 // Internal Class Driver API
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_types.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_types.h
index ec58a318..eab67ebd 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_types.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_types.h
@@ -449,7 +449,7 @@ typedef struct TU_ATTR_PACKED
 /*------------------------------------------------------------------*/
 /* Types
  *------------------------------------------------------------------*/
-typedef struct TU_ATTR_PACKED{
+typedef struct TU_ATTR_PACKED {
   union {
     struct TU_ATTR_PACKED {
       uint8_t recipient :  5; ///< Recipient type tusb_request_recipient_t.
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd.h
index 63e97df9..8bfad9b7 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd.h
@@ -30,11 +30,24 @@
 #include "common/tusb_common.h"
 #include "osal/osal.h"
 #include "common/tusb_fifo.h"
+#include "dcd_attr.h"
 
 #ifdef __cplusplus
  extern "C" {
 #endif
 
+//--------------------------------------------------------------------+
+// Configuration
+//--------------------------------------------------------------------+
+
+#ifndef CFG_TUD_ENDPPOINT_MAX
+  #define CFG_TUD_ENDPPOINT_MAX   DCD_ATTR_ENDPOINT_MAX
+#endif
+
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF PROTYPES
+//--------------------------------------------------------------------+
+
 typedef enum
 {
   DCD_EVENT_INVALID = 0,
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd_attr.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd_attr.h
new file mode 100644
index 00000000..30633564
--- /dev/null
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd_attr.h
@@ -0,0 +1,160 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_DCD_ATTR_H_
+#define TUSB_DCD_ATTR_H_
+
+#include "tusb_option.h"
+
+// Attribute includes
+// - ENDPOINT_MAX: max (logical) number of endpoint
+// - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed,
+//                              e.g EP1 OUT & EP1 IN cannot exist together
+// - PORT_HIGHSPEED: mask to indicate which port support highspeed mode, bit0 for port0 and so on.
+
+//------------- NXP -------------//
+#if   TU_CHECK_MCU(LPC11UXX) || TU_CHECK_MCU(LPC13XX) || TU_CHECK_MCU(LPC15XX)
+  #define DCD_ATTR_ENDPOINT_MAX   5
+
+#elif TU_CHECK_MCU(LPC175X_6X) || TU_CHECK_MCU(LPC177X_8X) || TU_CHECK_MCU(LPC40XX)
+  #define DCD_ATTR_ENDPOINT_MAX   16
+
+#elif TU_CHECK_MCU(LPC18XX) || TU_CHECK_MCU(LPC43XX)
+  // TODO USB0 has 6, USB1 has 4
+  #define DCD_ATTR_ENDPOINT_MAX   6
+
+#elif TU_CHECK_MCU(LPC51UXX)
+   #define DCD_ATTR_ENDPOINT_MAX   5
+
+#elif TU_CHECK_MCU(LPC54XXX)
+  // TODO USB0 has 5, USB1 has 6
+  #define DCD_ATTR_ENDPOINT_MAX   6
+
+#elif TU_CHECK_MCU(LPC55XX)
+  // TODO USB0 has 5, USB1 has 6
+  #define DCD_ATTR_ENDPOINT_MAX   6
+
+#elif TU_CHECK_MCU(MIMXRT10XX)
+  #define DCD_ATTR_ENDPOINT_MAX   8
+
+#elif TU_CHECK_MCU(MKL25ZXX)
+  #define DCD_ATTR_ENDPOINT_MAX   16
+
+//------------- Nordic -------------//
+#elif TU_CHECK_MCU(NRF5X)
+  // 8 CBI + 1 ISO
+  #define DCD_ATTR_ENDPOINT_MAX   9
+
+//------------- Microchip -------------//
+#elif TU_CHECK_MCU(SAMD21) || TU_CHECK_MCU(SAMD51) || TU_CHECK_MCU(SAME5X) || \
+      TU_CHECK_MCU(SAMD11) || TU_CHECK_MCU(SAML21) || TU_CHECK_MCU(SAML22)
+  #define DCD_ATTR_ENDPOINT_MAX   8
+
+#elif TU_CHECK_MCU(SAMG)
+  #define DCD_ATTR_ENDPOINT_MAX   6
+  #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER
+
+#elif TU_CHECK_MCU(SAMX7X)
+  #define DCD_ATTR_ENDPOINT_MAX   10
+  #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER
+
+//------------- ST -------------//
+#elif TU_CHECK_MCU(STM32F0) || TU_CHECK_MCU(STM32F1) || TU_CHECK_MCU(STM32F3) || \
+      TU_CHECK_MCU(STM32L0) || TU_CHECK_MCU(STM32L1) || TU_CHECK_MCU(STM32L4)
+  // F1: F102, F103
+  // L4: L4x2, L4x3
+  #define DCD_ATTR_ENDPOINT_MAX   8
+
+#elif TU_CHECK_MCU(STM32F2) || TU_CHECK_MCU(STM32F4) || TU_CHECK_MCU(STM32F3)
+  // F1: F105, F107 only has 4
+  // L4: L4x5, L4x6 has 6
+  // For most mcu, FS has 4, HS has 6
+  #define DCD_ATTR_ENDPOINT_MAX   6
+
+#elif TU_CHECK_MCU(STM32F7)
+  // FS has 6, HS has 9
+  #define DCD_ATTR_ENDPOINT_MAX   9
+
+#elif TU_CHECK_MCU(STM32H7)
+  #define DCD_ATTR_ENDPOINT_MAX   9
+
+//------------- Sony -------------//
+#elif TU_CHECK_MCU(CXD56)
+  #define DCD_ATTR_ENDPOINT_MAX   7
+  #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER
+
+//------------- TI -------------//
+#elif TU_CHECK_MCU(MSP430x5xx)
+  #define DCD_ATTR_ENDPOINT_MAX   8
+
+//------------- ValentyUSB -------------//
+#elif TU_CHECK_MCU(VALENTYUSB_EPTRI)
+  #define DCD_ATTR_ENDPOINT_MAX   16
+
+//------------- Nuvoton -------------//
+#elif TU_CHECK_MCU(NUC121) || TU_CHECK_MCU(NUC126)
+  #define DCD_ATTR_ENDPOINT_MAX   8
+
+#elif TU_CHECK_MCU(NUC120)
+  #define DCD_ATTR_ENDPOINT_MAX   6
+
+#elif TU_CHECK_MCU(NUC505)
+  #define DCD_ATTR_ENDPOINT_MAX   12
+
+//------------- Espressif -------------//
+#elif TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3)
+  #define DCD_ATTR_ENDPOINT_MAX   6
+
+//------------- Dialog -------------//
+#elif TU_CHECK_MCU(DA1469X)
+  #define DCD_ATTR_ENDPOINT_MAX   4
+
+//------------- Raspberry Pi -------------//
+#elif TU_CHECK_MCU(RP2040)
+  #define DCD_ATTR_ENDPOINT_MAX   16
+
+//------------- Silabs -------------//
+#elif TU_CHECK_MCU(EFM32GG) || TU_CHECK_MCU(EFM32GG11) || TU_CHECK_MCU(EFM32GG12)
+  #define DCD_ATTR_ENDPOINT_MAX   7
+
+//------------- Renesas -------------//
+#elif TU_CHECK_MCU(RX63X) || TU_CHECK_MCU(RX65X)
+  #define DCD_ATTR_ENDPOINT_MAX   10
+
+//#elif TU_CHECK_MCU(MM32F327X)
+//  #define DCD_ATTR_ENDPOINT_MAX not knwon yet
+
+#else
+  #warning "DCD_ATTR_ENDPOINT_MAX is not defined for this MCU, default to 8"
+  #define DCD_ATTR_ENDPOINT_MAX   8
+#endif
+
+// Default to fullspeed if not defined
+//#ifndef PORT_HIGHSPEED
+//  #define DCD_ATTR_PORT_HIGHSPEED 0x00
+//#endif
+
+#endif
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd.h
index 45aefe53..1405f691 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd.h
@@ -24,18 +24,15 @@
  * This file is part of the TinyUSB stack.
  */
 
-/** \ingroup group_usbd
- *  @{ */
-
 #ifndef _TUSB_USBD_H_
 #define _TUSB_USBD_H_
 
+#include "common/tusb_common.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include "common/tusb_common.h"
-
 //--------------------------------------------------------------------+
 // Application API
 //--------------------------------------------------------------------+
@@ -236,7 +233,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
 // Interface number, string index, protocol, report descriptor len, EP In address, size & polling interval
 #define TUD_HID_DESCRIPTOR(_itfnum, _stridx, _boot_protocol, _report_desc_len, _epin, _epsize, _ep_interval) \
   /* Interface */\
-  9, TUSB_DESC_INTERFACE, _itfnum, 0, 1, TUSB_CLASS_HID, (uint8_t)((_boot_protocol) ? HID_SUBCLASS_BOOT : 0), _boot_protocol, _stridx,\
+  9, TUSB_DESC_INTERFACE, _itfnum, 0, 1, TUSB_CLASS_HID, (uint8_t)((_boot_protocol) ? (uint8_t)HID_SUBCLASS_BOOT : 0), _boot_protocol, _stridx,\
   /* HID descriptor */\
   9, HID_DESC_TYPE_HID, U16_TO_U8S_LE(0x0111), 0, 1, HID_DESC_TYPE_REPORT, U16_TO_U8S_LE(_report_desc_len),\
   /* Endpoint In */\
@@ -249,7 +246,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
 // Interface number, string index, protocol, report descriptor len, EP OUT & IN address, size & polling interval
 #define TUD_HID_INOUT_DESCRIPTOR(_itfnum, _stridx, _boot_protocol, _report_desc_len, _epout, _epin, _epsize, _ep_interval) \
   /* Interface */\
-  9, TUSB_DESC_INTERFACE, _itfnum, 0, 2, TUSB_CLASS_HID, (uint8_t)((_boot_protocol) ? HID_SUBCLASS_BOOT : 0), _boot_protocol, _stridx,\
+  9, TUSB_DESC_INTERFACE, _itfnum, 0, 2, TUSB_CLASS_HID, (uint8_t)((_boot_protocol) ? (uint8_t)HID_SUBCLASS_BOOT : 0), _boot_protocol, _stridx,\
   /* HID descriptor */\
   9, HID_DESC_TYPE_HID, U16_TO_U8S_LE(0x0111), 0, 1, HID_DESC_TYPE_REPORT, U16_TO_U8S_LE(_report_desc_len),\
   /* Endpoint Out */\
@@ -605,17 +602,51 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
   /* Function */ \
   9, DFU_DESC_FUNCTIONAL, _attr, U16_TO_U8S_LE(_timeout), U16_TO_U8S_LE(_xfer_size), U16_TO_U8S_LE(0x0101)
 
-// Length of template descriptr: 18 bytes
-#define TUD_DFU_MODE_DESC_LEN (9 + 9)
+// Length of template descriptor: 9 bytes + number of alternatives * 9
+#define TUD_DFU_DESC_LEN(_alt_count)    (9 + (_alt_count) * 9)
 
-// DFU runtime descriptor
-// Interface number, string index, attributes, detach timeout, transfer size
-#define TUD_DFU_MODE_DESCRIPTOR(_itfnum, _stridx, _attr, _timeout, _xfer_size) \
-  /* Interface */ \
-  9, TUSB_DESC_INTERFACE, _itfnum, 0, 0, TUD_DFU_APP_CLASS, TUD_DFU_APP_SUBCLASS, DFU_PROTOCOL_DFU, _stridx, \
+// Interface number, Alternate count, starting string index, attributes, detach timeout, transfer size
+// Note: Alternate count must be numberic or macro, string index is increased by one for each Alt interface
+#define TUD_DFU_DESCRIPTOR(_itfnum, _alt_count, _stridx, _attr, _timeout, _xfer_size) \
+  TU_XSTRCAT(_TUD_DFU_ALT_,_alt_count)(_itfnum, 0, _stridx), \
   /* Function */ \
   9, DFU_DESC_FUNCTIONAL, _attr, U16_TO_U8S_LE(_timeout), U16_TO_U8S_LE(_xfer_size), U16_TO_U8S_LE(0x0101)
 
+#define _TUD_DFU_ALT(_itfnum, _alt, _stridx) \
+  /* Interface */ \
+  9, TUSB_DESC_INTERFACE, _itfnum, _alt, 0, TUD_DFU_APP_CLASS, TUD_DFU_APP_SUBCLASS, DFU_PROTOCOL_DFU, _stridx
+
+#define _TUD_DFU_ALT_1(_itfnum, _alt_count, _stridx) \
+  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx)
+
+#define _TUD_DFU_ALT_2(_itfnum, _alt_count, _stridx) \
+  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  _TUD_DFU_ALT_1(_itfnum, _alt_count+1, _stridx+1)
+
+#define _TUD_DFU_ALT_3(_itfnum, _alt_count, _stridx) \
+  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  _TUD_DFU_ALT_2(_itfnum, _alt_count+1, _stridx+1)
+
+#define _TUD_DFU_ALT_4(_itfnum, _alt_count, _stridx) \
+  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  _TUD_DFU_ALT_3(_itfnum, _alt_count+1, _stridx+1)
+
+#define _TUD_DFU_ALT_5(_itfnum, _alt_count, _stridx) \
+  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  _TUD_DFU_ALT_4(_itfnum, _alt_count+1, _stridx+1)
+
+#define _TUD_DFU_ALT_6(_itfnum, _alt_count, _stridx) \
+  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  _TUD_DFU_ALT_5(_itfnum, _alt_count+1, _stridx+1)
+
+#define _TUD_DFU_ALT_7(_itfnum, _alt_count, _stridx) \
+  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  _TUD_DFU_ALT_6(_itfnum, _alt_count+1, _stridx+1)
+
+#define _TUD_DFU_ALT_8(_itfnum, _alt_count, _stridx) \
+  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  _TUD_DFU_ALT_7(_itfnum, _alt_count+1, _stridx+1)
+
 
 //------------- CDC-ECM -------------//
 
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb.h
index 2b1d7483..b52f8839 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb.h
@@ -96,7 +96,7 @@
     #include "class/dfu/dfu_rt_device.h"
   #endif
 
-  #if CFG_TUD_DFU_MODE
+  #if CFG_TUD_DFU
     #include "class/dfu/dfu_device.h"
   #endif
 
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb_option.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb_option.h
index bf7591dc..6651eb83 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb_option.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb_option.h
@@ -32,9 +32,11 @@
 #define TUSB_VERSION_REVISION  1
 #define TUSB_VERSION_STRING    TU_STRING(TUSB_VERSION_MAJOR) "." TU_STRING(TUSB_VERSION_MINOR) "." TU_STRING(TUSB_VERSION_REVISION)
 
-/** \defgroup group_mcu Supported MCU
- * \ref CFG_TUSB_MCU must be defined to one of these
- *  @{ */
+//--------------------------------------------------------------------+
+// Supported MCUs
+// CFG_TUSB_MCU must be defined to one of following value
+//--------------------------------------------------------------------+
+#define TU_CHECK_MCU(_m)            (CFG_TUSB_MCU == OPT_MCU_##_m)
 
 #define OPT_MCU_NONE                0
 
@@ -62,6 +64,7 @@
 #define OPT_MCU_SAMD11            204 ///< MicroChip SAMD11
 #define OPT_MCU_SAML22            205 ///< MicroChip SAML22
 #define OPT_MCU_SAML21            206 ///< MicroChip SAML21
+#define OPT_MCU_SAMX7X            207 ///< MicroChip SAME70, S70, V70, V71 family
 
 // STM32
 #define OPT_MCU_STM32F0           300 ///< ST STM32F0
@@ -118,18 +121,16 @@
 // Mind Motion
 #define OPT_MCU_MM32F327X        1500 ///< Mind Motion MM32F327
 
-/** @} */
+//--------------------------------------------------------------------+
+// Supported OS
+//--------------------------------------------------------------------+
 
-/** \defgroup group_supported_os Supported RTOS
- *  \ref CFG_TUSB_OS must be defined to one of these
- *  @{ */
 #define OPT_OS_NONE       1  ///< No RTOS
 #define OPT_OS_FREERTOS   2  ///< FreeRTOS
 #define OPT_OS_MYNEWT     3  ///< Mynewt OS
 #define OPT_OS_CUSTOM     4  ///< Custom OS is implemented by application
 #define OPT_OS_PICO       5  ///< Raspberry Pi Pico SDK
 #define OPT_OS_RTTHREAD   6  ///< RT-Thread
-/** @} */
 
 // Allow to use command line to change the config name/location
 #ifdef CFG_TUSB_CONFIG_FILE
@@ -138,10 +139,6 @@
   #include "tusb_config.h"
 #endif
 
-/** \addtogroup group_configuration
- *  @{ */
-
-
 //--------------------------------------------------------------------
 // RootHub Mode Configuration
 // CFG_TUSB_RHPORTx_MODE contains operation mode and speed for that port
@@ -249,12 +246,8 @@
   #define CFG_TUD_DFU_RUNTIME     0
 #endif
 
-#ifndef CFG_TUD_DFU_MODE
-  #define CFG_TUD_DFU_MODE        0
-#endif
-
-#ifndef CFG_TUD_DFU_TRANSFER_BUFFER_SIZE
-  #define CFG_TUD_DFU_TRANSFER_BUFFER_SIZE  64
+#ifndef CFG_TUD_DFU
+  #define CFG_TUD_DFU             0
 #endif
 
 #ifndef CFG_TUD_NET
@@ -276,7 +269,7 @@
 
   //------------- HUB CLASS -------------//
   #if CFG_TUH_HUB && (CFG_TUSB_HOST_DEVICE_MAX == 1)
-    #error there is no benefit enable hub with max device is 1. Please disable hub or increase CFG_TUSB_HOST_DEVICE_MAX
+    #error There is no benefit enable hub with max device is 1. Please disable hub or increase CFG_TUSB_HOST_DEVICE_MAX
   #endif
 
   #ifndef CFG_TUH_ENUMERATION_BUFSIZE
@@ -287,12 +280,11 @@
 #endif // TUSB_OPT_HOST_ENABLED
 
 //--------------------------------------------------------------------+
-// Port Options
-// TUP for TinyUSB Port (can be renamed)
+// Port Specific
+// TUP stand for TinyUSB Port (can be renamed)
 //--------------------------------------------------------------------+
 
-// TUP_ARCH_STRICT_ALIGN if arch cannot access unaligned memory
-
+//------------- Unaligned Memory -------------//
 
 // ARMv7+ (M3-M7, M23-M33) can access unaligned memory
 #if (defined(__ARM_ARCH) && (__ARM_ARCH >= 7))
@@ -311,6 +303,7 @@
   #define TUP_MCU_STRICT_ALIGN   0
 #endif
 
+
 //------------------------------------------------------------------
 // Configuration Validation
 //------------------------------------------------------------------
diff --git a/tools/sdk/esp32s2/include/bootloader_support/include/bootloader_common.h b/tools/sdk/esp32s2/include/bootloader_support/include/bootloader_common.h
index 3fb97c65..2ff0e595 100644
--- a/tools/sdk/esp32s2/include/bootloader_support/include/bootloader_common.h
+++ b/tools/sdk/esp32s2/include/bootloader_support/include/bootloader_common.h
@@ -8,7 +8,8 @@
 #include "esp_flash_partitions.h"
 #include "esp_image_format.h"
 #include "esp_app_format.h"
-// RESET_REASON is declared in rom/rtc.h
+// [refactor-todo]: we shouldn't expose ROM header files in a public API header, remove them in v5.0
+// Tracked in IDF-1968
 #if CONFIG_IDF_TARGET_ESP32
 #include "esp32/rom/rtc.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
@@ -62,18 +63,37 @@ bool bootloader_common_ota_select_valid(const esp_ota_select_entry_t *s);
 bool bootloader_common_ota_select_invalid(const esp_ota_select_entry_t *s);
 
 /**
- * @brief Check if the GPIO input is a long hold or a short hold.
+ * @brief Check if a GPIO input is held low for a long period, short period, or not
+ * at all.
+ *
+ * This function will configure the specified GPIO as an input with internal pull-up enabled.
  *
- * Number of the GPIO input will be configured as an input with internal pull-up enabled.
  * If the GPIO input is held low continuously for delay_sec period then it is a long hold.
  * If the GPIO input is held low for less period then it is a short hold.
  *
  * @param[in] num_pin Number of the GPIO input.
  * @param[in] delay_sec Input must be driven low for at least this long, continuously.
- * @return esp_comm_gpio_hold_t Defines type of hold a GPIO in low state.
+ * @return esp_comm_gpio_hold_t Type of low level hold detected, if any.
  */
 esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio(uint32_t num_pin, uint32_t delay_sec);
 
+/**
+ * @brief Check if a GPIO input is held low or high for a long period, short period, or not
+ * at all.
+ *
+ * This function will configure the specified GPIO as an input with internal pull-up enabled.
+ *
+ * If the GPIO input is held at 'level' continuously for delay_sec period then it is a long hold.
+ * If the GPIO input is held at 'level' for less period then it is a short hold.
+ *
+ * @param[in] num_pin Number of the GPIO input.
+ * @param[in] delay_sec Input must be driven to 'level' for at least this long, continuously.
+ * @param[in] level Input pin level to trigger on hold
+ * @return esp_comm_gpio_hold_t Type of hold detected, if any.
+ */
+esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio_level(uint32_t num_pin, uint32_t delay_sec, bool level);
+
+
 /**
  * @brief Erase the partition data that is specified in the transferred list.
  *
diff --git a/tools/sdk/esp32s2/include/config/sdkconfig.h b/tools/sdk/esp32s2/include/config/sdkconfig.h
index eccee02b..a32e423e 100644
--- a/tools/sdk/esp32s2/include/config/sdkconfig.h
+++ b/tools/sdk/esp32s2/include/config/sdkconfig.h
@@ -254,6 +254,7 @@
 #define CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB 8
 #define CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS 1000
 #define CONFIG_FMB_PORT_TASK_PRIO 10
+#define CONFIG_FMB_PORT_TASK_AFFINITY 0x7FFFFFFF
 #define CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT 20
 #define CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE 20
 #define CONFIG_FMB_CONTROLLER_STACK_SIZE 4096
@@ -384,6 +385,8 @@
 #define CONFIG_MBEDTLS_SSL_PROTO_DTLS 1
 #define CONFIG_MBEDTLS_SSL_ALPN 1
 #define CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS 1
+#define CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE 1
+#define CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE 1
 #define CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS 1
 #define CONFIG_MBEDTLS_AES_C 1
 #define CONFIG_MBEDTLS_RC4_DISABLED 1
@@ -583,5 +586,5 @@
 #define CONFIG_TOOLPREFIX CONFIG_SDK_TOOLPREFIX
 #define CONFIG_UDP_RECVMBOX_SIZE CONFIG_LWIP_UDP_RECVMBOX_SIZE
 #define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
-#define CONFIG_ARDUINO_IDF_COMMIT "d93887f9f"
+#define CONFIG_ARDUINO_IDF_COMMIT "c69f0ec32"
 #define CONFIG_ARDUINO_IDF_BRANCH "master"
diff --git a/tools/sdk/esp32s2/include/console/esp_console.h b/tools/sdk/esp32s2/include/console/esp_console.h
index 873f11b6..bd49cd83 100644
--- a/tools/sdk/esp32s2/include/console/esp_console.h
+++ b/tools/sdk/esp32s2/include/console/esp_console.h
@@ -48,6 +48,7 @@ typedef struct {
     uint32_t task_stack_size;      //!< repl task stack size
     uint32_t task_priority;        //!< repl task priority
     const char *prompt;            //!< prompt (NULL represents default: "esp> ")
+    size_t max_cmdline_length;     //!< maximum length of a command line. If 0, default value will be used
 } esp_console_repl_config_t;
 
 /**
@@ -61,6 +62,7 @@ typedef struct {
         .task_stack_size = 4096,          \
         .task_priority = 2,               \
         .prompt = NULL,                   \
+        .max_cmdline_length = 0,          \
 }
 
 /**
diff --git a/tools/sdk/esp32s2/include/console/linenoise/linenoise.h b/tools/sdk/esp32s2/include/console/linenoise/linenoise.h
index 610cacc6..730ba9b5 100644
--- a/tools/sdk/esp32s2/include/console/linenoise/linenoise.h
+++ b/tools/sdk/esp32s2/include/console/linenoise/linenoise.h
@@ -72,6 +72,7 @@ void linenoiseSetDumbMode(int set);
 bool linenoiseIsDumbMode(void);
 void linenoisePrintKeyCodes(void);
 void linenoiseAllowEmpty(bool);
+int linenoiseSetMaxLineLen(size_t len);
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32s2/include/driver/include/driver/i2c.h b/tools/sdk/esp32s2/include/driver/include/driver/i2c.h
index 4a5dcc26..22dcc8ab 100644
--- a/tools/sdk/esp32s2/include/driver/include/driver/i2c.h
+++ b/tools/sdk/esp32s2/include/driver/include/driver/i2c.h
@@ -74,14 +74,15 @@ typedef struct{
 
     union {
         struct {
-            uint32_t clk_speed;     /*!< I2C clock frequency for master mode, (no higher than 1MHz for now) */
-        } master;                   /*!< I2C master config */
+            uint32_t clk_speed;      /*!< I2C clock frequency for master mode, (no higher than 1MHz for now) */
+        } master;                    /*!< I2C master config */
         struct {
-            uint8_t addr_10bit_en;  /*!< I2C 10bit address mode enable for slave mode */
-            uint16_t slave_addr;    /*!< I2C address for slave mode */
-        } slave;                    /*!< I2C slave config */
+            uint8_t addr_10bit_en;   /*!< I2C 10bit address mode enable for slave mode */
+            uint16_t slave_addr;     /*!< I2C address for slave mode */
+            uint32_t maximum_speed;  /*!< I2C expected clock speed from SCL. */
+        } slave;                     /*!< I2C slave config */
     };
-    uint32_t clk_flags;             /*!< Bitwise of ``I2C_SCLK_SRC_FLAG_**FOR_DFS**`` for clk source choice*/
+    uint32_t clk_flags;              /*!< Bitwise of ``I2C_SCLK_SRC_FLAG_**FOR_DFS**`` for clk source choice*/
 } i2c_config_t;
 
 
diff --git a/tools/sdk/esp32s2/include/driver/include/driver/spi_master.h b/tools/sdk/esp32s2/include/driver/include/driver/spi_master.h
index da5f5b52..8582a332 100644
--- a/tools/sdk/esp32s2/include/driver/include/driver/spi_master.h
+++ b/tools/sdk/esp32s2/include/driver/include/driver/spi_master.h
@@ -105,7 +105,7 @@ typedef struct {
 #define SPI_TRANS_VARIABLE_ADDR       (1<<6)  ///< Use the ``address_bits`` in ``spi_transaction_ext_t`` rather than default value in ``spi_device_interface_config_t``.
 #define SPI_TRANS_VARIABLE_DUMMY      (1<<7)  ///< Use the ``dummy_bits`` in ``spi_transaction_ext_t`` rather than default value in ``spi_device_interface_config_t``.
 #define SPI_TRANS_SET_CD              (1<<7)  ///< Set the CD pin
-
+#define SPI_TRANS_CS_KEEP_ACTIVE      (1<<8)  ///< Keep CS active after data transfer
 /**
  * This structure describes one SPI transaction. The descriptor should not be modified until the transaction finishes.
  */
@@ -194,7 +194,8 @@ esp_err_t spi_bus_remove_device(spi_device_handle_t handle);
  * @param ticks_to_wait Ticks to wait until there's room in the queue; use portMAX_DELAY to
  *                      never time out.
  * @return
- *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_DEVICE_CS_KEEP_LOW flag is specified while
+ *                                 the bus was not acquired (`spi_device_acquire_bus()` should be called first)
  *         - ESP_ERR_TIMEOUT       if there was no room in the queue before ticks_to_wait expired
  *         - ESP_ERR_NO_MEM        if allocating DMA-capable temporary buffer failed
  *         - ESP_ERR_INVALID_STATE if previous transactions are not finished
@@ -257,7 +258,8 @@ esp_err_t spi_device_transmit(spi_device_handle_t handle, spi_transaction_t *tra
  *              currently only portMAX_DELAY is supported.
  *
  * @return
- *         - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *         - ESP_ERR_INVALID_ARG   if parameter is invalid. This can happen if SPI_DEVICE_CS_KEEP_LOW flag is specified while
+ *                                 the bus was not acquired (`spi_device_acquire_bus()` should be called first)
  *         - ESP_ERR_TIMEOUT       if the device cannot get control of the bus before ``ticks_to_wait`` expired
  *         - ESP_ERR_NO_MEM        if allocating DMA-capable temporary buffer failed
  *         - ESP_ERR_INVALID_STATE if previous transactions are not finished
diff --git a/tools/sdk/esp32s2/include/driver/include/esp_private/gdma.h b/tools/sdk/esp32s2/include/driver/include/esp_private/gdma.h
index 5b548e08..88a45b56 100644
--- a/tools/sdk/esp32s2/include/driver/include/esp_private/gdma.h
+++ b/tools/sdk/esp32s2/include/driver/include/esp_private/gdma.h
@@ -38,7 +38,8 @@ typedef enum {
     GDMA_TRIG_PERIPH_ADC,  /*!< GDMA trigger peripheral: ADC */
     GDMA_TRIG_PERIPH_DAC,  /*!< GDMA trigger peripheral: DAC */
     GDMA_TRIG_PERIPH_LCD,  /*!< GDMA trigger peripheral: LCD */
-    GDMA_TRIG_PERIPH_CAM   /*!< GDMA trigger peripheral: CAM */
+    GDMA_TRIG_PERIPH_CAM,  /*!< GDMA trigger peripheral: CAM */
+    GDMA_TRIG_PERIPH_RMT,  /*!< GDMA trigger peripheral: RMT */
 } gdma_trigger_peripheral_t;
 
 /**
@@ -58,10 +59,23 @@ typedef struct {
     gdma_channel_handle_t sibling_chan; /*!< DMA sibling channel handle (NULL means having sibling is not necessary) */
     gdma_channel_direction_t direction; /*!< DMA channel direction */
     struct {
-        int reserve_sibling: 1;   /*!< If set, DMA channel allocator would prefer to allocate new channel in a new pair, and reserve sibling channel for future use */
+        int reserve_sibling: 1; /*!< If set, DMA channel allocator would prefer to allocate new channel in a new pair, and reserve sibling channel for future use */
     } flags;
 } gdma_channel_alloc_config_t;
 
+/**
+ * @brief GDMA transfer ability
+ *
+ * @note The alignment set in this structure is **not** a guarantee that gdma driver will take care of the nonalignment cases.
+ *       Actually the GDMA driver has no knowledge about the DMA buffer (address and size) used by upper layer.
+ *       So it's the responsibility of the **upper layer** to take care of the buffer address and size.
+ *
+ */
+typedef struct {
+    size_t sram_trans_align;  /*!< DMA transfer alignment for memory in SRAM, in bytes. The driver enables/disables burst mode based on this value. 0 means no alignment is required */
+    size_t psram_trans_align; /*!< DMA transfer alignment for memory in PSRAM, in bytes. The driver sets proper burst block size based on the alignment value. 0 means no alignment is required */
+} gdma_transfer_ability_t;
+
 /**
  * @brief Type of GDMA event data
  *
@@ -79,6 +93,9 @@ typedef struct {
  * @param event_data GDMA event data
  * @param user_data User registered data from `gdma_register_tx_event_callbacks` or `gdma_register_rx_event_callbacks`
  *
+ * @return Whether a task switch is needed after the callback function returns,
+ *         this is usually due to the callback wakes up some high priority task.
+ *
  */
 typedef bool (*gdma_event_callback_t)(gdma_channel_handle_t dma_chan, gdma_event_data_t *event_data, void *user_data);
 
@@ -171,6 +188,18 @@ esp_err_t gdma_connect(gdma_channel_handle_t dma_chan, gdma_trigger_t trig_perip
  */
 esp_err_t gdma_disconnect(gdma_channel_handle_t dma_chan);
 
+/**
+ * @brief Set DMA channel transfer ability
+ *
+ * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @param[in] ability Transfer ability, e.g. alignment
+ * @return
+ *      - ESP_OK: Set DMA channel transfer ability successfully
+ *      - ESP_ERR_INVALID_ARG: Set DMA channel transfer ability failed because of invalid argument
+ *      - ESP_FAIL: Set DMA channel transfer ability failed because of other error
+ */
+esp_err_t gdma_set_transfer_ability(gdma_channel_handle_t dma_chan, const gdma_transfer_ability_t *ability);
+
 /**
  * @brief Apply channel strategy for GDMA channel
  *
diff --git a/tools/sdk/esp32s2/include/esp_common/include/esp_check.h b/tools/sdk/esp32s2/include/esp_common/include/esp_check.h
index 3ee631c3..524cb376 100644
--- a/tools/sdk/esp32s2/include/esp_common/include/esp_check.h
+++ b/tools/sdk/esp32s2/include/esp_common/include/esp_check.h
@@ -30,7 +30,187 @@ extern "C" {
             return err_rc_;                                                                     \
         }                                                                                       \
     } while(0)
-#else
+
+/**
+ * A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                   \
+        esp_err_t err_rc_ = (x);                                                                \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
+            return err_rc_;                                                                     \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message,
+ * sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                               \
+        esp_err_t err_rc_ = (x);                                                                \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
+            ret = err_rc_;                                                                      \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                           \
+        esp_err_t err_rc_ = (x);                                                                \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
+            ret = err_rc_;                                                                      \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message
+ * and returns with the supplied 'err_code'.
+ */
+#define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                             \
+        if (unlikely(!(a))) {                                                                   \
+            return err_code;                                                                    \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                         \
+        if (unlikely(!(a))) {                                                                   \
+            return err_code;                                                                    \
+        }                                                                                       \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message,
+ * sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                     \
+        if (unlikely(!(a))) {                                                                   \
+            ret = err_code;                                                                     \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while (0)
+
+/**
+ * A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                 \
+        if (unlikely(!(a))) {                                                                   \
+            ret = err_code;                                                                     \
+            goto goto_tag;                                                                      \
+        }                                                                                       \
+    } while (0)
+
+#else // !CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT
+
+/**
+ * In the future, we want to switch to C++20. We also want to become compatible with clang.
+ * Hence, we provide two versions of the following macros. The first one is using the GNU extension \#\#__VA_ARGS__.
+ * The second one is using the C++20 feature __VA_OPT__(,). This allows users to compile their code with
+ * standard C++20 enabled instead of the GNU extension. Below C++20, we haven't found any good alternative to
+ * using \#\#__VA_ARGS__.
+ */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message and returns.
+ */
+#define ESP_RETURN_ON_ERROR(x, log_tag, format, ...) do {                                                  \
+        esp_err_t err_rc_ = (x);                                                                           \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                                 \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            return err_rc_;                                                                                \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                              \
+        esp_err_t err_rc_ = (x);                                                                           \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                                 \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);  \
+            return err_rc_;                                                                                \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message,
+ * sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                                          \
+        esp_err_t err_rc_ = (x);                                                                           \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                                 \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            ret = err_rc_;                                                                                 \
+            goto goto_tag;                                                                                 \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                                      \
+        esp_err_t err_rc_ = (x);                                                                           \
+        if (unlikely(err_rc_ != ESP_OK)) {                                                                 \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);  \
+            ret = err_rc_;                                                                                 \
+            goto goto_tag;                                                                                 \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message
+ * and returns with the supplied 'err_code'.
+ */
+#define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                                        \
+        if (unlikely(!(a))) {                                                                              \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            return err_code;                                                                               \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                                    \
+        if (unlikely(!(a))) {                                                                              \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);  \
+            return err_code;                                                                               \
+        }                                                                                                  \
+    } while(0)
+
+/**
+ * Macro which can be used to check the condition. If the condition is not 'true', it prints the message,
+ * sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
+ */
+#define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                                \
+        if (unlikely(!(a))) {                                                                              \
+            ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);        \
+            ret = err_code;                                                                                \
+            goto goto_tag;                                                                                 \
+        }                                                                                                  \
+    } while (0)
+
+/**
+ * A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
+ */
+#define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                            \
+        if (unlikely(!(a))) {                                                                              \
+            ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__);  \
+            ret = err_code;                                                                                \
+            goto goto_tag;                                                                                 \
+        }                                                                                                  \
+    } while (0)
+
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
+
+/**
+ * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message and returns.
+ */
 #define ESP_RETURN_ON_ERROR(x, log_tag, format, ...) do {                                       \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
@@ -38,19 +218,10 @@ extern "C" {
             return err_rc_;                                                                     \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                   \
-        esp_err_t err_rc_ = (x);                                                                \
-        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
-            return err_rc_;                                                                     \
-        }                                                                                       \
-    } while(0)
-#else
 #define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do {                                   \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
@@ -58,21 +229,11 @@ extern "C" {
             return err_rc_;                                                                     \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message,
  * sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                               \
-        esp_err_t err_rc_ = (x);                                                                \
-        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
-            ret = err_rc_;                                                                      \
-            goto goto_tag;                                                                      \
-        }                                                                                       \
-    } while(0)
-#else
 #define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do {                               \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
@@ -81,20 +242,10 @@ extern "C" {
             goto goto_tag;                                                                      \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                           \
-        esp_err_t err_rc_ = (x);                                                                \
-        if (unlikely(err_rc_ != ESP_OK)) {                                                      \
-            ret = err_rc_;                                                                      \
-            goto goto_tag;                                                                      \
-        }                                                                                       \
-    } while(0)
-#else
 #define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do {                           \
         esp_err_t err_rc_ = (x);                                                                \
         if (unlikely(err_rc_ != ESP_OK)) {                                                      \
@@ -103,57 +254,32 @@ extern "C" {
             goto goto_tag;                                                                      \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * Macro which can be used to check the condition. If the condition is not 'true', it prints the message
  * and returns with the supplied 'err_code'.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                             \
-        if (unlikely(!(a))) {                                                                   \
-            return err_code;                                                                    \
-        }                                                                                       \
-    } while(0)
-#else
 #define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do {                             \
         if (unlikely(!(a))) {                                                                   \
             ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);        \
             return err_code;                                                                    \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                         \
-        if (unlikely(!(a))) {                                                                   \
-            return err_code;                                                                    \
-        }                                                                                       \
-    } while(0)
-#else
 #define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do {                         \
         if (unlikely(!(a))) {                                                                   \
             ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);  \
             return err_code;                                                                    \
         }                                                                                       \
     } while(0)
-#endif
 
 /**
  * Macro which can be used to check the condition. If the condition is not 'true', it prints the message,
  * sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                     \
-        if (unlikely(!(a))) {                                                                   \
-            ret = err_code;                                                                     \
-            goto goto_tag;                                                                      \
-        }                                                                                       \
-    } while (0)
-#else
 #define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do {                     \
         if (unlikely(!(a))) {                                                                   \
             ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);        \
@@ -161,19 +287,10 @@ extern "C" {
             goto goto_tag;                                                                      \
         }                                                                                       \
     } while (0)
-#endif
 
 /**
  * A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
  */
-#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
-#define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                 \
-        if (unlikely(!(a))) {                                                                   \
-            ret = err_code;                                                                     \
-            goto goto_tag;                                                                      \
-        }                                                                                       \
-    } while (0)
-#else
 #define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do {                 \
         if (unlikely(!(a))) {                                                                   \
             ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__);  \
@@ -181,7 +298,11 @@ extern "C" {
             goto goto_tag;                                                                      \
         }                                                                                       \
     } while (0)
-#endif
+
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
+
+#endif // !CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT
+
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32s2/include/esp_common/include/esp_err.h b/tools/sdk/esp32s2/include/esp_common/include/esp_err.h
index 1f3b5553..d31bb9a0 100644
--- a/tools/sdk/esp32s2/include/esp_common/include/esp_err.h
+++ b/tools/sdk/esp32s2/include/esp_common/include/esp_err.h
@@ -132,7 +132,7 @@ void _esp_error_check_failed_without_abort(esp_err_t rc, const char *file, int l
  * serial output.
  * In comparison with ESP_ERROR_CHECK(), this prints the same error message but isn't terminating the program.
  */
-#ifdef NDEBUG
+#if defined NDEBUG || defined CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT
 #define ESP_ERROR_CHECK_WITHOUT_ABORT(x) ({                                         \
         esp_err_t err_rc_ = (x);                                                    \
         err_rc_;                                                                    \
diff --git a/tools/sdk/esp32s2/include/esp_eth/include/esp_eth_mac.h b/tools/sdk/esp32s2/include/esp_eth/include/esp_eth_mac.h
index 042c369f..f1e790c7 100644
--- a/tools/sdk/esp32s2/include/esp_eth/include/esp_eth_mac.h
+++ b/tools/sdk/esp32s2/include/esp_eth/include/esp_eth_mac.h
@@ -287,17 +287,98 @@ struct esp_eth_mac_s {
     esp_err_t (*del)(esp_eth_mac_t *mac);
 };
 
+/**
+ * @brief RMII Clock Mode Options
+ *
+ */
+typedef enum {
+    /**
+     * @brief Default values configured using Kconfig are going to be used when "Default" selected.
+     *
+     */
+    EMAC_CLK_DEFAULT,
+
+    /**
+     * @brief Input RMII Clock from external. EMAC Clock GPIO number needs to be configured when this option is selected.
+     *
+     * @note MAC will get RMII clock from outside. Note that ESP32 only supports GPIO0 to input the RMII clock.
+     *
+     */
+    EMAC_CLK_EXT_IN,
+
+    /**
+     * @brief Output RMII Clock from internal APLL Clock. EMAC Clock GPIO number needs to be configured when this option is selected.
+     *
+     */
+    EMAC_CLK_OUT
+} emac_rmii_clock_mode_t;
+
+/**
+ * @brief RMII Clock GPIO number Options
+ *
+ */
+typedef enum {
+    /**
+     * @brief MAC will get RMII clock from outside at this GPIO.
+     *
+     * @note ESP32 only supports GPIO0 to input the RMII clock.
+     *
+     */
+    EMAC_CLK_IN_GPIO = 0,
+
+    /**
+     * @brief Output RMII Clock from internal APLL Clock available at GPIO0
+     *
+     * @note GPIO0 can be set to output a pre-divided PLL clock (test only!). Enabling this option will configure GPIO0 to output a 50MHz clock.
+     * In fact this clock doesn’t have directly relationship with EMAC peripheral. Sometimes this clock won’t work well with your PHY chip.
+     * You might need to add some extra devices after GPIO0 (e.g. inverter). Note that outputting RMII clock on GPIO0 is an experimental practice.
+     * If you want the Ethernet to work with WiFi, don’t select GPIO0 output mode for stability.
+     *
+     */
+    EMAC_APPL_CLK_OUT_GPIO = 0,
+
+    /**
+     * @brief Output RMII Clock from internal APLL Clock available at GPIO16
+     *
+     */
+    EMAC_CLK_OUT_GPIO = 16,
+
+    /**
+     * @brief Inverted Output RMII Clock from internal APLL Clock available at GPIO17
+     *
+     */
+    EMAC_CLK_OUT_180_GPIO = 17
+} emac_rmii_clock_gpio_t;
+
+/**
+ * @brief Ethernet MAC Clock Configuration
+ *
+ */
+typedef union {
+    struct {
+        // MII interface is not fully implemented...
+        // Reserved for GPIO number, clock source, etc. in MII mode
+    } mii; /*!< EMAC MII Clock Configuration */
+    struct {
+        emac_rmii_clock_mode_t clock_mode; /*!< RMII Clock Mode Configuration */
+        emac_rmii_clock_gpio_t clock_gpio; /*!< RMII Clock GPIO Configuration */
+    } rmii; /*!< EMAC RMII Clock Configuration */
+} eth_mac_clock_config_t;
+
+
 /**
 * @brief Configuration of Ethernet MAC object
 *
 */
 typedef struct {
-    uint32_t sw_reset_timeout_ms; /*!< Software reset timeout value (Unit: ms) */
-    uint32_t rx_task_stack_size;  /*!< Stack size of the receive task */
-    uint32_t rx_task_prio;        /*!< Priority of the receive task */
-    int smi_mdc_gpio_num;         /*!< SMI MDC GPIO number, set to -1 could bypass the SMI GPIO configuration */
-    int smi_mdio_gpio_num;        /*!< SMI MDIO GPIO number, set to -1 could bypass the SMI GPIO configuration */
-    uint32_t flags;               /*!< Flags that specify extra capability for mac driver */
+    uint32_t sw_reset_timeout_ms;        /*!< Software reset timeout value (Unit: ms) */
+    uint32_t rx_task_stack_size;         /*!< Stack size of the receive task */
+    uint32_t rx_task_prio;               /*!< Priority of the receive task */
+    int smi_mdc_gpio_num;                /*!< SMI MDC GPIO number, set to -1 could bypass the SMI GPIO configuration */
+    int smi_mdio_gpio_num;               /*!< SMI MDIO GPIO number, set to -1 could bypass the SMI GPIO configuration */
+    uint32_t flags;                      /*!< Flags that specify extra capability for mac driver */
+    eth_data_interface_t interface;      /*!< EMAC Data interface to PHY (MII/RMII) */
+    eth_mac_clock_config_t clock_config; /*!< EMAC Interface clock configuration */
 } eth_mac_config_t;
 
 #define ETH_MAC_FLAG_WORK_WITH_CACHE_DISABLE (1 << 0) /*!< MAC driver can work when cache is disabled */
@@ -307,14 +388,23 @@ typedef struct {
  * @brief Default configuration for Ethernet MAC object
  *
  */
-#define ETH_MAC_DEFAULT_CONFIG()    \
-    {                               \
-        .sw_reset_timeout_ms = 100, \
-        .rx_task_stack_size = 4096, \
-        .rx_task_prio = 15,         \
-        .smi_mdc_gpio_num = 23,     \
-        .smi_mdio_gpio_num = 18,    \
-        .flags = 0,                 \
+#define ETH_MAC_DEFAULT_CONFIG()                          \
+    {                                                     \
+        .sw_reset_timeout_ms = 100,                       \
+        .rx_task_stack_size = 4096,                       \
+        .rx_task_prio = 15,                               \
+        .smi_mdc_gpio_num = 23,                           \
+        .smi_mdio_gpio_num = 18,                          \
+        .flags = 0,                                       \
+        .interface = EMAC_DATA_INTERFACE_RMII,            \
+        .clock_config =                                   \
+        {                                                 \
+            .rmii =                                       \
+            {                                             \
+                .clock_mode = EMAC_CLK_DEFAULT,           \
+                .clock_gpio = EMAC_CLK_IN_GPIO            \
+            }                                             \
+        }                                                 \
     }
 
 #if CONFIG_ETH_USE_ESP32_EMAC
diff --git a/tools/sdk/esp32s2/include/esp_event/include/esp_event.h b/tools/sdk/esp32s2/include/esp_event/include/esp_event.h
index b5d7b14d..2d39422d 100644
--- a/tools/sdk/esp32s2/include/esp_event/include/esp_event.h
+++ b/tools/sdk/esp32s2/include/esp_event/include/esp_event.h
@@ -48,6 +48,7 @@ typedef struct {
  *
  * @return
  *  - ESP_OK: Success
+ *  - ESP_ERR_INVALID_ARG: event_loop_args or event_loop was NULL
  *  - ESP_ERR_NO_MEM: Cannot allocate memory for event loops list
  *  - ESP_FAIL: Failed to create task loop
  *  - Others: Fail
@@ -57,7 +58,7 @@ esp_err_t esp_event_loop_create(const esp_event_loop_args_t *event_loop_args, es
 /**
  * @brief Delete an existing event loop.
  *
- * @param[in] event_loop event loop to delete
+ * @param[in] event_loop event loop to delete, must not be NULL
  *
  * @return
  *  - ESP_OK: Success
@@ -102,7 +103,7 @@ esp_err_t esp_event_loop_delete_default(void);
  * In cases where waiting on the queue times out, ESP_OK is returned and not ESP_ERR_TIMEOUT, since it is
  * normal behavior.
  *
- * @param[in] event_loop event loop to dispatch posted events from
+ * @param[in] event_loop event loop to dispatch posted events from, must not be NULL
  * @param[in] ticks_to_run number of ticks to run the loop
  *
  * @note encountering an unknown event that has been posted to the loop will only generate a warning, not an error.
@@ -158,7 +159,7 @@ esp_err_t esp_event_handler_register(esp_event_base_t event_base,
  * This function behaves in the same manner as esp_event_handler_register, except the additional
  * specification of the event loop to register the handler to.
  *
- * @param[in] event_loop the event loop to register this handler function to
+ * @param[in] event_loop the event loop to register this handler function to, must not be NULL
  * @param[in] event_base the base id of the event to register the handler for
  * @param[in] event_id the id of the event to register the handler for
  * @param[in] event_handler the handler function which gets called when the event is dispatched
@@ -197,7 +198,7 @@ esp_err_t esp_event_handler_register_with(esp_event_loop_handle_t event_loop,
  * Each registration yields a distinct instance object which identifies it over the registration
  * lifetime.
  *
- * @param[in] event_loop the event loop to register this handler function to
+ * @param[in] event_loop the event loop to register this handler function to, must not be NULL
  * @param[in] event_base the base id of the event to register the handler for
  * @param[in] event_id the id of the event to register the handler for
  * @param[in] event_handler the handler function which gets called when the event is dispatched
@@ -263,15 +264,15 @@ esp_err_t esp_event_handler_instance_register(esp_event_base_t event_base,
  * @note This function is obsolete and will be deprecated soon, please use esp_event_handler_instance_unregister()
  *       instead.
  *
- * This function can be used to unregister a handler so that it no longer gets called during dispatch.
- * Handlers can be unregistered for either: (1) specific events, (2) all events of a certain event base,
- * or (3) all events known by the system event loop
+ * Unregisters a handler so it will no longer be called during dispatch.
+ * Handlers can be unregistered for any combination of event_base and event_id which were previously registered.
+ * To unregister a handler, the event_base and event_id arguments must match exactly the arguments passed to
+ * esp_event_handler_register() when that handler was registered. Passing ESP_EVENT_ANY_BASE and/or ESP_EVENT_ANY_ID
+ * will only unregister handlers that were registered with the same wildcard arguments.
  *
- *  - specific events: specify exact event_base and event_id
- *  - all events of a certain base: specify exact event_base and use ESP_EVENT_ANY_ID as the event_id
- *  - all events known by the loop: use ESP_EVENT_ANY_BASE for event_base and ESP_EVENT_ANY_ID as the event_id
- *
- * This function ignores unregistration of handlers that has not been previously registered.
+ * @note When using ESP_EVENT_ANY_ID, handlers registered to specific event IDs using the same base will not be
+ *       unregistered. When using ESP_EVENT_ANY_BASE, events registered to specific bases will also not be
+ *       unregistered. This avoids accidental unregistration of handlers registered by other users or components.
  *
  * @param[in] event_base the base of the event with which to unregister the handler
  * @param[in] event_id the id of the event with which to unregister the handler
@@ -294,7 +295,7 @@ esp_err_t esp_event_handler_unregister(esp_event_base_t event_base,
  * This function behaves in the same manner as esp_event_handler_unregister, except the additional specification of
  * the event loop to unregister the handler with.
  *
- * @param[in] event_loop the event loop with which to unregister this handler function
+ * @param[in] event_loop the event loop with which to unregister this handler function, must not be NULL
  * @param[in] event_base the base of the event with which to unregister the handler
  * @param[in] event_id the id of the event with which to unregister the handler
  * @param[in] event_handler the handler to unregister
@@ -312,17 +313,18 @@ esp_err_t esp_event_handler_unregister_with(esp_event_loop_handle_t event_loop,
 /**
  * @brief Unregister a handler instance from a specific event loop.
  *
- * This function can be used to unregister a handler so that it no longer gets called during dispatch.
- * Handlers can be unregistered for either: (1) specific events, (2) all events of a certain event base,
- * or (3) all events known by the system event loop
+ * Unregisters a handler instance so it will no longer be called during dispatch.
+ * Handler instances can be unregistered for any combination of event_base and event_id which were previously
+ * registered. To unregister a handler instance, the event_base and event_id arguments must match exactly the
+ * arguments passed to esp_event_handler_instance_register() when that handler instance was registered.
+ * Passing ESP_EVENT_ANY_BASE and/or ESP_EVENT_ANY_ID will only unregister handler instances that were registered
+ * with the same wildcard arguments.
  *
- *  - specific events: specify exact event_base and event_id
- *  - all events of a certain base: specify exact event_base and use ESP_EVENT_ANY_ID as the event_id
- *  - all events known by the loop: use ESP_EVENT_ANY_BASE for event_base and ESP_EVENT_ANY_ID as the event_id
+ * @note When using ESP_EVENT_ANY_ID, handlers registered to specific event IDs using the same base will not be
+ *       unregistered. When using ESP_EVENT_ANY_BASE, events registered to specific bases will also not be
+ *       unregistered. This avoids accidental unregistration of handlers registered by other users or components.
  *
- * This function ignores unregistration of handler instances that have not been previously registered.
- *
- * @param[in] event_loop the event loop with which to unregister this handler function
+ * @param[in] event_loop the event loop with which to unregister this handler function, must not be NULL
  * @param[in] event_base the base of the event with which to unregister the handler
  * @param[in] event_id the id of the event with which to unregister the handler
  * @param[in] instance the instance object of the registration to be unregistered
@@ -388,7 +390,7 @@ esp_err_t esp_event_post(esp_event_base_t event_base,
  * This function behaves in the same manner as esp_event_post_to, except the additional specification of the event loop
  * to post the event to.
  *
- * @param[in] event_loop the event loop to post to
+ * @param[in] event_loop the event loop to post to, must not be NULL
  * @param[in] event_base the event base that identifies the event
  * @param[in] event_id the event id that identifies the event
  * @param[in] event_data the data, specific to the event occurence, that gets passed to the handler
@@ -441,7 +443,7 @@ esp_err_t esp_event_isr_post(esp_event_base_t event_base,
 /**
  * @brief Special variant of esp_event_post_to for posting events from interrupt handlers
  *
- * @param[in] event_loop the event loop to post to
+ * @param[in] event_loop the event loop to post to, must not be NULL
  * @param[in] event_base the event base that identifies the event
  * @param[in] event_id the event id that identifies the event
  * @param[in] event_data the data, specific to the event occurence, that gets passed to the handler
diff --git a/tools/sdk/esp32s2/include/esp_http_client/include/esp_http_client.h b/tools/sdk/esp32s2/include/esp_http_client/include/esp_http_client.h
index f6ef1da3..ab7e3c2e 100644
--- a/tools/sdk/esp32s2/include/esp_http_client/include/esp_http_client.h
+++ b/tools/sdk/esp32s2/include/esp_http_client/include/esp_http_client.h
@@ -167,6 +167,7 @@ typedef enum {
 #define ESP_ERR_HTTP_INVALID_TRANSPORT  (ESP_ERR_HTTP_BASE + 5)     /*!< There are no transport support for the input scheme */
 #define ESP_ERR_HTTP_CONNECTING         (ESP_ERR_HTTP_BASE + 6)     /*!< HTTP connection hasn't been established yet */
 #define ESP_ERR_HTTP_EAGAIN             (ESP_ERR_HTTP_BASE + 7)     /*!< Mapping of errno EAGAIN to esp_err_t */
+#define ESP_ERR_HTTP_CONNECTION_CLOSED  (ESP_ERR_HTTP_BASE + 8)     /*!< Read FIN from peer and the connection closed */
 
 /**
  * @brief      Start a HTTP session
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/esp_async_memcpy.h b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_async_memcpy.h
index 67194e44..e95f9638 100644
--- a/tools/sdk/esp32s2/include/esp_hw_support/include/esp_async_memcpy.h
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_async_memcpy.h
@@ -54,8 +54,10 @@ typedef bool (*async_memcpy_isr_cb_t)(async_memcpy_t mcp_hdl, async_memcpy_event
  *
  */
 typedef struct {
-    uint32_t backlog; /*!< Maximum number of streams that can be handled simultaneously */
-    uint32_t flags;   /*!< Extra flags to control async memcpy feature */
+    uint32_t backlog;          /*!< Maximum number of streams that can be handled simultaneously */
+    size_t sram_trans_align;   /*!< DMA transfer alignment (both in size and address) for SRAM memory */
+    size_t psram_trans_align;  /*!< DMA transfer alignment (both in size and address) for PSRAM memory */
+    uint32_t flags;            /*!< Extra flags to control async memcpy feature */
 } async_memcpy_config_t;
 
 /**
@@ -63,9 +65,11 @@ typedef struct {
  *
  */
 #define ASYNC_MEMCPY_DEFAULT_CONFIG() \
-    {                              \
-        .backlog = 8,              \
-        .flags = 0,                \
+    {                                 \
+        .backlog = 8,                 \
+        .sram_trans_align = 0,        \
+        .psram_trans_align = 0,       \
+        .flags = 0,                   \
     }
 
 /**
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/esp_mac.h b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_mac.h
index 0d23d014..75e01ebb 100644
--- a/tools/sdk/esp32s2/include/esp_hw_support/include/esp_mac.h
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_mac.h
@@ -60,7 +60,9 @@ typedef enum {
   * @note If not using a valid OUI, set the "locally administered" bit
   *       (bit value 0x02 in the first byte) to avoid collisions.
   *
-  * @param  mac base MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   *
   * @return ESP_OK on success
   *         ESP_ERR_INVALID_ARG If mac is NULL or is not a unicast MAC
@@ -72,7 +74,9 @@ esp_err_t esp_base_mac_addr_set(const uint8_t *mac);
   *
   * @note If no custom Base MAC has been set, this returns the pre-programmed Espressif base MAC address.
   *
-  * @param  mac base MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   *
   * @return ESP_OK on success
   *         ESP_ERR_INVALID_MAC base MAC address has not been set
@@ -91,7 +95,9 @@ esp_err_t esp_base_mac_addr_get(uint8_t *mac);
   *
   * @note This function is currently only supported on ESP32.
   *
-  * @param  mac  base MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   *
   * @return ESP_OK on success
   *         ESP_ERR_INVALID_VERSION An invalid MAC version field was read from BLK3 of EFUSE
@@ -102,7 +108,9 @@ esp_err_t esp_efuse_mac_get_custom(uint8_t *mac);
 /**
   * @brief  Return base MAC address which is factory-programmed by Espressif in EFUSE.
   *
-  * @param  mac  base MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   *
   * @return ESP_OK on success
   */
@@ -115,12 +123,14 @@ esp_err_t esp_efuse_mac_get_default(uint8_t *mac);
   * Then calculates the MAC address of the specific interface requested,
   * refer to ESP-IDF Programming Guide for the algorithm.
   *
-  * @param  mac  MAC address of the interface, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   * @param  type Type of MAC address to return
   *
   * @return ESP_OK on success
   */
-esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type);
+esp_err_t esp_read_mac(uint8_t *mac, esp_mac_type_t type);
 
 /**
   * @brief Derive local MAC address from universal MAC address.
@@ -133,12 +143,14 @@ esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type);
   * address, then the first octet is XORed with 0x4 in order to create a different
   * locally administered MAC address.
   *
-  * @param  local_mac  Derived local MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes/8 bytes.
+  *         length: 6 bytes for MAC-48
+  *                 8 bytes for EUI-64(used for IEEE 802.15.4)
   * @param  universal_mac  Source universal MAC address, length: 6 bytes.
   *
   * @return ESP_OK on success
   */
-esp_err_t esp_derive_local_mac(uint8_t* local_mac, const uint8_t* universal_mac);
+esp_err_t esp_derive_local_mac(uint8_t *local_mac, const uint8_t *universal_mac);
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/compare_set.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/compare_set.h
index 5a11ab16..ddbaeb7e 100644
--- a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/compare_set.h
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/compare_set.h
@@ -17,7 +17,7 @@
 #include <stdint.h>
 #include <stdbool.h>
 #include "soc/cpu.h"
-#include "soc/soc_memory_layout.h"
+#include "soc/soc_memory_types.h"
 
 #if __XTENSA__
 #include "xtensa/xtruntime.h"
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32/dport_access.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32/dport_access.h
new file mode 100644
index 00000000..4f473940
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32/dport_access.h
@@ -0,0 +1,47 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#include <stdint.h>
+
+#include <sdkconfig.h>
+
+#ifndef _ESP_DPORT_ACCESS_H_
+#define _ESP_DPORT_ACCESS_H_
+
+#include "xtensa/xtruntime.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void esp_dport_access_stall_other_cpu_start(void);
+void esp_dport_access_stall_other_cpu_end(void);
+void esp_dport_access_int_init(void);
+void esp_dport_access_int_pause(void);
+void esp_dport_access_int_resume(void);
+void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
+uint32_t esp_dport_access_reg_read(uint32_t reg);
+uint32_t esp_dport_access_sequence_reg_read(uint32_t reg);
+//This routine does not stop the dport routines in any way that is recoverable. Please
+//only call in case of panic().
+void esp_dport_access_int_abort(void);
+
+#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM)
+#define DPORT_STALL_OTHER_CPU_START()
+#define DPORT_STALL_OTHER_CPU_END()
+#define DPORT_INTERRUPT_DISABLE()
+#define DPORT_INTERRUPT_RESTORE()
+#else
+#define DPORT_STALL_OTHER_CPU_START()   esp_dport_access_stall_other_cpu_start()
+#define DPORT_STALL_OTHER_CPU_END()     esp_dport_access_stall_other_cpu_end()
+#define DPORT_INTERRUPT_DISABLE()       unsigned int intLvl = XTOS_SET_INTLEVEL(CONFIG_ESP32_DPORT_DIS_INTERRUPT_LVL)
+#define DPORT_INTERRUPT_RESTORE()       XTOS_RESTORE_JUST_INTLEVEL(intLvl)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_DPORT_ACCESS_H_ */
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32/himem.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32/himem.h
new file mode 100644
index 00000000..e3e85a4b
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32/himem.h
@@ -0,0 +1,143 @@
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stddef.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//Opaque pointers as handles for ram/range data
+typedef struct esp_himem_ramdata_t *esp_himem_handle_t;
+typedef struct esp_himem_rangedata_t *esp_himem_rangehandle_t;
+
+//ESP32 MMU block size
+#define ESP_HIMEM_BLKSZ (0x8000)
+
+#define ESP_HIMEM_MAPFLAG_RO 1 /*!< Indicates that a mapping will only be read from. Note that this is unused for now. */
+
+/**
+ * @brief Allocate a block in high memory
+ *
+ * @param size Size of the to-be-allocated block, in bytes. Note that this needs to be
+ *             a multiple of the external RAM mmu block size (32K).
+ * @param[out] handle_out Handle to be returned
+ * @returns - ESP_OK if succesful
+ *          - ESP_ERR_NO_MEM if out of memory
+ *          - ESP_ERR_INVALID_SIZE if size is not a multiple of 32K
+ */
+esp_err_t esp_himem_alloc(size_t size, esp_himem_handle_t *handle_out);
+
+
+/**
+ * @brief Allocate a memory region to map blocks into
+ *
+ * This allocates a contiguous CPU memory region that can be used to map blocks
+ * of physical memory into.
+ *
+ * @param size Size of the range to be allocated. Note this needs to be a multiple of
+ *             the external RAM mmu block size (32K).
+ * @param[out] handle_out Handle to be returned
+ * @returns - ESP_OK if succesful
+ *          - ESP_ERR_NO_MEM if out of memory or address space
+ *          - ESP_ERR_INVALID_SIZE if size is not a multiple of 32K
+ */
+esp_err_t esp_himem_alloc_map_range(size_t size, esp_himem_rangehandle_t *handle_out);
+
+/**
+ * @brief Map a block of high memory into the CPUs address space
+ *
+ * This effectively makes the block available for read/write operations.
+ *
+ * @note The region to be mapped needs to have offsets and sizes that are aligned to the
+ *       SPI RAM MMU block size (32K)
+ *
+ * @param handle Handle to the block of memory, as given by esp_himem_alloc
+ * @param range Range handle to map the memory in
+ * @param ram_offset Offset into the block of physical memory of the block to map
+ * @param range_offset Offset into the address range where the block will be mapped
+ * @param len Length of region to map
+ * @param flags One of ESP_HIMEM_MAPFLAG_*
+ * @param[out] out_ptr Pointer to variable to store resulting memory pointer in
+ * @returns - ESP_OK if the memory could be mapped
+ *          - ESP_ERR_INVALID_ARG if offset, range or len aren't MMU-block-aligned (32K)
+ *          - ESP_ERR_INVALID_SIZE if the offsets/lengths don't fit in the allocated memory or range
+ *          - ESP_ERR_INVALID_STATE if a block in the selected ram offset/length is already mapped, or
+ *                                  if a block in the selected range offset/length already has a mapping.
+ */
+esp_err_t esp_himem_map(esp_himem_handle_t handle, esp_himem_rangehandle_t range, size_t ram_offset, size_t range_offset, size_t len, int flags, void **out_ptr);
+
+
+/**
+ * @brief Free a block of physical memory
+ *
+ * This clears out the associated handle making the memory available for re-allocation again.
+ * This will only succeed if none of the memory blocks currently have a mapping.
+ *
+ * @param handle Handle to the block of memory, as given by esp_himem_alloc
+ * @returns - ESP_OK if the memory is succesfully freed
+ *          - ESP_ERR_INVALID_ARG if the handle still is (partially) mapped
+ */
+esp_err_t esp_himem_free(esp_himem_handle_t handle);
+
+
+
+/**
+ * @brief Free a mapping range
+ *
+ * This clears out the associated handle making the range available for re-allocation again.
+ * This will only succeed if none of the range blocks currently are used for a mapping.
+ *
+ * @param handle Handle to the range block, as given by esp_himem_alloc_map_range
+ * @returns - ESP_OK if the memory is succesfully freed
+ *          - ESP_ERR_INVALID_ARG if the handle still is (partially) mapped to
+ */
+esp_err_t esp_himem_free_map_range(esp_himem_rangehandle_t handle);
+
+
+/**
+ * @brief Unmap a region
+ *
+ * @param range Range handle
+ * @param ptr Pointer returned by esp_himem_map
+ * @param len Length of the block to be unmapped. Must be aligned to the SPI RAM MMU blocksize (32K)
+ * @returns - ESP_OK if the memory is succesfully unmapped,
+ *          - ESP_ERR_INVALID_ARG if ptr or len are invalid.
+ */
+esp_err_t esp_himem_unmap(esp_himem_rangehandle_t range, void *ptr, size_t len);
+
+
+/**
+ * @brief Get total amount of memory under control of himem API
+ *
+ * @returns Amount of memory, in bytes
+ */
+size_t esp_himem_get_phys_size(void);
+
+/**
+ * @brief Get free amount of memory under control of himem API
+ *
+ * @returns Amount of free memory, in bytes
+ */
+size_t esp_himem_get_free_size(void);
+
+
+/**
+ * @brief Get amount of SPI memory address space needed for bankswitching
+ *
+ * @note This is also weakly defined in esp32/spiram.c and returns 0 there, so
+ *       if no other function in this file is used, no memory is reserved.
+ *
+ * @returns Amount of reserved area, in bytes
+ */
+size_t esp_himem_reserved_area_size(void);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32/rtc.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32/rtc.h
new file mode 100644
index 00000000..4149546f
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32/rtc.h
@@ -0,0 +1,31 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp32/rtc.h
+ *
+ * This file contains declarations of rtc related functions.
+ */
+
+/**
+ * @brief Get current value of RTC counter in microseconds
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter in microseconds
+ */
+uint64_t esp_rtc_get_time_us(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32/spiram.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32/spiram.h
new file mode 100644
index 00000000..e58712d1
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32/spiram.h
@@ -0,0 +1,115 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+#ifndef __ESP_SPIRAM_H
+#define __ESP_SPIRAM_H
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    ESP_SPIRAM_SIZE_16MBITS = 0,   /*!< SPI RAM size is 16 MBits */
+    ESP_SPIRAM_SIZE_32MBITS = 1,   /*!< SPI RAM size is 32 MBits */
+    ESP_SPIRAM_SIZE_64MBITS = 2,   /*!< SPI RAM size is 64 MBits */
+    ESP_SPIRAM_SIZE_INVALID,       /*!< SPI RAM size is invalid */
+} esp_spiram_size_t;
+
+/**
+ * @brief get SPI RAM size
+ * @return
+ *     - ESP_SPIRAM_SIZE_INVALID if SPI RAM not enabled or not valid
+ *     - SPI RAM size
+ */
+esp_spiram_size_t esp_spiram_get_chip_size(void);
+
+/**
+ * @brief Initialize spiram interface/hardware. Normally called from cpu_start.c.
+ *
+ * @return ESP_OK on success
+ */
+esp_err_t esp_spiram_init(void);
+
+/**
+ * @brief Configure Cache/MMU for access to external SPI RAM.
+ *
+ * Normally this function is called from cpu_start, if CONFIG_SPIRAM_BOOT_INIT
+ * option is enabled. Applications which need to enable SPI RAM at run time
+ * can disable CONFIG_SPIRAM_BOOT_INIT, and call this function later.
+ *
+ * @attention this function must be called with flash cache disabled.
+ */
+void esp_spiram_init_cache(void);
+
+
+/**
+ * @brief Memory test for SPI RAM. Should be called after SPI RAM is initialized and
+ * (in case of a dual-core system) the app CPU is online. This test overwrites the
+ * memory with crap, so do not call after e.g. the heap allocator has stored important
+ * stuff in SPI RAM.
+ *
+ * @return true on success, false on failed memory test
+ */
+bool esp_spiram_test(void);
+
+
+/**
+ * @brief Add the initialized SPI RAM to the heap allocator.
+ */
+esp_err_t esp_spiram_add_to_heapalloc(void);
+
+
+/**
+ * @brief Get the size of the attached SPI RAM chip selected in menuconfig
+ *
+ * @return Size in bytes, or 0 if no external RAM chip support compiled in.
+ */
+size_t esp_spiram_get_size(void);
+
+
+/**
+ * @brief Force a writeback of the data in the SPI RAM cache. This is to be called whenever
+ * cache is disabled, because disabling cache on the ESP32 discards the data in the SPI
+ * RAM cache.
+ *
+ * This is meant for use from within the SPI flash code.
+ */
+void esp_spiram_writeback_cache(void);
+
+
+
+/**
+ * @brief Reserve a pool of internal memory for specific DMA/internal allocations
+ *
+ * @param size Size of reserved pool in bytes
+ *
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NO_MEM when no memory available for pool
+ */
+esp_err_t esp_spiram_reserve_dma_pool(size_t size);
+
+
+/**
+ * @brief If SPI RAM(PSRAM) has been initialized
+ *
+ * @return
+ *          - true SPI RAM has been initialized successfully
+ *          - false SPI RAM hasn't been initialized or initialized failed
+ */
+bool esp_spiram_is_initialized(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //  __ESP_SPIRAM_H
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/dport_access.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/dport_access.h
new file mode 100644
index 00000000..f3f7007a
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/dport_access.h
@@ -0,0 +1,42 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_DPORT_ACCESS_H_
+#define _ESP_DPORT_ACCESS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Read a sequence of DPORT registers to the buffer.
+ *
+ * @param[out] buff_out  Contains the read data.
+ * @param[in]  address   Initial address for reading registers.
+ * @param[in]  num_words The number of words.
+ */
+void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
+
+#define DPORT_STALL_OTHER_CPU_START()
+#define DPORT_STALL_OTHER_CPU_END()
+#define DPORT_INTERRUPT_DISABLE()
+#define DPORT_INTERRUPT_RESTORE()
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_DPORT_ACCESS_H_ */
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/esp_crypto_lock.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/esp_crypto_lock.h
new file mode 100644
index 00000000..3149d346
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/esp_crypto_lock.h
@@ -0,0 +1,76 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Acquire lock for HMAC cryptography peripheral
+ *
+ * Internally also locks the SHA peripheral, as the HMAC depends on the SHA peripheral
+ */
+void esp_crypto_hmac_lock_acquire(void);
+
+/**
+ * @brief Release lock for HMAC cryptography peripheral
+ *
+ * Internally also releases the SHA peripheral, as the HMAC depends on the SHA peripheral
+ */
+void esp_crypto_hmac_lock_release(void);
+
+/**
+ * @brief Acquire lock for DS cryptography peripheral
+ *
+ * Internally also locks the HMAC (which locks SHA), AES and MPI  peripheral, as the DS depends on these peripherals
+ */
+void esp_crypto_ds_lock_acquire(void);
+
+/**
+ * @brief Release lock for DS cryptography peripheral
+ *
+ * Internally also releases the HMAC (which locks SHA), AES and MPI  peripheral, as the DS depends on these peripherals
+ */
+void esp_crypto_ds_lock_release(void);
+
+/**
+ * @brief Acquire lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_acquire(void);
+
+/**
+ * @brief Release lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_release(void);
+
+
+/**
+ * @brief Acquire lock for the mpi cryptography peripheral.
+ *
+ */
+void esp_crypto_mpi_lock_acquire(void);
+
+/**
+ * @brief Release lock for the mpi/rsa cryptography peripheral.
+ *
+ */
+void esp_crypto_mpi_lock_release(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/esp_ds.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/esp_ds.h
new file mode 100644
index 00000000..911e44c8
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/esp_ds.h
@@ -0,0 +1,218 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_hmac.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP32C3_ERR_HW_CRYPTO_DS_HMAC_FAIL           ESP_ERR_HW_CRYPTO_BASE + 0x1 /*!< HMAC peripheral problem */
+#define ESP32C3_ERR_HW_CRYPTO_DS_INVALID_KEY         ESP_ERR_HW_CRYPTO_BASE + 0x2 /*!< given HMAC key isn't correct,
+                                                                                HMAC peripheral problem */
+#define ESP32C3_ERR_HW_CRYPTO_DS_INVALID_DIGEST      ESP_ERR_HW_CRYPTO_BASE + 0x4 /*!< message digest check failed,
+                                                                                result is invalid */
+#define ESP32C3_ERR_HW_CRYPTO_DS_INVALID_PADDING     ESP_ERR_HW_CRYPTO_BASE + 0x5 /*!< padding check failed, but result
+                                                                                   is produced anyway and can be read*/
+
+#define ESP_DS_IV_BIT_LEN 128
+#define ESP_DS_IV_LEN (ESP_DS_IV_BIT_LEN / 8)
+#define ESP_DS_SIGNATURE_MAX_BIT_LEN 3072
+#define ESP_DS_SIGNATURE_MD_BIT_LEN 256
+#define ESP_DS_SIGNATURE_M_PRIME_BIT_LEN 32
+#define ESP_DS_SIGNATURE_L_BIT_LEN 32
+#define ESP_DS_SIGNATURE_PADDING_BIT_LEN 64
+
+/* Length of parameter 'C' stored in flash, in bytes
+   - Operands Y, M and r_bar; each 3072 bits
+   - Operand MD (message digest); 256 bits
+   - Operands M' and L; each 32 bits
+   - Operand beta (padding value; 64 bits
+*/
+#define ESP_DS_C_LEN (((ESP_DS_SIGNATURE_MAX_BIT_LEN * 3 \
+        + ESP_DS_SIGNATURE_MD_BIT_LEN   \
+        + ESP_DS_SIGNATURE_M_PRIME_BIT_LEN   \
+        + ESP_DS_SIGNATURE_L_BIT_LEN   \
+        + ESP_DS_SIGNATURE_PADDING_BIT_LEN) / 8))
+
+typedef struct esp_ds_context esp_ds_context_t;
+
+typedef enum {
+    ESP_DS_RSA_1024 = (1024 / 32) - 1,
+    ESP_DS_RSA_2048 = (2048 / 32) - 1,
+    ESP_DS_RSA_3072 = (3072 / 32) - 1
+} esp_digital_signature_length_t;
+
+/**
+ * Encrypted private key data. Recommended to store in flash in this format.
+ *
+ * @note This struct has to match to one from the ROM code! This documentation is mostly taken from there.
+ */
+typedef struct esp_digital_signature_data {
+    /**
+     * RSA LENGTH register parameters
+     * (number of words in RSA key & operands, minus one).
+     *
+     * Max value 127 (for RSA 3072).
+     *
+     * This value must match the length field encrypted and stored in 'c',
+     * or invalid results will be returned. (The DS peripheral will
+     * always use the value in 'c', not this value, so an attacker can't
+     * alter the DS peripheral results this way, it will just truncate or
+     * extend the message and the resulting signature in software.)
+     *
+     * @note In IDF, the enum type length is the same as of type unsigned, so they can be used interchangably.
+     *       See the ROM code for the original declaration of struct \c ets_ds_data_t.
+     */
+    esp_digital_signature_length_t rsa_length;
+
+    /**
+     * IV value used to encrypt 'c'
+     */
+    uint32_t iv[ESP_DS_IV_BIT_LEN / 32];
+
+    /**
+     * Encrypted Digital Signature parameters. Result of AES-CBC encryption
+     * of plaintext values. Includes an encrypted message digest.
+     */
+    uint8_t c[ESP_DS_C_LEN];
+} esp_ds_data_t;
+
+/**
+ * Plaintext parameters used by Digital Signature.
+ *
+ * This is only used for encrypting the RSA parameters by calling esp_ds_encrypt_params().
+ * Afterwards, the result can be stored in flash or in other persistent memory.
+ * The encryption is a prerequisite step before any signature operation can be done.
+ */
+typedef struct {
+    uint32_t  Y[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA exponent
+    uint32_t  M[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA modulus
+    uint32_t Rb[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA r inverse operand
+    uint32_t M_prime;                               //!< RSA M prime operand
+    uint32_t length;                                //!< RSA length in words (32 bit)
+} esp_ds_p_data_t;
+
+/**
+ * @brief Sign the message with a hardware key from specific key slot.
+ *
+ * This function is a wrapper around \c esp_ds_finish_sign() and \c esp_ds_start_sign(), so do not use them
+ * in parallel.
+ * It blocks until the signing is finished and then returns the signature.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components during its entire execution time.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ *
+ * @return
+ *      - ESP_OK if successful, the signature was written to the parameter \c signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches.
+ */
+esp_err_t esp_ds_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        void *signature);
+
+/**
+ * @brief Start the signing process.
+ *
+ * This function yields a context object which needs to be passed to \c esp_ds_finish_sign() to finish the signing
+ * process.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components, so the user has to ensure to call
+ *       \c esp_ds_finish_sign() in a timely manner.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param esp_ds_ctx the context object which is needed for finishing the signing process later
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation was started now and has to be finished with \c esp_ds_finish_sign()
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ */
+esp_err_t esp_ds_start_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        esp_ds_context_t **esp_ds_ctx);
+
+/**
+ * Return true if the DS peripheral is busy, otherwise false.
+ *
+ * @note Only valid if \c esp_ds_start_sign() was called before.
+ */
+bool esp_ds_is_busy(void);
+
+/**
+ * @brief Finish the signing process.
+ *
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ * @param esp_ds_ctx the context object retreived by \c esp_ds_start_sign()
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *        This means that the encrypted RSA key parameters are invalid, indicating that they may have been tampered
+ *        with or indicating a flash error, etc.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches (see TRM for more details).
+ */
+esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx);
+
+/**
+ * @brief Encrypt the private key parameters.
+ *
+ * The encryption is a prerequisite step before any signature operation can be done.
+ * It is not strictly necessary to use this encryption function, the encryption could also happen on an external
+ * device.
+ *
+ * @param data Output buffer to store encrypted data, suitable for later use generating signatures.
+ *        The allocated memory must be in internal memory and word aligned since it's filled by DMA. Both is asserted
+ *        at run time.
+ * @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
+ * @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process
+ *        is done and 'data' is stored.
+ * @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the
+ *        corresponding HMAC key will be stored to efuse and then permanently erased.
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or p_data->rsa_length is too long
+ */
+esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
+        const void *iv,
+        const esp_ds_p_data_t *p_data,
+        const void *key);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/esp_hmac.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/esp_hmac.h
new file mode 100644
index 00000000..391ba12f
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/esp_hmac.h
@@ -0,0 +1,67 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_HMAC_H_
+#define _ESP_HMAC_H_
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * The possible efuse keys for the HMAC peripheral
+ */
+typedef enum {
+    HMAC_KEY0 = 0,
+    HMAC_KEY1,
+    HMAC_KEY2,
+    HMAC_KEY3,
+    HMAC_KEY4,
+    HMAC_KEY5,
+    HMAC_KEY_MAX
+} hmac_key_id_t;
+
+/**
+ * @brief
+ * Calculate the HMAC of a given message.
+ *
+ * Calculate the HMAC \c hmac of a given message \c message with length \c message_len.
+ * SHA256 is used for the calculation (fixed on ESP32S2).
+ *
+ * @note Uses the HMAC peripheral in "upstream" mode.
+ *
+ * @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calcuation.
+ *        The corresponding purpose field of the key block in the efuse must be set to the HMAC upstream purpose value.
+ * @param message the message for which to calculate the HMAC
+ * @param message_len message length
+ *             return ESP_ERR_INVALID_STATE if unsuccessful
+ * @param [out] hmac the hmac result; the buffer behind the provided pointer must be 32 bytes long
+ *
+ * @return
+ *      * ESP_OK, if the calculation was successful,
+ *      * ESP_FAIL, if the hmac calculation failed
+ */
+esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
+        const void *message,
+        size_t message_len,
+        uint8_t *hmac);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ESP_HMAC_H_
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/memprot.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/memprot.h
new file mode 100644
index 00000000..0d7e6ca4
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/memprot.h
@@ -0,0 +1,457 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/* INTERNAL API
+ * generic interface to PMS memory protection features
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "esp_attr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef IRAM_SRAM_START
+#define IRAM_SRAM_START             0x4037C000
+#endif
+
+#ifndef DRAM_SRAM_START
+#define DRAM_SRAM_START             0x3FC7C000
+#endif
+
+#ifndef MAP_DRAM_TO_IRAM
+#define MAP_DRAM_TO_IRAM(addr)       (addr - DRAM_SRAM_START + IRAM_SRAM_START)
+#endif
+
+#ifndef MAP_IRAM_TO_DRAM
+#define MAP_IRAM_TO_DRAM(addr)       (addr - IRAM_SRAM_START + DRAM_SRAM_START)
+#endif
+
+typedef enum {
+    MEMPROT_NONE =              0x00000000,
+    MEMPROT_IRAM0_SRAM =        0x00000001,
+    MEMPROT_DRAM0_SRAM =        0x00000002,
+    MEMPROT_ALL =               0xFFFFFFFF
+} mem_type_prot_t;
+
+typedef enum {
+    MEMPROT_SPLITLINE_NONE = 0,
+    MEMPROT_IRAM0_DRAM0_SPLITLINE,
+    MEMPROT_IRAM0_LINE_0_SPLITLINE,
+    MEMPROT_IRAM0_LINE_1_SPLITLINE,
+    MEMPROT_DRAM0_DMA_LINE_0_SPLITLINE,
+    MEMPROT_DRAM0_DMA_LINE_1_SPLITLINE
+} split_line_t;
+
+typedef enum {
+    MEMPROT_PMS_AREA_NONE = 0,
+    MEMPROT_IRAM0_PMS_AREA_0,
+    MEMPROT_IRAM0_PMS_AREA_1,
+    MEMPROT_IRAM0_PMS_AREA_2,
+    MEMPROT_IRAM0_PMS_AREA_3,
+    MEMPROT_DRAM0_PMS_AREA_0,
+    MEMPROT_DRAM0_PMS_AREA_1,
+    MEMPROT_DRAM0_PMS_AREA_2,
+    MEMPROT_DRAM0_PMS_AREA_3
+} pms_area_t;
+
+typedef enum
+{
+    MEMPROT_PMS_WORLD_0 = 0,
+    MEMPROT_PMS_WORLD_1,
+    MEMPROT_PMS_WORLD_2,
+    MEMPROT_PMS_WORLD_INVALID = 0xFFFFFFFF
+} pms_world_t;
+
+typedef enum
+{
+    MEMPROT_PMS_OP_READ = 0,
+    MEMPROT_PMS_OP_WRITE,
+    MEMPROT_PMS_OP_FETCH,
+    MEMPROT_PMS_OP_INVALID = 0xFFFFFFFF
+} pms_operation_type_t;
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+const char *esp_memprot_mem_type_to_str(mem_type_prot_t mem_type);
+
+/**
+ * @brief Converts Split line type to string
+ *
+ * @param line_type Split line type (see split_line_t enum)
+ */
+const char *esp_memprot_split_line_to_str(split_line_t line_type);
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type (see pms_area_t enum)
+ */
+const char *esp_memprot_pms_to_str(pms_area_t area_type);
+
+/**
+ * @brief Returns PMS splitting address for given Split line type
+ *
+ * The value is taken from PMS configuration registers (IRam0 range)
+ * For details on split lines see 'esp_memprot_set_prot_int' function description
+ *
+ * @param line_type Split line type (see split_line_t enum)
+ *
+ * @return appropriate split line address
+ */
+uint32_t *esp_memprot_get_split_addr(split_line_t line_type);
+
+/**
+ * @brief Returns default main IRAM/DRAM splitting address
+ *
+ * The address value is given by _iram_text_end global (IRam0 range)
+
+ * @return Main I/D split line (IRam0_DRam0_Split_Addr)
+ */
+void *esp_memprot_get_default_main_split_addr(void);
+
+/**
+ * @brief Sets a lock for the main IRAM/DRAM splitting address
+ *
+ * Locks can be unlocked only by digital system reset
+ */
+void esp_memprot_set_split_line_lock(void);
+
+/**
+ * @brief Gets a lock status for the main IRAM/DRAM splitting address
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_split_line_lock(void);
+
+/**
+ * @brief Sets required split line address
+ *
+ * @param line_type Split line type (see split_line_t enum)
+ * @param line_addr target address from a memory range relevant to given line_type (IRAM/DRAM)
+ */
+void esp_memprot_set_split_line(split_line_t line_type, const void *line_addr);
+
+/**
+ * @brief Sets a lock for PMS Area settings of required Memory type
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_pms_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS Area settings of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_pms_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Sets permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
+ *
+ * @param area_type IRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag
+ * @param w Write permission flag
+ * @param x Execute permission flag
+ */
+void esp_memprot_iram_set_pms_area(pms_area_t area_type, bool r, bool w, bool x);
+
+/**
+ * @brief Gets current permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
+ *
+ * @param area_type IRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag holder
+ * @param w Write permission flag holder
+ * @param x Execute permission flag holder
+ */
+void esp_memprot_iram_get_pms_area(pms_area_t area_type, bool *r, bool *w, bool *x);
+
+/**
+ * @brief Sets permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
+ *
+ * @param area_type DRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag
+ * @param w Write permission flag
+ */
+void esp_memprot_dram_set_pms_area(pms_area_t area_type, bool r, bool w);
+
+/**
+ * @brief Gets current permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
+ *
+ * @param area_type DRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag holder
+ * @param w Write permission flag holder
+ */
+void esp_memprot_dram_get_pms_area(pms_area_t area_type, bool *r, bool *w);
+
+/**
+ * @brief Sets a lock for PMS interrupt monitor settings of required Memory type
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_monitor_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS interrupt monitor settings of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_monitor_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Enable PMS violation interrupt monitoring of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ * @param enable/disable
+ */
+void esp_memprot_set_monitor_en(mem_type_prot_t mem_type, bool enable);
+
+/**
+ * @brief Gets enable/disable status for PMS interrupt monitor settings of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (enabled/disabled)
+ */
+bool esp_memprot_get_monitor_en(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets CPU ID for currently active PMS violation interrupt
+ *
+ * @return CPU ID (CPU_PRO for ESP32C3)
+ */
+int IRAM_ATTR esp_memprot_intr_get_cpuid(void);
+
+/**
+ * @brief Clears current interrupt ON flag for given Memory type
+ *
+ * Interrupt clearing happens in two steps:
+ *      1. Interrupt CLR flag is set (to clear the interrupt ON status)
+ *      2. Interrupt CLR flag is reset (to allow further monitoring)
+ * This operation is non-atomic by PMS module design
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void IRAM_ATTR esp_memprot_monitor_clear_intr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns active PMS violation interrupt (if any)
+ *
+ * This function iterates through supported Memory type status registers
+ * and returns the first interrupt-on flag. If none is found active,
+ * MEMPROT_NONE is returned.
+ * Order of checking (in current version):
+ *      1. MEMPROT_IRAM0_SRAM
+ *      2. MEMPROT_DRAM0_SRAM
+ *
+ * @return mem_type Memory protection type related to active interrupt found (see mem_type_prot_t enum)
+ */
+mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
+
+/**
+ * @brief Checks whether any violation interrupt is active
+ *
+ * @return true/false (yes/no)
+ */
+bool IRAM_ATTR esp_memprot_is_locked_any(void);
+
+/**
+ * @brief Checks whether any violation interrupt is enabled
+ *
+ * @return true/false (yes/no)
+ */
+bool IRAM_ATTR esp_memprot_is_intr_ena_any(void);
+
+/**
+ * @brief Checks whether any violation interrupt is enabled
+ *
+ * @return true/false (yes/no)
+ */
+bool IRAM_ATTR esp_memprot_get_violate_intr_on(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns the address which caused the violation interrupt (if any)
+ *
+ * The address is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return faulting address
+ */
+uint32_t IRAM_ATTR esp_memprot_get_violate_addr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns the World identifier of the code causing the violation interrupt (if any)
+ *
+ * The value is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return World identifier (see pms_world_t enum)
+ */
+pms_world_t IRAM_ATTR esp_memprot_get_violate_world(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns Read or Write operation type which caused the violation interrupt (if any)
+ *
+ * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return PMS operation type relevant to mem_type parameter (se pms_operation_type_t)
+ */
+pms_operation_type_t IRAM_ATTR esp_memprot_get_violate_wr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns LoadStore flag of the operation type which caused the violation interrupt (if any)
+ *
+ * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
+ * Effective only on IRam0 access
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (LoadStore bit on/off)
+ */
+bool IRAM_ATTR esp_memprot_get_violate_loadstore(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns byte-enables for the address which caused the violation interrupt (if any)
+ *
+ * The value is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return byte-enables
+ */
+uint32_t IRAM_ATTR esp_memprot_get_violate_byte_en(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns raw contents of DRam0 status register 1
+ *
+ * @return 32-bit register value
+ */
+uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_1(void);
+
+/**
+ * @brief Returns raw contents of DRam0 status register 2
+ *
+ * @return 32-bit register value
+ */
+uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_2(void);
+
+/**
+ * @brief Returns raw contents of IRam0 status register
+ *
+ * @return 32-bit register value
+ */
+uint32_t IRAM_ATTR esp_memprot_get_iram_status_reg(void);
+
+/**
+ * @brief Register PMS violation interrupt in global interrupt matrix for given Memory type
+ *
+ * Memory protection components uses specific interrupt number, see ETS_MEMPROT_ERR_INUM
+ * The registration makes the panic-handler routine being called when the interrupt appears
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_intr_matrix(mem_type_prot_t mem_type);
+
+/**
+ * @brief Convenient routine for setting the PMS defaults
+ *
+ * Called on application startup, depending on CONFIG_ESP_SYSTEM_MEMPROT_FEATURE Kconfig settings
+ * For implementation details see 'esp_memprot_set_prot_int' description
+ *
+ * @param invoke_panic_handler register all interrupts for panic handling (true/false)
+ * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
+ * @param mem_type_mask 32-bit field of specific PMS parts to configure (see 'esp_memprot_set_prot_int')
+ */
+void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
+
+/**
+ * @brief Internal routine for setting the PMS defaults
+ *
+ * Called on application startup from within 'esp_memprot_set_prot'. Allows setting a specific splitting address
+ * (main I/D split line) - see the parameter 'split_addr'. If the 'split_addr' equals to NULL, default I/D split line
+ * is used (&_iram_text_end) and all the remaining lines share the same address.
+ * The function sets all the split lines and PMS areas to the same space,
+ * ie there is a single instruction space and single data space at the end.
+ * The PMS split lines and permission areas scheme described below:
+ *
+ *                            DRam0/DMA                                     IRam0
+ *                              -----------------------------------------------
+ *                    ...       |                 IRam0_PMS_0                 |
+ *               DRam0_PMS_0   -----------------------------------------------    IRam0_line1_Split_addr
+ *                    ...       |                 IRam0_PMS_1                 |
+ *                    ...       -----------------------------------------------   IRam0_line0_Split_addr
+ *                              |                 IRam0_PMS_2                 |
+ *                              ===============================================   IRam0_DRam0_Split_addr (main I/D)
+ *                              |                 DRam0_PMS_1                 |
+ * DRam0_DMA_line0_Split_addr   -----------------------------------------------       ...
+ *                              |                 DRam0_PMS_2                 |       ...
+ * DRam0_DMA_line1_Split_addr   -----------------------------------------------   IRam0_PMS_3
+ *                              |                 DRam0_PMS_3                 |       ...
+ *                              -----------------------------------------------
+ *
+ * Default settings provided by 'esp_memprot_set_prot_int' are as follows:
+ *
+ *                            DRam0/DMA                                     IRam0
+ *                              -----------------------------------------------
+ *                              |   IRam0_PMS_0 = IRam0_PMS_1 = IRam0_PMS_2   |
+ *                              |                 DRam0_PMS_0                 |   IRam0_line1_Split_addr
+ * DRam0_DMA_line0_Split_addr   |                                             |             =
+ *               =              ===============================================   IRam0_line0_Split_addr
+ * DRam0_DMA_line1_Split_addr   |                                             |             =
+ *                              |   DRam0_PMS_1 = DRam0_PMS_2 = DRam0_PMS_3   |   IRam0_DRam0_Split_addr (main I/D)
+ *                              |                 IRam0_PMS_3                 |
+ *                              -----------------------------------------------
+ *
+ * Once the memprot feature is locked, it can be unlocked only by digital system reset
+ *
+ * @param invoke_panic_handler register all the violation interrupts for panic handling (true/false)
+ * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
+ * @param split_addr specific main I/D adrees or NULL to use default ($_iram_text_end)
+ * @param mem_type_mask 32-bit field of specific PMS parts to configure (members of mem_type_prot_t)
+ */
+void esp_memprot_set_prot_int(bool invoke_panic_handler, bool lock_feature, void *split_addr, uint32_t *mem_type_mask);
+
+/**
+ * @brief Returns raw contents of PMS interrupt monitor register for given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return 32-bit register value
+ */
+uint32_t esp_memprot_get_monitor_enable_reg(mem_type_prot_t mem_type);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/rtc.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/rtc.h
new file mode 100644
index 00000000..b090ae5c
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32c3/rtc.h
@@ -0,0 +1,40 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp32c3/rtc.h
+ *
+ * This file contains declarations of rtc related functions.
+ */
+
+/**
+ * @brief Get current value of RTC counter in microseconds
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter in microseconds
+ */
+uint64_t esp_rtc_get_time_us(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/dport_access.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/dport_access.h
new file mode 100644
index 00000000..f3f7007a
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/dport_access.h
@@ -0,0 +1,42 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_DPORT_ACCESS_H_
+#define _ESP_DPORT_ACCESS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Read a sequence of DPORT registers to the buffer.
+ *
+ * @param[out] buff_out  Contains the read data.
+ * @param[in]  address   Initial address for reading registers.
+ * @param[in]  num_words The number of words.
+ */
+void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
+
+#define DPORT_STALL_OTHER_CPU_START()
+#define DPORT_STALL_OTHER_CPU_END()
+#define DPORT_INTERRUPT_DISABLE()
+#define DPORT_INTERRUPT_RESTORE()
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_DPORT_ACCESS_H_ */
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/esp_crypto_lock.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/esp_crypto_lock.h
new file mode 100644
index 00000000..3149d346
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/esp_crypto_lock.h
@@ -0,0 +1,76 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Acquire lock for HMAC cryptography peripheral
+ *
+ * Internally also locks the SHA peripheral, as the HMAC depends on the SHA peripheral
+ */
+void esp_crypto_hmac_lock_acquire(void);
+
+/**
+ * @brief Release lock for HMAC cryptography peripheral
+ *
+ * Internally also releases the SHA peripheral, as the HMAC depends on the SHA peripheral
+ */
+void esp_crypto_hmac_lock_release(void);
+
+/**
+ * @brief Acquire lock for DS cryptography peripheral
+ *
+ * Internally also locks the HMAC (which locks SHA), AES and MPI  peripheral, as the DS depends on these peripherals
+ */
+void esp_crypto_ds_lock_acquire(void);
+
+/**
+ * @brief Release lock for DS cryptography peripheral
+ *
+ * Internally also releases the HMAC (which locks SHA), AES and MPI  peripheral, as the DS depends on these peripherals
+ */
+void esp_crypto_ds_lock_release(void);
+
+/**
+ * @brief Acquire lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_acquire(void);
+
+/**
+ * @brief Release lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_release(void);
+
+
+/**
+ * @brief Acquire lock for the mpi cryptography peripheral.
+ *
+ */
+void esp_crypto_mpi_lock_acquire(void);
+
+/**
+ * @brief Release lock for the mpi/rsa cryptography peripheral.
+ *
+ */
+void esp_crypto_mpi_lock_release(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/esp_ds.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/esp_ds.h
new file mode 100644
index 00000000..79e963fc
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/esp_ds.h
@@ -0,0 +1,218 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_hmac.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP32H2_ERR_HW_CRYPTO_DS_HMAC_FAIL           ESP_ERR_HW_CRYPTO_BASE + 0x1 /*!< HMAC peripheral problem */
+#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_KEY         ESP_ERR_HW_CRYPTO_BASE + 0x2 /*!< given HMAC key isn't correct,
+                                                                                HMAC peripheral problem */
+#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_DIGEST      ESP_ERR_HW_CRYPTO_BASE + 0x4 /*!< message digest check failed,
+                                                                                result is invalid */
+#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_PADDING     ESP_ERR_HW_CRYPTO_BASE + 0x5 /*!< padding check failed, but result
+                                                                                   is produced anyway and can be read*/
+
+#define ESP_DS_IV_BIT_LEN 128
+#define ESP_DS_IV_LEN (ESP_DS_IV_BIT_LEN / 8)
+#define ESP_DS_SIGNATURE_MAX_BIT_LEN 3072
+#define ESP_DS_SIGNATURE_MD_BIT_LEN 256
+#define ESP_DS_SIGNATURE_M_PRIME_BIT_LEN 32
+#define ESP_DS_SIGNATURE_L_BIT_LEN 32
+#define ESP_DS_SIGNATURE_PADDING_BIT_LEN 64
+
+/* Length of parameter 'C' stored in flash, in bytes
+   - Operands Y, M and r_bar; each 3072 bits
+   - Operand MD (message digest); 256 bits
+   - Operands M' and L; each 32 bits
+   - Operand beta (padding value; 64 bits
+*/
+#define ESP_DS_C_LEN (((ESP_DS_SIGNATURE_MAX_BIT_LEN * 3 \
+        + ESP_DS_SIGNATURE_MD_BIT_LEN   \
+        + ESP_DS_SIGNATURE_M_PRIME_BIT_LEN   \
+        + ESP_DS_SIGNATURE_L_BIT_LEN   \
+        + ESP_DS_SIGNATURE_PADDING_BIT_LEN) / 8))
+
+typedef struct esp_ds_context esp_ds_context_t;
+
+typedef enum {
+    ESP_DS_RSA_1024 = (1024 / 32) - 1,
+    ESP_DS_RSA_2048 = (2048 / 32) - 1,
+    ESP_DS_RSA_3072 = (3072 / 32) - 1
+} esp_digital_signature_length_t;
+
+/**
+ * Encrypted private key data. Recommended to store in flash in this format.
+ *
+ * @note This struct has to match to one from the ROM code! This documentation is mostly taken from there.
+ */
+typedef struct esp_digital_signature_data {
+    /**
+     * RSA LENGTH register parameters
+     * (number of words in RSA key & operands, minus one).
+     *
+     * Max value 127 (for RSA 3072).
+     *
+     * This value must match the length field encrypted and stored in 'c',
+     * or invalid results will be returned. (The DS peripheral will
+     * always use the value in 'c', not this value, so an attacker can't
+     * alter the DS peripheral results this way, it will just truncate or
+     * extend the message and the resulting signature in software.)
+     *
+     * @note In IDF, the enum type length is the same as of type unsigned, so they can be used interchangably.
+     *       See the ROM code for the original declaration of struct \c ets_ds_data_t.
+     */
+    esp_digital_signature_length_t rsa_length;
+
+    /**
+     * IV value used to encrypt 'c'
+     */
+    uint32_t iv[ESP_DS_IV_BIT_LEN / 32];
+
+    /**
+     * Encrypted Digital Signature parameters. Result of AES-CBC encryption
+     * of plaintext values. Includes an encrypted message digest.
+     */
+    uint8_t c[ESP_DS_C_LEN];
+} esp_ds_data_t;
+
+/**
+ * Plaintext parameters used by Digital Signature.
+ *
+ * This is only used for encrypting the RSA parameters by calling esp_ds_encrypt_params().
+ * Afterwards, the result can be stored in flash or in other persistent memory.
+ * The encryption is a prerequisite step before any signature operation can be done.
+ */
+typedef struct {
+    uint32_t  Y[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA exponent
+    uint32_t  M[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA modulus
+    uint32_t Rb[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA r inverse operand
+    uint32_t M_prime;                               //!< RSA M prime operand
+    uint32_t length;                                //!< RSA length in words (32 bit)
+} esp_ds_p_data_t;
+
+/**
+ * @brief Sign the message with a hardware key from specific key slot.
+ *
+ * This function is a wrapper around \c esp_ds_finish_sign() and \c esp_ds_start_sign(), so do not use them
+ * in parallel.
+ * It blocks until the signing is finished and then returns the signature.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components during its entire execution time.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ *
+ * @return
+ *      - ESP_OK if successful, the signature was written to the parameter \c signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches.
+ */
+esp_err_t esp_ds_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        void *signature);
+
+/**
+ * @brief Start the signing process.
+ *
+ * This function yields a context object which needs to be passed to \c esp_ds_finish_sign() to finish the signing
+ * process.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components, so the user has to ensure to call
+ *       \c esp_ds_finish_sign() in a timely manner.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param esp_ds_ctx the context object which is needed for finishing the signing process later
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation was started now and has to be finished with \c esp_ds_finish_sign()
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ */
+esp_err_t esp_ds_start_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        esp_ds_context_t **esp_ds_ctx);
+
+/**
+ * Return true if the DS peripheral is busy, otherwise false.
+ *
+ * @note Only valid if \c esp_ds_start_sign() was called before.
+ */
+bool esp_ds_is_busy(void);
+
+/**
+ * @brief Finish the signing process.
+ *
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ * @param esp_ds_ctx the context object retreived by \c esp_ds_start_sign()
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *        This means that the encrypted RSA key parameters are invalid, indicating that they may have been tampered
+ *        with or indicating a flash error, etc.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches (see TRM for more details).
+ */
+esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx);
+
+/**
+ * @brief Encrypt the private key parameters.
+ *
+ * The encryption is a prerequisite step before any signature operation can be done.
+ * It is not strictly necessary to use this encryption function, the encryption could also happen on an external
+ * device.
+ *
+ * @param data Output buffer to store encrypted data, suitable for later use generating signatures.
+ *        The allocated memory must be in internal memory and word aligned since it's filled by DMA. Both is asserted
+ *        at run time.
+ * @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
+ * @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process
+ *        is done and 'data' is stored.
+ * @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the
+ *        corresponding HMAC key will be stored to efuse and then permanently erased.
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or p_data->rsa_length is too long
+ */
+esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
+        const void *iv,
+        const esp_ds_p_data_t *p_data,
+        const void *key);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/esp_hmac.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/esp_hmac.h
new file mode 100644
index 00000000..391ba12f
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/esp_hmac.h
@@ -0,0 +1,67 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_HMAC_H_
+#define _ESP_HMAC_H_
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * The possible efuse keys for the HMAC peripheral
+ */
+typedef enum {
+    HMAC_KEY0 = 0,
+    HMAC_KEY1,
+    HMAC_KEY2,
+    HMAC_KEY3,
+    HMAC_KEY4,
+    HMAC_KEY5,
+    HMAC_KEY_MAX
+} hmac_key_id_t;
+
+/**
+ * @brief
+ * Calculate the HMAC of a given message.
+ *
+ * Calculate the HMAC \c hmac of a given message \c message with length \c message_len.
+ * SHA256 is used for the calculation (fixed on ESP32S2).
+ *
+ * @note Uses the HMAC peripheral in "upstream" mode.
+ *
+ * @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calcuation.
+ *        The corresponding purpose field of the key block in the efuse must be set to the HMAC upstream purpose value.
+ * @param message the message for which to calculate the HMAC
+ * @param message_len message length
+ *             return ESP_ERR_INVALID_STATE if unsuccessful
+ * @param [out] hmac the hmac result; the buffer behind the provided pointer must be 32 bytes long
+ *
+ * @return
+ *      * ESP_OK, if the calculation was successful,
+ *      * ESP_FAIL, if the hmac calculation failed
+ */
+esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
+        const void *message,
+        size_t message_len,
+        uint8_t *hmac);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ESP_HMAC_H_
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/memprot.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/memprot.h
new file mode 100644
index 00000000..2567b604
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/memprot.h
@@ -0,0 +1,456 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/* INTERNAL API
+ * generic interface to PMS memory protection features
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_attr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef IRAM_SRAM_START
+#define IRAM_SRAM_START             0x4037C000
+#endif
+
+#ifndef DRAM_SRAM_START
+#define DRAM_SRAM_START             0x3FC7C000
+#endif
+
+#ifndef MAP_DRAM_TO_IRAM
+#define MAP_DRAM_TO_IRAM(addr)       (addr - DRAM_SRAM_START + IRAM_SRAM_START)
+#endif
+
+#ifndef MAP_IRAM_TO_DRAM
+#define MAP_IRAM_TO_DRAM(addr)       (addr - IRAM_SRAM_START + DRAM_SRAM_START)
+#endif
+
+typedef enum {
+    MEMPROT_NONE =              0x00000000,
+    MEMPROT_IRAM0_SRAM =        0x00000001,
+    MEMPROT_DRAM0_SRAM =        0x00000002,
+    MEMPROT_ALL =               0xFFFFFFFF
+} mem_type_prot_t;
+
+typedef enum {
+    MEMPROT_SPLITLINE_NONE = 0,
+    MEMPROT_IRAM0_DRAM0_SPLITLINE,
+    MEMPROT_IRAM0_LINE_0_SPLITLINE,
+    MEMPROT_IRAM0_LINE_1_SPLITLINE,
+    MEMPROT_DRAM0_DMA_LINE_0_SPLITLINE,
+    MEMPROT_DRAM0_DMA_LINE_1_SPLITLINE
+} split_line_t;
+
+typedef enum {
+    MEMPROT_PMS_AREA_NONE = 0,
+    MEMPROT_IRAM0_PMS_AREA_0,
+    MEMPROT_IRAM0_PMS_AREA_1,
+    MEMPROT_IRAM0_PMS_AREA_2,
+    MEMPROT_IRAM0_PMS_AREA_3,
+    MEMPROT_DRAM0_PMS_AREA_0,
+    MEMPROT_DRAM0_PMS_AREA_1,
+    MEMPROT_DRAM0_PMS_AREA_2,
+    MEMPROT_DRAM0_PMS_AREA_3
+} pms_area_t;
+
+typedef enum
+{
+    MEMPROT_PMS_WORLD_0 = 0,
+    MEMPROT_PMS_WORLD_1,
+    MEMPROT_PMS_WORLD_2,
+    MEMPROT_PMS_WORLD_INVALID = 0xFFFFFFFF
+} pms_world_t;
+
+typedef enum
+{
+    MEMPROT_PMS_OP_READ = 0,
+    MEMPROT_PMS_OP_WRITE,
+    MEMPROT_PMS_OP_FETCH,
+    MEMPROT_PMS_OP_INVALID = 0xFFFFFFFF
+} pms_operation_type_t;
+
+/**
+ * @brief Converts Memory protection type to string
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+const char *esp_memprot_mem_type_to_str(mem_type_prot_t mem_type);
+
+/**
+ * @brief Converts Split line type to string
+ *
+ * @param line_type Split line type (see split_line_t enum)
+ */
+const char *esp_memprot_split_line_to_str(split_line_t line_type);
+
+/**
+ * @brief Converts PMS Area type to string
+ *
+ * @param area_type PMS Area type (see pms_area_t enum)
+ */
+const char *esp_memprot_pms_to_str(pms_area_t area_type);
+
+/**
+ * @brief Returns PMS splitting address for given Split line type
+ *
+ * The value is taken from PMS configuration registers (IRam0 range)
+ * For details on split lines see 'esp_memprot_set_prot_int' function description
+ *
+ * @param line_type Split line type (see split_line_t enum)
+ *
+ * @return appropriate split line address
+ */
+uint32_t *esp_memprot_get_split_addr(split_line_t line_type);
+
+/**
+ * @brief Returns default main IRAM/DRAM splitting address
+ *
+ * The address value is given by _iram_text_end global (IRam0 range)
+
+ * @return Main I/D split line (IRam0_DRam0_Split_Addr)
+ */
+void *esp_memprot_get_default_main_split_addr(void);
+
+/**
+ * @brief Sets a lock for the main IRAM/DRAM splitting address
+ *
+ * Locks can be unlocked only by digital system reset
+ */
+void esp_memprot_set_split_line_lock(void);
+
+/**
+ * @brief Gets a lock status for the main IRAM/DRAM splitting address
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_split_line_lock(void);
+
+/**
+ * @brief Sets required split line address
+ *
+ * @param line_type Split line type (see split_line_t enum)
+ * @param line_addr target address from a memory range relevant to given line_type (IRAM/DRAM)
+ */
+void esp_memprot_set_split_line(split_line_t line_type, const void *line_addr);
+
+/**
+ * @brief Sets a lock for PMS Area settings of required Memory type
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_pms_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS Area settings of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_pms_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Sets permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
+ *
+ * @param area_type IRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag
+ * @param w Write permission flag
+ * @param x Execute permission flag
+ */
+void esp_memprot_iram_set_pms_area(pms_area_t area_type, bool r, bool w, bool x);
+
+/**
+ * @brief Gets current permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
+ *
+ * @param area_type IRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag holder
+ * @param w Write permission flag holder
+ * @param x Execute permission flag holder
+ */
+void esp_memprot_iram_get_pms_area(pms_area_t area_type, bool *r, bool *w, bool *x);
+
+/**
+ * @brief Sets permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
+ *
+ * @param area_type DRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag
+ * @param w Write permission flag
+ */
+void esp_memprot_dram_set_pms_area(pms_area_t area_type, bool r, bool w);
+
+/**
+ * @brief Gets current permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
+ *
+ * @param area_type DRam0 PMS Area type (see pms_area_t enum)
+ * @param r Read permission flag holder
+ * @param w Write permission flag holder
+ */
+void esp_memprot_dram_get_pms_area(pms_area_t area_type, bool *r, bool *w);
+
+/**
+ * @brief Sets a lock for PMS interrupt monitor settings of required Memory type
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_monitor_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets a lock status for PMS interrupt monitor settings of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_monitor_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Enable PMS violation interrupt monitoring of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ * @param enable/disable
+ */
+void esp_memprot_set_monitor_en(mem_type_prot_t mem_type, bool enable);
+
+/**
+ * @brief Gets enable/disable status for PMS interrupt monitor settings of required Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (enabled/disabled)
+ */
+bool esp_memprot_get_monitor_en(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets CPU ID for currently active PMS violation interrupt
+ *
+ * @return CPU ID (CPU_PRO for ESP32H2)
+ */
+int IRAM_ATTR esp_memprot_intr_get_cpuid(void);
+
+/**
+ * @brief Clears current interrupt ON flag for given Memory type
+ *
+ * Interrupt clearing happens in two steps:
+ *      1. Interrupt CLR flag is set (to clear the interrupt ON status)
+ *      2. Interrupt CLR flag is reset (to allow further monitoring)
+ * This operation is non-atomic by PMS module design
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void IRAM_ATTR esp_memprot_monitor_clear_intr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns active PMS violation interrupt (if any)
+ *
+ * This function iterates through supported Memory type status registers
+ * and returns the first interrupt-on flag. If none is found active,
+ * MEMPROT_NONE is returned.
+ * Order of checking (in current version):
+ *      1. MEMPROT_IRAM0_SRAM
+ *      2. MEMPROT_DRAM0_SRAM
+ *
+ * @return mem_type Memory protection type related to active interrupt found (see mem_type_prot_t enum)
+ */
+mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
+
+/**
+ * @brief Checks whether any violation interrupt is active
+ *
+ * @return true/false (yes/no)
+ */
+bool IRAM_ATTR esp_memprot_is_locked_any(void);
+
+/**
+ * @brief Checks whether any violation interrupt is enabled
+ *
+ * @return true/false (yes/no)
+ */
+bool IRAM_ATTR esp_memprot_is_intr_ena_any(void);
+
+/**
+ * @brief Checks whether any violation interrupt is enabled
+ *
+ * @return true/false (yes/no)
+ */
+bool IRAM_ATTR esp_memprot_get_violate_intr_on(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns the address which caused the violation interrupt (if any)
+ *
+ * The address is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return faulting address
+ */
+uint32_t IRAM_ATTR esp_memprot_get_violate_addr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns the World identifier of the code causing the violation interrupt (if any)
+ *
+ * The value is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return World identifier (see pms_world_t enum)
+ */
+pms_world_t IRAM_ATTR esp_memprot_get_violate_world(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns Read or Write operation type which caused the violation interrupt (if any)
+ *
+ * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return PMS operation type relevant to mem_type parameter (se pms_operation_type_t)
+ */
+pms_operation_type_t IRAM_ATTR esp_memprot_get_violate_wr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns LoadStore flag of the operation type which caused the violation interrupt (if any)
+ *
+ * The value (bit) is taken from appropriate PMS violation status register, based given Memory type
+ * Effective only on IRam0 access
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return true/false (LoadStore bit on/off)
+ */
+bool IRAM_ATTR esp_memprot_get_violate_loadstore(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns byte-enables for the address which caused the violation interrupt (if any)
+ *
+ * The value is taken from appropriate PMS violation status register, based given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return byte-enables
+ */
+uint32_t IRAM_ATTR esp_memprot_get_violate_byte_en(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns raw contents of DRam0 status register 1
+ *
+ * @return 32-bit register value
+ */
+uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_1(void);
+
+/**
+ * @brief Returns raw contents of DRam0 status register 2
+ *
+ * @return 32-bit register value
+ */
+uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_2(void);
+
+/**
+ * @brief Returns raw contents of IRam0 status register
+ *
+ * @return 32-bit register value
+ */
+uint32_t IRAM_ATTR esp_memprot_get_iram_status_reg(void);
+
+/**
+ * @brief Register PMS violation interrupt in global interrupt matrix for given Memory type
+ *
+ * Memory protection components uses specific interrupt number, see ETS_MEMPROT_ERR_INUM
+ * The registration makes the panic-handler routine being called when the interrupt appears
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_intr_matrix(mem_type_prot_t mem_type);
+
+/**
+ * @brief Convenient routine for setting the PMS defaults
+ *
+ * Called on application startup, depending on CONFIG_ESP_SYSTEM_MEMPROT_FEATURE Kconfig settings
+ * For implementation details see 'esp_memprot_set_prot_int' description
+ *
+ * @param invoke_panic_handler register all interrupts for panic handling (true/false)
+ * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
+ * @param mem_type_mask 32-bit field of specific PMS parts to configure (see 'esp_memprot_set_prot_int')
+ */
+void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
+
+/**
+ * @brief Internal routine for setting the PMS defaults
+ *
+ * Called on application startup from within 'esp_memprot_set_prot'. Allows setting a specific splitting address
+ * (main I/D split line) - see the parameter 'split_addr'. If the 'split_addr' equals to NULL, default I/D split line
+ * is used (&_iram_text_end) and all the remaining lines share the same address.
+ * The function sets all the split lines and PMS areas to the same space,
+ * ie there is a single instruction space and single data space at the end.
+ * The PMS split lines and permission areas scheme described below:
+ *
+ *                            DRam0/DMA                                     IRam0
+ *                              -----------------------------------------------
+ *                    ...       |                 IRam0_PMS_0                 |
+ *               DRam0_PMS_0   -----------------------------------------------    IRam0_line1_Split_addr
+ *                    ...       |                 IRam0_PMS_1                 |
+ *                    ...       -----------------------------------------------   IRam0_line0_Split_addr
+ *                              |                 IRam0_PMS_2                 |
+ *                              ===============================================   IRam0_DRam0_Split_addr (main I/D)
+ *                              |                 DRam0_PMS_1                 |
+ * DRam0_DMA_line0_Split_addr   -----------------------------------------------       ...
+ *                              |                 DRam0_PMS_2                 |       ...
+ * DRam0_DMA_line1_Split_addr   -----------------------------------------------   IRam0_PMS_3
+ *                              |                 DRam0_PMS_3                 |       ...
+ *                              -----------------------------------------------
+ *
+ * Default settings provided by 'esp_memprot_set_prot_int' are as follows:
+ *
+ *                            DRam0/DMA                                     IRam0
+ *                              -----------------------------------------------
+ *                              |   IRam0_PMS_0 = IRam0_PMS_1 = IRam0_PMS_2   |
+ *                              |                 DRam0_PMS_0                 |   IRam0_line1_Split_addr
+ * DRam0_DMA_line0_Split_addr   |                                             |             =
+ *               =              ===============================================   IRam0_line0_Split_addr
+ * DRam0_DMA_line1_Split_addr   |                                             |             =
+ *                              |   DRam0_PMS_1 = DRam0_PMS_2 = DRam0_PMS_3   |   IRam0_DRam0_Split_addr (main I/D)
+ *                              |                 IRam0_PMS_3                 |
+ *                              -----------------------------------------------
+ *
+ * Once the memprot feature is locked, it can be unlocked only by digital system reset
+ *
+ * @param invoke_panic_handler register all the violation interrupts for panic handling (true/false)
+ * @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
+ * @param split_addr specific main I/D adrees or NULL to use default ($_iram_text_end)
+ * @param mem_type_mask 32-bit field of specific PMS parts to configure (members of mem_type_prot_t)
+ */
+void esp_memprot_set_prot_int(bool invoke_panic_handler, bool lock_feature, void *split_addr, uint32_t *mem_type_mask);
+
+/**
+ * @brief Returns raw contents of PMS interrupt monitor register for given Memory type
+ *
+ * @param mem_type Memory protection type (see mem_type_prot_t enum)
+ *
+ * @return 32-bit register value
+ */
+uint32_t esp_memprot_get_monitor_enable_reg(mem_type_prot_t mem_type);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/rtc.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/rtc.h
new file mode 100644
index 00000000..cca748df
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32h2/rtc.h
@@ -0,0 +1,40 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp32h2/rtc.h
+ *
+ * This file contains declarations of rtc related functions.
+ */
+
+/**
+ * @brief Get current value of RTC counter in microseconds
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter in microseconds
+ */
+uint64_t esp_rtc_get_time_us(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/dport_access.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/dport_access.h
new file mode 100644
index 00000000..6ba6fd65
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/dport_access.h
@@ -0,0 +1,42 @@
+// Copyright 2010-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_DPORT_ACCESS_H_
+#define _ESP_DPORT_ACCESS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Read a sequence of DPORT registers to the buffer.
+ *
+ * @param[out] buff_out  Contains the read data.
+ * @param[in]  address   Initial address for reading registers.
+ * @param[in]  num_words The number of words.
+ */
+void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
+
+#define DPORT_STALL_OTHER_CPU_START()
+#define DPORT_STALL_OTHER_CPU_END()
+#define DPORT_INTERRUPT_DISABLE()
+#define DPORT_INTERRUPT_RESTORE()
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_DPORT_ACCESS_H_ */
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/esp_crypto_lock.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/esp_crypto_lock.h
new file mode 100644
index 00000000..e1df0399
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/esp_crypto_lock.h
@@ -0,0 +1,51 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * This API should be used by all components which use the SHA, AES, HMAC and DS crypto hardware on the ESP32S2.
+ * They can not be used in parallel because they use the same DMA or are calling each other.
+ * E.g., HMAC uses SHA or DS uses HMAC and AES. See the ESP32S2 Technical Reference Manual for more details.
+ *
+ * Other unrelated components must not use it.
+ */
+
+/**
+ * Acquire lock for the AES and SHA cryptography peripherals, which both use the crypto DMA.
+ */
+void esp_crypto_dma_lock_acquire(void);
+
+/**
+ * Release lock for the AES and SHA cryptography peripherals, which both use the crypto DMA.
+ */
+void esp_crypto_dma_lock_release(void);
+
+/**
+ * Acquire lock for the MPI/RSA cryptography peripheral
+ */
+void esp_crypto_mpi_lock_acquire(void);
+
+/**
+ * Release lock for the MPI/RSA cryptography peripheral
+ */
+void esp_crypto_mpi_lock_release(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/esp_ds.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/esp_ds.h
new file mode 100644
index 00000000..12906377
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/esp_ds.h
@@ -0,0 +1,198 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_hmac.h"
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL           ESP_ERR_HW_CRYPTO_BASE + 0x1 /*!< HMAC peripheral problem */
+#define ESP_ERR_HW_CRYPTO_DS_INVALID_KEY         ESP_ERR_HW_CRYPTO_BASE + 0x2 /*!< given HMAC key isn't correct,
+                                                                                HMAC peripheral problem */
+#define ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST      ESP_ERR_HW_CRYPTO_BASE + 0x4 /*!< message digest check failed,
+                                                                                result is invalid */
+#define ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING     ESP_ERR_HW_CRYPTO_BASE + 0x5 /*!< padding check failed, but result
+                                                                                   is produced anyway and can be read*/
+
+#define ESP_DS_IV_LEN 16
+
+/* Length of parameter 'C' stored in flash */
+#define ESP_DS_C_LEN (12672 / 8)
+
+typedef struct esp_ds_context esp_ds_context_t;
+
+typedef enum {
+    ESP_DS_RSA_1024 = (1024 / 32) - 1,
+    ESP_DS_RSA_2048 = (2048 / 32) - 1,
+    ESP_DS_RSA_3072 = (3072 / 32) - 1,
+    ESP_DS_RSA_4096 = (4096 / 32) - 1
+} esp_digital_signature_length_t;
+
+/**
+ * Encrypted private key data. Recommended to store in flash in this format.
+ *
+ * @note This struct has to match to one from the ROM code! This documentation is mostly taken from there.
+ */
+typedef struct esp_digital_signature_data {
+    /**
+     * RSA LENGTH register parameters
+     * (number of words in RSA key & operands, minus one).
+     *
+     * Max value 127 (for RSA 4096).
+     *
+     * This value must match the length field encrypted and stored in 'c',
+     * or invalid results will be returned. (The DS peripheral will
+     * always use the value in 'c', not this value, so an attacker can't
+     * alter the DS peripheral results this way, it will just truncate or
+     * extend the message and the resulting signature in software.)
+     *
+     * @note In IDF, the enum type length is the same as of type unsigned, so they can be used interchangably.
+     *       See the ROM code for the original declaration of struct \c ets_ds_data_t.
+     */
+    esp_digital_signature_length_t rsa_length;
+
+    /**
+     * IV value used to encrypt 'c'
+     */
+    uint8_t iv[ESP_DS_IV_LEN];
+
+    /**
+     * Encrypted Digital Signature parameters. Result of AES-CBC encryption
+     * of plaintext values. Includes an encrypted message digest.
+     */
+    uint8_t c[ESP_DS_C_LEN];
+} esp_ds_data_t;
+
+/** Plaintext parameters used by Digital Signature.
+ *
+ * Not used for signing with DS peripheral, but can be encrypted
+ * in-device by calling esp_ds_encrypt_params()
+ *
+ * @note This documentation is mostly taken from the ROM code.
+ */
+typedef struct {
+    uint32_t Y[4096/32];                    //!< RSA exponent
+    uint32_t M[4096/32];                    //!< RSA modulus
+    uint32_t Rb[4096/32];                   //!< RSA r inverse operand
+    uint32_t M_prime;                       //!< RSA M prime operand
+    esp_digital_signature_length_t length;  //!< RSA length
+} esp_ds_p_data_t;
+
+/**
+ * Sign the message.
+ *
+ * This function is a wrapper around \c esp_ds_finish_sign() and \c esp_ds_start_sign(), so do not use them
+ * in parallel.
+ * It blocks until the signing is finished and then returns the signature.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components during its entire execution time.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ *
+ * @return
+ *      - ESP_OK if successful, the signature was written to the parameter \c signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches.
+ */
+esp_err_t esp_ds_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        void *signature);
+
+/**
+ * Start the signing process.
+ *
+ * This function yields a context object which needs to be passed to \c esp_ds_finish_sign() to finish the signing
+ * process.
+ *
+ * @note This function locks the HMAC, SHA, AES and RSA components, so the user has to ensure to call
+ *       \c esp_ds_finish_sign() in a timely manner.
+ *
+ * @param message the message to be signed; its length is determined by data->rsa_length
+ * @param data the encrypted signing key data (AES encrypted RSA key + IV)
+ * @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
+ *        signing key data
+ * @param esp_ds_ctx the context object which is needed for finishing the signing process later
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation was started now and has to be finished with \c esp_ds_finish_sign()
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
+ *      - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
+ *      - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
+ */
+esp_err_t esp_ds_start_sign(const void *message,
+        const esp_ds_data_t *data,
+        hmac_key_id_t key_id,
+        esp_ds_context_t **esp_ds_ctx);
+
+/**
+ * Return true if the DS peripheral is busy, otherwise false.
+ *
+ * @note Only valid if \c esp_ds_start_sign() was called before.
+ */
+bool esp_ds_is_busy(void);
+
+/**
+ * Finish the signing process.
+ *
+ * @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
+ * @param esp_ds_ctx the context object retreived by \c esp_ds_start_sign()
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
+ *      - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
+ *        since the message digest matches.
+ */
+esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx);
+
+/**
+ * Encrypt the private key parameters.
+ *
+ * @param data Output buffer to store encrypted data, suitable for later use generating signatures.
+ *        The allocated memory must be in internal memory and word aligned since it's filled by DMA. Both is asserted
+ *        at run time.
+ * @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
+ * @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process
+ *        is done and 'data' is stored.
+ * @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the
+ *        corresponding HMAC key will be stored to efuse and then permanently erased.
+ *
+ * @return
+ *      - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
+ *      - ESP_ERR_INVALID_ARG if one of the parameters is NULL or p_data->rsa_length is too long
+ */
+esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
+        const void *iv,
+        const esp_ds_p_data_t *p_data,
+        const void *key);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/esp_hmac.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/esp_hmac.h
new file mode 100644
index 00000000..5fa836c4
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/esp_hmac.h
@@ -0,0 +1,99 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_HMAC_H_
+#define _ESP_HMAC_H_
+
+#include "esp_err.h"
+#include "stdbool.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * The possible efuse keys for the HMAC peripheral
+ */
+typedef enum {
+    HMAC_KEY0 = 0,
+    HMAC_KEY1,
+    HMAC_KEY2,
+    HMAC_KEY3,
+    HMAC_KEY4,
+    HMAC_KEY5,
+    HMAC_KEY_MAX
+} hmac_key_id_t;
+
+/**
+ * @brief
+ * Calculate the HMAC of a given message.
+ *
+ * Calculate the HMAC \c hmac of a given message \c message with length \c message_len.
+ * SHA256 is used for the calculation (fixed on ESP32S2).
+ *
+ * @note Uses the HMAC peripheral in "upstream" mode.
+ *
+ * @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calcuation.
+ *        The corresponding purpose field of the key block in the efuse must be set to the HMAC upstream purpose value.
+ * @param message the message for which to calculate the HMAC
+ * @param message_len message length
+ *             return ESP_ERR_INVALID_STATE if unsuccessful
+ * @param [out] hmac the hmac result; the buffer behind the provided pointer must be 32 bytes long
+ *
+ * @return
+ *      * ESP_OK, if the calculation was successful,
+ *      * ESP_FAIL, if the hmac calculation failed
+ */
+esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
+        const void *message,
+        size_t message_len,
+        uint8_t *hmac);
+
+/**
+ * @brief
+ * Use HMAC peripheral in Downstream mode to re-enable the JTAG, if it is not permanently disable by HW.
+ * In downstream mode HMAC calculations perfomred by peripheral used internally and not provided back to user.
+ *
+ * @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calculation.
+ *        The corresponding purpose field of the key block in the efuse must be set to HMAC downstream purpose.
+ *
+ * @param token Pre calculated HMAC value of the 32-byte 0x00 using SHA-256 and the known private HMAC key. The key is already
+ *        programmed to a eFuse key block. The key block number is provided as the first parameter to this function.
+ *
+ * @return
+ *      * ESP_OK, if the calculation was successful,
+ *                if the calculated HMAC value matches with provided token,
+ *                JTAG will be re-enable otherwise JTAG will remain disabled.
+ *                Return value does not indicate the JTAG status.
+ *      * ESP_FAIL, if the hmac calculation failed or JTAG is permanently disabled by EFUSE_HARD_DIS_JTAG eFuse parameter.
+ *      * ESP_ERR_INVALID_ARG, invalid input arguments
+ */
+esp_err_t esp_hmac_jtag_enable(hmac_key_id_t key_id,
+        const uint8_t *token);
+
+/**
+ *  @brief
+ *  Disable the JTAG which might be enable using the HMAC downstream mode. This function just clear the result generated by
+ *  JTAG key by calling esp_hmac_jtag_enable() API.
+ *
+ *  @return
+ *       * ESP_OK return ESP_OK after writing the HMAC_SET_INVALIDATE_JTAG_REG with value 1.
+ */
+esp_err_t esp_hmac_jtag_disable(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _ESP_HMAC_H_
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/memprot.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/memprot.h
new file mode 100644
index 00000000..c63fb395
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/memprot.h
@@ -0,0 +1,518 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/* INTERNAL API
+ * generic interface to MMU memory protection features
+ */
+
+#pragma once
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_attr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//convenient constants for better code readabilty
+#define RD_ENA                  true
+#define RD_DIS                  false
+#define WR_ENA                  true
+#define WR_DIS                  false
+#define EX_ENA                  true
+#define EX_DIS                  false
+#define RD_LOW_ENA              true
+#define RD_LOW_DIS              false
+#define WR_LOW_ENA              true
+#define WR_LOW_DIS              false
+#define EX_LOW_ENA              true
+#define EX_LOW_DIS              false
+#define RD_HIGH_ENA             true
+#define RD_HIGH_DIS             false
+#define WR_HIGH_ENA             true
+#define WR_HIGH_DIS             false
+#define EX_HIGH_ENA             true
+#define EX_HIGH_DIS             false
+#define PANIC_HNDL_ON           true
+#define PANIC_HNDL_OFF          false
+#define MEMPROT_LOCK            true
+#define MEMPROT_UNLOCK          false
+#define DEF_SPLIT_LINE          NULL
+
+//memory range types
+typedef enum {
+    MEMPROT_NONE =              0x00000000,
+    MEMPROT_IRAM0_SRAM =        0x00000001, //0x40020000-0x4006FFFF, RWX
+    MEMPROT_DRAM0_SRAM =        0x00000002, //0x3FFB0000-0x3FFFFFFF, RW
+    MEMPROT_IRAM0_RTCFAST =     0x00000004, //0x40070000-0x40071FFF, RWX
+    MEMPROT_DRAM0_RTCFAST =     0x00000008, //0x3FF9E000-0x3FF9FFFF, RW
+    MEMPROT_PERI1_RTCSLOW =     0x00000010, //0x3F421000-0x3F423000, RW
+    MEMPROT_PERI2_RTCSLOW_0 =   0x00000020, //0x50001000-0x50003000, RWX
+    MEMPROT_PERI2_RTCSLOW_1 =   0x00000040, //0x60002000-0x60004000, RWX
+    MEMPROT_ALL =               0xFFFFFFFF
+} mem_type_prot_t;
+
+
+/**
+ * @brief Returns splitting address for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Splitting address for the memory region required.
+ * The address is given by region-specific global symbol exported from linker script,
+ * it is not read out from related configuration register.
+ */
+uint32_t *IRAM_ATTR esp_memprot_get_split_addr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Initializes illegal memory access control (MMU) for required memory section.
+ *
+ * All memory access interrupts share ETS_MEMACCESS_ERR_INUM input channel, it is caller's
+ * responsibility to properly detect actual intr. source as well as possible prioritization in case
+ * of multiple source reported during one intr.handling routine run
+ *
+ *  @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+void esp_memprot_intr_init(mem_type_prot_t mem_type);
+
+/**
+ * @brief Enable/disable the memory protection interrupt
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param enable enable/disable
+ */
+void esp_memprot_intr_ena(mem_type_prot_t mem_type, bool enable);
+
+/**
+ * @brief Sets a request for clearing interrupt-on flag for specified memory region (register write)
+ *
+ * @note When called without actual interrupt-on flag set, subsequent occurrence of related interrupt is ignored.
+ * Should be used only after the real interrupt appears, typically as the last step in interrupt handler's routine.
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+void esp_memprot_clear_intr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Detects which memory protection interrupt is active
+ *
+ * @note Check order
+ *          MEMPROT_IRAM0_SRAM
+ *          MEMPROT_IRAM0_RTCFAST
+ *          MEMPROT_DRAM0_SRAM
+ *          MEMPROT_DRAM0_RTCFAST
+ *
+ * @return Memory protection area type (see mem_type_prot_t enum)
+ */
+mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
+
+/**
+ * @brief Gets interrupt status register contents for specified memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Contents of status register
+ */
+uint32_t esp_memprot_get_fault_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Get details of given interrupt status
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param faulting_address Faulting address causing the interrupt [out]
+ * @param op_type Operation being processed at the faulting address [out]
+ *               IRAM0: 0 - read, 1 - write
+ *               DRAM0: 0 - read, 1 - write
+ * @param op_subtype Additional info for op_type [out]
+ *               IRAM0: 0 - instruction segment access, 1 - data segment access
+ *               DRAM0: 0 - non-atomic operation, 1 - atomic operation
+ */
+void IRAM_ATTR esp_memprot_get_fault_status(mem_type_prot_t mem_type, uint32_t **faulting_address, uint32_t *op_type, uint32_t *op_subtype);
+
+/**
+ * @brief Gets string representation of required memory region identifier
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return mem_type as string
+ */
+const char *IRAM_ATTR esp_memprot_type_to_str(mem_type_prot_t mem_type);
+
+/**
+ * @brief Detects whether any of the interrupt locks is active (requires digital system reset to unlock)
+ *
+ * @return true/false
+ */
+bool esp_memprot_is_locked_any(void);
+
+/**
+ * @brief Sets lock for specified memory region.
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets lock status for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets permission control configuration register contents for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Permission control register contents
+ */
+uint32_t esp_memprot_get_conf_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt permission settings for unified management block
+ *
+ * Gets interrupt permission settings register contents for required memory region, returns settings for unified management blocks
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Permission settings register contents
+ */
+uint32_t esp_memprot_get_perm_uni_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt permission settings for split management block
+ *
+ * Gets interrupt permission settings register contents for required memory region, returns settings for split management blocks
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Permission settings register contents
+ */
+uint32_t esp_memprot_get_perm_split_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Detects whether any of the memory protection interrupts is enabled
+ *
+ * @return true/false
+ */
+bool esp_memprot_is_intr_ena_any(void);
+
+/**
+ * @brief Gets interrupt-enabled flag for given memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Interrupt-enabled value
+ */
+uint32_t esp_memprot_get_intr_ena_bit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt-active flag for given memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Interrupt-active value
+ */
+uint32_t esp_memprot_get_intr_on_bit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt-clear request flag for given memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Interrupt-clear request value
+ */
+uint32_t esp_memprot_get_intr_clr_bit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets read permission value for specified block and memory region
+ *
+ * Returns read permission bit value for required unified-management block (0-3) in given memory region.
+ * Applicable to all memory types.
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ *
+ * @return Read permission value for required block
+ */
+uint32_t esp_memprot_get_uni_block_read_bit(mem_type_prot_t mem_type, uint32_t block);
+
+/**
+ * @brief Gets write permission value for specified block and memory region
+ *
+ * Returns write permission bit value for required unified-management block (0-3) in given memory region.
+ * Applicable to all memory types.
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ *
+ * @return Write permission value for required block
+ */
+uint32_t esp_memprot_get_uni_block_write_bit(mem_type_prot_t mem_type, uint32_t block);
+
+/**
+ * @brief Gets execute permission value for specified block and memory region
+ *
+ * Returns execute permission bit value for required unified-management block (0-3) in given memory region.
+ * Applicable only to IRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ *
+ * @return Execute permission value for required block
+ */
+uint32_t esp_memprot_get_uni_block_exec_bit(mem_type_prot_t mem_type, uint32_t block);
+
+/**
+ * @brief Sets permissions for specified block in DRAM region
+ *
+ * Sets Read and Write permission for specified unified-management block (0-3) in given memory region.
+ * Applicable only to DRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ * @param write_perm Write permission flag
+ * @param read_perm Read permission flag
+ */
+void esp_memprot_set_uni_block_perm_dram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm);
+
+/**
+ * @brief Sets permissions for high and low memory segment in DRAM region
+ *
+ * Sets Read and Write permission for both low and high memory segments given by splitting address.
+ * The splitting address must be equal to or higher then beginning of block 5
+ * Applicable only to DRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_set_prot_dram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
+
+/**
+ * @brief Sets permissions for specified block in IRAM region
+ *
+ * Sets Read, Write and Execute permission for specified unified-management block (0-3) in given memory region.
+ * Applicable only to IRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ * @param write_perm Write permission flag
+ * @param exec_perm Execute permission flag
+ */
+void esp_memprot_set_uni_block_perm_iram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm, bool exec_perm);
+
+/**
+ * @brief Sets permissions for high and low memory segment in IRAM region
+ *
+ * Sets Read, Write and Execute permission for both low and high memory segments given by splitting address.
+ * The splitting address must be equal to or higher then beginning of block 5
+ * Applicable only to IRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_set_prot_iram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
+
+/**
+ * @brief Activates memory protection for all supported memory region types
+ *
+ * @note The feature is disabled when JTAG interface is connected
+ *
+ * @param invoke_panic_handler map mem.prot interrupt to ETS_MEMACCESS_ERR_INUM and thus invokes panic handler when fired ('true' not suitable for testing)
+ * @param lock_feature sets LOCK bit, see esp_memprot_set_lock() ('true' not suitable for testing)
+ * @param mem_type_mask holds a set of required memory protection types (bitmask built of mem_type_prot_t). NULL means default (MEMPROT_ALL in this version)
+ */
+void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
+
+/**
+ * @brief Get permission settings bits for IRAM0 split mgmt. Only IRAM0 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_get_perm_split_bits_iram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+
+/**
+ * @brief Get permission settings bits for DRAM0 split mgmt. Only DRAM0 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_get_perm_split_bits_dram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
+
+/**
+ * @brief Sets permissions for high and low memory segment in PERIBUS1 region
+ *
+ * Sets Read and Write permission for both low and high memory segments given by splitting address.
+ * Applicable only to PERIBUS1 memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_set_prot_peri1(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
+
+/**
+ * @brief Get permission settings bits for PERIBUS1 split mgmt. Only PERIBUS1 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_get_perm_split_bits_peri1(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
+
+/**
+ * @brief Get permission settings bits for PERIBUS2 split mgmt. Only PERIBUS2 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_get_perm_split_bits_peri2(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+
+/**
+ * @brief Sets permissions for high and low memory segment in PERIBUS2 region
+ *
+ * Sets Read Write permission for both low and high memory segments given by splitting address.
+ * Applicable only to PERIBUS2 memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_set_prot_peri2(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
+
+/**
+ * @brief Get permissions for specified memory type. Irrelevant bits are ignored
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_get_permissions(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+
+/**
+ * @brief Get Read permission settings for low and high regions of given memory type
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Read permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_get_perm_read(mem_type_prot_t mem_type, bool *lr, bool *hr);
+
+/**
+ * @brief Get Write permission settings for low and high regions of given memory type
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Write permission flag
+ * @param hr High segment Write permission flag
+ */
+void esp_memprot_get_perm_write(mem_type_prot_t mem_type, bool *lw, bool *hw);
+
+/**
+ * @brief Get Execute permission settings for low and high regions of given memory type
+ * Applicable only to IBUS-compatible memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Exec permission flag
+ * @param hr High segment Exec permission flag
+ */
+void esp_memprot_get_perm_exec(mem_type_prot_t mem_type, bool *lx, bool *hx);
+
+/**
+ * @brief Returns the lowest address in required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+uint32_t esp_memprot_get_low_limit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns the highest address in required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+uint32_t esp_memprot_get_high_limit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Sets READ permission bit for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Read permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_set_read_perm(mem_type_prot_t mem_type, bool lr, bool hr);
+
+/**
+ * @brief Sets WRITE permission bit for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Write permission flag
+ * @param hr High segment Write permission flag
+ */
+void esp_memprot_set_write_perm(mem_type_prot_t mem_type, bool lw, bool hw);
+
+/**
+ * @brief Sets EXECUTE permission bit for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Exec permission flag
+ * @param hr High segment Exec permission flag
+ */
+void esp_memprot_set_exec_perm(mem_type_prot_t mem_type, bool lx, bool hx);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/rtc.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/rtc.h
new file mode 100644
index 00000000..296292e2
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/rtc.h
@@ -0,0 +1,39 @@
+// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp32s2/rtc.h
+ *
+ * This file contains declarations of rtc related functions.
+ */
+
+/**
+ * @brief Get current value of RTC counter in microseconds
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter in microseconds
+ */
+uint64_t esp_rtc_get_time_us(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/spiram.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/spiram.h
new file mode 100644
index 00000000..cc2b4c85
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s2/spiram.h
@@ -0,0 +1,146 @@
+// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef __ESP_SPIRAM_H
+#define __ESP_SPIRAM_H
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Initialize spiram interface/hardware. Normally called from cpu_start.c.
+ *
+ * @return ESP_OK on success
+ */
+esp_err_t esp_spiram_init(void);
+
+/**
+ * @brief Configure Cache/MMU for access to external SPI RAM.
+ *
+ * Normally this function is called from cpu_start, if CONFIG_SPIRAM_BOOT_INIT
+ * option is enabled. Applications which need to enable SPI RAM at run time
+ * can disable CONFIG_SPIRAM_BOOT_INIT, and call this function later.
+ *
+ * @attention this function must be called with flash cache disabled.
+ */
+void esp_spiram_init_cache(void);
+
+
+/**
+ * @brief Memory test for SPI RAM. Should be called after SPI RAM is initialized and
+ * (in case of a dual-core system) the app CPU is online. This test overwrites the
+ * memory with crap, so do not call after e.g. the heap allocator has stored important
+ * stuff in SPI RAM.
+ *
+ * @return true on success, false on failed memory test
+ */
+bool esp_spiram_test(void);
+
+
+/**
+ * @brief Add the initialized SPI RAM to the heap allocator.
+ */
+esp_err_t esp_spiram_add_to_heapalloc(void);
+
+
+/**
+ * @brief Get the size of the attached SPI RAM chip selected in menuconfig
+ *
+ * @return Size in bytes, or 0 if no external RAM chip support compiled in.
+ */
+size_t esp_spiram_get_size(void);
+
+
+/**
+ * @brief Force a writeback of the data in the SPI RAM cache. This is to be called whenever
+ * cache is disabled, because disabling cache on the ESP32 discards the data in the SPI
+ * RAM cache.
+ *
+ * This is meant for use from within the SPI flash code.
+ */
+void esp_spiram_writeback_cache(void);
+
+
+
+/**
+ * @brief Reserve a pool of internal memory for specific DMA/internal allocations
+ *
+ * @param size Size of reserved pool in bytes
+ *
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NO_MEM when no memory available for pool
+ */
+esp_err_t esp_spiram_reserve_dma_pool(size_t size);
+
+#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS
+
+extern int _instruction_reserved_start, _instruction_reserved_end;
+
+/**
+ * @brief Get the start page number of the instruction in SPI flash
+ *
+ * @return start page number
+ */
+uint32_t instruction_flash_start_page_get(void);
+/**
+ * @brief Get the end page number of the instruction in SPI flash
+ *
+ * @return end page number
+ */
+uint32_t instruction_flash_end_page_get(void);
+/**
+ * @brief Get the offset of instruction from SPI flash to SPI RAM
+ *
+ * @return instruction offset
+ */
+int instruction_flash2spiram_offset(void);
+#endif
+
+#if CONFIG_SPIRAM_RODATA
+
+extern int _rodata_reserved_start, _rodata_reserved_end;
+
+/**
+ * @brief Get the start page number of the rodata in SPI flash
+ *
+ * @return start page number
+ */
+uint32_t rodata_flash_start_page_get(void);
+/**
+ * @brief Get the end page number of the rodata in SPI flash
+ *
+ * @return end page number
+ */
+uint32_t rodata_flash_end_page_get(void);
+/**
+ * @brief Get the offset number of rodata from SPI flash to SPI RAM
+ *
+ * @return rodata offset
+ */
+int rodata_flash2spiram_offset(void);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/dport_access.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/dport_access.h
new file mode 100644
index 00000000..f3f7007a
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/dport_access.h
@@ -0,0 +1,42 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ESP_DPORT_ACCESS_H_
+#define _ESP_DPORT_ACCESS_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Read a sequence of DPORT registers to the buffer.
+ *
+ * @param[out] buff_out  Contains the read data.
+ * @param[in]  address   Initial address for reading registers.
+ * @param[in]  num_words The number of words.
+ */
+void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
+
+#define DPORT_STALL_OTHER_CPU_START()
+#define DPORT_STALL_OTHER_CPU_END()
+#define DPORT_INTERRUPT_DISABLE()
+#define DPORT_INTERRUPT_RESTORE()
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_DPORT_ACCESS_H_ */
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/esp_crypto_lock.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/esp_crypto_lock.h
new file mode 100644
index 00000000..781ac077
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/esp_crypto_lock.h
@@ -0,0 +1,53 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * This API should be used by all components which use the SHA, AES, HMAC and DS crypto hardware on the ESP32S3.
+ * Not all of them can be used in parallel because they use the same underlying module.
+ * E.g., HMAC uses SHA or DS uses HMAC and AES. See the ESP32S3 Technical Reference Manual for more details.
+ *
+ * Other unrelated components must not use it.
+ */
+
+/**
+ * @brief Acquire lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_acquire(void);
+
+/**
+ * @brief Release lock for the SHA and AES cryptography peripheral.
+ *
+ */
+void esp_crypto_sha_aes_lock_release(void);
+
+/**
+ * Acquire lock for the MPI/RSA cryptography peripheral
+ */
+void esp_crypto_mpi_lock_acquire(void);
+
+/**
+ * Release lock for the MPI/RSA cryptography peripheral
+ */
+void esp_crypto_mpi_lock_release(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/memprot.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/memprot.h
new file mode 100644
index 00000000..7e47a8cf
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/memprot.h
@@ -0,0 +1,492 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/* INTERNAL API
+ * generic interface to MMU memory protection features
+ */
+
+#pragma once
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_attr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    MEMPROT_NONE =              0x00000000,
+    MEMPROT_IRAM0_SRAM =        0x00000001,
+    MEMPROT_DRAM0_SRAM =        0x00000002,
+    MEMPROT_IRAM0_RTCFAST =     0x00000004,
+    MEMPROT_DRAM0_RTCFAST =     0x00000008,
+    MEMPROT_PERI1_RTCSLOW =     0x00000010,
+    MEMPROT_PERI2_RTCSLOW_0 =   0x00000020,
+    MEMPROT_PERI2_RTCSLOW_1 =   0x00000040,
+    MEMPROT_ALL =               0xFFFFFFFF
+} mem_type_prot_t;
+
+
+/**
+ * @brief Returns splitting address for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Splitting address for the memory region required.
+ * The address is given by region-specific global symbol exported from linker script,
+ * it is not read out from related configuration register.
+ */
+uint32_t *IRAM_ATTR esp_memprot_get_split_addr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Initializes illegal memory access control (MMU) for required memory section.
+ *
+ * All memory access interrupts share ETS_MEMACCESS_ERR_INUM input channel, it is caller's
+ * responsibility to properly detect actual intr. source as well as possible prioritization in case
+ * of multiple source reported during one intr.handling routine run
+ *
+ *  @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+void esp_memprot_intr_init(mem_type_prot_t mem_type);
+
+/**
+ * @brief Enable/disable the memory protection interrupt
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param enable enable/disable
+ */
+void esp_memprot_intr_ena(mem_type_prot_t mem_type, bool enable);
+
+/**
+ * @brief Sets a request for clearing interrupt-on flag for specified memory region (register write)
+ *
+ * @note When called without actual interrupt-on flag set, subsequent occurrence of related interrupt is ignored.
+ * Should be used only after the real interrupt appears, typically as the last step in interrupt handler's routine.
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+void esp_memprot_clear_intr(mem_type_prot_t mem_type);
+
+/**
+ * @brief Detects which memory protection interrupt is active
+ *
+ * @note Check order
+ *          MEMPROT_IRAM0_SRAM
+ *          MEMPROT_IRAM0_RTCFAST
+ *          MEMPROT_DRAM0_SRAM
+ *          MEMPROT_DRAM0_RTCFAST
+ *
+ * @return Memory protection area type (see mem_type_prot_t enum)
+ */
+mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
+
+/**
+ * @brief Gets interrupt status register contents for specified memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Contents of status register
+ */
+uint32_t esp_memprot_get_fault_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Get details of given interrupt status
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param faulting_address Faulting address causing the interrupt [out]
+ * @param op_type Operation being processed at the faulting address [out]
+ *               IRAM0: 0 - read, 1 - write
+ *               DRAM0: 0 - read, 1 - write
+ * @param op_subtype Additional info for op_type [out]
+ *               IRAM0: 0 - instruction segment access, 1 - data segment access
+ *               DRAM0: 0 - non-atomic operation, 1 - atomic operation
+ */
+void IRAM_ATTR esp_memprot_get_fault_status(mem_type_prot_t mem_type, uint32_t **faulting_address, uint32_t *op_type, uint32_t *op_subtype);
+
+/**
+ * @brief Gets string representation of required memory region identifier
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return mem_type as string
+ */
+const char *IRAM_ATTR esp_memprot_type_to_str(mem_type_prot_t mem_type);
+
+/**
+ * @brief Detects whether any of the interrupt locks is active (requires digital system reset to unlock)
+ *
+ * @return true/false
+ */
+bool esp_memprot_is_locked_any(void);
+
+/**
+ * @brief Sets lock for specified memory region.
+ *
+ * Locks can be unlocked only by digital system reset
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+void esp_memprot_set_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets lock status for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return true/false (locked/unlocked)
+ */
+bool esp_memprot_get_lock(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets permission control configuration register contents for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Permission control register contents
+ */
+uint32_t esp_memprot_get_conf_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt permission settings for unified management block
+ *
+ * Gets interrupt permission settings register contents for required memory region, returns settings for unified management blocks
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Permission settings register contents
+ */
+uint32_t esp_memprot_get_perm_uni_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt permission settings for split management block
+ *
+ * Gets interrupt permission settings register contents for required memory region, returns settings for split management blocks
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Permission settings register contents
+ */
+uint32_t esp_memprot_get_perm_split_reg(mem_type_prot_t mem_type);
+
+/**
+ * @brief Detects whether any of the memory protection interrupts is enabled
+ *
+ * @return true/false
+ */
+bool esp_memprot_is_intr_ena_any(void);
+
+/**
+ * @brief Gets interrupt-enabled flag for given memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Interrupt-enabled value
+ */
+uint32_t esp_memprot_get_intr_ena_bit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt-active flag for given memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Interrupt-active value
+ */
+uint32_t esp_memprot_get_intr_on_bit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets interrupt-clear request flag for given memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ *
+ * @return Interrupt-clear request value
+ */
+uint32_t esp_memprot_get_intr_clr_bit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Gets read permission value for specified block and memory region
+ *
+ * Returns read permission bit value for required unified-management block (0-3) in given memory region.
+ * Applicable to all memory types.
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ *
+ * @return Read permission value for required block
+ */
+uint32_t esp_memprot_get_uni_block_read_bit(mem_type_prot_t mem_type, uint32_t block);
+
+/**
+ * @brief Gets write permission value for specified block and memory region
+ *
+ * Returns write permission bit value for required unified-management block (0-3) in given memory region.
+ * Applicable to all memory types.
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ *
+ * @return Write permission value for required block
+ */
+uint32_t esp_memprot_get_uni_block_write_bit(mem_type_prot_t mem_type, uint32_t block);
+
+/**
+ * @brief Gets execute permission value for specified block and memory region
+ *
+ * Returns execute permission bit value for required unified-management block (0-3) in given memory region.
+ * Applicable only to IRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ *
+ * @return Execute permission value for required block
+ */
+uint32_t esp_memprot_get_uni_block_exec_bit(mem_type_prot_t mem_type, uint32_t block);
+
+/**
+ * @brief Sets permissions for specified block in DRAM region
+ *
+ * Sets Read and Write permission for specified unified-management block (0-3) in given memory region.
+ * Applicable only to DRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ * @param write_perm Write permission flag
+ * @param read_perm Read permission flag
+ */
+void esp_memprot_set_uni_block_perm_dram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm);
+
+/**
+ * @brief Sets permissions for high and low memory segment in DRAM region
+ *
+ * Sets Read and Write permission for both low and high memory segments given by splitting address.
+ * The splitting address must be equal to or higher then beginning of block 5
+ * Applicable only to DRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_set_prot_dram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
+
+/**
+ * @brief Sets permissions for specified block in IRAM region
+ *
+ * Sets Read, Write and Execute permission for specified unified-management block (0-3) in given memory region.
+ * Applicable only to IRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param block Memory block identifier (0-3)
+ * @param write_perm Write permission flag
+ * @param exec_perm Execute permission flag
+ */
+void esp_memprot_set_uni_block_perm_iram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm, bool exec_perm);
+
+/**
+ * @brief Sets permissions for high and low memory segment in IRAM region
+ *
+ * Sets Read, Write and Execute permission for both low and high memory segments given by splitting address.
+ * The splitting address must be equal to or higher then beginning of block 5
+ * Applicable only to IRAM memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_set_prot_iram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
+
+/**
+ * @brief Activates memory protection for all supported memory region types
+ *
+ * @note The feature is disabled when JTAG interface is connected
+ *
+ * @param invoke_panic_handler map mem.prot interrupt to ETS_MEMACCESS_ERR_INUM and thus invokes panic handler when fired ('true' not suitable for testing)
+ * @param lock_feature sets LOCK bit, see esp_memprot_set_lock() ('true' not suitable for testing)
+ * @param mem_type_mask holds a set of required memory protection types (bitmask built of mem_type_prot_t). NULL means default (MEMPROT_ALL in this version)
+ */
+void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
+
+/**
+ * @brief Get permission settings bits for IRAM0 split mgmt. Only IRAM0 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_get_perm_split_bits_iram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+
+/**
+ * @brief Get permission settings bits for DRAM0 split mgmt. Only DRAM0 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_get_perm_split_bits_dram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
+
+/**
+ * @brief Sets permissions for high and low memory segment in PERIBUS1 region
+ *
+ * Sets Read and Write permission for both low and high memory segments given by splitting address.
+ * Applicable only to PERIBUS1 memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_set_prot_peri1(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
+
+/**
+ * @brief Get permission settings bits for PERIBUS1 split mgmt. Only PERIBUS1 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_get_perm_split_bits_peri1(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
+
+/**
+ * @brief Get permission settings bits for PERIBUS2 split mgmt. Only PERIBUS2 memory types allowed
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_get_perm_split_bits_peri2(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+
+/**
+ * @brief Sets permissions for high and low memory segment in PERIBUS2 region
+ *
+ * Sets Read Write permission for both low and high memory segments given by splitting address.
+ * Applicable only to PERIBUS2 memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param split_addr Address to split the memory region to lower and higher segment
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_set_prot_peri2(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
+
+/**
+ * @brief Get permissions for specified memory type. Irrelevant bits are ignored
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lw Low segment Write permission flag
+ * @param lr Low segment Read permission flag
+ * @param lx Low segment Execute permission flag
+ * @param hw High segment Write permission flag
+ * @param hr High segment Read permission flag
+ * @param hx High segment Execute permission flag
+ */
+void esp_memprot_get_permissions(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
+
+/**
+ * @brief Get Read permission settings for low and high regions of given memory type
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Read permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_get_perm_read(mem_type_prot_t mem_type, bool *lr, bool *hr);
+
+/**
+ * @brief Get Write permission settings for low and high regions of given memory type
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Write permission flag
+ * @param hr High segment Write permission flag
+ */
+void esp_memprot_get_perm_write(mem_type_prot_t mem_type, bool *lw, bool *hw);
+
+/**
+ * @brief Get Execute permission settings for low and high regions of given memory type
+ * Applicable only to IBUS-compatible memory types
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Exec permission flag
+ * @param hr High segment Exec permission flag
+ */
+void esp_memprot_get_perm_exec(mem_type_prot_t mem_type, bool *lx, bool *hx);
+
+/**
+ * @brief Returns the lowest address in required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+uint32_t esp_memprot_get_low_limit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Returns the highest address in required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ */
+uint32_t esp_memprot_get_high_limit(mem_type_prot_t mem_type);
+
+/**
+ * @brief Sets READ permission bit for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Read permission flag
+ * @param hr High segment Read permission flag
+ */
+void esp_memprot_set_read_perm(mem_type_prot_t mem_type, bool lr, bool hr);
+
+/**
+ * @brief Sets WRITE permission bit for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Write permission flag
+ * @param hr High segment Write permission flag
+ */
+void esp_memprot_set_write_perm(mem_type_prot_t mem_type, bool lw, bool hw);
+
+/**
+ * @brief Sets EXECUTE permission bit for required memory region
+ *
+ * @param mem_type Memory protection area type (see mem_type_prot_t enum)
+ * @param lr Low segment Exec permission flag
+ * @param hr High segment Exec permission flag
+ */
+void esp_memprot_set_exec_perm(mem_type_prot_t mem_type, bool lx, bool hx);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/rtc.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/rtc.h
new file mode 100644
index 00000000..296292e2
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/rtc.h
@@ -0,0 +1,39 @@
+// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file esp32s2/rtc.h
+ *
+ * This file contains declarations of rtc related functions.
+ */
+
+/**
+ * @brief Get current value of RTC counter in microseconds
+ *
+ * Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
+ *
+ * @return current value of RTC counter in microseconds
+ */
+uint64_t esp_rtc_get_time_us(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/spiram.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/spiram.h
new file mode 100644
index 00000000..105a6054
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp32s3/spiram.h
@@ -0,0 +1,146 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef __ESP_SPIRAM_H
+#define __ESP_SPIRAM_H
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Initialize spiram interface/hardware. Normally called from cpu_start.c.
+ *
+ * @return ESP_OK on success
+ */
+esp_err_t esp_spiram_init(void);
+
+/**
+ * @brief Configure Cache/MMU for access to external SPI RAM.
+ *
+ * Normally this function is called from cpu_start, if CONFIG_SPIRAM_BOOT_INIT
+ * option is enabled. Applications which need to enable SPI RAM at run time
+ * can disable CONFIG_SPIRAM_BOOT_INIT, and call this function later.
+ *
+ * @attention this function must be called with flash cache disabled.
+ */
+void esp_spiram_init_cache(void);
+
+
+/**
+ * @brief Memory test for SPI RAM. Should be called after SPI RAM is initialized and
+ * (in case of a dual-core system) the app CPU is online. This test overwrites the
+ * memory with crap, so do not call after e.g. the heap allocator has stored important
+ * stuff in SPI RAM.
+ *
+ * @return true on success, false on failed memory test
+ */
+bool esp_spiram_test(void);
+
+
+/**
+ * @brief Add the initialized SPI RAM to the heap allocator.
+ */
+esp_err_t esp_spiram_add_to_heapalloc(void);
+
+
+/**
+ * @brief Get the size of the attached SPI RAM chip selected in menuconfig
+ *
+ * @return Size in bytes, or 0 if no external RAM chip support compiled in.
+ */
+size_t esp_spiram_get_size(void);
+
+
+/**
+ * @brief Force a writeback of the data in the SPI RAM cache. This is to be called whenever
+ * cache is disabled, because disabling cache on the ESP32 discards the data in the SPI
+ * RAM cache.
+ *
+ * This is meant for use from within the SPI flash code.
+ */
+void esp_spiram_writeback_cache(void);
+
+
+
+/**
+ * @brief Reserve a pool of internal memory for specific DMA/internal allocations
+ *
+ * @param size Size of reserved pool in bytes
+ *
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NO_MEM when no memory available for pool
+ */
+esp_err_t esp_spiram_reserve_dma_pool(size_t size);
+
+#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS
+
+extern int _instruction_reserved_start, _instruction_reserved_end;
+
+/**
+ * @brief Get the start page number of the instruction in SPI flash
+ *
+ * @return start page number
+ */
+uint32_t instruction_flash_start_page_get(void);
+/**
+ * @brief Get the end page number of the instruction in SPI flash
+ *
+ * @return end page number
+ */
+uint32_t instruction_flash_end_page_get(void);
+/**
+ * @brief Get the offset of instruction from SPI flash to SPI RAM
+ *
+ * @return instruction offset
+ */
+int instruction_flash2spiram_offset(void);
+#endif
+
+#if CONFIG_SPIRAM_RODATA
+
+extern int _rodata_reserved_start, _rodata_reserved_end;
+
+/**
+ * @brief Get the start page number of the rodata in SPI flash
+ *
+ * @return start page number
+ */
+uint32_t rodata_flash_start_page_get(void);
+/**
+ * @brief Get the end page number of the rodata in SPI flash
+ *
+ * @return end page number
+ */
+uint32_t rodata_flash_end_page_get(void);
+/**
+ * @brief Get the offset number of rodata from SPI flash to SPI RAM
+ *
+ * @return rodata offset
+ */
+int rodata_flash2spiram_offset(void);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp_himem.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp_himem.h
new file mode 100644
index 00000000..c3ac9f52
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp_himem.h
@@ -0,0 +1,2 @@
+#warning esp_himem.h has been replaced by esp32/himem.h, please include esp32/himem.h instead
+#include "esp32/himem.h"
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp_spiram.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp_spiram.h
new file mode 100644
index 00000000..eabd6b6b
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/esp_spiram.h
@@ -0,0 +1,2 @@
+#warning esp_spiram.h has been replaced by esp32/spiram.h, please include esp32/spiram.h instead
+#include "esp32/spiram.h"
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/spinlock.h b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/spinlock.h
index 5370642a..66baa930 100644
--- a/tools/sdk/esp32s2/include/esp_hw_support/include/soc/spinlock.h
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/soc/spinlock.h
@@ -18,7 +18,6 @@
 #include "sdkconfig.h"
 #include "soc/cpu.h"
 #include "hal/cpu_hal.h"
-#include "soc/soc_memory_layout.h"
 #include "soc/compare_set.h"
 
 #if __XTENSA__
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/port/esp32s2/spiram_psram.h b/tools/sdk/esp32s2/include/esp_hw_support/port/esp32s2/spiram_psram.h
new file mode 100644
index 00000000..ea7908f0
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_hw_support/port/esp32s2/spiram_psram.h
@@ -0,0 +1,80 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _PSRAM_H
+#define _PSRAM_H
+#include "soc/spi_mem_reg.h"
+#include "esp_err.h"
+#include "sdkconfig.h"
+
+typedef enum {
+    PSRAM_CACHE_S80M = 1,
+    PSRAM_CACHE_S40M,
+    PSRAM_CACHE_S26M,
+    PSRAM_CACHE_S20M,
+    PSRAM_CACHE_MAX,
+} psram_cache_mode_t;
+
+typedef enum {
+    PSRAM_SIZE_16MBITS = 0,
+    PSRAM_SIZE_32MBITS = 1,
+    PSRAM_SIZE_64MBITS = 2,
+    PSRAM_SIZE_MAX,
+} psram_size_t;
+
+/*
+See the TRM, chapter PID/MPU/MMU, header 'External RAM' for the definitions of these modes.
+
+Important is that NORMAL works with the app CPU cache disabled, but gives huge cache coherency
+issues when both app and pro CPU are enabled. LOWHIGH and EVENODD do not have these coherency
+issues but cannot be used when the app CPU cache is disabled.
+*/
+typedef enum {
+    PSRAM_VADDR_MODE_NORMAL=0, ///< App and pro CPU use their own flash cache for external RAM access
+    PSRAM_VADDR_MODE_LOWHIGH,  ///< App and pro CPU share external RAM caches: pro CPU has low 2M, app CPU has high 2M
+    PSRAM_VADDR_MODE_EVENODD,  ///< App and pro CPU share external RAM caches: pro CPU does even 32yte ranges, app does odd ones.
+} psram_vaddr_mode_t;
+
+/**
+ * @brief get psram size
+ * @return
+ *     - PSRAM_SIZE_MAX if psram not enabled or not valid
+ *     - PSRAM size
+ */
+psram_size_t psram_get_size(void);
+
+/**
+ * @brief psram cache enable function
+ *
+ * Esp-idf uses this to initialize cache for psram, mapping it into the main memory
+ * address space.
+ *
+ * @param mode       SPI mode to access psram in
+ * @param vaddrmode  Mode the psram cache works in.
+ * @return ESP_OK on success, ESP_ERR_INVALID_STATE when VSPI peripheral is needed but cannot be claimed.
+ */
+esp_err_t psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vaddrmode);
+
+typedef enum {
+    SPIRAM_WRAP_MODE_16B,
+    SPIRAM_WRAP_MODE_32B,
+    SPIRAM_WRAP_MODE_64B,
+    SPIRAM_WRAP_MODE_DISABLE
+} spiram_wrap_mode_t;
+
+esp_err_t esp_spiram_wrap_set(spiram_wrap_mode_t mode);
+
+
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_rom/include/esp32/rom/rtc.h b/tools/sdk/esp32s2/include/esp_rom/include/esp32/rom/rtc.h
index 79ad9b0a..2be040aa 100644
--- a/tools/sdk/esp32s2/include/esp_rom/include/esp32/rom/rtc.h
+++ b/tools/sdk/esp32s2/include/esp_rom/include/esp32/rom/rtc.h
@@ -22,6 +22,7 @@
 
 #include "soc/soc.h"
 #include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -98,6 +99,19 @@ typedef enum {
     RTCWDT_RTC_RESET       = 16     /**<16, RTC Watch dog reset digital core and rtc module*/
 } RESET_REASON;
 
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)SW_RESET == RESET_REASON_CORE_SW, "SW_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TGWDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TGWDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)SW_CPU_RESET == RESET_REASON_CPU0_SW, "SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+
 typedef enum {
     NO_SLEEP        = 0,
     EXT_EVENT0_TRIG = BIT0,
diff --git a/tools/sdk/esp32s2/include/esp_rom/include/esp32c3/rom/rtc.h b/tools/sdk/esp32s2/include/esp_rom/include/esp32c3/rom/rtc.h
index fcbfddc1..76ece7e8 100644
--- a/tools/sdk/esp32s2/include/esp_rom/include/esp32c3/rom/rtc.h
+++ b/tools/sdk/esp32s2/include/esp_rom/include/esp32c3/rom/rtc.h
@@ -22,6 +22,7 @@
 
 #include "soc/soc.h"
 #include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -99,6 +100,20 @@ typedef enum {
     SUPER_WDT_RESET        = 18,    /**<11, super watchdog reset digital core and rtc module*/
 } RESET_REASON;
 
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
+
 typedef enum {
     NO_SLEEP        = 0,
     EXT_EVENT0_TRIG = BIT0,
diff --git a/tools/sdk/esp32s2/include/esp_rom/include/esp32h2/rom/rtc.h b/tools/sdk/esp32s2/include/esp_rom/include/esp32h2/rom/rtc.h
index fcbfddc1..76ece7e8 100644
--- a/tools/sdk/esp32s2/include/esp_rom/include/esp32h2/rom/rtc.h
+++ b/tools/sdk/esp32s2/include/esp_rom/include/esp32h2/rom/rtc.h
@@ -22,6 +22,7 @@
 
 #include "soc/soc.h"
 #include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -99,6 +100,20 @@ typedef enum {
     SUPER_WDT_RESET        = 18,    /**<11, super watchdog reset digital core and rtc module*/
 } RESET_REASON;
 
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
+
 typedef enum {
     NO_SLEEP        = 0,
     EXT_EVENT0_TRIG = BIT0,
diff --git a/tools/sdk/esp32s2/include/esp_rom/include/esp32s2/rom/rtc.h b/tools/sdk/esp32s2/include/esp_rom/include/esp32s2/rom/rtc.h
index 509b6fd4..d46e5d7b 100644
--- a/tools/sdk/esp32s2/include/esp_rom/include/esp32s2/rom/rtc.h
+++ b/tools/sdk/esp32s2/include/esp_rom/include/esp32s2/rom/rtc.h
@@ -22,6 +22,7 @@
 
 #include "soc/soc.h"
 #include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -98,6 +99,21 @@ typedef enum {
     GLITCH_RTC_RESET       = 19,    /**<19, glitch reset digital core and rtc module*/
 } RESET_REASON;
 
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
+_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
+
 typedef enum {
     NO_SLEEP        = 0,
     EXT_EVENT0_TRIG = BIT0,
diff --git a/tools/sdk/esp32s2/include/esp_rom/include/esp32s3/rom/rtc.h b/tools/sdk/esp32s2/include/esp_rom/include/esp32s3/rom/rtc.h
index c1a31a38..09d2376e 100644
--- a/tools/sdk/esp32s2/include/esp_rom/include/esp32s3/rom/rtc.h
+++ b/tools/sdk/esp32s2/include/esp_rom/include/esp32s3/rom/rtc.h
@@ -17,6 +17,7 @@
 #include <stdbool.h>
 #include <stdint.h>
 #include "soc/rtc_cntl_reg.h"
+#include "soc/reset_reasons.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -93,6 +94,22 @@ typedef enum {
     EFUSE_RESET            = 20,    /**<20, efuse reset digital core*/
 } RESET_REASON;
 
+// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
+_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
+_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
+_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
+_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
+_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
+_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
+_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
+_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
+_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
+_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
+_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
+_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
+_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
+_Static_assert((soc_reset_reason_t)EFUSE_RESET == RESET_REASON_CORE_EFUSE_CRC, "EFUSE_RESET != RESET_REASON_CORE_EFUSE_CRC");
+
 typedef enum {
     NO_SLEEP        = 0,
     EXT_EVENT0_TRIG = BIT0,
diff --git a/tools/sdk/esp32s2/include/esp_rom/include/esp_rom_sys.h b/tools/sdk/esp32s2/include/esp_rom/include/esp_rom_sys.h
index a5b01ade..9bf73ade 100644
--- a/tools/sdk/esp32s2/include/esp_rom/include/esp_rom_sys.h
+++ b/tools/sdk/esp32s2/include/esp_rom/include/esp_rom_sys.h
@@ -14,12 +14,13 @@
 
 #pragma once
 
+#include <stdint.h>
+#include "soc/reset_reasons.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include <stdint.h>
-
 /**
  * @brief Print formated string to console device
  * @note float and long long data are not supported!
@@ -51,6 +52,14 @@ void esp_rom_install_channel_putc(int channel, void (*putc)(char c));
  */
 void esp_rom_install_uart_printf(void);
 
+/**
+ * @brief Get reset reason of CPU
+ *
+ * @param cpu_no CPU number
+ * @return Reset reason code (see in soc/reset_reasons.h)
+ */
+soc_reset_reason_t esp_rom_get_reset_reason(int cpu_no);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/esp_system/include/eh_frame_parser.h b/tools/sdk/esp32s2/include/esp_system/include/eh_frame_parser.h
new file mode 100644
index 00000000..f99f63bb
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_system/include/eh_frame_parser.h
@@ -0,0 +1,35 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef EH_FRAME_PARSER_H
+#define EH_FRAME_PARSER_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Print backtrace for the given execution frame.
+ *
+ * @param frame_or Snapshot of the CPU registers when the program stopped its
+ *                 normal execution. This frame is usually generated on the
+ *                 stack when an exception or an interrupt occurs.
+ */
+void esp_eh_frame_print_backtrace(const void *frame_or);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s2/include/freertos/port/xtensa/include/freertos/portmacro.h b/tools/sdk/esp32s2/include/freertos/port/xtensa/include/freertos/portmacro.h
index 222a5ae8..eeabdf78 100644
--- a/tools/sdk/esp32s2/include/freertos/port/xtensa/include/freertos/portmacro.h
+++ b/tools/sdk/esp32s2/include/freertos/port/xtensa/include/freertos/portmacro.h
@@ -308,11 +308,22 @@ static inline void uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t comp
 void vPortYield( void );
 void vPortEvaluateYieldFromISR(int argc, ...);
 void _frxt_setup_switch( void );
+
 /**
  * Macro to count number of arguments of a __VA_ARGS__ used to support portYIELD_FROM_ISR with,
- * or without arguments.
+ * or without arguments. The macro counts only 0 or 1 arguments.
+ *
+ * In the future, we want to switch to C++20. We also want to become compatible with clang.
+ * Hence, we provide two versions of the following macros which are using variadic arguments.
+ * The first one is using the GNU extension ##__VA_ARGS__. The second one is using the C++20 feature __VA_OPT__(,).
+ * This allows users to compile their code with standard C++20 enabled instead of the GNU extension.
+ * Below C++20, we haven't found any good alternative to using ##__VA_ARGS__.
  */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define portGET_ARGUMENT_COUNT(...) portGET_ARGUMENT_COUNT_INNER(0 __VA_OPT__(,) __VA_ARGS__,1,0)
+#else
 #define portGET_ARGUMENT_COUNT(...) portGET_ARGUMENT_COUNT_INNER(0, ##__VA_ARGS__,1,0)
+#endif
 #define portGET_ARGUMENT_COUNT_INNER(zero, one, count, ...) count
 
 _Static_assert(portGET_ARGUMENT_COUNT() == 0, "portGET_ARGUMENT_COUNT() result does not match for 0 arguments");
@@ -325,7 +336,11 @@ _Static_assert(portGET_ARGUMENT_COUNT(1) == 1, "portGET_ARGUMENT_COUNT() result
  *          it was developed to support both usages of portYIELD inside of an ISR. Any other usage form
  *          might result in undesired behaviour
  */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define portYIELD_FROM_ISR(...) vPortEvaluateYieldFromISR(portGET_ARGUMENT_COUNT(__VA_ARGS__) __VA_OPT__(,) __VA_ARGS__)
+#else
 #define portYIELD_FROM_ISR(...) vPortEvaluateYieldFromISR(portGET_ARGUMENT_COUNT(__VA_ARGS__), ##__VA_ARGS__)
+#endif
 
 /* Yielding within an API call (when interrupts are off), means the yield should be delayed
    until interrupts are re-enabled.
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/i2c_ll.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/i2c_ll.h
index e77fd18e..81fb326b 100644
--- a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/i2c_ll.h
+++ b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/i2c_ll.h
@@ -680,7 +680,7 @@ static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw)
 }
 
 /**
- * @brief
+ * @brief Enable I2C slave TX interrupt
  *
  * @param  hw Beginning address of the peripheral registers
  *
@@ -752,7 +752,7 @@ static inline void i2c_ll_slave_clr_rx_it(i2c_dev_t *hw)
 }
 
 /**
- * @brief Reste I2C master FSM. When the master FSM is stuck, call this function to reset the FSM
+ * @brief Reset I2C master FSM. When the master FSM is stuck, call this function to reset the FSM
  *
  * @param  hw Beginning address of the peripheral registers
  *
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/spi_ll.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/spi_ll.h
index 5993a5f3..855036d0 100644
--- a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/spi_ll.h
+++ b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/spi_ll.h
@@ -137,6 +137,9 @@ static inline void spi_ll_slave_init(spi_dev_t *hw)
     hw->user.usr_miso_highpart = 0;
     hw->user.usr_mosi_highpart = 0;
 
+    // Configure DMA In-Link to not be terminated when transaction bit counter exceeds
+    hw->dma_conf.rx_eof_en = 0;
+
     //Disable unneeded ints
     hw->slave.val &= ~SPI_LL_UNUSED_INT_MASK;
 }
@@ -545,7 +548,6 @@ static inline void spi_ll_master_set_io_mode(spi_dev_t *hw, spi_ll_io_mode_t io_
 static inline void spi_ll_slave_set_seg_mode(spi_dev_t *hw, bool seg_trans)
 {
     hw->dma_conf.dma_seg_trans_en = seg_trans;
-    hw->dma_conf.rx_eof_en = seg_trans;
 }
 
 /**
@@ -564,6 +566,16 @@ static inline void spi_ll_master_select_cs(spi_dev_t *hw, int cs_id)
     hw->misc.cs5_dis = (cs_id == 5) ? 0 : 1;
 }
 
+/**
+ * Keep Chip Select activated after the current transaction.
+ *
+ * @param hw Beginning address of the peripheral registers.
+ * @param keep_active if 0 don't keep CS activated, else keep CS activated
+ */
+static inline void spi_ll_master_keep_cs(spi_dev_t *hw, int keep_active) {
+    hw->misc.cs_keep_active = (keep_active != 0) ? 1 : 0;
+}
+
 /*------------------------------------------------------------------------------
  * Configs: parameters
  *----------------------------------------------------------------------------*/
@@ -807,7 +819,7 @@ static inline void spi_ll_set_mosi_bitlen(spi_dev_t *hw, size_t bitlen)
  */
 static inline void spi_ll_slave_set_rx_bitlen(spi_dev_t *hw, size_t bitlen)
 {
-    spi_ll_set_miso_bitlen(hw, bitlen);
+    //This is not used in esp32s2
 }
 
 /**
@@ -818,7 +830,7 @@ static inline void spi_ll_slave_set_rx_bitlen(spi_dev_t *hw, size_t bitlen)
  */
 static inline void spi_ll_slave_set_tx_bitlen(spi_dev_t *hw, size_t bitlen)
 {
-    spi_ll_set_miso_bitlen(hw, bitlen);
+    //This is not used in esp32s2
 }
 
 /**
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/usb_ll.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/usb_ll.h
index 5496d7a6..2be637f5 100644
--- a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/usb_ll.h
+++ b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/usb_ll.h
@@ -37,6 +37,6 @@ static inline void usb_ll_int_phy_pullup_conf(bool dp_pu, bool dp_pd, bool dm_pu
     conf.dp_pullup = dp_pu;
     conf.dp_pulldown = dp_pd;
     conf.dm_pullup = dm_pu;
-    conf.dm_pulldown = dp_pd;
+    conf.dm_pulldown = dm_pd;
     USB_WRAP.otg_conf = conf;
 }
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/adc_types.h b/tools/sdk/esp32s2/include/hal/include/hal/adc_types.h
index bf71cb43..c0f6661f 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/adc_types.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/adc_types.h
@@ -133,7 +133,7 @@ typedef struct {
 -                                         2: 11 bit;
 -                                         3: 12 bit. */
             int8_t channel:   4;   /*!< ADC channel index. */
-#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+#elif CONFIG_IDF_TARGET_ESP32S2
             uint8_t reserved:  2;   /*!< reserved0 */
             uint8_t channel:   4;   /*!< ADC channel index. */
 #elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
@@ -295,7 +295,7 @@ typedef struct {
 #endif
 } adc_digi_config_t;
 
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+#if CONFIG_IDF_TARGET_ESP32S2
 /**
  * @brief ADC digital controller (DMA mode) interrupt type options.
  */
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/dma_types.h b/tools/sdk/esp32s2/include/hal/include/hal/dma_types.h
index 7583bf6f..66c8677e 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/dma_types.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/dma_types.h
@@ -14,12 +14,12 @@
 
 #pragma once
 
+#include <stdint.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include <stdint.h>
-
 /**
  * @brief Type of DMA descriptor
  *
@@ -43,3 +43,7 @@ _Static_assert(sizeof(dma_descriptor_t) == 12, "dma_descriptor_t should occupy 1
 #define DMA_DESCRIPTOR_BUFFER_OWNER_CPU (0)   /*!< DMA buffer is allowed to be accessed by CPU */
 #define DMA_DESCRIPTOR_BUFFER_OWNER_DMA (1)   /*!< DMA buffer is allowed to be accessed by DMA engine */
 #define DMA_DESCRIPTOR_BUFFER_MAX_SIZE (4095) /*!< Maximum size of the buffer that can be attached to descriptor */
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/eth_types.h b/tools/sdk/esp32s2/include/hal/include/hal/eth_types.h
index 72494845..21961895 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/eth_types.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/eth_types.h
@@ -24,8 +24,8 @@
 *
 */
 typedef enum {
-    EMAC_INTERFACE_MII,     /*!< Media Independent Interface */
-    EMAC_INTERFACE_RMII     /*!< Reduced Media Independent Interface */
+    EMAC_DATA_INTERFACE_RMII,    /*!< Reduced Media Independent Interface */
+    EMAC_DATA_INTERFACE_MII,     /*!< Media Independent Interface */
 } eth_data_interface_t;
 
 /**
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/i2c_hal.h b/tools/sdk/esp32s2/include/hal/include/hal/i2c_hal.h
index ae1c95be..b255878c 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/i2c_hal.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/i2c_hal.h
@@ -110,6 +110,16 @@ typedef struct {
  */
 #define i2c_hal_slave_clr_rx_it(hal)    i2c_ll_slave_clr_rx_it((hal)->dev)
 
+/**
+ * @brief  Set the source clock. This function is meant to be used in
+ *         slave mode, in order to select a source clock abe to handle
+ *         the expected SCL frequency.
+ *
+ * @param  hal Context of the HAL layer
+ * @param  src_clk Source clock to use choosen from `i2c_sclk_t` type
+ */
+#define i2c_hal_set_source_clk(hal, src_clk) i2c_ll_set_source_clk((hal)->dev, src_clk)
+
 /**
  * @brief  Init the I2C master.
  *
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/sha_types.h b/tools/sdk/esp32s2/include/hal/include/hal/sha_types.h
index 275ca60c..547124b5 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/sha_types.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/sha_types.h
@@ -19,25 +19,26 @@
 /* Use enum from rom for backwards compatibility */
 #if CONFIG_IDF_TARGET_ESP32
 #include "esp32/rom/sha.h"
-typedef enum SHA_TYPE esp_sha_type;
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/sha.h"
-typedef SHA_TYPE esp_sha_type;
 #elif CONFIG_IDF_TARGET_ESP32S3
 #include "esp32s3/rom/sha.h"
-typedef SHA_TYPE esp_sha_type;
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/sha.h"
-typedef SHA_TYPE esp_sha_type;
 #elif CONFIG_IDF_TARGET_ESP32H2
 #include "esp32h2/rom/sha.h"
-typedef SHA_TYPE esp_sha_type;
 #endif
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+/* Use enum from rom for backwards compatibility */
+#if CONFIG_IDF_TARGET_ESP32
+typedef enum SHA_TYPE esp_sha_type;
+#else
+typedef SHA_TYPE esp_sha_type;
+#endif
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/spi_flash_hal.h b/tools/sdk/esp32s2/include/hal/include/hal/spi_flash_hal.h
index 6690b9c6..dbbb5ff5 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/spi_flash_hal.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/spi_flash_hal.h
@@ -25,7 +25,7 @@
 #include "hal/spi_flash_ll.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
-#include "soc/soc_memory_layout.h"
+#include "soc/soc_memory_types.h"
 
 /* Hardware host-specific constants */
 #define SPI_FLASH_HAL_MAX_WRITE_BYTES 64
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/spi_hal.h b/tools/sdk/esp32s2/include/hal/include/hal/spi_hal.h
index 1c4dc3a0..b37c7c92 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/spi_hal.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/spi_hal.h
@@ -101,6 +101,7 @@ typedef struct {
     uint8_t *send_buffer;               ///< Data to be sent
     uint8_t *rcv_buffer;                ///< Buffer to hold the receive data.
     spi_ll_io_mode_t io_mode;           ///< IO mode of the master
+    int cs_keep_active;                 ///< Keep CS active after transaction
 } spi_hal_trans_config_t;
 
 /**
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/twai_types.h b/tools/sdk/esp32s2/include/hal/include/hal/twai_types.h
index 5c51dba6..f4d5ef52 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/twai_types.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/twai_types.h
@@ -61,9 +61,9 @@ extern "C" {
  * @note The available bit rates are dependent on the chip target and revision.
  */
 #if (SOC_TWAI_BRP_MAX > 256)
-#define TWAI_TIMING_CONFIG_1KBITS()     {.brp = 4000, .tseg_1 = 15, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
-#define TWAI_TIMING_CONFIG_5KBITS()     {.brp = 800, .tseg_1 = 15, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
-#define TWAI_TIMING_CONFIG_10KBITS()    {.brp = 400, .tseg_1 = 15, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_1KBITS()     {.brp = 4000, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_5KBITS()     {.brp = 800, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
+#define TWAI_TIMING_CONFIG_10KBITS()    {.brp = 400, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
 #endif
 #if (SOC_TWAI_BRP_MAX > 128) || (CONFIG_ESP32_REV_MIN >= 2)
 #define TWAI_TIMING_CONFIG_12_5KBITS()  {.brp = 256, .tseg_1 = 16, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/uart_hal.h b/tools/sdk/esp32s2/include/hal/include/hal/uart_hal.h
index d236431d..f7b94888 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/uart_hal.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/uart_hal.h
@@ -124,6 +124,16 @@ typedef struct {
  */
 #define uart_hal_is_tx_idle(hal)  uart_ll_is_tx_idle((hal)->dev)
 
+/**
+ * @brief  Configure the UART core reset
+ *
+ * @param  hal Context of the HAL layer
+ * @param  Set true to enable the core reset, otherwise set it false
+ *
+ * @return None
+ */
+#define uart_hal_set_reset_core(hal, core_rst_en)  uart_ll_set_reset_core((hal)->dev, core_rst_en)
+
 /**
  * @brief  Read data from the UART rxfifo
  *
diff --git a/tools/sdk/esp32s2/include/heap/include/heap_memory_layout.h b/tools/sdk/esp32s2/include/heap/include/heap_memory_layout.h
new file mode 100644
index 00000000..5ad5ad85
--- /dev/null
+++ b/tools/sdk/esp32s2/include/heap/include/heap_memory_layout.h
@@ -0,0 +1,113 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "sdkconfig.h"
+
+#define SOC_MEMORY_TYPE_NO_PRIOS 3
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Type descriptor holds a description for a particular type of memory on a particular SoC.
+ */
+typedef struct {
+    const char *name;  ///< Name of this memory type
+    uint32_t caps[SOC_MEMORY_TYPE_NO_PRIOS]; ///< Capabilities for this memory type (as a prioritised set)
+    bool aliased_iram;   ///< If true, this is data memory that is is also mapped in IRAM
+    bool startup_stack; ///< If true, memory of this type is used for ROM stack during startup
+} soc_memory_type_desc_t;
+
+/* Constant table of tag descriptors for all this SoC's tags */
+extern const soc_memory_type_desc_t soc_memory_types[];
+extern const size_t soc_memory_type_count;
+
+/* Region descriptor holds a description for a particular region of memory on a particular SoC.
+ */
+typedef struct {
+    intptr_t start;  ///< Start address of the region
+    size_t size;            ///< Size of the region in bytes
+    size_t type;             ///< Type of the region (index into soc_memory_types array)
+    intptr_t iram_address; ///< If non-zero, is equivalent address in IRAM
+} soc_memory_region_t;
+
+extern const soc_memory_region_t soc_memory_regions[];
+extern const size_t soc_memory_region_count;
+
+/* Region descriptor holds a description for a particular region of
+   memory reserved on this SoC for a particular use (ie not available
+   for stack/heap usage.) */
+typedef struct {
+    intptr_t start;
+    intptr_t end;
+} soc_reserved_region_t;
+
+/* Use this macro to reserved a fixed region of RAM (hardcoded addresses)
+ * for a particular purpose.
+ *
+ * Usually used to mark out memory addresses needed for hardware or ROM code
+ * purposes.
+ *
+ * Don't call this macro from user code which can use normal C static allocation
+ * instead.
+ *
+ * @param START Start address to be reserved.
+ * @param END One after the address of the last byte to be reserved. (ie length of
+ * the reserved region is (END - START) in bytes.
+ * @param NAME Name for the reserved region. Must be a valid variable name,
+ * unique to this source file.
+ */
+#define SOC_RESERVE_MEMORY_REGION(START, END, NAME)     \
+    __attribute__((section(".reserved_memory_address"))) __attribute__((used)) \
+    static soc_reserved_region_t reserved_region_##NAME = { START, END };
+
+/* Return available memory regions for this SoC. Each available memory
+ * region is a contiguous piece of memory which is not being used by
+ * static data, used by ROM code, or reserved by a component using
+ * the SOC_RESERVE_MEMORY_REGION() macro.
+ *
+ * This result is soc_memory_regions[] minus all regions reserved
+ * via the SOC_RESERVE_MEMORY_REGION() macro (which may also split
+ * some regions up.)
+ *
+ * At startup, all available memory returned by this function is
+ * registered as heap space.
+ *
+ * @note OS-level startup function only, not recommended to call from
+ * app code.
+ *
+ * @param regions Pointer to an array for reading available regions into.
+ * Size of the array should be at least the result of
+ * soc_get_available_memory_region_max_count(). Entries in the array
+ * will be ordered by memory address.
+ *
+ * @return Number of entries copied to 'regions'. Will be no greater than
+ * the result of soc_get_available_memory_region_max_count().
+ */
+size_t soc_get_available_memory_regions(soc_memory_region_t *regions);
+
+/* Return the maximum number of available memory regions which could be
+ * returned by soc_get_available_memory_regions(). Used to size the
+ * array passed to that function.
+ */
+size_t soc_get_available_memory_region_max_count(void);
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/heap/include/soc/soc_memory_layout.h b/tools/sdk/esp32s2/include/heap/include/soc/soc_memory_layout.h
new file mode 100644
index 00000000..189cf602
--- /dev/null
+++ b/tools/sdk/esp32s2/include/heap/include/soc/soc_memory_layout.h
@@ -0,0 +1,21 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/**
+ * Compatibility header file.
+ */
+#pragma once
+
+#include "heap_memory_layout.h"
+#include "soc/soc_memory_types.h"
diff --git a/tools/sdk/esp32s2/include/idf_test/include/esp32/idf_performance_target.h b/tools/sdk/esp32s2/include/idf_test/include/esp32/idf_performance_target.h
index f9f0c414..5700d9f3 100644
--- a/tools/sdk/esp32s2/include/idf_test/include/esp32/idf_performance_target.h
+++ b/tools/sdk/esp32s2/include/idf_test/include/esp32/idf_performance_target.h
@@ -98,7 +98,8 @@
 #endif
 
 #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  73500
+//Collect data and correct it later
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  0
 #endif
 #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
 #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  (261*1000)
diff --git a/tools/sdk/esp32s2/include/ieee802154/include/esp_ieee802154.h b/tools/sdk/esp32s2/include/ieee802154/include/esp_ieee802154.h
new file mode 100644
index 00000000..a8d4678e
--- /dev/null
+++ b/tools/sdk/esp32s2/include/ieee802154/include/esp_ieee802154.h
@@ -0,0 +1,367 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_ieee802154_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief  Initialize the IEEE 802.15.4 subsystem.
+ *
+ */
+void esp_ieee802154_enable(void);
+
+/**
+ * @brief  Deinitialize the IEEE 802.15.4 subsystem.
+ *
+ */
+void esp_ieee802154_disable(void);
+
+/**
+ * @brief  Get the operational channel.
+ *
+ * @return The channel number (11~26).
+ *
+ */
+uint8_t esp_ieee802154_get_channel(void);
+
+/**
+ * @brief  Set the operational channel.
+ *
+ * @param[in]  channel  The channel number (11-26).
+ *
+ */
+void esp_ieee802154_set_channnel(uint8_t channel);
+
+/**
+ * @brief  Get the transmit power.
+ *
+ * @return The transmit power in dBm.
+ *
+ */
+int8_t esp_ieee802154_get_txpower(void);
+
+/**
+ * @brief  Set the transmit power.
+ *
+ * @param[in]  power  The transmit power in dBm.
+ *
+ */
+void esp_ieee802154_set_txpower(int8_t power);
+
+/**
+ * @brief  Get the promiscuous mode.
+ *
+ * @return
+ *      - True   The promiscuous mode is enabled.
+ *      - False  The promiscuous mode is disabled.
+ *
+ */
+bool esp_ieee802154_get_promiscuous(void);
+
+/**
+ * @brief  Set the promiscuous mode.
+ *
+ * @param[in]  enable  The promiscuous mode to be set.
+ *
+ */
+void esp_ieee802154_set_promiscuous(bool enable);
+
+/**
+ * @brief  Get the IEEE 802.15.4 Radio state.
+ *
+ * @return  The IEEE 802.15.4 Radio state, refer to esp_ieee802154_state_t.
+ *
+ */
+esp_ieee802154_state_t esp_ieee802154_get_state(void);
+
+/**
+ * @brief  Set the IEEE 802.15.4 Radio to sleep state.
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_FAIL on failure due to invalid state.
+ *
+ */
+esp_err_t esp_ieee802154_sleep(void);
+
+/**
+ * @brief  Set the IEEE 802.15.4 Radio to receive state.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_FAIL on failure due to invalid state.
+ *
+ * Note: Radio will continue receiving until it receives a valid frame.
+ *       Ref to esp_ieee802154_receive_done().
+ *
+ */
+esp_err_t esp_ieee802154_receive(void);
+
+/**
+ * @brief  Transmit the given frame.
+ *
+ * @param[in]  frame  The pointer to the frame, the frame format:
+ *                    |-----------------------------------------------------------------------|
+ *                    | Len | MHR |              MAC Payload                          |  FCS  |
+ *                    |-----------------------------------------------------------------------|
+ * @param[in]  cca    Perform CCA before transmission if it's true, otherwise transmit the frame directly.
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_FAIL on failure due to invalid state.
+ *
+ * Note: The transmit result will be reported via esp_ieee802154_transmit_done()
+ *       or esp_ieee802154_transmit_failed().
+ *
+ */
+esp_err_t esp_ieee802154_transmit(const uint8_t *frame, bool cca);
+
+/**
+ * @brief  Set the time to wait for the ack frame.
+ *
+ * @param[in]  timeout  The time to wait for the ack frame, in symbol unit (16 us).
+ *                      Default: 0x006C, Range: 0x0000 - 0xFFFF.
+ *
+ */
+void esp_ieee802154_set_ack_timeout(uint32_t timeout);
+
+/**
+ * @brief  Get the device PAN ID.
+ *
+ * @return  The device PAN ID.
+ *
+ */
+uint16_t esp_ieee802154_get_panid(void);
+
+/**
+ * @brief  Set the device PAN ID.
+ *
+ * @param[in]  panid  The device PAN ID.
+ *
+ */
+void esp_ieee802154_set_panid(uint16_t panid);
+
+/**
+ * @brief  Get the device short address.
+ *
+ * @return  The device short address.
+ *
+ */
+uint16_t esp_ieee802154_get_short_address(void);
+
+/**
+ * @brief  Set the device short address.
+ *
+ * @param[in]  short_address  The device short address.
+ *
+ */
+void esp_ieee802154_set_short_address(uint16_t short_address);
+
+/**
+ * @brief  Get the device extended address.
+ *
+ * @param[out]  ext_addr  The pointer to the device extended address.
+ *
+ */
+void esp_ieee802154_get_extended_address(uint8_t *ext_addr);
+
+/**
+ * @brief  Set the device extended address.
+ *
+ * @param[in]  ext_addr  The pointer to the device extended address.
+ *
+ */
+void esp_ieee802154_set_extended_address(const uint8_t *ext_addr);
+
+/**
+ * @brief  Get the auto frame pending mode.
+ *
+ * @return  The auto frame pending mode, refer to esp_ieee802154_pending_mode_t.
+ *
+ */
+esp_ieee802154_pending_mode_t esp_ieee802154_get_pending_mode(void);
+
+/**
+ * @brief  Set the auto frame pending mode.
+ *
+ * @param[in]  pending_mode  The auto frame pending mode, refer to esp_ieee802154_pending_mode_t.
+ *
+ */
+void esp_ieee802154_set_pending_mode(esp_ieee802154_pending_mode_t pending_mode);
+
+/**
+ * @brief  Add address to the source matching table.
+ *
+ * @param[in]  addr      The pointer to the address.
+ * @param[in]  is_short  Short address or Extended address.
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_ERR_NO_MEM if the pending table is full.
+ *
+ */
+esp_err_t esp_ieee802154_add_pending_addr(const uint8_t *addr, bool is_short);
+
+/**
+ * @brief  Remove address from the source matching table.
+ *
+ * @param[in]  addr      The pointer to the address.
+ * @param[in]  is_short  Short address or Extended address.
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_ERR_NOT_FOUND if the address was not found from the source matching table.
+ *
+ */
+esp_err_t esp_ieee802154_clear_pending_addr(const uint8_t *addr, bool is_short);
+
+/**
+ * @brief  Clear the source matching table to empty.
+ *
+ * @param[in]  is_short  Clear Short address table or Extended address table.
+ *
+ */
+void esp_ieee802154_reset_pending_table(bool is_short);
+
+/**
+ * @brief  Get the CCA threshold.
+ *
+ * @return  The CCA threshold in dBm.
+ *
+ */
+int8_t esp_ieee802154_get_cca_threshold(void);
+
+/**
+ * @brief  Set the CCA threshold.
+ *
+ * @param[in]  cca_threshold  The CCA threshold in dBm.
+ *
+ */
+void esp_ieee802154_set_cca_threshold(int8_t cca_threshold);
+
+/**
+ * @brief  Get the CCA mode.
+ *
+ * @return  The CCA mode, refer to esp_ieee802154_cca_mode_t.
+ *
+ */
+esp_ieee802154_cca_mode_t esp_ieee802154_get_cca_mode(void);
+
+/**
+ * @brief  Set the CCA mode.
+ *
+ * @param[in]  cca_mode  The CCA mode, refer to esp_ieee802154_cca_mode_t.
+ *
+ */
+void esp_ieee802154_set_cca_mode(esp_ieee802154_cca_mode_t cca_mode);
+
+/**
+ * @brief  Enable rx_on_when_idle mode, radio will receive during idle.
+ *
+ * @param[in]  enable  Enable/Disable rx_on_when_idle mode.
+ *
+ */
+void esp_ieee802154_set_rx_when_idle(bool enable);
+
+/**
+ * @brief  Get the rx_on_when_idle mode.
+ *
+ * @return  rx_on_when_idle mode.
+ *
+ */
+bool esp_ieee802154_get_rx_when_idle(void);
+
+/**
+ * @brief  Perform energy detection.
+ *
+ * @param[in]  duration  The duration of energy detection, in symbol unit (16 us).
+ *                       The result will be reported via esp_ieee802154_energy_detect_done().
+ *
+ * @return
+ *      - ESP_OK on success.
+ *      - ESP_FAIL on failure due to invalid state.
+ *
+ */
+esp_err_t esp_ieee802154_energy_detect(uint32_t duration);
+
+
+/** Below are the events generated by IEEE 802.15.4 subsystem, which are in ISR context **/
+/**
+ * @brief  A Frame was received.
+ *
+ * @param[in]  frame  The point to the received frame, frame format:
+ *                    |-----------------------------------------------------------------------|
+ *                    | Len | MHR |              MAC Payload                       (no FCS)   |
+ *                    |-----------------------------------------------------------------------|
+ * @param[in]  frame_info  More information of the received frame, refer to esp_ieee802154_frame_info_t.
+ *
+ */
+extern void esp_ieee802154_receive_done(uint8_t *frame, esp_ieee802154_frame_info_t *frame_info);
+
+/**
+ * @brief  The SFD field of the frame was received.
+ *
+ */
+extern void esp_ieee802154_receive_sfd_done(void);
+
+/**
+ * @brief  The Frame Transmission succeeded.
+ *
+ * @param[in]  frame           The pointer to the transmitted frame.
+ * @param[in]  ack             The received ACK frame, it could be NULL if the transmitted frame's AR bit is not set.
+ * @param[in]  ack_frame_info  More information of the ACK frame, refer to esp_ieee802154_frame_info_t.
+ *
+ * Note: refer to esp_ieee802154_transmit().
+ *
+ */
+extern void esp_ieee802154_transmit_done(const uint8_t *frame, const uint8_t *ack, esp_ieee802154_frame_info_t *ack_frame_info);
+
+/**
+ * @brief  The Frame Transmission failed.
+ *
+ * @param[in]  frame  The pointer to the frame.
+ * @param[in]  error  The transmission failure reason, refer to esp_ieee802154_tx_error_t.
+ *
+ * Note: refer to esp_ieee802154_transmit().
+ *
+ */
+extern void esp_ieee802154_transmit_failed(const uint8_t *frame, esp_ieee802154_tx_error_t error);
+
+/**
+ * @brief  The SFD field of the frame was transmitted.
+ *
+ */
+extern void esp_ieee802154_transmit_sfd_done(uint8_t *frame);
+
+/**
+ * @brief  The energy detection done.
+ *
+ * @param[in]  power  The detected power level, in dBm.
+ *
+ * Note: refer to esp_ieee802154_energy_detect().
+ *
+ */
+extern void esp_ieee802154_energy_detect_done(int8_t power);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/ieee802154/include/esp_ieee802154_types.h b/tools/sdk/esp32s2/include/ieee802154/include/esp_ieee802154_types.h
new file mode 100644
index 00000000..6979991c
--- /dev/null
+++ b/tools/sdk/esp32s2/include/ieee802154/include/esp_ieee802154_types.h
@@ -0,0 +1,79 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief The radio state types.
+ */
+typedef enum {
+    ESP_IEEE802154_RADIO_DISABLE,   /*!< Radio not up */
+    ESP_IEEE802154_RADIO_SLEEP,     /*!< Radio in the sleep state */
+    ESP_IEEE802154_RADIO_RECEIVE,   /*!< Radio in the receive state */
+    ESP_IEEE802154_RADIO_TRANSMIT,  /*!< Radio in the transmit state */
+} esp_ieee802154_state_t;
+
+/**
+ * @brief The transmit error types.
+ */
+typedef enum {
+    ESP_IEEE802154_TX_ERR_NONE,         /*!< No transmit error */
+    ESP_IEEE802154_TX_ERR_CCA_BUSY,     /*!< Channel is busy */
+    ESP_IEEE802154_TX_ERR_ABORT,        /*!< Transmit abort */
+    ESP_IEEE802154_TX_ERR_NO_ACK,       /*!< No Ack frame received until timeout */
+    ESP_IEEE802154_TX_ERR_INVALID_ACK,  /*!< Invalid Ack frame */
+    ESP_IEEE802154_TX_ERR_COEXIST,      /*!< Rejected by coexist system */
+} esp_ieee802154_tx_error_t;
+
+/**
+ * @brief The CCA mode types.
+ */
+typedef enum {
+    ESP_IEEE802154_CCA_MODE_CARRIER,         /*!< Carrier only */
+    ESP_IEEE802154_CCA_MODE_ED,              /*!< Energy Detect only */
+    ESP_IEEE802154_CCA_MODE_CARRIER_OR_ED,   /*!< Carrier or Energy Detect */
+    ESP_IEEE802154_CCA_MODE_CARRIER_AND_ED,  /*!< Carrier and Energy Detect */
+} esp_ieee802154_cca_mode_t;
+
+/**
+ * @brief The frame pending mode types.
+ */
+typedef enum {
+    ESP_IEEE802154_AUTO_PENDING_DISABLE,   /*!< Frame pending bit always set to 1 in the ack to Data Request */
+    ESP_IEEE802154_AUTO_PENDING_ENABLE,    /*!< Frame pending bit set to 1 if src address matches, in the ack to Data Request */
+    ESP_IEEE802154_AUTO_PENDING_ENHANCED,  /*!< Frame pending bit set to 1 if src address matches, in all ack frames */
+} esp_ieee802154_pending_mode_t;
+
+/**
+ * @brief The information of received 15.4 frame.
+ *
+ */
+typedef struct {
+    bool pending;                /*!< The frame was acked with frame pending set */
+    uint8_t channel;             /*!< Channel */
+    int8_t rssi;                 /*!< RSSI */
+    uint8_t lqi;                 /*!< LQI */
+    uint64_t timestamp;          /*!< The timestamp when the frame's SFD field was received */
+} esp_ieee802154_frame_info_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/log/include/esp_log.h b/tools/sdk/esp32s2/include/log/include/esp_log.h
index 6fb4476d..cf7bcd60 100644
--- a/tools/sdk/esp32s2/include/log/include/esp_log.h
+++ b/tools/sdk/esp32s2/include/log/include/esp_log.h
@@ -295,6 +295,26 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 /** @endcond */
 
 /// macro to output logs in startup code, before heap allocator and syscalls have been initialized. log at ``ESP_LOG_ERROR`` level. @see ``printf``,``ESP_LOGE``,``ESP_DRAM_LOGE``
+#define portGET_ARGUMENT_COUNT_INNER(zero, one, count, ...) count
+
+/**
+ * In the future, we want to switch to C++20. We also want to become compatible with clang.
+ * Hence, we provide two versions of the following macros which are using variadic arguments.
+ * The first one is using the GNU extension \#\#__VA_ARGS__. The second one is using the C++20 feature __VA_OPT__(,).
+ * This allows users to compile their code with standard C++20 enabled instead of the GNU extension.
+ * Below C++20, we haven't found any good alternative to using \#\#__VA_ARGS__.
+ */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_EARLY_LOGE( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_ERROR,   E __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_WARN`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGW( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_WARN,    W __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_INFO`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGI( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_INFO,    I __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_DEBUG`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGD( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_DEBUG,   D __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs in startup code at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
+#define ESP_EARLY_LOGV( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_VERBOSE, V __VA_OPT__(,) __VA_ARGS__)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #define ESP_EARLY_LOGE( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_ERROR,   E, ##__VA_ARGS__)
 /// macro to output logs in startup code at ``ESP_LOG_WARN`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
 #define ESP_EARLY_LOGW( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_WARN,    W, ##__VA_ARGS__)
@@ -304,6 +324,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 #define ESP_EARLY_LOGD( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_DEBUG,   D, ##__VA_ARGS__)
 /// macro to output logs in startup code at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
 #define ESP_EARLY_LOGV( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_VERBOSE, V, ##__VA_ARGS__)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 
 #ifdef BOOTLOADER_BUILD
 #define _ESP_LOG_EARLY_ENABLED(log_level) (LOG_LOCAL_LEVEL >= (log_level))
@@ -319,12 +340,21 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
         }} while(0)
 
 #ifndef BOOTLOADER_BUILD
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_LOGE( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_ERROR,   tag, format __VA_OPT__(,) __VA_ARGS__)
+#define ESP_LOGW( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_WARN,    tag, format __VA_OPT__(,) __VA_ARGS__)
+#define ESP_LOGI( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_INFO,    tag, format __VA_OPT__(,) __VA_ARGS__)
+#define ESP_LOGD( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_DEBUG,   tag, format __VA_OPT__(,) __VA_ARGS__)
+#define ESP_LOGV( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_VERBOSE, tag, format __VA_OPT__(,) __VA_ARGS__)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #define ESP_LOGE( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_ERROR,   tag, format, ##__VA_ARGS__)
 #define ESP_LOGW( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_WARN,    tag, format, ##__VA_ARGS__)
 #define ESP_LOGI( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_INFO,    tag, format, ##__VA_ARGS__)
 #define ESP_LOGD( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_DEBUG,   tag, format, ##__VA_ARGS__)
 #define ESP_LOGV( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_VERBOSE, tag, format, ##__VA_ARGS__)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #else
+
 /**
  * Macro to output logs at ESP_LOG_ERROR level.
  *
@@ -334,6 +364,17 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
  *
  * @see ``printf``
  */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_LOGE( tag, format, ... )  ESP_EARLY_LOGE(tag, format __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_WARN`` level.  @see ``ESP_LOGE``
+#define ESP_LOGW( tag, format, ... )  ESP_EARLY_LOGW(tag, format __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_INFO`` level.  @see ``ESP_LOGE``
+#define ESP_LOGI( tag, format, ... )  ESP_EARLY_LOGI(tag, format __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_DEBUG`` level.  @see ``ESP_LOGE``
+#define ESP_LOGD( tag, format, ... )  ESP_EARLY_LOGD(tag, format __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_LOGE``
+#define ESP_LOGV( tag, format, ... )  ESP_EARLY_LOGV(tag, format __VA_OPT__(,) __VA_ARGS__)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #define ESP_LOGE( tag, format, ... )  ESP_EARLY_LOGE(tag, format, ##__VA_ARGS__)
 /// macro to output logs at ``ESP_LOG_WARN`` level.  @see ``ESP_LOGE``
 #define ESP_LOGW( tag, format, ... )  ESP_EARLY_LOGW(tag, format, ##__VA_ARGS__)
@@ -343,6 +384,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 #define ESP_LOGD( tag, format, ... )  ESP_EARLY_LOGD(tag, format, ##__VA_ARGS__)
 /// macro to output logs at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_LOGE``
 #define ESP_LOGV( tag, format, ... )  ESP_EARLY_LOGV(tag, format, ##__VA_ARGS__)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #endif  // BOOTLOADER_BUILD
 
 /** runtime macro to output logs at a specified level.
@@ -354,6 +396,25 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
  *
  * @see ``printf``
  */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#if CONFIG_LOG_TIMESTAMP_SOURCE_RTOS
+#define ESP_LOG_LEVEL(level, tag, format, ...) do {                     \
+        if (level==ESP_LOG_ERROR )          { esp_log_write(ESP_LOG_ERROR,      tag, LOG_FORMAT(E, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_WARN )      { esp_log_write(ESP_LOG_WARN,       tag, LOG_FORMAT(W, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_DEBUG )     { esp_log_write(ESP_LOG_DEBUG,      tag, LOG_FORMAT(D, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_VERBOSE )   { esp_log_write(ESP_LOG_VERBOSE,    tag, LOG_FORMAT(V, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else                                { esp_log_write(ESP_LOG_INFO,       tag, LOG_FORMAT(I, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+    } while(0)
+#elif CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM
+#define ESP_LOG_LEVEL(level, tag, format, ...) do {                     \
+        if (level==ESP_LOG_ERROR )          { esp_log_write(ESP_LOG_ERROR,      tag, LOG_SYSTEM_TIME_FORMAT(E, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_WARN )      { esp_log_write(ESP_LOG_WARN,       tag, LOG_SYSTEM_TIME_FORMAT(W, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_DEBUG )     { esp_log_write(ESP_LOG_DEBUG,      tag, LOG_SYSTEM_TIME_FORMAT(D, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else if (level==ESP_LOG_VERBOSE )   { esp_log_write(ESP_LOG_VERBOSE,    tag, LOG_SYSTEM_TIME_FORMAT(V, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+        else                                { esp_log_write(ESP_LOG_INFO,       tag, LOG_SYSTEM_TIME_FORMAT(I, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
+    } while(0)
+#endif //CONFIG_LOG_TIMESTAMP_SOURCE_xxx
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #if CONFIG_LOG_TIMESTAMP_SOURCE_RTOS
 #define ESP_LOG_LEVEL(level, tag, format, ...) do {                     \
         if (level==ESP_LOG_ERROR )          { esp_log_write(ESP_LOG_ERROR,      tag, LOG_FORMAT(E, format), esp_log_timestamp(), tag, ##__VA_ARGS__); } \
@@ -371,6 +432,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
         else                                { esp_log_write(ESP_LOG_INFO,       tag, LOG_SYSTEM_TIME_FORMAT(I, format), esp_log_system_timestamp(), tag, ##__VA_ARGS__); } \
     } while(0)
 #endif //CONFIG_LOG_TIMESTAMP_SOURCE_xxx
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 
 /** runtime macro to output logs at a specified level. Also check the level with ``LOG_LOCAL_LEVEL``.
  *
@@ -397,6 +459,17 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
  *
  * @see ``esp_rom_printf``,``ESP_LOGE``
  */
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_DRAM_LOGE( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_ERROR,   E __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_WARN`` level.  @see ``ESP_DRAM_LOGW``,``ESP_LOGW``, ``esp_rom_printf``
+#define ESP_DRAM_LOGW( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_WARN,    W __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_INFO`` level.  @see ``ESP_DRAM_LOGI``,``ESP_LOGI``, ``esp_rom_printf``
+#define ESP_DRAM_LOGI( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_INFO,    I __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_DEBUG`` level.  @see ``ESP_DRAM_LOGD``,``ESP_LOGD``, ``esp_rom_printf``
+#define ESP_DRAM_LOGD( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_DEBUG,   D __VA_OPT__(,) __VA_ARGS__)
+/// macro to output logs when the cache is disabled at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_DRAM_LOGV``,``ESP_LOGV``, ``esp_rom_printf``
+#define ESP_DRAM_LOGV( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_VERBOSE, V __VA_OPT__(,) __VA_ARGS__)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #define ESP_DRAM_LOGE( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_ERROR,   E, ##__VA_ARGS__)
 /// macro to output logs when the cache is disabled at ``ESP_LOG_WARN`` level.  @see ``ESP_DRAM_LOGW``,``ESP_LOGW``, ``esp_rom_printf``
 #define ESP_DRAM_LOGW( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_WARN,    W, ##__VA_ARGS__)
@@ -406,14 +479,22 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 #define ESP_DRAM_LOGD( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_DEBUG,   D, ##__VA_ARGS__)
 /// macro to output logs when the cache is disabled at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_DRAM_LOGV``,``ESP_LOGV``, ``esp_rom_printf``
 #define ESP_DRAM_LOGV( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_VERBOSE, V, ##__VA_ARGS__)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 
 /** @cond */
 #define _ESP_LOG_DRAM_LOG_FORMAT(letter, format)  DRAM_STR(#letter " %s: " format "\n")
 
+#if defined(__cplusplus) && (__cplusplus >  201703L)
+#define ESP_DRAM_LOG_IMPL(tag, format, log_level, log_tag_letter, ...) do {                                  \
+        if (_ESP_LOG_EARLY_ENABLED(log_level)) {                                                             \
+            esp_rom_printf(_ESP_LOG_DRAM_LOG_FORMAT(log_tag_letter, format), tag __VA_OPT__(,) __VA_ARGS__); \
+        }} while(0)
+#else // !(defined(__cplusplus) && (__cplusplus >  201703L))
 #define ESP_DRAM_LOG_IMPL(tag, format, log_level, log_tag_letter, ...) do {                       \
         if (_ESP_LOG_EARLY_ENABLED(log_level)) {                                                  \
             esp_rom_printf(_ESP_LOG_DRAM_LOG_FORMAT(log_tag_letter, format), tag, ##__VA_ARGS__); \
         }} while(0)
+#endif // !(defined(__cplusplus) && (__cplusplus >  201703L))
 /** @endcond */
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/aria.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/aria.h
index 13763d42..20f43f22 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/aria.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/aria.h
@@ -88,14 +88,14 @@
 /* MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED is deprecated and should not be used. */
 #define MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED      -0x0058  /**< ARIA hardware accelerator failed. */
 
-#if !defined(MBEDTLS_ARIA_ALT)
-// Regular implementation
-//
-
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+#if !defined(MBEDTLS_ARIA_ALT)
+// Regular implementation
+//
+
 /**
  * \brief The ARIA context-type definition.
  */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
index 9615090f..6f1201bf 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/bn_mul.h
@@ -71,6 +71,46 @@
 
 #include "bignum.h"
 
+
+/*
+ * Conversion macros for embedded constants:
+ * build lists of mbedtls_mpi_uint's from lists of unsigned char's grouped by 8, 4 or 2
+ */
+#if defined(MBEDTLS_HAVE_INT32)
+
+#define MBEDTLS_BYTES_TO_T_UINT_4( a, b, c, d )               \
+    ( (mbedtls_mpi_uint) (a) <<  0 ) |                        \
+    ( (mbedtls_mpi_uint) (b) <<  8 ) |                        \
+    ( (mbedtls_mpi_uint) (c) << 16 ) |                        \
+    ( (mbedtls_mpi_uint) (d) << 24 )
+
+#define MBEDTLS_BYTES_TO_T_UINT_2( a, b )                   \
+    MBEDTLS_BYTES_TO_T_UINT_4( a, b, 0, 0 )
+
+#define MBEDTLS_BYTES_TO_T_UINT_8( a, b, c, d, e, f, g, h ) \
+    MBEDTLS_BYTES_TO_T_UINT_4( a, b, c, d ),                \
+    MBEDTLS_BYTES_TO_T_UINT_4( e, f, g, h )
+
+#else /* 64-bits */
+
+#define MBEDTLS_BYTES_TO_T_UINT_8( a, b, c, d, e, f, g, h )   \
+    ( (mbedtls_mpi_uint) (a) <<  0 ) |                        \
+    ( (mbedtls_mpi_uint) (b) <<  8 ) |                        \
+    ( (mbedtls_mpi_uint) (c) << 16 ) |                        \
+    ( (mbedtls_mpi_uint) (d) << 24 ) |                        \
+    ( (mbedtls_mpi_uint) (e) << 32 ) |                        \
+    ( (mbedtls_mpi_uint) (f) << 40 ) |                        \
+    ( (mbedtls_mpi_uint) (g) << 48 ) |                        \
+    ( (mbedtls_mpi_uint) (h) << 56 )
+
+#define MBEDTLS_BYTES_TO_T_UINT_4( a, b, c, d )             \
+    MBEDTLS_BYTES_TO_T_UINT_8( a, b, c, d, 0, 0, 0, 0 )
+
+#define MBEDTLS_BYTES_TO_T_UINT_2( a, b )                   \
+    MBEDTLS_BYTES_TO_T_UINT_8( a, b, 0, 0, 0, 0, 0, 0 )
+
+#endif /* bits in mbedtls_mpi_uint */
+
 #if defined(MBEDTLS_HAVE_ASM)
 
 #ifndef asm
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/config.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/config.h
index 6b45021d..b1d67f7a 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/config.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/config.h
@@ -453,7 +453,7 @@
  *       be overridden, but the wrapper functions mbedtls_aes_decrypt and mbedtls_aes_encrypt
  *       must stay untouched.
  *
- * \note If you use the AES_xxx_ALT macros, then is is recommended to also set
+ * \note If you use the AES_xxx_ALT macros, then it is recommended to also set
  *       MBEDTLS_AES_ROM_TABLES in order to help the linker garbage-collect the AES
  *       tables.
  *
@@ -1746,6 +1746,23 @@
  */
 //#define MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
 
+/**
+ * \def MBEDTLS_TEST_HOOKS
+ *
+ * Enable features for invasive testing such as introspection functions and
+ * hooks for fault injection. This enables additional unit tests.
+ *
+ * Merely enabling this feature should not change the behavior of the product.
+ * It only adds new code, and new branching points where the default behavior
+ * is the same as when this feature is disabled.
+ * However, this feature increases the attack surface: there is an added
+ * risk of vulnerabilities, and more gadgets that can make exploits easier.
+ * Therefore this feature must never be enabled in production.
+ *
+ * Uncomment to enable invasive tests.
+ */
+//#define MBEDTLS_TEST_HOOKS
+
 /**
  * \def MBEDTLS_THREADING_ALT
  *
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
index 278fbbbb..6c099adf 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ctr_drbg.h
@@ -214,6 +214,13 @@ typedef struct mbedtls_ctr_drbg_context
     void *p_entropy;            /*!< The context for the entropy function. */
 
 #if defined(MBEDTLS_THREADING_C)
+    /* Invariant: the mutex is initialized if and only if f_entropy != NULL.
+     * This means that the mutex is initialized during the initial seeding
+     * in mbedtls_ctr_drbg_seed() and freed in mbedtls_ctr_drbg_free().
+     *
+     * Note that this invariant may change without notice. Do not rely on it
+     * and do not access the mutex directly in application code.
+     */
     mbedtls_threading_mutex_t mutex;
 #endif
 }
@@ -277,6 +284,15 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
  *                      device.
  */
 #endif
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      after this function returns successfully,
+ *                      it is safe to call mbedtls_ctr_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
 /**
  * \param ctx           The CTR_DRBG context to seed.
  *                      It must have been initialized with
@@ -286,6 +302,8 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
  *                      the same context unless you call
  *                      mbedtls_ctr_drbg_free() and mbedtls_ctr_drbg_init()
  *                      again first.
+ *                      After a failed call to mbedtls_ctr_drbg_seed(),
+ *                      you must call mbedtls_ctr_drbg_free().
  * \param f_entropy     The entropy callback, taking as arguments the
  *                      \p p_entropy context, the buffer to fill, and the
  *                      length of the buffer.
@@ -377,6 +395,11 @@ void mbedtls_ctr_drbg_set_reseed_interval( mbedtls_ctr_drbg_context *ctx,
  * \brief               This function reseeds the CTR_DRBG context, that is
  *                      extracts data from the entropy source.
  *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
  * \param ctx           The CTR_DRBG context.
  * \param additional    Additional data to add to the state. Can be \c NULL.
  * \param len           The length of the additional data.
@@ -394,6 +417,11 @@ int mbedtls_ctr_drbg_reseed( mbedtls_ctr_drbg_context *ctx,
 /**
  * \brief              This function updates the state of the CTR_DRBG context.
  *
+ * \note               This function is not thread-safe. It is not safe
+ *                     to call this function if another thread might be
+ *                     concurrently obtaining random numbers from the same
+ *                     context or updating or reseeding the same context.
+ *
  * \param ctx          The CTR_DRBG context.
  * \param additional   The data to update the state with. This must not be
  *                     \c NULL unless \p add_len is \c 0.
@@ -417,6 +445,11 @@ int mbedtls_ctr_drbg_update_ret( mbedtls_ctr_drbg_context *ctx,
  * This function automatically reseeds if the reseed counter is exceeded
  * or prediction resistance is enabled.
  *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
  * \param p_rng         The CTR_DRBG context. This must be a pointer to a
  *                      #mbedtls_ctr_drbg_context structure.
  * \param output        The buffer to fill.
@@ -445,8 +478,16 @@ int mbedtls_ctr_drbg_random_with_add( void *p_rng,
  *
  * This function automatically reseeds if the reseed counter is exceeded
  * or prediction resistance is enabled.
- *
- *
+ */
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      it is safe to call mbedtls_ctr_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
+/**
  * \param p_rng         The CTR_DRBG context. This must be a pointer to a
  *                      #mbedtls_ctr_drbg_context structure.
  * \param output        The buffer to fill.
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecp.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecp.h
index bdc750eb..e4a1ed81 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecp.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ecp.h
@@ -154,6 +154,40 @@ typedef struct mbedtls_ecp_point
 }
 mbedtls_ecp_point;
 
+/* Determine the minimum safe value of MBEDTLS_ECP_MAX_BITS. */
+#if !defined(MBEDTLS_ECP_C)
+#define MBEDTLS_ECP_MAX_BITS_MIN 0
+/* Note: the curves must be listed in DECREASING size! */
+#elif defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 521
+#elif defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 512
+#elif defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 448
+#elif defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 384
+#elif defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 384
+#elif defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 256
+#elif defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 256
+#elif defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 256
+#elif defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 255
+#elif defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 225 // n is slightly above 2^224
+#elif defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 224
+#elif defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 192
+#elif defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
+#define MBEDTLS_ECP_MAX_BITS_MIN 192
+#else
+#error "MBEDTLS_ECP_C enabled, but no curve?"
+#endif
+
 #if !defined(MBEDTLS_ECP_ALT)
 /*
  * default mbed TLS elliptic curve arithmetic implementation
@@ -228,7 +262,13 @@ mbedtls_ecp_group;
  * \{
  */
 
-#if !defined(MBEDTLS_ECP_MAX_BITS)
+#if defined(MBEDTLS_ECP_MAX_BITS)
+
+#if MBEDTLS_ECP_MAX_BITS < MBEDTLS_ECP_MAX_BITS_MIN
+#error "MBEDTLS_ECP_MAX_BITS is smaller than the largest supported curve"
+#endif
+
+#else
 /**
  * The maximum size of the groups, that is, of \c N and \c P.
  */
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/entropy.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/entropy.h
index 1e1d3f56..1d6e9b82 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/entropy.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/entropy.h
@@ -147,13 +147,15 @@ mbedtls_entropy_source_state;
  */
 typedef struct mbedtls_entropy_context
 {
-    int accumulator_started;
+    int accumulator_started; /* 0 after init.
+                              * 1 after the first update.
+                              * -1 after free. */
 #if defined(MBEDTLS_ENTROPY_SHA512_ACCUMULATOR)
     mbedtls_sha512_context  accumulator;
 #else
     mbedtls_sha256_context  accumulator;
 #endif
-    int             source_count;
+    int             source_count; /* Number of entries used in source. */
     mbedtls_entropy_source_state    source[MBEDTLS_ENTROPY_MAX_SOURCES];
 #if defined(MBEDTLS_HAVEGE_C)
     mbedtls_havege_state    havege_data;
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
index 970c033c..5718e187 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/hmac_drbg.h
@@ -128,6 +128,14 @@ typedef struct mbedtls_hmac_drbg_context
     void *p_entropy;            /*!< context for the entropy function        */
 
 #if defined(MBEDTLS_THREADING_C)
+    /* Invariant: the mutex is initialized if and only if
+     * md_ctx->md_info != NULL. This means that the mutex is initialized
+     * during the initial seeding in mbedtls_hmac_drbg_seed() or
+     * mbedtls_hmac_drbg_seed_buf() and freed in mbedtls_ctr_drbg_free().
+     *
+     * Note that this invariant may change without notice. Do not rely on it
+     * and do not access the mutex directly in application code.
+     */
     mbedtls_threading_mutex_t mutex;
 #endif
 } mbedtls_hmac_drbg_context;
@@ -177,7 +185,17 @@ void mbedtls_hmac_drbg_init( mbedtls_hmac_drbg_context *ctx );
  * \note                During the initial seeding, this function calls
  *                      the entropy source to obtain a nonce
  *                      whose length is half the entropy length.
- *
+ */
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      after this function returns successfully,
+ *                      it is safe to call mbedtls_hmac_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
+/**
  * \param ctx           HMAC_DRBG context to be seeded.
  * \param md_info       MD algorithm to use for HMAC_DRBG.
  * \param f_entropy     The entropy callback, taking as arguments the
@@ -216,7 +234,17 @@ int mbedtls_hmac_drbg_seed( mbedtls_hmac_drbg_context *ctx,
  *
  * This function is meant for use in algorithms that need a pseudorandom
  * input such as deterministic ECDSA.
- *
+ */
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      after this function returns successfully,
+ *                      it is safe to call mbedtls_hmac_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
+/**
  * \param ctx           HMAC_DRBG context to be initialised.
  * \param md_info       MD algorithm to use for HMAC_DRBG.
  * \param data          Concatenation of the initial entropy string and
@@ -279,6 +307,11 @@ void mbedtls_hmac_drbg_set_reseed_interval( mbedtls_hmac_drbg_context *ctx,
 /**
  * \brief               This function updates the state of the HMAC_DRBG context.
  *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
  * \param ctx           The HMAC_DRBG context.
  * \param additional    The data to update the state with.
  *                      If this is \c NULL, there is no additional data.
@@ -295,6 +328,11 @@ int mbedtls_hmac_drbg_update_ret( mbedtls_hmac_drbg_context *ctx,
  * \brief               This function reseeds the HMAC_DRBG context, that is
  *                      extracts data from the entropy source.
  *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
  * \param ctx           The HMAC_DRBG context.
  * \param additional    Additional data to add to the state.
  *                      If this is \c NULL, there is no additional data
@@ -320,6 +358,11 @@ int mbedtls_hmac_drbg_reseed( mbedtls_hmac_drbg_context *ctx,
  * This function automatically reseeds if the reseed counter is exceeded
  * or prediction resistance is enabled.
  *
+ * \note                This function is not thread-safe. It is not safe
+ *                      to call this function if another thread might be
+ *                      concurrently obtaining random numbers from the same
+ *                      context or updating or reseeding the same context.
+ *
  * \param p_rng         The HMAC_DRBG context. This must be a pointer to a
  *                      #mbedtls_hmac_drbg_context structure.
  * \param output        The buffer to fill.
@@ -349,7 +392,16 @@ int mbedtls_hmac_drbg_random_with_add( void *p_rng,
  *
  * This function automatically reseeds if the reseed counter is exceeded
  * or prediction resistance is enabled.
- *
+ */
+#if defined(MBEDTLS_THREADING_C)
+/**
+ * \note                When Mbed TLS is built with threading support,
+ *                      it is safe to call mbedtls_ctr_drbg_random()
+ *                      from multiple threads. Other operations, including
+ *                      reseeding, are not thread-safe.
+ */
+#endif /* MBEDTLS_THREADING_C */
+/**
  * \param p_rng         The HMAC_DRBG context. This must be a pointer to a
  *                      #mbedtls_hmac_drbg_context structure.
  * \param output        The buffer to fill.
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
index 00fea7db..c6e1a027 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/net_sockets.h
@@ -151,6 +151,7 @@ int mbedtls_net_connect( mbedtls_net_context *ctx, const char *host, const char
  *
  * \return         0 if successful, or one of:
  *                      MBEDTLS_ERR_NET_SOCKET_FAILED,
+ *                      MBEDTLS_ERR_NET_UNKNOWN_HOST,
  *                      MBEDTLS_ERR_NET_BIND_FAILED,
  *                      MBEDTLS_ERR_NET_LISTEN_FAILED
  *
@@ -170,6 +171,8 @@ int mbedtls_net_bind( mbedtls_net_context *ctx, const char *bind_ip, const char
  *                  can be NULL if client_ip is null
  *
  * \return          0 if successful, or
+ *                  MBEDTLS_ERR_NET_SOCKET_FAILED,
+ *                  MBEDTLS_ERR_NET_BIND_FAILED,
  *                  MBEDTLS_ERR_NET_ACCEPT_FAILED, or
  *                  MBEDTLS_ERR_NET_BUFFER_TOO_SMALL if buf_size is too small,
  *                  MBEDTLS_ERR_SSL_WANT_READ if bind_fd was set to
@@ -182,6 +185,10 @@ int mbedtls_net_accept( mbedtls_net_context *bind_ctx,
 /**
  * \brief          Check and wait for the context to be ready for read/write
  *
+ * \note           The current implementation of this function uses
+ *                 select() and returns an error if the file descriptor
+ *                 is \c FD_SETSIZE or greater.
+ *
  * \param ctx      Socket to check
  * \param rw       Bitflag composed of MBEDTLS_NET_POLL_READ and
  *                 MBEDTLS_NET_POLL_WRITE specifying the events
@@ -263,16 +270,21 @@ int mbedtls_net_send( void *ctx, const unsigned char *buf, size_t len );
  *                 'timeout' seconds. If no error occurs, the actual amount
  *                 read is returned.
  *
+ * \note           The current implementation of this function uses
+ *                 select() and returns an error if the file descriptor
+ *                 is \c FD_SETSIZE or greater.
+ *
  * \param ctx      Socket
  * \param buf      The buffer to write to
  * \param len      Maximum length of the buffer
  * \param timeout  Maximum number of milliseconds to wait for data
  *                 0 means no timeout (wait forever)
  *
- * \return         the number of bytes received,
- *                 or a non-zero error code:
- *                 MBEDTLS_ERR_SSL_TIMEOUT if the operation timed out,
+ * \return         The number of bytes received if successful.
+ *                 MBEDTLS_ERR_SSL_TIMEOUT if the operation timed out.
  *                 MBEDTLS_ERR_SSL_WANT_READ if interrupted by a signal.
+ *                 Another negative error code (MBEDTLS_ERR_NET_xxx)
+ *                 for other failures.
  *
  * \note           This function will block (until data becomes available or
  *                 timeout is reached) even if the socket is set to
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/padlock.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/padlock.h
index d8246e2c..0e4a6bbf 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/padlock.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/padlock.h
@@ -98,7 +98,7 @@ extern "C" {
  *
  * \param feature  The feature to detect
  *
- * \return         1 if CPU has support for the feature, 0 otherwise
+ * \return         non-zero if CPU has support for the feature, 0 otherwise
  */
 int mbedtls_padlock_has_support( int feature );
 
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/rsa.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/rsa.h
index 188c37cf..b2f65334 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/rsa.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/rsa.h
@@ -124,7 +124,10 @@ extern "C" {
  */
 typedef struct mbedtls_rsa_context
 {
-    int ver;                    /*!<  Always 0.*/
+    int ver;                    /*!<  Reserved for internal purposes.
+                                 *    Do not set this field in application
+                                 *    code. Its meaning might change without
+                                 *    notice. */
     size_t len;                 /*!<  The size of \p N in Bytes. */
 
     mbedtls_mpi N;              /*!<  The public modulus. */
@@ -154,6 +157,7 @@ typedef struct mbedtls_rsa_context
                                      mask generating function used in the
                                      EME-OAEP and EMSA-PSS encodings. */
 #if defined(MBEDTLS_THREADING_C)
+    /* Invariant: the mutex is initialized iff ver != 0. */
     mbedtls_threading_mutex_t mutex;    /*!<  Thread-safety mutex. */
 #endif
 }
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl.h
index fe33ac8d..0abeb430 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl.h
@@ -2237,7 +2237,7 @@ void mbedtls_ssl_conf_dhm_min_bitlen( mbedtls_ssl_config *conf,
 #if defined(MBEDTLS_ECP_C)
 /**
  * \brief          Set the allowed curves in order of preference.
- *                 (Default: all defined curves.)
+ *                 (Default: all defined curves in order of decreasing size.)
  *
  *                 On server: this only affects selection of the ECDHE curve;
  *                 the curves used for ECDH and ECDSA are determined by the
@@ -2269,7 +2269,9 @@ void mbedtls_ssl_conf_curves( mbedtls_ssl_config *conf,
 #if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
 /**
  * \brief          Set the allowed hashes for signatures during the handshake.
- *                 (Default: all available hashes except MD5.)
+ *                 (Default: all SHA-2 hashes, largest first. Also SHA-1 if
+ *                 the compile-time option
+ *                 `MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE` is enabled.)
  *
  * \note           This only affects which hashes are offered and can be used
  *                 for signatures during the handshake. Hashes for message
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
index a10a4341..a83f5e66 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/ssl_ticket.h
@@ -124,7 +124,7 @@ void mbedtls_ssl_ticket_init( mbedtls_ssl_ticket_context *ctx );
  *                  Recommended value: 86400 (one day).
  *
  * \note            It is highly recommended to select a cipher that is at
- *                  least as strong as the the strongest ciphersuite
+ *                  least as strong as the strongest ciphersuite
  *                  supported. Usually that means a 256-bit key.
  *
  * \note            The lifetime of the keys is twice the lifetime of tickets.
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/threading.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/threading.h
index a8183a6e..45161ce4 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/threading.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/threading.h
@@ -73,6 +73,9 @@ extern "C" {
 typedef struct mbedtls_threading_mutex_t
 {
     pthread_mutex_t mutex;
+    /* is_valid is 0 after a failed init or a free, and nonzero after a
+     * successful init. This field is not considered part of the public
+     * API of Mbed TLS and may change without notice. */
     char is_valid;
 } mbedtls_threading_mutex_t;
 #endif
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/version.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/version.h
index 5f0a8f11..49cbeb00 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/version.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/version.h
@@ -65,16 +65,16 @@
  */
 #define MBEDTLS_VERSION_MAJOR  2
 #define MBEDTLS_VERSION_MINOR  16
-#define MBEDTLS_VERSION_PATCH  9
+#define MBEDTLS_VERSION_PATCH  11
 
 /**
  * The single version number has the following structure:
  *    MMNNPP00
  *    Major version | Minor version | Patch version
  */
-#define MBEDTLS_VERSION_NUMBER         0x02100900
-#define MBEDTLS_VERSION_STRING         "2.16.9"
-#define MBEDTLS_VERSION_STRING_FULL    "mbed TLS 2.16.9"
+#define MBEDTLS_VERSION_NUMBER         0x02100B00
+#define MBEDTLS_VERSION_STRING         "2.16.11"
+#define MBEDTLS_VERSION_STRING_FULL    "mbed TLS 2.16.11"
 
 #if defined(MBEDTLS_VERSION_C)
 
diff --git a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
index c38e0c05..30da1909 100644
--- a/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
+++ b/tools/sdk/esp32s2/include/mbedtls/mbedtls/include/mbedtls/x509_crt.h
@@ -229,12 +229,21 @@ typedef void mbedtls_x509_crt_restart_ctx;
 /**
  * Default security profile. Should provide a good balance between security
  * and compatibility with current deployments.
+ *
+ * This profile permits:
+ * - SHA2 hashes.
+ * - All supported elliptic curves.
+ * - RSA with 2048 bits and above.
+ *
+ * New minor versions of Mbed TLS may extend this profile, for example if
+ * new curves are added to the library. New minor versions of Mbed TLS will
+ * not reduce this profile unless serious security concerns require it.
  */
 extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_default;
 
 /**
  * Expected next default profile. Recommended for new deployments.
- * Currently targets a 128-bit security level, except for RSA-2048.
+ * Currently targets a 128-bit security level, except for allowing RSA-2048.
  */
 extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_next;
 
diff --git a/tools/sdk/esp32s2/include/mbedtls/port/include/mbedtls/esp_config.h b/tools/sdk/esp32s2/include/mbedtls/port/include/mbedtls/esp_config.h
index 1ff7ea4a..f36ebf9b 100644
--- a/tools/sdk/esp32s2/include/mbedtls/port/include/mbedtls/esp_config.h
+++ b/tools/sdk/esp32s2/include/mbedtls/port/include/mbedtls/esp_config.h
@@ -1193,7 +1193,11 @@
  *
  * Comment to skip keyUsage checking for both CA and leaf certificates.
  */
+#ifdef CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE
 #define MBEDTLS_X509_CHECK_KEY_USAGE
+#else
+#undef MBEDTLS_X509_CHECK_KEY_USAGE
+#endif
 
 /**
  * \def MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
@@ -1206,7 +1210,11 @@
  *
  * Comment to skip extendedKeyUsage checking for certificates.
  */
+#ifdef CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
 #define MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+#else
+#undef MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+#endif
 
 /**
  * \def MBEDTLS_X509_RSASSA_PSS_SUPPORT
diff --git a/tools/sdk/esp32s2/include/newlib/platform_include/sys/dirent.h b/tools/sdk/esp32s2/include/newlib/platform_include/sys/dirent.h
index 4626ae14..bfa49f5e 100644
--- a/tools/sdk/esp32s2/include/newlib/platform_include/sys/dirent.h
+++ b/tools/sdk/esp32s2/include/newlib/platform_include/sys/dirent.h
@@ -19,11 +19,16 @@
 
 /**
  * This header file provides POSIX-compatible definitions of directory
- * access functions and related data types.
+ * access data types. Starting with newlib 3.3, related functions are defined
+ * in 'dirent.h' bundled with newlib.
  * See http://pubs.opengroup.org/onlinepubs/7908799/xsh/dirent.h.html
  * for reference.
  */
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
  * @brief Opaque directory structure
  */
@@ -57,3 +62,7 @@ void seekdir(DIR* pdir, long loc);
 void rewinddir(DIR* pdir);
 int closedir(DIR* pdir);
 int readdir_r(DIR* pdir, struct dirent* entry, struct dirent** out_dirent);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/protocomm/include/transports/protocomm_ble.h b/tools/sdk/esp32s2/include/protocomm/include/transports/protocomm_ble.h
index b30d5707..a9e7b6a2 100644
--- a/tools/sdk/esp32s2/include/protocomm/include/transports/protocomm_ble.h
+++ b/tools/sdk/esp32s2/include/protocomm/include/transports/protocomm_ble.h
@@ -26,6 +26,14 @@ extern "C" {
  */
 #define MAX_BLE_DEVNAME_LEN 29
 #define BLE_UUID128_VAL_LENGTH  16
+ /**
+ * Theoretically, the limit for max manufacturer length remains same as BLE
+ * device name i.e. 31 bytes (max scan response size) - 1 byte (length) - 1
+ * byte (type) = 29 bytes
+ * However, manufacturer data goes along with BLE device name in scan response.
+ * So, it is important to understand the actual length should be smaller than
+ * (29 - (BLE device name length) - 2). */
+#define MAX_BLE_MANUFACTURER_DATA_LEN 29
 
 /**
  * @brief   This structure maps handler required by protocomm layer to
@@ -59,6 +67,16 @@ typedef struct protocomm_ble_config {
      */
     uint8_t      service_uuid[BLE_UUID128_VAL_LENGTH];
 
+    /**
+     * BLE device manufacturer data pointer in advertisement
+     */
+    uint8_t      *manufacturer_data;
+
+    /**
+     * BLE device manufacturer data length in advertisement
+     */
+    ssize_t      manufacturer_data_len;
+
     /**
      * Number of entries in the Name-UUID lookup table
      */
diff --git a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/reset_reasons.h b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/reset_reasons.h
new file mode 100644
index 00000000..62c744aa
--- /dev/null
+++ b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/reset_reasons.h
@@ -0,0 +1,58 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+//+-----------------------------------------------Terminology---------------------------------------------+
+//|                                                                                                       |
+//| CPU Reset:    Reset CPU core only, once reset done, CPU will execute from reset vector                |
+//|                                                                                                       |
+//| Core Reset:   Reset the whole digital system except RTC sub-system                                    |
+//|                                                                                                       |
+//| System Reset: Reset the whole digital system, including RTC sub-system                                |
+//|                                                                                                       |
+//| Chip Reset:   Reset the whole chip, including the analog part                                         |
+//|                                                                                                       |
+//+-------------------------------------------------------------------------------------------------------+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Naming conventions: RESET_REASON_{reset level}_{reset reason}
+ * @note refer to TRM: <Reset and Clock> chapter
+ */
+typedef enum {
+    RESET_REASON_CHIP_POWER_ON   = 0x01, // Power on reset
+    RESET_REASON_CHIP_BROWN_OUT  = 0x01, // VDD voltage is not stable and resets the chip
+    RESET_REASON_CHIP_SUPER_WDT  = 0x01, // Super watch dog resets the chip
+    RESET_REASON_CORE_SW         = 0x03, // Software resets the digital core by RTC_CNTL_SW_SYS_RST
+    RESET_REASON_CORE_DEEP_SLEEP = 0x05, // Deep sleep reset the digital core
+    RESET_REASON_CORE_MWDT0      = 0x07, // Main watch dog 0 resets digital core
+    RESET_REASON_CORE_MWDT1      = 0x08, // Main watch dog 1 resets digital core
+    RESET_REASON_CORE_RTC_WDT    = 0x09, // RTC watch dog resets digital core
+    RESET_REASON_CPU0_MWDT0      = 0x0B, // Main watch dog 0 resets CPU 0
+    RESET_REASON_CPU0_SW         = 0x0C, // Software resets CPU 0 by RTC_CNTL_SW_PROCPU_RST
+    RESET_REASON_CPU0_RTC_WDT    = 0x0D, // RTC watch dog resets CPU 0
+    RESET_REASON_SYS_BROWN_OUT   = 0x0F, // VDD voltage is not stable and resets the digital core
+    RESET_REASON_SYS_RTC_WDT     = 0x10, // RTC watch dog resets digital core and rtc module
+    RESET_REASON_CPU0_MWDT1      = 0x11, // Main watch dog 1 resets CPU 0
+    RESET_REASON_SYS_SUPER_WDT   = 0x12, // Super watch dog resets the digital core and rtc module
+    RESET_REASON_SYS_CLK_GLITCH  = 0x13, // Glitch on clock resets the digital core and rtc module
+} soc_reset_reason_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/rtc.h b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/rtc.h
index 4ad78cd6..52322db9 100644
--- a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/rtc.h
+++ b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/rtc.h
@@ -143,6 +143,13 @@ typedef enum {
     RTC_XTAL_FREQ_40M = 40,     //!< 40 MHz XTAL
 } rtc_xtal_freq_t;
 
+/** @brief Fixed crystal frequency for this SoC
+
+    On an SoC where only one crystal frequency is supported,
+    using this macro is an alternative to calling rtc_clk_xtal_freq_get()
+ */
+#define RTC_XTAL_FREQ RTC_XTAL_FREQ_40M
+
 /**
  * @brief CPU frequency values
  */
@@ -315,23 +322,16 @@ void rtc_clk_init(rtc_clk_config_t cfg);
 /**
  * @brief Get main XTAL frequency
  *
- * This is the value stored in RTC register RTC_XTAL_FREQ_REG by the bootloader. As passed to
- * rtc_clk_init function
+ * Result is a constant as XTAL frequency is fixed.
  *
- * @return XTAL frequency, one of rtc_xtal_freq_t
+ * @note Function is included for ESP32 compatible code only. Code which only
+ * needs to support this SoC can use the macro RTC_XTAL_FREQ for this SoC's
+ * fixed crystal value.
+ *
+ * @return XTAL frequency in MHz, RTC_XTAL_FREQ_40M
  */
 rtc_xtal_freq_t rtc_clk_xtal_freq_get(void);
 
-/**
- * @brief Update XTAL frequency
- *
- * Updates the XTAL value stored in RTC_XTAL_FREQ_REG. Usually this value is ignored
- * after startup.
- *
- * @param xtal_freq New frequency value
- */
-void rtc_clk_xtal_freq_update(rtc_xtal_freq_t xtal_freq);
-
 /**
  * @brief Enable or disable 32 kHz XTAL oscillator
  * @param en  true to enable, false to disable
diff --git a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/soc_caps.h b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/soc_caps.h
index 535c0bba..63326b09 100644
--- a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/soc_caps.h
+++ b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/soc_caps.h
@@ -54,7 +54,11 @@
 #define SOC_ASYNC_MEMCPY_SUPPORTED      1
 #define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 3
 #define SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS 1
+#define SOC_TEMP_SENSOR_SUPPORTED       1
 #define SOC_CACHE_SUPPORT_WRAP          1
+#define SOC_FLASH_ENCRYPTION_XTS_AES      1
+#define SOC_FLASH_ENCRYPTION_XTS_AES_256 1
+#define SOC_PSRAM_DMA_CAPABLE           1
 
 /*-------------------------- ADC CAPS ----------------------------------------*/
 #define SOC_ADC_PERIPH_NUM              (2)
diff --git a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/usb_struct.h b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/usb_struct.h
index e387490e..14277b10 100644
--- a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/usb_struct.h
+++ b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/usb_struct.h
@@ -22,82 +22,81 @@ extern "C" {
 #endif
 
 typedef struct usb_reg {
-    volatile uint32_t gotgctl; /*!< 0x0 */
-    volatile uint32_t gotgint;
-    volatile uint32_t gahbcfg;
-    volatile uint32_t gusbcfg;
-    volatile uint32_t grstctl; /*!< 0x10 */
-    volatile uint32_t gintsts;
-    volatile uint32_t gintmsk;
-    volatile uint32_t grxstsr;
-    volatile uint32_t grxstsp; /*!< 0x20 */
-    volatile uint32_t grxfsiz;
-    volatile uint32_t gnptxfsiz;
-    volatile uint32_t gnptxsts;
-    volatile uint32_t reserved0x2c;
-    volatile uint32_t gpvndctl; /*!< 0x30 */
-    volatile uint32_t ggpio;
-    volatile uint32_t guid;
-    volatile uint32_t gsnpsid;
-    volatile uint32_t ghwcfg1; /*!< 0x40 */
-    volatile uint32_t ghwcfg2;
-    volatile uint32_t ghwcfg3;
-    volatile uint32_t ghwcfg4;   /*!< 0x50 */
-    volatile uint32_t glpmcfg;   /*!< 0x54 */
-    volatile uint32_t gpwrdn;    /*!< 0x58 */
-    volatile uint32_t gdfifocfg; /*!< 0x5c */
-    volatile uint32_t gadpctl;   /*!< 0x60 */
-    uint32_t reserved0x64[39];
-    volatile uint32_t hptxfsiz;    /*!< 0x100 */
-    volatile uint32_t dieptxf[15]; /*!< 0x104 */
-    uint32_t reserved0x140[176];       /*!<  0x140 */
+    volatile uint32_t gotgctl;              // 0x0000 OTG Control and Status Register
+    volatile uint32_t gotgint;              // 0x0004 OTG Interrupt Register
+    volatile uint32_t gahbcfg;              // 0x0008 AHB Configuration Register
+    volatile uint32_t gusbcfg;              // 0x000c USB Configuration Register
+    volatile uint32_t grstctl;              // 0x0010 Reset Register
+    volatile uint32_t gintsts;              // 0x0014 Interrupt Register
+    volatile uint32_t gintmsk;              // 0x0018 Interrupt Mask Register
+    volatile uint32_t grxstsr;              // 0x001c Receive Status Debug Read Register
+    volatile uint32_t grxstsp;              // 0x0020 Receive Status Read/Pop Register
+    volatile uint32_t grxfsiz;              // 0x0024 Receive FIFO Size Register
+    volatile uint32_t gnptxfsiz;            // 0x0028 Non-periodic Transmit FIFO Size Register
+    volatile uint32_t gnptxsts;             // 0x002c Non-periodic Transmit FIFO/Queue Status Register
+    uint32_t reserved_0x0030_0x0040[4];     // 0x0030 to 0x0040
+    volatile uint32_t gsnpsid;              // 0x0040 Synopsys ID Register
+    volatile uint32_t ghwcfg1;              // 0x0044 User Hardware Configuration 1 Register
+    volatile uint32_t ghwcfg2;              // 0x0048 User Hardware Configuration 2 Register
+    volatile uint32_t ghwcfg3;              // 0x004c User Hardware Configuration 3 Register
+    volatile uint32_t ghwcfg4;              // 0x0050 User Hardware Configuration 4 Register
+    uint32_t reserved_0x0054_0x005c[2];     // 0x0054 to 0x005c
+    volatile uint32_t gdfifocfg;            // 0x005c Global DFIFO Configuration Register
+    uint32_t reserved_0x0060_0x0100[40];    // 0x0060 to 0x0100
+    volatile uint32_t hptxfsiz;             // 0x0100 Host Periodic Transmit FIFO Size Register
+    volatile uint32_t dieptxf[4];           // 0x0104 to 0x0114 Device IN Endpoint Transmit FIFO Size Register i
+    uint32_t reserved_0x0114_0x0140[11];    // 0x0114 to 0x0140
+    uint32_t reserved_0x0140_0x0400[176];   // 0x0140 to 0x0400
     /**
-     * The Host Global Registers structure defines the size and relative
-     * field offsets for the Host Mode Global Registers.  Host Global
-     * Registers offsets 400h-7FFh.
-    */
-    volatile uint32_t hcfg;     /*!< Host Configuration Register.   <i>Offset: 400h</i> */
-    volatile uint32_t hfir;     /*!< Host Frame Interval Register.  <i>Offset: 404h</i> */
-    volatile uint32_t hfnum;    /*!< Host Frame Number / Frame Remaining Register. <i>Offset: 408h</i> */
-    uint32_t reserved0x40C;       /*!< Reserved.  <i>Offset: 40Ch</i> */
-    volatile uint32_t hptxsts;  /*!< Host Periodic Transmit FIFO/ Queue Status Register. <i>Offset: 410h</i> */
-    volatile uint32_t haint;    /*!< Host All Channels Interrupt Register. <i>Offset: 414h</i> */
-    volatile uint32_t haintmsk; /*!< Host All Channels Interrupt Mask Register. <i>Offset: 418h</i> */
-    volatile uint32_t hflbaddr; /*!< Host Frame List Base Address Register . <i>Offset: 41Ch</i> */
-    uint32_t reserved0x420[7];
-    volatile uint32_t hprt; //0x440
-    uint32_t reserved0x444[240];
-    volatile uint32_t dcfg;                 /*!< Device Configuration Register. <i>Offset 800h</i> */
-    volatile uint32_t dctl;                 /*!< Device Control Register. <i>Offset: 804h</i> */
-    volatile uint32_t dsts;                 /*!< Device Status Register (Read Only). <i>Offset: 808h</i> */
-    uint32_t reserved0x80c;                 /*!< Reserved. <i>Offset: 80Ch</i> */
-    volatile uint32_t diepmsk;              /*!< Device IN Endpoint Common Interrupt Mask Register. <i>Offset: 810h</i> */
-    volatile uint32_t doepmsk;              /*!< Device OUT Endpoint Common Interrupt Mask Register. <i>Offset: 814h</i> */
-    volatile uint32_t daint;                /*!< Device All Endpoints Interrupt Register.  <i>Offset: 818h</i> */
-    volatile uint32_t daintmsk;             /*!< Device All Endpoints Interrupt Mask Register.  <i>Offset: 81Ch</i> */
-    volatile uint32_t dtknqr1;              /*!< Device IN Token Queue Read Register-1 (Read Only). <i>Offset: 820h</i> */
-    volatile uint32_t dtknqr2;              /*!< Device IN Token Queue Read Register-2 (Read Only). <i>Offset: 824h</i> */
-    volatile uint32_t dvbusdis;             /*!< Device VBUS     discharge Register.  <i>Offset: 828h</i> */
-    volatile uint32_t dvbuspulse;           /*!< Device VBUS Pulse Register.     <i>Offset: 82Ch</i> */
-    volatile uint32_t dtknqr3_dthrctl;      /*!< Device IN Token Queue Read Register-3 (Read Only). Device Thresholding control register (Read/Write) <i>Offset: 830h</i> */
-    volatile uint32_t dtknqr4_fifoemptymsk; /*!< Device IN Token Queue Read Register-4 (Read Only). Device IN EPs empty Inr. Mask Register (Read/Write)<i>Offset: 834h</i> */
-    volatile uint32_t deachint;             /*!< Device Each Endpoint Interrupt Register (Read Only). <i>Offset: 838h</i> */
-    volatile uint32_t deachintmsk;          /*!< Device Each Endpoint Interrupt mask Register (Read/Write). <i>Offset: 83Ch</i> */
-    volatile uint32_t diepeachintmsk[16];   /*!< Device Each In Endpoint Interrupt mask Register (Read/Write). <i>Offset: 840h</i> */
-    volatile uint32_t doepeachintmsk[16];   /*!< Device Each Out Endpoint Interrupt mask Register (Read/Write). <i>Offset: 880h</i> */
-    uint32_t reserved0x8c0[16];
-    /* Input Endpoints*/
-    usb_in_endpoint_t in_ep_reg[USB_IN_EP_NUM]; /*!< 0x900*/
-    uint32_t reserved6[72];
-    /* Output Endpoints */
-    usb_out_endpoint_t out_ep_reg[USB_OUT_EP_NUM];
-    uint32_t reserved7[136];
-    uint32_t pcgctrl; /*!<0xe00*/
-    uint32_t pcgctrl1;
-    uint8_t reserved8[0x1000 - 0xe08]; /*!<0xd00*/
-    uint32_t fifo[16][0x400];          /*!<0x1000*/
+     * Host mode registers offsets from 0x0400 to 0x07FF
+     */
+    volatile uint32_t hcfg;                 // 0x0400 Host Configuration Register
+    volatile uint32_t hfir;                 // 0x0404 Host Frame Interval Register
+    volatile uint32_t hfnum;                // 0x0408 Host Frame Number/Frame Remaining Register
+    uint32_t reserved0x40C;                 // 0x040c Reserved
+    volatile uint32_t hptxsts;              // 0x0410 Host Periodic Transmit FIFO/ Queue Status Register
+    volatile uint32_t haint;                // 0x0414 Host All Channels Interrupt Register
+    volatile uint32_t haintmsk;             // 0x0418 Host All Channels Interrupt Mask Register
+    volatile uint32_t hflbaddr;             // 0x041c Host Frame List Base Address Register
+    uint32_t reserved0x0420_0x0440[8];      // 0x0420 to 0x0440
+    volatile uint32_t hprt;                 // 0x0440 Host Port Control and Status Register
+    uint32_t reserved_0x0444_0x0500[47];    // 0x0444 to 0x0500
+    //Skip over the host channel registers
+    volatile uint32_t host_chan_regs[128];  // 0x0500 to 0x0700
+    uint32_t reserved_0x0700_0x0800[64];    // 0x0700 to 0x0800
+    /**
+     * Device mode registers offsets from
+     */
+    volatile uint32_t dcfg;                 // 0x0800 Device Configuration Register
+    volatile uint32_t dctl;                 // 0x0804 Device Control Register
+    volatile uint32_t dsts;                 // 0x0808 Device Status Register (Read Only)
+    uint32_t reserved0x80c;                 // 0x080c
+    volatile uint32_t diepmsk;              // 0x0810 Device IN Endpoint Common Interrupt Mask Register
+    volatile uint32_t doepmsk;              // 0x0814 Device OUT Endpoint Common Interrupt Mask Register
+    volatile uint32_t daint;                // 0x0818 Device All Endpoints Interrupt Register
+    volatile uint32_t daintmsk;             // 0x081c Device All Endpoints Interrupt Mask Register
+    uint32_t reserved_0x0820_0x0828[2];     // 0x0820 to 0x0828
+    volatile uint32_t dvbusdis;             // 0x0828 Device VBUS discharge Register
+    volatile uint32_t dvbuspulse;           // 0x082c Device VBUS Pulse Register
+    volatile uint32_t dthrctl;              // 0x0830 Device Thresholding control register (Read/Write)
+    volatile uint32_t dtknqr4_fifoemptymsk; // 0x0834 Device IN Endpoint FIFO Empty Interrupt Mask register
+    uint32_t reserved_0x0838_0x0900[50];    // 0x0838 to 0x0900
+    // Input Endpoints
+    usb_in_endpoint_t in_ep_reg[USB_IN_EP_NUM];     // 0x0900 to 0x09e0 IN EP registers
+    uint32_t reserved_0x09e0_0x0b00[72];    // 0x09e0 to 0x0b00
+    // Output Endpoints
+    usb_out_endpoint_t out_ep_reg[USB_OUT_EP_NUM];  // 0x0b00 to 0x0be0 OUT EP registers
+    uint32_t reserved_0x0be0_0x0d00[72];    // 0x0be0 to 0x0d00
+    uint32_t reserved_0x0d00_0x0e00[64];    // 0x0d00 to 0x0e00
+    /**
+     * Power Control and direct FIFO access
+     */
+    uint32_t pcgctrl;                       // 0x0e00 Power and Clock Gating Control Register
+    uint32_t reserved_0x0e04;               // 0x0e04
+    uint8_t reserved8[0x1000 - 0xe08];      // 0x0d00 to 0x1000
+    uint32_t fifo[16][0x400];               // 0x1000 to 0x2000 Device EP i/Host Channel i FIFO
     uint8_t reserved0x11000[0x20000 - 0x11000];
-    uint32_t dbg_fifo[0x20000]; /*!< 0x20000*/
+    uint32_t dbg_fifo[0x20000];             // 0x2000 to 0x22000 Direct Access to Data FIFO RAM for Debugging
 } usb_dev_t;
 
 extern usb_dev_t USB0;
diff --git a/tools/sdk/esp32s2/include/soc/include/soc/soc_memory_layout.h b/tools/sdk/esp32s2/include/soc/include/soc/soc_memory_types.h
similarity index 55%
rename from tools/sdk/esp32s2/include/soc/include/soc/soc_memory_layout.h
rename to tools/sdk/esp32s2/include/soc/include/soc/soc_memory_types.h
index 2da5b729..cf0d7ff1 100644
--- a/tools/sdk/esp32s2/include/soc/include/soc/soc_memory_layout.h
+++ b/tools/sdk/esp32s2/include/soc/include/soc/soc_memory_types.h
@@ -22,124 +22,9 @@
 #include "sdkconfig.h"
 #include "esp_attr.h"
 
-#ifdef CONFIG_BT_ENABLED
-
-#define SOC_MEM_BT_DATA_START               0x3ffae6e0
-#define SOC_MEM_BT_DATA_END                 0x3ffaff10
-#define SOC_MEM_BT_EM_START                 0x3ffb0000
-#define SOC_MEM_BT_EM_END                   0x3ffb7cd8
-#define SOC_MEM_BT_EM_BTDM0_START           0x3ffb0000
-#define SOC_MEM_BT_EM_BTDM0_END             0x3ffb09a8
-#define SOC_MEM_BT_EM_BLE_START             0x3ffb09a8
-#define SOC_MEM_BT_EM_BLE_END               0x3ffb1ddc
-#define SOC_MEM_BT_EM_BTDM1_START           0x3ffb1ddc
-#define SOC_MEM_BT_EM_BTDM1_END             0x3ffb2730
-#define SOC_MEM_BT_EM_BREDR_START           0x3ffb2730
-#define SOC_MEM_BT_EM_BREDR_NO_SYNC_END     0x3ffb6388  //Not calculate with synchronize connection support
-#define SOC_MEM_BT_EM_BREDR_END             0x3ffb7cd8  //Calculate with synchronize connection support
-#define SOC_MEM_BT_EM_SYNC0_START           0x3ffb6388
-#define SOC_MEM_BT_EM_SYNC0_END             0x3ffb6bf8
-#define SOC_MEM_BT_EM_SYNC1_START           0x3ffb6bf8
-#define SOC_MEM_BT_EM_SYNC1_END             0x3ffb7468
-#define SOC_MEM_BT_EM_SYNC2_START           0x3ffb7468
-#define SOC_MEM_BT_EM_SYNC2_END             0x3ffb7cd8
-#define SOC_MEM_BT_BSS_START                0x3ffb8000
-#define SOC_MEM_BT_BSS_END                  0x3ffb9a20
-#define SOC_MEM_BT_MISC_START               0x3ffbdb28
-#define SOC_MEM_BT_MISC_END                 0x3ffbdb5c
-
-#define SOC_MEM_BT_EM_PER_SYNC_SIZE         0x870
-
-#define SOC_MEM_BT_EM_BREDR_REAL_END        (SOC_MEM_BT_EM_BREDR_NO_SYNC_END + CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF * SOC_MEM_BT_EM_PER_SYNC_SIZE)
-
-#endif //CONFIG_BT_ENABLED
-
-#define SOC_MEMORY_TYPE_NO_PRIOS 3
-
-/* Type descriptor holds a description for a particular type of memory on a particular SoC.
- */
-typedef struct {
-    const char *name;  ///< Name of this memory type
-    uint32_t caps[SOC_MEMORY_TYPE_NO_PRIOS]; ///< Capabilities for this memory type (as a prioritised set)
-    bool aliased_iram;   ///< If true, this is data memory that is is also mapped in IRAM
-    bool startup_stack; ///< If true, memory of this type is used for ROM stack during startup
-} soc_memory_type_desc_t;
-
-/* Constant table of tag descriptors for all this SoC's tags */
-extern const soc_memory_type_desc_t soc_memory_types[];
-extern const size_t soc_memory_type_count;
-
-/* Region descriptor holds a description for a particular region of memory on a particular SoC.
- */
-typedef struct
-{
-    intptr_t start;  ///< Start address of the region
-    size_t size;            ///< Size of the region in bytes
-    size_t type;             ///< Type of the region (index into soc_memory_types array)
-    intptr_t iram_address; ///< If non-zero, is equivalent address in IRAM
-} soc_memory_region_t;
-
-extern const soc_memory_region_t soc_memory_regions[];
-extern const size_t soc_memory_region_count;
-
-/* Region descriptor holds a description for a particular region of
-   memory reserved on this SoC for a particular use (ie not available
-   for stack/heap usage.) */
-typedef struct
-{
-    intptr_t start;
-    intptr_t end;
-} soc_reserved_region_t;
-
-/* Use this macro to reserved a fixed region of RAM (hardcoded addresses)
- * for a particular purpose.
- *
- * Usually used to mark out memory addresses needed for hardware or ROM code
- * purposes.
- *
- * Don't call this macro from user code which can use normal C static allocation
- * instead.
- *
- * @param START Start address to be reserved.
- * @param END One after the address of the last byte to be reserved. (ie length of
- * the reserved region is (END - START) in bytes.
- * @param NAME Name for the reserved region. Must be a valid variable name,
- * unique to this source file.
- */
-#define SOC_RESERVE_MEMORY_REGION(START, END, NAME)     \
-    __attribute__((section(".reserved_memory_address"))) __attribute__((used)) \
-    static soc_reserved_region_t reserved_region_##NAME = { START, END };
-
-/* Return available memory regions for this SoC. Each available memory
- * region is a contiguous piece of memory which is not being used by
- * static data, used by ROM code, or reserved by a component using
- * the SOC_RESERVE_MEMORY_REGION() macro.
- *
- * This result is soc_memory_regions[] minus all regions reserved
- * via the SOC_RESERVE_MEMORY_REGION() macro (which may also split
- * some regions up.)
- *
- * At startup, all available memory returned by this function is
- * registered as heap space.
- *
- * @note OS-level startup function only, not recommended to call from
- * app code.
- *
- * @param regions Pointer to an array for reading available regions into.
- * Size of the array should be at least the result of
- * soc_get_available_memory_region_max_count(). Entries in the array
- * will be ordered by memory address.
- *
- * @return Number of entries copied to 'regions'. Will be no greater than
- * the result of soc_get_available_memory_region_max_count().
- */
-size_t soc_get_available_memory_regions(soc_memory_region_t *regions);
-
-/* Return the maximum number of available memory regions which could be
- * returned by soc_get_available_memory_regions(). Used to size the
- * array passed to that function.
- */
-size_t soc_get_available_memory_region_max_count(void);
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 inline static bool IRAM_ATTR esp_ptr_dma_capable(const void *p)
 {
@@ -148,7 +33,7 @@ inline static bool IRAM_ATTR esp_ptr_dma_capable(const void *p)
 
 inline static bool IRAM_ATTR esp_ptr_dma_ext_capable(const void *p)
 {
-#if CONFIG_IDF_TARGET_ESP32S2  || CONFIG_IDF_TARGET_ESP32S3
+#ifdef SOC_PSRAM_DMA_CAPABLE
     return (intptr_t)p >= SOC_DMA_EXT_LOW && (intptr_t)p < SOC_DMA_EXT_HIGH;
 #else
     return false;
@@ -302,3 +187,7 @@ inline static bool IRAM_ATTR esp_stack_ptr_is_sane(uint32_t sp)
 #endif
         ;
 }
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/wifi_provisioning/include/wifi_provisioning/scheme_ble.h b/tools/sdk/esp32s2/include/wifi_provisioning/include/wifi_provisioning/scheme_ble.h
index ed30d818..fc19e16b 100644
--- a/tools/sdk/esp32s2/include/wifi_provisioning/include/wifi_provisioning/scheme_ble.h
+++ b/tools/sdk/esp32s2/include/wifi_provisioning/include/wifi_provisioning/scheme_ble.h
@@ -77,6 +77,29 @@ void wifi_prov_scheme_ble_event_cb_free_bt  (void *user_data, wifi_prov_cb_event
  */
 esp_err_t wifi_prov_scheme_ble_set_service_uuid(uint8_t *uuid128);
 
+/**
+ * @brief   Set manufacturer specific data in scan response
+ *
+ * This must be called before starting provisioning, i.e. before
+ * making a call to wifi_prov_mgr_start_provisioning().
+ *
+ * @note    It is important to understand that length of custom manufacturer
+ *          data should be within limits. The manufacturer data goes into scan
+ *          response along with BLE device name. By default, BLE device name
+ *          length is of 11 Bytes, however it can vary as per application use
+ *          case. So, one has to honour the scan response data size limits i.e.
+ *          (mfg_data_len + 2) < 31 - (device_name_length + 2 ). If the
+ *          mfg_data length exceeds this limit, the length will be truncated.
+ *
+ * @param[in] mfg_data      Custom manufacturer data
+ * @param[in] mfg_data_len  Manufacturer data length
+ *
+ * @return
+ *  - ESP_OK              : Success
+ *  - ESP_ERR_INVALID_ARG : Null argument
+ */
+esp_err_t wifi_prov_scheme_ble_set_mfg_data(uint8_t *mfg_data, ssize_t mfg_data_len);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/ld/esp32s2.ld b/tools/sdk/esp32s2/ld/esp32s2.ld
deleted file mode 100644
index 668d6fce..00000000
--- a/tools/sdk/esp32s2/ld/esp32s2.ld
+++ /dev/null
@@ -1,148 +0,0 @@
-/* ESP32S2 Linker Script Memory Layout
-
-   This file describes the memory layout (memory blocks) by virtual memory addresses.
-
-   This linker script is passed through the C preprocessor to include configuration options.
-
-   Please use preprocessor features sparingly!
-   Restrict to simple macros with numeric values, and/or #if/#endif blocks.
-*/
-#include "sdkconfig.h"
-
-#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
-#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE)
-#elif defined(CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP)
-#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE)
-#else
-#define ESP_BOOTLOADER_RESERVE_RTC 0
-#endif
-
-#ifdef CONFIG_ESP32S2_INSTRUCTION_CACHE_8KB
-#define CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE 0x2000
-#else
-#define CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE 0x4000
-#endif
-
-#ifdef CONFIG_ESP32S2_DATA_CACHE_0KB
-#define CONFIG_ESP32S2_DATA_CACHE_SIZE 0
-#elif defined CONFIG_ESP32S2_DATA_CACHE_8KB
-#define CONFIG_ESP32S2_DATA_CACHE_SIZE 0x2000
-#else
-#define CONFIG_ESP32S2_DATA_CACHE_SIZE 0x4000
-#endif
-
-#define RAM_IRAM_START    0x40020000
-#define RAM_DRAM_START    0x3FFB0000
-
-#define DATA_RAM_END      0x3FFE0000  /* 2nd stage bootloader iram_loader_seg starts at SRAM block 14 (reclaimed after app boots) */
-
-#define IRAM_ORG    (RAM_IRAM_START + CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE \
-                                    + CONFIG_ESP32S2_DATA_CACHE_SIZE)
-
-#define DRAM_ORG    (RAM_DRAM_START + CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE \
-                                    + CONFIG_ESP32S2_DATA_CACHE_SIZE)
-
-#define I_D_RAM_SIZE   DATA_RAM_END - DRAM_ORG
-
-#if defined(CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE)
-
-ASSERT((CONFIG_ESP32S2_FIXED_STATIC_RAM_SIZE <= I_D_RAM_SIZE),
-          "Fixed static ram data does not fit.")
-
-#define STATIC_RAM_SIZE CONFIG_ESP32S2_FIXED_STATIC_RAM_SIZE
-
-#else
-#define STATIC_RAM_SIZE 0
-#endif
-
-MEMORY
-{
-  /* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
-  of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but
-  are connected to the data port of the CPU and eg allow bytewise access. */
-
-  /* IRAM for CPU.*/
-  iram0_0_seg (RX) :                 org = IRAM_ORG, len = I_D_RAM_SIZE
-
-#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-  /* Even though the segment name is iram, it is actually mapped to flash
-  */
-  iram0_2_seg (RX) :                 org = 0x40080020, len = 0x780000-0x20
-
-  /*
-    (0x20 offset above is a convenience for the app binary image generation.
-    Flash cache has 64KB pages. The .bin file which is flashed to the chip
-    has a 0x18 byte file header, and each segment has a 0x08 byte segment
-    header. Setting this offset makes it simple to meet the flash cache MMU's
-    constraint that (paddr % 64KB == vaddr % 64KB).)
-  */
-#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-
-
-  /* Shared data RAM, excluding memory reserved for bootloader and ROM bss/data/stack. */
-  dram0_0_seg (RW) :                 org = DRAM_ORG, len = I_D_RAM_SIZE - STATIC_RAM_SIZE
-
-#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-  /* Flash mapped constant data */
-  drom0_0_seg (R) :                  org = 0x3F000020, len = 0x3f0000-0x20
-
-  /* (See iram0_2_seg for meaning of 0x20 offset in the above.) */
-#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-
-  /* RTC fast memory (executable). Persists over deep sleep.
-   */
-  rtc_iram_seg(RWX) :                org = 0x40070000, len = 0x2000
-
-  /* RTC slow memory (data accessible). Persists over deep sleep.
-
-     Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.
-  */
-  rtc_slow_seg(RW)  :                org = 0x50000000 + CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM,
-                                     len = 0x2000 - CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM
-
-  /* RTC fast memory (same block as above), viewed from data bus */
-  rtc_data_seg(RW) :                 org = 0x3ff9e000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC
-}
-
-#if defined(CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE)
-/* static data ends at defined address */
-_static_data_end = DRAM_ORG + STATIC_RAM_SIZE;
-#else
-_static_data_end = _bss_end;
-#endif
-
-_heap_end = 0x40000000;
-
-_data_seg_org = ORIGIN(rtc_data_seg);
-
-/* The lines below define location alias for .rtc.data section based on Kconfig option.
-   When the option is not defined then use slow memory segment
-   else the data will be placed in fast memory segment
-   TODO: check whether the rtc_data_location is correct for esp32s2 - IDF-761 */
-#ifndef CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM
-REGION_ALIAS("rtc_data_location", rtc_slow_seg );
-#else
-REGION_ALIAS("rtc_data_location", rtc_data_seg );
-#endif
-
-#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-  REGION_ALIAS("default_code_seg", iram0_2_seg);
-#else
-  REGION_ALIAS("default_code_seg", iram0_0_seg);
-#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-
-#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-  REGION_ALIAS("default_rodata_seg", drom0_0_seg);
-#else
-  REGION_ALIAS("default_rodata_seg", dram0_0_seg);
-#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-
-
-/**
- *  If rodata default segment is placed in `drom0_0_seg`, then flash's first rodata section must
- *  also be first in the segment.
- */
-#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
-  ASSERT(_rodata_reserved_start == ORIGIN(default_rodata_seg),
-         ".flash.appdesc section must be placed at the beginning of the rodata segment.")
-#endif
diff --git a/tools/sdk/esp32s2/ld/esp32s2.rom.api.ld b/tools/sdk/esp32s2/ld/esp32s2.rom.api.ld
index 63ad6e6d..afb08492 100644
--- a/tools/sdk/esp32s2/ld/esp32s2.rom.api.ld
+++ b/tools/sdk/esp32s2/ld/esp32s2.rom.api.ld
@@ -36,3 +36,4 @@ PROVIDE ( esp_rom_md5_final  = 0x4000530c );
 PROVIDE ( esp_rom_printf   = ets_printf );
 PROVIDE ( esp_rom_delay_us = ets_delay_us );
 PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
+PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
diff --git a/tools/sdk/esp32s2/ld/esp32s2_out.ld b/tools/sdk/esp32s2/ld/memory.ld
similarity index 100%
rename from tools/sdk/esp32s2/ld/esp32s2_out.ld
rename to tools/sdk/esp32s2/ld/memory.ld
diff --git a/tools/sdk/esp32s2/ld/esp32s2.project.ld b/tools/sdk/esp32s2/ld/sections.ld
similarity index 99%
rename from tools/sdk/esp32s2/ld/esp32s2.project.ld
rename to tools/sdk/esp32s2/ld/sections.ld
index 22eb0c10..a9b9c27f 100644
--- a/tools/sdk/esp32s2/ld/esp32s2.project.ld
+++ b/tools/sdk/esp32s2/ld/sections.ld
@@ -1,6 +1,6 @@
 /* Automatically generated file; DO NOT EDIT */
 /* Espressif IoT Development Framework Linker Script */
-/* Generated from: /Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/esp32s2/ld/esp32s2.project.ld.in */
+/* Generated from: /home/runner/work/esp32-arduino-lib-builder/esp32-arduino-lib-builder/esp-idf/components/esp_system/ld/esp32s2/sections.ld.in */
 
 /*  Default entry point:  */
 ENTRY(call_start_cpu0);
diff --git a/tools/sdk/esp32s2/lib/libapp_trace.a b/tools/sdk/esp32s2/lib/libapp_trace.a
index c58b4404..d84403af 100644
Binary files a/tools/sdk/esp32s2/lib/libapp_trace.a and b/tools/sdk/esp32s2/lib/libapp_trace.a differ
diff --git a/tools/sdk/esp32s2/lib/libapp_update.a b/tools/sdk/esp32s2/lib/libapp_update.a
index 234176b3..96082c00 100644
Binary files a/tools/sdk/esp32s2/lib/libapp_update.a and b/tools/sdk/esp32s2/lib/libapp_update.a differ
diff --git a/tools/sdk/esp32s2/lib/libarduino_tinyusb.a b/tools/sdk/esp32s2/lib/libarduino_tinyusb.a
index 342cfc45..ea8902c5 100644
Binary files a/tools/sdk/esp32s2/lib/libarduino_tinyusb.a and b/tools/sdk/esp32s2/lib/libarduino_tinyusb.a differ
diff --git a/tools/sdk/esp32s2/lib/libasio.a b/tools/sdk/esp32s2/lib/libasio.a
index 2307413a..4d06535f 100644
Binary files a/tools/sdk/esp32s2/lib/libasio.a and b/tools/sdk/esp32s2/lib/libasio.a differ
diff --git a/tools/sdk/esp32s2/lib/libbootloader_support.a b/tools/sdk/esp32s2/lib/libbootloader_support.a
index b83d0270..6999aab8 100644
Binary files a/tools/sdk/esp32s2/lib/libbootloader_support.a and b/tools/sdk/esp32s2/lib/libbootloader_support.a differ
diff --git a/tools/sdk/esp32s2/lib/libcbor.a b/tools/sdk/esp32s2/lib/libcbor.a
index 1f7f8133..6bef1010 100644
Binary files a/tools/sdk/esp32s2/lib/libcbor.a and b/tools/sdk/esp32s2/lib/libcbor.a differ
diff --git a/tools/sdk/esp32s2/lib/libcmock.a b/tools/sdk/esp32s2/lib/libcmock.a
index 9ec71e3d..8c67b445 100644
Binary files a/tools/sdk/esp32s2/lib/libcmock.a and b/tools/sdk/esp32s2/lib/libcmock.a differ
diff --git a/tools/sdk/esp32s2/lib/libcoap.a b/tools/sdk/esp32s2/lib/libcoap.a
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diff --git a/tools/sdk/esp32s2/sdkconfig b/tools/sdk/esp32s2/sdkconfig
index 383def67..15bd9ca2 100644
--- a/tools/sdk/esp32s2/sdkconfig
+++ b/tools/sdk/esp32s2/sdkconfig
@@ -726,6 +726,7 @@ CONFIG_FMB_SERIAL_BUF_SIZE=256
 CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB=8
 CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS=1000
 CONFIG_FMB_PORT_TASK_PRIO=10
+CONFIG_FMB_PORT_TASK_AFFINITY=0x7FFFFFFF
 # CONFIG_FMB_CONTROLLER_SLAVE_ID_SUPPORT is not set
 CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT=20
 CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE=20
@@ -1047,6 +1048,8 @@ CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y
 CONFIG_MBEDTLS_SSL_PROTO_DTLS=y
 CONFIG_MBEDTLS_SSL_ALPN=y
 CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y
+CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE=y
+CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE=y
 CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y
 
 #