Change timer interrupt allocator
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f9b2d42a61
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@ -22,7 +22,6 @@
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#include "esp_attr.h"
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#include "esp_intr.h"
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#define HWTIMER_INUM 10
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#define HWTIMER_LOCK() portENTER_CRITICAL(timer->lock)
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#define HWTIMER_UNLOCK() portEXIT_CRITICAL(timer->lock)
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@ -220,7 +219,10 @@ void timerEnd(hw_timer_t *timer){
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void timerAttachInterrupt(hw_timer_t *timer, void (*fn)(void), bool edge){
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static bool initialized = false;
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ESP_INTR_DISABLE(HWTIMER_INUM);
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static intr_handle_t intr_handle = NULL;
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if(intr_handle){
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esp_intr_disable(intr_handle);
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}
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if(fn == NULL){
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timer->dev->config.level_int_en = 0;
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timer->dev->config.edge_int_en = 0;
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@ -232,10 +234,6 @@ void timerAttachInterrupt(hw_timer_t *timer, void (*fn)(void), bool edge){
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}
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__timerInterruptHandlers[timer->num] = NULL;
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} else {
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if(!initialized){
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xt_set_interrupt_handler(HWTIMER_INUM, &__timerISR, NULL);
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initialized = true;
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}
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__timerInterruptHandlers[timer->num] = fn;
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timer->dev->config.level_int_en = edge?0:1;//When set, an alarm will generate a level type interrupt.
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timer->dev->config.edge_int_en = edge?1:0;//When set, an alarm will generate an edge type interrupt.
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@ -253,14 +251,21 @@ void timerAttachInterrupt(hw_timer_t *timer, void (*fn)(void), bool edge){
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intr_source = ETS_TG0_T0_EDGE_INTR_SOURCE + timer->timer;
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}
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}
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intr_matrix_set(xPortGetCoreID(), intr_source, HWTIMER_INUM);
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if(!initialized){
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initialized = true;
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esp_intr_alloc(intr_source, (int)ESP_INTR_FLAG_IRAM, __timerISR, NULL, &intr_handle);
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} else {
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intr_matrix_set(esp_intr_get_cpu(intr_handle), intr_source, esp_intr_get_intno(intr_handle));
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}
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if(timer->group){
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TIMERG1.int_ena.val |= BIT(timer->timer);
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} else {
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TIMERG0.int_ena.val |= BIT(timer->timer);
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}
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}
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ESP_INTR_ENABLE(HWTIMER_INUM);
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if(intr_handle){
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esp_intr_enable(intr_handle);
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}
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}
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void timerDetachInterrupt(hw_timer_t *timer){
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