Update IDF to 3a271a4 (#735)
This commit is contained in:
parent
9fe32304c8
commit
7216977234
@ -1 +1 @@
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Subproject commit 98cd2290d036a4e27db061a76a512b526ef1cc14
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Subproject commit cb1ab4ea76af17d347cdadcc003d1fe53af12aa7
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@ -70,7 +70,6 @@ env.Prepend(
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join(FRAMEWORK_DIR, "tools", "sdk", "include", "newlib"),
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join(FRAMEWORK_DIR, "tools", "sdk", "include", "nvs_flash"),
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join(FRAMEWORK_DIR, "tools", "sdk", "include", "openssl"),
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join(FRAMEWORK_DIR, "tools", "sdk", "include", "soc"),
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join(FRAMEWORK_DIR, "tools", "sdk", "include", "spi_flash"),
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join(FRAMEWORK_DIR, "tools", "sdk", "include", "sdmmc"),
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join(FRAMEWORK_DIR, "tools", "sdk", "include", "spiffs"),
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@ -80,6 +79,7 @@ env.Prepend(
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join(FRAMEWORK_DIR, "tools", "sdk", "include", "wear_levelling"),
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join(FRAMEWORK_DIR, "tools", "sdk", "include", "xtensa-debug-module"),
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join(FRAMEWORK_DIR, "tools", "sdk", "include", "console"),
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join(FRAMEWORK_DIR, "tools", "sdk", "include", "soc"),
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join(FRAMEWORK_DIR, "tools", "sdk", "include", "newlib"),
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join(FRAMEWORK_DIR, "tools", "sdk", "include", "coap"),
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join(FRAMEWORK_DIR, "tools", "sdk", "include", "wpa_supplicant"),
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@ -94,7 +94,7 @@ env.Prepend(
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join(FRAMEWORK_DIR, "tools", "sdk", "ld")
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],
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LIBS=[
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"gcc", "stdc++", "app_trace", "app_update", "bootloader_support", "bt", "btdm_app", "c", "c_nano", "coap", "coexist", "console", "core", "cxx", "driver", "esp32", "esp_adc_cal", "espnow", "ethernet", "expat", "fatfs", "freertos", "hal", "heap", "jsmn", "json", "log", "lwip", "m", "mbedtls", "mdns", "micro-ecc", "net80211", "newlib", "nghttp", "nvs_flash", "openssl", "phy", "pp", "pthread", "rtc", "sdmmc", "smartconfig", "soc", "spi_flash", "spiffs", "tcpip_adapter", "ulp", "vfs", "wear_levelling", "wpa", "wpa2", "wpa_supplicant", "wps", "xtensa-debug-module"
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"gcc", "app_trace", "app_update", "bootloader_support", "bt", "btdm_app", "c", "c_nano", "coap", "coexist", "console", "core", "cxx", "driver", "esp32", "esp_adc_cal", "espnow", "ethernet", "expat", "fatfs", "freertos", "hal", "heap", "jsmn", "json", "log", "lwip", "m", "mbedtls", "mdns", "micro-ecc", "net80211", "newlib", "nghttp", "nvs_flash", "openssl", "phy", "pp", "pthread", "rtc", "sdmmc", "smartconfig", "soc", "spi_flash", "spiffs", "tcpip_adapter", "ulp", "vfs", "wear_levelling", "wpa", "wpa2", "wpa_supplicant", "wps", "xtensa-debug-module", "stdc++"
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],
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UPLOADERFLAGS=[
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@ -402,6 +402,8 @@ typedef void (tBTA_SET_ADV_DATA_CMPL_CBACK) (tBTA_STATUS status);
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typedef void (tBTA_START_ADV_CMPL_CBACK) (tBTA_STATUS status);
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typedef tBTM_ADD_WHITELIST_CBACK tBTA_ADD_WHITELIST_CBACK;
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typedef tBTM_SET_PKT_DATA_LENGTH_CBACK tBTA_SET_PKT_DATA_LENGTH_CBACK;
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typedef tBTM_SET_LOCAL_PRIVACY_CBACK tBTA_SET_LOCAL_PRIVACY_CBACK;
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@ -1410,7 +1412,7 @@ extern void BTA_DisableTestMode(void);
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*******************************************************************************/
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extern void BTA_DmSetDeviceName(char *p_name);
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extern void BTA_DmUpdateWhiteList(BOOLEAN add_remove, BD_ADDR remote_addr);
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extern void BTA_DmUpdateWhiteList(BOOLEAN add_remove, BD_ADDR remote_addr, tBTA_ADD_WHITELIST_CBACK *add_wl_cb);
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extern void BTA_DmBleReadAdvTxPower(tBTA_CMPL_CB *cmpl_cb);
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@ -2034,6 +2036,24 @@ extern void BTA_DmBleObserve(BOOLEAN start, UINT32 duration,
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tBTA_DM_SEARCH_CBACK *p_results_cb,
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tBTA_START_STOP_SCAN_CMPL_CBACK *p_start_stop_scan_cb);
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/*******************************************************************************
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**
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** Function BTA_DmBleScan
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**
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** Description This procedure keep the device listening for advertising
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** events from a broadcast device.
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**
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** Parameters start: start or stop observe.
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** duration : Duration of the scan. Continuous scan if 0 is passed
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** p_results_cb: Callback to be called with scan results
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**
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** Returns void
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**
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*******************************************************************************/
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extern void BTA_DmBleScan(BOOLEAN start, UINT32 duration,
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tBTA_DM_SEARCH_CBACK *p_results_cb,
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tBTA_START_STOP_SCAN_CMPL_CBACK *p_start_stop_scan_cb);
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extern void BTA_DmBleStopAdvertising(void);
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extern void BTA_DmSetRandAddress(BD_ADDR rand_addr);
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@ -72,7 +72,11 @@ typedef UINT16 tBTA_GATTC_INT_EVT;
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/* max client application GATTC can support */
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#ifndef BTA_GATTC_CL_MAX
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#define BTA_GATTC_CL_MAX 3 // 32
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#if (GATT_MAX_PHY_CHANNEL > 3)
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#define BTA_GATTC_CL_MAX GATT_MAX_PHY_CHANNEL
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#else
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#define BTA_GATTC_CL_MAX 3 // The origin value is 10
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#endif
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#endif
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/* max known devices GATTC can support */
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@ -146,6 +146,11 @@ typedef struct {
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UINT16 supervision_tout;
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}tBTM_LE_UPDATE_CONN_PRAMS;
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typedef enum{
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BTM_WHITELIST_REMOVE = 0X00,
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BTM_WHITELIST_ADD = 0X01,
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}tBTM_WL_OPERATION;
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typedef void (tBTM_DEV_STATUS_CB) (tBTM_DEV_STATUS status);
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@ -177,6 +182,8 @@ typedef void (tBTM_UPDATE_CONN_PARAM_CBACK) (UINT8 status, BD_ADDR bd_addr, tBTM
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typedef void (tBTM_SET_PKT_DATA_LENGTH_CBACK) (UINT8 status, tBTM_LE_SET_PKT_DATA_LENGTH_PARAMS *data_length_params);
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typedef void (tBTM_ADD_WHITELIST_CBACK) (UINT8 status, tBTM_WL_OPERATION wl_opration);
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typedef void (tBTM_SET_LOCAL_PRIVACY_CBACK) (UINT8 status);
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@ -234,7 +241,7 @@ typedef void (tBTM_SET_LOCAL_PRIVACY_CBACK) (UINT8 status);
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/* inquiry activity mask */
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#define BTM_BR_INQ_ACTIVE_MASK (BTM_GENERAL_INQUIRY_ACTIVE|BTM_LIMITED_INQUIRY_ACTIVE|BTM_PERIODIC_INQUIRY_ACTIVE) /* BR/EDR inquiry activity mask */
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#define BTM_BLE_SCAN_ACTIVE_MASK 0xF0 /* LE scan activity mask */
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#define BTM_BLE_SCAN_ACTIVE_MASK 0x01F0 /* LE scan activity mask */
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#define BTM_BLE_INQ_ACTIVE_MASK (BTM_LE_GENERAL_INQUIRY_ACTIVE|BTM_LE_LIMITED_INQUIRY_ACTIVE) /* LE inquiry activity mask*/
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#define BTM_INQUIRY_ACTIVE_MASK (BTM_BR_INQ_ACTIVE_MASK | BTM_BLE_INQ_ACTIVE_MASK) /* inquiry activity mask */
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@ -1207,6 +1207,22 @@ tBTM_STATUS BTM_BleWriteScanRspRaw(UINT8 *p_raw_scan_rsp, UINT32 raw_scan_rsp_le
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tBTM_STATUS BTM_BleObserve(BOOLEAN start, UINT32 duration,
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tBTM_INQ_RESULTS_CB *p_results_cb, tBTM_CMPL_CB *p_cmpl_cb);
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/*******************************************************************************
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**
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** Function BTM_BleScan
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**
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** Description This procedure keep the device listening for advertising
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** events from a broadcast device.
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**
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** Parameters start: start or stop scan.
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**
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** Returns void
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**
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*******************************************************************************/
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//extern
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tBTM_STATUS BTM_BleScan(BOOLEAN start, UINT32 duration,
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tBTM_INQ_RESULTS_CB *p_results_cb, tBTM_CMPL_CB *p_cmpl_cb);
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/*******************************************************************************
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**
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@ -1695,7 +1711,7 @@ void BTM_BleTurnOnPrivacyOnRemote(BD_ADDR bd_addr,
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**
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*******************************************************************************/
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//extern
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BOOLEAN BTM_BleUpdateAdvWhitelist(BOOLEAN add_remove, BD_ADDR emote_bda);
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BOOLEAN BTM_BleUpdateAdvWhitelist(BOOLEAN add_remove, BD_ADDR emote_bda, tBTM_ADD_WHITELIST_CBACK *add_wl_cb);
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/*******************************************************************************
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**
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@ -86,13 +86,15 @@ typedef UINT8 tBTM_BLE_SEC_REQ_ACT;
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#define BTM_BLE_IS_RESOLVE_BDA(x) ((x[0] & BLE_RESOLVE_ADDR_MASK) == BLE_RESOLVE_ADDR_MSB)
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/* LE scan activity bit mask, continue with LE inquiry bits */
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#define BTM_LE_SELECT_CONN_ACTIVE 0x40 /* selection connection is in progress */
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#define BTM_LE_OBSERVE_ACTIVE 0x80 /* observe is in progress */
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#define BTM_LE_SELECT_CONN_ACTIVE 0x0040 /* selection connection is in progress */
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#define BTM_LE_OBSERVE_ACTIVE 0x0080 /* observe is in progress */
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#define BTM_LE_DISCOVER_ACTIVE 0x0100 /* scan is in progress */
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/* BLE scan activity mask checking */
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#define BTM_BLE_IS_SCAN_ACTIVE(x) ((x) & BTM_BLE_SCAN_ACTIVE_MASK)
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#define BTM_BLE_IS_INQ_ACTIVE(x) ((x) & BTM_BLE_INQUIRY_MASK)
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#define BTM_BLE_IS_OBS_ACTIVE(x) ((x) & BTM_LE_OBSERVE_ACTIVE)
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#define BTM_BLE_IS_DISCO_ACTIVE(x) ((x) & BTM_LE_DISCOVER_ACTIVE)
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#define BTM_BLE_IS_SEL_CONN_ACTIVE(x) ((x) & BTM_LE_SELECT_CONN_ACTIVE)
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/* BLE ADDR type ID bit */
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@ -136,6 +138,7 @@ typedef struct {
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typedef struct {
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UINT16 discoverable_mode;
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UINT16 connectable_mode;
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BOOLEAN scan_params_set;
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UINT32 scan_window;
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UINT32 scan_interval;
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UINT8 scan_type; /* current scan type: active or passive */
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@ -294,7 +297,7 @@ typedef void (tBTM_DATA_LENGTH_CHANGE_CBACK) (UINT16 max_tx_length, UINT16 max_r
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/* Define BLE Device Management control structure
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*/
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typedef struct {
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UINT8 scan_activity; /* LE scan activity mask */
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UINT16 scan_activity; /* LE scan activity mask */
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/*****************************************************
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** BLE Inquiry
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@ -306,6 +309,11 @@ typedef struct {
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tBTM_CMPL_CB *p_obs_cmpl_cb;
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TIMER_LIST_ENT obs_timer_ent;
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/* scan callback and timer */
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tBTM_INQ_RESULTS_CB *p_scan_results_cb;
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tBTM_CMPL_CB *p_scan_cmpl_cb;
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TIMER_LIST_ENT scan_timer_ent;
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/* background connection procedure cb value */
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tBTM_BLE_CONN_TYPE bg_conn_type;
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UINT32 scan_int;
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@ -314,6 +322,7 @@ typedef struct {
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/* white list information */
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UINT8 white_list_avail_size;
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tBTM_ADD_WHITELIST_CBACK *add_wl_cb;
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tBTM_BLE_WL_STATE wl_state;
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fixed_queue_t *conn_pending_q;
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@ -357,7 +366,6 @@ tBTM_STATUS btm_ble_start_inquiry (UINT8 mode, UINT8 duration);
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void btm_ble_stop_scan(void);
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void btm_clear_all_pending_le_entry(void);
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void btm_ble_stop_scan();
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BOOLEAN btm_ble_send_extended_scan_params(UINT8 scan_type, UINT32 scan_int,
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UINT32 scan_win, UINT8 addr_type_own,
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UINT8 scan_filter_policy);
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@ -405,7 +413,7 @@ void btm_ble_update_sec_key_size(BD_ADDR bd_addr, UINT8 enc_key_size);
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UINT8 btm_ble_read_sec_key_size(BD_ADDR bd_addr);
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/* white list function */
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BOOLEAN btm_update_dev_to_white_list(BOOLEAN to_add, BD_ADDR bd_addr);
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BOOLEAN btm_update_dev_to_white_list(BOOLEAN to_add, BD_ADDR bd_addr, tBTM_ADD_WHITELIST_CBACK *add_wl_cb);
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void btm_update_scanner_filter_policy(tBTM_BLE_SFP scan_policy);
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void btm_update_adv_filter_policy(tBTM_BLE_AFP adv_policy);
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void btm_ble_clear_white_list (void);
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@ -160,9 +160,8 @@ typedef void (*tBTU_EVENT_CALLBACK)(BT_HDR *p_hdr);
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#define BTU_TTYPE_BLE_GAP_FAST_ADV 106
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#define BTU_TTYPE_BLE_OBSERVE 107
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#define BTU_TTYPE_UCD_TO 108
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#define BTU_TTYPE_BLE_SCAN 109
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/* This is the inquiry response information held by BTU, and available
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@ -97,6 +97,7 @@ typedef enum {
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ESP_GAP_BLE_CLEAR_BOND_DEV_COMPLETE_EVT, /*!< When clear the bond device clear complete, the event comes */
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ESP_GAP_BLE_GET_BOND_DEV_COMPLETE_EVT, /*!< When get the bond device list complete, the event comes */
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ESP_GAP_BLE_READ_RSSI_COMPLETE_EVT, /*!< When read the rssi complete, the event comes */
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ESP_GAP_BLE_ADD_WHITELIST_COMPLETE_EVT, /*!< When add or remove whitelist complete, the event comes */
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ESP_GAP_BLE_EVT_MAX,
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} esp_gap_ble_cb_event_t;
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@ -462,6 +463,10 @@ typedef enum {
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ESP_BLE_EVT_SCAN_RSP = 0x04, /*!< Scan Response (SCAN_RSP) */
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} esp_ble_evt_type_t;
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typedef enum{
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ESP_BLE_WHITELIST_REMOVE = 0X00, /*!< remove mac from whitelist */
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ESP_BLE_WHITELIST_ADD = 0X01, /*!< add address to whitelist */
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}esp_ble_wl_opration;
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/**
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* @brief Gap callback parameters union
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*/
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@ -600,6 +605,13 @@ typedef union {
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if the RSSI cannot be read, the RSSI metric shall be set to 127. */
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esp_bd_addr_t remote_addr; /*!< The remote device address */
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} read_rssi_cmpl; /*!< Event parameter of ESP_GAP_BLE_READ_RSSI_COMPLETE_EVT */
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/**
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* @brief ESP_GAP_BLE_ADD_WHITELIST_COMPLETE_EVT
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*/
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struct ble_add_whitelist_cmpl_evt_param {
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esp_bt_status_t status; /*!< Indicate the add or remove whitelist operation success status */
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esp_ble_wl_opration wl_opration; /*!< The value is ESP_BLE_WHITELIST_ADD if add address to whitelist operation success, ESP_BLE_WHITELIST_REMOVE if remove address from the whitelist operation success */
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} add_whitelist_cmpl; /*!< Event parameter of ESP_GAP_BLE_ADD_WHITELIST_COMPLETE_EVT */
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} esp_ble_gap_cb_param_t;
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/**
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@ -972,6 +984,12 @@ esp_err_t esp_ble_get_bond_device_list(int *dev_num, esp_ble_bond_dev_t *dev_lis
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/**
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* @brief This function is to disconnect the physical connection of the peer device
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* gattc maybe have multiple virtual GATT server connections when multiple app_id registed.
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* esp_ble_gattc_close (esp_gatt_if_t gattc_if, uint16_t conn_id) only close one virtual GATT server connection.
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* if there exist other virtual GATT server connections, it does not disconnect the physical connection.
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* esp_ble_gap_disconnect(esp_bd_addr_t remote_device) disconnect the physical connection directly.
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*
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*
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*
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* @param[in] remote_device : BD address of the peer device
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*
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@ -78,7 +78,6 @@ typedef enum {
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ESP_BT_CONTROLLER_STATUS_IDLE = 0,
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ESP_BT_CONTROLLER_STATUS_INITED,
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ESP_BT_CONTROLLER_STATUS_ENABLED,
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ESP_BT_CONTROLLER_STATUS_SHUTDOWN,
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ESP_BT_CONTROLLER_STATUS_NUM,
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} esp_bt_controller_status_t;
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@ -47,6 +47,7 @@
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#define CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED 1
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#define CONFIG_CONSOLE_UART_BAUDRATE 115200
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#define CONFIG_LWIP_MAX_SOCKETS 10
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#define CONFIG_LWIP_NETIF_LOOPBACK 1
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#define CONFIG_EMAC_TASK_PRIORITY 20
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#define CONFIG_TIMER_TASK_STACK_DEPTH 2048
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#define CONFIG_TCP_MSS 1436
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@ -84,7 +85,7 @@
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#define CONFIG_TCPIP_TASK_STACK_SIZE 2560
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#define CONFIG_FATFS_CODEPAGE_850 1
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#define CONFIG_TASK_WDT 1
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#define CONFIG_MAIN_TASK_STACK_SIZE 4096
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#define CONFIG_MAIN_TASK_STACK_SIZE 8192
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#define CONFIG_SPIFFS_PAGE_CHECK 1
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#define CONFIG_TASK_WDT_TIMEOUT_S 5
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#define CONFIG_INT_WDT_TIMEOUT_MS 300
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@ -105,6 +106,7 @@
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#define CONFIG_ESP32_WIFI_NVS_ENABLED 1
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#define CONFIG_ULP_COPROC_ENABLED 1
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#define CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED 1
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#define CONFIG_LIBSODIUM_USE_MBEDTLS_SHA 1
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#define CONFIG_DMA_RX_BUF_NUM 10
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#define CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED 1
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#define CONFIG_TCP_SYNMAXRTX 6
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@ -119,6 +121,7 @@
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#define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
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#define CONFIG_TCP_MSL 60000
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#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_1 1
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#define CONFIG_LWIP_SO_REUSE_RXTOALL 1
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#define CONFIG_PARTITION_TABLE_SINGLE_APP 1
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#define CONFIG_ESP32_WIFI_RX_BA_WIN 6
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#define CONFIG_MBEDTLS_X509_CSR_PARSE_C 1
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@ -179,7 +182,6 @@
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#define CONFIG_MBEDTLS_TLS_SERVER 1
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#define CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT 1
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#define CONFIG_FREERTOS_ISR_STACKSIZE 1536
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#define CONFIG_CLASSIC_BT_ENABLED 1
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#define CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK 1
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#define CONFIG_OPENSSL_ASSERT_DO_NOTHING 1
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#define CONFIG_WL_SECTOR_SIZE_4096 1
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@ -192,6 +194,7 @@
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#define CONFIG_FATFS_MAX_LFN 255
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#define CONFIG_ESP32_WIFI_TX_BUFFER_TYPE 1
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#define CONFIG_ESPTOOLPY_BAUD_921600B 1
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#define CONFIG_LWIP_LOOPBACK_MAX_PBUFS 8
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#define CONFIG_APP_OFFSET 0x10000
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#define CONFIG_MEMMAP_SMP 1
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#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
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@ -122,6 +122,8 @@ typedef enum {
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I2S_MODE_PDM = 64,
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} i2s_mode_t;
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||||
|
||||
|
||||
/**
|
||||
* @brief I2S configuration parameters for i2s_param_config function
|
||||
*
|
||||
@ -135,6 +137,7 @@ typedef struct {
|
||||
int intr_alloc_flags; /*!< Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info */
|
||||
int dma_buf_count; /*!< I2S DMA Buffer Count */
|
||||
int dma_buf_len; /*!< I2S DMA Buffer Length */
|
||||
int use_apll; /*!< I2S using APLL as main I2S clock, enable it to get accurate clock */
|
||||
} i2s_config_t;
|
||||
|
||||
/**
|
||||
|
@ -26,6 +26,7 @@ extern "C" {
|
||||
|
||||
#define LEDC_APB_CLK_HZ (APB_CLK_FREQ)
|
||||
#define LEDC_REF_CLK_HZ (1*1000000)
|
||||
#define LEDC_ERR_DUTY (0xFFFFFFFF)
|
||||
|
||||
typedef enum {
|
||||
LEDC_HIGH_SPEED_MODE = 0, /*!< LEDC high speed speed_mode */
|
||||
@ -206,10 +207,10 @@ esp_err_t ledc_set_duty(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t
|
||||
* @param channel LEDC channel(0-7), select from ledc_channel_t
|
||||
*
|
||||
* @return
|
||||
* - (-1) parameter error
|
||||
* - LEDC_ERR_DUTY if parameter error
|
||||
* - Others Current LEDC duty
|
||||
*/
|
||||
int ledc_get_duty(ledc_mode_t speed_mode, ledc_channel_t channel);
|
||||
uint32_t ledc_get_duty(ledc_mode_t speed_mode, ledc_channel_t channel);
|
||||
|
||||
/**
|
||||
* @brief LEDC set gradient
|
||||
@ -329,7 +330,7 @@ esp_err_t ledc_bind_channel_timer(ledc_mode_t speed_mode, uint32_t channel, uint
|
||||
* - ESP_ERR_INVALID_STATE Fade function not installed.
|
||||
* - ESP_FAIL Fade function init error
|
||||
*/
|
||||
esp_err_t ledc_set_fade_with_step(ledc_mode_t speed_mode, ledc_channel_t channel, int target_duty, int scale, int cycle_num);
|
||||
esp_err_t ledc_set_fade_with_step(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t target_duty, int scale, int cycle_num);
|
||||
|
||||
/**
|
||||
* @brief Set LEDC fade function, with a limited time. Should call ledc_fade_func_install() before calling this function.
|
||||
@ -346,7 +347,7 @@ esp_err_t ledc_set_fade_with_step(ledc_mode_t speed_mode, ledc_channel_t channel
|
||||
* - ESP_ERR_INVALID_STATE Fade function not installed.
|
||||
* - ESP_FAIL Fade function init error
|
||||
*/
|
||||
esp_err_t ledc_set_fade_with_time(ledc_mode_t speed_mode, ledc_channel_t channel, int target_duty, int max_fade_time_ms);
|
||||
esp_err_t ledc_set_fade_with_time(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t target_duty, int max_fade_time_ms);
|
||||
|
||||
/**
|
||||
* @brief Install ledc fade function. This function will occupy interrupt of LEDC module.
|
||||
|
@ -18,59 +18,76 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define PCNT_PIN_NOT_USED (-1) /*!< Pin are not used */
|
||||
#define PCNT_PIN_NOT_USED (-1) /*!< When selected for a pin, this pin will not be used */
|
||||
|
||||
/**
|
||||
* @brief Selection of available modes that determine the counter's action depending on the state of the control signal's input GPIO
|
||||
* @note Configuration covers two actions, one for high, and one for low level on the control input
|
||||
*/
|
||||
typedef enum {
|
||||
PCNT_MODE_KEEP = 0, /*!< Control mode: won't change counter mode*/
|
||||
PCNT_MODE_REVERSE = 1, /*!< Control mode: invert counter mode(increase -> decrease, decrease -> increase);*/
|
||||
PCNT_MODE_DISABLE = 2, /*!< Control mode: Inhibit counter(counter value will not change in this condition)*/
|
||||
PCNT_MODE_REVERSE = 1, /*!< Control mode: invert counter mode(increase -> decrease, decrease -> increase) */
|
||||
PCNT_MODE_DISABLE = 2, /*!< Control mode: Inhibit counter(counter value will not change in this condition) */
|
||||
PCNT_MODE_MAX
|
||||
} pcnt_ctrl_mode_t;
|
||||
|
||||
/**
|
||||
* @brief Selection of available modes that determine the counter's action on the edge of the pulse signal's input GPIO
|
||||
* @note Configuration covers two actions, one for positive, and one for negative edge on the pulse input
|
||||
*/
|
||||
typedef enum {
|
||||
PCNT_COUNT_DIS = 0, /*!< Counter mode: Inhibit counter(counter value will not change in this condition)*/
|
||||
PCNT_COUNT_INC = 1, /*!< Counter mode: Increase counter value*/
|
||||
PCNT_COUNT_DEC = 2, /*!< Counter mode: Decrease counter value*/
|
||||
PCNT_COUNT_DIS = 0, /*!< Counter mode: Inhibit counter(counter value will not change in this condition) */
|
||||
PCNT_COUNT_INC = 1, /*!< Counter mode: Increase counter value */
|
||||
PCNT_COUNT_DEC = 2, /*!< Counter mode: Decrease counter value */
|
||||
PCNT_COUNT_MAX
|
||||
} pcnt_count_mode_t;
|
||||
|
||||
/**
|
||||
* @brief Selection of all available PCNT units
|
||||
*/
|
||||
typedef enum {
|
||||
PCNT_UNIT_0 = 0, /*!< PCNT unit0 */
|
||||
PCNT_UNIT_1 = 1, /*!< PCNT unit1 */
|
||||
PCNT_UNIT_2 = 2, /*!< PCNT unit2 */
|
||||
PCNT_UNIT_3 = 3, /*!< PCNT unit3 */
|
||||
PCNT_UNIT_4 = 4, /*!< PCNT unit4 */
|
||||
PCNT_UNIT_5 = 5, /*!< PCNT unit5 */
|
||||
PCNT_UNIT_6 = 6, /*!< PCNT unit6 */
|
||||
PCNT_UNIT_7 = 7, /*!< PCNT unit7 */
|
||||
PCNT_UNIT_0 = 0, /*!< PCNT unit 0 */
|
||||
PCNT_UNIT_1 = 1, /*!< PCNT unit 1 */
|
||||
PCNT_UNIT_2 = 2, /*!< PCNT unit 2 */
|
||||
PCNT_UNIT_3 = 3, /*!< PCNT unit 3 */
|
||||
PCNT_UNIT_4 = 4, /*!< PCNT unit 4 */
|
||||
PCNT_UNIT_5 = 5, /*!< PCNT unit 5 */
|
||||
PCNT_UNIT_6 = 6, /*!< PCNT unit 6 */
|
||||
PCNT_UNIT_7 = 7, /*!< PCNT unit 7 */
|
||||
PCNT_UNIT_MAX,
|
||||
} pcnt_unit_t;
|
||||
|
||||
/**
|
||||
* @brief Selection of channels available for a single PCNT unit
|
||||
*/
|
||||
typedef enum {
|
||||
PCNT_CHANNEL_0 = 0x00, /*!< PCNT channel0 */
|
||||
PCNT_CHANNEL_1 = 0x01, /*!< PCNT channel1 */
|
||||
PCNT_CHANNEL_0 = 0x00, /*!< PCNT channel 0 */
|
||||
PCNT_CHANNEL_1 = 0x01, /*!< PCNT channel 1 */
|
||||
PCNT_CHANNEL_MAX,
|
||||
} pcnt_channel_t;
|
||||
|
||||
/**
|
||||
* @brief Selection of counter's events the may trigger an interrupt
|
||||
*/
|
||||
typedef enum {
|
||||
PCNT_EVT_L_LIM = 0, /*!< PCNT watch point event: Minimum counter value */
|
||||
PCNT_EVT_H_LIM = 1, /*!< PCNT watch point event: Maximum counter value*/
|
||||
PCNT_EVT_THRES_0 = 2, /*!< PCNT watch point event: threshold0 value event*/
|
||||
PCNT_EVT_THRES_1 = 3, /*!< PCNT watch point event: threshold1 value event*/
|
||||
PCNT_EVT_ZERO = 4, /*!< PCNT watch point event: counter value zero event*/
|
||||
PCNT_EVT_H_LIM = 1, /*!< PCNT watch point event: Maximum counter value */
|
||||
PCNT_EVT_THRES_0 = 2, /*!< PCNT watch point event: threshold0 value event */
|
||||
PCNT_EVT_THRES_1 = 3, /*!< PCNT watch point event: threshold1 value event */
|
||||
PCNT_EVT_ZERO = 4, /*!< PCNT watch point event: counter value zero event */
|
||||
PCNT_EVT_MAX
|
||||
} pcnt_evt_type_t;
|
||||
|
||||
/**
|
||||
* @brief Pulse Counter configure struct
|
||||
* @brief Pulse Counter configuration for a single channel
|
||||
*/
|
||||
typedef struct {
|
||||
int pulse_gpio_num; /*!< Pulse input gpio_num, if you want to use gpio16, pulse_gpio_num = 16, a negative value will be ignored */
|
||||
int ctrl_gpio_num; /*!< Contol signal input gpio_num, a negative value will be ignored*/
|
||||
pcnt_ctrl_mode_t lctrl_mode; /*!< PCNT low control mode*/
|
||||
pcnt_ctrl_mode_t hctrl_mode; /*!< PCNT high control mode*/
|
||||
pcnt_count_mode_t pos_mode; /*!< PCNT positive edge count mode*/
|
||||
pcnt_count_mode_t neg_mode; /*!< PCNT negative edge count mode*/
|
||||
int pulse_gpio_num; /*!< Pulse input GPIO number, if you want to use GPIO16, enter pulse_gpio_num = 16, a negative value will be ignored */
|
||||
int ctrl_gpio_num; /*!< Control signal input GPIO number, a negative value will be ignored */
|
||||
pcnt_ctrl_mode_t lctrl_mode; /*!< PCNT low control mode */
|
||||
pcnt_ctrl_mode_t hctrl_mode; /*!< PCNT high control mode */
|
||||
pcnt_count_mode_t pos_mode; /*!< PCNT positive edge count mode */
|
||||
pcnt_count_mode_t neg_mode; /*!< PCNT negative edge count mode */
|
||||
int16_t counter_h_lim; /*!< Maximum counter value */
|
||||
int16_t counter_l_lim; /*!< Minimum counter value */
|
||||
pcnt_unit_t unit; /*!< PCNT unit number */
|
||||
@ -150,7 +167,7 @@ esp_err_t pcnt_counter_clear(pcnt_unit_t pcnt_unit);
|
||||
esp_err_t pcnt_intr_enable(pcnt_unit_t pcnt_unit);
|
||||
|
||||
/**
|
||||
* @brief Disable PCNT interrupt for PCNT uint
|
||||
* @brief Disable PCNT interrupt for PCNT unit
|
||||
*
|
||||
* @param pcnt_unit PCNT unit number
|
||||
*
|
||||
@ -219,10 +236,10 @@ esp_err_t pcnt_get_event_value(pcnt_unit_t unit, pcnt_evt_type_t evt_type, int16
|
||||
*
|
||||
* @param fn Interrupt handler function.
|
||||
* @param arg Parameter for handler function
|
||||
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
|
||||
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
|
||||
* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
|
||||
* be returned here.
|
||||
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
|
||||
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
|
||||
* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
|
||||
* be returned here.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
@ -236,11 +253,9 @@ esp_err_t pcnt_isr_register(void (*fn)(void*), void * arg, int intr_alloc_flags,
|
||||
* @param unit PCNT unit number
|
||||
* @param channel PCNT channel number
|
||||
* @param pulse_io Pulse signal input GPIO
|
||||
* @note
|
||||
* Set to PCNT_PIN_NOT_USED if unused.
|
||||
* @param ctrl_io Control signal input GPIO
|
||||
* @note
|
||||
* Set to PCNT_PIN_NOT_USED if unused.
|
||||
*
|
||||
* @note Set the signal input to PCNT_PIN_NOT_USED if unused.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
@ -329,8 +344,8 @@ esp_err_t pcnt_set_mode(pcnt_unit_t unit, pcnt_channel_t channel,
|
||||
* .pulse_gpio_num = 4, //set gpio4 as pulse input gpio
|
||||
* .ctrl_gpio_num = 5, //set gpio5 as control gpio
|
||||
* .channel = PCNT_CHANNEL_0, //use unit 0 channel 0
|
||||
* .lctrl_mode = PCNT_MODE_REVERSE, //when control signal is low ,reverse the primary counter mode(inc->dec/dec->inc)
|
||||
* .hctrl_mode = PCNT_MODE_KEEP, //when control signal is high,keep the primary counter mode
|
||||
* .lctrl_mode = PCNT_MODE_REVERSE, //when control signal is low, reverse the primary counter mode(inc->dec/dec->inc)
|
||||
* .hctrl_mode = PCNT_MODE_KEEP, //when control signal is high, keep the primary counter mode
|
||||
* .pos_mode = PCNT_COUNT_INC, //increment the counter
|
||||
* .neg_mode = PCNT_COUNT_DIS, //keep the counter value
|
||||
* .counter_h_lim = 10,
|
||||
|
@ -56,6 +56,7 @@ typedef enum {
|
||||
*
|
||||
* @param[in] periph : Peripheral module name
|
||||
*
|
||||
* Clock for the module will be ungated, and reset de-asserted.
|
||||
*
|
||||
* @return NULL
|
||||
*
|
||||
@ -67,12 +68,28 @@ void periph_module_enable(periph_module_t periph);
|
||||
*
|
||||
* @param[in] periph : Peripheral module name
|
||||
*
|
||||
* Clock for the module will be gated, reset asserted.
|
||||
*
|
||||
* @return NULL
|
||||
*
|
||||
*/
|
||||
void periph_module_disable(periph_module_t periph);
|
||||
|
||||
/**
|
||||
* @brief reset peripheral module
|
||||
*
|
||||
* @param[in] periph : Peripheral module name
|
||||
*
|
||||
* Reset will asserted then de-assrted for the peripheral.
|
||||
*
|
||||
* Calling this function does not enable or disable the clock for the module.
|
||||
*
|
||||
* @return NULL
|
||||
*
|
||||
*/
|
||||
void periph_module_reset(periph_module_t periph);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
@ -35,7 +35,7 @@ extern "C" {
|
||||
#include "soc/uart_channel.h"
|
||||
|
||||
#define UART_FIFO_LEN (128) /*!< Length of the hardware FIFO buffers */
|
||||
#define UART_INTR_MASK 0x1ff /*!< mask of all UART interrupts */
|
||||
#define UART_INTR_MASK 0x1ff /*!< Mask of all UART interrupts */
|
||||
#define UART_LINE_INV_MASK (0x3f << 19) /*!< TBD */
|
||||
#define UART_BITRATE_MAX 5000000 /*!< Max bit rate supported by UART */
|
||||
#define UART_PIN_NO_CHANGE (-1) /*!< Constant for uart_set_pin function which indicates that UART pin should not be changed */
|
||||
@ -73,7 +73,7 @@ typedef enum {
|
||||
typedef enum {
|
||||
UART_NUM_0 = 0x0, /*!< UART base address 0x3ff40000*/
|
||||
UART_NUM_1 = 0x1, /*!< UART base address 0x3ff50000*/
|
||||
UART_NUM_2 = 0x2, /*!< UART base address 0x3ff6E000*/
|
||||
UART_NUM_2 = 0x2, /*!< UART base address 0x3ff6e000*/
|
||||
UART_NUM_MAX,
|
||||
} uart_port_t;
|
||||
|
||||
@ -81,7 +81,7 @@ typedef enum {
|
||||
* @brief UART parity constants
|
||||
*/
|
||||
typedef enum {
|
||||
UART_PARITY_DISABLE = 0x0, /*!< Disable UART parity*/
|
||||
UART_PARITY_DISABLE = 0x0, /*!< Disable UART parity*/
|
||||
UART_PARITY_EVEN = 0x2, /*!< Enable UART even parity*/
|
||||
UART_PARITY_ODD = 0x3 /*!< Enable UART odd parity*/
|
||||
} uart_parity_t;
|
||||
@ -101,11 +101,11 @@ typedef enum {
|
||||
* @brief UART configuration parameters for uart_param_config function
|
||||
*/
|
||||
typedef struct {
|
||||
int baud_rate; /*!< UART baudrate*/
|
||||
int baud_rate; /*!< UART baud rate*/
|
||||
uart_word_length_t data_bits; /*!< UART byte size*/
|
||||
uart_parity_t parity; /*!< UART parity mode*/
|
||||
uart_stop_bits_t stop_bits; /*!< UART stop bits*/
|
||||
uart_hw_flowcontrol_t flow_ctrl; /*!< UART HW flow control mode(cts/rts)*/
|
||||
uart_hw_flowcontrol_t flow_ctrl; /*!< UART HW flow control mode (cts/rts)*/
|
||||
uint8_t rx_flow_ctrl_thresh ; /*!< UART HW RTS threshold*/
|
||||
} uart_config_t;
|
||||
|
||||
@ -114,13 +114,13 @@ typedef struct {
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t intr_enable_mask; /*!< UART interrupt enable mask, choose from UART_XXXX_INT_ENA_M under UART_INT_ENA_REG(i), connect with bit-or operator*/
|
||||
uint8_t rx_timeout_thresh; /*!< UART timeout interrupt threshold(unit: time of sending one byte)*/
|
||||
uint8_t rx_timeout_thresh; /*!< UART timeout interrupt threshold (unit: time of sending one byte)*/
|
||||
uint8_t txfifo_empty_intr_thresh; /*!< UART TX empty interrupt threshold.*/
|
||||
uint8_t rxfifo_full_thresh; /*!< UART RX full interrupt threshold.*/
|
||||
} uart_intr_config_t;
|
||||
|
||||
/**
|
||||
* @brief UART event types used in the ringbuffer
|
||||
* @brief UART event types used in the ring buffer
|
||||
*/
|
||||
typedef enum {
|
||||
UART_DATA, /*!< UART data event*/
|
||||
@ -181,7 +181,7 @@ esp_err_t uart_get_word_length(uart_port_t uart_num, uart_word_length_t* data_bi
|
||||
esp_err_t uart_set_stop_bits(uart_port_t uart_num, uart_stop_bits_t stop_bits);
|
||||
|
||||
/**
|
||||
* @brief Set UART stop bits.
|
||||
* @brief Get UART stop bits.
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param stop_bits Pointer to accept value of UART stop bits.
|
||||
@ -193,7 +193,7 @@ esp_err_t uart_set_stop_bits(uart_port_t uart_num, uart_stop_bits_t stop_bits);
|
||||
esp_err_t uart_get_stop_bits(uart_port_t uart_num, uart_stop_bits_t* stop_bits);
|
||||
|
||||
/**
|
||||
* @brief Set UART parity.
|
||||
* @brief Set UART parity mode.
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param parity_mode the enum of uart parity configuration
|
||||
@ -230,7 +230,7 @@ esp_err_t uart_get_parity(uart_port_t uart_num, uart_parity_t* parity_mode);
|
||||
esp_err_t uart_set_baudrate(uart_port_t uart_num, uint32_t baudrate);
|
||||
|
||||
/**
|
||||
* @brief Get UART bit-rate.
|
||||
* @brief Get UART baud rate.
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param baudrate Pointer to accept value of UART baud rate
|
||||
@ -247,7 +247,9 @@ esp_err_t uart_get_baudrate(uart_port_t uart_num, uint32_t* baudrate);
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param inverse_mask Choose the wires that need to be inverted.
|
||||
* Inverse_mask should be chosen from UART_INVERSE_RXD/UART_INVERSE_TXD/UART_INVERSE_RTS/UART_INVERSE_CTS, combine with OR operation.
|
||||
* Inverse_mask should be chosen from
|
||||
UART_INVERSE_RXD / UART_INVERSE_TXD / UART_INVERSE_RTS / UART_INVERSE_CTS,
|
||||
combined with OR operation.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
@ -260,8 +262,8 @@ esp_err_t uart_set_line_inverse(uart_port_t uart_num, uint32_t inverse_mask);
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param flow_ctrl Hardware flow control mode
|
||||
* @param rx_thresh Threshold of Hardware RX flow control(0 ~ UART_FIFO_LEN).
|
||||
* Only when UART_HW_FLOWCTRL_RTS is set, will the rx_thresh value be set.
|
||||
* @param rx_thresh Threshold of Hardware RX flow control (0 ~ UART_FIFO_LEN).
|
||||
* Only when UART_HW_FLOWCTRL_RTS is set, will the rx_thresh value be set.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
@ -298,9 +300,9 @@ esp_err_t uart_get_hw_flow_ctrl(uart_port_t uart_num, uart_hw_flowcontrol_t* flo
|
||||
/**
|
||||
* @brief Clear UART interrupt status
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param clr_mask Bit mask of the status that to be cleared.
|
||||
* enable_mask should be chosen from the fields of register UART_INT_CLR_REG.
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param clr_mask Bit mask of the interrupt status to be cleared.
|
||||
* The bit mask should be composed from the fields of register UART_INT_CLR_REG.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
@ -311,9 +313,9 @@ esp_err_t uart_clear_intr_status(uart_port_t uart_num, uint32_t clr_mask);
|
||||
/**
|
||||
* @brief Set UART interrupt enable
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param enable_mask Bit mask of the enable bits.
|
||||
* enable_mask should be chosen from the fields of register UART_INT_ENA_REG.
|
||||
* The bit mask should be composed from the fields of register UART_INT_ENA_REG.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
@ -324,9 +326,9 @@ esp_err_t uart_enable_intr_mask(uart_port_t uart_num, uint32_t enable_mask);
|
||||
/**
|
||||
* @brief Clear UART interrupt enable bits
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param disable_mask Bit mask of the disable bits.
|
||||
* disable_mask should be chosen from the fields of register UART_INT_ENA_REG.
|
||||
* The bit mask should be composed from the fields of register UART_INT_ENA_REG.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
@ -334,9 +336,8 @@ esp_err_t uart_enable_intr_mask(uart_port_t uart_num, uint32_t enable_mask);
|
||||
*/
|
||||
esp_err_t uart_disable_intr_mask(uart_port_t uart_num, uint32_t disable_mask);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Enable UART RX interrupt(RX_FULL & RX_TIMEOUT INTERRUPT)
|
||||
* @brief Enable UART RX interrupt (RX_FULL & RX_TIMEOUT INTERRUPT)
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
*
|
||||
@ -347,7 +348,7 @@ esp_err_t uart_disable_intr_mask(uart_port_t uart_num, uint32_t disable_mask);
|
||||
esp_err_t uart_enable_rx_intr(uart_port_t uart_num);
|
||||
|
||||
/**
|
||||
* @brief Disable UART RX interrupt(RX_FULL & RX_TIMEOUT INTERRUPT)
|
||||
* @brief Disable UART RX interrupt (RX_FULL & RX_TIMEOUT INTERRUPT)
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
*
|
||||
@ -358,7 +359,7 @@ esp_err_t uart_enable_rx_intr(uart_port_t uart_num);
|
||||
esp_err_t uart_disable_rx_intr(uart_port_t uart_num);
|
||||
|
||||
/**
|
||||
* @brief Disable UART TX interrupt(RX_FULL & RX_TIMEOUT INTERRUPT)
|
||||
* @brief Disable UART TX interrupt (TX_FULL & TX_TIMEOUT INTERRUPT)
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
*
|
||||
@ -369,7 +370,7 @@ esp_err_t uart_disable_rx_intr(uart_port_t uart_num);
|
||||
esp_err_t uart_disable_tx_intr(uart_port_t uart_num);
|
||||
|
||||
/**
|
||||
* @brief Enable UART TX interrupt(RX_FULL & RX_TIMEOUT INTERRUPT)
|
||||
* @brief Enable UART TX interrupt (TX_FULL & TX_TIMEOUT INTERRUPT)
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param enable 1: enable; 0: disable
|
||||
@ -382,15 +383,15 @@ esp_err_t uart_disable_tx_intr(uart_port_t uart_num);
|
||||
esp_err_t uart_enable_tx_intr(uart_port_t uart_num, int enable, int thresh);
|
||||
|
||||
/**
|
||||
* @brief register UART interrupt handler(ISR).
|
||||
* @brief Register UART interrupt handler (ISR).
|
||||
*
|
||||
* @note UART ISR handler will be attached to the same CPU core that this function is running on.
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param fn Interrupt handler function.
|
||||
* @param arg parameter for handler function
|
||||
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
|
||||
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
|
||||
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
|
||||
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
|
||||
* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
|
||||
* be returned here.
|
||||
*
|
||||
@ -400,7 +401,6 @@ esp_err_t uart_enable_tx_intr(uart_port_t uart_num, int enable, int thresh);
|
||||
*/
|
||||
esp_err_t uart_isr_register(uart_port_t uart_num, void (*fn)(void*), void * arg, int intr_alloc_flags, uart_isr_handle_t *handle);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Free UART interrupt handler registered by uart_isr_register. Must be called on the same core as
|
||||
* uart_isr_register was called.
|
||||
@ -417,13 +417,16 @@ esp_err_t uart_isr_free(uart_port_t uart_num);
|
||||
* @brief Set UART pin number
|
||||
*
|
||||
* @note Internal signal can be output to multiple GPIO pads.
|
||||
* Only one GPIO pad can connect with input signal.
|
||||
* Only one GPIO pad can connect with input signal.
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param tx_io_num UART TX pin GPIO number, if set to UART_PIN_NO_CHANGE, use the current pin.
|
||||
* @param rx_io_num UART RX pin GPIO number, if set to UART_PIN_NO_CHANGE, use the current pin.
|
||||
* @param rts_io_num UART RTS pin GPIO number, if set to UART_PIN_NO_CHANGE, use the current pin.
|
||||
* @param cts_io_num UART CTS pin GPIO number, if set to UART_PIN_NO_CHANGE, use the current pin.
|
||||
* @note Instead of GPIO number a macro 'UART_PIN_NO_CHANGE' may be provided
|
||||
to keep the currently allocated pin.
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param tx_io_num UART TX pin GPIO number.
|
||||
* @param rx_io_num UART RX pin GPIO number.
|
||||
* @param rts_io_num UART RTS pin GPIO number.
|
||||
* @param cts_io_num UART CTS pin GPIO number.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
@ -432,11 +435,11 @@ esp_err_t uart_isr_free(uart_port_t uart_num);
|
||||
esp_err_t uart_set_pin(uart_port_t uart_num, int tx_io_num, int rx_io_num, int rts_io_num, int cts_io_num);
|
||||
|
||||
/**
|
||||
* @brief UART set RTS level (before inverse)
|
||||
* UART rx hardware flow control should not be set.
|
||||
* @brief Manually set the UART RTS pin level.
|
||||
* @note UART must be configured with hardware flow control disabled.
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param level 1: RTS output low(active); 0: RTS output high(block)
|
||||
* @param level 1: RTS output low (active); 0: RTS output high (block)
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
@ -445,9 +448,9 @@ esp_err_t uart_set_pin(uart_port_t uart_num, int tx_io_num, int rx_io_num, int r
|
||||
esp_err_t uart_set_rts(uart_port_t uart_num, int level);
|
||||
|
||||
/**
|
||||
* @brief UART set DTR level (before inverse)
|
||||
* @brief Manually set the UART DTR pin level.
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param level 1: DTR output low; 0: DTR output high
|
||||
*
|
||||
* @return
|
||||
@ -457,9 +460,9 @@ esp_err_t uart_set_rts(uart_port_t uart_num, int level);
|
||||
esp_err_t uart_set_dtr(uart_port_t uart_num, int level);
|
||||
|
||||
/**
|
||||
* @brief UART parameter configure
|
||||
* @brief Set UART configuration parameters.
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param uart_config UART parameter settings
|
||||
*
|
||||
* @return
|
||||
@ -469,9 +472,9 @@ esp_err_t uart_set_dtr(uart_port_t uart_num, int level);
|
||||
esp_err_t uart_param_config(uart_port_t uart_num, const uart_config_t *uart_config);
|
||||
|
||||
/**
|
||||
* @brief UART interrupt configure
|
||||
* @brief Configure UART interrupts.
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param intr_conf UART interrupt settings
|
||||
*
|
||||
* @return
|
||||
@ -485,18 +488,18 @@ esp_err_t uart_intr_config(uart_port_t uart_num, const uart_intr_config_t *intr_
|
||||
*
|
||||
* UART ISR handler will be attached to the same CPU core that this function is running on.
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param rx_buffer_size UART RX ring buffer size, rx_buffer_size should be greater than UART_FIFO_LEN.
|
||||
* @param tx_buffer_size UART TX ring buffer size.
|
||||
* If set to zero, driver will not use TX buffer, TX function will block task until all data have been sent out..
|
||||
* @note tx_buffer_size should be greater than UART_FIFO_LEN.
|
||||
* @note Rx_buffer_size should be greater than UART_FIFO_LEN. Tx_buffer_size should be either zero or greater than UART_FIFO_LEN.
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param rx_buffer_size UART RX ring buffer size.
|
||||
* @param tx_buffer_size UART TX ring buffer size.
|
||||
* If set to zero, driver will not use TX buffer, TX function will block task until all data have been sent out.
|
||||
* @param queue_size UART event queue size/depth.
|
||||
* @param uart_queue UART event queue handle (out param). On success, a new queue handle is written here to provide
|
||||
* access to UART events. If set to NULL, driver will not use an event queue.
|
||||
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
|
||||
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info. Do not set ESP_INTR_FLAG_IRAM here
|
||||
* (the driver's ISR handler is not located in IRAM)
|
||||
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
|
||||
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info. Do not set ESP_INTR_FLAG_IRAM here
|
||||
* (the driver's ISR handler is not located in IRAM)
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
@ -507,7 +510,7 @@ esp_err_t uart_driver_install(uart_port_t uart_num, int rx_buffer_size, int tx_b
|
||||
/**
|
||||
* @brief Uninstall UART driver.
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
@ -516,9 +519,9 @@ esp_err_t uart_driver_install(uart_port_t uart_num, int rx_buffer_size, int tx_b
|
||||
esp_err_t uart_driver_delete(uart_port_t uart_num);
|
||||
|
||||
/**
|
||||
* @brief Wait UART TX FIFO empty
|
||||
* @brief Wait until UART TX FIFO is empty.
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param ticks_to_wait Timeout, count in RTOS ticks
|
||||
*
|
||||
* @return
|
||||
@ -531,59 +534,59 @@ esp_err_t uart_wait_tx_done(uart_port_t uart_num, TickType_t ticks_to_wait);
|
||||
/**
|
||||
* @brief Send data to the UART port from a given buffer and length.
|
||||
*
|
||||
* This function will not wait for the space in TX FIFO, just fill the TX FIFO and return when the FIFO is full.
|
||||
* This function will not wait for enough space in TX FIFO. It will just fill the available TX FIFO and return when the FIFO is full.
|
||||
* @note This function should only be used when UART TX buffer is not enabled.
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param buffer data buffer address
|
||||
* @param len data length to send
|
||||
* @param buffer data buffer address
|
||||
* @param len data length to send
|
||||
*
|
||||
* @return
|
||||
* - (-1) Parameter error
|
||||
* - OTHERS(>=0) The number of data that pushed to the TX FIFO
|
||||
* - OTHERS (>=0) The number of bytes pushed to the TX FIFO
|
||||
*/
|
||||
int uart_tx_chars(uart_port_t uart_num, const char* buffer, uint32_t len);
|
||||
|
||||
/**
|
||||
* @brief Send data to the UART port from a given buffer and length,
|
||||
*
|
||||
* If parameter tx_buffer_size is set to zero:
|
||||
* If the UART driver's parameter 'tx_buffer_size' is set to zero:
|
||||
* This function will not return until all the data have been sent out, or at least pushed into TX FIFO.
|
||||
*
|
||||
* Otherwise, if tx_buffer_size > 0, this function will return after copying all the data to tx ringbuffer,
|
||||
* then, UART ISR will move data from ring buffer to TX FIFO gradually.
|
||||
* Otherwise, if the 'tx_buffer_size' > 0, this function will return after copying all the data to tx ring buffer,
|
||||
* UART ISR will then move data from the ring buffer to TX FIFO gradually.
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param src data buffer address
|
||||
* @param size data length to send
|
||||
* @param src data buffer address
|
||||
* @param size data length to send
|
||||
*
|
||||
* @return
|
||||
* - (-1) Parameter error
|
||||
* - OTHERS(>=0) The number of data that pushed to the TX FIFO
|
||||
* - OTHERS (>=0) The number of bytes pushed to the TX FIFO
|
||||
*/
|
||||
int uart_write_bytes(uart_port_t uart_num, const char* src, size_t size);
|
||||
|
||||
/**
|
||||
* @brief Send data to the UART port from a given buffer and length,
|
||||
* @brief Send data to the UART port from a given buffer and length.
|
||||
*
|
||||
* If parameter tx_buffer_size is set to zero:
|
||||
* If the UART driver's parameter 'tx_buffer_size' is set to zero:
|
||||
* This function will not return until all the data and the break signal have been sent out.
|
||||
* After all data send out, send a break signal.
|
||||
* After all data is sent out, send a break signal.
|
||||
*
|
||||
* Otherwise, if tx_buffer_size > 0, this function will return after copying all the data to tx ringbuffer,
|
||||
* then, UART ISR will move data from ring buffer to TX FIFO gradually.
|
||||
* After all data send out, send a break signal.
|
||||
* Otherwise, if the 'tx_buffer_size' > 0, this function will return after copying all the data to tx ring buffer,
|
||||
* UART ISR will then move data from the ring buffer to TX FIFO gradually.
|
||||
* After all data sent out, send a break signal.
|
||||
*
|
||||
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
||||
* @param src data buffer address
|
||||
* @param size data length to send
|
||||
* @param brk_len break signal length (unit: time of one data bit at current_baudrate)
|
||||
* @param brk_len break signal length (unit: the time it takes to send a complete byte
|
||||
including start, stop and parity bits at current_baudrate)
|
||||
*
|
||||
* @return
|
||||
* - (-1) Parameter error
|
||||
* - OTHERS(>=0) The number of data that pushed to the TX FIFO
|
||||
* - OTHERS (>=0) The number of bytes pushed to the TX FIFO
|
||||
*/
|
||||
|
||||
int uart_write_bytes_with_break(uart_port_t uart_num, const char* src, size_t size, int brk_len);
|
||||
|
||||
/**
|
||||
@ -596,7 +599,7 @@ int uart_write_bytes_with_break(uart_port_t uart_num, const char* src, size_t si
|
||||
*
|
||||
* @return
|
||||
* - (-1) Error
|
||||
* - Others return a char data from uart fifo.
|
||||
* - OTHERS (>=0) The number of bytes read from UART FIFO
|
||||
*/
|
||||
int uart_read_bytes(uart_port_t uart_num, uint8_t* buf, uint32_t length, TickType_t ticks_to_wait);
|
||||
|
||||
@ -612,10 +615,10 @@ int uart_read_bytes(uart_port_t uart_num, uint8_t* buf, uint32_t length, TickTyp
|
||||
esp_err_t uart_flush(uart_port_t uart_num);
|
||||
|
||||
/**
|
||||
* @brief UART get RX ring buffer cached data length
|
||||
* @brief UART get RX ring buffer cached data length
|
||||
*
|
||||
* @param uart_num UART port number.
|
||||
* @param size Pointer of size_t to accept cached data length
|
||||
* @param uart_num UART port number.
|
||||
* @param size Pointer of size_t to accept cached data length
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
@ -624,11 +627,11 @@ esp_err_t uart_flush(uart_port_t uart_num);
|
||||
esp_err_t uart_get_buffered_data_len(uart_port_t uart_num, size_t* size);
|
||||
|
||||
/**
|
||||
* @brief UART disable pattern detect function.
|
||||
* Designed for applications like 'AT commands'.
|
||||
* When the hardware detect a series of one same character, the interrupt will be triggered.
|
||||
* @brief UART disable pattern detect function.
|
||||
* Designed for applications like 'AT commands'.
|
||||
* When the hardware detects a series of one same character, the interrupt will be triggered.
|
||||
*
|
||||
* @param uart_num UART port number.
|
||||
* @param uart_num UART port number.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
@ -637,183 +640,22 @@ esp_err_t uart_get_buffered_data_len(uart_port_t uart_num, size_t* size);
|
||||
esp_err_t uart_disable_pattern_det_intr(uart_port_t uart_num);
|
||||
|
||||
/**
|
||||
* @brief UART enable pattern detect function.
|
||||
* Designed for applications like 'AT commands'.
|
||||
* When the hardware detect a series of one same character, the interrupt will be triggered.
|
||||
* @brief UART enable pattern detect function.
|
||||
* Designed for applications like 'AT commands'.
|
||||
* When the hardware detect a series of one same character, the interrupt will be triggered.
|
||||
*
|
||||
* @param uart_num UART port number.
|
||||
* @param pattern_chr character of the pattern
|
||||
* @param chr_num number of the character, 8bit value.
|
||||
* @param chr_tout timeout of the interval between each pattern characters, 24bit value, unit is APB(80Mhz) clock cycle.
|
||||
* @param post_idle idle time after the last pattern character, 24bit value, unit is APB(80Mhz) clock cycle.
|
||||
* @param pre_idle idle time before the first pattern character, 24bit value, unit is APB(80Mhz) clock cycle.
|
||||
* @param chr_tout timeout of the interval between each pattern characters, 24bit value, unit is APB (80Mhz) clock cycle.
|
||||
* @param post_idle idle time after the last pattern character, 24bit value, unit is APB (80Mhz) clock cycle.
|
||||
* @param pre_idle idle time before the first pattern character, 24bit value, unit is APB (80Mhz) clock cycle.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_FAIL Parameter error
|
||||
*/
|
||||
esp_err_t uart_enable_pattern_det_intr(uart_port_t uart_num, char pattern_chr, uint8_t chr_num, int chr_tout, int post_idle, int pre_idle);
|
||||
/***************************EXAMPLE**********************************
|
||||
*
|
||||
*
|
||||
* ----------------EXAMPLE OF UART SETTING ---------------------
|
||||
* @code{c}
|
||||
* //1. Setup UART
|
||||
* #include "freertos/queue.h"
|
||||
* //a. Set UART parameter
|
||||
* int uart_num = 0; //uart port number
|
||||
* uart_config_t uart_config = {
|
||||
* .baud_rate = 115200, //baudrate
|
||||
* .data_bits = UART_DATA_8_BITS, //data bit mode
|
||||
* .parity = UART_PARITY_DISABLE, //parity mode
|
||||
* .stop_bits = UART_STOP_BITS_1, //stop bit mode
|
||||
* .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, //hardware flow control(cts/rts)
|
||||
* .rx_flow_ctrl_thresh = 120, //flow control threshold
|
||||
* };
|
||||
* uart_param_config(uart_num, &uart_config);
|
||||
* //b1. Setup UART driver(with UART queue)
|
||||
* QueueHandle_t uart_queue;
|
||||
* //parameters here are just an example, tx buffer size is 2048
|
||||
* uart_driver_install(uart_num, 1024 * 2, 1024 * 2, 10, &uart_queue, 0);
|
||||
* //b2. Setup UART driver(without UART queue)
|
||||
* //parameters here are just an example, tx buffer size is 0
|
||||
* uart_driver_install(uart_num, 1024 * 2, 0, 10, NULL, 0);
|
||||
*@endcode
|
||||
*-----------------------------------------------------------------------------*
|
||||
* @code{c}
|
||||
* //2. Set UART pin
|
||||
* //set UART pin, not needed if use default pins.
|
||||
* uart_set_pin(uart_num, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, 15, 13);
|
||||
* @endcode
|
||||
*-----------------------------------------------------------------------------*
|
||||
* @code{c}
|
||||
* //3. Read data from UART.
|
||||
* uint8_t data[128];
|
||||
* int length = 0;
|
||||
* length = uart_read_bytes(uart_num, data, sizeof(data), 100);
|
||||
* @endcode
|
||||
*-----------------------------------------------------------------------------*
|
||||
* @code{c}
|
||||
* //4. Write data to UART.
|
||||
* char* test_str = "This is a test string.\n"
|
||||
* uart_write_bytes(uart_num, (const char*)test_str, strlen(test_str));
|
||||
* @endcode
|
||||
*-----------------------------------------------------------------------------*
|
||||
* @code{c}
|
||||
* //5. Write data to UART, end with a break signal.
|
||||
* uart_write_bytes_with_break(0, "test break\n",strlen("test break\n"), 100);
|
||||
* @endcode
|
||||
*-----------------------------------------------------------------------------*
|
||||
* @code{c}
|
||||
* //6. an example of echo test with hardware flow control on UART1
|
||||
* void uart_loop_back_test()
|
||||
* {
|
||||
* int uart_num = 1;
|
||||
* uart_config_t uart_config = {
|
||||
* .baud_rate = 115200,
|
||||
* .data_bits = UART_DATA_8_BITS,
|
||||
* .parity = UART_PARITY_DISABLE,
|
||||
* .stop_bits = UART_STOP_BITS_1,
|
||||
* .flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS,
|
||||
* .rx_flow_ctrl_thresh = 122,
|
||||
* };
|
||||
* //Configure UART1 parameters
|
||||
* uart_param_config(uart_num, &uart_config);
|
||||
* //Set UART1 pins(TX: IO16, RX: IO17, RTS: IO18, CTS: IO19)
|
||||
* uart_set_pin(uart_num, 16, 17, 18, 19);
|
||||
* //Install UART driver( We don't need an event queue here)
|
||||
* uart_driver_install(uart_num, 1024 * 2, 1024*4, 0, NULL, 0);
|
||||
* uint8_t data[1000];
|
||||
* while(1) {
|
||||
* //Read data from UART
|
||||
* int len = uart_read_bytes(uart_num, data, sizeof(data), 10);
|
||||
* //Write data back to UART
|
||||
* uart_write_bytes(uart_num, (const char*)data, len);
|
||||
* }
|
||||
* }
|
||||
* @endcode
|
||||
*-----------------------------------------------------------------------------*
|
||||
* @code{c}
|
||||
* //7. An example of using UART event queue on UART0.
|
||||
* #include "freertos/queue.h"
|
||||
* //A queue to handle UART event.
|
||||
* QueueHandle_t uart0_queue;
|
||||
* static const char *TAG = "uart_example";
|
||||
* void uart_task(void *pvParameters)
|
||||
* {
|
||||
* int uart_num = (int)pvParameters;
|
||||
* uart_event_t event;
|
||||
* size_t size = 1024;
|
||||
* uint8_t* dtmp = (uint8_t*)malloc(size);
|
||||
* for(;;) {
|
||||
* //Waiting for UART event.
|
||||
* if(xQueueReceive(uart0_queue, (void * )&event, (portTickType)portMAX_DELAY)) {
|
||||
* ESP_LOGI(TAG, "uart[%d] event:", uart_num);
|
||||
* switch(event.type) {
|
||||
* memset(dtmp, 0, size);
|
||||
* //Event of UART receving data
|
||||
* case UART_DATA:
|
||||
* ESP_LOGI(TAG,"data, len: %d", event.size);
|
||||
* int len = uart_read_bytes(uart_num, dtmp, event.size, 10);
|
||||
* ESP_LOGI(TAG, "uart read: %d", len);
|
||||
* break;
|
||||
* //Event of HW FIFO overflow detected
|
||||
* case UART_FIFO_OVF:
|
||||
* ESP_LOGI(TAG, "hw fifo overflow\n");
|
||||
* break;
|
||||
* //Event of UART ring buffer full
|
||||
* case UART_BUFFER_FULL:
|
||||
* ESP_LOGI(TAG, "ring buffer full\n");
|
||||
* break;
|
||||
* //Event of UART RX break detected
|
||||
* case UART_BREAK:
|
||||
* ESP_LOGI(TAG, "uart rx break\n");
|
||||
* break;
|
||||
* //Event of UART parity check error
|
||||
* case UART_PARITY_ERR:
|
||||
* ESP_LOGI(TAG, "uart parity error\n");
|
||||
* break;
|
||||
* //Event of UART frame error
|
||||
* case UART_FRAME_ERR:
|
||||
* ESP_LOGI(TAG, "uart frame error\n");
|
||||
* break;
|
||||
* //Others
|
||||
* default:
|
||||
* ESP_LOGI(TAG, "uart event type: %d\n", event.type);
|
||||
* break;
|
||||
* }
|
||||
* }
|
||||
* }
|
||||
* free(dtmp);
|
||||
* dtmp = NULL;
|
||||
* vTaskDelete(NULL);
|
||||
* }
|
||||
*
|
||||
* void uart_queue_test()
|
||||
* {
|
||||
* int uart_num = 0;
|
||||
* uart_config_t uart_config = {
|
||||
* .baud_rate = 115200,
|
||||
* .data_bits = UART_DATA_8_BITS,
|
||||
* .parity = UART_PARITY_DISABLE,
|
||||
* .stop_bits = UART_STOP_BITS_1,
|
||||
* .flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
|
||||
* .rx_flow_ctrl_thresh = 122,
|
||||
* };
|
||||
* //Set UART parameters
|
||||
* uart_param_config(uart_num, &uart_config);
|
||||
* //Set UART pins,(-1: default pin, no change.)
|
||||
* uart_set_pin(uart_num, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE);
|
||||
* //Set UART log level
|
||||
* esp_log_level_set(TAG, ESP_LOG_INFO);
|
||||
* //Install UART driver, and get the queue.
|
||||
* uart_driver_install(uart_num, 1024 * 2, 1024*4, 10, &uart0_queue, 0);
|
||||
* //Create a task to handler UART event from ISR
|
||||
* xTaskCreate(uart_task, "uTask", 1024, (void*)uart_num, 10, NULL);
|
||||
* }
|
||||
* @endcode
|
||||
*
|
||||
***************************END OF EXAMPLE**********************************/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
@ -30,34 +30,66 @@ typedef bool (*esp_freertos_idle_cb_t)();
|
||||
typedef void (*esp_freertos_tick_cb_t)();
|
||||
|
||||
/**
|
||||
* @brief Register a callback to be called on the freertos idle hook
|
||||
* The callback should return true if it's okay for the core to
|
||||
* sleep until an interrupt (or FreeRTOS tick) happens and false
|
||||
* if it should be called again as fast as possible.
|
||||
* @brief Register a callback to be called from the specified core's idle hook.
|
||||
* The callback should return true if it should be called by the idle hook
|
||||
* once per interrupt (or FreeRTOS tick), and return false if it should
|
||||
* be called repeatedly as fast as possible by the idle hook.
|
||||
*
|
||||
* @warning Idle callbacks MUST NOT, UNDER ANY CIRCUMSTANCES, CALL
|
||||
* @warning Idle callbacks MUST NOT, UNDER ANY CIRCUMSTANCES, CALL
|
||||
* A FUNCTION THAT MIGHT BLOCK.
|
||||
*
|
||||
* @param esp_freertos_idle_cb_t new_idle_cb : Callback to be called
|
||||
* @param UBaseType_t cpuid : id of the core
|
||||
*
|
||||
* @return ESP_OK : Callback registered to the specified core's idle hook
|
||||
* @return ESP_ERR_NO_MEM : No more space on the specified core's idle hook to register callback
|
||||
* @return ESP_ERR_INVALID_ARG : cpuid is invalid
|
||||
*/
|
||||
esp_err_t esp_register_freertos_idle_hook_for_cpu(esp_freertos_idle_cb_t new_idle_cb, UBaseType_t cpuid);
|
||||
|
||||
/**
|
||||
* @brief Register a callback to the idle hook of the core that calls this function.
|
||||
* The callback should return true if it should be called by the idle hook
|
||||
* once per interrupt (or FreeRTOS tick), and return false if it should
|
||||
* be called repeatedly as fast as possible by the idle hook.
|
||||
*
|
||||
* @warning Idle callbacks MUST NOT, UNDER ANY CIRCUMSTANCES, CALL
|
||||
* A FUNCTION THAT MIGHT BLOCK.
|
||||
*
|
||||
* @param esp_freertos_idle_cb_t new_idle_cb : Callback to be called
|
||||
*
|
||||
* @return ESP_OK : Callback registered
|
||||
* @return ESP_ERR_NO_MEM : No more space to register hook
|
||||
* @return ESP_OK : Callback registered to the calling core's idle hook
|
||||
* @return ESP_ERR_NO_MEM : No more space the calling core's idle hook to register callback
|
||||
*/
|
||||
esp_err_t esp_register_freertos_idle_hook(esp_freertos_idle_cb_t new_idle_cb);
|
||||
|
||||
/**
|
||||
* @brief Register a callback to be called on the freertos tick hook
|
||||
* @brief Register a callback to be called from the specified core's tick hook.
|
||||
*
|
||||
* @param esp_freertos_tick_cb_t new_tick_cb : Callback to be called
|
||||
* @param UBaseType_t cpuid : id of the core
|
||||
*
|
||||
* @return ESP_OK : Callback registered
|
||||
* @return ESP_ERR_NO_MEM : No more space on the specified core's tick hook to register the callback
|
||||
* @return ESP_ERR_INVALID_ARG : cpuid is invalid
|
||||
*/
|
||||
esp_err_t esp_register_freertos_tick_hook_for_cpu(esp_freertos_tick_cb_t new_tick_cb, UBaseType_t cpuid);
|
||||
|
||||
/**
|
||||
* @brief Register a callback to be called from the calling core's tick hook.
|
||||
*
|
||||
* @param esp_freertos_tick_cb_t new_tick_cb : Callback to be called
|
||||
*
|
||||
* @return ESP_OK : Callback registered
|
||||
* @return ESP_ERR_NO_MEM : No more space to register hook
|
||||
* @return ESP_ERR_NO_MEM : No more space on the calling core's tick hook to register the callback
|
||||
*/
|
||||
esp_err_t esp_register_freertos_tick_hook(esp_freertos_tick_cb_t tick_cb);
|
||||
esp_err_t esp_register_freertos_tick_hook(esp_freertos_tick_cb_t new_tick_cb);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Unregister an idle callback registered earlier
|
||||
* @brief Unregister an idle callback. If the idle callback is registered to
|
||||
* the idle hooks of both cores, the idle hook will be unregistered from
|
||||
* both cores
|
||||
*
|
||||
* @param esp_freertos_idle_cb_t new_idle_cb : Callback to be unregistered
|
||||
*
|
||||
@ -67,7 +99,9 @@ void esp_deregister_freertos_idle_hook(esp_freertos_idle_cb_t old_idle_cb);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Unregister a tick callback registered earlier
|
||||
* @brief Unregister a tick callback. If the tick callback is registered to the
|
||||
* tick hooks of both cores, the tick hook will be unregistered from
|
||||
* both cores
|
||||
*
|
||||
* @param esp_freertos_idle_cb_t new_idle_cb : Callback to be unregistered
|
||||
*
|
||||
@ -80,4 +114,4 @@ void esp_deregister_freertos_tick_hook(esp_freertos_tick_cb_t old_tick_cb);
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
@ -30,112 +30,7 @@ extern "C" {
|
||||
* @brief Structure holding PHY init parameters
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t param_ver_id; /*!< init_data structure version */
|
||||
uint8_t crystal_select; /*!< 0: 40MHz, 1: 26 MHz, 2: 24 MHz, 3: auto */
|
||||
uint8_t wifi_rx_gain_swp_step_1; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_2; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_3; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_4; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_5; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_6; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_7; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_8; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_9; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_10; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_11; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_12; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_13; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_14; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_15; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_1; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_2; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_3; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_4; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_5; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_6; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_7; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_8; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_9; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_10; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_11; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_12; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_13; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_14; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_15; /*!< do not change */
|
||||
uint8_t gain_cmp_1; /*!< do not change */
|
||||
uint8_t gain_cmp_6; /*!< do not change */
|
||||
uint8_t gain_cmp_11; /*!< do not change */
|
||||
uint8_t gain_cmp_ext2_1; /*!< do not change */
|
||||
uint8_t gain_cmp_ext2_6; /*!< do not change */
|
||||
uint8_t gain_cmp_ext2_11; /*!< do not change */
|
||||
uint8_t gain_cmp_ext3_1; /*!< do not change */
|
||||
uint8_t gain_cmp_ext3_6; /*!< do not change */
|
||||
uint8_t gain_cmp_ext3_11; /*!< do not change */
|
||||
uint8_t gain_cmp_bt_ofs_1; /*!< do not change */
|
||||
uint8_t gain_cmp_bt_ofs_6; /*!< do not change */
|
||||
uint8_t gain_cmp_bt_ofs_11; /*!< do not change */
|
||||
uint8_t target_power_qdb_0; /*!< 78 means target power is 78/4=19.5dbm */
|
||||
uint8_t target_power_qdb_1; /*!< 76 means target power is 76/4=19dbm */
|
||||
uint8_t target_power_qdb_2; /*!< 74 means target power is 74/4=18.5dbm */
|
||||
uint8_t target_power_qdb_3; /*!< 68 means target power is 68/4=17dbm */
|
||||
uint8_t target_power_qdb_4; /*!< 64 means target power is 64/4=16dbm */
|
||||
uint8_t target_power_qdb_5; /*!< 52 means target power is 52/4=13dbm */
|
||||
uint8_t target_power_index_mcs0; /*!< target power index is 0, means target power is target_power_qdb_0 19.5dbm; (1m,2m,5.5m,11m,6m,9m) */
|
||||
uint8_t target_power_index_mcs1; /*!< target power index is 0, means target power is target_power_qdb_0 19.5dbm; (12m) */
|
||||
uint8_t target_power_index_mcs2; /*!< target power index is 1, means target power is target_power_qdb_1 19dbm; (18m) */
|
||||
uint8_t target_power_index_mcs3; /*!< target power index is 1, means target power is target_power_qdb_1 19dbm; (24m) */
|
||||
uint8_t target_power_index_mcs4; /*!< target power index is 2, means target power is target_power_qdb_2 18.5dbm; (36m) */
|
||||
uint8_t target_power_index_mcs5; /*!< target power index is 3, means target power is target_power_qdb_3 17dbm; (48m) */
|
||||
uint8_t target_power_index_mcs6; /*!< target power index is 4, means target power is target_power_qdb_4 16dbm; (54m) */
|
||||
uint8_t target_power_index_mcs7; /*!< target power index is 5, means target power is target_power_qdb_5 13dbm */
|
||||
uint8_t pwr_ind_11b_en; /*!< 0: 11b power is same as mcs0 and 6m, 1: 11b power different with OFDM */
|
||||
uint8_t pwr_ind_11b_0; /*!< 1m, 2m power index [0~5] */
|
||||
uint8_t pwr_ind_11b_1; /*!< 5.5m, 11m power index [0~5] */
|
||||
uint8_t chan_backoff_en; /*!< 0: channel backoff disable, 1:channel backoff enable */
|
||||
uint8_t chan1_power_backoff_qdb; /*!< 4 means backoff is 1db */
|
||||
uint8_t chan2_power_backoff_qdb; /*!< see chan1_power_backoff_qdb */
|
||||
uint8_t chan3_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan4_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan5_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan6_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan7_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan8_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan9_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan10_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan11_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan12_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan13_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan14_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan1_rate_backoff_index; /*!< if bit i is set, backoff data rate is target_power_qdb_i */
|
||||
uint8_t chan2_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan3_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan4_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan5_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan6_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan7_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan8_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan9_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan10_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan11_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan12_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan13_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan14_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t spur_freq_cfg_msb_1; /*!< first spur: */
|
||||
uint8_t spur_freq_cfg_1; /*!< spur_freq_cfg = (spur_freq_cfg_msb_1 <<8) | spur_freq_cfg_1 */
|
||||
uint8_t spur_freq_cfg_div_1; /*!< spur_freq=spur_freq_cfg/spur_freq_cfg_div_1 */
|
||||
uint8_t spur_freq_en_h_1; /*!< the seventh bit for total enable */
|
||||
uint8_t spur_freq_en_l_1; /*!< each bit for 1 channel, and use [spur_freq_en_h, spur_freq_en_l] to select the spur's channel priority */
|
||||
uint8_t spur_freq_cfg_msb_2; /*!< second spur: */
|
||||
uint8_t spur_freq_cfg_2; /*!< spur_freq_cfg = (spur_freq_cfg_msb_2 <<8) | spur_freq_cfg_2 */
|
||||
uint8_t spur_freq_cfg_div_2; /*!< spur_freq=spur_freq_cfg/spur_freq_cfg_div_2 */
|
||||
uint8_t spur_freq_en_h_2; /*!< the seventh bit for total enable */
|
||||
uint8_t spur_freq_en_l_2; /*!< each bit for 1 channel, and use [spur_freq_en_h, spur_freq_en_l] to select the spur's channel priority */
|
||||
uint8_t spur_freq_cfg_msb_3; /*!< third spur: */
|
||||
uint8_t spur_freq_cfg_3; /*!< spur_freq_cfg = (spur_freq_cfg_msb_3 <<8) | spur_freq_cfg_3 */
|
||||
uint8_t spur_freq_cfg_div_3; /*!< spur_freq=spur_freq_cfg/spur_freq_cfg_div_3 */
|
||||
uint8_t spur_freq_en_h_3; /*!< the seventh bit for total enable */
|
||||
uint8_t spur_freq_en_l_3; /*!< each bit for 1 channel, and use [spur_freq_en_h, spur_freq_en_l] to select the spur's channel priority, */
|
||||
uint8_t reserved[23]; /*!< reserved for future expansion */
|
||||
uint8_t params[128]; /*!< opaque PHY initialization parameters */
|
||||
} esp_phy_init_data_t;
|
||||
|
||||
/**
|
||||
|
@ -181,14 +181,14 @@ extern const wpa_crypto_funcs_t g_wifi_default_wpa_crypto_funcs;
|
||||
* which are set by WIFI_INIT_CONFIG_DEFAULT, please be notified that the field 'magic' of
|
||||
* wifi_init_config_t should always be WIFI_INIT_CONFIG_MAGIC!
|
||||
*
|
||||
* @param config provide WiFi init configuration
|
||||
* @param config pointer to WiFi init configuration structure; can point to a temporary variable.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK: succeed
|
||||
* - ESP_ERR_WIFI_NO_MEM: out of memory
|
||||
* - others: refer to error code esp_err.h
|
||||
*/
|
||||
esp_err_t esp_wifi_init(wifi_init_config_t *config);
|
||||
esp_err_t esp_wifi_init(const wifi_init_config_t *config);
|
||||
|
||||
/**
|
||||
* @brief Deinit WiFi
|
||||
@ -341,7 +341,7 @@ esp_err_t esp_wifi_deauth_sta(uint16_t aid);
|
||||
* - ESP_ERR_WIFI_TIMEOUT: blocking scan is timeout
|
||||
* - others: refer to error code in esp_err.h
|
||||
*/
|
||||
esp_err_t esp_wifi_scan_start(wifi_scan_config_t *config, bool block);
|
||||
esp_err_t esp_wifi_scan_start(const wifi_scan_config_t *config, bool block);
|
||||
|
||||
/**
|
||||
* @brief Stop the scan in process
|
||||
@ -539,7 +539,7 @@ esp_err_t esp_wifi_get_channel(uint8_t *primary, wifi_second_chan_t *second);
|
||||
* - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
|
||||
* - ESP_ERR_WIFI_ARG: invalid argument
|
||||
*/
|
||||
esp_err_t esp_wifi_set_country(wifi_country_t *country);
|
||||
esp_err_t esp_wifi_set_country(const wifi_country_t *country);
|
||||
|
||||
/**
|
||||
* @brief get the current country info
|
||||
@ -574,7 +574,7 @@ esp_err_t esp_wifi_get_country(wifi_country_t *country);
|
||||
* - ESP_ERR_WIFI_MODE: WiFi mode is wrong
|
||||
* - others: refer to error codes in esp_err.h
|
||||
*/
|
||||
esp_err_t esp_wifi_set_mac(wifi_interface_t ifx, uint8_t mac[6]);
|
||||
esp_err_t esp_wifi_set_mac(wifi_interface_t ifx, const uint8_t mac[6]);
|
||||
|
||||
/**
|
||||
* @brief Get mac of specified interface
|
||||
@ -682,7 +682,7 @@ esp_err_t esp_wifi_get_promiscuous_filter(wifi_promiscuous_filter_t *filter);
|
||||
* - ESP_ERR_WIFI_NVS: WiFi internal NVS error
|
||||
* - others: refer to the erro code in esp_err.h
|
||||
*/
|
||||
esp_err_t esp_wifi_set_config(wifi_interface_t ifx, wifi_config_t *conf);
|
||||
esp_err_t esp_wifi_set_config(wifi_interface_t ifx, const wifi_config_t *conf);
|
||||
|
||||
/**
|
||||
* @brief Get configuration of specified interface
|
||||
|
@ -58,7 +58,7 @@ extern "C" {
|
||||
* - ESP_ERR_WIFI_NO_MEM: out of memory
|
||||
* - others: refer to error code esp_err.h
|
||||
*/
|
||||
esp_err_t esp_wifi_init_internal(wifi_init_config_t *config);
|
||||
esp_err_t esp_wifi_init_internal(const wifi_init_config_t *config);
|
||||
|
||||
/**
|
||||
* @brief get whether the wifi driver is allowed to transmit data or not
|
||||
@ -121,6 +121,41 @@ esp_err_t esp_wifi_internal_reg_rxcb(wifi_interface_t ifx, wifi_rxcb_t fn);
|
||||
*/
|
||||
esp_err_t esp_wifi_internal_set_sta_ip(void);
|
||||
|
||||
/**
|
||||
* @brief Allocate a chunk of memory for WiFi driver
|
||||
*
|
||||
* @attention This API is not used for DMA memory allocation.
|
||||
*
|
||||
* @param size_t size : Size, in bytes, of the amount of memory to allocate
|
||||
*
|
||||
* @return A pointer to the memory allocated on success, NULL on failure
|
||||
*/
|
||||
void *wifi_malloc( size_t size );
|
||||
|
||||
/**
|
||||
* @brief Reallocate a chunk of memory for WiFi driver
|
||||
*
|
||||
* @attention This API is not used for DMA memory allocation.
|
||||
*
|
||||
* @param void * ptr : Pointer to previously allocated memory, or NULL for a new allocation.
|
||||
* @param size_t size : Size, in bytes, of the amount of memory to allocate
|
||||
*
|
||||
* @return A pointer to the memory allocated on success, NULL on failure
|
||||
*/
|
||||
void *wifi_realloc( void *ptr, size_t size );
|
||||
|
||||
/**
|
||||
* @brief Callocate memory for WiFi driver
|
||||
*
|
||||
* @attention This API is not used for DMA memory allocation.
|
||||
*
|
||||
* @param size_t n : Number of continuing chunks of memory to allocate
|
||||
* @param size_t size : Size, in bytes, of the amount of memory to allocate
|
||||
*
|
||||
* @return A pointer to the memory allocated on success, NULL on failure
|
||||
*/
|
||||
void *wifi_calloc( size_t n, size_t size );
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
@ -162,6 +162,11 @@ typedef enum {
|
||||
WIFI_CONNECT_AP_BY_SECURITY, /**< Sort match AP in scan list by security mode */
|
||||
}wifi_sort_method_t;
|
||||
|
||||
typedef struct {
|
||||
int8_t rssi; /**< The minimum rssi to accept in the fast scan mode */
|
||||
wifi_auth_mode_t authmode; /**< The weakest authmode to accept in the fast scan mode */
|
||||
}wifi_fast_scan_threshold_t;
|
||||
|
||||
typedef enum {
|
||||
WIFI_PS_NONE, /**< No power save */
|
||||
WIFI_PS_MODEM, /**< Modem power save */
|
||||
@ -196,6 +201,7 @@ typedef struct {
|
||||
uint8_t bssid[6]; /**< MAC address of target AP*/
|
||||
uint8_t channel; /**< channel of target AP. Set to 1~13 to scan starting from the specified channel before connecting to AP. If the channel of AP is unknown, set it to 0.*/
|
||||
wifi_sort_method_t sort_method; /**< sort the connect AP in the list by rssi or security mode */
|
||||
wifi_fast_scan_threshold_t threshold; /**< When scan_method is set to WIFI_FAST_SCAN, only APs which have an auth mode that is more secure than the selected auth mode and a signal stronger than the minimum RSSI will be used. */
|
||||
} wifi_sta_config_t;
|
||||
|
||||
typedef union {
|
||||
|
@ -68,7 +68,7 @@ esp_err_t esp_wifi_sta_wpa2_ent_disable(void);
|
||||
* - ESP_ERR_WIFI_ARG: fail(len <= 0 or len >= 128)
|
||||
* - ESP_ERR_WIFI_NO_MEM: fail(internal memory malloc fail)
|
||||
*/
|
||||
esp_err_t esp_wifi_sta_wpa2_ent_set_identity(unsigned char *identity, int len);
|
||||
esp_err_t esp_wifi_sta_wpa2_ent_set_identity(const unsigned char *identity, int len);
|
||||
|
||||
/**
|
||||
* @brief Clear identity for PEAP/TTLS method.
|
||||
@ -88,7 +88,7 @@ void esp_wifi_sta_wpa2_ent_clear_identity(void);
|
||||
* - ESP_ERR_WIFI_ARG: fail(len <= 0 or len >= 128)
|
||||
* - ESP_ERR_WIFI_NO_MEM: fail(internal memory malloc fail)
|
||||
*/
|
||||
esp_err_t esp_wifi_sta_wpa2_ent_set_username(unsigned char *username, int len);
|
||||
esp_err_t esp_wifi_sta_wpa2_ent_set_username(const unsigned char *username, int len);
|
||||
|
||||
/**
|
||||
* @brief Clear username for PEAP/TTLS method.
|
||||
@ -108,7 +108,7 @@ void esp_wifi_sta_wpa2_ent_clear_username(void);
|
||||
* - ESP_ERR_WIFI_ARG: fail(len <= 0)
|
||||
* - ESP_ERR_WIFI_NO_MEM: fail(internal memory malloc fail)
|
||||
*/
|
||||
esp_err_t esp_wifi_sta_wpa2_ent_set_password(unsigned char *password, int len);
|
||||
esp_err_t esp_wifi_sta_wpa2_ent_set_password(const unsigned char *password, int len);
|
||||
|
||||
/**
|
||||
* @brief Clear password for PEAP/TTLS method..
|
||||
@ -130,7 +130,7 @@ void esp_wifi_sta_wpa2_ent_clear_password(void);
|
||||
* - ESP_ERR_WIFI_NO_MEM: fail(internal memory malloc fail)
|
||||
*/
|
||||
|
||||
esp_err_t esp_wifi_sta_wpa2_ent_set_new_password(unsigned char *password, int len);
|
||||
esp_err_t esp_wifi_sta_wpa2_ent_set_new_password(const unsigned char *password, int len);
|
||||
|
||||
/**
|
||||
* @brief Clear new password for MSCHAPv2 method..
|
||||
@ -149,7 +149,7 @@ void esp_wifi_sta_wpa2_ent_clear_new_password(void);
|
||||
* @return
|
||||
* - ESP_ERR_WIFI_OK: succeed
|
||||
*/
|
||||
esp_err_t esp_wifi_sta_wpa2_ent_set_ca_cert(unsigned char *ca_cert, int len);
|
||||
esp_err_t esp_wifi_sta_wpa2_ent_set_ca_cert(const unsigned char *ca_cert, int len);
|
||||
|
||||
/**
|
||||
* @brief Clear CA certificate for PEAP/TTLS method.
|
||||
@ -172,7 +172,7 @@ void esp_wifi_sta_wpa2_ent_clear_ca_cert(void);
|
||||
* @return
|
||||
* - ESP_ERR_WIFI_OK: succeed
|
||||
*/
|
||||
esp_err_t esp_wifi_sta_wpa2_ent_set_cert_key(unsigned char *client_cert, int client_cert_len, unsigned char *private_key, int private_key_len, unsigned char *private_key_passwd, int private_key_passwd_len);
|
||||
esp_err_t esp_wifi_sta_wpa2_ent_set_cert_key(const unsigned char *client_cert, int client_cert_len, const unsigned char *private_key, int private_key_len, const unsigned char *private_key_passwd, int private_key_passwd_len);
|
||||
|
||||
/**
|
||||
* @brief Clear client certificate and key.
|
||||
|
@ -126,9 +126,6 @@ typedef unsigned portBASE_TYPE UBaseType_t;
|
||||
#include "sdkconfig.h"
|
||||
#include "esp_attr.h"
|
||||
|
||||
#define portFIRST_TASK_HOOK CONFIG_FREERTOS_BREAK_ON_SCHEDULER_START_JTAG
|
||||
|
||||
|
||||
typedef struct {
|
||||
uint32_t owner;
|
||||
uint32_t count;
|
||||
|
@ -81,6 +81,21 @@ void heap_caps_free( void *ptr);
|
||||
*/
|
||||
void *heap_caps_realloc( void *ptr, size_t size, int caps);
|
||||
|
||||
/**
|
||||
* @brief Allocate a chunk of memory which has the given capabilities. The initialized value in the memory is set to zero.
|
||||
*
|
||||
* Equivalent semantics to libc calloc(), for capability-aware memory.
|
||||
*
|
||||
* In IDF, ``calloc(p)`` is equivalent to ``heaps_caps_calloc(p, MALLOC_CAP_8BIT)``.
|
||||
*
|
||||
* @param n Number of continuing chunks of memory to allocate
|
||||
* @param size Size, in bytes, of a chunk of memory to allocate
|
||||
* @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type
|
||||
* of memory to be returned
|
||||
*
|
||||
* @return A pointer to the memory allocated on success, NULL on failure
|
||||
*/
|
||||
void *heap_caps_calloc(size_t n, size_t size, uint32_t caps);
|
||||
|
||||
/**
|
||||
* @brief Get the total free size of all the regions that have the given capabilities
|
||||
@ -148,7 +163,7 @@ void heap_caps_get_info( multi_heap_info_t *info, uint32_t caps );
|
||||
/**
|
||||
* @brief Print a summary of all memory with the given capabilities.
|
||||
*
|
||||
* Calls multi_heap_info() on all heaps which share the given capabilities, and
|
||||
* Calls multi_heap_info on all heaps which share the given capabilities, and
|
||||
* prints a two-line summary for each, then a total summary.
|
||||
*
|
||||
* @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type
|
||||
@ -157,14 +172,29 @@ void heap_caps_get_info( multi_heap_info_t *info, uint32_t caps );
|
||||
*/
|
||||
void heap_caps_print_heap_info( uint32_t caps );
|
||||
|
||||
/**
|
||||
* @brief Check integrity of all heap memory in the system.
|
||||
*
|
||||
* Calls multi_heap_check on all heaps. Optionally print errors if heaps are corrupt.
|
||||
*
|
||||
* Calling this function is equivalent to calling heap_caps_check_integrity
|
||||
* with the caps argument set to MALLOC_CAP_INVALID.
|
||||
*
|
||||
* @param print_errors Print specific errors if heap corruption is found.
|
||||
*
|
||||
* @return True if all heaps are valid, False if at least one heap is corrupt.
|
||||
*/
|
||||
bool heap_caps_check_integrity_all(bool print_errors);
|
||||
|
||||
/**
|
||||
* @brief Check integrity of all heaps with the given capabilities.
|
||||
*
|
||||
* Calls multi_heap_check() on all heaps which share the given capabilities. Optionally
|
||||
* Calls multi_heap_check on all heaps which share the given capabilities. Optionally
|
||||
* print errors if the heaps are corrupt.
|
||||
*
|
||||
* Call ``heap_caps_check_integrity(MALLOC_CAP_INVALID, print_errors)`` to check
|
||||
* all regions' heaps.
|
||||
* See also heap_caps_check_integrity_all to check all heap memory
|
||||
* in the system and heap_caps_check_integrity_addr to check memory
|
||||
* around a single address.
|
||||
*
|
||||
* @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type
|
||||
* of memory
|
||||
@ -174,7 +204,28 @@ void heap_caps_print_heap_info( uint32_t caps );
|
||||
*/
|
||||
bool heap_caps_check_integrity(uint32_t caps, bool print_errors);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Check integrity of heap memory around a given address.
|
||||
*
|
||||
* This function can be used to check the integrity of a single region of heap memory,
|
||||
* which contains the given address.
|
||||
*
|
||||
* This can be useful if debugging heap integrity for corruption at a known address,
|
||||
* as it has a lower overhead than checking all heap regions. Note that if the corrupt
|
||||
* address moves around between runs (due to timing or other factors) then this approach
|
||||
* won't work and you should call heap_caps_check_integrity or
|
||||
* heap_caps_check_integrity_all instead.
|
||||
*
|
||||
* @note The entire heap region around the address is checked, not only the adjacent
|
||||
* heap blocks.
|
||||
*
|
||||
* @param addr Address in memory. Check for corruption in region containing this address.
|
||||
* @param print_errors Print specific errors if heap corruption is found.
|
||||
*
|
||||
* @return True if the heap containing the specified address is valid,
|
||||
* False if at least one heap is corrupt or the address doesn't belong to a heap region.
|
||||
*/
|
||||
bool heap_caps_check_integrity_addr(intptr_t addr, bool print_errors);
|
||||
|
||||
/**
|
||||
* @brief Enable malloc() in external memory and set limit below which
|
||||
@ -188,3 +239,40 @@ bool heap_caps_check_integrity(uint32_t caps, bool print_errors);
|
||||
* @param limit Limit, in bytes.
|
||||
*/
|
||||
void heap_caps_malloc_extmem_enable(size_t limit);
|
||||
|
||||
/**
|
||||
* @brief Allocate a chunk of memory as preference in decreasing order.
|
||||
*
|
||||
* @attention The variable parameters are bitwise OR of MALLOC_CAP_* flags indicating the type of memory.
|
||||
* This API prefers to allocate memory with the first parameter. If failed, allocate memory with
|
||||
* the next parameter. It will try in this order until allocating a chunk of memory successfully
|
||||
* or fail to allocate memories with any of the parameters.
|
||||
*
|
||||
* @param size Size, in bytes, of the amount of memory to allocate
|
||||
* @param num Number of variable paramters
|
||||
*
|
||||
* @return A pointer to the memory allocated on success, NULL on failure
|
||||
*/
|
||||
void *heap_caps_malloc_prefer( size_t size, size_t num, ... );
|
||||
|
||||
/**
|
||||
* @brief Allocate a chunk of memory as preference in decreasing order.
|
||||
*
|
||||
* @param ptr Pointer to previously allocated memory, or NULL for a new allocation.
|
||||
* @param size Size of the new buffer requested, or 0 to free the buffer.
|
||||
* @param num Number of variable paramters
|
||||
*
|
||||
* @return Pointer to a new buffer of size 'size', or NULL if allocation failed.
|
||||
*/
|
||||
void *heap_caps_realloc_prefer( void *ptr, size_t size, size_t num, ... );
|
||||
|
||||
/**
|
||||
* @brief Allocate a chunk of memory as preference in decreasing order.
|
||||
*
|
||||
* @param n Number of continuing chunks of memory to allocate
|
||||
* @param size Size, in bytes, of a chunk of memory to allocate
|
||||
* @param num Number of variable paramters
|
||||
*
|
||||
* @return A pointer to the memory allocated on success, NULL on failure
|
||||
*/
|
||||
void *heap_caps_calloc_prefer( size_t n, size_t size, size_t num, ... );
|
||||
|
@ -134,7 +134,7 @@ size_t multi_heap_free_size(multi_heap_handle_t heap);
|
||||
|
||||
/** @brief Return the lifetime minimum free heap size
|
||||
*
|
||||
* Equivalent to the minimum_free_bytes member returned by multi_get_heap_info().
|
||||
* Equivalent to the minimum_free_bytes member returned by multi_heap_get_info().
|
||||
*
|
||||
* Returns the lifetime "low water mark" of possible values returned from multi_free_heap_size(), for the specified
|
||||
* heap.
|
||||
@ -144,7 +144,7 @@ size_t multi_heap_free_size(multi_heap_handle_t heap);
|
||||
*/
|
||||
size_t multi_heap_minimum_free_size(multi_heap_handle_t heap);
|
||||
|
||||
/** @brief Structure to access heap metadata via multi_get_heap_info */
|
||||
/** @brief Structure to access heap metadata via multi_heap_get_info */
|
||||
typedef struct {
|
||||
size_t total_free_bytes; ///< Total free bytes in the heap. Equivalent to multi_free_heap_size().
|
||||
size_t total_allocated_bytes; ///< Total bytes allocated to data in the heap.
|
||||
|
@ -68,13 +68,8 @@ extern "C" {
|
||||
#define ANNOUNCE_NUM 2 /* (number of announcement packets) */
|
||||
#define ANNOUNCE_INTERVAL 2 /* seconds (time between announcement packets) */
|
||||
#define ANNOUNCE_WAIT 2 /* seconds (delay before announcing) */
|
||||
#if CONFIG_MDNS
|
||||
#define MAX_CONFLICTS 9 /* (max conflicts before rate limiting) */
|
||||
#define RATE_LIMIT_INTERVAL 20 /* seconds (delay between successive attempts) */
|
||||
#else
|
||||
#define MAX_CONFLICTS 10 /* (max conflicts before rate limiting) */
|
||||
#define RATE_LIMIT_INTERVAL 60 /* seconds (delay between successive attempts) */
|
||||
#endif
|
||||
#define MAX_CONFLICTS LWIP_AUTOIP_MAX_CONFLICTS /* (max conflicts before rate limiting) */
|
||||
#define RATE_LIMIT_INTERVAL LWIP_AUTOIP_RATE_LIMIT_INTERVAL /* seconds (delay between successive attempts) */
|
||||
#define DEFEND_INTERVAL 10 /* seconds (min. wait between defensive ARPs) */
|
||||
|
||||
/* AutoIP client states */
|
||||
|
@ -69,6 +69,10 @@ extern const ip_addr_t ip_addr_any_type;
|
||||
|
||||
#define IP_IS_V6_VAL(ipaddr) (IP_GET_TYPE(&ipaddr) == IPADDR_TYPE_V6)
|
||||
#define IP_IS_V6(ipaddr) (((ipaddr) != NULL) && IP_IS_V6_VAL(*(ipaddr)))
|
||||
|
||||
#define IP_V6_EQ_PART(ipaddr, WORD, VAL) (ip_2_ip6(ipaddr)->addr[WORD] == htonl(VAL))
|
||||
#define IP_IS_V4MAPPEDV6(ipaddr) (IP_IS_V6(ipaddr) && IP_V6_EQ_PART(ipaddr, 0, 0) && IP_V6_EQ_PART(ipaddr, 1, 0) && IP_V6_EQ_PART(ipaddr, 2, 0x0000FFFF))
|
||||
|
||||
#define IP_SET_TYPE_VAL(ipaddr, iptype) do { (ipaddr).type = (iptype); }while(0)
|
||||
#define IP_SET_TYPE(ipaddr, iptype) do { if((ipaddr) != NULL) { IP_SET_TYPE_VAL(*(ipaddr), iptype); }}while(0)
|
||||
#define IP_GET_TYPE(ipaddr) ((ipaddr)->type)
|
||||
@ -156,6 +160,27 @@ extern const ip_addr_t ip_addr_any_type;
|
||||
((IP_IS_V6(addr)) ? ip6addr_ntoa_r(ip_2_ip6(addr), buf, buflen) : ip4addr_ntoa_r(ip_2_ip4(addr), buf, buflen)))
|
||||
int ipaddr_aton(const char *cp, ip_addr_t *addr);
|
||||
|
||||
/* Map an IPv4 ip_addr into an IPV6 ip_addr, using format
|
||||
defined in RFC4291 2.5.5.2.
|
||||
|
||||
Safe to call when dest==src.
|
||||
*/
|
||||
#define ip_addr_make_ip4_mapped_ip6(dest, src) do { \
|
||||
u32_t tmp = ip_2_ip4(src)->addr; \
|
||||
IP_ADDR6((dest), 0x0, 0x0, htonl(0x0000FFFF), tmp); \
|
||||
} while(0)
|
||||
|
||||
/* Convert an IPv4 mapped V6 address to an IPV4 address.
|
||||
|
||||
Check IP_IS_V4MAPPEDV6(src) before using this.
|
||||
|
||||
Safe to call when dest == src.
|
||||
*/
|
||||
#define ip_addr_ip4_from_mapped_ip6(dest, src) do { \
|
||||
ip_2_ip4(dest)->addr = ip_2_ip6(src)->addr[3]; \
|
||||
IP_SET_TYPE(dest, IPADDR_TYPE_V4); \
|
||||
} while(0)
|
||||
|
||||
#else /* LWIP_IPV4 && LWIP_IPV6 */
|
||||
|
||||
#define IP_ADDR_PCB_VERSION_MATCH(addr, pcb) 1
|
||||
|
@ -54,12 +54,26 @@ typedef size_t mem_size_t;
|
||||
#ifndef mem_free
|
||||
#define mem_free free
|
||||
#endif
|
||||
/**
|
||||
* lwip_malloc: if CONFIG_ALLOC_MEMORY_IN_SPIRAM_FIRST is enabled, Try to
|
||||
* allocate memory for lwip in SPIRAM firstly. If failed, try to allocate
|
||||
* internal memory then.
|
||||
*/
|
||||
#if CONFIG_WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST
|
||||
#ifndef mem_malloc
|
||||
#define mem_malloc(size) heap_caps_malloc_prefer(size, 2, MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL)
|
||||
#endif
|
||||
#ifndef mem_calloc
|
||||
#define mem_calloc(n, size) heap_caps_calloc_prefer(n, size, 2, MALLOC_CAP_DEFAULT|MALLOC_CAP_SPIRAM, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL)
|
||||
#endif
|
||||
#else
|
||||
#ifndef mem_malloc
|
||||
#define mem_malloc malloc
|
||||
#endif
|
||||
#ifndef mem_calloc
|
||||
#define mem_calloc calloc
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* Since there is no C library allocation function to shrink memory without
|
||||
moving it, define this to nothing. */
|
||||
|
@ -823,6 +823,22 @@
|
||||
#define LWIP_DHCP_AUTOIP_COOP_TRIES 9
|
||||
#endif
|
||||
|
||||
/**
|
||||
* LWIP_AUTOIP_MAX_CONFLICTS:
|
||||
* Maximum number of AutoIP IP conflicts before rate limiting is enabled.
|
||||
*/
|
||||
#ifndef LWIP_AUTOIP_MAX_CONFLICTS
|
||||
#define LWIP_AUTOIP_MAX_CONFLICTS 10
|
||||
#endif
|
||||
|
||||
/**
|
||||
* LWIP_AUTOIP_RATE_LIMIT_INTERVAL:
|
||||
* Rate limited request interval, in seconds.
|
||||
*/
|
||||
#ifndef LWIP_AUTOIP_RATE_LIMIT_INTERVAL
|
||||
#define LWIP_AUTOIP_RATE_LIMIT_INTERVAL 60
|
||||
#endif
|
||||
|
||||
/*
|
||||
----------------------------------
|
||||
----- SNMP MIB2 support -----
|
||||
|
@ -262,6 +262,27 @@ struct linger {
|
||||
*/
|
||||
#define IPV6_CHECKSUM 7 /* RFC3542: calculate and insert the ICMPv6 checksum for raw sockets. */
|
||||
#define IPV6_V6ONLY 27 /* RFC3493: boolean control to restrict AF_INET6 sockets to IPv6 communications only. */
|
||||
|
||||
#if LWIP_IPV6_MLD
|
||||
/* Socket options for IPV6 multicast, uses the MLD interface to manage group memberships. RFC2133. */
|
||||
#define IPV6_MULTICAST_IF 0x300
|
||||
#define IPV6_MULTICAST_HOPS 0x301
|
||||
#define IPV6_MULTICAST_LOOP 0x302
|
||||
#define IPV6_ADD_MEMBERSHIP 0x303
|
||||
#define IPV6_DROP_MEMBERSHIP 0x304
|
||||
|
||||
/* Structure used for IPV6_ADD/DROP_MEMBERSHIP */
|
||||
typedef struct ip6_mreq {
|
||||
struct in6_addr ipv6mr_multiaddr; /* IPv6 multicast addr */
|
||||
struct in6_addr ipv6mr_interface; /* local IP address of interface */
|
||||
} ip6_mreq;
|
||||
|
||||
/* Commonly used synonyms for these options */
|
||||
#define IPV6_JOIN_GROUP IPV6_ADD_MEMBERSHIP
|
||||
#define IPV6_LEAVE_GROUP IPV6_DROP_MEMBERSHIP
|
||||
|
||||
#endif /* LWIP_IPV6_MLD */
|
||||
|
||||
#endif /* LWIP_IPV6 */
|
||||
|
||||
#if LWIP_UDP && LWIP_UDPLITE
|
||||
|
@ -173,6 +173,12 @@ void udp_init (void);
|
||||
#define udp_get_multicast_netif_addr(pcb) ip_2_ip4(&(pcb)->multicast_ip)
|
||||
#define udp_set_multicast_ttl(pcb, value) do { (pcb)->mcast_ttl = value; } while(0)
|
||||
#define udp_get_multicast_ttl(pcb) ((pcb)->mcast_ttl)
|
||||
|
||||
#if LWIP_IPV6_MLD
|
||||
#define udp_set_multicast_netif_ip6addr(pcb, ip6addr) ip_addr_copy_from_ip6((pcb)->multicast_ip, *(ip6addr))
|
||||
#define udp_get_multicast_netif_ip6addr(pcb) ip_2_ip6(&(pcb)->multicast_ip)
|
||||
#endif
|
||||
|
||||
#endif /* LWIP_MULTICAST_TX_OPTIONS */
|
||||
|
||||
#if UDP_DEBUG
|
||||
|
@ -221,10 +221,7 @@
|
||||
---------- AUTOIP options ----------
|
||||
------------------------------------
|
||||
*/
|
||||
#if CONFIG_MDNS
|
||||
/**
|
||||
* LWIP_AUTOIP==1: Enable AUTOIP module.
|
||||
*/
|
||||
#ifdef CONFIG_LWIP_AUTOIP
|
||||
#define LWIP_AUTOIP 1
|
||||
|
||||
/**
|
||||
@ -240,8 +237,13 @@
|
||||
* be prepared to handle a changing IP address when DHCP overrides
|
||||
* AutoIP.
|
||||
*/
|
||||
#define LWIP_DHCP_AUTOIP_COOP_TRIES 2
|
||||
#endif
|
||||
#define LWIP_DHCP_AUTOIP_COOP_TRIES CONFIG_LWIP_AUTOIP_TRIES
|
||||
|
||||
#define LWIP_AUTOIP_MAX_CONFLICTS CONFIG_LWIP_AUTOIP_MAX_CONFLICTS
|
||||
|
||||
#define LWIP_AUTOIP_RATE_LIMIT_INTERVAL CONFIG_LWIP_AUTOIP_RATE_LIMIT_INTERVAL
|
||||
|
||||
#endif /* CONFIG_LWIP_AUTOIP */
|
||||
|
||||
/*
|
||||
----------------------------------
|
||||
@ -367,7 +369,7 @@
|
||||
---------- LOOPIF options ----------
|
||||
------------------------------------
|
||||
*/
|
||||
#if CONFIG_MDNS
|
||||
#ifdef CONFIG_LWIP_NETIF_LOOPBACK
|
||||
/**
|
||||
* LWIP_NETIF_LOOPBACK==1: Support sending packets with a destination IP
|
||||
* address equal to the netif IP address, looping them back up the stack.
|
||||
@ -378,7 +380,7 @@
|
||||
* LWIP_LOOPBACK_MAX_PBUFS: Maximum number of pbufs on queue for loopback
|
||||
* sending for each netif (0 = disabled)
|
||||
*/
|
||||
#define LWIP_LOOPBACK_MAX_PBUFS 8
|
||||
#define LWIP_LOOPBACK_MAX_PBUFS CONFIG_LWIP_LOOPBACK_MAX_PBUFS
|
||||
#endif
|
||||
|
||||
/*
|
||||
@ -506,14 +508,12 @@
|
||||
*/
|
||||
#define SO_REUSE CONFIG_LWIP_SO_REUSE
|
||||
|
||||
#if CONFIG_MDNS
|
||||
/**
|
||||
* SO_REUSE_RXTOALL==1: Pass a copy of incoming broadcast/multicast packets
|
||||
* to all local matches if SO_REUSEADDR is turned on.
|
||||
* WARNING: Adds a memcpy for every packet if passing to more than one pcb!
|
||||
*/
|
||||
#define SO_REUSE_RXTOALL 1
|
||||
#endif
|
||||
#define SO_REUSE_RXTOALL CONFIG_LWIP_SO_REUSE_RXTOALL
|
||||
|
||||
/*
|
||||
----------------------------------------
|
||||
|
@ -221,10 +221,7 @@
|
||||
---------- AUTOIP options ----------
|
||||
------------------------------------
|
||||
*/
|
||||
#if CONFIG_MDNS
|
||||
/**
|
||||
* LWIP_AUTOIP==1: Enable AUTOIP module.
|
||||
*/
|
||||
#ifdef CONFIG_LWIP_AUTOIP
|
||||
#define LWIP_AUTOIP 1
|
||||
|
||||
/**
|
||||
@ -240,8 +237,13 @@
|
||||
* be prepared to handle a changing IP address when DHCP overrides
|
||||
* AutoIP.
|
||||
*/
|
||||
#define LWIP_DHCP_AUTOIP_COOP_TRIES 2
|
||||
#endif
|
||||
#define LWIP_DHCP_AUTOIP_COOP_TRIES CONFIG_LWIP_AUTOIP_TRIES
|
||||
|
||||
#define LWIP_AUTOIP_MAX_CONFLICTS CONFIG_LWIP_AUTOIP_MAX_CONFLICTS
|
||||
|
||||
#define LWIP_AUTOIP_RATE_LIMIT_INTERVAL CONFIG_LWIP_AUTOIP_RATE_LIMIT_INTERVAL
|
||||
|
||||
#endif /* CONFIG_LWIP_AUTOIP */
|
||||
|
||||
/*
|
||||
----------------------------------
|
||||
@ -367,7 +369,7 @@
|
||||
---------- LOOPIF options ----------
|
||||
------------------------------------
|
||||
*/
|
||||
#if CONFIG_MDNS
|
||||
#ifdef CONFIG_LWIP_NETIF_LOOPBACK
|
||||
/**
|
||||
* LWIP_NETIF_LOOPBACK==1: Support sending packets with a destination IP
|
||||
* address equal to the netif IP address, looping them back up the stack.
|
||||
@ -378,7 +380,7 @@
|
||||
* LWIP_LOOPBACK_MAX_PBUFS: Maximum number of pbufs on queue for loopback
|
||||
* sending for each netif (0 = disabled)
|
||||
*/
|
||||
#define LWIP_LOOPBACK_MAX_PBUFS 8
|
||||
#define LWIP_LOOPBACK_MAX_PBUFS CONFIG_LWIP_LOOPBACK_MAX_PBUFS
|
||||
#endif
|
||||
|
||||
/*
|
||||
@ -506,14 +508,12 @@
|
||||
*/
|
||||
#define SO_REUSE CONFIG_LWIP_SO_REUSE
|
||||
|
||||
#if CONFIG_MDNS
|
||||
/**
|
||||
* SO_REUSE_RXTOALL==1: Pass a copy of incoming broadcast/multicast packets
|
||||
* to all local matches if SO_REUSEADDR is turned on.
|
||||
* WARNING: Adds a memcpy for every packet if passing to more than one pcb!
|
||||
*/
|
||||
#define SO_REUSE_RXTOALL 1
|
||||
#endif
|
||||
#define SO_REUSE_RXTOALL CONFIG_LWIP_SO_REUSE_RXTOALL
|
||||
|
||||
/*
|
||||
----------------------------------------
|
||||
|
@ -361,6 +361,8 @@ PROVIDE ( r_ea_interval_delete = 0x400155a8 );
|
||||
PROVIDE ( r_ea_interval_duration_req = 0x4001597c );
|
||||
PROVIDE ( r_ea_interval_insert = 0x4001557c );
|
||||
PROVIDE ( r_ea_interval_remove = 0x40015590 );
|
||||
PROVIDE ( ea_conflict_check = 0x40014e9c );
|
||||
PROVIDE ( ea_prog_timer = 0x40014f88 );
|
||||
PROVIDE ( realloc = 0x4000becc );
|
||||
PROVIDE ( _realloc_r = 0x4000bbe0 );
|
||||
PROVIDE ( r_ea_offset_req = 0x40015748 );
|
||||
@ -1700,6 +1702,7 @@ PROVIDE ( ets_update_cpu_frequency_rom = 0x40008550 ); /* Updates g_ticks_per_u
|
||||
/* Following are static data, but can be used, not generated by script <<<<< btdm data */
|
||||
PROVIDE ( hci_tl_env = 0x3ffb8154 );
|
||||
PROVIDE ( ld_acl_env = 0x3ffb8258 );
|
||||
PROVIDE ( ea_env = 0x3ffb80ec );
|
||||
PROVIDE ( ld_active_ch_map = 0x3ffb8334 );
|
||||
PROVIDE ( ld_bcst_acl_env = 0x3ffb8274 );
|
||||
PROVIDE ( ld_csb_rx_env = 0x3ffb8278 );
|
||||
|
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@ -165,7 +165,7 @@ CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y
|
||||
CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4
|
||||
CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32
|
||||
CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2048
|
||||
CONFIG_MAIN_TASK_STACK_SIZE=4096
|
||||
CONFIG_MAIN_TASK_STACK_SIZE=8192
|
||||
CONFIG_IPC_TASK_STACK_SIZE=1024
|
||||
CONFIG_TIMER_TASK_STACK_SIZE=4096
|
||||
CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y
|
||||
@ -298,7 +298,6 @@ CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1
|
||||
CONFIG_FREERTOS_ASSERT_FAIL_ABORT=y
|
||||
CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE=
|
||||
CONFIG_FREERTOS_ASSERT_DISABLE=
|
||||
CONFIG_ENABLE_MEMORY_DEBUG=
|
||||
CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1024
|
||||
CONFIG_FREERTOS_ISR_STACKSIZE=1536
|
||||
CONFIG_FREERTOS_LEGACY_HOOKS=
|
||||
@ -317,6 +316,11 @@ CONFIG_HEAP_POISONING_LIGHT=y
|
||||
CONFIG_HEAP_POISONING_COMPREHENSIVE=
|
||||
CONFIG_HEAP_TRACING=
|
||||
|
||||
#
|
||||
# libsodium
|
||||
#
|
||||
CONFIG_LIBSODIUM_USE_MBEDTLS_SHA=y
|
||||
|
||||
#
|
||||
# Log output
|
||||
#
|
||||
@ -336,6 +340,7 @@ CONFIG_L2_TO_L3_COPY=
|
||||
CONFIG_LWIP_MAX_SOCKETS=10
|
||||
CONFIG_LWIP_THREAD_LOCAL_STORAGE_INDEX=0
|
||||
CONFIG_LWIP_SO_REUSE=y
|
||||
CONFIG_LWIP_SO_REUSE_RXTOALL=y
|
||||
CONFIG_LWIP_SO_RCVBUF=y
|
||||
CONFIG_LWIP_DHCP_MAX_NTP_SERVERS=1
|
||||
CONFIG_LWIP_IP_FRAG=
|
||||
@ -343,6 +348,10 @@ CONFIG_LWIP_IP_REASSEMBLY=
|
||||
CONFIG_LWIP_STATS=
|
||||
CONFIG_LWIP_ETHARP_TRUST_IP_MAC=y
|
||||
CONFIG_TCPIP_RECVMBOX_SIZE=32
|
||||
CONFIG_LWIP_DHCP_DOES_ARP_CHECK=
|
||||
CONFIG_LWIP_AUTOIP=
|
||||
CONFIG_LWIP_NETIF_LOOPBACK=y
|
||||
CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8
|
||||
|
||||
#
|
||||
# TCP
|
||||
@ -363,7 +372,6 @@ CONFIG_TCP_OVERSIZE_DISABLE=
|
||||
# UDP
|
||||
#
|
||||
CONFIG_UDP_RECVMBOX_SIZE=6
|
||||
CONFIG_LWIP_DHCP_DOES_ARP_CHECK=
|
||||
CONFIG_TCPIP_TASK_STACK_SIZE=2560
|
||||
CONFIG_PPP_SUPPORT=
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user