Update IDF

This commit is contained in:
me-no-dev 2017-04-04 01:26:23 +03:00
parent 7e45310771
commit 80322311f1
70 changed files with 702 additions and 296 deletions

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@ -20,7 +20,7 @@ compiler.warning_flags.all=-Wall -Werror=all -Wextra
compiler.path={runtime.tools.xtensa-esp32-elf-gcc.path}/bin/
compiler.sdk.path={runtime.platform.path}/tools/sdk
compiler.cpreprocessor.flags=-DESP_PLATFORM -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DHAVE_CONFIG_H "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/bluedroid" "-I{compiler.sdk.path}/include/bootloader_support" "-I{compiler.sdk.path}/include/bt" "-I{compiler.sdk.path}/include/driver" "-I{compiler.sdk.path}/include/esp32" "-I{compiler.sdk.path}/include/ethernet" "-I{compiler.sdk.path}/include/fatfs" "-I{compiler.sdk.path}/include/freertos" "-I{compiler.sdk.path}/include/log" "-I{compiler.sdk.path}/include/mdns" "-I{compiler.sdk.path}/include/mbedtls" "-I{compiler.sdk.path}/include/mbedtls_port" "-I{compiler.sdk.path}/include/vfs" "-I{compiler.sdk.path}/include/ulp" "-I{compiler.sdk.path}/include/newlib" "-I{compiler.sdk.path}/include/nvs_flash" "-I{compiler.sdk.path}/include/spi_flash" "-I{compiler.sdk.path}/include/sdmmc" "-I{compiler.sdk.path}/include/openssl" "-I{compiler.sdk.path}/include/app_update" "-I{compiler.sdk.path}/include/tcpip_adapter" "-I{compiler.sdk.path}/include/xtensa-debug-module" "-I{compiler.sdk.path}/include/newlib" "-I{compiler.sdk.path}/include/coap" "-I{compiler.sdk.path}/include/wpa_supplicant" "-I{compiler.sdk.path}/include/expat" "-I{compiler.sdk.path}/include/json" "-I{compiler.sdk.path}/include/nghttp" "-I{compiler.sdk.path}/include/lwip"
compiler.cpreprocessor.flags=-DESP_PLATFORM -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DHAVE_CONFIG_H "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/bluedroid" "-I{compiler.sdk.path}/include/app_update" "-I{compiler.sdk.path}/include/bootloader_support" "-I{compiler.sdk.path}/include/bt" "-I{compiler.sdk.path}/include/driver" "-I{compiler.sdk.path}/include/esp32" "-I{compiler.sdk.path}/include/ethernet" "-I{compiler.sdk.path}/include/fatfs" "-I{compiler.sdk.path}/include/freertos" "-I{compiler.sdk.path}/include/jsmn" "-I{compiler.sdk.path}/include/log" "-I{compiler.sdk.path}/include/mdns" "-I{compiler.sdk.path}/include/mbedtls" "-I{compiler.sdk.path}/include/mbedtls_port" "-I{compiler.sdk.path}/include/newlib" "-I{compiler.sdk.path}/include/nvs_flash" "-I{compiler.sdk.path}/include/openssl" "-I{compiler.sdk.path}/include/spi_flash" "-I{compiler.sdk.path}/include/sdmmc" "-I{compiler.sdk.path}/include/tcpip_adapter" "-I{compiler.sdk.path}/include/ulp" "-I{compiler.sdk.path}/include/vfs" "-I{compiler.sdk.path}/include/xtensa-debug-module" "-I{compiler.sdk.path}/include/newlib" "-I{compiler.sdk.path}/include/coap" "-I{compiler.sdk.path}/include/wpa_supplicant" "-I{compiler.sdk.path}/include/expat" "-I{compiler.sdk.path}/include/json" "-I{compiler.sdk.path}/include/nghttp" "-I{compiler.sdk.path}/include/lwip"
compiler.c.cmd=xtensa-esp32-elf-gcc
compiler.c.flags=-std=gnu99 -Os -g3 -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -mlongcalls -nostdlib -Wpointer-arith {compiler.warning_flags} -Wno-error=unused-function -Wno-error=unused-but-set-variable -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -Wno-old-style-declaration -MMD -c
@ -33,7 +33,7 @@ compiler.S.flags=-c -g3 -x assembler-with-cpp -MMD -mlongcalls
compiler.c.elf.cmd=xtensa-esp32-elf-gcc
compiler.c.elf.flags=-nostdlib "-L{compiler.sdk.path}/lib" "-L{compiler.sdk.path}/ld" -T esp32_out.ld -T esp32.common.ld -T esp32.rom.ld -T esp32.peripherals.ld -u call_user_start_cpu0 -Wl,--gc-sections -Wl,-static -Wl,--undefined=uxTopUsedPriority
compiler.c.elf.libs=-lgcc -lstdc++ -lapp_update -lbootloader_support -lbt -lbtdm_app -lc -lc_nano -lcoap -lcoexist -lcore -lcxx -ldriver -lesp32 -lethernet -lexpat -lfatfs -lfreertos -lhal -ljson -llog -llwip -lm -lmbedtls -lmdns -lmicro-ecc -lnet80211 -lnewlib -lnghttp -lnvs_flash -lopenssl -lphy -lpp -lrtc -lrtc_clk -lsdmmc -lsmartconfig -lspi_flash -ltcpip_adapter -lulp -lvfs -lwpa -lwpa2 -lwpa_supplicant -lwps -lxtensa-debug-module
compiler.c.elf.libs=-lgcc -lstdc++ -lapp_update -lbootloader_support -lbt -lbtdm_app -lc -lc_nano -lcoap -lcoexist -lcore -lcxx -ldriver -lesp32 -lethernet -lexpat -lfatfs -lfreertos -lhal -ljsmn -ljson -llog -llwip -lm -lmbedtls -lmdns -lmicro-ecc -lnet80211 -lnewlib -lnghttp -lnvs_flash -lopenssl -lphy -lpp -lrtc -lrtc_clk -lrtc_pm -lsdmmc -lsmartconfig -lspi_flash -ltcpip_adapter -lulp -lvfs -lwpa -lwpa2 -lwpa_supplicant -lwps -lxtensa-debug-module
compiler.as.cmd=xtensa-esp32-elf-as

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@ -51,6 +51,7 @@ env.Prepend(
CPPPATH=[
join(FRAMEWORK_DIR, "tools", "sdk", "include", "config"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "bluedroid"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "app_update"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "bootloader_support"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "bt"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "driver"),
@ -58,19 +59,19 @@ env.Prepend(
join(FRAMEWORK_DIR, "tools", "sdk", "include", "ethernet"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "fatfs"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "freertos"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "jsmn"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "log"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "mdns"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "mbedtls"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "mbedtls_port"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "vfs"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "ulp"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "newlib"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "nvs_flash"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "openssl"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "spi_flash"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "sdmmc"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "openssl"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "app_update"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "tcpip_adapter"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "ulp"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "vfs"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "xtensa-debug-module"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "newlib"),
join(FRAMEWORK_DIR, "tools", "sdk", "include", "coap"),
@ -88,7 +89,7 @@ env.Prepend(
],
LIBS=[
"gcc", "stdc++", "app_update", "bootloader_support", "bt", "btdm_app", "c", "c_nano", "coap", "coexist", "core", "cxx", "driver", "esp32", "ethernet", "expat", "fatfs", "freertos", "hal", "json", "log", "lwip", "m", "mbedtls", "mdns", "micro-ecc", "net80211", "newlib", "nghttp", "nvs_flash", "openssl", "phy", "pp", "rtc", "rtc_clk", "sdmmc", "smartconfig", "spi_flash", "tcpip_adapter", "ulp", "vfs", "wpa", "wpa2", "wpa_supplicant", "wps", "xtensa-debug-module"
"gcc", "stdc++", "app_update", "bootloader_support", "bt", "btdm_app", "c", "c_nano", "coap", "coexist", "core", "cxx", "driver", "esp32", "ethernet", "expat", "fatfs", "freertos", "hal", "jsmn", "json", "log", "lwip", "m", "mbedtls", "mdns", "micro-ecc", "net80211", "newlib", "nghttp", "nvs_flash", "openssl", "phy", "pp", "rtc", "rtc_clk", "rtc_pm", "sdmmc", "smartconfig", "spi_flash", "tcpip_adapter", "ulp", "vfs", "wpa", "wpa2", "wpa_supplicant", "wps", "xtensa-debug-module"
],
UPLOADERFLAGS=[

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@ -310,30 +310,41 @@ typedef void (tBTM_RAND_ENC_CB) (tBTM_RAND_ENC *p1);
typedef UINT32 tBTM_BLE_AD_MASK;
#define BTM_BLE_AD_TYPE_FLAG HCI_EIR_FLAGS_TYPE /* 0x01 */
#define BTM_BLE_AD_TYPE_16SRV_PART HCI_EIR_MORE_16BITS_UUID_TYPE /* 0x02 */
#define BTM_BLE_AD_TYPE_16SRV_CMPL HCI_EIR_COMPLETE_16BITS_UUID_TYPE /* 0x03 */
#define BTM_BLE_AD_TYPE_32SRV_PART HCI_EIR_MORE_32BITS_UUID_TYPE /* 0x04 */
#define BTM_BLE_AD_TYPE_32SRV_CMPL HCI_EIR_COMPLETE_32BITS_UUID_TYPE /* 0x05 */
#define BTM_BLE_AD_TYPE_128SRV_PART HCI_EIR_MORE_128BITS_UUID_TYPE /* 0x06 */
#define BTM_BLE_AD_TYPE_128SRV_CMPL HCI_EIR_COMPLETE_128BITS_UUID_TYPE /* 0x07 */
#define BTM_BLE_AD_TYPE_NAME_SHORT HCI_EIR_SHORTENED_LOCAL_NAME_TYPE /* 0x08 */
#define BTM_BLE_AD_TYPE_NAME_CMPL HCI_EIR_COMPLETE_LOCAL_NAME_TYPE /* 0x09 */
#define BTM_BLE_AD_TYPE_TX_PWR HCI_EIR_TX_POWER_LEVEL_TYPE /* 0x0A */
#define BTM_BLE_AD_TYPE_DEV_CLASS 0x0D
#define BTM_BLE_AD_TYPE_SM_TK 0x10
#define BTM_BLE_AD_TYPE_SM_OOB_FLAG 0x11
#define BTM_BLE_AD_TYPE_INT_RANGE 0x12
#define BTM_BLE_AD_TYPE_SOL_SRV_UUID 0x14
#define BTM_BLE_AD_TYPE_128SOL_SRV_UUID 0x15
#define BTM_BLE_AD_TYPE_SERVICE_DATA 0x16
#define BTM_BLE_AD_TYPE_PUBLIC_TARGET 0x17
#define BTM_BLE_AD_TYPE_RANDOM_TARGET 0x18
#define BTM_BLE_AD_TYPE_APPEARANCE 0x19
#define BTM_BLE_AD_TYPE_ADV_INT 0x1a
#define BTM_BLE_AD_TYPE_32SOL_SRV_UUID 0x1b
#define BTM_BLE_AD_TYPE_32SERVICE_DATA 0x1c
#define BTM_BLE_AD_TYPE_128SERVICE_DATA 0x1d
#define BTM_BLE_AD_TYPE_FLAG HCI_EIR_FLAGS_TYPE /* 0x01 */
#define BTM_BLE_AD_TYPE_16SRV_PART HCI_EIR_MORE_16BITS_UUID_TYPE /* 0x02 */
#define BTM_BLE_AD_TYPE_16SRV_CMPL HCI_EIR_COMPLETE_16BITS_UUID_TYPE /* 0x03 */
#define BTM_BLE_AD_TYPE_32SRV_PART HCI_EIR_MORE_32BITS_UUID_TYPE /* 0x04 */
#define BTM_BLE_AD_TYPE_32SRV_CMPL HCI_EIR_COMPLETE_32BITS_UUID_TYPE /* 0x05 */
#define BTM_BLE_AD_TYPE_128SRV_PART HCI_EIR_MORE_128BITS_UUID_TYPE /* 0x06 */
#define BTM_BLE_AD_TYPE_128SRV_CMPL HCI_EIR_COMPLETE_128BITS_UUID_TYPE /* 0x07 */
#define BTM_BLE_AD_TYPE_NAME_SHORT HCI_EIR_SHORTENED_LOCAL_NAME_TYPE /* 0x08 */
#define BTM_BLE_AD_TYPE_NAME_CMPL HCI_EIR_COMPLETE_LOCAL_NAME_TYPE /* 0x09 */
#define BTM_BLE_AD_TYPE_TX_PWR HCI_EIR_TX_POWER_LEVEL_TYPE /* 0x0A */
#define BTM_BLE_AD_TYPE_DEV_CLASS 0x0D
#define BTM_BLE_AD_TYPE_SM_TK 0x10
#define BTM_BLE_AD_TYPE_SM_OOB_FLAG 0x11
#define BTM_BLE_AD_TYPE_INT_RANGE 0x12
#define BTM_BLE_AD_TYPE_SOL_SRV_UUID 0x14
#define BTM_BLE_AD_TYPE_128SOL_SRV_UUID 0x15
#define BTM_BLE_AD_TYPE_SERVICE_DATA 0x16
#define BTM_BLE_AD_TYPE_PUBLIC_TARGET 0x17
#define BTM_BLE_AD_TYPE_RANDOM_TARGET 0x18
#define BTM_BLE_AD_TYPE_APPEARANCE 0x19
#define BTM_BLE_AD_TYPE_ADV_INT 0x1a
#define BTM_BLE_AD_TYPE_LE_DEV_ADDR 0x1b
#define BTM_BLE_AD_TYPE_LE_ROLE 0x1c
#define BTM_BLE_AD_TYPE_SPAIR_C256 0x1d
#define BTM_BLE_AD_TYPE_SPAIR_R256 0x1e
#define BTM_BLE_AD_TYPE_32SOL_SRV_UUID 0x1f
#define BTM_BLE_AD_TYPE_32SERVICE_DATA 0x20
#define BTM_BLE_AD_TYPE_128SERVICE_DATA 0x21
#define BTM_BLE_AD_TYPE_LE_SECURE_CONFIRM 0x22
#define BTM_BLE_AD_TYPE_LE_SECURE_RANDOM 0x23
#define BTM_BLE_AD_TYPE_URI 0x24
#define BTM_BLE_AD_TYPE_INDOOR_POSITION 0x25
#define BTM_BLE_AD_TYPE_TRANS_DISC_DATA 0x26
#define BTM_BLE_AD_TYPE_LE_SUPPORT_FEATURE 0x27
#define BTM_BLE_AD_TYPE_CHAN_MAP_UPDATE 0x28
#define BTM_BLE_AD_TYPE_MANU HCI_EIR_MANUFACTURER_SPECIFIC_TYPE /* 0xff */
typedef UINT8 tBTM_BLE_AD_TYPE;

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@ -65,6 +65,8 @@
#define GATT_CONGESTED 0x8f
#define GATT_STACK_RSP 0x90
#define GATT_APP_RSP 0x91
//Error caused by customer application or stack bug
#define GATT_ESP_ERROR 0X9f
/* 0xE0 ~ 0xFC reserved for future use */
#define GATT_CCC_CFG_ERR 0xFD /* Client Characteristic Configuration Descriptor Improperly Configured */

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@ -133,6 +133,16 @@ typedef struct {
UINT8 reason;
} tGATT_ERROR;
/* Execute write response structure */
typedef struct {
UINT8 op_code;
}__attribute__((packed)) tGATT_EXEC_WRITE_RSP;
/* Write request response structure */
typedef struct {
UINT8 op_code;
}__attribute__((packed)) tGATT_WRITE_REQ_RSP;
/* server response message to ATT protocol
*/
typedef union {
@ -329,6 +339,32 @@ typedef struct {
UINT16 count;
} tGATT_SRV_LIST_INFO;
/* prepare write queue data */
typedef struct{
//len: length of value
tGATT_ATTR16 *p_attr;
UINT16 len;
UINT8 op_code;
UINT16 handle;
UINT16 offset;
UINT8 value[2];
}__attribute__((packed)) tGATT_PREPARE_WRITE_QUEUE_DATA;
/* structure to store prepare write packts information */
typedef struct{
//only store prepare write packets which need
//to be responded by stack (not by application)
BUFFER_Q queue;
//store the total number of prepare write packets
//including that should be responded by stack or by application
UINT16 total_num;
//store application error code for prepare write,
//invalid offset && invalid length
UINT8 error_code_app;
}tGATT_PREPARE_WRITE_RECORD;
typedef struct {
BUFFER_Q pending_enc_clcb; /* pending encryption channel q */
tGATT_SEC_ACTION sec_act;
@ -362,6 +398,7 @@ typedef struct {
BOOLEAN in_use;
UINT8 tcb_idx;
tGATT_PREPARE_WRITE_RECORD prepare_write_record; /* prepare write packets record */
} tGATT_TCB;

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@ -27,7 +27,7 @@ extern "C" {
* @brief Bluetooth mode for controller enable/disable
*/
typedef enum {
ESP_BT_MODE_ILDE = 0x00, /*!< Bluetooth is not run */
ESP_BT_MODE_IDLE = 0x00, /*!< Bluetooth is not running */
ESP_BT_MODE_BLE = 0x01, /*!< Run BLE mode */
ESP_BT_MODE_CLASSIC_BT = 0x02, /*!< Run Classic BT mode */
ESP_BT_MODE_BTDM = 0x03, /*!< Run dual mode */

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@ -8,13 +8,14 @@
#define CONFIG_PHY_ENABLED 1
#define CONFIG_TRACEMEM_RESERVE_DRAM 0x0
#define CONFIG_FREERTOS_MAX_TASK_NAME_LEN 16
#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE 1
#define CONFIG_FOUR_MAC_ADDRESS_FROM_EFUSE 1
#define CONFIG_SW_COEXIST_ENABLE 1
#define CONFIG_ESPTOOLPY_FLASHSIZE_4MB 1
#define CONFIG_ESPTOOLPY_FLASHFREQ "80m"
#define CONFIG_NEWLIB_STDOUT_ADDCR 1
#define CONFIG_TASK_WDT_CHECK_IDLE_TASK 1
#define CONFIG_ESPTOOLPY_FLASHSIZE "4MB"
#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER 1
#define CONFIG_ETHERNET 1
#define CONFIG_EMAC_L2_TO_L3_RX_BUF_MODE 1
#define CONFIG_INT_WDT 1
@ -24,13 +25,16 @@
#define CONFIG_BT_RESERVE_DRAM 0x10000
#define CONFIG_LOG_BOOTLOADER_LEVEL_ERROR 1
#define CONFIG_CONSOLE_UART_BAUDRATE 115200
#define CONFIG_LWIP_MAX_SOCKETS 4
#define CONFIG_LWIP_MAX_SOCKETS 10
#define CONFIG_EMAC_TASK_PRIORITY 20
#define CONFIG_TIMER_TASK_STACK_DEPTH 2048
#define CONFIG_FATFS_CODEPAGE 850
#define CONFIG_ULP_COPROC_RESERVE_MEM 512
#define CONFIG_ESPTOOLPY_BAUD 921600
#define CONFIG_INT_WDT_CHECK_CPU1 1
#define CONFIG_ESPTOOLPY_AFTER_RESET 1
#define CONFIG_TOOLPREFIX "xtensa-esp32-elf-"
#define CONFIG_FATFS_LFN_STACK 1
#define CONFIG_ESP32_WIFI_AMPDU_ENABLED 1
#define CONFIG_CONSOLE_UART_NUM 0
#define CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC 1
@ -42,14 +46,17 @@
#define CONFIG_LOG_DEFAULT_LEVEL_ERROR 1
#define CONFIG_MBEDTLS_MPI_USE_INTERRUPT 1
#define CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE 1
#define CONFIG_FATFS_CODEPAGE_850 1
#define CONFIG_TASK_WDT 1
#define CONFIG_MAIN_TASK_STACK_SIZE 4096
#define CONFIG_TASK_WDT_TIMEOUT_S 5
#define CONFIG_INT_WDT_TIMEOUT_MS 300
#define CONFIG_ESPTOOLPY_FLASHMODE "dio"
#define CONFIG_BTC_TASK_STACK_SIZE 2048
#define CONFIG_BLUEDROID_ENABLED 1
#define CONFIG_ESPTOOLPY_BEFORE "default_reset"
#define CONFIG_LOG_DEFAULT_LEVEL 1
#define CONFIG_TIMER_QUEUE_LENGTH 10
#define CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM 0
#define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER 20
#define CONFIG_ESP32_WIFI_NVS_ENABLED 1
@ -86,16 +93,20 @@
#define CONFIG_ESPTOOLPY_AFTER "hard_reset"
#define CONFIG_LWIP_SO_REUSE 1
#define CONFIG_DMA_TX_BUF_NUM 10
#define CONFIG_TIMER_TASK_PRIORITY 1
#define CONFIG_BT_ENABLED 1
#define CONFIG_MONITOR_BAUD 115200
#define CONFIG_MBEDTLS_HARDWARE_SHA 1
#define CONFIG_FREERTOS_CORETIMER_0 1
#define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv"
#define CONFIG_MBEDTLS_HAVE_TIME 1
#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY 1
#define CONFIG_FREERTOS_ISR_STACKSIZE 1536
#define CONFIG_OPENSSL_ASSERT_DO_NOTHING 1
#define CONFIG_OPTIMIZATION_LEVEL_DEBUG 1
#define CONFIG_SYSTEM_EVENT_QUEUE_SIZE 32
#define CONFIG_FATFS_MAX_LFN 255
#define CONFIG_ESP32_WIFI_TX_BUFFER_TYPE 1
#define CONFIG_ESPTOOLPY_BAUD_921600B 1
#define CONFIG_APP_OFFSET 0x10000
#define CONFIG_MEMMAP_SMP 1

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@ -29,8 +29,7 @@ extern "C" {
typedef enum {
LEDC_HIGH_SPEED_MODE = 0, /*!< LEDC high speed speed_mode */
//in this version, we only support high speed speed_mode. We will access low speed speed_mode later
//LEDC_LOW_SPEED_MODE, /*!< LEDC low speed speed_mode */
LEDC_LOW_SPEED_MODE, /*!< LEDC low speed speed_mode */
LEDC_SPEED_MODE_MAX, /*!< LEDC speed limit */
} ledc_mode_t;
@ -137,8 +136,6 @@ esp_err_t ledc_timer_config(ledc_timer_config_t* timer_conf);
* After ledc_set_duty, ledc_set_fade, we need to call this function to update the settings.
*
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode,
* now we only support high-speed mode.
* We will access low-speed mode in next version
* @param channel LEDC channel(0-7), select from ledc_channel_t
*
* @return
@ -152,7 +149,7 @@ esp_err_t ledc_update_duty(ledc_mode_t speed_mode, ledc_channel_t channel);
* @brief LEDC stop.
* Disable LEDC output, and set idle level
*
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode, now we only support high-speed mode. We will access low-speed mode in next version
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode
* @param channel LEDC channel(0-7), select from ledc_channel_t
* @param idle_level Set output idle level after LEDC stops.
*
@ -165,7 +162,7 @@ esp_err_t ledc_stop(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t idl
/**
* @brief LEDC set channel frequency(Hz)
*
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode, now we only support high-speed mode. We will access low-speed mode in next version
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode
* @param timer_num LEDC timer index(0-3), select from ledc_timer_t
* @param freq_hz Set the LEDC frequency
*
@ -179,7 +176,7 @@ esp_err_t ledc_set_freq(ledc_mode_t speed_mode, ledc_timer_t timer_num, uint32_t
/**
* @brief LEDC get channel frequency(Hz)
*
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode, now we only support high-speed mode. We will access low-speed mode in next version
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode
* @param timer_num LEDC timer index(0-3), select from ledc_timer_t
*
* @return
@ -192,7 +189,7 @@ uint32_t ledc_get_freq(ledc_mode_t speed_mode, ledc_timer_t timer_num);
* @brief LEDC set duty
* Only after calling ledc_update_duty will the duty update.
*
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode, now we only support high-speed mode. We will access low-speed mode in next version
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode
* @param channel LEDC channel(0-7), select from ledc_channel_t
* @param duty Set the LEDC duty, the duty range is [0, (2**bit_num) - 1]
*
@ -205,7 +202,7 @@ esp_err_t ledc_set_duty(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t
/**
* @brief LEDC get duty
*
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode, now we only support high-speed mode. We will access low-speed mode in next version
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode
* @param channel LEDC channel(0-7), select from ledc_channel_t
*
* @return
@ -218,7 +215,7 @@ int ledc_get_duty(ledc_mode_t speed_mode, ledc_channel_t channel);
* @brief LEDC set gradient
* Set LEDC gradient, After the function calls the ledc_update_duty function, the function can take effect.
*
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode, now we only support high-speed mode. We will access low-speed mode in next version
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode
* @param channel LEDC channel(0-7), select from ledc_channel_t
* @param duty Set the start of the gradient duty, the duty range is [0, (2**bit_num) - 1]
* @param gradule_direction Set the direction of the gradient
@ -254,7 +251,7 @@ esp_err_t ledc_isr_register(void (*fn)(void*), void * arg, int intr_alloc_flags,
/**
* @brief Configure LEDC settings
*
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode, now we only support high-speed mode. We will access low-speed mode in next version
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode
* @param timer_sel Timer index(0-3), there are 4 timers in LEDC module
* @param div_num Timer clock divide number, the timer clock is divided from the selected clock source
* @param bit_num The count number of one period, counter range is 0 ~ ((2 ** bit_num) - 1)
@ -269,7 +266,7 @@ esp_err_t ledc_timer_set(ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_
/**
* @brief Reset LEDC timer
*
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode, now we only support high-speed mode. We will access low-speed mode in next version
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode
* @param timer_sel LEDC timer index(0-3), select from ledc_timer_t
*
* @return
@ -281,7 +278,7 @@ esp_err_t ledc_timer_rst(ledc_mode_t speed_mode, uint32_t timer_sel);
/**
* @brief Pause LEDC timer counter
*
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode, now we only support high-speed mode. We will access low-speed mode in next version
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode
* @param timer_sel LEDC timer index(0-3), select from ledc_timer_t
*
* @return
@ -294,7 +291,7 @@ esp_err_t ledc_timer_pause(ledc_mode_t speed_mode, uint32_t timer_sel);
/**
* @brief Resume LEDC timer
*
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode, now we only support high-speed mode. We will access low-speed mode in next version
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode
* @param timer_sel LEDC timer index(0-3), select from ledc_timer_t
*
* @return
@ -306,7 +303,7 @@ esp_err_t ledc_timer_resume(ledc_mode_t speed_mode, uint32_t timer_sel);
/**
* @brief Bind LEDC channel with the selected timer
*
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode, now we only support high-speed mode. We will access low-speed mode in next version
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode
* @param channel LEDC channel index(0-7), select from ledc_channel_t
* @param timer_idx LEDC timer index(0-3), select from ledc_timer_t
*
@ -321,7 +318,6 @@ esp_err_t ledc_bind_channel_timer(ledc_mode_t speed_mode, uint32_t channel, uint
* Call ledc_fade_start() after this to start fading.
*
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode,
* For now we only support high-speed mode. We will access low-speed mode soon.
* @param channel LEDC channel index(0-7), select from ledc_channel_t
* @param target_duty Target duty of fading.( 0 - (2 ** bit_num - 1)))
* @param scale Controls the increase or decrease step scale.
@ -331,6 +327,7 @@ esp_err_t ledc_bind_channel_timer(ledc_mode_t speed_mode, uint32_t channel, uint
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
* - ESP_ERR_INVALID_STATE Fade function not installed.
* - ESP_FAIL Fade function init error
*/
esp_err_t ledc_set_fade_with_step(ledc_mode_t speed_mode, ledc_channel_t channel, int target_duty, int scale, int cycle_num);
@ -339,7 +336,6 @@ esp_err_t ledc_set_fade_with_step(ledc_mode_t speed_mode, ledc_channel_t channel
* Call ledc_fade_start() after this to start fading.
*
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode,
* For now we only support high-speed mode. We will access low-speed mode soon.
* @param channel LEDC channel index(0-7), select from ledc_channel_t
* @param target_duty Target duty of fading.( 0 - (2 ** bit_num - 1)))
* @param max_fade_time_ms The maximum time of the fading ( ms ).
@ -348,6 +344,7 @@ esp_err_t ledc_set_fade_with_step(ledc_mode_t speed_mode, ledc_channel_t channel
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
* - ESP_ERR_INVALID_STATE Fade function not installed.
* - ESP_FAIL Fade function init error
*/
esp_err_t ledc_set_fade_with_time(ledc_mode_t speed_mode, ledc_channel_t channel, int target_duty, int max_fade_time_ms);
@ -358,7 +355,6 @@ esp_err_t ledc_set_fade_with_time(ledc_mode_t speed_mode, ledc_channel_t channel
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
*
* @return
* - ESP_ERR_NO_MEM No enough memory
* - ESP_OK Success
* - ESP_ERR_INVALID_STATE Fade function already installed.
*/
@ -373,6 +369,7 @@ void ledc_fade_func_uninstall();
/**
* @brief Start LEDC fading.
*
* @param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode
* @param channel LEDC channel number
* @param wait_done Whether to block until fading done.
*
@ -381,7 +378,7 @@ void ledc_fade_func_uninstall();
* - ESP_ERR_INVALID_STATE Fade function not installed.
* - ESP_ERR_INVALID_ARG Parameter error.
*/
esp_err_t ledc_fade_start(ledc_channel_t channel, ledc_fade_mode_t wait_done);
esp_err_t ledc_fade_start(ledc_mode_t speed_mode, ledc_channel_t channel, ledc_fade_mode_t wait_done);
#ifdef __cplusplus
}

View File

@ -619,22 +619,17 @@ esp_err_t rmt_fill_tx_items(rmt_channel_t channel, rmt_item32_t* item, uint16_t
*
* @param channel RMT channel (0 - 7)
*
* @param rx_buf_size Size of RMT RX ringbuffer.
* @param rx_buf_size Size of RMT RX ringbuffer. Can be 0 if the RX ringbuffer is not used.
*
* @note
* If we do not need RX ringbuffer, just set rx_buf_size to 0.
*
* @note
* When we call rmt_driver_install function, it will register a driver ISR handler,
* DO NOT REGISTER ISR HANDLER AGAIN.
*
* @param rmt_intr_num RMT interrupt number.
* @param intr_alloc_flags Flags for the RMT driver interrupt handler. Pass 0 for default flags. See esp_intr_alloc.h for details.
*
* @return
* - ESP_ERR_INVALID_STATE Driver is already installed, call rmt_driver_uninstall first.
* - ESP_ERR_NO_MEM Memory allocation failure
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_driver_install(rmt_channel_t channel, size_t rx_buf_size, int rmt_intr_num);
esp_err_t rmt_driver_install(rmt_channel_t channel, size_t rx_buf_size, int intr_alloc_flags);
/**
* @brief Uninstall RMT driver.

View File

@ -38,7 +38,8 @@ typedef struct {
uint32_t pulldown; /*!< Mask of pulldown enable */
uint32_t slpsel; /*!< If slpsel bit is set, slpie will be used as pad input enabled signal in sleep mode */
uint32_t slpie; /*!< Mask of input enable in sleep mode */
uint32_t hold; /*!< Mask of hold_force bit for RTC IO in RTC_CNTL_HOLD_FORCE_REG */
uint32_t hold; /*!< Mask of hold enable */
uint32_t hold_force;/*!< Mask of hold_force bit for RTC IO in RTC_CNTL_HOLD_FORCE_REG */
int rtc_num; /*!< RTC IO number, or -1 if not an RTC GPIO */
} rtc_gpio_desc_t;
@ -192,15 +193,44 @@ esp_err_t rtc_gpio_pullup_dis(gpio_num_t gpio_num);
esp_err_t rtc_gpio_pulldown_dis(gpio_num_t gpio_num);
/**
* @brief Disable "hold" signal for all RTC IOs
* @brief Enable hold function on an RTC IO pad
*
* Each RTC pad has a "hold" input signal from the RTC controller.
* If hold signal is set, pad latches current values of input enable,
* Enabling HOLD function will cause the pad to latch current values of
* input enable, output enable, output value, function, drive strength values.
* This function is useful when going into light or deep sleep mode to prevent
* the pin configuration from changing.
*
* @param gpio_num GPIO number (e.g. GPIO_NUM_12)
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
*/
esp_err_t rtc_gpio_hold_en(gpio_num_t gpio_num);
/**
* @brief Disable hold function on an RTC IO pad
*
* Disabling hold function will allow the pad receive the values of
* input enable, output enable, output value, function, drive strength from
* RTC_IO peripheral.
*
* @param gpio_num GPIO number (e.g. GPIO_NUM_12)
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
*/
esp_err_t rtc_gpio_hold_dis(gpio_num_t gpio_num);
/**
* @brief Disable force hold signal for all RTC IOs
*
* Each RTC pad has a "force hold" input signal from the RTC controller.
* If this signal is set, pad latches current values of input enable,
* function, output enable, and other signals which come from the RTC mux.
* Hold signal is enabled before going into deep sleep for pins which
* Force hold signal is enabled before going into deep sleep for pins which
* are used for EXT1 wakeup.
*/
void rtc_gpio_unhold_all();
void rtc_gpio_force_hold_dis_all();
#ifdef __cplusplus

View File

@ -153,6 +153,9 @@ esp_err_t spi_bus_free(spi_host_device_t host);
* peripheral and routes it to the indicated GPIO. All SPI master devices have three CS pins and can thus control
* up to three devices.
*
* @note While in general, speeds up to 80MHz on the dedicated SPI pins and 40MHz on GPIO-matrix-routed pins are
* supported, full-duplex transfers routed over the GPIO matrix only support speeds up to 26MHz.
*
* @param host SPI peripheral to allocate device on
* @param dev_config SPI interface protocol config for the device
* @param handle Pointer to variable to hold the device handle

View File

@ -43,10 +43,21 @@ typedef intr_handle_t touch_isr_handle_t;
*
*This function int touch pad module ,enable touch module
*
* @return None
* @return
* - ESP_OK Success
* - ESP_FAIL Touch pad init error
*
*/
void touch_pad_init();
esp_err_t touch_pad_init();
/**
* @brief Uninstall TouchPad driver.
*
* @return
* - ESP_OK Success
* - ESP_FAIL Touch pad deinit error
*/
esp_err_t touch_pad_deinit();
/**
* @brief Configure touch pad interrupt threshold.
@ -60,6 +71,7 @@ void touch_pad_init();
*
* @return - ESP_OK Success
* - ESP_ERR_INVALID_ARG Touch pad error
* - ESP_FAIL Touch pad not initialized
*
*/
esp_err_t touch_pad_config(touch_pad_t touch_num, uint16_t threshold);
@ -76,6 +88,7 @@ esp_err_t touch_pad_config(touch_pad_t touch_num, uint16_t threshold);
*
* @return - ESP_OK Success
* - ESP_ERR_INVALID_ARG Touch pad error
* - ESP_FAIL Touch pad not initialized
*
*/
esp_err_t touch_pad_read(touch_pad_t touch_num, uint16_t * touch_value);

View File

@ -38,6 +38,16 @@
*/
void heap_alloc_caps_init();
/**
* @brief Enable the memory region where the startup stacks are located for allocation
*
* On startup, the pro/app CPUs have a certain memory region they use as stack, so we
* cannot do allocations in the regions these stack frames are. When FreeRTOS is
* completely started, they do not use that memory anymore and allocation there can
* be re-enabled.
*/
void heap_alloc_enable_nonos_stack_tag();
/**
* @brief Allocate a chunk of memory which has the given capabilities
*
@ -75,4 +85,6 @@ size_t xPortGetFreeHeapSizeCaps( uint32_t caps );
*/
size_t xPortGetMinimumEverFreeHeapSizeCaps( uint32_t caps );
#endif

View File

@ -232,12 +232,11 @@ esp_err_t esp_phy_store_cal_data_to_nvs(const esp_phy_calibration_data_t* cal_da
* function.
* @param mode Calibration mode (Full, partial, or no calibration)
* @param[inout] calibration_data
* @param is_sleep WiFi wakes up from sleep or not
* @return ESP_OK on success.
* @return ESP_FAIL on fail.
*/
esp_err_t esp_phy_rf_init(const esp_phy_init_data_t* init_data,
esp_phy_calibration_mode_t mode, esp_phy_calibration_data_t* calibration_data, bool is_sleep);
esp_phy_calibration_mode_t mode, esp_phy_calibration_data_t* calibration_data);
/**
* @brief De-initialize PHY and RF module

View File

@ -97,6 +97,8 @@ typedef struct {
system_event_handler_t event_handler; /**< WiFi event handler */
int static_rx_buf_num; /**< WiFi static RX buffer number */
int dynamic_rx_buf_num; /**< WiFi dynamic RX buffer number */
int tx_buf_type; /**< WiFi TX buffer type */
int static_tx_buf_num; /**< WiFi static TX buffer number */
int dynamic_tx_buf_num; /**< WiFi dynamic TX buffer number */
int ampdu_enable; /**< WiFi AMPDU feature enable flag */
int nvs_enable; /**< WiFi NVS flash enable flag */
@ -104,6 +106,18 @@ typedef struct {
int magic; /**< WiFi init magic number, it should be the last field */
} wifi_init_config_t;
#ifdef CONFIG_ESP32_WIFI_STATIC_TX_BUFFER_NUM
#define WIFI_STATIC_TX_BUFFER_NUM CONFIG_ESP32_WIFI_STATIC_TX_BUFFER_NUM
#else
#define WIFI_STATIC_TX_BUFFER_NUM 0
#endif
#ifdef CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM
#define WIFI_DYNAMIC_TX_BUFFER_NUM CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM
#else
#define WIFI_DYNAMIC_TX_BUFFER_NUM 0
#endif
#if CONFIG_ESP32_WIFI_AMPDU_ENABLED
#define WIFI_AMPDU_ENABLED 1
#else
@ -128,14 +142,16 @@ typedef struct {
.event_handler = &esp_event_send, \
.static_rx_buf_num = CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM,\
.dynamic_rx_buf_num = CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM,\
.dynamic_tx_buf_num = CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM,\
.tx_buf_type = CONFIG_ESP32_WIFI_TX_BUFFER_TYPE,\
.static_tx_buf_num = WIFI_STATIC_TX_BUFFER_NUM,\
.dynamic_tx_buf_num = WIFI_DYNAMIC_TX_BUFFER_NUM,\
.ampdu_enable = WIFI_AMPDU_ENABLED,\
.nvs_enable = WIFI_NVS_ENABLED,\
.nano_enable = WIFI_NANO_FORMAT_ENABLED,\
.magic = WIFI_INIT_CONFIG_MAGIC\
};
#else
#define WIFI_INIT_CONFIG_DEFAULT #error Wifi is disabled in config, WIFI_INIT_CONFIG_DEFAULT will not work
#define WIFI_INIT_CONFIG_DEFAULT() {0}; _Static_assert(0, "please enable wifi in menuconfig to use esp_wifi.h");
#endif
/**
@ -164,7 +180,6 @@ esp_err_t esp_wifi_init(wifi_init_config_t *config);
* Free all resource allocated in esp_wifi_init and stop WiFi task
*
* @attention 1. This API should be called if you want to remove WiFi driver from the system
* @attention 2. This API can not be called yet and will be done in the future.
*
* @return ESP_OK: succeed
*/
@ -297,6 +312,8 @@ esp_err_t esp_wifi_deauth_sta(uint16_t aid);
* @attention If this API is called, the found APs are stored in WiFi driver dynamic allocated memory and the
* will be freed in esp_wifi_get_ap_list, so generally, call esp_wifi_get_ap_list to cause
* the memory to be freed once the scan is done
* @attention The values of maximum active scan time and passive scan time per channel are limited to 1500 milliseconds.
* Values above 1500ms may cause station to disconnect from AP and are not recommended.
*
* @param config configuration of scanning
* @param block if block is true, this API will block the caller until the scan is done, otherwise

View File

@ -49,11 +49,12 @@ typedef enum {
} wifi_country_t;
typedef enum {
WIFI_AUTH_OPEN = 0, /**< authenticate mode : open */
WIFI_AUTH_WEP, /**< authenticate mode : WEP */
WIFI_AUTH_WPA_PSK, /**< authenticate mode : WPA_PSK */
WIFI_AUTH_WPA2_PSK, /**< authenticate mode : WPA2_PSK */
WIFI_AUTH_WPA_WPA2_PSK, /**< authenticate mode : WPA_WPA2_PSK */
WIFI_AUTH_OPEN = 0, /**< authenticate mode : open */
WIFI_AUTH_WEP, /**< authenticate mode : WEP */
WIFI_AUTH_WPA_PSK, /**< authenticate mode : WPA_PSK */
WIFI_AUTH_WPA2_PSK, /**< authenticate mode : WPA2_PSK */
WIFI_AUTH_WPA_WPA2_PSK, /**< authenticate mode : WPA_WPA2_PSK */
WIFI_AUTH_WPA2_ENTERPRISE, /**< authenticate mode : WPA2_ENTERPRISE */
WIFI_AUTH_MAX
} wifi_auth_mode_t;
@ -95,11 +96,30 @@ typedef enum {
WIFI_SECOND_CHAN_BELOW, /**< the channel width is HT40 and the second channel is below the primary channel */
} wifi_second_chan_t;
typedef enum {
WIFI_SCAN_TYPE_ACTIVE = 0, /**< active scan */
WIFI_SCAN_TYPE_PASSIVE, /**< passive scan */
} wifi_scan_type_t;
typedef struct {
uint8_t *ssid; /**< SSID of AP */
uint8_t *bssid; /**< MAC address of AP */
uint8_t channel; /**< channel, scan the specific channel */
bool show_hidden; /**< enable to scan AP whose SSID is hidden */
uint32_t min; /**< minimum active scan time per channel, units: millisecond */
uint32_t max; /**< maximum active scan time per channel, units: millisecond, values above 1500ms may
cause station to disconnect from AP and are not recommended. */
} wifi_active_scan_time_t;
typedef union {
wifi_active_scan_time_t active; /**< active scan time per channel */
uint32_t passive; /**< passive scan time per channel, units: millisecond, values above 1500ms may
cause station to disconnect from AP and are not recommended. */
} wifi_scan_time_t;
typedef struct {
uint8_t *ssid; /**< SSID of AP */
uint8_t *bssid; /**< MAC address of AP */
uint8_t channel; /**< channel, scan the specific channel */
bool show_hidden; /**< enable to scan AP whose SSID is hidden */
wifi_scan_type_t scan_type; /**< scan type, active or passive */
wifi_scan_time_t scan_time; /**< scan time per channel */
} wifi_scan_config_t;
typedef struct {

View File

@ -1,34 +1,3 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef HEAP_ALLOC_CAPS_H
#define HEAP_ALLOC_CAPS_H
#define MALLOC_CAP_EXEC (1<<0) //Memory must be able to run executable code
#define MALLOC_CAP_32BIT (1<<1) //Memory must allow for aligned 32-bit data accesses
#define MALLOC_CAP_8BIT (1<<2) //Memory must allow for 8/16/...-bit data accesses
#define MALLOC_CAP_DMA (1<<3) //Memory must be able to accessed by DMA
#define MALLOC_CAP_PID2 (1<<4) //Memory must be mapped to PID2 memory space
#define MALLOC_CAP_PID3 (1<<5) //Memory must be mapped to PID3 memory space
#define MALLOC_CAP_PID4 (1<<6) //Memory must be mapped to PID4 memory space
#define MALLOC_CAP_PID5 (1<<7) //Memory must be mapped to PID5 memory space
#define MALLOC_CAP_PID6 (1<<8) //Memory must be mapped to PID6 memory space
#define MALLOC_CAP_PID7 (1<<9) //Memory must be mapped to PID7 memory space
#define MALLOC_CAP_SPISRAM (1<<10) //Memory must be in SPI SRAM
#define MALLOC_CAP_INVALID (1<<31) //Memory can't be used / list end marker
void heap_alloc_caps_init();
void *pvPortMallocCaps(size_t xWantedSize, uint32_t caps);
#endif
#pragma once
#warning heap_alloc_caps.h has been renamed to esp_heap_alloc_caps.h. The old header file is deprecated and will be removed in v3.0.
#include "esp_heap_alloc_caps.h"

View File

@ -21,7 +21,8 @@ typedef volatile struct {
uint32_t timer_sel: 2; /*There are four high speed timers the two bits are used to select one of them for high speed channel. 2'b00: seletc hstimer0. 2'b01: select hstimer1. 2'b10: select hstimer2. 2'b11: select hstimer3.*/
uint32_t sig_out_en: 1; /*This is the output enable control bit for high speed channel*/
uint32_t idle_lv: 1; /*This bit is used to control the output value when high speed channel is off.*/
uint32_t reserved4: 27;
uint32_t low_speed_update: 1; /*This bit is only useful for low speed timer channels, reserved for high speed timers*/
uint32_t reserved4: 26;
uint32_t clk_en: 1; /*This bit is clock gating control signal. when software configure LED_PWM internal registers it controls the register clock.*/
};
uint32_t val;
@ -204,9 +205,13 @@ typedef volatile struct {
} int_clr;
union {
struct {
uint32_t apb_clk_sel: 1; /*This bit is used to set the frequency of slow_clk. 1'b1:80mhz 1'b0:8mhz*/
uint32_t apb_clk_sel: 1; /*This bit decides the slow clock for LEDC low speed channels, so we want to replace the field name with slow_clk_sel*/
uint32_t reserved1: 31;
};
struct {
uint32_t slow_clk_sel: 1; /*This bit is used to set the frequency of slow_clk. 1'b1:80mhz 1'b0:8mhz, (only used by LEDC low speed channels/timers)*/
uint32_t reserved: 31;
};
uint32_t val;
} conf;
uint32_t reserved_194;

View File

@ -15,7 +15,9 @@
#ifndef _ESP32_SOC_H_
#define _ESP32_SOC_H_
#ifndef __ASSEMBLER__
#include <stdint.h>
#endif
//Register Bits{{
#define BIT31 0x80000000
@ -59,7 +61,11 @@
#define ETS_UNCACHED_ADDR(addr) (addr)
#define ETS_CACHED_ADDR(addr) (addr)
#ifndef __ASSEMBLER__
#define BIT(nr) (1UL << (nr))
#else
#define BIT(nr) (1 << (nr))
#endif //__ASSEMBLER__
//write value to register
#define REG_WRITE(_r, _v) (*(volatile uint32_t *)(_r)) = (_v)

View File

@ -0,0 +1,46 @@
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
// This file contains various convenience macros to be used in ULP programs.
// Helper macros to calculate bit field width from mask, using the preprocessor.
// Used later in READ_RTC_FIELD and WRITE_RTC_FIELD.
#define IS_BIT_SET(m, i) (((m) >> (i)) & 1)
#define MASK_TO_WIDTH_HELPER1(m, i) IS_BIT_SET(m, i)
#define MASK_TO_WIDTH_HELPER2(m, i) (MASK_TO_WIDTH_HELPER1(m, i) + MASK_TO_WIDTH_HELPER1(m, i + 1))
#define MASK_TO_WIDTH_HELPER4(m, i) (MASK_TO_WIDTH_HELPER2(m, i) + MASK_TO_WIDTH_HELPER2(m, i + 2))
#define MASK_TO_WIDTH_HELPER8(m, i) (MASK_TO_WIDTH_HELPER4(m, i) + MASK_TO_WIDTH_HELPER4(m, i + 4))
#define MASK_TO_WIDTH_HELPER16(m, i) (MASK_TO_WIDTH_HELPER8(m, i) + MASK_TO_WIDTH_HELPER8(m, i + 8))
#define MASK_TO_WIDTH_HELPER32(m, i) (MASK_TO_WIDTH_HELPER16(m, i) + MASK_TO_WIDTH_HELPER16(m, i + 16))
// Peripheral register access macros, build around REG_RD and REG_WR instructions.
// Registers defined in rtc_cntl_reg.h, rtc_io_reg.h, and sens_reg.h are usable with these macros.
// Read from rtc_reg[low_bit + bit_width - 1 : low_bit] into R0, bit_width <= 16
#define READ_RTC_REG(rtc_reg, low_bit, bit_width) \
REG_RD (((rtc_reg) - DR_REG_RTCCNTL_BASE) / 4), ((low_bit) + (bit_width) - 1), (low_bit)
// Write immediate value into rtc_reg[low_bit + bit_width - 1 : low_bit], bit_width <= 8
#define WRITE_RTC_REG(rtc_reg, low_bit, bit_width, value) \
REG_WR (((rtc_reg) - DR_REG_RTCCNTL_BASE) / 4), ((low_bit) + (bit_width) - 1), (low_bit), ((value) & 0xff)
// Read from a field in rtc_reg into R0, up to 16 bits
#define READ_RTC_FIELD(rtc_reg, field) \
READ_RTC_REG(rtc_reg, field ## _S, MASK_TO_WIDTH_HELPER16(field ## _V, 0))
// Write immediate value into a field in rtc_reg, up to 8 bits
#define WRITE_RTC_FIELD(rtc_reg, field, value) \
WRITE_RTC_REG(rtc_reg, field ## _S, MASK_TO_WIDTH_HELPER8(field ## _V, 0), ((value) & field ## _V))

View File

@ -1,3 +1,4 @@
#include "sdkconfig.h"
/*---------------------------------------------------------------------------/
/ FatFs - FAT file system module configuration file
/---------------------------------------------------------------------------*/
@ -69,7 +70,7 @@
/ Locale and Namespace Configurations
/---------------------------------------------------------------------------*/
#define _CODE_PAGE 1
#define _CODE_PAGE CONFIG_FATFS_CODEPAGE
/* This option specifies the OEM code page to be used on the target system.
/ Incorrect setting of the code page can cause a file open failure.
/
@ -97,9 +98,17 @@
/ 950 - Traditional Chinese (DBCS)
*/
#if defined(CONFIG_FATFS_LFN_STACK)
#define _USE_LFN 2
#elif defined(CONFIG_FATFS_LFN_HEAP)
#define _USE_LFN 3
#else /* CONFIG_FATFS_LFN_NONE */
#define _USE_LFN 0
#define _MAX_LFN 255
#endif
#ifdef CONFIG_FATFS_MAX_LFN
#define _MAX_LFN CONFIG_FATFS_MAX_LFN
#endif
/* The _USE_LFN switches the support of long file name (LFN).
/
/ 0: Disable support of LFN. _MAX_LFN has no effect.

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@ -248,13 +248,21 @@
#define configUSE_NEWLIB_REENTRANT 1
#define configSUPPORT_DYNAMIC_ALLOCATION 1
#define configSUPPORT_STATIC_ALLOCATION CONFIG_SUPPORT_STATIC_ALLOCATION
#ifndef __ASSEMBLER__
#if CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK
extern void vPortCleanUpTCB ( void *pxTCB );
#define portCLEAN_UP_TCB( pxTCB ) vPortCleanUpTCB( pxTCB )
#endif
#endif
/* Test FreeRTOS timers (with timer task) and more. */
/* Some files don't compile if this flag is disabled */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY 1
#define configTIMER_QUEUE_LENGTH 10
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
#define configTIMER_TASK_PRIORITY CONFIG_TIMER_TASK_PRIORITY
#define configTIMER_QUEUE_LENGTH CONFIG_TIMER_QUEUE_LENGTH
#define configTIMER_TASK_STACK_DEPTH CONFIG_TIMER_TASK_STACK_DEPTH
#define INCLUDE_xTimerPendFunctionCall 1
#define INCLUDE_eTaskGetState 1

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@ -0,0 +1,106 @@
/*
* Copyright (c) 2010 Serge A. Zaitsev
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
/**
* @file jsmn.h
* @brief Definition of the JSMN (Jasmine) JSON parser.
*
* For more information on JSMN:
* @see http://zserge.com/jsmn.html
*/
#ifndef __JSMN_H_
#define __JSMN_H_
#include <stddef.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* JSON type identifier. Basic types are:
* o Object
* o Array
* o String
* o Other primitive: number, boolean (true/false) or null
*/
typedef enum {
JSMN_UNDEFINED = 0,
JSMN_OBJECT = 1,
JSMN_ARRAY = 2,
JSMN_STRING = 3,
JSMN_PRIMITIVE = 4
} jsmntype_t;
enum jsmnerr {
/* Not enough tokens were provided */
JSMN_ERROR_NOMEM = -1,
/* Invalid character inside JSON string */
JSMN_ERROR_INVAL = -2,
/* The string is not a full JSON packet, more bytes expected */
JSMN_ERROR_PART = -3
};
/**
* JSON token description.
* @param type type (object, array, string etc.)
* @param start start position in JSON data string
* @param end end position in JSON data string
*/
typedef struct {
jsmntype_t type;
int start;
int end;
int size;
#ifdef JSMN_PARENT_LINKS
int parent;
#endif
} jsmntok_t;
/**
* JSON parser. Contains an array of token blocks available. Also stores
* the string being parsed now and current position in that string
*/
typedef struct {
unsigned int pos; /* offset in the JSON string */
unsigned int toknext; /* next token to allocate */
int toksuper; /* superior token node, e.g parent object or array */
} jsmn_parser;
/**
* Create JSON parser over an array of tokens
*/
void jsmn_init(jsmn_parser *parser);
/**
* Run JSON parser. It parses a JSON data string into and array of tokens, each describing
* a single JSON object.
*/
int jsmn_parse(jsmn_parser *parser, const char *js, size_t len,
jsmntok_t *tokens, unsigned int num_tokens);
#ifdef __cplusplus
}
#endif
#endif /* __JSMN_H_ */

View File

@ -782,7 +782,7 @@
*
* Enable functions that use the filesystem.
*/
//#define MBEDTLS_FS_IO
#define MBEDTLS_FS_IO
/**
* \def MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES

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@ -0,0 +1,45 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "sdkconfig.h"
#ifdef CONFIG_MBEDTLS_DEBUG
/** @brief Enable mbedTLS debug logging via the esp_log mechanism.
*
* mbedTLS internal debugging is filtered from a specified mbedTLS
* threshold level to esp_log level at runtime:
*
* - 1 - Warning
* - 2 - Info
* - 3 - Debug
* - 4 - Verbose
*
* (Note that mbedTLS debug thresholds are not always consistently used.)
*
* This function will set the esp log level for "mbedtls" to the specified mbedTLS
* threshold level that matches. However, the overall max ESP log level must be set high
* enough in menuconfig, or some messages may be filtered at compile time.
*
* @param conf mbedtls_ssl_config structure
* @param mbedTLS debug threshold, 0-4. Messages are filtered at runtime.
*/
void mbedtls_esp_enable_debug_log(mbedtls_ssl_config *conf, int threshold);
/** @brief Disable mbedTLS debug logging via the esp_log mechanism.
*
*/
void mbedtls_esp_disable_debug_log(mbedtls_ssl_config *conf);
#endif

View File

@ -31,16 +31,17 @@ typedef uint32_t nvs_handle;
#define ESP_ERR_NVS_BASE 0x1100 /*!< Starting number of error codes */
#define ESP_ERR_NVS_NOT_INITIALIZED (ESP_ERR_NVS_BASE + 0x01) /*!< The storage driver is not initialized */
#define ESP_ERR_NVS_NOT_FOUND (ESP_ERR_NVS_BASE + 0x02) /*!< Id namespace doesnt exist yet and mode is NVS_READONLY */
#define ESP_ERR_NVS_TYPE_MISMATCH (ESP_ERR_NVS_BASE + 0x03) /*!< TBA */
#define ESP_ERR_NVS_TYPE_MISMATCH (ESP_ERR_NVS_BASE + 0x03) /*!< The type of set or get operation doesn't match the type of value stored in NVS */
#define ESP_ERR_NVS_READ_ONLY (ESP_ERR_NVS_BASE + 0x04) /*!< Storage handle was opened as read only */
#define ESP_ERR_NVS_NOT_ENOUGH_SPACE (ESP_ERR_NVS_BASE + 0x05) /*!< There is not enough space in the underlying storage to save the value */
#define ESP_ERR_NVS_INVALID_NAME (ESP_ERR_NVS_BASE + 0x06) /*!< Namespace name doesnt satisfy constraints */
#define ESP_ERR_NVS_INVALID_HANDLE (ESP_ERR_NVS_BASE + 0x07) /*!< Handle has been closed or is NULL */
#define ESP_ERR_NVS_REMOVE_FAILED (ESP_ERR_NVS_BASE + 0x08) /*!< The value wasnt updated because flash write operation has failed. The value was written however, and update will be finished after re-initialization of nvs, provided that flash operation doesnt fail again. */
#define ESP_ERR_NVS_KEY_TOO_LONG (ESP_ERR_NVS_BASE + 0x09) /*!< TBA */
#define ESP_ERR_NVS_PAGE_FULL (ESP_ERR_NVS_BASE + 0x0a) /*!< TBA */
#define ESP_ERR_NVS_INVALID_STATE (ESP_ERR_NVS_BASE + 0x0b) /*!< TBA */
#define ESP_ERR_NVS_INVALID_LENGTH (ESP_ERR_NVS_BASE + 0x0c) /*!< TBA */
#define ESP_ERR_NVS_KEY_TOO_LONG (ESP_ERR_NVS_BASE + 0x09) /*!< Key name is too long */
#define ESP_ERR_NVS_PAGE_FULL (ESP_ERR_NVS_BASE + 0x0a) /*!< Internal error; never returned by nvs_ API functions */
#define ESP_ERR_NVS_INVALID_STATE (ESP_ERR_NVS_BASE + 0x0b) /*!< NVS is in an inconsistent state due to a previous error. Call nvs_flash_init and nvs_open again, then retry. */
#define ESP_ERR_NVS_INVALID_LENGTH (ESP_ERR_NVS_BASE + 0x0c) /*!< String or blob length is not sufficient to store data */
#define ESP_ERR_NVS_NO_FREE_PAGES (ESP_ERR_NVS_BASE + 0x0d) /*!< NVS partition doesn't contain any empty pages. This may happen if NVS partition was truncated. Erase the whole partition and call nvs_flash_init again. */
/**
* @brief Mode of opening the non-volatile storage

View File

@ -21,7 +21,11 @@ extern "C" {
/**
* @brief Initialize NVS flash storage with layout given in the partition table.
*
* @return ESP_OK if storage was successfully initialized.
* @return
* - ESP_OK if storage was successfully initialized.
* - ESP_ERR_NVS_NO_FREE_PAGES if the NVS storage contains no empty pages
* (which may happen if NVS partition was truncated)
* - one of the error codes from the underlying flash storage driver
*/
esp_err_t nvs_flash_init(void);

View File

@ -847,6 +847,34 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) {
*/
esp_err_t ulp_process_macros_and_load(uint32_t load_addr, const ulp_insn_t* program, size_t* psize);
/**
* @brief Load ULP program binary into RTC memory
*
* ULP program binary should have the following format (all values little-endian):
*
* 1. MAGIC, (value 0x00706c75, 4 bytes)
* 2. TEXT_OFFSET, offset of .text section from binary start (2 bytes)
* 3. TEXT_SIZE, size of .text section (2 bytes)
* 4. DATA_SIZE, size of .data section (2 bytes)
* 5. BSS_SIZE, size of .bss section (2 bytes)
* 6. (TEXT_OFFSET - 16) bytes of arbitrary data (will not be loaded into RTC memory)
* 7. .text section
* 8. .data section
*
* Linker script in components/ulp/ld/esp32.ulp.ld produces ELF files which
* correspond to this format. This linker script produces binaries with load_addr == 0.
*
* @param load_addr address where the program should be loaded, expressed in 32-bit words
* @param program_binary pointer to program binary
* @param program_size size of the program binary
* @return
* - ESP_OK on success
* - ESP_ERR_INVALID_ARG if load_addr is out of range
* - ESP_ERR_INVALID_SIZE if program_size doesn't match (TEXT_OFFSET + TEXT_SIZE + DATA_SIZE)
* - ESP_ERR_NOT_SUPPORTED if the magic number is incorrect
*/
esp_err_t ulp_load_binary(uint32_t load_addr, const uint8_t* program_binary, size_t program_size);
/**
* @brief Run the program loaded into RTC memory
* @param entry_point entry point, expressed in 32-bit words

View File

@ -71,6 +71,10 @@ SECTIONS
*(.init.literal)
*(.init)
_init_end = ABSOLUTE(.);
/* This goes here, not at top of linker script, so addr2line finds it last,
and uses it in preference to the first symbol in IRAM */
_iram_start = ABSOLUTE(0);
} > iram0_0_seg
.iram0.text :
@ -81,9 +85,11 @@ SECTIONS
*libfreertos.a:(.literal .text .literal.* .text.*)
*libesp32.a:panic.o(.literal .text .literal.* .text.*)
*libesp32.a:core_dump.o(.literal .text .literal.* .text.*)
*libesp32.a:heap_alloc_caps.o(.literal .text .literal.* .text.*)
*libphy.a:(.literal .text .literal.* .text.*)
*librtc.a:(.literal .text .literal.* .text.*)
*librtc_clk.a:(.literal .text .literal.* .text.*)
*librtc_pm.a:(.literal .text .literal.* .text.*)
*libpp.a:pp.o(.literal .text .literal.* .text.*)
*libpp.a:lmac.o(.literal .text .literal.* .text.*)
*libpp.a:wdev.o(.literal .text .literal.* .text.*)
@ -193,5 +199,11 @@ SECTIONS
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
/* Similar to _iram_start, this symbol goes here so it is
resolved by addr2line in preference to the first symbol in
the flash.text segment.
*/
_flash_cache_start = ABSOLUTE(0);
} >iram0_2_seg
}

View File

@ -60,7 +60,6 @@ PROVIDE ( cache_sram_mmu_set = 0x400097f4 );
PROVIDE ( calc_rtc_memory_crc = 0x40008170 );
PROVIDE ( calloc = 0x4000bee4 );
PROVIDE ( _calloc_r = 0x4000bbf8 );
PROVIDE ( check_pos = 0x400068b8 );
PROVIDE ( _cleanup = 0x40001df8 );
PROVIDE ( _cleanup_r = 0x40001d48 );
PROVIDE ( __clear_cache = 0x40063860 );
@ -101,7 +100,6 @@ PROVIDE ( dbg_state = 0x3ffb8d5d );
PROVIDE ( DebugE256PublicKey_x = 0x3ff97428 );
PROVIDE ( DebugE256PublicKey_y = 0x3ff97408 );
PROVIDE ( DebugE256SecretKey = 0x3ff973e8 );
PROVIDE ( _DebugExceptionVector = 0x40000280 );
PROVIDE ( debug_timer = 0x3ffe042c );
PROVIDE ( debug_timerfn = 0x3ffe0430 );
PROVIDE ( dh_group14_generator = 0x3ff9ac60 );
@ -127,7 +125,6 @@ PROVIDE ( __divdi3 = 0x4000ca84 );
PROVIDE ( __divsc3 = 0x40064200 );
PROVIDE ( __divsf3 = 0x4000234c );
PROVIDE ( __divsi3 = 0x4000c7b8 );
PROVIDE ( _DoubleExceptionVector = 0x400003c0 );
PROVIDE ( dummy_len_plus = 0x3ffae290 );
PROVIDE ( __dummy_lock = 0x4000c728 );
PROVIDE ( __dummy_lock_try = 0x4000c730 );
@ -141,69 +138,8 @@ PROVIDE ( __eqdf2 = 0x400636a8 );
PROVIDE ( __eqsf2 = 0x40063374 );
PROVIDE ( esp_crc8 = 0x4005d144 );
PROVIDE ( _etext = 0x4000d66c );
PROVIDE ( ets_aes_crypt = 0x4005c9b8 );
PROVIDE ( ets_aes_disable = 0x4005c8f8 );
PROVIDE ( ets_aes_enable = 0x4005c8cc );
PROVIDE ( ets_aes_set_endian = 0x4005c928 );
PROVIDE ( ets_aes_setkey_dec = 0x4005c994 );
PROVIDE ( ets_aes_setkey_enc = 0x4005c97c );
PROVIDE ( ets_bigint_disable = 0x4005c4e0 );
PROVIDE ( ets_bigint_enable = 0x4005c498 );
PROVIDE ( ets_bigint_mod_mult_getz = 0x4005c818 );
PROVIDE ( ets_bigint_mod_mult_prepare = 0x4005c7b4 );
PROVIDE ( ets_bigint_mod_power_getz = 0x4005c614 );
PROVIDE ( ets_bigint_mod_power_prepare = 0x4005c54c );
PROVIDE ( ets_bigint_montgomery_mult_getz = 0x4005c7a4 );
PROVIDE ( ets_bigint_montgomery_mult_prepare = 0x4005c6fc );
PROVIDE ( ets_bigint_mult_getz = 0x4005c6e8 );
PROVIDE ( ets_bigint_mult_prepare = 0x4005c630 );
PROVIDE ( ets_bigint_wait_finish = 0x4005c520 );
PROVIDE ( ets_delay_us = 0x40008534 );
PROVIDE ( ets_efuse_get_8M_clock = 0x40008710 );
PROVIDE ( ets_efuse_get_spiconfig = 0x40008658 );
PROVIDE ( ets_efuse_program_op = 0x40008628 );
PROVIDE ( ets_efuse_read_op = 0x40008600 );
PROVIDE ( ets_get_cpu_frequency = 0x4000855c );
PROVIDE ( ets_get_detected_xtal_freq = 0x40008588 );
PROVIDE ( ets_get_xtal_scale = 0x4000856c );
PROVIDE ( ets_install_putc1 = 0x40007d18 );
PROVIDE ( ets_install_putc2 = 0x40007d38 );
PROVIDE ( ets_install_uart_printf = 0x40007d28 );
PROVIDE ( ets_post = 0x4000673c );
PROVIDE ( ets_printf = 0x40007d54 );
PROVIDE ( ets_readySet_ = 0x3ffe01f0 );
PROVIDE ( ets_run = 0x400066bc );
PROVIDE ( ets_secure_boot_check = 0x4005cb40 );
PROVIDE ( ets_secure_boot_check_finish = 0x4005cc04 );
PROVIDE ( ets_secure_boot_check_start = 0x4005cbcc );
PROVIDE ( ets_secure_boot_finish = 0x4005ca84 );
PROVIDE ( ets_secure_boot_hash = 0x4005cad4 );
PROVIDE ( ets_secure_boot_obtain = 0x4005cb14 );
PROVIDE ( ets_secure_boot_rd_abstract = 0x4005cba8 );
PROVIDE ( ets_secure_boot_rd_iv = 0x4005cb84 );
PROVIDE ( ets_secure_boot_start = 0x4005ca34 );
PROVIDE ( ets_set_appcpu_boot_addr = 0x4000689c );
PROVIDE ( ets_set_idle_cb = 0x40006674 );
PROVIDE ( ets_set_startup_callback = 0x4000688c );
PROVIDE ( ets_set_user_start = 0x4000687c );
PROVIDE ( ets_sha_disable = 0x4005c0a8 );
PROVIDE ( ets_sha_enable = 0x4005c07c );
PROVIDE ( ets_sha_finish = 0x4005c104 );
PROVIDE ( ets_sha_init = 0x4005c0d4 );
PROVIDE ( ets_sha_update = 0x4005c2a0 );
PROVIDE ( ets_startup_callback = 0x3ffe0404 );
PROVIDE ( ets_task = 0x40006688 );
PROVIDE ( ets_timer_arm = 0x40008368 );
PROVIDE ( ets_timer_arm_us = 0x400083ac );
PROVIDE ( ets_timer_disarm = 0x400083ec );
PROVIDE ( ets_timer_done = 0x40008428 );
PROVIDE ( ets_timer_handler_isr = 0x40008454 );
PROVIDE ( ets_timer_init = 0x400084e8 );
PROVIDE ( ets_timer_setfn = 0x40008350 );
PROVIDE ( ets_unpack_flash_code = 0x40007018 );
PROVIDE ( ets_unpack_flash_code_legacy = 0x4000694c );
PROVIDE ( ets_update_cpu_frequency_rom = 0x40008550 ); /* Updates g_ticks_per_us on the current CPU only; not on the other core */
PROVIDE ( ets_waiti0 = 0x400067d8 );
PROVIDE ( exc_cause_table = 0x3ff991d0 );
PROVIDE ( _exit_r = 0x4000bd28 );
PROVIDE ( __extendsfdf2 = 0x40002c34 );
@ -213,8 +149,6 @@ PROVIDE ( fflush = 0x40059394 );
PROVIDE ( _fflush_r = 0x40059320 );
PROVIDE ( __ffsdi2 = 0x4000ca2c );
PROVIDE ( __ffssi2 = 0x4000c804 );
PROVIDE ( FilePacketSendDeflatedReqMsgProc = 0x40008b24 );
PROVIDE ( FilePacketSendReqMsgProc = 0x40008860 );
PROVIDE ( _findenv_r = 0x40001f44 );
PROVIDE ( __fixdfdi = 0x40002ac4 );
PROVIDE ( __fixdfsi = 0x40002a78 );
@ -223,11 +157,6 @@ PROVIDE ( __fixsfsi = 0x4000240c );
PROVIDE ( __fixunsdfsi = 0x40002b30 );
PROVIDE ( __fixunssfdi = 0x40002504 );
PROVIDE ( __fixunssfsi = 0x400024ac );
PROVIDE ( FlashDwnLdDeflatedStartMsgProc = 0x40008ad8 );
PROVIDE ( FlashDwnLdParamCfgMsgProc = 0x4000891c );
PROVIDE ( FlashDwnLdStartMsgProc = 0x40008820 );
PROVIDE ( FlashDwnLdStopDeflatedReqMsgProc = 0x40008c18 );
PROVIDE ( FlashDwnLdStopReqMsgProc = 0x400088ec );
PROVIDE ( __floatdidf = 0x4000c988 );
PROVIDE ( __floatdisf = 0x4000c8c0 );
PROVIDE ( __floatsidf = 0x4000c944 );
@ -248,7 +177,6 @@ PROVIDE ( _fwalk = 0x4000c738 );
PROVIDE ( _fwalk_reent = 0x4000c770 );
PROVIDE ( __gcc_bcmp = 0x40064a70 );
PROVIDE ( __gedf2 = 0x40063768 );
PROVIDE ( _GeneralException = 0x40000e14 );
PROVIDE ( __gesf2 = 0x4006340c );
PROVIDE ( __get_current_time_locale = 0x40001834 );
PROVIDE ( _getenv_r = 0x40001fbc );
@ -256,7 +184,6 @@ PROVIDE ( _getpid_r = 0x4000bcfc );
PROVIDE ( __getreent = 0x4000be8c );
PROVIDE ( _gettimeofday_r = 0x4000bc58 );
PROVIDE ( __gettzinfo = 0x40001fcc );
PROVIDE ( GetUartDevice = 0x40009598 );
PROVIDE ( GF_Jacobian_Point_Addition256 = 0x400163a4 );
PROVIDE ( GF_Jacobian_Point_Double256 = 0x40016260 );
PROVIDE ( GF_Point_Jacobian_To_Affine256 = 0x40016b0c );
@ -265,31 +192,6 @@ PROVIDE ( gmtime = 0x40059848 );
PROVIDE ( gmtime_r = 0x40059868 );
PROVIDE ( g_phyFuns_instance = 0x3ffae0c4 );
PROVIDE ( g_rom_flashchip = 0x3ffae270 );
PROVIDE ( gpio_init = 0x40009c20 );
PROVIDE ( gpio_input_get = 0x40009b88 );
PROVIDE ( gpio_input_get_high = 0x40009b9c );
PROVIDE ( gpio_intr_ack = 0x40009dd4 );
PROVIDE ( gpio_intr_ack_high = 0x40009e1c );
PROVIDE ( gpio_intr_handler_register = 0x40009e6c );
PROVIDE ( gpio_intr_pending = 0x40009cec );
PROVIDE ( gpio_intr_pending_high = 0x40009cf8 );
PROVIDE ( gpio_matrix_in = 0x40009edc );
PROVIDE ( gpio_matrix_out = 0x40009f0c );
PROVIDE ( gpio_output_set = 0x40009b24 );
PROVIDE ( gpio_output_set_high = 0x40009b5c );
PROVIDE ( gpio_pad_hold = 0x4000a734 );
PROVIDE ( gpio_pad_pulldown = 0x4000a348 );
PROVIDE ( gpio_pad_pullup = 0x4000a22c );
PROVIDE ( gpio_pad_select_gpio = 0x40009fdc );
PROVIDE ( gpio_pad_set_drv = 0x4000a11c );
PROVIDE ( gpio_pad_unhold = 0x4000a484 );
PROVIDE ( gpio_pending_mask = 0x3ffe0038 );
PROVIDE ( gpio_pending_mask_high = 0x3ffe0044 );
PROVIDE ( gpio_pin_intr_state_set = 0x40009d04 );
PROVIDE ( gpio_pin_wakeup_disable = 0x40009eb0 );
PROVIDE ( gpio_pin_wakeup_enable = 0x40009e7c );
PROVIDE ( gpio_register_get = 0x40009cbc );
PROVIDE ( gpio_register_set = 0x40009bbc );
PROVIDE ( __gtdf2 = 0x400636dc );
PROVIDE ( __gtsf2 = 0x400633a0 );
PROVIDE ( gTxMsg = 0x3ffe0050 );
@ -314,7 +216,6 @@ PROVIDE ( hmac_sha1 = 0x40060acc );
PROVIDE ( hmac_sha1_vector = 0x400609e4 );
PROVIDE ( hmac_sha256 = 0x40060d58 );
PROVIDE ( hmac_sha256_vector = 0x40060c84 );
PROVIDE ( intr_matrix_set = 0x4000681c );
PROVIDE ( isalnum = 0x40000f04 );
PROVIDE ( isalpha = 0x40000f18 );
PROVIDE ( isascii = 0x4000c20c );
@ -333,7 +234,6 @@ PROVIDE ( __itoa = 0x40056678 );
PROVIDE ( jd_decomp = 0x400613e8 );
PROVIDE ( jd_prepare = 0x40060fa8 );
PROVIDE ( ke_env = 0x3ffb93cc );
PROVIDE ( _KernelExceptionVector = 0x40000300 );
PROVIDE ( _kill_r = 0x4000bd10 );
PROVIDE ( labs = 0x40056370 );
PROVIDE ( lb_default_handler = 0x3ff982b8 );
@ -357,15 +257,6 @@ PROVIDE ( ld_sched_params = 0x3ffb96c0 );
PROVIDE ( ld_sync_train_channels = 0x3ff98a3c );
PROVIDE ( __ledf2 = 0x40063704 );
PROVIDE ( __lesf2 = 0x400633c0 );
PROVIDE ( _Level2FromVector = 0x40000954 );
PROVIDE ( _Level2Vector = 0x40000180 );
PROVIDE ( _Level3FromVector = 0x40000a28 );
PROVIDE ( _Level3Vector = 0x400001c0 );
PROVIDE ( _Level4FromVector = 0x40000af8 );
PROVIDE ( _Level4Vector = 0x40000200 );
PROVIDE ( _Level5FromVector = 0x40000c68 );
PROVIDE ( _Level5Vector = 0x40000240 );
PROVIDE ( _LevelOneInterrupt = 0x40000835 );
PROVIDE ( _link_r = 0x4000bc9c );
PROVIDE ( llc_default_handler = 0x3ff98b3c );
PROVIDE ( llc_default_state_tab_p_get = 0x40046058 );
@ -436,10 +327,7 @@ PROVIDE ( memccpy = 0x4000c220 );
PROVIDE ( memchr = 0x4000c244 );
PROVIDE ( memcmp = 0x4000c260 );
PROVIDE ( memcpy = 0x4000c2c8 );
PROVIDE ( MemDwnLdStartMsgProc = 0x40008948 );
PROVIDE ( MemDwnLdStopReqMsgProc = 0x400089dc );
PROVIDE ( memmove = 0x4000c3c0 );
PROVIDE ( MemPacketSendReqMsgProc = 0x40008978 );
PROVIDE ( memrchr = 0x4000c400 );
PROVIDE ( memset = 0x4000c44c );
PROVIDE ( mktime = 0x4005a5e8 );
@ -469,7 +357,6 @@ PROVIDE ( __negsf2 = 0x400020c0 );
PROVIDE ( __negvdi2 = 0x40002e98 );
PROVIDE ( __negvsi2 = 0x40002e78 );
PROVIDE ( __nesf2 = 0x40063374 );
PROVIDE ( _NMIExceptionVector = 0x400002c0 );
PROVIDE ( notEqual256 = 0x40015b04 );
PROVIDE ( __nsau_data = 0x3ff96544 );
PROVIDE ( one_bits = 0x3ff971f8 );
@ -521,7 +408,6 @@ PROVIDE ( r_co_list_push_front = 0x40013ff4 );
PROVIDE ( r_co_list_size = 0x400142ac );
PROVIDE ( r_co_nb_good_channels = 0x40014360 );
PROVIDE ( r_co_slot_to_duration = 0x40014348 );
PROVIDE ( RcvMsg = 0x4000954c );
PROVIDE ( r_dbg_init = 0x40014394 );
PROVIDE ( r_dbg_platform_reset_complete = 0x400143d0 );
PROVIDE ( r_dbg_swdiag_init = 0x40014470 );
@ -560,15 +446,12 @@ PROVIDE ( r_ecc_gen_new_secret_key = 0x400170e4 );
PROVIDE ( r_ecc_get_debug_Keys = 0x40017224 );
PROVIDE ( r_ecc_init = 0x40016dbc );
PROVIDE ( RecvBuff = 0x3ffe009c );
PROVIDE ( recv_packet = 0x40009424 );
PROVIDE ( r_em_buf_init = 0x4001729c );
PROVIDE ( r_em_buf_rx_buff_addr_get = 0x400173e8 );
PROVIDE ( r_em_buf_rx_free = 0x400173c4 );
PROVIDE ( r_em_buf_tx_buff_addr_get = 0x40017404 );
PROVIDE ( r_em_buf_tx_free = 0x4001741c );
PROVIDE ( _rename_r = 0x4000bc28 );
PROVIDE ( _ResetHandler = 0x40000450 );
PROVIDE ( _ResetVector = 0x40000400 );
PROVIDE ( r_F1_256 = 0x400133e4 );
PROVIDE ( r_F2_256 = 0x40013568 );
PROVIDE ( r_F3_256 = 0x40013664 );
@ -1351,7 +1234,6 @@ PROVIDE ( rom_iq_est_disable = 0x40005590 );
PROVIDE ( rom_iq_est_enable = 0x40005514 );
PROVIDE ( rom_linear_to_db = 0x40005f64 );
PROVIDE ( rom_loopback_mode_en = 0x400030f8 );
PROVIDE ( rom_main = 0x400076c4 );
PROVIDE ( rom_meas_tone_pwr_db = 0x40006004 );
PROVIDE ( rom_mhz2ieee = 0x4000404c );
PROVIDE ( rom_noise_floor_auto_set = 0x40003bdc );
@ -1458,10 +1340,6 @@ PROVIDE ( r_rwip_wakeup_delay_set = 0x40055e4c );
PROVIDE ( r_rwip_wakeup_end = 0x40055e18 );
PROVIDE ( r_rwip_wlcoex_set = 0x40055f60 );
PROVIDE ( r_SHA_256 = 0x40013a90 );
PROVIDE ( rtc_boot_control = 0x4000821c );
PROVIDE ( rtc_get_reset_reason = 0x400081d4 );
PROVIDE ( rtc_get_wakeup_cause = 0x400081f4 );
PROVIDE ( rtc_select_apb_bridge = 0x40008288 );
PROVIDE ( rwip_coex_cfg = 0x3ff9914c );
PROVIDE ( rwip_priority = 0x3ff99159 );
PROVIDE ( rwip_rf = 0x3ffbdb28 );
@ -1473,13 +1351,10 @@ PROVIDE ( __sccl = 0x4000c498 );
PROVIDE ( __sclose = 0x400011b8 );
PROVIDE ( SelectSpiFunction = 0x40061f84 );
PROVIDE ( SelectSpiQIO = 0x40061ddc );
PROVIDE ( SendMsg = 0x40009384 );
PROVIDE ( send_packet = 0x40009340 );
PROVIDE ( __seofread = 0x40001148 );
PROVIDE ( setjmp = 0x40056268 );
PROVIDE ( setlocale = 0x40059568 );
PROVIDE ( _setlocale_r = 0x4005950c );
PROVIDE ( set_rtc_memory_crc = 0x40008208 );
PROVIDE ( SetSpiDrvs = 0x40061e78 );
PROVIDE ( __sf_fake_stderr = 0x3ff96458 );
PROVIDE ( __sf_fake_stdin = 0x3ff96498 );
@ -1528,8 +1403,6 @@ PROVIDE ( slc_send_to_host_chain = 0x4000b6a0 );
PROVIDE ( slc_set_host_io_max_window = 0x4000b89c );
PROVIDE ( slc_to_host_chain_recycle = 0x4000b758 );
PROVIDE ( __smakebuf_r = 0x40059108 );
PROVIDE ( software_reset = 0x4000824c );
PROVIDE ( software_reset_cpu = 0x40008264 );
PROVIDE ( specialModP256 = 0x4001600c );
PROVIDE ( spi_cache_sram_init = 0x400626e4 );
PROVIDE ( SPIClkConfig = 0x40062bc8 );
@ -1629,7 +1502,6 @@ PROVIDE ( __swbuf_r = 0x40058bec );
PROVIDE ( __swrite = 0x40001150 );
PROVIDE ( __swsetup_r = 0x40058cc8 );
PROVIDE ( sw_to_hw = 0x3ffb8d40 );
PROVIDE ( _SyscallException = 0x400007cf );
PROVIDE ( syscall_table_ptr_app = 0x3ffae020 );
PROVIDE ( syscall_table_ptr_pro = 0x3ffae024 );
PROVIDE ( _system_r = 0x4000bc10 );
@ -1660,31 +1532,7 @@ PROVIDE ( _tzname = 0x3ffae030 );
PROVIDE ( tzset = 0x40001a1c );
PROVIDE ( _tzset_r = 0x40001a28 );
PROVIDE ( __tz_unlock = 0x40001a10 );
PROVIDE ( uartAttach = 0x40008fd0 );
PROVIDE ( uart_baudrate_detect = 0x40009034 );
PROVIDE ( uart_buff_switch = 0x400093c0 );
PROVIDE ( UartConnCheck = 0x40008738 );
PROVIDE ( UartConnectProc = 0x40008a04 );
PROVIDE ( UartDev = 0x3ffe019c );
PROVIDE ( uart_div_modify = 0x400090cc );
PROVIDE ( UartDwnLdProc = 0x40008ce8 );
PROVIDE ( UartGetCmdLn = 0x40009564 );
PROVIDE ( Uart_Init = 0x40009120 );
PROVIDE ( UartRegReadProc = 0x40008a58 );
PROVIDE ( UartRegWriteProc = 0x40008a14 );
PROVIDE ( uart_rx_intr_handler = 0x40008f4c );
PROVIDE ( uart_rx_one_char = 0x400092d0 );
PROVIDE ( uart_rx_one_char_block = 0x400092a4 );
PROVIDE ( uart_rx_readbuff = 0x40009394 );
PROVIDE ( UartRxString = 0x400092fc );
PROVIDE ( UartSetBaudProc = 0x40008aac );
PROVIDE ( UartSpiAttachProc = 0x40008a6c );
PROVIDE ( UartSpiReadProc = 0x40008a80 );
PROVIDE ( uart_tx_flush = 0x40009258 );
PROVIDE ( uart_tx_one_char = 0x40009200 );
PROVIDE ( uart_tx_one_char2 = 0x4000922c );
PROVIDE ( uart_tx_switch = 0x40009028 );
PROVIDE ( uart_tx_wait_idle = 0x40009278 );
PROVIDE ( __ucmpdi2 = 0x40063840 );
PROVIDE ( __udivdi3 = 0x4000cff8 );
PROVIDE ( __udivmoddi4 = 0x40064ab0 );
@ -1699,21 +1547,13 @@ PROVIDE ( _unlink_r = 0x4000bc84 );
PROVIDE ( __unorddf2 = 0x400637f4 );
PROVIDE ( __unordsf2 = 0x40063478 );
PROVIDE ( user_code_start = 0x3ffe0400 );
PROVIDE ( _UserExceptionVector = 0x40000340 );
PROVIDE ( utoa = 0x40056258 );
PROVIDE ( __utoa = 0x400561f0 );
PROVIDE ( VerifyFlashMd5Proc = 0x40008c44 );
PROVIDE ( veryBigHexP256 = 0x3ff9736c );
PROVIDE ( wcrtomb = 0x40058920 );
PROVIDE ( _wcrtomb_r = 0x400588d8 );
PROVIDE ( __wctomb = 0x3ff96540 );
PROVIDE ( _wctomb_r = 0x40058f14 );
PROVIDE ( _WindowOverflow12 = 0x40000100 );
PROVIDE ( _WindowOverflow4 = 0x40000000 );
PROVIDE ( _WindowOverflow8 = 0x40000080 );
PROVIDE ( _WindowUnderflow12 = 0x40000140 );
PROVIDE ( _WindowUnderflow4 = 0x40000040 );
PROVIDE ( _WindowUnderflow8 = 0x400000c0 );
PROVIDE ( write = 0x4000181c );
PROVIDE ( _write_r = 0x4000bd70 );
PROVIDE ( xthal_bcopy = 0x4000c098 );
@ -1729,12 +1569,38 @@ PROVIDE ( xthal_set_intclear = 0x4000c1ec );
PROVIDE ( _xtos_set_intlevel = 0x4000bfdc );
PROVIDE ( g_ticks_per_us_pro = 0x3ffe01e0 );
PROVIDE ( g_ticks_per_us_app = 0x3ffe40f0 );
/*
These functions are xtos-related (or call xtos-related functions) and do not play well
with multicore FreeRTOS. Where needed, we provide alternatives that are multicore
compatible.
compatible. These functions also use a chunk of static RAM, by not using them we can
allocate that RAM for general use.
*/
/*
PROVIDE ( _DebugExceptionVector = 0x40000280 );
PROVIDE ( _DoubleExceptionVector = 0x400003c0 );
PROVIDE ( _KernelExceptionVector = 0x40000300 );
PROVIDE ( _GeneralException = 0x40000e14 );
PROVIDE ( _ResetHandler = 0x40000450 );
PROVIDE ( _ResetVector = 0x40000400 );
PROVIDE ( _UserExceptionVector = 0x40000340 );
PROVIDE ( _NMIExceptionVector = 0x400002c0 );
PROVIDE ( _WindowOverflow12 = 0x40000100 );
PROVIDE ( _WindowOverflow4 = 0x40000000 );
PROVIDE ( _WindowOverflow8 = 0x40000080 );
PROVIDE ( _WindowUnderflow12 = 0x40000140 );
PROVIDE ( _WindowUnderflow4 = 0x40000040 );
PROVIDE ( _WindowUnderflow8 = 0x400000c0 );
PROVIDE ( _Level2FromVector = 0x40000954 );
PROVIDE ( _Level3FromVector = 0x40000a28 );
PROVIDE ( _Level4FromVector = 0x40000af8 );
PROVIDE ( _Level5FromVector = 0x40000c68 );
PROVIDE ( _Level2Vector = 0x40000180 );
PROVIDE ( _Level3Vector = 0x400001c0 );
PROVIDE ( _Level4Vector = 0x40000200 );
PROVIDE ( _Level5Vector = 0x40000240 );
PROVIDE ( _LevelOneInterrupt = 0x40000835 );
PROVIDE ( _SyscallException = 0x400007cf );
PROVIDE ( _xtos_alloca_handler = 0x40000010 );
PROVIDE ( _xtos_cause3_handler = 0x40000dd8 );
PROVIDE ( _xtos_c_handler_table = 0x3ffe0548 );
@ -1760,12 +1626,164 @@ PROVIDE ( _xtos_unhandled_exception = 0x4000c024 );
PROVIDE ( _xtos_unhandled_interrupt = 0x4000c01c );
PROVIDE ( _xtos_vpri_enabled = 0x3ffe0654 );
PROVIDE ( ets_intr_count = 0x3ffe03fc );
*/
/* These functions are part of the UART downloader but also contain general UART functions. */
PROVIDE ( FilePacketSendDeflatedReqMsgProc = 0x40008b24 );
PROVIDE ( FilePacketSendReqMsgProc = 0x40008860 );
PROVIDE ( FlashDwnLdDeflatedStartMsgProc = 0x40008ad8 );
PROVIDE ( FlashDwnLdParamCfgMsgProc = 0x4000891c );
PROVIDE ( FlashDwnLdStartMsgProc = 0x40008820 );
PROVIDE ( FlashDwnLdStopDeflatedReqMsgProc = 0x40008c18 );
PROVIDE ( FlashDwnLdStopReqMsgProc = 0x400088ec );
PROVIDE ( MemDwnLdStartMsgProc = 0x40008948 );
PROVIDE ( MemDwnLdStopReqMsgProc = 0x400089dc );
PROVIDE ( MemPacketSendReqMsgProc = 0x40008978 );
PROVIDE ( uart_baudrate_detect = 0x40009034 );
PROVIDE ( uart_buff_switch = 0x400093c0 );
PROVIDE ( UartConnCheck = 0x40008738 );
PROVIDE ( UartConnectProc = 0x40008a04 );
PROVIDE ( UartDwnLdProc = 0x40008ce8 );
PROVIDE ( UartRegReadProc = 0x40008a58 );
PROVIDE ( UartRegWriteProc = 0x40008a14 );
PROVIDE ( UartSetBaudProc = 0x40008aac );
PROVIDE ( UartSpiAttachProc = 0x40008a6c );
PROVIDE ( UartSpiReadProc = 0x40008a80 );
PROVIDE ( VerifyFlashMd5Proc = 0x40008c44 );
PROVIDE ( GetUartDevice = 0x40009598 );
PROVIDE ( RcvMsg = 0x4000954c );
PROVIDE ( SendMsg = 0x40009384 );
PROVIDE ( UartGetCmdLn = 0x40009564 );
PROVIDE ( UartRxString = 0x400092fc );
PROVIDE ( Uart_Init = 0x40009120 );
PROVIDE ( recv_packet = 0x40009424 );
PROVIDE ( send_packet = 0x40009340 );
PROVIDE ( uartAttach = 0x40008fd0 );
PROVIDE ( uart_div_modify = 0x400090cc );
PROVIDE ( uart_rx_intr_handler = 0x40008f4c );
PROVIDE ( uart_rx_one_char = 0x400092d0 );
PROVIDE ( uart_rx_one_char_block = 0x400092a4 );
PROVIDE ( uart_rx_readbuff = 0x40009394 );
PROVIDE ( uart_tx_flush = 0x40009258 );
PROVIDE ( uart_tx_one_char = 0x40009200 );
PROVIDE ( uart_tx_one_char2 = 0x4000922c );
PROVIDE ( uart_tx_switch = 0x40009028 );
PROVIDE ( uart_tx_wait_idle = 0x40009278 );
/*
These functions are part of the ROM GPIO driver. We do not use them; the provided esp-idf functions
replace them and this way we can re-use the fixed RAM addresses these routines need.
*/
/* <-- So you don't read over it: This comment disables the next lines.
PROVIDE ( gpio_init = 0x40009c20 );
PROVIDE ( gpio_intr_ack = 0x40009dd4 );
PROVIDE ( gpio_intr_ack_high = 0x40009e1c );
PROVIDE ( gpio_intr_handler_register = 0x40009e6c );
PROVIDE ( gpio_intr_pending = 0x40009cec );
PROVIDE ( gpio_intr_pending_high = 0x40009cf8 );
PROVIDE ( gpio_pending_mask = 0x3ffe0038 );
PROVIDE ( gpio_pending_mask_high = 0x3ffe0044 );
PROVIDE ( gpio_pin_intr_state_set = 0x40009d04 );
PROVIDE ( gpio_pin_wakeup_disable = 0x40009eb0 );
PROVIDE ( gpio_pin_wakeup_enable = 0x40009e7c );
PROVIDE ( gpio_register_get = 0x40009cbc );
PROVIDE ( gpio_register_set = 0x40009bbc );
*/
/* These are still part of that driver, but have been verified not to use static RAM, so they can be used. */
PROVIDE ( gpio_output_set = 0x40009b24 );
PROVIDE ( gpio_output_set_high = 0x40009b5c );
PROVIDE ( gpio_input_get = 0x40009b88 );
PROVIDE ( gpio_input_get_high = 0x40009b9c );
PROVIDE ( gpio_matrix_in = 0x40009edc );
PROVIDE ( gpio_matrix_out = 0x40009f0c );
PROVIDE ( gpio_pad_select_gpio = 0x40009fdc );
PROVIDE ( gpio_pad_set_drv = 0x4000a11c );
PROVIDE ( gpio_pad_pulldown = 0x4000a348 );
PROVIDE ( gpio_pad_pullup = 0x4000a22c );
PROVIDE ( gpio_pad_hold = 0x4000a734 );
PROVIDE ( gpio_pad_unhold = 0x4000a484 );
/*
These functions are part of the non-os kernel (etsc).
*/
PROVIDE ( ets_aes_crypt = 0x4005c9b8 );
PROVIDE ( ets_aes_disable = 0x4005c8f8 );
PROVIDE ( ets_aes_enable = 0x4005c8cc );
PROVIDE ( ets_aes_set_endian = 0x4005c928 );
PROVIDE ( ets_aes_setkey_dec = 0x4005c994 );
PROVIDE ( ets_aes_setkey_enc = 0x4005c97c );
PROVIDE ( ets_bigint_disable = 0x4005c4e0 );
PROVIDE ( ets_bigint_enable = 0x4005c498 );
PROVIDE ( ets_bigint_mod_mult_getz = 0x4005c818 );
PROVIDE ( ets_bigint_mod_mult_prepare = 0x4005c7b4 );
PROVIDE ( ets_bigint_mod_power_getz = 0x4005c614 );
PROVIDE ( ets_bigint_mod_power_prepare = 0x4005c54c );
PROVIDE ( ets_bigint_montgomery_mult_getz = 0x4005c7a4 );
PROVIDE ( ets_bigint_montgomery_mult_prepare = 0x4005c6fc );
PROVIDE ( ets_bigint_mult_getz = 0x4005c6e8 );
PROVIDE ( ets_bigint_mult_prepare = 0x4005c630 );
PROVIDE ( ets_bigint_wait_finish = 0x4005c520 );
PROVIDE ( ets_post = 0x4000673c );
PROVIDE ( ets_run = 0x400066bc );
PROVIDE ( ets_set_idle_cb = 0x40006674 );
PROVIDE ( ets_task = 0x40006688 );
PROVIDE ( ets_efuse_get_8M_clock = 0x40008710 );
PROVIDE ( ets_efuse_get_spiconfig = 0x40008658 );
PROVIDE ( ets_efuse_program_op = 0x40008628 );
PROVIDE ( ets_efuse_read_op = 0x40008600 );
PROVIDE ( ets_intr_lock = 0x400067b0 );
PROVIDE ( ets_intr_unlock = 0x400067c4 );
PROVIDE ( ets_isr_attach = 0x400067ec );
PROVIDE ( ets_isr_mask = 0x400067fc );
PROVIDE ( ets_isr_unmask = 0x40006808 );
*/
PROVIDE ( ets_waiti0 = 0x400067d8 );
PROVIDE ( intr_matrix_set = 0x4000681c );
PROVIDE ( check_pos = 0x400068b8 );
PROVIDE ( ets_set_appcpu_boot_addr = 0x4000689c );
PROVIDE ( ets_set_startup_callback = 0x4000688c );
PROVIDE ( ets_set_user_start = 0x4000687c );
PROVIDE ( ets_unpack_flash_code = 0x40007018 );
PROVIDE ( ets_unpack_flash_code_legacy = 0x4000694c );
PROVIDE ( rom_main = 0x400076c4 );
PROVIDE ( ets_install_putc1 = 0x40007d18 );
PROVIDE ( ets_install_putc2 = 0x40007d38 );
PROVIDE ( ets_install_uart_printf = 0x40007d28 );
PROVIDE ( ets_printf = 0x40007d54 );
PROVIDE ( rtc_boot_control = 0x4000821c );
PROVIDE ( rtc_get_reset_reason = 0x400081d4 );
PROVIDE ( rtc_get_wakeup_cause = 0x400081f4 );
PROVIDE ( rtc_select_apb_bridge = 0x40008288 );
PROVIDE ( set_rtc_memory_crc = 0x40008208 );
PROVIDE ( software_reset = 0x4000824c );
PROVIDE ( software_reset_cpu = 0x40008264 );
PROVIDE ( ets_secure_boot_check = 0x4005cb40 );
PROVIDE ( ets_secure_boot_check_finish = 0x4005cc04 );
PROVIDE ( ets_secure_boot_check_start = 0x4005cbcc );
PROVIDE ( ets_secure_boot_finish = 0x4005ca84 );
PROVIDE ( ets_secure_boot_hash = 0x4005cad4 );
PROVIDE ( ets_secure_boot_obtain = 0x4005cb14 );
PROVIDE ( ets_secure_boot_rd_abstract = 0x4005cba8 );
PROVIDE ( ets_secure_boot_rd_iv = 0x4005cb84 );
PROVIDE ( ets_secure_boot_start = 0x4005ca34 );
PROVIDE ( ets_sha_disable = 0x4005c0a8 );
PROVIDE ( ets_sha_enable = 0x4005c07c );
PROVIDE ( ets_sha_finish = 0x4005c104 );
PROVIDE ( ets_sha_init = 0x4005c0d4 );
PROVIDE ( ets_sha_update = 0x4005c2a0 );
PROVIDE ( ets_delay_us = 0x40008534 );
PROVIDE ( ets_get_cpu_frequency = 0x4000855c );
PROVIDE ( ets_get_detected_xtal_freq = 0x40008588 );
PROVIDE ( ets_get_xtal_scale = 0x4000856c );
PROVIDE ( ets_timer_arm = 0x40008368 );
PROVIDE ( ets_timer_arm_us = 0x400083ac );
PROVIDE ( ets_timer_disarm = 0x400083ec );
PROVIDE ( ets_timer_done = 0x40008428 );
PROVIDE ( ets_timer_handler_isr = 0x40008454 );
PROVIDE ( ets_timer_init = 0x400084e8 );
PROVIDE ( ets_timer_setfn = 0x40008350 );
PROVIDE ( ets_update_cpu_frequency_rom = 0x40008550 ); /* Updates g_ticks_per_us on the current CPU only; not on the other core */
/* Following are static data, but can be used, not generated by script <<<<< btdm data */
PROVIDE ( ld_acl_env = 0x3ffb8258 );
PROVIDE ( ld_active_ch_map = 0x3ffb8334 );
@ -1785,3 +1803,4 @@ PROVIDE ( ld_sco_env = 0x3ffb824c );
PROVIDE ( ld_sscan_env = 0x3ffb832c );
PROVIDE ( ld_strain_env = 0x3ffb8330 );
/* Above are static data, but can be used, not generated by script >>>>> btdm data */

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