diff --git a/.github/scripts/install-platformio-esp32.sh b/.github/scripts/install-platformio-esp32.sh
index d83859c9..b48e6bfa 100755
--- a/.github/scripts/install-platformio-esp32.sh
+++ b/.github/scripts/install-platformio-esp32.sh
@@ -1,7 +1,7 @@
 #!/bin/bash
 
 export PLATFORMIO_ESP32_PATH="$HOME/.platformio/packages/framework-arduinoespressif32"
-PLATFORMIO_ESP32_URL="https://github.com/platformio/platform-espressif32.git#feature/idf-v4.0"
+PLATFORMIO_ESP32_URL="https://github.com/platformio/platform-espressif32.git#feature/idf-master"
 
 echo "Installing Python Wheel ..."
 pip install wheel > /dev/null 2>&1
diff --git a/cores/esp32/USB.cpp b/cores/esp32/USB.cpp
index 15a06e4c..066982f6 100644
--- a/cores/esp32/USB.cpp
+++ b/cores/esp32/USB.cpp
@@ -51,7 +51,7 @@ static uint16_t load_dfu_descriptor(uint8_t * dst, uint8_t * itf)
     return TUD_DFU_RT_DESC_LEN;
 }
 // Invoked on DFU_DETACH request to reboot to the bootloader
-void tud_dfu_rt_reboot_to_dfu(void)
+void tud_dfu_runtime_reboot_to_dfu_cb(void)
 {
     usb_persist_restart(RESTART_BOOTLOADER_DFU);
 }
diff --git a/libraries/WebServer/src/WebServer.cpp b/libraries/WebServer/src/WebServer.cpp
index 9b29f3e2..9f29ff9d 100644
--- a/libraries/WebServer/src/WebServer.cpp
+++ b/libraries/WebServer/src/WebServer.cpp
@@ -123,9 +123,9 @@ static String md5str(String &in){
     return String(out);
   memset(_buf, 0x00, 16);
   mbedtls_md5_init(&_ctx);
-  mbedtls_md5_starts(&_ctx);
-  mbedtls_md5_update(&_ctx, (const uint8_t *)in.c_str(), in.length());
-  mbedtls_md5_finish(&_ctx, _buf);
+  mbedtls_md5_starts_ret(&_ctx);
+  mbedtls_md5_update_ret(&_ctx, (const uint8_t *)in.c_str(), in.length());
+  mbedtls_md5_finish_ret(&_ctx, _buf);
   for(i = 0; i < 16; i++) {
     sprintf(out + (i * 2), "%02x", _buf[i]);
   }
diff --git a/platform.txt b/platform.txt
index 7ad7c472..da61105a 100644
--- a/platform.txt
+++ b/platform.txt
@@ -23,12 +23,12 @@ compiler.prefix={build.tarch}-{build.target}-elf-
 #
 # ESP32 Support Start
 #
-compiler.cpreprocessor.flags.esp32=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4-dev-960-gcf457d412" -DESP_PLATFORM   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/port/xtensa/include" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32" "-I{compiler.sdk.path}/include/soc/esp32/include" "-I{compiler.sdk.path}/include/hal/esp32/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/esp32" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/esp32/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32/include" "-I{compiler.sdk.path}/include/xtensa/include" "-I{compiler.sdk.path}/include/xtensa/esp32/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_wifi/esp32/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/xtensa" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/xtensa" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/include/esp_supplicant" "-I{compiler.sdk.path}/include/perfmon/include" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/bt/common/osi/include" "-I{compiler.sdk.path}/include/bt/include/esp32/include" "-I{compiler.sdk.path}/include/bt/host/bluedroid/api/include/api" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/port/include/coap" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/coap/libcoap/include/coap2" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/ulp/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/button/button/include" "-I{compiler.sdk.path}/include/json_parser" "-I{compiler.sdk.path}/include/json_parser/jsmn/include" "-I{compiler.sdk.path}/include/json_generator" "-I{compiler.sdk.path}/include/esp_schedule/include" "-I{compiler.sdk.path}/include/esp_rainmaker/include" "-I{compiler.sdk.path}/include/qrcode/include" "-I{compiler.sdk.path}/include/ws2812_led" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dotprod/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/support/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/hann/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_harris/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/flat_top/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/iir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/add/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sub/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mul/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/addc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mulc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sqrt/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/matrix/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fft/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dct/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/conv/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/common/include" "-I{compiler.sdk.path}/include/esp-face/face_detection/include" "-I{compiler.sdk.path}/include/esp-face/face_recognition/include" "-I{compiler.sdk.path}/include/esp-face/object_detection/include" "-I{compiler.sdk.path}/include/esp-face/image_util/include" "-I{compiler.sdk.path}/include/esp-face/pose_estimation/include" "-I{compiler.sdk.path}/include/esp-face/lib/include" "-I{compiler.sdk.path}/include/esp32-camera/driver/include" "-I{compiler.sdk.path}/include/esp32-camera/conversions/include" "-I{compiler.sdk.path}/include/fb_gfx/include"
-compiler.c.elf.libs.esp32=-lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lbt -lcbor -lunity -lcmock -lcoap -lconsole -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lspiffs -lulp -lwifi_provisioning -lbutton -ljson_parser -ljson_generator -lesp_schedule -lesp_rainmaker -lqrcode -lws2812_led -lesp_littlefs -lesp-dsp -lesp-face -lesp32-camera -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_hid -lesp_local_ctrl -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lbutton -lesp_rainmaker -lmqtt -lwifi_provisioning -lprotocomm -lprotobuf-c -ljson -ljson_parser -ljson_generator -lesp_schedule -lqrcode -lws2812_led -lesp-dsp -lesp-face -lpe -lfd -lfr -ldetection_cat_face -ldetection -ldl -lesp32-camera -lfb_gfx -lbt -lbtdm_app -lesp_adc_cal -lmdns -lconsole -lfatfs -lwear_levelling -lopenssl -lspiffs -lesp_littlefs -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lrtc -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lrtc -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lrtc -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lrtc -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lrtc -lxt_hal -lm -lnewlib -lgcc -lstdc++ -lpthread -lapp_trace -lgcov -lapp_trace -lgcov -lc 
+compiler.cpreprocessor.flags.esp32=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4-dev-1404-gc13afea63" -DESP_PLATFORM   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/port/xtensa/include" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32" "-I{compiler.sdk.path}/include/soc/esp32/include" "-I{compiler.sdk.path}/include/hal/esp32/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/esp32" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/esp32/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32/include" "-I{compiler.sdk.path}/include/xtensa/include" "-I{compiler.sdk.path}/include/xtensa/esp32/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_wifi/esp32/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/xtensa" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/xtensa" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/include/esp_supplicant" "-I{compiler.sdk.path}/include/perfmon/include" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/bt/common/osi/include" "-I{compiler.sdk.path}/include/bt/include/esp32/include" "-I{compiler.sdk.path}/include/bt/host/bluedroid/api/include/api" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/port/include/coap" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/coap/libcoap/include/coap2" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_lcd/include" "-I{compiler.sdk.path}/include/esp_lcd/interface" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/ulp/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/button/button/include" "-I{compiler.sdk.path}/include/json_parser" "-I{compiler.sdk.path}/include/json_parser/jsmn/include" "-I{compiler.sdk.path}/include/json_generator" "-I{compiler.sdk.path}/include/esp_schedule/include" "-I{compiler.sdk.path}/include/esp_rainmaker/include" "-I{compiler.sdk.path}/include/qrcode/include" "-I{compiler.sdk.path}/include/ws2812_led" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dotprod/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/support/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/hann/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_harris/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/flat_top/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/iir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/add/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sub/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mul/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/addc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mulc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sqrt/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/matrix/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fft/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dct/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/conv/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/common/include" "-I{compiler.sdk.path}/include/esp-face/face_detection/include" "-I{compiler.sdk.path}/include/esp-face/face_recognition/include" "-I{compiler.sdk.path}/include/esp-face/object_detection/include" "-I{compiler.sdk.path}/include/esp-face/image_util/include" "-I{compiler.sdk.path}/include/esp-face/pose_estimation/include" "-I{compiler.sdk.path}/include/esp-face/lib/include" "-I{compiler.sdk.path}/include/esp32-camera/driver/include" "-I{compiler.sdk.path}/include/esp32-camera/conversions/include" "-I{compiler.sdk.path}/include/fb_gfx/include"
+compiler.c.elf.libs.esp32=-lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lbt -lcbor -lunity -lcmock -lcoap -lconsole -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_lcd -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lspiffs -lulp -lwifi_provisioning -lbutton -ljson_parser -ljson_generator -lesp_schedule -lesp_rainmaker -lqrcode -lws2812_led -lesp_littlefs -lesp-dsp -lesp-face -lesp32-camera -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_hid -lesp_lcd -lesp_local_ctrl -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lbutton -lesp_rainmaker -lmqtt -lwifi_provisioning -lprotocomm -lprotobuf-c -ljson -ljson_parser -ljson_generator -lesp_schedule -lqrcode -lws2812_led -lesp-dsp -lesp-face -lpe -lfd -lfr -ldetection_cat_face -ldetection -ldl -lesp32-camera -lfb_gfx -lbt -lbtdm_app -lesp_adc_cal -lmdns -lconsole -lfatfs -lwear_levelling -lopenssl -lspiffs -lesp_littlefs -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lrtc -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lrtc -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lrtc -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lrtc -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lperfmon -lesp32 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lrtc -lxt_hal -lm -lnewlib -lstdc++ -lpthread -lgcc -lcxx -lapp_trace -lgcov -lapp_trace -lgcov -lc 
 compiler.c.flags.esp32=-mlongcalls -Wno-frame-address -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -O2 -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -std=gnu99 -Wno-old-style-declaration  -MMD -c
 compiler.cpp.flags.esp32=-mlongcalls -Wno-frame-address -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -O2 -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -std=gnu++11 -fexceptions -fno-rtti  -MMD -c
 compiler.S.flags.esp32=-ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -O2 -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable  -x assembler-with-cpp -MMD -c
-compiler.c.elf.flags.esp32=-T esp32.rom.ld -T esp32.rom.api.ld -T esp32.rom.libgcc.ld -T esp32.rom.newlib-data.ld -T esp32.rom.syscalls.ld -T esp32_out.ld -T esp32.project.ld -T esp32.peripherals.ld  -mlongcalls -Wno-frame-address -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -Wl,--wrap=mbedtls_mpi_exp_mod -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u ld_include_panic_highint_hdl -u start_app -u start_app_other_cores -u vfs_include_syscalls_impl -u call_user_start_cpu0 -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -u __cxa_guard_dummy 
+compiler.c.elf.flags.esp32=-T esp32.rom.redefined.ld -T esp32.rom.ld -T esp32.rom.api.ld -T esp32.rom.libgcc.ld -T esp32.rom.newlib-data.ld -T esp32.rom.syscalls.ld -T esp32_out.ld -T esp32.project.ld -T esp32.peripherals.ld  -mlongcalls -Wno-frame-address -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -Wl,--wrap=mbedtls_mpi_exp_mod -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u ld_include_panic_highint_hdl -u start_app -u start_app_other_cores -u __ubsan_include -Wl,--wrap=longjmp -u vfs_include_syscalls_impl -u call_user_start_cpu0 -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -u __cxa_guard_dummy 
 compiler.ar.flags.esp32=cru
 build.extra_flags.esp32=-DARDUINO_SERIAL_PORT=0
 #
@@ -38,12 +38,12 @@ build.extra_flags.esp32=-DARDUINO_SERIAL_PORT=0
 #
 # ESP32S2 Support Start
 #
-compiler.cpreprocessor.flags.esp32s2=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4-dev-960-gcf457d412" -DESP_PLATFORM   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/port/xtensa/include" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32s2" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32s2/private_include" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32s2" "-I{compiler.sdk.path}/include/soc/esp32s2/include" "-I{compiler.sdk.path}/include/hal/esp32s2/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/esp32s2" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/esp32s2/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32s2/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32s2/include" "-I{compiler.sdk.path}/include/xtensa/include" "-I{compiler.sdk.path}/include/xtensa/esp32s2/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_wifi/esp32s2/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/xtensa" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32s2" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/xtensa" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/include/esp_supplicant" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/port/include/coap" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/coap/libcoap/include/coap2" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_https_server/include" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32s2" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/perfmon/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/touch_element/include" "-I{compiler.sdk.path}/include/ulp/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/freertos/include/freertos" "-I{compiler.sdk.path}/include/arduino_tinyusb/tinyusb/src" "-I{compiler.sdk.path}/include/arduino_tinyusb/include" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dotprod/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/support/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/hann/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_harris/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/flat_top/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/iir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/add/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sub/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mul/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/addc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mulc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sqrt/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/matrix/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fft/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dct/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/conv/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/common/include" "-I{compiler.sdk.path}/include/esp-face/face_detection/include" "-I{compiler.sdk.path}/include/esp-face/face_recognition/include" "-I{compiler.sdk.path}/include/esp-face/object_detection/include" "-I{compiler.sdk.path}/include/esp-face/image_util/include" "-I{compiler.sdk.path}/include/esp-face/pose_estimation/include" "-I{compiler.sdk.path}/include/esp-face/lib/include" "-I{compiler.sdk.path}/include/fb_gfx/include"
-compiler.c.elf.libs.esp32s2=-lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lcbor -lunity -lcmock -lcoap -lconsole -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_https_server -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lperfmon -lspiffs -ltouch_element -lulp -lusb -lwifi_provisioning -lesp_littlefs -lesp-dsp -lesp-face -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_hid -lesp_local_ctrl -lesp_https_server -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lmqtt -lperfmon -ltouch_element -lusb -lwifi_provisioning -lprotocomm -lprotobuf-c -ljson -lesp-dsp -lesp-face -lpe -lfd -lfr -ldetection_cat_face -ldetection -ldl -lfb_gfx -lesp_adc_cal -lmdns -lconsole -lfatfs -lwear_levelling -lopenssl -lspiffs -larduino_tinyusb -lesp_littlefs -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lxt_hal -lm -lnewlib -lgcc -lstdc++ -lpthread -lapp_trace -lgcov -lapp_trace -lgcov -lc 
+compiler.cpreprocessor.flags.esp32s2=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4-dev-1404-gc13afea63" -DESP_PLATFORM   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/port/xtensa/include" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32s2" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32s2/private_include" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32s2" "-I{compiler.sdk.path}/include/soc/esp32s2/include" "-I{compiler.sdk.path}/include/hal/esp32s2/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/esp32s2" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/esp32s2/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32s2/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32s2/include" "-I{compiler.sdk.path}/include/xtensa/include" "-I{compiler.sdk.path}/include/xtensa/esp32s2/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_wifi/esp32s2/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/xtensa" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32s2" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/xtensa" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/include/esp_supplicant" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/port/include/coap" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/coap/libcoap/include/coap2" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_https_server/include" "-I{compiler.sdk.path}/include/esp_lcd/include" "-I{compiler.sdk.path}/include/esp_lcd/interface" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32s2" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/perfmon/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/touch_element/include" "-I{compiler.sdk.path}/include/ulp/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/freertos/include/freertos" "-I{compiler.sdk.path}/include/arduino_tinyusb/tinyusb/src" "-I{compiler.sdk.path}/include/arduino_tinyusb/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dotprod/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/support/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/hann/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_harris/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/blackman_nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/nuttall/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/windows/flat_top/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/iir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fir/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/add/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sub/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mul/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/addc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/mulc/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/math/sqrt/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/matrix/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/fft/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/dct/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/conv/include" "-I{compiler.sdk.path}/include/esp-dsp/modules/common/include" "-I{compiler.sdk.path}/include/esp-face/face_detection/include" "-I{compiler.sdk.path}/include/esp-face/face_recognition/include" "-I{compiler.sdk.path}/include/esp-face/object_detection/include" "-I{compiler.sdk.path}/include/esp-face/image_util/include" "-I{compiler.sdk.path}/include/esp-face/pose_estimation/include" "-I{compiler.sdk.path}/include/esp-face/lib/include" "-I{compiler.sdk.path}/include/esp32-camera/driver/include" "-I{compiler.sdk.path}/include/esp32-camera/conversions/include" "-I{compiler.sdk.path}/include/fb_gfx/include"
+compiler.c.elf.libs.esp32s2=-lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lcbor -lunity -lcmock -lcoap -lconsole -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_https_server -lesp_lcd -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lperfmon -lspiffs -ltouch_element -lulp -lusb -lwifi_provisioning -lesp_littlefs -lesp-dsp -lesp-face -lesp32-camera -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_hid -lesp_lcd -lesp_local_ctrl -lesp_https_server -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lmqtt -lperfmon -ltouch_element -lusb -lwifi_provisioning -lprotocomm -lprotobuf-c -ljson -larduino_tinyusb -lesp-dsp -lesp-face -lpe -lfd -lfr -ldetection_cat_face -ldetection -ldl -lesp32-camera -lfb_gfx -lesp_adc_cal -lmdns -lconsole -lfatfs -lwear_levelling -lopenssl -lspiffs -lesp_littlefs -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lxtensa -lesp32s2 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lulp -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lxt_hal -lm -lnewlib -lstdc++ -lpthread -lgcc -lcxx -lapp_trace -lgcov -lapp_trace -lgcov -lc 
 compiler.c.flags.esp32s2=-mlongcalls -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -O2 -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -std=gnu99 -Wno-old-style-declaration  -MMD -c
 compiler.cpp.flags.esp32s2=-mlongcalls -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -O2 -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -std=gnu++11 -fexceptions -fno-rtti  -MMD -c
 compiler.S.flags.esp32s2=-ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -O2 -fstack-protector -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable  -x assembler-with-cpp -MMD -c
-compiler.c.elf.flags.esp32s2=-T esp32s2.rom.ld -T esp32s2.rom.api.ld -T esp32s2.rom.libgcc.ld -T esp32s2.rom.newlib-funcs.ld -T esp32s2.rom.newlib-data.ld -T esp32s2.rom.spiflash.ld -T esp32s2_out.ld -T esp32s2.project.ld -T esp32s2.peripherals.ld  -mlongcalls -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u ld_include_panic_highint_hdl -u start_app -u vfs_include_syscalls_impl -u call_user_start_cpu0 -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -u __cxa_guard_dummy 
+compiler.c.elf.flags.esp32s2=-T esp32s2.rom.ld -T esp32s2.rom.api.ld -T esp32s2.rom.libgcc.ld -T esp32s2.rom.newlib-funcs.ld -T esp32s2.rom.newlib-data.ld -T esp32s2.rom.spiflash.ld -T esp32s2_out.ld -T esp32s2.project.ld -T esp32s2.peripherals.ld  -mlongcalls -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u ld_include_panic_highint_hdl -u start_app -u __ubsan_include -Wl,--wrap=longjmp -u vfs_include_syscalls_impl -u call_user_start_cpu0 -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -u __cxa_guard_dummy 
 compiler.ar.flags.esp32s2=cru
 build.extra_flags.esp32s2=-DARDUINO_SERIAL_PORT={build.serial}
 #
@@ -53,12 +53,12 @@ build.extra_flags.esp32s2=-DARDUINO_SERIAL_PORT={build.serial}
 #
 # ESP32C3 Support Start
 #
-compiler.cpreprocessor.flags.esp32c3=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4-dev-960-gcf457d412" -DESP_PLATFORM   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/port/riscv/include" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32c3" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32c3/private_include" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32c3" "-I{compiler.sdk.path}/include/soc/esp32c3/include" "-I{compiler.sdk.path}/include/hal/esp32c3/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/esp32c3" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/esp32c3/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32c3/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32c3/include" "-I{compiler.sdk.path}/include/riscv/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_wifi/esp32c3/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/riscv" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32c3" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/riscv" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/include/esp_supplicant" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/bt/common/osi/include" "-I{compiler.sdk.path}/include/bt/include/esp32c3/include" "-I{compiler.sdk.path}/include/bt/host/bluedroid/api/include/api" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/port/include/coap" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/coap/libcoap/include/coap2" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_https_server/include" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32c3" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/fb_gfx/include"
-compiler.c.elf.libs.esp32c3=-lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lbt -lcbor -lunity -lcmock -lcoap -lconsole -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_https_server -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lspiffs -lwifi_provisioning -lesp_littlefs -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_hid -lesp_local_ctrl -lesp_https_server -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lmqtt -lwifi_provisioning -lprotocomm -lprotobuf-c -ljson -lfb_gfx -lbt -lbtdm_app -lbtbb -lesp_adc_cal -lmdns -lconsole -lfatfs -lwear_levelling -lopenssl -lspiffs -lesp_littlefs -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lm -lnewlib -lgcc -lstdc++ -lpthread -lapp_trace -lgcov -lapp_trace -lgcov -lc 
+compiler.cpreprocessor.flags.esp32c3=-DHAVE_CONFIG_H -DMBEDTLS_CONFIG_FILE="mbedtls/esp_config.h" -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX -D_GNU_SOURCE -DIDF_VER="v4.4-dev-1404-gc13afea63" -DESP_PLATFORM   "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/newlib/platform_include" "-I{compiler.sdk.path}/include/freertos/include" "-I{compiler.sdk.path}/include/freertos/port/riscv/include" "-I{compiler.sdk.path}/include/esp_hw_support/include" "-I{compiler.sdk.path}/include/esp_hw_support/include/soc" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32c3" "-I{compiler.sdk.path}/include/esp_hw_support/port/esp32c3/private_include" "-I{compiler.sdk.path}/include/heap/include" "-I{compiler.sdk.path}/include/log/include" "-I{compiler.sdk.path}/include/lwip/include/apps" "-I{compiler.sdk.path}/include/lwip/include/apps/sntp" "-I{compiler.sdk.path}/include/lwip/lwip/src/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include" "-I{compiler.sdk.path}/include/lwip/port/esp32/include/arch" "-I{compiler.sdk.path}/include/soc/include" "-I{compiler.sdk.path}/include/soc/esp32c3" "-I{compiler.sdk.path}/include/soc/esp32c3/include" "-I{compiler.sdk.path}/include/hal/esp32c3/include" "-I{compiler.sdk.path}/include/hal/include" "-I{compiler.sdk.path}/include/esp_rom/include" "-I{compiler.sdk.path}/include/esp_rom/esp32c3" "-I{compiler.sdk.path}/include/esp_common/include" "-I{compiler.sdk.path}/include/esp_system/include" "-I{compiler.sdk.path}/include/esp_system/port/soc" "-I{compiler.sdk.path}/include/esp_system/port/public_compat" "-I{compiler.sdk.path}/include/esp32c3/include" "-I{compiler.sdk.path}/include/driver/include" "-I{compiler.sdk.path}/include/driver/esp32c3/include" "-I{compiler.sdk.path}/include/esp_pm/include" "-I{compiler.sdk.path}/include/esp_ringbuf/include" "-I{compiler.sdk.path}/include/efuse/include" "-I{compiler.sdk.path}/include/efuse/esp32c3/include" "-I{compiler.sdk.path}/include/riscv/include" "-I{compiler.sdk.path}/include/vfs/include" "-I{compiler.sdk.path}/include/esp_wifi/include" "-I{compiler.sdk.path}/include/esp_wifi/esp32c3/include" "-I{compiler.sdk.path}/include/esp_event/include" "-I{compiler.sdk.path}/include/esp_netif/include" "-I{compiler.sdk.path}/include/esp_eth/include" "-I{compiler.sdk.path}/include/tcpip_adapter/include" "-I{compiler.sdk.path}/include/esp_timer/include" "-I{compiler.sdk.path}/include/mbedtls/port/include" "-I{compiler.sdk.path}/include/mbedtls/mbedtls/include" "-I{compiler.sdk.path}/include/mbedtls/esp_crt_bundle/include" "-I{compiler.sdk.path}/include/app_update/include" "-I{compiler.sdk.path}/include/spi_flash/include" "-I{compiler.sdk.path}/include/bootloader_support/include" "-I{compiler.sdk.path}/include/esp_ipc/include" "-I{compiler.sdk.path}/include/nvs_flash/include" "-I{compiler.sdk.path}/include/pthread/include" "-I{compiler.sdk.path}/include/esp_gdbstub/include" "-I{compiler.sdk.path}/include/esp_gdbstub/riscv" "-I{compiler.sdk.path}/include/esp_gdbstub/esp32c3" "-I{compiler.sdk.path}/include/espcoredump/include" "-I{compiler.sdk.path}/include/espcoredump/include/port/riscv" "-I{compiler.sdk.path}/include/wpa_supplicant/include" "-I{compiler.sdk.path}/include/wpa_supplicant/port/include" "-I{compiler.sdk.path}/include/wpa_supplicant/include/esp_supplicant" "-I{compiler.sdk.path}/include/app_trace/include" "-I{compiler.sdk.path}/include/asio/asio/asio/include" "-I{compiler.sdk.path}/include/asio/port/include" "-I{compiler.sdk.path}/include/bt/common/osi/include" "-I{compiler.sdk.path}/include/bt/include/esp32c3/include" "-I{compiler.sdk.path}/include/bt/host/bluedroid/api/include/api" "-I{compiler.sdk.path}/include/cbor/port/include" "-I{compiler.sdk.path}/include/unity/include" "-I{compiler.sdk.path}/include/unity/unity/src" "-I{compiler.sdk.path}/include/cmock/CMock/src" "-I{compiler.sdk.path}/include/coap/port/include" "-I{compiler.sdk.path}/include/coap/port/include/coap" "-I{compiler.sdk.path}/include/coap/libcoap/include" "-I{compiler.sdk.path}/include/coap/libcoap/include/coap2" "-I{compiler.sdk.path}/include/console" "-I{compiler.sdk.path}/include/nghttp/port/include" "-I{compiler.sdk.path}/include/nghttp/nghttp2/lib/includes" "-I{compiler.sdk.path}/include/esp-tls" "-I{compiler.sdk.path}/include/esp-tls/esp-tls-crypto" "-I{compiler.sdk.path}/include/esp_adc_cal/include" "-I{compiler.sdk.path}/include/esp_hid/include" "-I{compiler.sdk.path}/include/tcp_transport/include" "-I{compiler.sdk.path}/include/esp_http_client/include" "-I{compiler.sdk.path}/include/esp_http_server/include" "-I{compiler.sdk.path}/include/esp_https_ota/include" "-I{compiler.sdk.path}/include/esp_https_server/include" "-I{compiler.sdk.path}/include/esp_lcd/include" "-I{compiler.sdk.path}/include/esp_lcd/interface" "-I{compiler.sdk.path}/include/protobuf-c/protobuf-c" "-I{compiler.sdk.path}/include/protocomm/include/common" "-I{compiler.sdk.path}/include/protocomm/include/security" "-I{compiler.sdk.path}/include/protocomm/include/transports" "-I{compiler.sdk.path}/include/mdns/include" "-I{compiler.sdk.path}/include/esp_local_ctrl/include" "-I{compiler.sdk.path}/include/sdmmc/include" "-I{compiler.sdk.path}/include/esp_serial_slave_link/include" "-I{compiler.sdk.path}/include/esp_websocket_client/include" "-I{compiler.sdk.path}/include/expat/expat/expat/lib" "-I{compiler.sdk.path}/include/expat/port/include" "-I{compiler.sdk.path}/include/wear_levelling/include" "-I{compiler.sdk.path}/include/fatfs/diskio" "-I{compiler.sdk.path}/include/fatfs/vfs" "-I{compiler.sdk.path}/include/fatfs/src" "-I{compiler.sdk.path}/include/freemodbus/common/include" "-I{compiler.sdk.path}/include/idf_test/include" "-I{compiler.sdk.path}/include/idf_test/include/esp32c3" "-I{compiler.sdk.path}/include/jsmn/include" "-I{compiler.sdk.path}/include/json/cJSON" "-I{compiler.sdk.path}/include/libsodium/libsodium/src/libsodium/include" "-I{compiler.sdk.path}/include/libsodium/port_include" "-I{compiler.sdk.path}/include/mqtt/esp-mqtt/include" "-I{compiler.sdk.path}/include/openssl/include" "-I{compiler.sdk.path}/include/spiffs/include" "-I{compiler.sdk.path}/include/wifi_provisioning/include" "-I{compiler.sdk.path}/include/esp_littlefs/src" "-I{compiler.sdk.path}/include/esp_littlefs/include" "-I{compiler.sdk.path}/include/fb_gfx/include"
+compiler.c.elf.libs.esp32c3=-lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lasio -lbt -lcbor -lunity -lcmock -lcoap -lconsole -lnghttp -lesp-tls -lesp_adc_cal -lesp_hid -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lesp_https_server -lesp_lcd -lprotobuf-c -lprotocomm -lmdns -lesp_local_ctrl -lsdmmc -lesp_serial_slave_link -lesp_websocket_client -lexpat -lwear_levelling -lfatfs -lfreemodbus -ljsmn -ljson -llibsodium -lmqtt -lopenssl -lspiffs -lwifi_provisioning -lesp_littlefs -lfb_gfx -lasio -lcbor -lcmock -lunity -lcoap -lesp_hid -lesp_lcd -lesp_local_ctrl -lesp_https_server -lesp_websocket_client -lexpat -lfreemodbus -ljsmn -llibsodium -lmqtt -lwifi_provisioning -lprotocomm -lprotobuf-c -ljson -lfb_gfx -lbt -lbtdm_app -lbtbb -lesp_adc_cal -lmdns -lconsole -lfatfs -lwear_levelling -lopenssl -lspiffs -lesp_littlefs -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lmbedtls -lefuse -lapp_update -lbootloader_support -lesp_ipc -lspi_flash -lnvs_flash -lpthread -lesp_gdbstub -lespcoredump -lesp_system -lesp_rom -lhal -lvfs -lesp_eth -ltcpip_adapter -lesp_netif -lesp_event -lwpa_supplicant -lesp_wifi -llwip -llog -lheap -lsoc -lesp_hw_support -lesp_pm -lesp_ringbuf -ldriver -lriscv -lesp32c3 -lesp_common -lesp_timer -lfreertos -lnewlib -lcxx -lapp_trace -lnghttp -lesp-tls -ltcp_transport -lesp_http_client -lesp_http_server -lesp_https_ota -lsdmmc -lesp_serial_slave_link -lmbedtls -lmbedcrypto -lmbedx509 -lcoexist -lcore -lespnow -lmesh -lnet80211 -lpp -lsmartconfig -lwapi -lphy -lm -lnewlib -lstdc++ -lpthread -lgcc -lcxx -lapp_trace -lgcov -lapp_trace -lgcov -lc 
 compiler.c.flags.esp32c3=-march=rv32imc -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Wno-error=format= -nostartfiles -Wno-format -Og -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -std=gnu99 -Wno-old-style-declaration  -MMD -c
 compiler.cpp.flags.esp32c3=-march=rv32imc -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Wno-error=format= -nostartfiles -Wno-format -Og -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable -std=gnu++11 -fno-exceptions -fno-rtti  -MMD -c
 compiler.S.flags.esp32c3=-ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -ggdb -Wno-error=format= -nostartfiles -Wno-format -Og -fstrict-volatile-bitfields -Wno-error=unused-but-set-variable  -x assembler-with-cpp -MMD -c
-compiler.c.elf.flags.esp32c3=-T esp32c3.rom.ld -T esp32c3.rom.api.ld -T esp32c3.rom.libgcc.ld -T esp32c3.rom.newlib.ld -T esp32c3.rom.version.ld -T esp32c3_out.ld -T esp32c3.project.ld -T esp32c3.peripherals.ld  -nostartfiles -march=rv32imc --specs=nosys.specs -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -Wl,--wrap=mbedtls_mpi_exp_mod -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u start_app -u vfs_include_syscalls_impl -u call_user_start_cpu0 -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -u __cxa_guard_dummy -u __cxx_fatal_exception 
+compiler.c.elf.flags.esp32c3=-T esp32c3.rom.ld -T esp32c3.rom.api.ld -T esp32c3.rom.libgcc.ld -T esp32c3.rom.newlib.ld -T esp32c3.rom.version.ld -T esp32c3_out.ld -T esp32c3.project.ld -T esp32c3.peripherals.ld  -nostartfiles -march=rv32imc --specs=nosys.specs -Wl,--cref -Wl,--gc-sections -fno-rtti -fno-lto -Wl,--wrap=mbedtls_mpi_exp_mod -u esp_app_desc -u pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u pthread_include_pthread_local_storage_impl -u start_app -u __ubsan_include -u vfs_include_syscalls_impl -u call_user_start_cpu0 -Wl,--undefined=uxTopUsedPriority -u app_main -u newlib_include_heap_impl -u newlib_include_syscalls_impl -u newlib_include_pthread_impl -Wl,--wrap=_Unwind_SetEnableExceptionFdeSorting -Wl,--wrap=__register_frame_info_bases -Wl,--wrap=__register_frame_info -Wl,--wrap=__register_frame -Wl,--wrap=__register_frame_info_table_bases -Wl,--wrap=__register_frame_info_table -Wl,--wrap=__register_frame_table -Wl,--wrap=__deregister_frame_info_bases -Wl,--wrap=__deregister_frame_info -Wl,--wrap=_Unwind_Find_FDE -Wl,--wrap=_Unwind_GetGR -Wl,--wrap=_Unwind_GetCFA -Wl,--wrap=_Unwind_GetIP -Wl,--wrap=_Unwind_GetIPInfo -Wl,--wrap=_Unwind_GetRegionStart -Wl,--wrap=_Unwind_GetDataRelBase -Wl,--wrap=_Unwind_GetTextRelBase -Wl,--wrap=_Unwind_SetIP -Wl,--wrap=_Unwind_SetGR -Wl,--wrap=_Unwind_GetLanguageSpecificData -Wl,--wrap=_Unwind_FindEnclosingFunction -Wl,--wrap=_Unwind_Resume -Wl,--wrap=_Unwind_RaiseException -Wl,--wrap=_Unwind_DeleteException -Wl,--wrap=_Unwind_ForcedUnwind -Wl,--wrap=_Unwind_Resume_or_Rethrow -Wl,--wrap=_Unwind_Backtrace -Wl,--wrap=__cxa_call_unexpected -Wl,--wrap=__gxx_personality_v0 -u __cxa_guard_dummy -u __cxx_fatal_exception 
 compiler.ar.flags.esp32c3=cr
 build.extra_flags.esp32c3=-DARDUINO_SERIAL_PORT=0
 #
diff --git a/tools/esptool.py b/tools/esptool.py
index db00ce50..a35265e6 100755
--- a/tools/esptool.py
+++ b/tools/esptool.py
@@ -1,7 +1,7 @@
 #!/usr/bin/env python
 #
 # ESP8266 & ESP32 family ROM Bootloader Utility
-# Copyright (C) 2014-2016 Fredrik Ahlberg, Angus Gratton, Espressif Systems (Shanghai) PTE LTD, other contributors as noted.
+# Copyright (C) 2014-2021 Fredrik Ahlberg, Angus Gratton, Espressif Systems (Shanghai) CO LTD, other contributors as noted.
 # https://github.com/espressif/esptool
 #
 # This program is free software; you can redistribute it and/or modify it under
@@ -102,6 +102,7 @@ def _chip_to_rom_loader(chip):
         'esp32s3beta2': ESP32S3BETA2ROM,
         'esp32s3beta3': ESP32S3BETA3ROM,
         'esp32c3': ESP32C3ROM,
+        'esp32c6beta': ESP32C6BETAROM,
     }[chip]
 
 
@@ -128,7 +129,8 @@ def get_default_connected_device(serial_list, port, connect_attempts, initial_ba
 
 
 DETECTED_FLASH_SIZES = {0x12: '256KB', 0x13: '512KB', 0x14: '1MB',
-                        0x15: '2MB', 0x16: '4MB', 0x17: '8MB', 0x18: '16MB'}
+                        0x15: '2MB', 0x16: '4MB', 0x17: '8MB',
+                        0x18: '16MB', 0x19: '32MB', 0x1a: '64MB'}
 
 
 def check_supported_function(func, check_func):
@@ -242,7 +244,7 @@ class ESPLoader(object):
     ESP_FLASH_DEFL_END   = 0x12
     ESP_SPI_FLASH_MD5    = 0x13
 
-    # Commands supported by ESP32-S2/S3/C3 ROM bootloader only
+    # Commands supported by ESP32-S2/S3/C3/C6 ROM bootloader only
     ESP_GET_SECURITY_INFO = 0x14
 
     # Some commands supported by stub only
@@ -287,6 +289,12 @@ class ESPLoader(object):
     # The number of bytes in the UART response that signify command status
     STATUS_BYTES_LENGTH = 2
 
+    # Response to ESP_SYNC might indicate that flasher stub is running instead of the ROM bootloader
+    sync_stub_detected = False
+
+    # Device PIDs
+    USB_JTAG_SERIAL_PID = 0x1001
+
     def __init__(self, port=DEFAULT_PORT, baud=ESP_ROM_BAUD, trace_enabled=False):
         """Base constructor for ESPLoader bootloader interaction
 
@@ -350,12 +358,15 @@ class ESPLoader(object):
             sys.stdout.flush()
             chip_magic_value = detect_port.read_reg(ESPLoader.CHIP_DETECT_MAGIC_REG_ADDR)
 
-            for cls in [ESP8266ROM, ESP32ROM, ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3BETA3ROM, ESP32C3ROM]:
+            for cls in [ESP8266ROM, ESP32ROM, ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3BETA3ROM, ESP32C3ROM, ESP32C6BETAROM]:
                 if chip_magic_value in cls.CHIP_DETECT_MAGIC_VALUE:
                     # don't connect a second time
                     inst = cls(detect_port._port, baud, trace_enabled=trace_enabled)
                     inst._post_connect()
                     print(' %s' % inst.CHIP_NAME, end='')
+                    if detect_port.sync_stub_detected:
+                        inst = inst.STUB_CLASS(inst)
+                        inst.sync_stub_detected = True
                     return inst
         except UnsupportedCommandError:
             raise FatalError("Unsupported Command Error received. Probably this means Secure Download Mode is enabled, "
@@ -416,8 +427,6 @@ class ESPLoader(object):
             if not wait_response:
                 return
 
-            self._port.flush()
-
             # tries to get a response until that response has the
             # same operation as the request or a retries limit has
             # exceeded. This is needed for some esp8266s that
@@ -474,10 +483,17 @@ class ESPLoader(object):
         self._slip_reader = slip_reader(self._port, self.trace)
 
     def sync(self):
-        self.command(self.ESP_SYNC, b'\x07\x07\x12\x20' + 32 * b'\x55',
-                     timeout=SYNC_TIMEOUT)
-        for i in range(7):
-            self.command()
+        val, _ = self.command(self.ESP_SYNC, b'\x07\x07\x12\x20' + 32 * b'\x55',
+                              timeout=SYNC_TIMEOUT)
+
+        # ROM bootloaders send some non-zero "val" response. The flasher stub sends 0. If we receive 0 then it
+        # probably indicates that the chip wasn't or couldn't be reseted properly and esptool is talking to the
+        # flasher stub.
+        self.sync_stub_detected = val == 0
+
+        for _ in range(7):
+            val, _ = self.command()
+            self.sync_stub_detected &= val == 0
 
     def _setDTR(self, state):
         self._port.setDTR(state)
@@ -489,31 +505,51 @@ class ESPLoader(object):
         # request is sent with the updated RTS state and the same DTR state
         self._port.setDTR(self._port.dtr)
 
-    def _connect_attempt(self, mode='default_reset', esp32r0_delay=False):
-        """ A single connection attempt, with esp32r0 workaround options """
-        # esp32r0_delay is a workaround for bugs with the most common auto reset
-        # circuit and Windows, if the EN pin on the dev board does not have
-        # enough capacitance.
-        #
-        # Newer dev boards shouldn't have this problem (higher value capacitor
-        # on the EN pin), and ESP32 revision 1 can't use this workaround as it
-        # relies on a silicon bug.
-        #
-        # Details: https://github.com/espressif/esptool/issues/136
-        last_error = None
+    def _get_pid(self):
+        if list_ports is None:
+            print("\nListing all serial ports is currently not available. Can't get device PID.")
+            return
+        active_port = self._port.port
 
-        # If we're doing no_sync, we're likely communicating as a pass through
-        # with an intermediate device to the ESP32
-        if mode == "no_reset_no_sync":
-            return last_error
+        # Pyserial only identifies regular ports, URL handlers are not supported
+        if not active_port.startswith(("COM", "/dev/")):
+            print("\nDevice PID identification is only supported on COM and /dev/ serial ports.")
+            return
+        # Return the real path if the active port is a symlink
+        if active_port.startswith("/dev/") and os.path.islink(active_port):
+            active_port = os.path.realpath(active_port)
 
-        # issue reset-to-bootloader:
-        # RTS = either CH_PD/EN or nRESET (both active low = chip in reset
+        ports = list_ports.comports()
+        for p in ports:
+            if p.device == active_port:
+                return p.pid
+        print("\nFailed to get PID of a device on {}, using standard reset sequence.".format(active_port))
+
+    def bootloader_reset(self, esp32r0_delay=False, usb_jtag_serial=False):
+        """ Issue a reset-to-bootloader, with esp32r0 workaround options
+        and USB-JTAG-Serial custom reset sequence option
+        """
+        # RTS = either CH_PD/EN or nRESET (both active low = chip in reset)
         # DTR = GPIO0 (active low = boot to flasher)
         #
         # DTR & RTS are active low signals,
         # ie True = pin @ 0V, False = pin @ VCC.
-        if mode != 'no_reset':
+        if usb_jtag_serial:
+            # Custom reset sequence, which is required when the device
+            # is connecting via its USB-JTAG-Serial peripheral
+            self._setRTS(False)
+            self._setDTR(False)  # Idle
+            time.sleep(0.1)
+            self._setDTR(True)  # Set IO0
+            self._setRTS(False)
+            time.sleep(0.1)
+            self._setRTS(True)  # Reset. Note dtr/rts calls inverted so we go through (1,1) instead of (0,0)
+            self._setDTR(False)
+            self._setRTS(True)  # Extra RTS set for RTS as Windows only propagates DTR on RTS setting
+            time.sleep(0.1)
+            self._setDTR(False)
+            self._setRTS(False)
+        else:
             self._setDTR(False)  # IO0=HIGH
             self._setRTS(True)   # EN=LOW, chip in reset
             time.sleep(0.1)
@@ -532,6 +568,27 @@ class ESPLoader(object):
             time.sleep(0.05)
             self._setDTR(False)  # IO0=HIGH, done
 
+    def _connect_attempt(self, mode='default_reset', esp32r0_delay=False, usb_jtag_serial=False):
+        """ A single connection attempt, with esp32r0 workaround options """
+        # esp32r0_delay is a workaround for bugs with the most common auto reset
+        # circuit and Windows, if the EN pin on the dev board does not have
+        # enough capacitance.
+        #
+        # Newer dev boards shouldn't have this problem (higher value capacitor
+        # on the EN pin), and ESP32 revision 1 can't use this workaround as it
+        # relies on a silicon bug.
+        #
+        # Details: https://github.com/espressif/esptool/issues/136
+        last_error = None
+
+        # If we're doing no_sync, we're likely communicating as a pass through
+        # with an intermediate device to the ESP32
+        if mode == "no_reset_no_sync":
+            return last_error
+
+        if mode != 'no_reset':
+            self.bootloader_reset(esp32r0_delay, usb_jtag_serial)
+
         for _ in range(5):
             try:
                 self.flush_input()
@@ -558,16 +615,21 @@ class ESPLoader(object):
 
     def connect(self, mode='default_reset', attempts=DEFAULT_CONNECT_ATTEMPTS, detecting=False):
         """ Try connecting repeatedly until successful, or giving up """
+        if mode in ['no_reset', 'no_reset_no_sync']:
+            print('WARNING: Pre-connection option "{}" was selected.'.format(mode),
+                  'Connection may fail if the chip is not in bootloader or flasher stub mode.')
         print('Connecting...', end='')
         sys.stdout.flush()
         last_error = None
 
+        usb_jtag_serial = (mode == 'usb_reset') or (self._get_pid() == self.USB_JTAG_SERIAL_PID)
+
         try:
             for _ in range(attempts) if attempts > 0 else itertools.count():
-                last_error = self._connect_attempt(mode=mode, esp32r0_delay=False)
+                last_error = self._connect_attempt(mode=mode, esp32r0_delay=False, usb_jtag_serial=usb_jtag_serial)
                 if last_error is None:
                     break
-                last_error = self._connect_attempt(mode=mode, esp32r0_delay=True)
+                last_error = self._connect_attempt(mode=mode, esp32r0_delay=True, usb_jtag_serial=usb_jtag_serial)
                 if last_error is None:
                     break
         finally:
@@ -689,7 +751,7 @@ class ESPLoader(object):
             timeout = timeout_per_mb(ERASE_REGION_TIMEOUT_PER_MB, size)  # ROM performs the erase up front
 
         params = struct.pack('<IIII', erase_size, num_blocks, self.FLASH_WRITE_SIZE, offset)
-        if isinstance(self, (ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3BETA3ROM, ESP32C3ROM)) and not self.IS_STUB:
+        if isinstance(self, (ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3BETA3ROM, ESP32C3ROM, ESP32C6BETAROM)) and not self.IS_STUB:
             params += struct.pack('<I', 1 if begin_rom_encrypted else 0)
         self.check_command("enter Flash download mode", self.ESP_FLASH_BEGIN,
                            params, timeout=timeout)
@@ -753,10 +815,12 @@ class ESPLoader(object):
 
     def run_stub(self, stub=None):
         if stub is None:
-            if self.IS_STUB:
-                raise FatalError("Not possible for a stub to load another stub (memory likely to overlap.)")
             stub = self.STUB_CODE
 
+        if self.sync_stub_detected:
+            print("Stub is already running. No upload is necessary.")
+            return self.STUB_CLASS(self)
+
         # Upload
         print("Uploading stub...")
         for field in ['text', 'data']:
@@ -796,7 +860,7 @@ class ESPLoader(object):
             timeout = timeout_per_mb(ERASE_REGION_TIMEOUT_PER_MB, write_size)  # ROM performs the erase up front
         print("Compressed %d bytes to %d..." % (size, compsize))
         params = struct.pack('<IIII', write_size, num_blocks, self.FLASH_WRITE_SIZE, offset)
-        if isinstance(self, (ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3BETA3ROM, ESP32C3ROM)) and not self.IS_STUB:
+        if isinstance(self, (ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3BETA3ROM, ESP32C3ROM, ESP32C6BETAROM)) and not self.IS_STUB:
             params += struct.pack('<I', 0)  # extra param is to enter encrypted flash mode via ROM (not supported currently)
         self.check_command("enter compressed flash mode", self.ESP_FLASH_DEFL_BEGIN, params, timeout=timeout)
         if size != 0 and not self.IS_STUB:
@@ -1101,6 +1165,7 @@ class ESPLoader(object):
         return norm_xtal
 
     def hard_reset(self):
+        print('Hard resetting via RTS pin...')
         self._setRTS(True)  # EN->LOW
         time.sleep(0.1)
         self._setRTS(False)
@@ -1765,9 +1830,8 @@ class ESP32S2ROM(ESP32ROM):
             self._setRTS(False)
 
 
-class ESP32S3BETA2ROM(ESP32ROM):
-    CHIP_NAME = "ESP32-S3(beta2)"
-    IMAGE_CHIP_ID = 4
+class ESP32S3ROM(ESP32ROM):
+    CHIP_NAME = "ESP32-S3"
 
     IROM_MAP_START = 0x42000000
     IROM_MAP_END   = 0x44000000
@@ -1776,8 +1840,6 @@ class ESP32S3BETA2ROM(ESP32ROM):
 
     UART_DATE_REG_ADDR = 0x60000080
 
-    CHIP_DETECT_MAGIC_VALUE = [0xeb004136]
-
     SPI_REG_BASE = 0x60002000
     SPI_USR_OFFS    = 0x18
     SPI_USR1_OFFS   = 0x1c
@@ -1786,9 +1848,33 @@ class ESP32S3BETA2ROM(ESP32ROM):
     SPI_MISO_DLEN_OFFS = 0x28
     SPI_W0_OFFS = 0x58
 
-    EFUSE_REG_BASE = 0x6001A030  # BLOCK0 read base address
+    FLASH_ENCRYPTED_WRITE_ALIGN = 16
 
-    MAC_EFUSE_REG = 0x6001A000  # ESP32S3 has special block for MAC efuses
+    # todo: use espefuse APIs to get this info
+    EFUSE_BASE = 0x6001A000  # BLOCK0 read base address
+    MAC_EFUSE_REG = EFUSE_BASE + 0x044
+
+    EFUSE_RD_REG_BASE = EFUSE_BASE + 0x030  # BLOCK0 read base address
+
+    EFUSE_PURPOSE_KEY0_REG = EFUSE_BASE + 0x34
+    EFUSE_PURPOSE_KEY0_SHIFT = 24
+    EFUSE_PURPOSE_KEY1_REG = EFUSE_BASE + 0x34
+    EFUSE_PURPOSE_KEY1_SHIFT = 28
+    EFUSE_PURPOSE_KEY2_REG = EFUSE_BASE + 0x38
+    EFUSE_PURPOSE_KEY2_SHIFT = 0
+    EFUSE_PURPOSE_KEY3_REG = EFUSE_BASE + 0x38
+    EFUSE_PURPOSE_KEY3_SHIFT = 4
+    EFUSE_PURPOSE_KEY4_REG = EFUSE_BASE + 0x38
+    EFUSE_PURPOSE_KEY4_SHIFT = 8
+    EFUSE_PURPOSE_KEY5_REG = EFUSE_BASE + 0x38
+    EFUSE_PURPOSE_KEY5_SHIFT = 12
+
+    EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG = EFUSE_RD_REG_BASE
+    EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT = 1 << 20
+
+    PURPOSE_VAL_XTS_AES256_KEY_1 = 2
+    PURPOSE_VAL_XTS_AES256_KEY_2 = 3
+    PURPOSE_VAL_XTS_AES128_KEY = 4
 
     UART_CLKDIV_REG = 0x60000014
 
@@ -1807,93 +1893,73 @@ class ESP32S3BETA2ROM(ESP32ROM):
                   [0x42000000, 0x42800000, "IROM"],
                   [0x50000000, 0x50002000, "RTC_DATA"]]
 
+    def get_chip_description(self):
+        return "ESP32-S3"
+
+    def get_chip_features(self):
+        return ["WiFi", "BLE"]
+
+    def get_crystal_freq(self):
+        # ESP32S3 XTAL is fixed to 40MHz
+        return 40
+
+    def get_flash_crypt_config(self):
+        return None  # doesn't exist on ESP32-S3
+
+    def get_key_block_purpose(self, key_block):
+        if key_block < 0 or key_block > 5:
+            raise FatalError("Valid key block numbers must be in range 0-5")
+
+        reg, shift = [(self.EFUSE_PURPOSE_KEY0_REG, self.EFUSE_PURPOSE_KEY0_SHIFT),
+                      (self.EFUSE_PURPOSE_KEY1_REG, self.EFUSE_PURPOSE_KEY1_SHIFT),
+                      (self.EFUSE_PURPOSE_KEY2_REG, self.EFUSE_PURPOSE_KEY2_SHIFT),
+                      (self.EFUSE_PURPOSE_KEY3_REG, self.EFUSE_PURPOSE_KEY3_SHIFT),
+                      (self.EFUSE_PURPOSE_KEY4_REG, self.EFUSE_PURPOSE_KEY4_SHIFT),
+                      (self.EFUSE_PURPOSE_KEY5_REG, self.EFUSE_PURPOSE_KEY5_SHIFT)][key_block]
+        return (self.read_reg(reg) >> shift) & 0xF
+
+    def is_flash_encryption_key_valid(self):
+        # Need to see either an AES-128 key or two AES-256 keys
+        purposes = [self.get_key_block_purpose(b) for b in range(6)]
+
+        if any(p == self.PURPOSE_VAL_XTS_AES128_KEY for p in purposes):
+            return True
+
+        return any(p == self.PURPOSE_VAL_XTS_AES256_KEY_1 for p in purposes) \
+            and any(p == self.PURPOSE_VAL_XTS_AES256_KEY_2 for p in purposes)
+
+    def override_vddsdio(self, new_voltage):
+        raise NotImplementedInROMError("VDD_SDIO overrides are not supported for ESP32-S3")
+
+    def read_mac(self):
+        mac0 = self.read_reg(self.MAC_EFUSE_REG)
+        mac1 = self.read_reg(self.MAC_EFUSE_REG + 4)  # only bottom 16 bits are MAC
+        bitstring = struct.pack(">II", mac1, mac0)[2:]
+        try:
+            return tuple(ord(b) for b in bitstring)
+        except TypeError:  # Python 3, bitstring elements are already bytes
+            return tuple(bitstring)
+
+
+class ESP32S3BETA2ROM(ESP32S3ROM):
+    CHIP_NAME = "ESP32-S3(beta2)"
+    IMAGE_CHIP_ID = 4
+
+    CHIP_DETECT_MAGIC_VALUE = [0xeb004136]
+
     def get_chip_description(self):
         return "ESP32-S3(beta2)"
 
-    def get_chip_features(self):
-        return ["WiFi", "BLE"]
 
-    def get_crystal_freq(self):
-        # ESP32S3 XTAL is fixed to 40MHz
-        return 40
-
-    def override_vddsdio(self, new_voltage):
-        raise NotImplementedInROMError("VDD_SDIO overrides are not supported for ESP32-S3")
-
-    def read_mac(self):
-        mac0 = self.read_reg(self.MAC_EFUSE_REG)
-        mac1 = self.read_reg(self.MAC_EFUSE_REG + 4)  # only bottom 16 bits are MAC
-        bitstring = struct.pack(">II", mac1, mac0)[2:]
-        try:
-            return tuple(ord(b) for b in bitstring)
-        except TypeError:  # Python 3, bitstring elements are already bytes
-            return tuple(bitstring)
-
-
-class ESP32S3BETA3ROM(ESP32ROM):
+class ESP32S3BETA3ROM(ESP32S3ROM):
     CHIP_NAME = "ESP32-S3(beta3)"
     IMAGE_CHIP_ID = 6
 
-    IROM_MAP_START = 0x42000000
-    IROM_MAP_END   = 0x44000000
-    DROM_MAP_START = 0x3c000000
-    DROM_MAP_END   = 0x3e000000
-
-    UART_DATE_REG_ADDR = 0x60000080
-
     CHIP_DETECT_MAGIC_VALUE = [0x9]
 
-    SPI_REG_BASE = 0x60002000
-    SPI_USR_OFFS    = 0x18
-    SPI_USR1_OFFS   = 0x1c
-    SPI_USR2_OFFS   = 0x20
-    SPI_MOSI_DLEN_OFFS = 0x24
-    SPI_MISO_DLEN_OFFS = 0x28
-    SPI_W0_OFFS = 0x58
-
-    EFUSE_BASE = 0x6001A000  # BLOCK0 read base address
-
-    MAC_EFUSE_REG  = EFUSE_BASE + 0x044  # ESP32S3 has special block for MAC efuses
-
-    UART_CLKDIV_REG = 0x60000014
-
-    GPIO_STRAP_REG = 0x60004038
-
-    MEMORY_MAP = [[0x00000000, 0x00010000, "PADDING"],
-                  [0x3C000000, 0x3D000000, "DROM"],
-                  [0x3D000000, 0x3E000000, "EXTRAM_DATA"],
-                  [0x600FE000, 0x60100000, "RTC_DRAM"],
-                  [0x3FC88000, 0x3FD00000, "BYTE_ACCESSIBLE"],
-                  [0x3FC88000, 0x403E2000, "MEM_INTERNAL"],
-                  [0x3FC88000, 0x3FD00000, "DRAM"],
-                  [0x40000000, 0x4001A100, "IROM_MASK"],
-                  [0x40370000, 0x403E0000, "IRAM"],
-                  [0x600FE000, 0x60100000, "RTC_IRAM"],
-                  [0x42000000, 0x42800000, "IROM"],
-                  [0x50000000, 0x50002000, "RTC_DATA"]]
-
     def get_chip_description(self):
         return "ESP32-S3(beta3)"
 
-    def get_chip_features(self):
-        return ["WiFi", "BLE"]
-
-    def get_crystal_freq(self):
-        # ESP32S3 XTAL is fixed to 40MHz
-        return 40
-
-    def override_vddsdio(self, new_voltage):
-        raise NotImplementedInROMError("VDD_SDIO overrides are not supported for ESP32-S3")
-
-    def read_mac(self):
-        mac0 = self.read_reg(self.MAC_EFUSE_REG)
-        mac1 = self.read_reg(self.MAC_EFUSE_REG + 4)  # only bottom 16 bits are MAC
-        bitstring = struct.pack(">II", mac1, mac0)[2:]
-        try:
-            return tuple(ord(b) for b in bitstring)
-        except TypeError:  # Python 3, bitstring elements are already bytes
-            return tuple(bitstring)
-
 
 class ESP32C3ROM(ESP32ROM):
     CHIP_NAME = "ESP32-C3"
@@ -2021,6 +2087,23 @@ class ESP32C3ROM(ESP32ROM):
         return any(p == self.PURPOSE_VAL_XTS_AES128_KEY for p in purposes)
 
 
+class ESP32C6BETAROM(ESP32C3ROM):
+    CHIP_NAME = "ESP32-C6 BETA"
+    IMAGE_CHIP_ID = 7
+
+    CHIP_DETECT_MAGIC_VALUE = [0x0da1806f]
+
+    UART_DATE_REG_ADDR = 0x00000500
+
+    def get_chip_description(self):
+        chip_name = {
+            0: "ESP32-C6",
+        }.get(self.get_pkg_version(), "unknown ESP32-C6")
+        chip_revision = self.get_chip_revision()
+
+        return "%s (revision %d)" % (chip_name, chip_revision)
+
+
 class ESP32StubLoader(ESP32ROM):
     """ Access class for ESP32 stub loader, runs on top of ROM.
     """
@@ -2152,6 +2235,8 @@ def LoadFirmwareImage(chip, filename):
             return ESP32S3BETA3FirmwareImage(f)
         elif chip == 'esp32c3':
             return ESP32C3FirmwareImage(f)
+        elif chip == 'esp32c6beta':
+            return ESP32C6BETAFirmwareImage(f)
         else:  # Otherwise, ESP8266 so look at magic to determine the image type
             magic = ord(f.read(1))
             f.seek(0)
@@ -2792,6 +2877,14 @@ class ESP32C3FirmwareImage(ESP32FirmwareImage):
 ESP32C3ROM.BOOTLOADER_IMAGE = ESP32C3FirmwareImage
 
 
+class ESP32C6BETAFirmwareImage(ESP32FirmwareImage):
+    """ ESP32C6 Firmware Image almost exactly the same as ESP32FirmwareImage """
+    ROM_LOADER = ESP32C6BETAROM
+
+
+ESP32C6BETAROM.BOOTLOADER_IMAGE = ESP32C6BETAFirmwareImage
+
+
 class ELFFile(object):
     SEC_TYPE_PROGBITS = 0x01
     SEC_TYPE_STRTAB = 0x03
@@ -3237,7 +3330,7 @@ def write_flash(esp, args):
     if args.flash_size != 'keep':  # TODO: check this even with 'keep'
         flash_end = flash_size_bytes(args.flash_size)
         for address, argfile in args.addr_filename:
-            argfile.seek(0, 2)  # seek to end
+            argfile.seek(0, os.SEEK_END)
             if address + argfile.tell() > flash_end:
                 raise FatalError(("File %s (length %d) at offset %d will not fit in %d bytes of flash. "
                                   "Use --flash-size argument, or change flashing address.")
@@ -3246,6 +3339,19 @@ def write_flash(esp, args):
 
     if args.erase_all:
         erase_flash(esp, args)
+    else:
+        for address, argfile in args.addr_filename:
+            argfile.seek(0, os.SEEK_END)
+            write_end = address + argfile.tell()
+            argfile.seek(0)
+            bytes_over = address % esp.FLASH_SECTOR_SIZE
+            if bytes_over != 0:
+                print("WARNING: Flash address {:#010x} is not aligned to a {:#x} byte flash sector. "
+                      "{:#x} bytes before this address will be erased."
+                      .format(address, esp.FLASH_SECTOR_SIZE, bytes_over))
+            # Print the address range of to-be-erased flash memory region
+            print("Flash will be erased from {:#010x} to {:#010x}..."
+                  .format(address - bytes_over, div_roundup(write_end, esp.FLASH_SECTOR_SIZE) * esp.FLASH_SECTOR_SIZE - 1))
 
     """ Create a list describing all the files we have to flash. Each entry holds an "encrypt" flag
     marking whether the file needs encryption or not. This list needs to be sorted.
@@ -3458,6 +3564,10 @@ def elf2image(args):
         image = ESP32C3FirmwareImage()
         if args.secure_pad_v2:
             image.secure_pad = '2'
+    elif args.chip == 'esp32c6beta':
+        image = ESP32C6BETAFirmwareImage()
+        if args.secure_pad_v2:
+            image.secure_pad = '2'
     elif args.version == '1':  # ESP8266
         image = ESP8266ROMFirmwareImage()
     else:
@@ -3667,7 +3777,7 @@ def main(argv=None, esp=None):
     parser.add_argument('--chip', '-c',
                         help='Target chip type',
                         type=lambda c: c.lower().replace('-', ''),  # support ESP32-S2, etc.
-                        choices=['auto', 'esp8266', 'esp32', 'esp32s2', 'esp32s3beta2', 'esp32s3beta3', 'esp32c3'],
+                        choices=['auto', 'esp8266', 'esp32', 'esp32s2', 'esp32s3beta2', 'esp32s3beta3', 'esp32c3', 'esp32c6beta'],
                         default=os.environ.get('ESPTOOL_CHIP', 'auto'))
 
     parser.add_argument(
@@ -3684,13 +3794,13 @@ def main(argv=None, esp=None):
     parser.add_argument(
         '--before',
         help='What to do before connecting to the chip',
-        choices=['default_reset', 'no_reset', 'no_reset_no_sync'],
+        choices=['default_reset', 'usb_reset', 'no_reset', 'no_reset_no_sync'],
         default=os.environ.get('ESPTOOL_BEFORE', 'default_reset'))
 
     parser.add_argument(
         '--after', '-a',
         help='What to do after esptool.py is finished',
-        choices=['hard_reset', 'soft_reset', 'no_reset'],
+        choices=['hard_reset', 'soft_reset', 'no_reset', 'no_reset_stub'],
         default=os.environ.get('ESPTOOL_AFTER', 'hard_reset'))
 
     parser.add_argument(
@@ -4022,13 +4132,14 @@ def main(argv=None, esp=None):
             # the ESP is now running the loaded image, so let it run
             print('Exiting immediately.')
         elif args.after == 'hard_reset':
-            print('Hard resetting via RTS pin...')
             esp.hard_reset()
         elif args.after == 'soft_reset':
             print('Soft resetting...')
             # flash_finish will trigger a soft reset
             esp.soft_reset(False)
-        else:
+        elif args.after == 'no_reset_stub':
+            print('Staying in flasher stub.')
+        else:  # args.after == 'no_reset'
             print('Staying in bootloader.')
             if esp.IS_STUB:
                 esp.soft_reset(True)  # exit stub back to ROM loader
@@ -4170,244 +4281,292 @@ class AddrFilenamePairAction(argparse.Action):
 
 # Binary stub code (see flasher_stub dir for source & details)
 ESP8266ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
-eNq9PGtj1Da2f8V2QpIZJkWyPR6bR5lMkikUKJAuge6md+MnvdwCYcg22W7Y3359XpLsmSTQ14fAyJalo3OOzlv6z+ZpfX66edsrNo/O8/ToXKujc6Wm7T/66Lxp4G9+Co/sX9b+pfj2fvsgla5tI1X0Jz3T2G1P\
-p/LrwQ5/kMVmKPg3oyl1eHReQlt5Hswd5u0/0f7ReQ0/4G0OgNXt98kCXj1vWzF8C+Mm8EPLk3YENQYovn3RDqo8mP4n+GbWzjNGsBT11cUuQAg/ud/sBfx7OzEPgl38V75sJ6kLmgS+m7TwhPf99qGAQD9aoGpc\
-2e2wC8Jz6XG0CUuhhadJF9vyxx8O2n8shD/AMHNAUafTD51O8EnUQlMhrLdb8FUJj0yH8ICnAVII8ltGWAAJ6FWOLcMBqcsBwg71/acPdh4SG+Ulv81j09hql6tg4BbLuu3T5NxAcHDoY+G57tr1CnwA9lc9S8su\
-D9IMvY52kt5LXgjhzzTa+TedEeNV4DLIncWr1Bmk6Lzp7JR00NtdjTtAxA3AgmnASGa0rOQt0dyHESrZjql5TDTTRQ8VqV2J2eTP2n9qp6FDadx1wCyUM38RO40KGjk27jgfNB2pUbqQwVC1I0JU0SW9eYk9ZXUr\
-GUB1IaR9ygDoLmNlLj2wkctySqHnlJBoGrltvEIqTvfm+N/oMf53/sDw1Lf8q4gf8q+y/Ip/VWmGv9relQwNa6txSdPHGzI3f+sTTAB9BtKPtid+ojVs4yBfC3CT0urCvBVUZZi3Mq4Kc5A/YQ6iLcwZbzVL2tLg\
-C6YIWWwVEWOqpH2gEhfbAFL4KJhAb2DPMaFaaYYANqAqd4ftiCB584j35ZhIrrR/wZPrX3nCHCXTcGQkUvsDMBT6hHILDD7V7tMDGr5aWhH0QukaEMaUNsMDlSJv3euKSITf4+Gi/nD8PPzc5x9kI7ZSPqtZD9AP\
-LT8Khkzx8kKGslpBnQwZQBOm1gzkKX2mk4/yDSOw4jc9WZ/ZpzoMdoDHAhTtAEe5jk/Gs+e7YR5sILe1ckGX0QS6e6ydUnej0ddRiP+B/kL9qFXgNaBi9da2mXsLegR50OUoXQbB811mkMhlJFDKOaurFPR/xp81\
-NFsU2EnbScBy0KCJS6/F14QFczMhztYRD4tYbefKtDNXXRMAGdOzHPN20u3+rkpXcjjoAj6Z0J5EpCb8u1UX0XdAXXhagv3AMrRJFl4TyvNGHs4AqcCn9PwRPJ+TGlYK0EijX2DzgJfcDpvzsPC7qCwjZX2o0glD\
-hRMtLGBZ44yAdG3sl/Awm9hhCzvs/FeGsYiFiu6caZLxhFsNoZ+e7kpn5MkWnHc0cuOMvM0TJiSepb/ujv9Y3qzZLyuGKUeYQ6JgpZF3RzDbqTxTE9JrYIaUDiLtV2FnthvuKwfW9h0sdDynzS6IAnhL+L+Bj/9J\
-/Ibckck8G6TlDR0SoYP01v9aljRgMcG4WRnwZ6G7Fb3RDny46H94COtZw22D+qZBdTyiLmV5C6b9iadVHprDh4BwsrFrQGDT8N6PsA/sMgTyzYq5MhDbtbJvzFzN5Gsy4p2hCOZyxTgocFbAfCj2//wHAZrFXE07\
-jXa5g2GV/LfXC4hVzy8cahQN2f4q+YeL04beEJ1mQknHI5IJld6wXRX6JSoAXo5BxsDi6tCqaANmCJYlKFya4QRl+o9b2/unLIiS284i1UwmQ7hUiBO06NbZVXNM7B4sk9coiu+B8munTUOYbZajhv4AI2siTdPM\
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 """)))
 ESP32ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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 """)))
 ESP32S2ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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 """)))
 ESP32S3BETA2ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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 """)))
 ESP32S3BETA3ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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 """)))
 ESP32C3ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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+kK6EapvQMQgLW+HdE9plcjUdRkRMXnMutzlQncX3oXiTQ8q1PlARsMu8X6MVseAGdgzoihhdC1+wohYU6H+MJ4xBgRw+7FOC6BwdBYz5M1T4kfNzmjgNExdZbFAEi12/iTdT8tvVM0dRfWO6Ukwl8JbyngP0vToi\
+6IB74YdDqrdvb1sdQX4itYRn9LpTO6bvO6oN5lGjbZxrVl5Xg88/Wn8LSIoYUs8LYTRNUP7IOK7kja+Aa+lGHwqTgPRxiU4mJSJtUOxR3EyhjjcN28neMw6vy/zZzH/x/yopYW24yFxL0urwgswf4TAzoCZjr97S\
+gJMXmZpj7ii2eKN4irfn/IRz7jzySYPPKMOZSBJXUOmJHK83nI1dnDxAH/JImpBhH1W5O+mdyJs8oU+PhoBWMXsNnR0d/vpCtarabH0L6xe9F7T7Q8k4gAr0zyshp4ZyPicbps5z7wWiAWUBXEqFrrMczqrO6wY2\
+VqWFs8/jKTO9kxOCO3VrMun7tzt3mbRgTHDHlNMMih81lEohUbrsxGx1XFsCx6pf1uHEx0pWhf4YPdmBSdFwjbHuWxtQe3sb231T84KUnxGtcbQpw3L/6rwOuB33b8il4D3JZ0Fp9vTgGSpPlCjo5DTZtMF5Y3b6\
+EH6cPTpAlZw9pl4bToZe121v/fCbHXq19ucPi/ICL9hqleeJ1kWi/J16vrj43F7sJ0XhL7pyUdKbuNDsgLzjUC53Z1E6S4xKlv8Diz+ELA==\
+""")))
+ESP32C6BETAROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
+eNrFWmt700YW/itpEpKWvc3Iug0tiU3tOA6XZftAKTymRRpJWWjrXYKB0F3/9533XCQ5iQ3f9oMTezSaOXPOe95zkf5zuKwvl4d3dsrD+aWx80sbPmUWvuNjXp3NL30evg3ml4WbX+Y0ehAGi0fhT/pD+BOHoTT8\
+r3fDHy93x3T3/LKpnme0xnH4Yx6E9QfLMIrLzfxiflmb8CsaluO9sEG+zzKU0Wx+WUXje7PdcK9JirBxFD5hbp4Pw5/B/HC+wA5Y731YIaH1aJbLVmE0bFAHma0LX5pwxQfhyyabH5Jc/70f5lVhfsn3Nk2Wbbig\
+W49YNXTS8KmqjE7K60H4VHQWtcoLn6A6Fz5+gP/fr0SW/BnOOITwk24fE/7nbsQquHlTd7ySrXmHYU8G3an7bf33MACvHva7vjQsFmdjqCfYxw143WDRYCPn7+vOsHe4qQg3++ZlZlmddsB25uk2Pw2bVNOwth0H\
+FFThzlrVEI9xDdbjXcqYTWTMQ+ybHEPYcV9xltd32J/GwpJZOEad8gQCWcqYwG/nGEs6zouoLh6zCbAl/pfZQauye2SUUZDbWV7CJFNMxXEKwAmyMcyxSV7LOjnpdDeczEXjNdWKavQoHrochb82gKpOeDS3rJ4c\
+mzmsb7+CBwBJhrGAaY17doRJ3dJBOs9+qNrN3QlGgnorGWmqZ2x4aAP6tpksaTvZSgP/81YWGzDUIF9TY9GpOk0PGOEWnCMVjzOCOdtN0RM3ttsd9qhoNxKMtgqnqbCVv74EBPudNy6zCWFT/AAz8mQCuDEw/3Hs\
+Z3KyFLOnPSTjVF5VNOg5qNBZhdn40WOQe5gy4vlWJCfdGVxJcSXag8Fl6TwFQPZ4k0KP31/c2fNOHNo+7jaBLoOuG6UNrElMqTZS+Qusomg0Vw6jkKeTb9YB/RYiMTG2bt1J6IuPJAis9AcOy1t9xVcCJtmIRnAA\
+I16lF1my6i9Zi8CVIJPDDUWNGzmIwgy+TjXCUCR5xGfo0w8AB7YQUBYAcLhUOsJs0Ng3Y7mCUOIO2JXt4DljnOKIP/VPwzJGf479LzgrTIM4cpeY93R4IFqs2S2daBd0AJolnzZMJLW/Ep5wYJ/oIYfkKXO6dz5k\
+fYXl5iTzHIw54GO4bDhmAqJIKaFRwmQ/Ol4kNfuNBvJeXH7/rYRlXx//pqETt49Z8E0HocOUQlQ2YYYooymfgqCb7RyxSWr7bT/6TBWbwxv2g/fnjXArvD6abBJiJ3wBE4XQxuSoOYNQY08FI01g1AuIzJks9pi8\
+FYU9/1iybACr7/Maseb5ijkAqQ2Ch5crgEZe3WHUAVf4X1qm9hyTyz2+wLw4QiBxTHWsicdMlTdG5i7or8cSQMpIGIl0ISXzTTbEWDXoZnua3e1rhVX4vvMejUVX4wWRd97Fia1b2m5L5n9ot8y61EMSCz7qbXFa\
+8esykbAP6VwsYX9TxDXIpIzMooAQTxDWiGrevwVx2NU7XHqNnZMDMWY4QlXzQSvJWqpCJMpWAEbBmYEQ05KVkWtmIMJC8KY4YkGZZHYZnMpFNyvq1cHVlU3yplueGKCYjpjKODk57wVb+kBKJ2pmOTbI50S+9dt7\
+u8Geye52YivMnszwdoIvcDJ8M4nvtFUWw9uwUzGeLwJJNenz5gW0+2LWuiqI1Pl3mKRWe33G5Aor5MmjzwmiCLvCsHW1tszu54kaQRiRxjkl3f3RayYvxi+kS58ytyqiNdO50XkIW/bt29W7H0EEL8BGPwNSpVAM\
+xcZd0OABfPMMZ0Fga1BRVSgSBm+YK2qBaCFmVRWvyRH9lWuWEqotUyYgEISPPnP0HOo59xj9yIvmSaWQyrWU2w753c9bymarPzavSYj0d5hUCYb++uSw8QXfQtSr2ZCdHUnNllxNtbIrnkSJhJV0sEIgwj5NHLJN\
+U/q37GXEJBC5SDKN88BqMoJ/JdkjBlfxJeDSqIdVHCpm5/yH14yXUnnVoTZoIpG7vfKnEds9JxkHH6U0ppE1GX78PMD9up885BzsSxWGMObZDg3gYmeIfGGRAnOcXmk+L0cZrSSnglKSmH/UBd9ZuyP/9w7UCDV1\
+dFeK8M2y0iAh4QfOxheci5OsCXhVi5E2c0UBp5mrtVMehEaRZ1Bz4v9Ns4Se/GnSce37b9/ever1WzImKoLXKfnx7SeA4ZP54jnEn70B6xRnZ/dx8f7tB7j4YL54CL5++bDXdCmzZ6PZ87edAZD24ayB+I/ER4Rv\
+CwTSWJL/iGm1MjzHS6D1EmjpWsGyA+mUQkac6aIwAXcBG94seMI2Nyu8pn35MZhsrQbS/ElzGYyVhecV8LHRLRjDTv7JyWHOek4YN21dtl5TfXV+RIDbkTxYa7EkH2oPDd/6QoBujT3RUlZt2bbIbDKh5SQkbkga\
+wo9ei24+n17HRUlLqg7oiBmljnOWfiNummIrkS9Ey9w9QYlEJynYmqLjRduck44CpIO/kd4ASEuDCX/hfshkO3UU1CM5z+7LsdDesNl6eozMOE+aUaOG6JpJlKIEUZcIx/ibV79mD9Ssm9RcSARwpcYoRm/bU8jk\
+3DmfD4GbxuNuPBROXAwvpBQmtrRsJkyGUrgZNl9iKhVZcr0YrM/Hp0q/oRaQwNfED+mn9ttQRUIphZ18zSoprTJuFney+2xfQGabXejwJRdkLVxBIKjOmlI3+rJ6Y4fpb73Y2Khi16tLKMGttycSLpovBwjVmbbK\
+tL9h+TuRfaJnjLtipj1wIR2NykkJqhEArQ7sRT7gkb/674+g8Nec+nmn9mF7zHh43YjJiRjHZ7c9XDVlK9i2TRekAjhwIQDkopuP1pr/Va7E8+WJV7qhxvisCzTUpmg0qFM3fZbqT8fXyuTotRNxzVUp7xJmyLL3\
+/O8gsJgU4SUUZz9A4g5YT+YXqiThk3bN5CZQWeE3jhKi80TyjkoykuTud9KnJPKl48bSNEICmJzIltJJgl08jGWSiefWARFvLeaq8tO9fWVPlCm1cFIpJXrBxqkp+Yb/NKJsRNLqRFRSoT1cWN1cmmFN3m/cRNi/\
+kv1TdUyMjZVstoAYqqJJPvnOWbCkeis/u7hIV2JjGN3YsdQmDZ7CKF6ofiiqk84sJCaCJ9kRsaaR7nXlEd3zBwjOpzjTKYhsjI78eHtczSvU5Q5czb0XKdMtVdYPVWeMLF8peEd0wbWo/k0uwBityGLrhjqcAi8j\
+6QUZsQ/5trNc8bMEz7ZsBC/xTPEpIR11Uz6YMt97OVDGxV7L3U56DNRfyPb3GEym7NrERUwWuCXsQ23PHWqDo89TUVD1TNgtkgbtMwiaV4iIaXfJts0U5/kqoFqQ3YzvwSqZ3FYnmq3EUWgNWZu6/vd0cNiuKk8D\
+6vyKEtIuDwkuM+rKVzmnuGDdT5h6ys/ttDsEARRNTpi9Fkdkpn3Sp4SxhuFZP87wtUqQF127spQq4ApZU6Zes7LruJPQ6qMWy/AwyXgiXWGBGDXtWnQPV4NYIS08TmqoRN24wVAT9pzVrOpwlP5YqktuRX8BIEfo\
+KblqxQ2+plppmVANeajOxd8L8hppEt4s2Ks/AKVqwaCsJQUtBx9vMZNS3ZKNXnd7+IWUYWb1qRv9BD7cuhMC7kcJEO6M92u0Q7fttsJ80DBI2t8fMaFTjARCYKwyacl6LFWXAJuWFPL5HUlO0ru1mx13s50/lWxH\
+o6n3p0JeVZKzgTjl07sLvruu27uVm2qxrC4hXXbKeZAAuJwL3qU+GomltyKP7cpMisWmTS5OxLOsJPWZdIJr6UBWyuTJhJ+jc8CbyggJLMGEimGcq82IbzbcxV19NvdR6EJKZgQKCMDO8XLai8dxh20Sp6le4p4P\
+LFPVnI637fgzPRX5CZCOhyt4o6Qn+izHGSEirxzecKaUN5pb5uLqoSwfsd9W+ozRSnOGnhMPbp1Rz1y6v1xGIHdv1qLCK2nBad8O7wUQ3xKp1/2UePCxryPpyldEWF/rPVKbEcmVamQqIsStmnzouUlQ91Yz+owz\
+R85RcfaxL71/I05fXgGNNY+6nNUpBVLGo5F+HR+iU8qRB/udyFYecrU9CCLCsP9CsiD6j/jd9uXhb+WaItEw8J+kAdaPurza8xuuOKP32NlUwhzVmd6Xgsh4Mu0wWWf8CHNzXr6GUXs9T6fKpJIUgV6YmN0QyoMD\
+XnTvBPiBH+8gs/U/8VsKWjH+m7TERqpdDxqN+G/adXD4qAVLxLdLCqClkdfxLgJLFMU6dMr4epqMcBi/5GxuQ5R60b17wyccUZ71jgqCXeZ9wmCE4+G9ii6YG+J0Kw0l1tOSgvyP3YNO1R8HEP+YELqQ1Nj8ix4d\
+ctpOCye6cJ52TQw12Cbu8OYpOe/6o09RfuP6gswk9BbyYB0aX5+hiuDe4+GIiutvtgtgzBMJpaGqqnvdkuRtT79qILORBl9N1l6Ogsvfv/rOidQ2pJ5nwmmWkPyeYVzK+0UK65IL7kMhEtA+hugBadZ1+W4Ax0l3\
+ktwcbTv+PVTM/ubsny19DN77xBDiEa4isVZu9XWMD/pYVVGTslNv6ZLJazPNETf/WrxRRMW7WmHBBTcJucMfskl9/BB3O5jkVJ7yN5yMXZzeQ8vwjvQLReScHp3sTqNTeXWEIRRQOufEQZNXbeNY/QyEbJH836zI\
+HcSG6Bmd/lByDmzph2JEhHBK+So5MLWBo2cIBpQHUPGkjzgSKftN760HEYoeZ1R4H0Gfd9MbIEqliEl1Kv12PvnfABjpiDh1x4QTDQofNZRKEXHAyidiq7u9JW6sOyVJHUl5rWWm3mm2ZSg+FFDXXG1zchFvdLlc\
+3kOKJG0jtmskBhVbpRimX+ggufbWXPyQtyrTxwfolqeoZFL0y9NZg355enYCl0/vH6CiTh/gMjrm0cu61zEnKjCHf96h1yt/ebcsLvCSpTVZFlubxyZcqRfLi0/t4GAQ5WGwKpaFvo0JXAWHOpTh/irGprEz8ep/\
+TB3fMw==\
 """)))
 
 
diff --git a/tools/gen_esp32part.py b/tools/gen_esp32part.py
index d7b57a46..36efbfb0 100755
--- a/tools/gen_esp32part.py
+++ b/tools/gen_esp32part.py
@@ -48,6 +48,18 @@ TYPES = {
     'data': DATA_TYPE,
 }
 
+
+def get_ptype_as_int(ptype):
+    """ Convert a string which might be numeric or the name of a partition type to an integer """
+    try:
+        return TYPES[ptype]
+    except KeyError:
+        try:
+            return int(ptype, 0)
+        except TypeError:
+            return ptype
+
+
 # Keep this map in sync with esp_partition_subtype_t enum in esp_partition.h
 SUBTYPES = {
     APP_TYPE: {
@@ -67,6 +79,18 @@ SUBTYPES = {
     },
 }
 
+
+def get_subtype_as_int(ptype, subtype):
+    """ Convert a string which might be numeric or the name of a partition subtype to an integer """
+    try:
+        return SUBTYPES[get_ptype_as_int(ptype)][subtype]
+    except KeyError:
+        try:
+            return int(subtype, 0)
+        except TypeError:
+            return subtype
+
+
 quiet = False
 md5sum = True
 secure = False
@@ -89,6 +113,18 @@ class PartitionTable(list):
     def __init__(self):
         super(PartitionTable, self).__init__(self)
 
+    @classmethod
+    def from_file(cls, f):
+        data = f.read()
+        data_is_binary = data[0:2] == PartitionDefinition.MAGIC_BYTES
+        if data_is_binary:
+            status('Parsing binary partition input...')
+            return cls.from_binary(data), True
+
+        data = data.decode()
+        status('Parsing CSV input...')
+        return cls.from_csv(data), False
+
     @classmethod
     def from_csv(cls, csv_contents):
         res = PartitionTable()
@@ -149,20 +185,8 @@ class PartitionTable(list):
         """ Return a partition by type & subtype, returns
         None if not found """
         # convert ptype & subtypes names (if supplied this way) to integer values
-        try:
-            ptype = TYPES[ptype]
-        except KeyError:
-            try:
-                ptype = int(ptype, 0)
-            except TypeError:
-                pass
-        try:
-            subtype = SUBTYPES[int(ptype)][subtype]
-        except KeyError:
-            try:
-                subtype = int(subtype, 0)
-            except TypeError:
-                pass
+        ptype = get_ptype_as_int(ptype)
+        subtype = get_subtype_as_int(ptype, subtype)
 
         for p in self:
             if p.type == ptype and p.subtype == subtype:
@@ -471,15 +495,7 @@ def main():
     md5sum = not args.disable_md5sum
     secure = args.secure
     offset_part_table = int(args.offset, 0)
-    input = args.input.read()
-    input_is_binary = input[0:2] == PartitionDefinition.MAGIC_BYTES
-    if input_is_binary:
-        status('Parsing binary partition input...')
-        table = PartitionTable.from_binary(input)
-    else:
-        input = input.decode()
-        status('Parsing CSV input...')
-        table = PartitionTable.from_csv(input)
+    table, input_is_binary = PartitionTable.from_file(args.input)
 
     if not args.no_verify:
         status('Verifying table...')
diff --git a/tools/platformio-build-esp32.py b/tools/platformio-build-esp32.py
index 285fc791..6b2147f5 100644
--- a/tools/platformio-build-esp32.py
+++ b/tools/platformio-build-esp32.py
@@ -78,7 +78,9 @@ env.Append(
         "-fno-rtti",
         "-fno-lto",
         "-Wl,--wrap=mbedtls_mpi_exp_mod",
+        "-Wl,--wrap=longjmp",
         "-Wl,--undefined=uxTopUsedPriority",
+        "-T", "esp32.rom.redefined.ld",
         "-T", "esp32.rom.ld",
         "-T", "esp32.rom.api.ld",
         "-T", "esp32.rom.libgcc.ld",
@@ -94,6 +96,7 @@ env.Append(
         "-u", "ld_include_panic_highint_hdl",
         "-u", "start_app",
         "-u", "start_app_other_cores",
+        "-u", "__ubsan_include",
         "-u", "vfs_include_syscalls_impl",
         "-u", "call_user_start_cpu0",
         "-u", "app_main",
@@ -190,6 +193,8 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_http_client", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_http_server", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_https_ota", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_lcd", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "esp_lcd", "interface"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "protobuf-c", "protobuf-c"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "protocomm", "include", "common"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32", "include", "protocomm", "include", "security"),
@@ -268,7 +273,7 @@ env.Append(
     ],
 
     LIBS=[
-        "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lbt", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lconsole", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lspiffs", "-lulp", "-lwifi_provisioning", "-lbutton", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lesp_rainmaker", "-lqrcode", "-lws2812_led", "-lesp_littlefs", "-lesp-dsp", "-lesp-face", "-lesp32-camera", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_hid", "-lesp_local_ctrl", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lbutton", "-lesp_rainmaker", "-lmqtt", "-lwifi_provisioning", "-lprotocomm", "-lprotobuf-c", "-ljson", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lqrcode", "-lws2812_led", "-lesp-dsp", "-lesp-face", "-lpe", "-lfd", "-lfr", "-ldetection_cat_face", "-ldetection", "-ldl", "-lesp32-camera", "-lfb_gfx", "-lbt", "-lbtdm_app", "-lesp_adc_cal", "-lmdns", "-lconsole", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lspiffs", "-lesp_littlefs", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lrtc", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lrtc", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lrtc", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lrtc", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lrtc", "-lxt_hal", "-lm", "-lnewlib", "-lgcc", "-lstdc++", "-lpthread", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
+        "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lbt", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lconsole", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_lcd", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lspiffs", "-lulp", "-lwifi_provisioning", "-lbutton", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lesp_rainmaker", "-lqrcode", "-lws2812_led", "-lesp_littlefs", "-lesp-dsp", "-lesp-face", "-lesp32-camera", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_hid", "-lesp_lcd", "-lesp_local_ctrl", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lbutton", "-lesp_rainmaker", "-lmqtt", "-lwifi_provisioning", "-lprotocomm", "-lprotobuf-c", "-ljson", "-ljson_parser", "-ljson_generator", "-lesp_schedule", "-lqrcode", "-lws2812_led", "-lesp-dsp", "-lesp-face", "-lpe", "-lfd", "-lfr", "-ldetection_cat_face", "-ldetection", "-ldl", "-lesp32-camera", "-lfb_gfx", "-lbt", "-lbtdm_app", "-lesp_adc_cal", "-lmdns", "-lconsole", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lspiffs", "-lesp_littlefs", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lrtc", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lrtc", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lrtc", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lrtc", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lperfmon", "-lesp32", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lrtc", "-lxt_hal", "-lm", "-lnewlib", "-lstdc++", "-lpthread", "-lgcc", "-lcxx", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
     ],
 
     CPPDEFINES=[
@@ -277,7 +282,7 @@ env.Append(
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4-dev-960-gcf457d412\\"'),
+        ("IDF_VER", '\\"v4.4-dev-1404-gc13afea63\\"'),
         "ESP_PLATFORM",
         "ARDUINO_ARCH_ESP32",
         "ESP32",
diff --git a/tools/platformio-build-esp32c3.py b/tools/platformio-build-esp32c3.py
index da1464c4..e1a784ad 100644
--- a/tools/platformio-build-esp32c3.py
+++ b/tools/platformio-build-esp32c3.py
@@ -80,6 +80,35 @@ env.Append(
         "-fno-lto",
         "-Wl,--wrap=mbedtls_mpi_exp_mod",
         "-Wl,--undefined=uxTopUsedPriority",
+        "-Wl,--wrap=_Unwind_SetEnableExceptionFdeSorting",
+        "-Wl,--wrap=__register_frame_info_bases",
+        "-Wl,--wrap=__register_frame_info",
+        "-Wl,--wrap=__register_frame",
+        "-Wl,--wrap=__register_frame_info_table_bases",
+        "-Wl,--wrap=__register_frame_info_table",
+        "-Wl,--wrap=__register_frame_table",
+        "-Wl,--wrap=__deregister_frame_info_bases",
+        "-Wl,--wrap=__deregister_frame_info",
+        "-Wl,--wrap=_Unwind_Find_FDE",
+        "-Wl,--wrap=_Unwind_GetGR",
+        "-Wl,--wrap=_Unwind_GetCFA",
+        "-Wl,--wrap=_Unwind_GetIP",
+        "-Wl,--wrap=_Unwind_GetIPInfo",
+        "-Wl,--wrap=_Unwind_GetRegionStart",
+        "-Wl,--wrap=_Unwind_GetDataRelBase",
+        "-Wl,--wrap=_Unwind_GetTextRelBase",
+        "-Wl,--wrap=_Unwind_SetIP",
+        "-Wl,--wrap=_Unwind_SetGR",
+        "-Wl,--wrap=_Unwind_GetLanguageSpecificData",
+        "-Wl,--wrap=_Unwind_FindEnclosingFunction",
+        "-Wl,--wrap=_Unwind_Resume",
+        "-Wl,--wrap=_Unwind_RaiseException",
+        "-Wl,--wrap=_Unwind_DeleteException",
+        "-Wl,--wrap=_Unwind_ForcedUnwind",
+        "-Wl,--wrap=_Unwind_Resume_or_Rethrow",
+        "-Wl,--wrap=_Unwind_Backtrace",
+        "-Wl,--wrap=__cxa_call_unexpected",
+        "-Wl,--wrap=__gxx_personality_v0",
         "-T", "esp32c3.rom.ld",
         "-T", "esp32c3.rom.api.ld",
         "-T", "esp32c3.rom.libgcc.ld",
@@ -93,6 +122,7 @@ env.Append(
         "-u", "pthread_include_pthread_cond_impl",
         "-u", "pthread_include_pthread_local_storage_impl",
         "-u", "start_app",
+        "-u", "__ubsan_include",
         "-u", "vfs_include_syscalls_impl",
         "-u", "call_user_start_cpu0",
         "-u", "app_main",
@@ -190,6 +220,8 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_http_server", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_https_ota", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_https_server", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_lcd", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "esp_lcd", "interface"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "protobuf-c", "protobuf-c"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "protocomm", "include", "common"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32c3", "include", "protocomm", "include", "security"),
@@ -228,7 +260,7 @@ env.Append(
     ],
 
     LIBS=[
-        "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lbt", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lconsole", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_https_server", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lspiffs", "-lwifi_provisioning", "-lesp_littlefs", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_hid", "-lesp_local_ctrl", "-lesp_https_server", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lmqtt", "-lwifi_provisioning", "-lprotocomm", "-lprotobuf-c", "-ljson", "-lfb_gfx", "-lbt", "-lbtdm_app", "-lbtbb", "-lesp_adc_cal", "-lmdns", "-lconsole", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lspiffs", "-lesp_littlefs", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lm", "-lnewlib", "-lgcc", "-lstdc++", "-lpthread", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
+        "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lbt", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lconsole", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_https_server", "-lesp_lcd", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lspiffs", "-lwifi_provisioning", "-lesp_littlefs", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_hid", "-lesp_lcd", "-lesp_local_ctrl", "-lesp_https_server", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lmqtt", "-lwifi_provisioning", "-lprotocomm", "-lprotobuf-c", "-ljson", "-lfb_gfx", "-lbt", "-lbtdm_app", "-lbtbb", "-lesp_adc_cal", "-lmdns", "-lconsole", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lspiffs", "-lesp_littlefs", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lriscv", "-lesp32c3", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lm", "-lnewlib", "-lstdc++", "-lpthread", "-lgcc", "-lcxx", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
     ],
 
     CPPDEFINES=[
@@ -237,7 +269,7 @@ env.Append(
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4-dev-960-gcf457d412\\"'),
+        ("IDF_VER", '\\"v4.4-dev-1404-gc13afea63\\"'),
         "ESP_PLATFORM",
         "ARDUINO_ARCH_ESP32",
         "ESP32",
diff --git a/tools/platformio-build-esp32s2.py b/tools/platformio-build-esp32s2.py
index 9fc27502..b2136aeb 100644
--- a/tools/platformio-build-esp32s2.py
+++ b/tools/platformio-build-esp32s2.py
@@ -74,6 +74,7 @@ env.Append(
         "-Wl,--gc-sections",
         "-fno-rtti",
         "-fno-lto",
+        "-Wl,--wrap=longjmp",
         "-Wl,--undefined=uxTopUsedPriority",
         "-T", "esp32s2.rom.ld",
         "-T", "esp32s2.rom.api.ld",
@@ -90,6 +91,7 @@ env.Append(
         "-u", "pthread_include_pthread_local_storage_impl",
         "-u", "ld_include_panic_highint_hdl",
         "-u", "start_app",
+        "-u", "__ubsan_include",
         "-u", "vfs_include_syscalls_impl",
         "-u", "call_user_start_cpu0",
         "-u", "app_main",
@@ -184,6 +186,8 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_http_server", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_https_ota", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_https_server", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_lcd", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_lcd", "interface"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "protobuf-c", "protobuf-c"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "protocomm", "include", "common"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "protocomm", "include", "security"),
@@ -213,11 +217,11 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "touch_element", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "ulp", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "wifi_provisioning", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_littlefs", "src"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_littlefs", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "freertos", "include", "freertos"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "arduino_tinyusb", "tinyusb", "src"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "arduino_tinyusb", "include"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_littlefs", "src"),
-        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp_littlefs", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dsp", "modules", "dotprod", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dsp", "modules", "support", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-dsp", "modules", "windows", "include"),
@@ -247,6 +251,8 @@ env.Append(
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-face", "image_util", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-face", "pose_estimation", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp-face", "lib", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp32-camera", "driver", "include"),
+        join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "esp32-camera", "conversions", "include"),
         join(FRAMEWORK_DIR, "tools", "sdk", "esp32s2", "include", "fb_gfx", "include"),
         join(FRAMEWORK_DIR, "cores", env.BoardConfig().get("build.core"))
     ],
@@ -257,7 +263,7 @@ env.Append(
     ],
 
     LIBS=[
-        "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lconsole", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_https_server", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lperfmon", "-lspiffs", "-ltouch_element", "-lulp", "-lusb", "-lwifi_provisioning", "-lesp_littlefs", "-lesp-dsp", "-lesp-face", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_hid", "-lesp_local_ctrl", "-lesp_https_server", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lmqtt", "-lperfmon", "-ltouch_element", "-lusb", "-lwifi_provisioning", "-lprotocomm", "-lprotobuf-c", "-ljson", "-lesp-dsp", "-lesp-face", "-lpe", "-lfd", "-lfr", "-ldetection_cat_face", "-ldetection", "-ldl", "-lfb_gfx", "-lesp_adc_cal", "-lmdns", "-lconsole", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lspiffs", "-larduino_tinyusb", "-lesp_littlefs", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lxt_hal", "-lm", "-lnewlib", "-lgcc", "-lstdc++", "-lpthread", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
+        "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lasio", "-lcbor", "-lunity", "-lcmock", "-lcoap", "-lconsole", "-lnghttp", "-lesp-tls", "-lesp_adc_cal", "-lesp_hid", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lesp_https_server", "-lesp_lcd", "-lprotobuf-c", "-lprotocomm", "-lmdns", "-lesp_local_ctrl", "-lsdmmc", "-lesp_serial_slave_link", "-lesp_websocket_client", "-lexpat", "-lwear_levelling", "-lfatfs", "-lfreemodbus", "-ljsmn", "-ljson", "-llibsodium", "-lmqtt", "-lopenssl", "-lperfmon", "-lspiffs", "-ltouch_element", "-lulp", "-lusb", "-lwifi_provisioning", "-lesp_littlefs", "-lesp-dsp", "-lesp-face", "-lesp32-camera", "-lfb_gfx", "-lasio", "-lcbor", "-lcmock", "-lunity", "-lcoap", "-lesp_hid", "-lesp_lcd", "-lesp_local_ctrl", "-lesp_https_server", "-lesp_websocket_client", "-lexpat", "-lfreemodbus", "-ljsmn", "-llibsodium", "-lmqtt", "-lperfmon", "-ltouch_element", "-lusb", "-lwifi_provisioning", "-lprotocomm", "-lprotobuf-c", "-ljson", "-larduino_tinyusb", "-lesp-dsp", "-lesp-face", "-lpe", "-lfd", "-lfr", "-ldetection_cat_face", "-ldetection", "-ldl", "-lesp32-camera", "-lfb_gfx", "-lesp_adc_cal", "-lmdns", "-lconsole", "-lfatfs", "-lwear_levelling", "-lopenssl", "-lspiffs", "-lesp_littlefs", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lmbedtls", "-lefuse", "-lapp_update", "-lbootloader_support", "-lesp_ipc", "-lspi_flash", "-lnvs_flash", "-lpthread", "-lesp_gdbstub", "-lespcoredump", "-lesp_system", "-lesp_rom", "-lhal", "-lvfs", "-lesp_eth", "-ltcpip_adapter", "-lesp_netif", "-lesp_event", "-lwpa_supplicant", "-lesp_wifi", "-llwip", "-llog", "-lheap", "-lsoc", "-lesp_hw_support", "-lesp_pm", "-lesp_ringbuf", "-ldriver", "-lxtensa", "-lesp32s2", "-lesp_common", "-lesp_timer", "-lfreertos", "-lnewlib", "-lcxx", "-lapp_trace", "-lnghttp", "-lesp-tls", "-ltcp_transport", "-lesp_http_client", "-lesp_http_server", "-lesp_https_ota", "-lsdmmc", "-lesp_serial_slave_link", "-lulp", "-lmbedtls", "-lmbedcrypto", "-lmbedx509", "-lcoexist", "-lcore", "-lespnow", "-lmesh", "-lnet80211", "-lpp", "-lsmartconfig", "-lwapi", "-lphy", "-lxt_hal", "-lm", "-lnewlib", "-lstdc++", "-lpthread", "-lgcc", "-lcxx", "-lapp_trace", "-lgcov", "-lapp_trace", "-lgcov", "-lc"
     ],
 
     CPPDEFINES=[
@@ -266,7 +272,7 @@ env.Append(
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4-dev-960-gcf457d412\\"'),
+        ("IDF_VER", '\\"v4.4-dev-1404-gc13afea63\\"'),
         "ESP_PLATFORM",
         "ARDUINO_ARCH_ESP32",
         "ESP32",
diff --git a/tools/sdk/esp32/bin/bootloader_dio_40m.bin b/tools/sdk/esp32/bin/bootloader_dio_40m.bin
index 0acb2312..30c73216 100644
Binary files a/tools/sdk/esp32/bin/bootloader_dio_40m.bin and b/tools/sdk/esp32/bin/bootloader_dio_40m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_dio_80m.bin b/tools/sdk/esp32/bin/bootloader_dio_80m.bin
index 791b4d25..8ce4ecbc 100644
Binary files a/tools/sdk/esp32/bin/bootloader_dio_80m.bin and b/tools/sdk/esp32/bin/bootloader_dio_80m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_dout_40m.bin b/tools/sdk/esp32/bin/bootloader_dout_40m.bin
index 583b260a..03357485 100644
Binary files a/tools/sdk/esp32/bin/bootloader_dout_40m.bin and b/tools/sdk/esp32/bin/bootloader_dout_40m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_dout_80m.bin b/tools/sdk/esp32/bin/bootloader_dout_80m.bin
index e88c652a..0919ec1b 100644
Binary files a/tools/sdk/esp32/bin/bootloader_dout_80m.bin and b/tools/sdk/esp32/bin/bootloader_dout_80m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_qio_40m.bin b/tools/sdk/esp32/bin/bootloader_qio_40m.bin
index e15f7e4c..57e658f8 100644
Binary files a/tools/sdk/esp32/bin/bootloader_qio_40m.bin and b/tools/sdk/esp32/bin/bootloader_qio_40m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_qio_80m.bin b/tools/sdk/esp32/bin/bootloader_qio_80m.bin
index 53c0cad6..0f6b0558 100644
Binary files a/tools/sdk/esp32/bin/bootloader_qio_80m.bin and b/tools/sdk/esp32/bin/bootloader_qio_80m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_qout_40m.bin b/tools/sdk/esp32/bin/bootloader_qout_40m.bin
index 0645bf9c..add87ba2 100644
Binary files a/tools/sdk/esp32/bin/bootloader_qout_40m.bin and b/tools/sdk/esp32/bin/bootloader_qout_40m.bin differ
diff --git a/tools/sdk/esp32/bin/bootloader_qout_80m.bin b/tools/sdk/esp32/bin/bootloader_qout_80m.bin
index 90eed553..d214206e 100644
Binary files a/tools/sdk/esp32/bin/bootloader_qout_80m.bin and b/tools/sdk/esp32/bin/bootloader_qout_80m.bin differ
diff --git a/tools/sdk/esp32/include/app_trace/include/esp_app_trace.h b/tools/sdk/esp32/include/app_trace/include/esp_app_trace.h
index b8374ae0..642b14c5 100644
--- a/tools/sdk/esp32/include/app_trace/include/esp_app_trace.h
+++ b/tools/sdk/esp32/include/app_trace/include/esp_app_trace.h
@@ -1,16 +1,8 @@
-// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef ESP_APP_TRACE_H_
 #define ESP_APP_TRACE_H_
 
diff --git a/tools/sdk/esp32/include/app_trace/include/esp_app_trace_util.h b/tools/sdk/esp32/include/app_trace/include/esp_app_trace_util.h
index 57c4f94f..a4de01c7 100644
--- a/tools/sdk/esp32/include/app_trace/include/esp_app_trace_util.h
+++ b/tools/sdk/esp32/include/app_trace/include/esp_app_trace_util.h
@@ -1,16 +1,8 @@
-// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef ESP_APP_TRACE_UTIL_H_
 #define ESP_APP_TRACE_UTIL_H_
 
diff --git a/tools/sdk/esp32/include/app_trace/include/esp_sysview_trace.h b/tools/sdk/esp32/include/app_trace/include/esp_sysview_trace.h
index 7a1bd5fd..b64fcca2 100644
--- a/tools/sdk/esp32/include/app_trace/include/esp_sysview_trace.h
+++ b/tools/sdk/esp32/include/app_trace/include/esp_sysview_trace.h
@@ -1,16 +1,8 @@
-// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef ESP_SYSVIEW_TRACE_H_
 #define ESP_SYSVIEW_TRACE_H_
 
diff --git a/tools/sdk/esp32/include/app_update/include/esp_ota_ops.h b/tools/sdk/esp32/include/app_update/include/esp_ota_ops.h
index 4d8053a6..ee29cdac 100644
--- a/tools/sdk/esp32/include/app_update/include/esp_ota_ops.h
+++ b/tools/sdk/esp32/include/app_update/include/esp_ota_ops.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef _OTA_OPS_H
 #define _OTA_OPS_H
diff --git a/tools/sdk/esp32/include/bootloader_support/include/bootloader_random.h b/tools/sdk/esp32/include/bootloader_support/include/bootloader_random.h
index 98a7712f..0c7b61eb 100644
--- a/tools/sdk/esp32/include/bootloader_support/include/bootloader_random.h
+++ b/tools/sdk/esp32/include/bootloader_support/include/bootloader_random.h
@@ -24,13 +24,14 @@ extern "C" {
  * @brief Enable early entropy source for RNG
  *
  * Uses the SAR ADC to feed entropy into the HWRNG. The ADC is put
- * into a test mode that reads the 1.1V internal reference source and
- * feeds the LSB of data into the HWRNG.
+ * into a test mode that reads an internal reference voltage and
+ * constantly feeds the LSB of data into the HWRNG. Consult the
+ * SoC Technical Reference Manual for more information.
  *
- * Can also be used from app code early during operation, if entropy
- * is required before WiFi stack is initialised. Call this function
- * from app code only if WiFi/BT are not yet enabled and I2S and SAR
- * ADC are not in use.
+ * Can also be used from app code early during operation, if true
+ * random numbers are required before WiFi stack is initialised.
+ * Call this function from app code only if WiFi/BT are not yet
+ * enabled and I2S and ADC are not in use.
  *
  * Call bootloader_random_disable() when done.
  */
diff --git a/tools/sdk/esp32/include/config/sdkconfig.h b/tools/sdk/esp32/include/config/sdkconfig.h
index 795fb0e9..fde174c8 100644
--- a/tools/sdk/esp32/include/config/sdkconfig.h
+++ b/tools/sdk/esp32/include/config/sdkconfig.h
@@ -152,12 +152,15 @@
 #define CONFIG_BT_SSP_ENABLED 1
 #define CONFIG_BT_BLE_ENABLED 1
 #define CONFIG_BT_GATTS_ENABLE 1
+#define CONFIG_BT_GATT_SR_PROFILES 8
 #define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO 1
 #define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MODE 0
 #define CONFIG_BT_GATTC_ENABLE 1
+#define CONFIG_BT_GATTC_CONNECT_RETRY_COUNT 3
 #define CONFIG_BT_BLE_SMP_ENABLE 1
 #define CONFIG_BT_STACK_NO_LOG 1
 #define CONFIG_BT_ACL_CONNECTIONS 4
+#define CONFIG_BT_MULTI_CONNECTION_ENBALE 1
 #define CONFIG_BT_ALLOCATION_FROM_SPIRAM_FIRST 1
 #define CONFIG_BT_BLE_DYNAMIC_ENV_MEMORY 1
 #define CONFIG_BT_SMP_ENABLE 1
@@ -340,6 +343,8 @@
 #define CONFIG_LIBSODIUM_USE_MBEDTLS_SHA 1
 #define CONFIG_LOG_DEFAULT_LEVEL_ERROR 1
 #define CONFIG_LOG_DEFAULT_LEVEL 1
+#define CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT 1
+#define CONFIG_LOG_MAXIMUM_LEVEL 1
 #define CONFIG_LOG_TIMESTAMP_SOURCE_RTOS 1
 #define CONFIG_LWIP_LOCAL_HOSTNAME "espressif"
 #define CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES 1
@@ -358,6 +363,7 @@
 #define CONFIG_LWIP_DHCPS_LEASE_UNIT 60
 #define CONFIG_LWIP_DHCPS_MAX_STATION_NUM 8
 #define CONFIG_LWIP_IPV6 1
+#define CONFIG_LWIP_IPV6_NUM_ADDRESSES 3
 #define CONFIG_LWIP_NETIF_LOOPBACK 1
 #define CONFIG_LWIP_LOOPBACK_MAX_PBUFS 8
 #define CONFIG_LWIP_MAX_ACTIVE_TCP 16
@@ -394,6 +400,7 @@
 #define CONFIG_LWIP_ESP_LWIP_ASSERT 1
 #define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
 #define CONFIG_LWIP_HOOK_IP6_ROUTE_NONE 1
+#define CONFIG_LWIP_HOOK_ND6_GET_GW_NONE 1
 #define CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE 1
 #define CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC 1
 #define CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN 16384
@@ -401,6 +408,7 @@
 #define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL 1
 #define CONFIG_MBEDTLS_HARDWARE_AES 1
 #define CONFIG_MBEDTLS_HARDWARE_MPI 1
+#define CONFIG_MBEDTLS_ROM_MD5 1
 #define CONFIG_MBEDTLS_HAVE_TIME 1
 #define CONFIG_MBEDTLS_ECDSA_DETERMINISTIC 1
 #define CONFIG_MBEDTLS_SHA512_C 1
@@ -652,5 +660,5 @@
 #define CONFIG_ULP_COPROC_ENABLED CONFIG_ESP32_ULP_COPROC_ENABLED
 #define CONFIG_ULP_COPROC_RESERVE_MEM CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
 #define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
-#define CONFIG_ARDUINO_IDF_COMMIT "cf457d412"
+#define CONFIG_ARDUINO_IDF_COMMIT "c13afea63"
 #define CONFIG_ARDUINO_IDF_BRANCH "master"
diff --git a/tools/sdk/esp32/include/driver/include/driver/adc_common.h b/tools/sdk/esp32/include/driver/include/driver/adc_common.h
index e38da915..f083b32d 100644
--- a/tools/sdk/esp32/include/driver/include/driver/adc_common.h
+++ b/tools/sdk/esp32/include/driver/include/driver/adc_common.h
@@ -49,8 +49,8 @@ typedef enum {
     ADC1_CHANNEL_5,     /*!< ADC1 channel 5 is GPIO6  */
     ADC1_CHANNEL_6,     /*!< ADC1 channel 6 is GPIO7  */
     ADC1_CHANNEL_7,     /*!< ADC1 channel 7 is GPIO8  */
-    ADC1_CHANNEL_8,     /*!< ADC1 channel 6 is GPIO9  */
-    ADC1_CHANNEL_9,     /*!< ADC1 channel 7 is GPIO10 */
+    ADC1_CHANNEL_8,     /*!< ADC1 channel 8 is GPIO9  */
+    ADC1_CHANNEL_9,     /*!< ADC1 channel 9 is GPIO10 */
     ADC1_CHANNEL_MAX,
 } adc1_channel_t;
 #elif CONFIG_IDF_TARGET_ESP32C3
@@ -135,7 +135,7 @@ typedef enum {
  * @brief Digital ADC DMA configuration
  */
 typedef struct adc_digi_init_config_s {
-    uint32_t max_store_buf_size;    ///< Max length of the converted data that driver can store before they are processed. When this length is reached, driver will dump out all the old data and start to store them again.
+    uint32_t max_store_buf_size;    ///< Max length of the converted data that driver can store before they are processed.
     uint32_t conv_num_each_intr;    ///< Bytes of data that can be converted in 1 interrupt.
     uint32_t adc1_chan_mask;        ///< Channel list of ADC1 to be initialized.
     uint32_t adc2_chan_mask;        ///< Channel list of ADC2 to be initialized.
diff --git a/tools/sdk/esp32/include/driver/include/driver/gpio.h b/tools/sdk/esp32/include/driver/include/driver/gpio.h
index aac81566..3e497e04 100644
--- a/tools/sdk/esp32/include/driver/include/driver/gpio.h
+++ b/tools/sdk/esp32/include/driver/include/driver/gpio.h
@@ -35,6 +35,8 @@
 #include "esp32s3/rom/gpio.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/gpio.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/gpio.h"
 #endif
 
 #ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
@@ -215,9 +217,9 @@ esp_err_t gpio_wakeup_disable(gpio_num_t gpio_num);
  * per-GPIO ISRs.
  *
  * @param  fn  Interrupt handler function.
+ * @param  arg  Parameter for handler function
  * @param  intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
  *            ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
- * @param  arg  Parameter for handler function
  * @param  handle Pointer to return handle. If non-NULL, a handle for the interrupt will be returned here.
  *
  * \verbatim embed:rst:leading-asterisk
diff --git a/tools/sdk/esp32/include/driver/include/driver/ledc.h b/tools/sdk/esp32/include/driver/include/driver/ledc.h
index 2ffcbd74..69660f3d 100644
--- a/tools/sdk/esp32/include/driver/include/driver/ledc.h
+++ b/tools/sdk/esp32/include/driver/include/driver/ledc.h
@@ -76,6 +76,7 @@ esp_err_t ledc_update_duty(ledc_mode_t speed_mode, ledc_channel_t channel);
 
 /**
  * @brief Set LEDC output gpio.
+ * @deprecated This function is redundant, please use ledc_channel_config to set gpio pins.
  *
  * @param  gpio_num The LEDC output gpio
  * @param  speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
@@ -85,8 +86,8 @@ esp_err_t ledc_update_duty(ledc_mode_t speed_mode, ledc_channel_t channel);
  *     - ESP_OK Success
  *     - ESP_ERR_INVALID_ARG Parameter error
  */
-esp_err_t ledc_set_pin(int gpio_num, ledc_mode_t speed_mode, ledc_channel_t ledc_channel);
-
+esp_err_t ledc_set_pin(int gpio_num, ledc_mode_t speed_mode, ledc_channel_t ledc_channel)
+    __attribute__((deprecated("use ledc_channel_config instead")));
 /**
  * @brief LEDC stop.
  *        Disable LEDC output, and set idle level
diff --git a/tools/sdk/esp32/include/driver/include/driver/mcpwm.h b/tools/sdk/esp32/include/driver/include/driver/mcpwm.h
index f4ec17a2..c19b80e4 100644
--- a/tools/sdk/esp32/include/driver/include/driver/mcpwm.h
+++ b/tools/sdk/esp32/include/driver/include/driver/mcpwm.h
@@ -568,6 +568,7 @@ esp_err_t mcpwm_fault_deinit(mcpwm_unit_t mcpwm_num, mcpwm_fault_signal_t fault_
  * @param cap_edge set capture edge, BIT(0) - negative edge, BIT(1) - positive edge
  * @param cap_sig capture pin, which needs to be enabled
  * @param num_of_pulse count time between rising/falling edge between 2 *(pulses mentioned), counter uses APB_CLK
+ *                     [0~MCPWM_LL_MAX_PRESCALE] (MCPWM_LL_MAX_PRESCALE = 255 on ESP32);
  *
  * @return
  *     - ESP_OK Success
diff --git a/tools/sdk/esp32/include/driver/include/driver/spi_slave_hd.h b/tools/sdk/esp32/include/driver/include/driver/spi_slave_hd.h
index 7e9289fb..b99d6fea 100644
--- a/tools/sdk/esp32/include/driver/include/driver/spi_slave_hd.h
+++ b/tools/sdk/esp32/include/driver/include/driver/spi_slave_hd.h
@@ -58,7 +58,9 @@ typedef enum {
 typedef struct {
     slave_cb_t cb_buffer_tx;                    ///< Callback when master reads from shared buffer
     slave_cb_t cb_buffer_rx;                    ///< Callback when master writes to shared buffer
+    slave_cb_t cb_send_dma_ready;               ///< Callback when TX data buffer is loaded to the hardware (DMA)
     slave_cb_t cb_sent;                         ///< Callback when data are sent
+    slave_cb_t cb_recv_dma_ready;               ///< Callback when RX data buffer is loaded to the hardware (DMA)
     slave_cb_t cb_recv;                         ///< Callback when data are received
     slave_cb_t cb_cmd9;                         ///< Callback when CMD9 received
     slave_cb_t cb_cmdA;                         ///< Callback when CMDA received
diff --git a/tools/sdk/esp32/include/driver/include/driver/timer.h b/tools/sdk/esp32/include/driver/include/driver/timer.h
index 1a4c074a..609d1006 100644
--- a/tools/sdk/esp32/include/driver/include/driver/timer.h
+++ b/tools/sdk/esp32/include/driver/include/driver/timer.h
@@ -432,6 +432,8 @@ void timer_group_clr_intr_sta_in_isr(timer_group_t group_num, timer_intr_t intr_
 bool timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer_idx_t timer_num);
 
 /** @brief Take timer spinlock to enter critical protect
+ *
+ *  @note Deprecated, the recommended way is to use ISR callbacks instead, see timer_group_example_main
  *
  * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
  *
@@ -439,9 +441,11 @@ bool timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer_idx_t tim
  *     - ESP_OK Success
  *     - ESP_ERR_INVALID_ARG Parameter error
  */
-esp_err_t timer_spinlock_take(timer_group_t group_num);
+esp_err_t timer_spinlock_take(timer_group_t group_num) __attribute__ ((deprecated));
 
 /** @brief Give timer spinlock to exit critical protect
+ *
+ *  @note Deprecated, the recommended way is to use ISR callbacks instead, see timer_group_example_main
  *
  * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
  *
@@ -449,7 +453,7 @@ esp_err_t timer_spinlock_take(timer_group_t group_num);
  *     - ESP_OK Success
  *     - ESP_ERR_INVALID_ARG Parameter error
  */
-esp_err_t timer_spinlock_give(timer_group_t group_num);
+esp_err_t timer_spinlock_give(timer_group_t group_num) __attribute__ ((deprecated));
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32/include/driver/include/esp_private/gdma.h b/tools/sdk/esp32/include/driver/include/esp_private/gdma.h
index dc27f582..2614a2d0 100644
--- a/tools/sdk/esp32/include/driver/include/esp_private/gdma.h
+++ b/tools/sdk/esp32/include/driver/include/esp_private/gdma.h
@@ -155,6 +155,7 @@ esp_err_t gdma_new_channel(const gdma_channel_alloc_config_t *config, gdma_chann
  * @brief Connect GDMA channel to trigger peripheral
  *
  * @note Suggest to use helper macro `GDMA_MAKE_TRIGGER` to construct parameter `trig_periph`. e.g. GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SHA,0)
+ * @note Connecting to a peripheral will also reset the DMA FIFO and FSM automatically
  *
  * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
  * @param[in] trig_periph GDMA trigger peripheral
@@ -279,6 +280,18 @@ esp_err_t gdma_stop(gdma_channel_handle_t dma_chan);
  */
 esp_err_t gdma_append(gdma_channel_handle_t dma_chan);
 
+/**
+ * @brief Reset DMA channel FIFO and internal finite state machine
+ * @note Resetting a DMA channel won't break the connection with the target peripheral
+ *
+ * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @return
+ *      - ESP_OK: DMA channel reset successfully
+ *      - ESP_ERR_INVALID_ARG: DMA channel reset failed due to invalid arguments
+ *      - ESP_FAIL: DMA channel reset failed due to other errors
+ */
+esp_err_t gdma_reset(gdma_channel_handle_t dma_chan);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/esp32-camera/conversions/include/img_converters.h b/tools/sdk/esp32/include/esp32-camera/conversions/include/img_converters.h
index 330f8db8..f736200a 100644
--- a/tools/sdk/esp32/include/esp32-camera/conversions/include/img_converters.h
+++ b/tools/sdk/esp32/include/esp32-camera/conversions/include/img_converters.h
@@ -22,6 +22,7 @@ extern "C" {
 #include <stdint.h>
 #include <stdbool.h>
 #include "esp_camera.h"
+#include "esp_jpg_decode.h"
 
 typedef size_t (* jpg_out_cb)(void * arg, size_t index, const void* data, size_t len);
 
@@ -120,6 +121,8 @@ bool frame2bmp(camera_fb_t * fb, uint8_t ** out, size_t * out_len);
  */
 bool fmt2rgb888(const uint8_t *src_buf, size_t src_len, pixformat_t format, uint8_t * rgb_buf);
 
+bool jpg2rgb565(const uint8_t *src, size_t src_len, uint8_t * out, jpg_scale_t scale);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/esp32-camera/driver/include/esp_camera.h b/tools/sdk/esp32/include/esp32-camera/driver/include/esp_camera.h
index dadd0c09..46d9cf16 100755
--- a/tools/sdk/esp32/include/esp32-camera/driver/include/esp_camera.h
+++ b/tools/sdk/esp32/include/esp32-camera/driver/include/esp_camera.h
@@ -38,7 +38,8 @@
         .pixel_format   = PIXFORMAT_JPEG,
         .frame_size     = FRAMESIZE_SVGA,
         .jpeg_quality   = 10,
-        .fb_count       = 2
+        .fb_count       = 2,
+        .grab_mode      = CAMERA_GRAB_WHEN_EMPTY
     };
 
     esp_err_t camera_example_init(){
@@ -74,6 +75,14 @@
 extern "C" {
 #endif
 
+/**
+ * @brief Configuration structure for camera initialization
+ */
+typedef enum {
+    CAMERA_GRAB_WHEN_EMPTY,         /*!< Fills buffers when they are empty. Less resources but first 'fb_count' frames might be old */
+    CAMERA_GRAB_LATEST              /*!< Except when 1 frame buffer is used, queue will always contain the last 'fb_count' frames */
+} camera_grab_mode_t;
+
 /**
  * @brief Configuration structure for camera initialization
  */
@@ -105,6 +114,7 @@ typedef struct {
 
     int jpeg_quality;               /*!< Quality of JPEG output. 0-63 lower means higher quality  */
     size_t fb_count;                /*!< Number of frame buffers to be allocated. If more than one, then each frame will be acquired (double speed)  */
+    camera_grab_mode_t grab_mode;   /*!< When buffers should be filled */
 } camera_config_t;
 
 /**
diff --git a/tools/sdk/esp32/include/esp32-camera/driver/include/sensor.h b/tools/sdk/esp32/include/esp32-camera/driver/include/sensor.h
index ad6cd890..ac54731e 100755
--- a/tools/sdk/esp32/include/esp32-camera/driver/include/sensor.h
+++ b/tools/sdk/esp32/include/esp32-camera/driver/include/sensor.h
@@ -11,13 +11,45 @@
 #include <stdint.h>
 #include <stdbool.h>
 
-#define NT99141_PID     (0x14)
-#define OV9650_PID     (0x96)
-#define OV7725_PID     (0x77)
-#define OV2640_PID     (0x26)
-#define OV3660_PID     (0x36)
-#define OV5640_PID     (0x56)
-#define OV7670_PID     (0x76)
+// Chip ID Registers
+#define REG_PID        0x0A
+#define REG_VER        0x0B
+#define REG_MIDH       0x1C
+#define REG_MIDL       0x1D
+
+#define REG16_CHIDH     0x300A
+#define REG16_CHIDL     0x300B
+
+typedef enum {
+    OV9650_PID = 0x96,
+    OV7725_PID = 0x77,
+    OV2640_PID = 0x26,
+    OV3660_PID = 0x36,
+    OV5640_PID = 0x56,
+    OV7670_PID = 0x76,
+    NT99141_PID = 0x14
+} camera_pid_t;
+
+typedef enum {
+    CAMERA_OV7725,
+    CAMERA_OV2640,
+    CAMERA_OV3660,
+    CAMERA_OV5640,
+    CAMERA_OV7670,
+    CAMERA_NT99141,
+    CAMERA_MODEL_MAX,
+    CAMERA_NONE,
+    CAMERA_UNKNOWN
+} camera_model_t;
+
+typedef enum {
+    OV2640_SCCB_ADDR   = 0x30,
+    OV5640_SCCB_ADDR   = 0x3C,
+    OV3660_SCCB_ADDR   = 0x3C,
+    OV7725_SCCB_ADDR   = 0x21,
+    OV7670_SCCB_ADDR   = 0x21,
+    NT99141_SCCB_ADDR  = 0x2A,
+} camera_sccb_addr_t;
 
 typedef enum {
     PIXFORMAT_RGB565,    // 2BPP/RGB565
@@ -58,6 +90,13 @@ typedef enum {
     FRAMESIZE_INVALID
 } framesize_t;
 
+typedef struct {
+    const camera_model_t model;
+    const camera_sccb_addr_t sccb_addr;
+    const camera_pid_t pid;
+    const framesize_t max_size;
+} camera_sensor_info_t;
+
 typedef enum {
     ASPECT_RATIO_4X3,
     ASPECT_RATIO_3X2,
@@ -101,6 +140,8 @@ typedef struct {
 
 // Resolution table (in sensor.c)
 extern const resolution_info_t resolution[];
+// camera sensor table (in sensor.c)
+extern const camera_sensor_info_t camera_sensor[];
 
 typedef struct {
     uint8_t MIDH;
diff --git a/tools/sdk/esp32/include/esp32/include/esp32/spiram.h b/tools/sdk/esp32/include/esp32/include/esp32/spiram.h
index ccbca2c0..bd48e8db 100644
--- a/tools/sdk/esp32/include/esp32/include/esp32/spiram.h
+++ b/tools/sdk/esp32/include/esp32/include/esp32/spiram.h
@@ -21,6 +21,10 @@
 #include <stdbool.h>
 #include "esp_err.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 typedef enum {
     ESP_SPIRAM_SIZE_16MBITS = 0,   /*!< SPI RAM size is 16 MBits */
     ESP_SPIRAM_SIZE_32MBITS = 1,   /*!< SPI RAM size is 32 MBits */
@@ -114,3 +118,7 @@ bool esp_spiram_is_initialized(void);
 
 
 #endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp32/include/esp_ssc.h b/tools/sdk/esp32/include/esp32/include/esp_ssc.h
deleted file mode 100644
index 02893ff4..00000000
--- a/tools/sdk/esp32/include/esp32/include/esp_ssc.h
+++ /dev/null
@@ -1,119 +0,0 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#ifndef __ESP_SSC_H__
-#define __ESP_SSC_H__
-
-#include <stdint.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define CMD_T_ASYNC   0x01
-#define CMD_T_SYNC    0x02
-
-typedef struct cmd_s {
-    char *cmd_str;
-    uint8_t flag;
-    uint8_t id;
-    void (* cmd_func)(void);
-    void (* cmd_callback)(void *arg);
-} ssc_cmd_t;
-
-#define MAX_LINE_N  127
-
-typedef enum {
-    SSC_BR_9600   = 9600,
-    SSC_BR_19200  = 19200,
-    SSC_BR_38400  = 38400,
-    SSC_BR_57600  = 57600,
-    SSC_BR_74880  = 74880,
-    SSC_BR_115200 = 115200,
-    SSC_BR_230400 = 230400,
-    SSC_BR_460800 = 460800,
-    SSC_BR_921600 = 921600
-} SscBaudRate;
-
-/** \defgroup SSC_APIs SSC APIs
-  * @brief SSC APIs
-  *
-  * SSC means simple serial command.
-  * SSC APIs allows users to define their own command, users can refer to spiffs_test/test_main.c.
-  *
-  */
-
-/** @addtogroup SSC_APIs
-  * @{
-  */
-
-/**
-  * @brief  Initial the ssc function.
-  *
-  * @attention param is no use, just compatible with ESP8266, default bandrate is 115200
-  *
-  * @param  SscBaudRate bandrate : baud rate
-  *
-  * @return null
-  */
-void ssc_attach(SscBaudRate bandrate);
-
-/**
-  * @brief   Get the length of the simple serial command.
-  *
-  * @param   null
-  *
-  * @return  length of the command.
-  */
-int ssc_param_len(void);
-
-/**
-  * @brief   Get the simple serial command string.
-  *
-  * @param   null
-  *
-  * @return  the command.
-  */
-char *ssc_param_str(void);
-
-/**
-  * @brief   Parse the simple serial command (ssc).
-  *
-  * @param   char *pLine  : [input] the ssc string
-  * @param   char *argv[] : [output] parameters of the ssc
-  *
-  * @return  the number of parameters.
-  */
-int ssc_parse_param(char *pLine, char *argv[]);
-
-/**
-  * @brief  Register the user-defined simple serial command (ssc) set.
-  *
-  * @param  ssc_cmd_t *cmdset   : the ssc set
-  * @param  uint8 cmdnum        : number of commands
-  * @param  void (* help)(void) : callback of user-guide
-  *
-  * @return  null
-  */
-void ssc_register(ssc_cmd_t *cmdset, uint8_t cmdnum, void (* help)(void));
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __ESP_SSC_H__ */
diff --git a/tools/sdk/esp32/include/esp_eth/include/esp_eth.h b/tools/sdk/esp32/include/esp_eth/include/esp_eth.h
index 480349d5..d204b508 100644
--- a/tools/sdk/esp32/include/esp_eth/include/esp_eth.h
+++ b/tools/sdk/esp32/include/esp_eth/include/esp_eth.h
@@ -86,6 +86,47 @@ typedef struct {
     */
     esp_err_t (*on_lowlevel_deinit_done)(esp_eth_handle_t eth_handle);
 
+    /**
+    * @brief Read PHY register
+    *
+    * @note Usually the PHY register read/write function is provided by MAC (SMI interface),
+    *       but if the PHY device is managed by other interface (e.g. I2C), then user needs to
+    *       implement the corresponding read/write.
+    *       Setting this to NULL means your PHY device is managed by MAC's SMI interface.
+    *
+    * @param[in] eth_handle: handle of Ethernet driver
+    * @param[in] phy_addr: PHY chip address (0~31)
+    * @param[in] phy_reg: PHY register index code
+    * @param[out] reg_value: PHY register value
+    *
+    * @return
+    *      - ESP_OK: read PHY register successfully
+    *      - ESP_ERR_INVALID_ARG: read PHY register failed because of invalid argument
+    *      - ESP_ERR_TIMEOUT: read PHY register failed because of timeout
+    *      - ESP_FAIL: read PHY register failed because some other error occurred
+    */
+    esp_err_t (*read_phy_reg)(esp_eth_handle_t eth_handle, uint32_t phy_addr, uint32_t phy_reg, uint32_t *reg_value);
+
+    /**
+    * @brief Write PHY register
+    *
+    * @note Usually the PHY register read/write function is provided by MAC (SMI interface),
+    *       but if the PHY device is managed by other interface (e.g. I2C), then user needs to
+    *       implement the corresponding read/write.
+    *       Setting this to NULL means your PHY device is managed by MAC's SMI interface.
+    *
+    * @param[in] eth_handle: handle of Ethernet driver
+    * @param[in] phy_addr: PHY chip address (0~31)
+    * @param[in] phy_reg: PHY register index code
+    * @param[in] reg_value: PHY register value
+    *
+    * @return
+    *      - ESP_OK: write PHY register successfully
+    *      - ESP_ERR_INVALID_ARG: read PHY register failed because of invalid argument
+    *      - ESP_ERR_TIMEOUT: write PHY register failed because of timeout
+    *      - ESP_FAIL: write PHY register failed because some other error occurred
+    */
+    esp_err_t (*write_phy_reg)(esp_eth_handle_t eth_handle, uint32_t phy_addr, uint32_t phy_reg, uint32_t reg_value);
 } esp_eth_config_t;
 
 /**
@@ -100,6 +141,8 @@ typedef struct {
         .stack_input = NULL,             \
         .on_lowlevel_init_done = NULL,   \
         .on_lowlevel_deinit_done = NULL, \
+        .read_phy_reg = NULL,            \
+        .write_phy_reg = NULL,           \
     }
 
 /**
diff --git a/tools/sdk/esp32/include/esp_eth/include/esp_eth_mac.h b/tools/sdk/esp32/include/esp_eth/include/esp_eth_mac.h
index 7543fdd2..042c369f 100644
--- a/tools/sdk/esp32/include/esp_eth/include/esp_eth_mac.h
+++ b/tools/sdk/esp32/include/esp_eth/include/esp_eth_mac.h
@@ -396,6 +396,39 @@ typedef struct {
 esp_eth_mac_t *esp_eth_mac_new_w5500(const eth_w5500_config_t *w5500_config, const eth_mac_config_t *mac_config);
 #endif // CONFIG_ETH_SPI_ETHERNET_W5500
 
+#if CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL
+/**
+ * @brief KSZ8851SNL specific configuration
+ *
+ */
+typedef struct {
+    void *spi_hdl;     /*!< Handle of SPI device driver */
+    int int_gpio_num;  /*!< Interrupt GPIO number */
+} eth_ksz8851snl_config_t;
+
+/**
+ * @brief Default KSZ8851SNL specific configuration
+ *
+ */
+#define ETH_KSZ8851SNL_DEFAULT_CONFIG(spi_device) \
+    {                                        \
+        .spi_hdl = spi_device,               \
+        .int_gpio_num = 14,                   \
+    }
+
+/**
+* @brief Create KSZ8851SNL Ethernet MAC instance
+*
+* @param ksz8851snl_config: KSZ8851SNL specific configuration
+* @param mac_config: Ethernet MAC configuration
+*
+* @return
+*      - instance: create MAC instance successfully
+*      - NULL: create MAC instance failed because some error occurred
+*/
+esp_eth_mac_t *esp_eth_mac_new_ksz8851snl(const eth_ksz8851snl_config_t *ksz8851snl_config, const eth_mac_config_t *mac_config);
+#endif // CONFIG_ETH_SPI_ETHERNET_KSZ8851
+
 #if CONFIG_ETH_USE_OPENETH
 /**
 * @brief Create OpenCores Ethernet MAC instance
diff --git a/tools/sdk/esp32/include/esp_eth/include/esp_eth_phy.h b/tools/sdk/esp32/include/esp_eth/include/esp_eth_phy.h
index 9dbc2ef9..c9d32b36 100644
--- a/tools/sdk/esp32/include/esp_eth/include/esp_eth_phy.h
+++ b/tools/sdk/esp32/include/esp_eth/include/esp_eth_phy.h
@@ -300,6 +300,19 @@ esp_eth_phy_t *esp_eth_phy_new_dm9051(const eth_phy_config_t *config);
 */
 esp_eth_phy_t *esp_eth_phy_new_w5500(const eth_phy_config_t *config);
 #endif
+
+#if CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL
+/**
+* @brief Create a PHY instance of KSZ8851SNL
+*
+* @param[in] config: configuration of PHY
+*
+* @return
+*      - instance: create PHY instance successfully
+*      - NULL: create PHY instance failed because some error occurred
+*/
+esp_eth_phy_t *esp_eth_phy_new_ksz8851snl(const eth_phy_config_t *config);
+#endif
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/esp_event/include/esp_event_legacy.h b/tools/sdk/esp32/include/esp_event/include/esp_event_legacy.h
index 021ac407..dbeeced6 100644
--- a/tools/sdk/esp32/include/esp_event/include/esp_event_legacy.h
+++ b/tools/sdk/esp32/include/esp_event/include/esp_event_legacy.h
@@ -58,6 +58,7 @@ typedef enum {
     SYSTEM_EVENT_ETH_CONNECTED,            /*!< ESP32 ethernet phy link up */
     SYSTEM_EVENT_ETH_DISCONNECTED,         /*!< ESP32 ethernet phy link down */
     SYSTEM_EVENT_ETH_GOT_IP,               /*!< ESP32 ethernet got IP from connected AP */
+    SYSTEM_EVENT_ETH_LOST_IP,              /*!< ESP32 ethernet lost IP and the IP is reset to 0 */
     SYSTEM_EVENT_MAX                       /*!< Number of members in this enum */
 } system_event_id_t;
 
diff --git a/tools/sdk/esp32/include/esp_hid/include/esp_hidh.h b/tools/sdk/esp32/include/esp_hid/include/esp_hidh.h
index b1a82643..d3d10021 100644
--- a/tools/sdk/esp32/include/esp_hid/include/esp_hidh.h
+++ b/tools/sdk/esp32/include/esp_hid/include/esp_hidh.h
@@ -100,6 +100,7 @@ typedef union {
 
 typedef struct {
     esp_event_handler_t callback;
+    uint16_t event_stack_size;
 } esp_hidh_config_t;
 
 /**
diff --git a/tools/sdk/esp32/include/esp_http_client/include/esp_http_client.h b/tools/sdk/esp32/include/esp_http_client/include/esp_http_client.h
index 249eb217..0f89972f 100644
--- a/tools/sdk/esp32/include/esp_http_client/include/esp_http_client.h
+++ b/tools/sdk/esp32/include/esp_http_client/include/esp_http_client.h
@@ -334,7 +334,7 @@ esp_err_t esp_http_client_get_password(esp_http_client_handle_t client, char **v
  *     - ESP_OK
  *     - ESP_ERR_INVALID_ARG
  */
-esp_err_t esp_http_client_set_password(esp_http_client_handle_t client, char *password);
+esp_err_t esp_http_client_set_password(esp_http_client_handle_t client, const char *password);
 
 /**
  * @brief      Set http request auth_type.
@@ -360,6 +360,18 @@ esp_err_t esp_http_client_set_authtype(esp_http_client_handle_t client, esp_http
  */
 esp_err_t esp_http_client_set_method(esp_http_client_handle_t client, esp_http_client_method_t method);
 
+/**
+ * @brief      Set http request timeout
+ *
+ * @param[in]  client      The esp_http_client handle
+ * @param[in]  timeout_ms  The timeout value
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_ERR_INVALID_ARG
+ */
+esp_err_t esp_http_client_set_timeout_ms(esp_http_client_handle_t client, int timeout_ms);
+
 /**
  * @brief      Delete http request header
  *
diff --git a/tools/sdk/esp32/include/esp_https_ota/include/esp_https_ota.h b/tools/sdk/esp32/include/esp_https_ota/include/esp_https_ota.h
index 2a987ca6..a87ba8df 100644
--- a/tools/sdk/esp32/include/esp_https_ota/include/esp_https_ota.h
+++ b/tools/sdk/esp32/include/esp_https_ota/include/esp_https_ota.h
@@ -201,6 +201,21 @@ esp_err_t esp_https_ota_get_img_desc(esp_https_ota_handle_t https_ota_handle, es
 */
 int esp_https_ota_get_image_len_read(esp_https_ota_handle_t https_ota_handle);
 
+
+/**
+* @brief  This function returns OTA image total size.
+*
+* @note   This API should be called after esp_https_ota_begin() has been already called.
+*         This can be used to create some sort of progress indication
+*         (in combination with esp_https_ota_get_image_len_read())
+*
+* @param[in]   https_ota_handle   pointer to esp_https_ota_handle_t structure
+*
+* @return
+*    - -1    On failure or chunked encoding
+*    - total bytes of image
+*/
+int esp_https_ota_get_image_size(esp_https_ota_handle_t https_ota_handle);
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/esp_mac.h b/tools/sdk/esp32/include/esp_hw_support/include/esp_mac.h
index 9d91d8ce..698ccaa6 100644
--- a/tools/sdk/esp32/include/esp_hw_support/include/esp_mac.h
+++ b/tools/sdk/esp32/include/esp_hw_support/include/esp_mac.h
@@ -47,17 +47,17 @@ typedef enum {
   * @brief  Set base MAC address with the MAC address which is stored in BLK3 of EFUSE or
   *         external storage e.g. flash and EEPROM.
   *
-  * Base MAC address is used to generate the MAC addresses used by the networking interfaces.
-  * If using base MAC address stored in BLK3 of EFUSE or external storage, call this API to set base MAC
-  * address with the MAC address which is stored in BLK3 of EFUSE or external storage before initializing
-  * WiFi/BT/Ethernet.
+  * Base MAC address is used to generate the MAC addresses used by network interfaces.
+  *
+  * If using a custom base MAC address, call this API before initializing any network interfaces.
+  * Refer to the ESP-IDF Programming Guide for details about how the Base MAC is used.
   *
   * @note Base MAC must be a unicast MAC (least significant bit of first byte must be zero).
   *
   * @note If not using a valid OUI, set the "locally administered" bit
   *       (bit value 0x02 in the first byte) to avoid collisions.
   *
-  * @param  mac  base MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes.
   *
   * @return ESP_OK on success
   *         ESP_ERR_INVALID_ARG If mac is NULL or is not a unicast MAC
@@ -67,7 +67,9 @@ esp_err_t esp_base_mac_addr_set(const uint8_t *mac);
 /**
   * @brief  Return base MAC address which is set using esp_base_mac_addr_set.
   *
-  * @param  mac  base MAC address, length: 6 bytes.
+  * @note If no custom Base MAC has been set, this returns the pre-programmed Espressif base MAC address.
+  *
+  * @param  mac base MAC address, length: 6 bytes.
   *
   * @return ESP_OK on success
   *         ESP_ERR_INVALID_MAC base MAC address has not been set
@@ -78,10 +80,14 @@ esp_err_t esp_base_mac_addr_get(uint8_t *mac);
   * @brief  Return base MAC address which was previously written to BLK3 of EFUSE.
   *
   * Base MAC address is used to generate the MAC addresses used by the networking interfaces.
-  * This API returns the custom base MAC address which was previously written to BLK3 of EFUSE.
+  * This API returns the custom base MAC address which was previously written to EFUSE BLK3 in
+  * a specified format.
+  *
   * Writing this EFUSE allows setting of a different (non-Espressif) base MAC address. It is also
   * possible to store a custom base MAC address elsewhere, see esp_base_mac_addr_set() for details.
   *
+  * @note This function is currently only supported on ESP32.
+  *
   * @param  mac  base MAC address, length: 6 bytes.
   *
   * @return ESP_OK on success
@@ -91,7 +97,7 @@ esp_err_t esp_base_mac_addr_get(uint8_t *mac);
 esp_err_t esp_efuse_mac_get_custom(uint8_t *mac);
 
 /**
-  * @brief  Return base MAC address which is factory-programmed by Espressif in BLK0 of EFUSE.
+  * @brief  Return base MAC address which is factory-programmed by Espressif in EFUSE.
   *
   * @param  mac  base MAC address, length: 6 bytes.
   *
@@ -102,12 +108,12 @@ esp_err_t esp_efuse_mac_get_default(uint8_t *mac);
 /**
   * @brief  Read base MAC address and set MAC address of the interface.
   *
-  * This function first get base MAC address using esp_base_mac_addr_get or reads base MAC address
-  * from BLK0 of EFUSE. Then set the MAC address of the interface including wifi station, wifi softap,
-  * bluetooth and ethernet.
+  * This function first get base MAC address using esp_base_mac_addr_get().
+  * Then calculates the MAC address of the specific interface requested,
+  * refer to ESP-IDF Programming Guide for the algorithm.
   *
   * @param  mac  MAC address of the interface, length: 6 bytes.
-  * @param  type  type of MAC address, 0:wifi station, 1:wifi softap, 2:bluetooth, 3:ethernet.
+  * @param  type Type of MAC address to return
   *
   * @return ESP_OK on success
   */
@@ -116,11 +122,13 @@ esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type);
 /**
   * @brief Derive local MAC address from universal MAC address.
   *
-  * This function derives a local MAC address from an universal MAC address.
-  * A `definition of local vs universal MAC address can be found on Wikipedia
-  * <https://en.wikipedia.org/wiki/MAC_address#Universal_vs._local>`.
-  * In ESP32, universal MAC address is generated from base MAC address in EFUSE or other external storage.
-  * Local MAC address is derived from the universal MAC address.
+  * This function copies a universal MAC address and then sets the "locally
+  * administered" bit (bit 0x2) in the first octet, creating a locally
+  * administered MAC address.
+  *
+  * If the universal MAC address argument is already a locally administered MAC
+  * address, then the first octet is XORed with 0x4 in order to create a different
+  * locally administered MAC address.
   *
   * @param  local_mac  Derived local MAC address, length: 6 bytes.
   * @param  universal_mac  Source universal MAC address, length: 6 bytes.
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/esp_random.h b/tools/sdk/esp32/include/esp_hw_support/include/esp_random.h
index 26756b9d..7064fa81 100644
--- a/tools/sdk/esp32/include/esp_hw_support/include/esp_random.h
+++ b/tools/sdk/esp32/include/esp_hw_support/include/esp_random.h
@@ -24,16 +24,27 @@ extern "C" {
 /**
  * @brief  Get one random 32-bit word from hardware RNG
  *
- * The hardware RNG is fully functional whenever an RF subsystem is running (ie Bluetooth or WiFi is enabled). For
- * random values, call this function after WiFi or Bluetooth are started.
+ * The hardware RNG produces true random numbers under any of the following conditions:
  *
- * If the RF subsystem is not used by the program, the function bootloader_random_enable() can be called to enable an
- * entropy source. bootloader_random_disable() must be called before RF subsystem or I2S peripheral are used. See these functions'
- * documentation for more details.
+ * - An RF subsystem is running (i.e. Bluetooth or WiFi is enabled)
+ * - An internal entropy source has been enabled by calling bootloader_random_enable()
+ *   and not yet disabled by calling bootloader_random_disable()
+ * - While the ESP-IDF bootloader is running (due to the internal entropy source being enabled
+ *   for the duration of bootloader execution).
  *
- * Any time the app is running without an RF subsystem (or bootloader_random) enabled, RNG hardware should be
- * considered a PRNG. A very small amount of entropy is available due to pre-seeding while the IDF
- * bootloader is running, but this should not be relied upon for any use.
+ * If none of the above conditions are true, the hardware RNG will produce pseudo-random numbers only.
+ *
+ * When the hardware RNG is producing true random numbers, external entropy (noise samples) are
+ * continuously mixed into the internal hardware RNG state. Consult the SoC Technical Reference Manual
+ * for more details.
+ *
+ * This function automatically busy-waits to ensure enough external entropy has been
+ * introduced into the hardware RNG state, before returning a new random number.
+ *
+ * If generating random numbers from an app which has not yet enabled Bluetooth or Wi-Fi, call the
+ * API function bootloader_random_enable() before generating random numbers and then call
+ * bootloader_random_disable() before using any APIs for Bluetooth, Wi-Fi, ADC, or I2S. Consult the
+ * bootloader_random.h header for more details.
  *
  * @return Random value between 0 and UINT32_MAX
  */
diff --git a/tools/sdk/esp32/include/esp_hw_support/include/esp_sleep.h b/tools/sdk/esp32/include/esp_hw_support/include/esp_sleep.h
index 1d81f716..000d020a 100644
--- a/tools/sdk/esp32/include/esp_hw_support/include/esp_sleep.h
+++ b/tools/sdk/esp32/include/esp_hw_support/include/esp_sleep.h
@@ -303,6 +303,12 @@ esp_err_t esp_sleep_enable_uart_wakeup(int uart_num);
  */
 esp_err_t esp_sleep_enable_wifi_wakeup(void);
 
+/**
+ * @brief Disable wakeup by WiFi MAC
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t esp_sleep_disable_wifi_wakeup(void);
 
 /**
  * @brief Get the bit mask of GPIOs which caused wakeup (ext1)
diff --git a/tools/sdk/esp32/include/esp_hw_support/port/esp32/regi2c_ctrl.h b/tools/sdk/esp32/include/esp_hw_support/port/esp32/regi2c_ctrl.h
index d896cb2b..69f29192 100644
--- a/tools/sdk/esp32/include/esp_hw_support/port/esp32/regi2c_ctrl.h
+++ b/tools/sdk/esp32/include/esp_hw_support/port/esp32/regi2c_ctrl.h
@@ -37,20 +37,45 @@ uint8_t rom_i2c_readReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, ui
 void rom_i2c_writeReg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data);
 void rom_i2c_writeReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data);
 
+#ifdef BOOTLOADER_BUILD
+
+/**
+ * If compiling for the bootloader, ROM functions can be called directly,
+ * without the need of a lock.
+ */
+#define regi2c_ctrl_read_reg         rom_i2c_readReg
+#define regi2c_ctrl_read_reg_mask    rom_i2c_readReg_Mask
+#define regi2c_ctrl_write_reg        rom_i2c_writeReg
+#define regi2c_ctrl_write_reg_mask   rom_i2c_writeReg_Mask
+
+#else
+
+#define i2c_read_reg_raw        rom_i2c_readReg
+#define i2c_read_reg_mask_raw   rom_i2c_readReg_Mask
+#define i2c_write_reg_raw       rom_i2c_writeReg
+#define i2c_write_reg_mask_raw  rom_i2c_writeReg_Mask
+
+uint8_t regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add);
+uint8_t regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb);
+void regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data);
+void regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data);
+
+#endif // BOOTLOADER_BUILD
+
 /* Convenience macros for the above functions, these use register definitions
  * from regi2c_apll.h/regi2c_bbpll.h header files.
  */
 #define REGI2C_WRITE_MASK(block, reg_add, indata) \
-      rom_i2c_writeReg_Mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB,  indata)
+      regi2c_ctrl_write_reg_mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB,  indata)
 
 #define REGI2C_READ_MASK(block, reg_add) \
-      rom_i2c_readReg_Mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB)
+      regi2c_ctrl_read_reg_mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB)
 
 #define REGI2C_WRITE(block, reg_add, indata) \
-      rom_i2c_writeReg(block, block##_HOSTID,  reg_add, indata)
+      regi2c_ctrl_write_reg(block, block##_HOSTID,  reg_add, indata)
 
 #define REGI2C_READ(block, reg_add) \
-      rom_i2c_readReg(block, block##_HOSTID,  reg_add)
+      regi2c_ctrl_read_reg(block, block##_HOSTID,  reg_add)
 
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_panel_io.h b/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_panel_io.h
new file mode 100644
index 00000000..c362180f
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_panel_io.h
@@ -0,0 +1,201 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_lcd_types.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef void *esp_lcd_spi_bus_handle_t;                       /*!< Type of LCD SPI bus handle */
+typedef void *esp_lcd_i2c_bus_handle_t;                       /*!< Type of LCD I2C bus handle */
+typedef struct esp_lcd_i80_bus_t *esp_lcd_i80_bus_handle_t;   /*!< Type of LCD intel 8080 bus handle */
+
+/**
+ * @brief Transmit LCD command and corresponding parameters
+ *
+ * @note Commands sent by this function are short, so they are sent using polling transactions.
+ *       The function does not return before the command tranfer is completed.
+ *       If any queued transactions sent by `esp_lcd_panel_io_tx_color()` are still pending when this function is called,
+ *       this function will wait until they are finished and the queue is empty before sending the command(s).
+ *
+ * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()`
+ * @param[in] lcd_cmd The specific LCD command
+ * @param[in] lcd_cmd_bits Length of LCD command, in bits (e.g. 8 bits or 16 bits)
+ * @param[in] param Buffer that holds the command specific parameters, set to NULL if no parameter is needed for the command
+ * @param[in] param_size Size of `param` in memory, in bytes, set to zero if no parameter is needed for the command
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_panel_io_tx_param(esp_lcd_panel_io_handle_t io, int lcd_cmd, int lcd_cmd_bits, const void *param, size_t param_size);
+
+/**
+ * @brief Transmit LCD RGB data
+ *
+ * @note This function will package the command and RGB data into a transaction, and push into a queue.
+ *       The real transmission is performed in the background (DMA+interrupt).
+ *       The caller should take care of the lifecycle of the `color` buffer.
+ *       Recycling of color buffer should be done in the callback `on_color_trans_done()`.
+ *
+ * @param[in] io LCD panel IO handle, which is created by factory API like `esp_lcd_new_panel_io_spi()`
+ * @param[in] lcd_cmd The specific LCD command
+ * @param[in] lcd_cmd_bits Length of LCD command, in bits (e.g. 8 bits or 16 bits)
+ * @param[in] color Buffer that holds the RGB color data
+ * @param[in] color_size Size of `color` in memory, in bytes
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_panel_io_tx_color(esp_lcd_panel_io_handle_t io, int lcd_cmd, int lcd_cmd_bits, const void *color, size_t color_size);
+
+/**
+ * @brief Destory LCD panel IO handle (deinitialize panel and free all corresponding resource)
+ *
+ * @param[in] io LCD panel IO handle, which is created by factory API like `esp_lcd_new_panel_io_spi()`
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_panel_io_del(esp_lcd_panel_io_handle_t io);
+
+/**
+ * @brief Panel IO configuration structure, for SPI interface
+ */
+typedef struct {
+    int cs_gpio_num; /*!< GPIO used for CS line */
+    int dc_gpio_num; /*!< GPIO used to select the D/C line, set this to -1 if the D/C line not controlled by manually pulling high/low GPIO */
+    int spi_mode;    /*!< Traditional SPI mode (0~3) */
+    unsigned int pclk_hz;    /*!< Frequency of pixel clock */
+    size_t trans_queue_depth; /*!< Size of internal transaction queue */
+    bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); /*!< Callback, invoked when color data transfer has finished */
+    void *user_data; /*!< User private data, passed directly to on_trans_frame_done's user_data */
+    struct {
+        unsigned int dc_as_cmd_phase: 1; /*!< D/C line value is encoded into SPI transaction command phase */
+        unsigned int dc_low_on_data: 1;  /*!< If this flag is enabled, DC line = 0 means transfer data, DC line = 1 means transfer command; vice versa */
+    } flags;
+} esp_lcd_panel_io_spi_config_t;
+
+/**
+ * @brief Create LCD panel IO handle, for SPI interface
+ *
+ * @param[in] bus SPI bus handle
+ * @param[in] io_config IO configuration, for SPI interface
+ * @param[out] ret_io Returned IO handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_io_spi(esp_lcd_spi_bus_handle_t bus, const esp_lcd_panel_io_spi_config_t *io_config, esp_lcd_panel_io_handle_t *ret_io);
+
+typedef struct {
+    uint32_t dev_addr; /*!< I2C device address */
+    bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); /*!< Callback, invoked when color data transfer has finished */
+    void *user_data; /*!< User private data, passed directly to on_trans_frame_done's user_data */
+    size_t control_phase_bytes; /*!< I2C LCD panel will encode control information (e.g. D/C seclection) into control phase, in several bytes */
+    unsigned int dc_bit_offset; /*!< Offset of the D/C selection bit in control phase */
+    struct {
+        unsigned int dc_low_on_data: 1;  /*!< If this flag is enabled, DC line = 0 means transfer data, DC line = 1 means transfer command; vice versa */
+    } flags;
+} esp_lcd_panel_io_i2c_config_t;
+
+/**
+ * @brief Create LCD panel IO handle, for I2C interface
+ *
+ * @param[in] bus I2C bus handle
+ * @param[in] io_config IO configuration, for I2C interface
+ * @param[out] ret_io Returned IO handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_io_i2c(esp_lcd_i2c_bus_handle_t bus, const esp_lcd_panel_io_i2c_config_t *io_config, esp_lcd_panel_io_handle_t *ret_io);
+
+#if SOC_LCD_I80_SUPPORTED
+/**
+ * @brief LCD Intel 8080 bus configuration structure
+ */
+typedef struct {
+    int dc_gpio_num; /*!< GPIO used for D/C line */
+    int wr_gpio_num; /*!< GPIO used for WR line */
+    int data_gpio_nums[SOC_LCD_I80_BUS_WIDTH]; /*!< GPIOs used for data lines */
+    size_t data_width;         /*!< Number of data lines, 8 or 16 */
+    size_t max_transfer_bytes; /*!< Maximum transfer size, this determines the length of internal DMA link */
+} esp_lcd_i80_bus_config_t;
+
+/**
+ * @brief Create Intel 8080 bus handle
+ *
+ * @param[in] bus_config Bus configuration
+ * @param[out] ret_bus Returned bus handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_ERR_NOT_FOUND     if no free bus is available
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lcd_i80_bus_handle_t *ret_bus);
+
+/**
+ * @brief Destory Intel 8080 bus handle
+ *
+ * @param[in] bus Intel 8080 bus handle, created by `esp_lcd_new_i80_bus()`
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_INVALID_STATE if there still be some device attached to the bus
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_del_i80_bus(esp_lcd_i80_bus_handle_t bus);
+
+/**
+ * @brief Panel IO configuration structure, for intel 8080 interface
+ */
+typedef struct {
+    int cs_gpio_num;         /*!< GPIO used for CS line */
+    unsigned int pclk_hz;    /*!< Frequency of pixel clock */
+    size_t trans_queue_depth; /*!< Transaction queue size, larger queue, higher throughput */
+    bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); /*!< Callback, invoked when color data was tranferred done */
+    void *user_data; /*!< User private data, passed directly to on_trans_done's user_data */
+    struct {
+        unsigned int dc_idle_level: 1;  /*!< Level of DC line in IDLE phase */
+        unsigned int dc_cmd_level: 1;   /*!< Level of DC line in CMD phase */
+        unsigned int dc_dummy_level: 1; /*!< Level of DC line in DUMMY phase */
+        unsigned int dc_data_level: 1;  /*!< Level of DC line in DATA phase */
+    } dc_levels; /*!< Each i80 device might have its own D/C control logic */
+    struct {
+        unsigned int invert_cs: 1;          /*!< Whether to invert the CS line */
+        unsigned int reverse_color_bits: 1; /*!< Reverse the data bits, D[N:0] -> D[0:N] */
+        unsigned int swap_color_bytes: 1;   /*!< Swap adjacent two color bytes */
+        unsigned int pclk_active_neg: 1;    /*!< The display will write data lines when there's a falling edge on WR signal (a.k.a the PCLK) */
+        unsigned int pclk_idle_low: 1;      /*!< The WR signal (a.k.a the PCLK) stays at low level in IDLE phase */
+    } flags;
+} esp_lcd_panel_io_i80_config_t;
+
+/**
+ * @brief Create LCD panel IO, for Intel 8080 interface
+ *
+ * @param[in] bus Intel 8080 bus handle, created by `esp_lcd_new_i80_bus()`
+ * @param[in] io_config IO configuration, for i80 interface
+ * @param[out] ret_io Returned panel IO handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NOT_SUPPORTED if some configuration can't be satisfied, e.g. pixel clock out of the range
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_io_i80(esp_lcd_i80_bus_handle_t bus, const esp_lcd_panel_io_i80_config_t *io_config, esp_lcd_panel_io_handle_t *ret_io);
+
+#endif // SOC_LCD_I80_SUPPORTED
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_panel_ops.h b/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_panel_ops.h
new file mode 100644
index 00000000..5099233c
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_panel_ops.h
@@ -0,0 +1,126 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_lcd_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Reset LCD panel
+ *
+ * @note Panel reset must be called before attempting to initialize the panel using `esp_lcd_panel_init()`.
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_reset(esp_lcd_panel_handle_t panel);
+
+/**
+ * @brief Initialize LCD panel
+ *
+ * @note Before calling this function, make sure the LCD panel has finished the `reset` stage by `esp_lcd_panel_reset()`.
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_init(esp_lcd_panel_handle_t panel);
+
+/**
+ * @brief Deinitialize the LCD panel
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_del(esp_lcd_panel_handle_t panel);
+
+/**
+ * @brief Draw bitmap on LCD panel
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] x_start Start index on x-axis (x_start included)
+ * @param[in] y_start Start index on y-axis (y_start included)
+ * @param[in] x_end End index on x-axis (x_end not included)
+ * @param[in] y_end End index on y-axis (y_end not included)
+ * @param[in] color_data RGB color data that will be dumped to the specific window range
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_draw_bitmap(esp_lcd_panel_handle_t panel, int x_start, int y_start, int x_end, int y_end, const void *color_data);
+
+/**
+ * @brief Mirror the LCD panel on specific axis
+ *
+ * @note Combined with `esp_lcd_panel_swap_xy()`, one can realize screen rotation
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] mirror_x Whether the panel will be mirrored about the x axis
+ * @param[in] mirror_y Whether the panel will be mirrored about the y axis
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+ */
+esp_err_t esp_lcd_panel_mirror(esp_lcd_panel_handle_t panel, bool mirror_x, bool mirror_y);
+
+/**
+ * @brief Swap/Exchange x and y axis
+ *
+ * @note Combined with `esp_lcd_panel_mirror()`, one can realize screen rotation
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] swap_axes Whether to swap the x and y axis
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+ */
+esp_err_t esp_lcd_panel_swap_xy(esp_lcd_panel_handle_t panel, bool swap_axes);
+
+/**
+ * @brief Set extra gap in x and y axis
+ *
+ * The gap is the space (in pixels) between the left/top sides of the LCD panel and the first row/column respectively of the actual contents displayed.
+ *
+ * @note Setting a gap is useful when positioning or centering a frame that is smaller than the LCD.
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] x_gap Extra gap on x axis, in pixels
+ * @param[in] y_gap Extra gap on y axis, in pixels
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_set_gap(esp_lcd_panel_handle_t panel, int x_gap, int y_gap);
+
+/**
+ * @brief Invert the color (bit-wise invert the color data line)
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] invert_color_data Whether to invert the color data
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_invert_color(esp_lcd_panel_handle_t panel, bool invert_color_data);
+
+/**
+ * @brief Turn off the display
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] off Whether to turn off the screen
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+ */
+esp_err_t esp_lcd_panel_disp_off(esp_lcd_panel_handle_t panel, bool off);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_panel_rgb.h b/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_panel_rgb.h
new file mode 100644
index 00000000..0847e84b
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_panel_rgb.h
@@ -0,0 +1,77 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_lcd_types.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if SOC_LCD_RGB_SUPPORTED
+/**
+ * @brief LCD RGB timing structure
+ */
+typedef struct {
+    unsigned int pclk_hz;           /*!< Frequency of pixel clock */
+    unsigned int h_res;             /*!< Horizontal resolution, i.e. the number of pixels in a line */
+    unsigned int v_res;             /*!< Vertical resolution, i.e. the number of lines in the frame  */
+    unsigned int hsync_pulse_width; /*!< Horizontal sync width, unit: PCLK period */
+    unsigned int hsync_back_porch;  /*!< Horizontal back porch, number of PCLK between hsync and start of line active data */
+    unsigned int hsync_front_porch; /*!< Horizontal front porch, number of PCLK between the end of active data and the next hsync */
+    unsigned int vsync_pulse_width; /*!< Vertical sync width, unit: number of lines */
+    unsigned int vsync_back_porch;  /*!< Vertical back porch, number of invalid lines between vsync and start of frame */
+    unsigned int vsync_front_porch; /*!< Vertical front porch, number of invalid lines between then end of frame and the next vsync */
+    struct {
+        unsigned int hsync_idle_low: 1;  /*!< The hsync signal is low in IDLE state */
+        unsigned int vsync_idle_low: 1;  /*!< The vsync signal is low in IDLE state */
+        unsigned int de_idle_high: 1;    /*!< The de signal is high in IDLE state */
+        unsigned int pclk_active_neg: 1; /*!< The display will write data lines when there's a falling edge on PCLK */
+        unsigned int pclk_idle_low: 1;   /*!< The PCLK stays at low level in IDLE phase */
+    } flags;
+} esp_lcd_rgb_timing_t;
+
+/**
+ * @brief LCD RGB panel configuration structure
+ */
+typedef struct {
+    esp_lcd_rgb_timing_t timings; /*!< RGB timing parameters */
+    size_t data_width;            /*!< Number of data lines */
+    int hsync_gpio_num;           /*!< GPIO used for HSYNC signal */
+    int vsync_gpio_num;           /*!< GPIO used for VSYNC signal */
+    int de_gpio_num;              /*!< GPIO used for DE signal, set to -1 if it's not used */
+    int pclk_gpio_num;            /*!< GPIO used for PCLK signal */
+    int data_gpio_nums[SOC_LCD_RGB_DATA_WIDTH]; /*!< GPIOs used for data lines */
+    int disp_gpio_num; /*!< GPIO used for display control signal, set to -1 if it's not used */
+    bool (*on_frame_trans_done)(esp_lcd_panel_handle_t panel, void *user_data); /*!< Callback, invoked when one frame buffer has transferred done */
+    void *user_data; /*!< User data which would be passed to on_frame_trans_done's user_data */
+    struct {
+        unsigned int disp_active_low: 1; /*!< If this flag is enabled, a low level of display control signal can turn the screen on; vice versa */
+        unsigned int relax_on_idle: 1;   /*!< If this flag is enabled, the host won't refresh the LCD if nothing changed in host's frame buffer (this is usefull for LCD with built-in GRAM) */
+    } flags;
+} esp_lcd_rgb_panel_config_t;
+
+/**
+ * @brief Create RGB LCD panel
+ *
+ * @param rgb_panel_config RGB panel configuration
+ * @param ret_panel Returned LCD panel handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_ERR_NOT_FOUND     if no free RGB panel is available
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_rgb_panel(const esp_lcd_rgb_panel_config_t *rgb_panel_config, esp_lcd_panel_handle_t *ret_panel);
+
+#endif // SOC_LCD_RGB_SUPPORTED
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_panel_vendor.h b/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_panel_vendor.h
new file mode 100644
index 00000000..ac98cc39
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_panel_vendor.h
@@ -0,0 +1,57 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_lcd_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Configuration structure for panel device
+ */
+typedef struct {
+    int reset_gpio_num; /*!< GPIO used to reset the LCD panel, set to -1 if it's not used */
+    esp_lcd_color_space_t color_space; /*!< Set the color space used by the LCD panel */
+    unsigned int bits_per_pixel;       /*!< Color depth, in bpp */
+    struct {
+        unsigned int reset_active_high: 1; /*!< Setting this if the panel reset is high level active */
+    } flags;
+    void *vendor_config; /* vendor specific configuration, optional, left as NULL if not used */
+} esp_lcd_panel_dev_config_t;
+
+/**
+ * @brief Create LCD panel for model ST7789
+ *
+ * @param[in] io LCD panel IO handle
+ * @param[in] panel_dev_config general panel device configuration
+ * @param[out] ret_panel Returned LCD panel handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_st7789(const esp_lcd_panel_io_handle_t io, const esp_lcd_panel_dev_config_t *panel_dev_config, esp_lcd_panel_handle_t *ret_panel);
+
+/**
+ * @brief Create LCD panel for model SSD1306
+ *
+ * @param[in] io LCD panel IO handle
+ * @param[in] panel_dev_config general panel device configuration
+ * @param[out] ret_panel Returned LCD panel handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_ssd1306(const esp_lcd_panel_io_handle_t io, const esp_lcd_panel_dev_config_t *panel_dev_config, esp_lcd_panel_handle_t *ret_panel);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_types.h b/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_types.h
new file mode 100644
index 00000000..7d495324
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_lcd/include/esp_lcd_types.h
@@ -0,0 +1,26 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct esp_lcd_panel_io_t *esp_lcd_panel_io_handle_t; /*!< Type of LCD panel IO handle */
+typedef struct esp_lcd_panel_t *esp_lcd_panel_handle_t;       /*!< Type of LCD panel handle */
+
+/**
+ * @brief LCD color space type definition
+ */
+typedef enum {
+    ESP_LCD_COLOR_SPACE_RGB,        /*!< Color space: RGB */
+    ESP_LCD_COLOR_SPACE_BGR,        /*!< Color space: BGR */
+    ESP_LCD_COLOR_SPACE_MONOCHROME, /*!< Color space: monochrome */
+} esp_lcd_color_space_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_lcd/interface/esp_lcd_panel_interface.h b/tools/sdk/esp32/include/esp_lcd/interface/esp_lcd_panel_interface.h
new file mode 100644
index 00000000..0705b145
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_lcd/interface/esp_lcd_panel_interface.h
@@ -0,0 +1,126 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct esp_lcd_panel_t esp_lcd_panel_t;  /*!< Type of LCD panel */
+
+/**
+ * @brief LCD panel interface
+ */
+struct esp_lcd_panel_t {
+    /**
+     * @brief Reset LCD panel
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*reset)(esp_lcd_panel_t *panel);
+
+    /**
+     * @brief Initialize LCD panel
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*init)(esp_lcd_panel_t *panel);
+
+    /**
+     * @brief Destory LCD panel
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*del)(esp_lcd_panel_t *panel);
+
+    /**
+     * @brief Draw bitmap on LCD panel
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] x_start Start index on x-axis (x_start included)
+     * @param[in] y_start Start index on y-axis (y_start included)
+     * @param[in] x_end End index on x-axis (x_end not included)
+     * @param[in] y_end End index on y-axis (y_end not included)
+     * @param[in] color_data RGB color data that will be dumped to the specific window range
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*draw_bitmap)(esp_lcd_panel_t *panel, int x_start, int y_start, int x_end, int y_end, const void *color_data);
+
+    /**
+     * @brief Mirror the LCD panel on specific axis
+     *
+     * @note Combine this function with `swap_xy`, one can realize screen rotatation
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] x_axis Whether the panel will be mirrored about the x_axis
+     * @param[in] y_axis Whether the panel will be mirrored about the y_axis
+     * @return
+     *          - ESP_OK on success
+     *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+     */
+    esp_err_t (*mirror)(esp_lcd_panel_t *panel, bool x_axis, bool y_axis);
+
+    /**
+     * @brief Swap/Exchange x and y axis
+     *
+     * @note Combine this function with `mirror`, one can realize screen rotatation
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] swap_axes Whether to swap the x and y axis
+     * @return
+     *          - ESP_OK on success
+     *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+     */
+    esp_err_t (*swap_xy)(esp_lcd_panel_t *panel, bool swap_axes);
+
+    /**
+     * @brief Set extra gap in x and y axis
+     *
+     * @note The gap is only used for calculating the real coordinates.
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] x_gap Extra gap on x axis, in pixels
+     * @param[in] y_gap Extra gap on y axis, in pixels
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*set_gap)(esp_lcd_panel_t *panel, int x_gap, int y_gap);
+
+    /**
+     * @brief Invert the color (bit 1 -> 0 for color data line, and vice versa)
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] invert_color_data Whether to invert the color data
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*invert_color)(esp_lcd_panel_t *panel, bool invert_color_data);
+
+    /**
+     * @brief Turn off the display
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] off Whether to turn off the screen
+     * @return
+     *          - ESP_OK on success
+     *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+     */
+    esp_err_t (*disp_off)(esp_lcd_panel_t *panel, bool off);
+};
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_lcd/interface/esp_lcd_panel_io_interface.h b/tools/sdk/esp32/include/esp_lcd/interface/esp_lcd_panel_io_interface.h
new file mode 100644
index 00000000..b6b85564
--- /dev/null
+++ b/tools/sdk/esp32/include/esp_lcd/interface/esp_lcd_panel_io_interface.h
@@ -0,0 +1,66 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct esp_lcd_panel_io_t esp_lcd_panel_io_t; /*!< Type of LCD panel IO */
+
+/**
+ * @brief LCD panel IO interface
+ */
+struct esp_lcd_panel_io_t {
+    /**
+     * @brief Transmit LCD command and corresponding parameters
+     *
+     * @note This is the panel-specific interface called by function `esp_lcd_panel_io_tx_param()`.
+     *
+     * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()`
+     * @param[in] lcd_cmd The specific LCD command
+     * @param[in] lcd_cmd_bits Length of LCD command, in bits (e.g. 8 bits or 16 bits)
+     * @param[in] param Buffer that holds the command specific parameters, set to NULL if no parameter is needed for the command
+     * @param[in] param_size Size of `param` in memory, in bytes, set to zero if no parameter is needed for the command
+     * @return
+     *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+     *          - ESP_OK                on success
+     */
+    esp_err_t (*tx_param)(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *param, size_t param_size);
+
+    /**
+     * @brief Transmit LCD RGB data
+     *
+     * @note This is the panel-specific interface called by function `esp_lcd_panel_io_tx_color()`.
+     *
+     * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()`
+     * @param[in] lcd_cmd The specific LCD command
+     * @param[in] lcd_cmd_bits Length of LCD command, in bits (e.g. 8 bits or 16 bits)
+     * @param[in] color Buffer that holds the RGB color data
+     * @param[in] color_size Size of `color` in memory, in bytes
+     * @return
+     *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+     *          - ESP_OK                on success
+     */
+    esp_err_t (*tx_color)(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *color, size_t color_size);
+
+    /**
+     * @brief Destory LCD panel IO handle (deinitialize all and free resource)
+     *
+     * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()`
+     * @return
+     *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+     *          - ESP_OK                on success
+     */
+    esp_err_t (*del)(esp_lcd_panel_io_t *io);
+};
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/esp_netif/include/esp_netif_defaults.h b/tools/sdk/esp32/include/esp_netif/include/esp_netif_defaults.h
index 7ef65260..903a678e 100644
--- a/tools/sdk/esp32/include/esp_netif/include/esp_netif_defaults.h
+++ b/tools/sdk/esp32/include/esp_netif/include/esp_netif_defaults.h
@@ -55,7 +55,7 @@ extern "C" {
         ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(mac) \
         ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(ip_info) \
         .get_ip_event = IP_EVENT_ETH_GOT_IP, \
-        .lost_ip_event = 0, \
+        .lost_ip_event = IP_EVENT_ETH_LOST_IP, \
         .if_key = "ETH_DEF", \
         .if_desc = "eth", \
         .route_prio = 50 \
diff --git a/tools/sdk/esp32/include/esp_netif/include/esp_netif_types.h b/tools/sdk/esp32/include/esp_netif/include/esp_netif_types.h
index 044ca0d1..7c68c717 100644
--- a/tools/sdk/esp32/include/esp_netif/include/esp_netif_types.h
+++ b/tools/sdk/esp32/include/esp_netif/include/esp_netif_types.h
@@ -88,6 +88,7 @@ typedef enum {
     IP_EVENT_AP_STAIPASSIGNED,         /*!< soft-AP assign an IP to a connected station */
     IP_EVENT_GOT_IP6,                  /*!< station or ap or ethernet interface v6IP addr is preferred */
     IP_EVENT_ETH_GOT_IP,               /*!< ethernet got IP from connected AP */
+    IP_EVENT_ETH_LOST_IP,              /*!< ethernet lost IP and the IP is reset to 0 */
     IP_EVENT_PPP_GOT_IP,               /*!< PPP interface got IP */
     IP_EVENT_PPP_LOST_IP,              /*!< PPP interface lost IP */
 } ip_event_t;
diff --git a/tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/ets_sys.h b/tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/ets_sys.h
index b3780248..b2567e92 100644
--- a/tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/ets_sys.h
+++ b/tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/ets_sys.h
@@ -191,7 +191,7 @@ int ets_printf(const char *fmt, ...);
   * @brief  Set the uart channel of ets_printf(uart_tx_one_char).
   *         ROM will set it base on the efuse and gpio setting, however, this can be changed after booting.
   *
-  * @param  uart_no : 0 for UART0, 1 for UART1, 2 for UART2.
+  * @param  uart_no : 0 for UART0, 1 for UART1.
   *
   * @return None
   */
diff --git a/tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/uart.h b/tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/uart.h
index adbae64d..4e7e5b8e 100644
--- a/tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/uart.h
+++ b/tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/uart.h
@@ -260,7 +260,7 @@ void uart_tx_flush(uint8_t uart_no);
 /**
   * @brief Wait until uart tx full empty and the last char send ok.
   *
-  * @param  uart_no : 0 for UART0, 1 for UART1, 2 for UART2
+  * @param  uart_no : 0 for UART0, 1 for UART1
   *
   * The function defined in ROM code has a bug, so we define the correct version
   * here for compatibility.
diff --git a/tools/sdk/esp32/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_spi.h b/tools/sdk/esp32/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_spi.h
index b7889100..a6c3c40c 100644
--- a/tools/sdk/esp32/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_spi.h
+++ b/tools/sdk/esp32/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_spi.h
@@ -28,7 +28,7 @@ extern "C"
 ////////////////////////////////////////////////////////////////////////////////
 
 /**
- * @brief Read the shared buffer from the slave.
+ * @brief Read the shared buffer from the slave in ISR way
  *
  * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
  *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
@@ -46,7 +46,25 @@ extern "C"
 esp_err_t essl_spi_rdbuf(spi_device_handle_t spi, uint8_t *out_data, int addr, int len, uint32_t flags);
 
 /**
- * @brief Write the shared buffer of the slave.
+ * @brief Read the shared buffer from the slave in polling way
+ *
+ * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
+ *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
+ *       overwritten, even the ``len`` is shorter than a word.
+ *
+ * @param spi       SPI device handle representing the slave
+ * @param out_data  Buffer for read data, strongly suggested to be in the DRAM and align to 4
+ * @param addr      Address of the slave shared buffer
+ * @param len       Length to read
+ * @param flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: on success
+ *      - or other return value from :cpp:func:`spi_device_transmit`.
+ */
+esp_err_t essl_spi_rdbuf_polling(spi_device_handle_t spi, uint8_t *out_data, int addr, int len, uint32_t flags);
+
+/**
+ * @brief Write the shared buffer of the slave in ISR way
  *
  * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
  *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
@@ -63,6 +81,24 @@ esp_err_t essl_spi_rdbuf(spi_device_handle_t spi, uint8_t *out_data, int addr, i
  */
 esp_err_t essl_spi_wrbuf(spi_device_handle_t spi, const uint8_t *data, int addr, int len, uint32_t flags);
 
+/**
+ * @brief Write the shared buffer of the slave in polling way
+ *
+ * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
+ *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
+ *       overwritten, even the ``len`` is shorter than a word.
+ *
+ * @param spi       SPI device handle representing the slave
+ * @param data      Buffer for data to send, strongly suggested to be in the DRAM and align to 4
+ * @param addr      Address of the slave shared buffer,
+ * @param len       Length to write
+ * @param flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: success
+ *      - or other return value from :cpp:func:`spi_device_polling_transmit`.
+ */
+esp_err_t essl_spi_wrbuf_polling(spi_device_handle_t spi, const uint8_t *data, int addr, int len, uint32_t flags);
+
 /**
  * @brief Receive long buffer in segments from the slave through its DMA.
  *
diff --git a/tools/sdk/esp32/include/esp_wifi/include/esp_mesh.h b/tools/sdk/esp32/include/esp_wifi/include/esp_mesh.h
index 242e3ad8..ab8f8a4c 100644
--- a/tools/sdk/esp32/include/esp_wifi/include/esp_mesh.h
+++ b/tools/sdk/esp32/include/esp_wifi/include/esp_mesh.h
@@ -655,7 +655,7 @@ esp_err_t esp_mesh_stop(void);
  *               - If the packet is to the root ("to" parameter isn't NULL) or to external IP network, MESH_DATA_TODS should be set.
  *               - If the packet is from the root to an internal device, MESH_DATA_FROMDS should be set.
  *             - Specify whether this API is block or non-block, block by default
- *               - If needs non-block, MESH_DATA_NONBLOCK should be set.
+ *               - If needs non-blocking, MESH_DATA_NONBLOCK should be set. Otherwise, may use esp_mesh_send_block_time() to specify a blocking time.
  *             - In the situation of the root change, MESH_DATA_DROP identifies this packet can be dropped by the new root
  *               for upstream data to external IP network, we try our best to avoid data loss caused by the root change, but
  *               there is a risk that the new root is running out of memory because most of memory is occupied by the pending data which
@@ -688,6 +688,17 @@ esp_err_t esp_mesh_stop(void);
  */
 esp_err_t esp_mesh_send(const mesh_addr_t *to, const mesh_data_t *data,
                         int flag, const mesh_opt_t opt[],  int opt_count);
+/**
+ * @brief      Set blocking time of esp_mesh_send()
+ *
+ * @attention  This API shall be called before mesh is started.
+ *
+ * @param[in]  time_ms  blocking time of esp_mesh_send(), unit:ms
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_send_block_time(uint32_t time_ms);
 
 /**
  * @brief      Receive a packet targeted to self over the mesh network
@@ -1665,7 +1676,6 @@ int esp_mesh_get_running_active_duty_cycle(void);
  *    - ESP_OK
  */
 esp_err_t esp_mesh_ps_duty_signaling(int fwd_times);
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/esp_wifi/include/esp_private/wifi.h b/tools/sdk/esp32/include/esp_wifi/include/esp_private/wifi.h
index 3c5a93a1..428cc7d9 100644
--- a/tools/sdk/esp32/include/esp_wifi/include/esp_private/wifi.h
+++ b/tools/sdk/esp32/include/esp_wifi/include/esp_private/wifi.h
@@ -72,17 +72,6 @@ typedef enum {
     WIFI_LOG_MODULE_MESH, /*logs related to Mesh*/
 } wifi_log_module_t;
 
-/**
-  * @brief FTM Report log levels configuration
-  *
-  */
-typedef struct {
-    uint8_t show_rtt:1;     /**< Display all valid Round-Trip-Time readings for FTM frames */
-    uint8_t show_diag:1;    /**< Display dialogue tokens for all FTM frames with valid readings */
-    uint8_t show_t1t2t3t4:1;/**< Display all valid T1, T2, T3, T4 readings considered while calculating RTT */
-    uint8_t show_rxrssi:1;  /**< Display RSSI for each FTM frame with valid readings */
-} ftm_report_log_level_t;
-
 /**
   * @brief WiFi log submodule definition
   *
@@ -598,17 +587,6 @@ void esp_wifi_set_sleep_delay_time(uint32_t return_to_sleep_delay);
  */
 void esp_wifi_set_keep_alive_time(uint32_t keep_alive_time);
 
-/**
- * @brief Set FTM Report log level
- *
- * @param   log_lvl Log levels configuration
- *
- * @return
- *    - ESP_OK: succeed
- *    - ESP_ERR_NOT_SUPPORTED: No FTM support
- */
-esp_err_t esp_wifi_set_ftm_report_log_level(ftm_report_log_level_t *log_lvl);
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32/include/esp_wifi/include/esp_wifi_default.h b/tools/sdk/esp32/include/esp_wifi/include/esp_wifi_default.h
index 4ce7f8b2..958977bf 100644
--- a/tools/sdk/esp32/include/esp_wifi/include/esp_wifi_default.h
+++ b/tools/sdk/esp32/include/esp_wifi/include/esp_wifi_default.h
@@ -70,6 +70,9 @@ esp_err_t esp_wifi_clear_default_wifi_driver_and_handlers(void *esp_netif);
 /**
  * @brief Creates default WIFI AP. In case of any init error this API aborts.
  *
+ * @note The API creates esp_netif object with default WiFi access point config,
+ * attaches the netif to wifi and registers default wifi handlers.
+ *
  * @return pointer to esp-netif instance
  */
 esp_netif_t* esp_netif_create_default_wifi_ap(void);
@@ -77,10 +80,23 @@ esp_netif_t* esp_netif_create_default_wifi_ap(void);
 /**
  * @brief Creates default WIFI STA. In case of any init error this API aborts.
  *
+ * @note The API creates esp_netif object with default WiFi station config,
+ * attaches the netif to wifi and registers default wifi handlers.
+ *
  * @return pointer to esp-netif instance
  */
 esp_netif_t* esp_netif_create_default_wifi_sta(void);
 
+/**
+ * @brief Destroys default WIFI netif created with esp_netif_create_default_wifi_...() API.
+ *
+ * @param[in] esp_netif object to detach from WiFi and destroy
+ *
+ * @note This API unregisters wifi handlers and detaches the created object from the wifi.
+ * (this function is a no-operation if esp_netif is NULL)
+ */
+void esp_netif_destroy_default_wifi(void *esp_netif);
+
 /**
  * @brief Creates esp_netif WiFi object based on the custom configuration.
  *
diff --git a/tools/sdk/esp32/include/esp_wifi/include/esp_wifi_types.h b/tools/sdk/esp32/include/esp_wifi/include/esp_wifi_types.h
index f159857c..03b8ae6a 100644
--- a/tools/sdk/esp32/include/esp_wifi/include/esp_wifi_types.h
+++ b/tools/sdk/esp32/include/esp_wifi/include/esp_wifi_types.h
@@ -233,6 +233,7 @@ typedef struct {
     uint8_t max_connection;     /**< Max number of stations allowed to connect in, default 4, max 10 */
     uint16_t beacon_interval;   /**< Beacon interval which should be multiples of 100. Unit: TU(time unit, 1 TU = 1024 us). Range: 100 ~ 60000. Default value: 100 */
     wifi_cipher_type_t pairwise_cipher;   /**< pairwise cipher of SoftAP, group cipher will be derived using this. cipher values are valid starting from WIFI_CIPHER_TYPE_TKIP, enum values before that will be considered as invalid and default cipher suites(TKIP+CCMP) will be used. Valid cipher suites in softAP mode are WIFI_CIPHER_TYPE_TKIP, WIFI_CIPHER_TYPE_CCMP and WIFI_CIPHER_TYPE_TKIP_CCMP. */
+    bool ftm_responder;         /**< Enable FTM Responder mode */
 } wifi_ap_config_t;
 
 /** @brief STA configuration settings for the ESP32 */
diff --git a/tools/sdk/esp32/include/espcoredump/include/esp_core_dump.h b/tools/sdk/esp32/include/espcoredump/include/esp_core_dump.h
index f8b029d5..7d41b97e 100644
--- a/tools/sdk/esp32/include/espcoredump/include/esp_core_dump.h
+++ b/tools/sdk/esp32/include/espcoredump/include/esp_core_dump.h
@@ -104,6 +104,19 @@ void esp_core_dump_to_uart(panic_info_t *info);
 /*********************************** USER MODE API ************************************/
 /**************************************************************************************/
 
+/**
+ * @brief  Check integrity of coredump data in flash.
+ *         This function reads the coredump data while calculating their checksum. If it
+ *         doesn't match the checksum written on flash, it means data are corrupted,
+ *         an error will be returned. Else, ESP_OK is returned.
+ *
+ * @return `ESP_OK` if core dump is present and valid, `ESP_ERR_NOT_FOUND` if no core dump
+ *         is stored in the partition, `ESP_ERR_INVALID_SIZE` or `ESP_ERR_INVALID_CRC`
+ *         if the core dump is corrupted, other errors when unable to access flash, in that
+ *         case please refer to \see esp_err_t
+ */
+esp_err_t esp_core_dump_image_check(void);
+
 /**
  * @brief  Retrieves address and size of coredump data in flash.
  *         This function is always available, even when core dump is disabled in menuconfig.
diff --git a/tools/sdk/esp32/include/hal/esp32/include/hal/cpu_ll.h b/tools/sdk/esp32/include/hal/esp32/include/hal/cpu_ll.h
index 7a83ddbc..49d2e394 100644
--- a/tools/sdk/esp32/include/hal/esp32/include/hal/cpu_ll.h
+++ b/tools/sdk/esp32/include/hal/esp32/include/hal/cpu_ll.h
@@ -170,7 +170,7 @@ static inline bool cpu_ll_is_debugger_attached(void)
 
 static inline void cpu_ll_break(void)
 {
-    __asm__ ("break 0,0");
+    __asm__ ("break 1,15");
 }
 
 static inline void cpu_ll_set_vecbase(const void* vecbase)
diff --git a/tools/sdk/esp32/include/hal/esp32/include/hal/interrupt_controller_ll.h b/tools/sdk/esp32/include/hal/esp32/include/hal/interrupt_controller_ll.h
index 6634b003..f31356b6 100644
--- a/tools/sdk/esp32/include/hal/esp32/include/hal/interrupt_controller_ll.h
+++ b/tools/sdk/esp32/include/hal/esp32/include/hal/interrupt_controller_ll.h
@@ -18,6 +18,8 @@
 #include "soc/soc_caps.h"
 #include "soc/soc.h"
 #include "xtensa/xtensa_api.h"
+#include "xt_instr_macros.h"
+#include "xtensa/config/specreg.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -43,6 +45,18 @@ static inline void intr_cntrl_ll_disable_interrupts(uint32_t mask)
     xt_ints_off(mask);
 }
 
+/**
+ * @brief Read the current interrupt mask of the CPU running this code.
+ *
+ * @return The current interrupt bitmask.
+ */
+static inline uint32_t intr_cntrl_ll_read_interrupt_mask(void)
+{
+    uint32_t int_mask;
+    RSR(INTENABLE, int_mask);
+    return int_mask;
+}
+
 /**
  * @brief checks if given interrupt number has a valid handler
  *
@@ -79,27 +93,6 @@ static inline void *intr_cntrl_ll_get_int_handler_arg(uint8_t intr)
     return xt_get_interrupt_handler_arg(intr);
 }
 
-/**
- * @brief Disables interrupts that are not located in iram
- *
- * @param newmask mask of interrupts needs to be disabled
- * @return oldmask where to store old interrupts state
- */
-static inline uint32_t intr_cntrl_ll_disable_int_mask(uint32_t newmask)
-{
-    return xt_int_disable_mask(newmask);
-}
-
-/**
- * @brief Enables interrupts that are not located in iram
- *
- * @param newmask mask of interrupts needs to be disabled
- */
-static inline void intr_cntrl_ll_enable_int_mask(uint32_t newmask)
-{
-    xt_int_enable_mask(newmask);
-}
-
 /**
  * @brief Acknowledge an edge-trigger interrupt by clearing its pending flag
  *
diff --git a/tools/sdk/esp32/include/hal/esp32/include/hal/mcpwm_ll.h b/tools/sdk/esp32/include/hal/esp32/include/hal/mcpwm_ll.h
index e1446fc6..e8f954d8 100644
--- a/tools/sdk/esp32/include/hal/esp32/include/hal/mcpwm_ll.h
+++ b/tools/sdk/esp32/include/hal/esp32/include/hal/mcpwm_ll.h
@@ -36,7 +36,7 @@ extern "C" {
 
 /// Get the address of peripheral registers
 #define MCPWM_LL_GET_HW(ID) (((ID)==0)? &MCPWM0: &MCPWM1)
-
+#define MCPWM_LL_MAX_PRESCALE   255
 
 /********************* Global *******************/
 /**
diff --git a/tools/sdk/esp32/include/hal/esp32/include/hal/mpu_ll.h b/tools/sdk/esp32/include/hal/esp32/include/hal/mpu_ll.h
index fc491e2b..2ec955b4 100644
--- a/tools/sdk/esp32/include/hal/esp32/include/hal/mpu_ll.h
+++ b/tools/sdk/esp32/include/hal/esp32/include/hal/mpu_ll.h
@@ -22,7 +22,7 @@
 extern "C" {
 #endif
 
-static inline uint32_t mpu_ll_id_to_addr(int id)
+static inline uint32_t mpu_ll_id_to_addr(unsigned id)
 {
     // vpn - id
     // 0x00000000 = 0
diff --git a/tools/sdk/esp32/include/hal/esp32/include/hal/spi_flash_encrypted_ll.h b/tools/sdk/esp32/include/hal/esp32/include/hal/spi_flash_encrypted_ll.h
new file mode 100644
index 00000000..e6e7a47d
--- /dev/null
+++ b/tools/sdk/esp32/include/hal/esp32/include/hal/spi_flash_encrypted_ll.h
@@ -0,0 +1,119 @@
+// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The ll is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The Lowlevel layer for SPI Flash Encryption.
+
+#include "soc/dport_reg.h"
+#include "soc/flash_encryption_reg.h"
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Enable encryption in flash
+ */
+static inline void spi_flash_encrypt_ll_enable(void)
+{
+    DPORT_REG_SET_BIT(DPORT_SLAVE_SPI_CONFIG_REG, DPORT_SLAVE_SPI_MASK_PRO | DPORT_SPI_ENCRYPT_ENABLE);
+}
+
+/**
+ * Disable encryption in flash
+ */
+static inline void spi_flash_encrypt_ll_disable(void)
+{
+    DPORT_REG_CLR_BIT(DPORT_SLAVE_SPI_CONFIG_REG, DPORT_SLAVE_SPI_MASK_PRO | DPORT_SPI_ENCRYPT_ENABLE);
+}
+
+/**
+ * Copy the flash address to physical address
+ *
+ * @param flash_addr The flash address.
+ *
+ * @note the address must be 8-byte aligned
+ */
+static inline void spi_flash_encrypt_ll_address_save(uint32_t flash_addr)
+{
+    REG_WRITE(FLASH_ENCRYPTION_ADDRESS_REG, flash_addr);
+}
+
+/**
+ * Wait for flash encryption operation completeness.
+ */
+static inline void spi_flash_encrypt_ll_calculate_wait_idle(void)
+{
+    while(!(REG_READ(FLASH_ENCRYPTION_DONE_REG) & BIT(0))) {
+    }
+}
+
+/**
+ * Start encryption on data buffer.
+ */
+static inline void spi_flash_encrypt_ll_calculate_start(void)
+{
+    REG_WRITE(FLASH_ENCRYPTION_START_REG, BIT(0));
+}
+
+/**
+ * Save the plaintext for encryption
+ *
+ * @param address address of the partition to be written.
+ * @param buffer Buffer to store the input data.
+ * @param size Buffer size.
+ */
+static inline void spi_flash_encrypt_ll_plaintext_save(uint32_t address, const uint32_t* buffer, uint32_t size)
+{
+    for (int i = 0; i < 8; i++) {
+        REG_WRITE(FLASH_ENCRYPTION_BUFFER_REG + (i << 2), buffer[i]);
+    }
+}
+
+/**
+ * Finish the flash encryption and make encrypted result accessible to SPI.
+ */
+static inline void spi_flash_encrypt_ll_done(void)
+{
+    // Do nothing on ESP32
+}
+
+/**
+ * Set to destroy encrypted result
+ */
+static inline void spi_flash_encrypt_ll_destroy(void)
+{
+    // Do nothing on ESP32
+}
+
+/**
+ * Check if is qualified to encrypt the buffer
+ *
+ * @param address the address of written flash partition.
+ * @param length Buffer size.
+ */
+static inline bool spi_flash_encrypt_ll_check(uint32_t address, uint32_t length)
+{
+    return ((address % 16) == 0) ? true : false;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/hal/esp32/include/hal/twai_ll.h b/tools/sdk/esp32/include/hal/esp32/include/hal/twai_ll.h
index 90c08678..b0d89687 100644
--- a/tools/sdk/esp32/include/hal/esp32/include/hal/twai_ll.h
+++ b/tools/sdk/esp32/include/hal/esp32/include/hal/twai_ll.h
@@ -395,7 +395,7 @@ static inline uint32_t twai_ll_get_and_clear_intrs(twai_dev_t *hw)
  */
 static inline void twai_ll_set_enabled_intrs(twai_dev_t *hw, uint32_t intr_mask)
 {
-#if TWAI_BRP_DIV_SUPPORTED
+#if SOC_TWAI_BRP_DIV_SUPPORTED
     //ESP32 Rev 2 or later has brp div field. Need to mask it out
     hw->interrupt_enable_reg.val = (hw->interrupt_enable_reg.val & 0x10) | intr_mask;
 #else
@@ -421,7 +421,7 @@ static inline void twai_ll_set_enabled_intrs(twai_dev_t *hw, uint32_t intr_mask)
  */
 static inline void twai_ll_set_bus_timing(twai_dev_t *hw, uint32_t brp, uint32_t sjw, uint32_t tseg1, uint32_t tseg2, bool triple_sampling)
 {
-#if TWAI_BRP_DIV_SUPPORTED
+#if SOC_TWAI_BRP_DIV_SUPPORTED
     if (brp > SOC_TWAI_BRP_DIV_THRESH) {
         //Need to set brp_div bit
         hw->interrupt_enable_reg.brp_div = 1;
diff --git a/tools/sdk/esp32/include/hal/include/hal/ds_hal.h b/tools/sdk/esp32/include/hal/include/hal/ds_hal.h
index fe7d7892..253fab9f 100644
--- a/tools/sdk/esp32/include/hal/include/hal/ds_hal.h
+++ b/tools/sdk/esp32/include/hal/include/hal/ds_hal.h
@@ -60,11 +60,6 @@ void ds_hal_start(void);
  */
 void ds_hal_finish(void);
 
-/**
- * @brief Check whether the key input (HMAC on ESP32-C3) is correct.
- */
-ds_key_check_t ds_hal_check_decryption_key(void);
-
 /**
  * @brief Write the initialization vector.
  */
diff --git a/tools/sdk/esp32/include/hal/include/hal/gpio_types.h b/tools/sdk/esp32/include/hal/include/hal/gpio_types.h
index 2438014a..8f795e6a 100644
--- a/tools/sdk/esp32/include/hal/include/hal/gpio_types.h
+++ b/tools/sdk/esp32/include/hal/include/hal/gpio_types.h
@@ -76,6 +76,9 @@ typedef enum {
 #define GPIO_SEL_44             ((uint64_t)(((uint64_t)1)<<44))  /*!< Pin 44 selected */
 #define GPIO_SEL_45             ((uint64_t)(((uint64_t)1)<<45))  /*!< Pin 45 selected */
 #define GPIO_SEL_46             ((uint64_t)(((uint64_t)1)<<46))  /*!< Pin 46 selected */
+#if CONFIG_IDF_TARGET_ESP32S3
+#define GPIO_SEL_47             ((uint64_t)(((uint64_t)1)<<47))  /*!< Pin 47 selected */
+#endif
 #endif
 
 #define GPIO_PIN_REG_0          IO_MUX_GPIO0_REG
@@ -125,6 +128,7 @@ typedef enum {
 #define GPIO_PIN_REG_44          IO_MUX_GPIO44_REG
 #define GPIO_PIN_REG_45          IO_MUX_GPIO45_REG
 #define GPIO_PIN_REG_46          IO_MUX_GPIO46_REG
+#define GPIO_PIN_REG_47          IO_MUX_GPIO47_REG
 
 #if CONFIG_IDF_TARGET_ESP32
 typedef enum {
diff --git a/tools/sdk/esp32/include/hal/include/hal/interrupt_controller_hal.h b/tools/sdk/esp32/include/hal/include/hal/interrupt_controller_hal.h
index a7c47e6a..39a5a8e6 100644
--- a/tools/sdk/esp32/include/hal/include/hal/interrupt_controller_hal.h
+++ b/tools/sdk/esp32/include/hal/include/hal/interrupt_controller_hal.h
@@ -135,6 +135,16 @@ static inline void interrupt_controller_hal_disable_interrupts(uint32_t mask)
     intr_cntrl_ll_disable_interrupts(mask);
 }
 
+/**
+ * @brief Read the current interrupt mask.
+ *
+ * @return The bitmask of current interrupts
+ */
+static inline uint32_t interrupt_controller_hal_read_interrupt_mask(void)
+{
+    return intr_cntrl_ll_read_interrupt_mask();
+}
+
 /**
  * @brief checks if given interrupt number has a valid handler
  *
@@ -171,27 +181,6 @@ static inline void * interrupt_controller_hal_get_int_handler_arg(uint8_t intr)
     return intr_cntrl_ll_get_int_handler_arg(intr);
 }
 
-/**
- * @brief Disables interrupts that are not located in iram
- *
- * @param newmask mask of interrupts needs to be disabled
- * @return oldmask where to store old interrupts state
- */
-static inline uint32_t interrupt_controller_hal_disable_int_mask(uint32_t newmask)
-{
-    return intr_cntrl_ll_disable_int_mask(newmask);
-}
-
-/**
- * @brief Enables interrupts that are not located in iram
- *
- * @param newmask mask of interrupts needs to be disabled
- */
-static inline void interrupt_controller_hal_enable_int_mask(uint32_t newmask)
-{
-    intr_cntrl_ll_enable_int_mask(newmask);
-}
-
 /**
  * @brief Acknowledge an edge-trigger interrupt by clearing its pending flag
  *
diff --git a/tools/sdk/esp32/include/hal/include/hal/ledc_types.h b/tools/sdk/esp32/include/hal/include/hal/ledc_types.h
index fa05ef41..0ddcf18c 100644
--- a/tools/sdk/esp32/include/hal/include/hal/ledc_types.h
+++ b/tools/sdk/esp32/include/hal/include/hal/ledc_types.h
@@ -134,6 +134,10 @@ typedef struct {
     ledc_timer_t timer_sel;         /*!< Select the timer source of channel (0 - 3) */
     uint32_t duty;                  /*!< LEDC channel duty, the range of duty setting is [0, (2**duty_resolution)] */
     int hpoint;                     /*!< LEDC channel hpoint value, the max value is 0xfffff */
+    struct {
+        unsigned int output_invert: 1;/*!< Enable (1) or disable (0) gpio output invert */
+    } flags;                        /*!< LEDC flags */
+
 } ledc_channel_config_t;
 
 /**
diff --git a/tools/sdk/esp32/include/hal/include/hal/spi_flash_encrypt_hal.h b/tools/sdk/esp32/include/hal/include/hal/spi_flash_encrypt_hal.h
new file mode 100644
index 00000000..adc22f7e
--- /dev/null
+++ b/tools/sdk/esp32/include/hal/include/hal/spi_flash_encrypt_hal.h
@@ -0,0 +1,62 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The HAL is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for SPI Flash Encryption
+
+#include "hal/spi_flash_encrypted_ll.h"
+
+/**
+ * @brief Enable the flash encryption
+ */
+void spi_flash_encryption_hal_enable(void);
+
+/**
+ * @brief Disable the flash encryption
+ */
+void spi_flash_encryption_hal_disable(void);
+
+/**
+ * Prepare flash encryption before operation.
+ *
+ * @param address The destination address in flash for the write operation.
+ * @param buffer Data for programming
+ * @param size Size to program.
+ *
+ * @note address and buffer must be 8-word aligned.
+ */
+void spi_flash_encryption_hal_prepare(uint32_t address, const uint32_t* buffer, uint32_t size);
+
+/**
+ * @brief flash data encryption operation is done.
+ */
+void spi_flash_encryption_hal_done(void);
+
+/**
+ * Destroy encrypted result
+ */
+void spi_flash_encryption_hal_destroy(void);
+
+/**
+ * Check if is qualified to encrypt the buffer
+ *
+ * @param address the address of written flash partition.
+ * @param length Buffer size.
+ */
+bool spi_flash_encryption_hal_check(uint32_t address, uint32_t length);
diff --git a/tools/sdk/esp32/include/hal/include/hal/spi_flash_types.h b/tools/sdk/esp32/include/hal/include/hal/spi_flash_types.h
index ed68d24f..0cc60559 100644
--- a/tools/sdk/esp32/include/hal/include/hal/spi_flash_types.h
+++ b/tools/sdk/esp32/include/hal/include/hal/spi_flash_types.h
@@ -86,6 +86,44 @@ typedef struct {
     };
 } spi_flash_sus_cmd_conf;
 
+/// Structure for flash encryption operations.
+typedef struct
+{
+    /**
+     * @brief Enable the flash encryption
+    */
+    void (*flash_encryption_enable)(void);
+    /**
+     * @brief Disable the flash encryption
+    */
+    void (*flash_encryption_disable)(void);
+    /**
+     * Prepare flash encryption before operation.
+     *
+     * @param address The destination address in flash for the write operation.
+     * @param buffer Data for programming
+     * @param size Size to program.
+     *
+     * @note address and buffer must be 8-word aligned.
+     */
+    void (*flash_encryption_data_prepare)(uint32_t address, const uint32_t* buffer, uint32_t size);
+    /**
+     * @brief flash data encryption operation is done.
+     */
+    void (*flash_encryption_done)(void);
+    /**
+     * Destroy encrypted result
+    */
+    void (*flash_encryption_destroy)(void);
+    /**
+     * Check if is qualified to encrypt the buffer
+     *
+     * @param address the address of written flash partition.
+     * @param length Buffer size.
+     */
+    bool (*flash_encryption_check)(uint32_t address, uint32_t length);
+} spi_flash_encryption_t;
+
 ///Slowest io mode supported by ESP32, currently SlowRd
 #define SPI_FLASH_READ_MODE_MIN SPI_FLASH_SLOWRD
 
diff --git a/tools/sdk/esp32/include/hal/include/hal/spi_types.h b/tools/sdk/esp32/include/hal/include/hal/spi_types.h
index 5eb7a18d..400b922a 100644
--- a/tools/sdk/esp32/include/hal/include/hal/spi_types.h
+++ b/tools/sdk/esp32/include/hal/include/hal/spi_types.h
@@ -31,13 +31,17 @@ typedef enum {
 
 /// SPI Events
 typedef enum {
-    SPI_EV_BUF_TX        = BIT(0), ///< The buffer has sent data to master, Slave HD only
-    SPI_EV_BUF_RX        = BIT(1), ///< The buffer has received data from master, Slave HD only
-    SPI_EV_SEND          = BIT(2), ///< Slave has loaded some data to DMA, and master has received certain number of the data, the number is determined by master. Slave HD only
-    SPI_EV_RECV          = BIT(3), ///< Slave has received certain number of data from master, the number is determined by master. Slave HD only.
-    SPI_EV_CMD9          = BIT(4), ///< Received CMD9 from master, Slave HD only
-    SPI_EV_CMDA          = BIT(5), ///< Received CMDA from master, Slave HD only
-    SPI_EV_TRANS         = BIT(6), ///< A transaction has done
+    /* Slave HD Only */
+    SPI_EV_BUF_TX         = BIT(0), ///< The buffer has sent data to master.
+    SPI_EV_BUF_RX         = BIT(1), ///< The buffer has received data from master.
+    SPI_EV_SEND_DMA_READY = BIT(2), ///< Slave has loaded its TX data buffer to the hardware (DMA).
+    SPI_EV_SEND           = BIT(3), ///< Master has received certain number of the data, the number is determined by Master.
+    SPI_EV_RECV_DMA_READY = BIT(4), ///< Slave has loaded its RX data buffer to the hardware (DMA).
+    SPI_EV_RECV           = BIT(5), ///< Slave has received certain number of data from master, the number is determined by Master.
+    SPI_EV_CMD9           = BIT(6), ///< Received CMD9 from master.
+    SPI_EV_CMDA           = BIT(7), ///< Received CMDA from master.
+    /* Common Event */
+    SPI_EV_TRANS          = BIT(8), ///< A transaction has done
 } spi_event_t;
 FLAG_ATTR(spi_event_t)
 
diff --git a/tools/sdk/esp32/include/hal/include/hal/systimer_hal.h b/tools/sdk/esp32/include/hal/include/hal/systimer_hal.h
index 1f4eb5c4..9ac3262f 100644
--- a/tools/sdk/esp32/include/hal/include/hal/systimer_hal.h
+++ b/tools/sdk/esp32/include/hal/include/hal/systimer_hal.h
@@ -14,78 +14,91 @@
 
 #pragma once
 
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/soc_caps.h"
+#include "soc/systimer_struct.h"
+#include "hal/systimer_types.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include <stdint.h>
-#include <stdbool.h>
-#include "hal/systimer_types.h"
-
-/**
- * @brief enable systimer counter
- */
-void systimer_hal_enable_counter(systimer_counter_id_t counter_id);
-
-/**
- * @brief get current counter value
- */
-uint64_t systimer_hal_get_counter_value(systimer_counter_id_t counter_id);
-
-/**
- * @brief get current time (in microseconds)
- */
-uint64_t systimer_hal_get_time(systimer_counter_id_t counter_id);
-
-/*
- * @brief set alarm target value (used in one-shot mode)
- */
-void systimer_hal_set_alarm_target(systimer_alarm_id_t alarm_id, uint64_t target);
-
-/**
- * @brief set alarm period value (used in period mode)
- */
-void systimer_hal_set_alarm_period(systimer_alarm_id_t alarm_id, uint32_t period);
-
-/**
- * @brief get alarm time
- */
-uint64_t systimer_hal_get_alarm_value(systimer_alarm_id_t alarm_id);
-
-/**
- * @brief enable alarm interrupt
- */
-void systimer_hal_enable_alarm_int(systimer_alarm_id_t alarm_id);
-
-/**
- * @brief select alarm mode
- */
-void systimer_hal_select_alarm_mode(systimer_alarm_id_t alarm_id, systimer_alarm_mode_t mode);
-
-/**
- * @brief update systimer step when apb clock gets changed
- */
-void systimer_hal_on_apb_freq_update(uint32_t apb_ticks_per_us);
-
-/**
- * @brief move systimer counter value forward or backward
- */
-void systimer_hal_counter_value_advance(systimer_counter_id_t counter_id, int64_t time_us);
+typedef struct {
+    systimer_dev_t *dev;
+} systimer_hal_context_t;
 
 /**
  * @brief initialize systimer in HAL layer
  */
-void systimer_hal_init(void);
+void systimer_hal_init(systimer_hal_context_t *hal);
+
+/**
+ * @brief enable systimer counter
+ */
+void systimer_hal_enable_counter(systimer_hal_context_t *hal, uint32_t counter_id);
+
+/**
+ * @brief get current counter value
+ */
+uint64_t systimer_hal_get_counter_value(systimer_hal_context_t *hal, uint32_t counter_id);
+
+/**
+ * @brief get current time (in microseconds)
+ */
+uint64_t systimer_hal_get_time(systimer_hal_context_t *hal, uint32_t counter_id);
+
+/*
+ * @brief set alarm target value (used in one-shot mode)
+ */
+void systimer_hal_set_alarm_target(systimer_hal_context_t *hal, uint32_t alarm_id, uint64_t target);
+
+/**
+ * @brief set alarm period value (used in period mode)
+ */
+void systimer_hal_set_alarm_period(systimer_hal_context_t *hal, uint32_t alarm_id, uint32_t period);
+
+/**
+ * @brief get alarm time
+ */
+uint64_t systimer_hal_get_alarm_value(systimer_hal_context_t *hal, uint32_t alarm_id);
+
+/**
+ * @brief enable alarm interrupt
+ */
+void systimer_hal_enable_alarm_int(systimer_hal_context_t *hal, uint32_t alarm_id);
+
+/**
+ * @brief select alarm mode
+ */
+void systimer_hal_select_alarm_mode(systimer_hal_context_t *hal, uint32_t alarm_id, systimer_alarm_mode_t mode);
+
+/**
+ * @brief update systimer step when apb clock gets changed
+ */
+void systimer_hal_on_apb_freq_update(systimer_hal_context_t *hal, uint32_t apb_ticks_per_us);
+
+/**
+ * @brief move systimer counter value forward or backward
+ */
+void systimer_hal_counter_value_advance(systimer_hal_context_t *hal, uint32_t counter_id, int64_t time_us);
 
 /**
  * @brief  connect alarm unit to selected counter
  */
-void systimer_hal_connect_alarm_counter(systimer_alarm_id_t alarm_id, systimer_counter_id_t counter_id);
+void systimer_hal_connect_alarm_counter(systimer_hal_context_t *hal, uint32_t alarm_id, uint32_t counter_id);
 
 /**
  * @brief  set if a counter should be stalled when CPU is halted by the debugger
  */
-void systimer_hal_counter_can_stall_by_cpu(uint32_t counter_id, uint32_t cpu_id, bool can);
+void systimer_hal_counter_can_stall_by_cpu(systimer_hal_context_t *hal, uint32_t counter_id, uint32_t cpu_id, bool can);
+
+#if !SOC_SYSTIMER_FIXED_TICKS_US
+/**
+ * @brief set increase steps for systimer counter on different clock source
+ */
+void systimer_hal_set_steps_per_tick(systimer_hal_context_t *hal, int clock_source, uint32_t steps);
+#endif
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32/include/hal/include/hal/systimer_types.h b/tools/sdk/esp32/include/hal/include/hal/systimer_types.h
index cf88a00f..2af2f60f 100644
--- a/tools/sdk/esp32/include/hal/include/hal/systimer_types.h
+++ b/tools/sdk/esp32/include/hal/include/hal/systimer_types.h
@@ -14,13 +14,13 @@
 
 #pragma once
 
+#include <stdint.h>
+#include "soc/soc_caps.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include <stdint.h>
-#include "soc/soc_caps.h"
-
 /*
  * @brief The structure of the counter value in systimer
  *
@@ -39,27 +39,6 @@ typedef struct {
 _Static_assert(sizeof(systimer_counter_value_t) == 8, "systimer_counter_value_t should occupy 8 bytes in memory");
 /** @endcond */
 
-/**
- * @brief systimer counter ID
- *
- */
-typedef enum {
-    SYSTIMER_COUNTER_0, /*!< systimer counter 0 */
-#if SOC_SYSTIMER_COUNTER_NUM > 1
-    SYSTIMER_COUNTER_1, /*!< systimer counter 1 */
-#endif
-} systimer_counter_id_t;
-
-/**
- * @brief systimer alarm ID
- *
- */
-typedef enum {
-    SYSTIMER_ALARM_0, /*!< systimer alarm 0 */
-    SYSTIMER_ALARM_1, /*!< systimer alarm 1 */
-    SYSTIMER_ALARM_2, /*!< systimer alarm 2 */
-} systimer_alarm_id_t;
-
 /**
  * @brief systimer alarm mode
  *
diff --git a/tools/sdk/esp32/include/hal/include/hal/usb_types.h b/tools/sdk/esp32/include/hal/include/hal/usb_types.h
deleted file mode 100644
index 00f8b8c2..00000000
--- a/tools/sdk/esp32/include/hal/include/hal/usb_types.h
+++ /dev/null
@@ -1,452 +0,0 @@
-// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#pragma once
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-#include <stdint.h>
-
-#define USB_CTRL_REQ_ATTR       __attribute__((packed))
-#define USB_DESC_ATTR           __attribute__((packed))
-
-/* -----------------------------------------------------------------------------
-------------------------------- Common USB Types -------------------------------
------------------------------------------------------------------------------ */
-
-// ----------------------------- Device Related --------------------------------
-
-/**
- * @brief Enumeration of USB PHY type
- */
-typedef enum {
-    USB_PHY_INTERNAL = 0,       /**< Use the chip's internal USB PHY */
-    USB_PHY_EXTERNAL,           /**< Use an external USB PHY */
-} usb_phy_t;
-
-// ------------------------------ Bus Related ----------------------------------
-
-/**
- * @brief USB Standard Speeds
- */
-typedef enum {
-    USB_SPEED_LOW = 0,                  /**< USB Low Speed (1.5 Mbit/s) */
-    USB_SPEED_FULL,                     /**< USB Full Speed (12 Mbit/s) */
-} usb_speed_t;
-
-// ---------------------------- Transfer Related -------------------------------
-
-/**
- * @brief The type of USB transfer
- *
- * @note The enum values need to match the bmAttributes field of an EP descriptor
- */
-typedef enum {
-    USB_XFER_TYPE_CTRL = 0,
-    USB_XFER_TYPE_ISOCHRONOUS,
-    USB_XFER_TYPE_BULK,
-    USB_XFER_TYPE_INTR,
-} usb_xfer_type_t;
-
-/**
- * @brief The status of a particular transfer
- */
-typedef enum {
-    USB_TRANSFER_STATUS_COMPLETED,      /**< The transfer was successful (but may be short) */
-    USB_TRANSFER_STATUS_ERROR,          /**< The transfer failed because due to excessive errors (e.g. no response or CRC error) */
-    USB_TRANSFER_STATUS_TIMED_OUT,      /**< The transfer failed due to to a time out */
-    USB_TRANSFER_STATUS_CANCELLED,      /**< The transfer was cancelled */
-    USB_TRANSFER_STATUS_STALL,          /**< The transfer was stalled */
-    USB_TRANSFER_STATUS_NO_DEVICE,      /**< The transfer failed because the device is no longer valid (e.g., disconencted */
-    USB_TRANSFER_STATUS_OVERFLOW,       /**< The transfer as more data was sent than was requested */
-} usb_transfer_status_t;
-
-/**
- * @brief Isochronous packet descriptor
- *
- * If the number of bytes in an IRP transfer is larger than the MPS of the
- * endpoint, the IRP is split over multiple packets (one packet per bInterval
- * of the endpoint). An array of Isochronous packet descriptos describes how
- * an IRP should be split over multiple packets.
- */
-typedef struct {
-    int length;                         /**< Number of bytes to transmit/receive in the packet */
-    int actual_length;                  /**< Actual number of bytes transmitted/received in the packet */
-    usb_transfer_status_t status;       /**< Status of the packet */
-} usb_iso_packet_desc_t;
-
-/**
- * @brief USB IRP (I/O Request Packet). See USB2.0 Spec
- *
- * An identifiable request by a software client to move data between itself (on the
- * host) and an endpoint of a device in an appropriate direction.
- *
- * This structure represents the barebones of the request. Different layers of
- * USB drivers will wrap their own objects around this.
- *
- * See 10.5.3.1 os USB2.0 specification
- * Bulk: Represnts a single bulk transfer which a pipe will transparently split
- *       into multiple MPS transactions (until the last)
- * Control: Represents a single contorl transfer with the setup packet at the
- *          first 8 bytes of the buffer.
- * Interrupt: Represnts a single interrupt transaction
- * Isochronous: Represnts a buffer of a stream of bytes which the pipe will transparently
- *              transfer the stream of bytes one or more service periods
- */
-typedef struct {
-    int num_bytes;                      /**< Number of bytes in IRP. Control should exclude size of setup. IN should be integer multiple of MPS */
-    int actual_num_bytes;               /**< Actual number of bytes transmitted/receives in the IRP */
-    uint8_t *data_buffer;               /**< Pointer to data buffer. Must be DMA capable memory */
-    usb_transfer_status_t status;       /**< Status of the transfer */
-    int num_iso_packets;                /**< Only relevant to isochronous. Number of service periods to transfer data buffer over. Set to 0 for non-iso transfers */
-    usb_iso_packet_desc_t iso_packet_desc[0];   /**< Descriptors for each ISO packet */
-} usb_irp_t;
-
-/* -----------------------------------------------------------------------------
------------------------------------ Chapter 9 ----------------------------------
------------------------------------------------------------------------------ */
-
-// ------------------------------ Control Request ------------------------------
-
-/**
- * @brief Size of a USB control transfer setup packet in bytes
- */
-#define USB_CTRL_REQ_SIZE       8
-
-/**
- * @brief Structure representing a USB control transfer setup packet
- */
-typedef union {
-    struct {
-        uint8_t bRequestType;
-        uint8_t bRequest;
-        uint16_t wValue;
-        uint16_t wIndex;
-        uint16_t wLength;
-    } USB_CTRL_REQ_ATTR;
-    uint8_t val[USB_CTRL_REQ_SIZE];
-} usb_ctrl_req_t;
-_Static_assert(sizeof(usb_ctrl_req_t) == USB_CTRL_REQ_SIZE, "Size of usb_ctrl_req_t incorrect");
-
-/**
- * @brief Bit masks pertaining to the bRequestType field of a setup packet
- */
-#define USB_B_REQUEST_TYPE_DIR_OUT          (0X00 << 7)
-#define USB_B_REQUEST_TYPE_DIR_IN           (0x01 << 7)
-#define USB_B_REQUEST_TYPE_TYPE_STANDARD    (0x00 << 5)
-#define USB_B_REQUEST_TYPE_TYPE_CLASS       (0x01 << 5)
-#define USB_B_REQUEST_TYPE_TYPE_VENDOR      (0x02 << 5)
-#define USB_B_REQUEST_TYPE_TYPE_RESERVED    (0x03 << 5)
-#define USB_B_REQUEST_TYPE_TYPE_MASK        (0x03 << 5)
-#define USB_B_REQUEST_TYPE_RECIP_DEVICE     (0x00 << 0)
-#define USB_B_REQUEST_TYPE_RECIP_INTERFACE  (0x01 << 0)
-#define USB_B_REQUEST_TYPE_RECIP_ENDPOINT   (0x02 << 0)
-#define USB_B_REQUEST_TYPE_RECIP_OTHER      (0x03 << 0)
-#define USB_B_REQUEST_TYPE_RECIP_MASK       (0x1f << 0)
-
-/**
- * @brief Bit masks pertaining to the bRequest field of a setup packet
- */
-#define USB_B_REQUEST_GET_STATUS            0x00
-#define USB_B_REQUEST_CLEAR_FEATURE         0x01
-#define USB_B_REQUEST_SET_FEATURE           0x03
-#define USB_B_REQUEST_SET_ADDRESS           0x05
-#define USB_B_REQUEST_GET_DESCRIPTOR        0x06
-#define USB_B_REQUEST_SET_DESCRIPTOR        0x07
-#define USB_B_REQUEST_GET_CONFIGURATION     0x08
-#define USB_B_REQUEST_SET_CONFIGURATION     0x09
-#define USB_B_REQUEST_GET_INTERFACE         0x0A
-#define USB_B_REQUEST_SET_INTERFACE         0x0B
-#define USB_B_REQUEST_SYNCH_FRAME           0x0C
-
-/**
- * @brief Bit masks pertaining to the wValue field of a setup packet
- */
-#define USB_W_VALUE_DT_DEVICE               0x01
-#define USB_W_VALUE_DT_CONFIG               0x02
-#define USB_W_VALUE_DT_STRING               0x03
-#define USB_W_VALUE_DT_INTERFACE            0x04
-#define USB_W_VALUE_DT_ENDPOINT             0x05
-#define USB_W_VALUE_DT_DEVICE_QUALIFIER     0x06
-#define USB_W_VALUE_DT_OTHER_SPEED_CONFIG   0x07
-#define USB_W_VALUE_DT_INTERFACE_POWER      0x08
-
-/**
- * @brief Initializer for a SET_ADDRESS request
- *
- * Sets the address of a connected device
- */
-#define USB_CTRL_REQ_INIT_SET_ADDR(ctrl_req_ptr, addr) ({  \
-    (ctrl_req_ptr)->bRequestType = USB_B_REQUEST_TYPE_DIR_OUT | USB_B_REQUEST_TYPE_TYPE_STANDARD |USB_B_REQUEST_TYPE_RECIP_DEVICE;   \
-    (ctrl_req_ptr)->bRequest = USB_B_REQUEST_SET_ADDRESS;  \
-    (ctrl_req_ptr)->wValue = (addr);   \
-    (ctrl_req_ptr)->wIndex = 0;    \
-    (ctrl_req_ptr)->wLength = 0;   \
-})
-
-/**
- * @brief Initializer for a request to get a device's device descriptor
- */
-#define USB_CTRL_REQ_INIT_GET_DEVC_DESC(ctrl_req_ptr) ({ \
-    (ctrl_req_ptr)->bRequestType = USB_B_REQUEST_TYPE_DIR_IN | USB_B_REQUEST_TYPE_TYPE_STANDARD | USB_B_REQUEST_TYPE_RECIP_DEVICE;   \
-    (ctrl_req_ptr)->bRequest = USB_B_REQUEST_GET_DESCRIPTOR;   \
-    (ctrl_req_ptr)->wValue = (USB_W_VALUE_DT_DEVICE << 8); \
-    (ctrl_req_ptr)->wIndex = 0;    \
-    (ctrl_req_ptr)->wLength = 18;  \
-})
-
-/**
- * @brief Initializer for a request to get a device's current configuration number
- */
-#define USB_CTRL_REQ_INIT_GET_CONFIG(ctrl_req_ptr) ({  \
-    (ctrl_req_ptr)->bRequestType = USB_B_REQUEST_TYPE_DIR_IN | USB_B_REQUEST_TYPE_TYPE_STANDARD | USB_B_REQUEST_TYPE_RECIP_DEVICE;   \
-    (ctrl_req_ptr)->bRequest = USB_B_REQUEST_GET_CONFIGURATION;    \
-    (ctrl_req_ptr)->wValue = 0;    \
-    (ctrl_req_ptr)->wIndex = 0;    \
-    (ctrl_req_ptr)->wLength = 1;   \
-})
-
-/**
- * @brief Initializer for a request to get one of the device's current configuration descriptor
- *
- * - desc_index indicates the configuration's index number
- * - Number of bytes of the configuration descriptor to get
- */
-#define USB_CTRL_REQ_INIT_GET_CFG_DESC(ctrl_req_ptr, desc_index, desc_len) ({  \
-    (ctrl_req_ptr)->bRequestType = USB_B_REQUEST_TYPE_DIR_IN | USB_B_REQUEST_TYPE_TYPE_STANDARD | USB_B_REQUEST_TYPE_RECIP_DEVICE;   \
-    (ctrl_req_ptr)->bRequest = USB_B_REQUEST_GET_DESCRIPTOR;   \
-    (ctrl_req_ptr)->wValue = (USB_W_VALUE_DT_CONFIG << 8) | ((desc_index) & 0xFF); \
-    (ctrl_req_ptr)->wIndex = 0;    \
-    (ctrl_req_ptr)->wLength = (desc_len);  \
-})
-
-/**
- * @brief Initializer for a request to set a device's current configuration number
- */
-#define USB_CTRL_REQ_INIT_SET_CONFIG(ctrl_req_ptr, config_num) ({  \
-    (ctrl_req_ptr)->bRequestType = USB_B_REQUEST_TYPE_DIR_OUT | USB_B_REQUEST_TYPE_TYPE_STANDARD | USB_B_REQUEST_TYPE_RECIP_DEVICE;   \
-    (ctrl_req_ptr)->bRequest = USB_B_REQUEST_SET_CONFIGURATION;    \
-    (ctrl_req_ptr)->wValue = (config_num); \
-    (ctrl_req_ptr)->wIndex = 0;    \
-    (ctrl_req_ptr)->wLength = 0;   \
-})
-
-// ---------------------------- Device Descriptor ------------------------------
-
-/**
- * @brief Size of a USB device descriptor in bytes
- */
-#define USB_DESC_DEV_SIZE       18
-
-/**
- * @brief Structure representing a USB device descriptor
- */
-typedef union {
-    struct {
-        uint8_t bLength;
-        uint8_t bDescriptorType;
-        uint16_t bcdUSB;
-        uint8_t bDeviceClass;
-        uint8_t bDeviceSubClass;
-        uint8_t bDeviceProtocol;
-        uint8_t bMaxPacketSize0;
-        uint16_t idVendor;
-        uint16_t idProduct;
-        uint16_t bcdDevice;
-        uint8_t iManufacturer;
-        uint8_t iProduct;
-        uint8_t iSerialNumber;
-        uint8_t bNumConfigurations;
-    } USB_DESC_ATTR;
-    uint8_t val[USB_DESC_DEV_SIZE];
-} usb_desc_devc_t;
-_Static_assert(sizeof(usb_desc_devc_t) == USB_DESC_DEV_SIZE, "Size of usb_desc_devc_t incorrect");
-
-/**
- * @brief Possible base class values of the bDeviceClass field of a USB device descriptor
- */
-#define USB_CLASS_PER_INTERFACE             0x00
-#define USB_CLASS_AUDIO                     0x01
-#define USB_CLASS_COMM                      0x02
-#define USB_CLASS_HID                       0x03
-#define USB_CLASS_PHYSICAL                  0x05
-#define USB_CLASS_STILL_IMAGE               0x06
-#define USB_CLASS_PRINTER                   0x07
-#define USB_CLASS_MASS_STORAGE              0x08
-#define USB_CLASS_HUB                       0x09
-#define USB_CLASS_CDC_DATA                  0x0a
-#define USB_CLASS_CSCID                     0x0b
-#define USB_CLASS_CONTENT_SEC               0x0d
-#define USB_CLASS_VIDEO                     0x0e
-#define USB_CLASS_WIRELESS_CONTROLLER       0xe0
-#define USB_CLASS_PERSONAL_HEALTHCARE       0x0f
-#define USB_CLASS_AUDIO_VIDEO               0x10
-#define USB_CLASS_BILLBOARD                 0x11
-#define USB_CLASS_USB_TYPE_C_BRIDGE         0x12
-#define USB_CLASS_MISC                      0xef
-#define USB_CLASS_APP_SPEC                  0xfe
-#define USB_CLASS_VENDOR_SPEC               0xff
-
-/**
- * @brief Vendor specific subclass code
- */
-#define USB_SUBCLASS_VENDOR_SPEC            0xff
-
-// ----------------------- Configuration Descriptor ----------------------------
-
-/**
- * @brief Size of a short USB configuration descriptor in bytes
- *
- * @note The size of a full USB configuration includes all the interface and endpoint
- *       descriptors of that configuration.
- */
-#define USB_DESC_CFG_SIZE       9
-
-/**
- * @brief Structure representing a short USB configuration descriptor
- *
- * @note The full USB configuration includes all the interface and endpoint
- *       descriptors of that configuration.
- */
-typedef union {
-    struct {
-        uint8_t bLength;
-        uint8_t bDescriptorType;
-        uint16_t wTotalLength;
-        uint8_t bNumInterfaces;
-        uint8_t bConfigurationValue;
-        uint8_t iConfiguration;
-        uint8_t bmAttributes;
-        uint8_t bMaxPower;
-    } USB_DESC_ATTR;
-    uint8_t val[USB_DESC_CFG_SIZE];
-} usb_desc_cfg_t;
-_Static_assert(sizeof(usb_desc_cfg_t) == USB_DESC_CFG_SIZE, "Size of usb_desc_cfg_t incorrect");
-
-/**
- * @brief Bit masks pertaining to the bmAttributes field of a configuration descriptor
- */
-#define USB_BM_ATTRIBUTES_ONE               (1 << 7)    //Must be set
-#define USB_BM_ATTRIBUTES_SELFPOWER         (1 << 6)    //Self powered
-#define USB_BM_ATTRIBUTES_WAKEUP            (1 << 5)    //Can wakeup
-#define USB_BM_ATTRIBUTES_BATTERY           (1 << 4)    //Battery powered
-
-// ------------------------- Interface Descriptor ------------------------------
-
-/**
- * @brief Size of a USB interface descriptor in bytes
- */
-#define USB_DESC_INTF_SIZE      9
-
-/**
- * @brief Structure representing a USB interface descriptor
- */
-typedef union {
-    struct {
-        uint8_t bLength;
-        uint8_t bDescriptorType;
-        uint8_t bInterfaceNumber;
-        uint8_t bAlternateSetting;
-        uint8_t bNumEndpoints;
-        uint8_t bInterfaceClass;
-        uint8_t bInterfaceSubClass;
-        uint8_t bInterfaceProtocol;
-        uint8_t iInterface;
-    } USB_DESC_ATTR;
-    uint8_t val[USB_DESC_INTF_SIZE];
-} usb_desc_intf_t;
-_Static_assert(sizeof(usb_desc_intf_t) == USB_DESC_INTF_SIZE, "Size of usb_desc_intf_t incorrect");
-
-// ------------------------- Endpoint Descriptor -------------------------------
-
-/**
- * @brief Size of a USB endpoint descriptor in bytes
- */
-#define USB_DESC_EP_SIZE        7
-
-/**
- * @brief Structure representing a USB endp;oint descriptor
- */
-typedef union {
-    struct {
-        uint8_t bLength;
-        uint8_t bDescriptorType;
-        uint8_t bEndpointAddress;
-        uint8_t bmAttributes;
-        uint16_t wMaxPacketSize;
-        uint8_t bInterval;
-    } USB_DESC_ATTR;
-    uint8_t val[USB_DESC_EP_SIZE];
-} usb_desc_ep_t;
-_Static_assert(sizeof(usb_desc_ep_t) == USB_DESC_EP_SIZE, "Size of usb_desc_ep_t incorrect");
-
-/**
- * @brief Bit masks pertaining to the bEndpointAddress field of an endpoint descriptor
- */
-#define USB_B_ENDPOINT_ADDRESS_EP_NUM_MASK              0x0f
-#define USB_B_ENDPOINT_ADDRESS_EP_DIR_MASK              0x80
-
-/**
- * @brief Bit masks pertaining to the bmAttributes field of an endpoint descriptor
- */
-#define USB_BM_ATTRIBUTES_XFERTYPE_MASK                 0x03
-#define USB_BM_ATTRIBUTES_XFER_CONTROL                  (0 << 0)
-#define USB_BM_ATTRIBUTES_XFER_ISOC                     (1 << 0)
-#define USB_BM_ATTRIBUTES_XFER_BULK                     (2 << 0)
-#define USB_BM_ATTRIBUTES_XFER_INT                      (3 << 0)
-#define USB_BM_ATTRIBUTES_SYNCTYPE_MASK                 0x0C    /* in bmAttributes */
-#define USB_BM_ATTRIBUTES_SYNC_NONE                     (0 << 2)
-#define USB_BM_ATTRIBUTES_SYNC_ASYNC                    (1 << 2)
-#define USB_BM_ATTRIBUTES_SYNC_ADAPTIVE                 (2 << 2)
-#define USB_BM_ATTRIBUTES_SYNC_SYNC                     (3 << 2)
-#define USB_BM_ATTRIBUTES_USAGETYPE_MASK                0x30
-#define USB_BM_ATTRIBUTES_USAGE_DATA                    (0 << 4)
-#define USB_BM_ATTRIBUTES_USAGE_FEEDBACK                (1 << 4)
-#define USB_BM_ATTRIBUTES_USAGE_IMPLICIT_FB             (2 << 4)
-
-/**
- * @brief Macro helpers to get information about an endpoint from its descriptor
- */
-#define USB_DESC_EP_GET_XFERTYPE(desc_ptr) ((usb_xfer_type_t) ((desc_ptr)->bmAttributes & USB_BM_ATTRIBUTES_XFERTYPE_MASK))
-#define USB_DESC_EP_GET_EP_NUM(desc_ptr) ((desc_ptr)->bEndpointAddress & USB_B_ENDPOINT_ADDRESS_EP_NUM_MASK)
-#define USB_DESC_EP_GET_EP_DIR(desc_ptr) (((desc_ptr)->bEndpointAddress & USB_B_ENDPOINT_ADDRESS_EP_DIR_MASK) ? 1 : 0)
-#define USB_DESC_EP_GET_MPS(desc_ptr) ((desc_ptr)->wMaxPacketSize & 0x7FF)
-
-
-// --------------------------- String Descriptor -------------------------------
-
-/**
- * @brief Size of a short USB string descriptor in bytes
- */
-#define USB_DESC_STR_SIZE       4
-
-/**
- * @brief Structure representing a USB string descriptor
- */
-typedef union {
-    struct {
-        uint8_t bLength;
-        uint8_t bDescriptorType;
-        uint16_t wData[1];        /* UTF-16LE encoded */
-    } USB_DESC_ATTR;
-    uint8_t val[USB_DESC_STR_SIZE];
-} usb_desc_str_t;
-_Static_assert(sizeof(usb_desc_str_t) == USB_DESC_STR_SIZE, "Size of usb_desc_str_t incorrect");
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32/include/log/include/esp_log.h b/tools/sdk/esp32/include/log/include/esp_log.h
index 5a488936..c41a9d3c 100644
--- a/tools/sdk/esp32/include/log/include/esp_log.h
+++ b/tools/sdk/esp32/include/log/include/esp_log.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef __ESP_LOG_H__
 #define __ESP_LOG_H__
@@ -48,13 +40,22 @@ typedef enum {
 
 typedef int (*vprintf_like_t)(const char *, va_list);
 
+/**
+ * @brief Default log level
+ *
+ * This is used by the definition of ESP_EARLY_LOGx macros. It is not
+ * recommended to set this directly, call esp_log_level_set("*", level)
+ * instead.
+ */
+extern esp_log_level_t esp_log_default_level;
+
 /**
  * @brief Set log level for given tag
  *
  * If logging for given component has already been enabled, changes previous setting.
  *
  * Note that this function can not raise log level above the level set using
- * CONFIG_LOG_DEFAULT_LEVEL setting in menuconfig.
+ * CONFIG_LOG_MAXIMUM_LEVEL setting in menuconfig.
  *
  * To raise log level above the default one for a given file, define
  * LOG_LOCAL_LEVEL to one of the ESP_LOG_* values, before including
@@ -145,7 +146,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 
 #ifndef LOG_LOCAL_LEVEL
 #ifndef BOOTLOADER_BUILD
-#define LOG_LOCAL_LEVEL  CONFIG_LOG_DEFAULT_LEVEL
+#define LOG_LOCAL_LEVEL  CONFIG_LOG_MAXIMUM_LEVEL
 #else
 #define LOG_LOCAL_LEVEL  CONFIG_BOOTLOADER_LOG_LEVEL
 #endif
@@ -279,7 +280,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 
 /** @endcond */
 
-/// macro to output logs in startup code, before heap allocator and syscalls have been initialized. log at ``ESP_LOG_ERROR`` level. @see ``printf``,``ESP_LOGE``
+/// macro to output logs in startup code, before heap allocator and syscalls have been initialized. log at ``ESP_LOG_ERROR`` level. @see ``printf``,``ESP_LOGE``,``ESP_DRAM_LOGE``
 #define ESP_EARLY_LOGE( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_ERROR,   E, ##__VA_ARGS__)
 /// macro to output logs in startup code at ``ESP_LOG_WARN`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
 #define ESP_EARLY_LOGW( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_WARN,    W, ##__VA_ARGS__)
@@ -290,8 +291,16 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 /// macro to output logs in startup code at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
 #define ESP_EARLY_LOGV( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_VERBOSE, V, ##__VA_ARGS__)
 
+#ifdef BOOTLOADER_BUILD
+#define _ESP_LOG_EARLY_ENABLED(log_level) (LOG_LOCAL_LEVEL >= (log_level))
+#else
+/* For early log, there is no log tag filtering. So we want to log only if both the LOG_LOCAL_LEVEL and the
+   currently configured min log level are higher than the log level */
+#define _ESP_LOG_EARLY_ENABLED(log_level) (LOG_LOCAL_LEVEL >= (log_level) && esp_log_default_level >= (log_level))
+#endif
+
 #define ESP_LOG_EARLY_IMPL(tag, format, log_level, log_tag_letter, ...) do {                             \
-        if (LOG_LOCAL_LEVEL >= log_level) {                                                              \
+        if (_ESP_LOG_EARLY_ENABLED(log_level)) {                                                         \
             esp_rom_printf(LOG_FORMAT(log_tag_letter, format), esp_log_timestamp(), tag, ##__VA_ARGS__); \
         }} while(0)
 
@@ -303,7 +312,9 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 #define ESP_LOGV( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_VERBOSE, tag, format, ##__VA_ARGS__)
 #else
 /**
- * macro to output logs at ESP_LOG_ERROR level.
+ * Macro to output logs at ESP_LOG_ERROR level.
+ *
+ * @note This macro cannot be used when interrupts are disabled or inside an ISR. @see ``ESP_DRAM_LOGE``.
  *
  * @param tag tag of the log, which can be used to change the log level by ``esp_log_level_set`` at runtime.
  *
@@ -359,7 +370,11 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 /**
  * @brief Macro to output logs when the cache is disabled. log at ``ESP_LOG_ERROR`` level.
  *
- * Similar to `ESP_EARLY_LOGE`, the log level cannot be changed by `esp_log_level_set`.
+ * @note Unlike normal logging macros, it's possible to use this macro when interrupts are
+ * disabled or inside an ISR.
+ *
+ * Similar to @see ``ESP_EARLY_LOGE``, the log level cannot be changed per-tag, however
+ * esp_log_level_set("*", level) will set the default level which controls these log lines also.
  *
  * Usage: `ESP_DRAM_LOGE(DRAM_STR("my_tag"), "format", or `ESP_DRAM_LOGE(TAG, "format", ...)`,
  * where TAG is a char* that points to a str in the DRAM.
@@ -382,7 +397,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 #define _ESP_LOG_DRAM_LOG_FORMAT(letter, format)  DRAM_STR(#letter " %s: " format "\n")
 
 #define ESP_DRAM_LOG_IMPL(tag, format, log_level, log_tag_letter, ...) do {                       \
-        if (LOG_LOCAL_LEVEL >= log_level) {                                                       \
+        if (_ESP_LOG_EARLY_ENABLED(log_level)) {                                                  \
             esp_rom_printf(_ESP_LOG_DRAM_LOG_FORMAT(log_tag_letter, format), tag, ##__VA_ARGS__); \
         }} while(0)
 /** @endcond */
diff --git a/tools/sdk/esp32/include/log/include/esp_log_internal.h b/tools/sdk/esp32/include/log/include/esp_log_internal.h
index ee4b2ce5..732f949c 100644
--- a/tools/sdk/esp32/include/log/include/esp_log_internal.h
+++ b/tools/sdk/esp32/include/log/include/esp_log_internal.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef __ESP_LOG_INTERNAL_H__
 #define __ESP_LOG_INTERNAL_H__
diff --git a/tools/sdk/esp32/include/lwip/port/esp32/include/arch/cc.h b/tools/sdk/esp32/include/lwip/port/esp32/include/arch/cc.h
index 78935f3b..f17c4978 100644
--- a/tools/sdk/esp32/include/lwip/port/esp32/include/arch/cc.h
+++ b/tools/sdk/esp32/include/lwip/port/esp32/include/arch/cc.h
@@ -39,8 +39,13 @@
 #include <assert.h>
 #include <stdio.h>
 
+#include "sdkconfig.h"
 #include "arch/sys_arch.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifndef BYTE_ORDER
 #define BYTE_ORDER LITTLE_ENDIAN
 #endif // BYTE_ORDER
@@ -103,5 +108,8 @@ typedef int sys_prot_t;
 
 #endif /* NDEBUG */
 
+#ifdef __cplusplus
+}
+#endif
 
 #endif /* __ARCH_CC_H__ */
diff --git a/tools/sdk/esp32/include/lwip/port/esp32/include/lwip_default_hooks.h b/tools/sdk/esp32/include/lwip/port/esp32/include/lwip_default_hooks.h
index 4af3c658..3f3ec0b2 100644
--- a/tools/sdk/esp32/include/lwip/port/esp32/include/lwip_default_hooks.h
+++ b/tools/sdk/esp32/include/lwip/port/esp32/include/lwip_default_hooks.h
@@ -42,6 +42,12 @@ lwip_hook_ip6_route(const ip6_addr_t *src, const ip6_addr_t *dest);
 #define LWIP_HOOK_IP6_ROUTE lwip_hook_ip6_route
 #endif /* CONFIG_LWIP_HOOK_IP6_ROUTE... */
 
+#if defined(CONFIG_LWIP_HOOK_ND6_GET_GW_CUSTOM) || defined(CONFIG_LWIP_HOOK_ND6_GET_GW_DEFAULT)
+const ip6_addr_t *lwip_hook_nd6_get_gw(struct netif *netif, const ip6_addr_t *dest);
+
+#define LWIP_HOOK_ND6_GET_GW lwip_hook_nd6_get_gw
+#endif /* CONFIG_LWIP_HOOK_ND6_GET_GATEWAY... */
+
 #if defined(CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_CUSTOM) || defined(CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_DEFAULT)
 int lwip_hook_netconn_external_resolve(const char *name, ip_addr_t *addr, u8_t addrtype, err_t *err);
 
diff --git a/tools/sdk/esp32/include/lwip/port/esp32/include/lwipopts.h b/tools/sdk/esp32/include/lwip/port/esp32/include/lwipopts.h
index 52d2d99d..4d580951 100644
--- a/tools/sdk/esp32/include/lwip/port/esp32/include/lwipopts.h
+++ b/tools/sdk/esp32/include/lwip/port/esp32/include/lwipopts.h
@@ -249,6 +249,10 @@
  */
 #define DHCP_DOES_ARP_CHECK             CONFIG_LWIP_DHCP_DOES_ARP_CHECK
 
+/**
+ * LWIP_DHCP_DISABLE_CLIENT_ID==1: Do not add option 61 (client-id) to DHCP packets
+ */
+#define ESP_DHCP_DISABLE_CLIENT_ID      CONFIG_LWIP_DHCP_DISABLE_CLIENT_ID
 
 /**
  * CONFIG_LWIP_DHCP_RESTORE_LAST_IP==1: Last valid IP address obtained from DHCP server
@@ -453,6 +457,8 @@
  */
 #define LWIP_NETIF_API                      CONFIG_LWIP_NETIF_API
 
+#define LWIP_NETIF_STATUS_CALLBACK      CONFIG_LWIP_NETIF_STATUS_CALLBACK
+
 /*
    ------------------------------------
    ---------- LOOPIF options ----------
@@ -688,7 +694,7 @@
  * Some modems do not support IPV6 addressing in local link and
  * the only option available is to disable IPV6 address negotiation.
  */
-#define PPP_IPV6_SUPPORT				CONFIG_LWIP_PPP_ENABLE_IPV6
+#define PPP_IPV6_SUPPORT                               CONFIG_LWIP_PPP_ENABLE_IPV6
 
 /**
  * PPP_NOTIFY_PHASE==1: Support PPP notify phase.
@@ -957,6 +963,10 @@
  */
 #define LWIP_SOCKET_OFFSET              (FD_SETSIZE - CONFIG_LWIP_MAX_SOCKETS)
 
+#define LWIP_IPV6_FORWARD               CONFIG_LWIP_IPV6_FORWARD
+
+#define LWIP_IPV6_NUM_ADDRESSES         CONFIG_LWIP_IPV6_NUM_ADDRESSES
+
 /* Enable all Espressif-only options */
 
 #define ESP_LWIP                        1
diff --git a/tools/sdk/esp32/include/mbedtls/port/include/mbedtls/esp_config.h b/tools/sdk/esp32/include/mbedtls/port/include/mbedtls/esp_config.h
index 844d3f1e..1ff7ea4a 100644
--- a/tools/sdk/esp32/include/mbedtls/port/include/mbedtls/esp_config.h
+++ b/tools/sdk/esp32/include/mbedtls/port/include/mbedtls/esp_config.h
@@ -144,6 +144,15 @@
 #undef MBEDTLS_SHA512_ALT
 #endif
 
+/* MBEDTLS_MDx_ALT to enable ROM MD support
+   with software fallback.
+*/
+#ifdef CONFIG_MBEDTLS_ROM_MD5
+#define MBEDTLS_MD5_ALT
+#else
+#undef MBEDTLS_MD5_ALT
+#endif
+
 /* The following MPI (bignum) functions have ESP32 hardware support.
    For exponential mod, both software and hardware implementation
    will be compiled. If CONFIG_MBEDTLS_HARDWARE_MPI is enabled, mod APIs
@@ -2451,6 +2460,21 @@
 #undef MBEDTLS_THREADING_PTHREAD
 #endif
 
+/**
+ * \def MBEDTLS_NIST_KW_C
+ *
+ * Enable AES key wrapping as per NIST
+ *
+ * Requires: MBEDTLS_AES_C
+ *
+ * Uncomment this to enable aes key wrap.
+ */
+#ifdef CONFIG_MBEDTLS_NIST_KW_C
+#define MBEDTLS_NIST_KW_C
+#else
+#undef MBEDTLS_NIST_KW_C
+#endif
+
 /* \} name SECTION: Module configuration options */
 
 #if defined(TARGET_LIKE_MBED)
diff --git a/tools/sdk/esp32/include/mbedtls/port/include/md/esp_md.h b/tools/sdk/esp32/include/mbedtls/port/include/md/esp_md.h
new file mode 100644
index 00000000..e61b6c4e
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/port/include/md/esp_md.h
@@ -0,0 +1,154 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+
+#pragma once
+
+#include "esp_rom_md5.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct MD5Context mbedtls_md5_context;
+
+/**
+ * \brief          Initialize MD5 context
+ *
+ * \param ctx      MD5 context to be initialized
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int esp_md5_init_ret( mbedtls_md5_context *ctx );
+
+/**
+ * \brief          Clear MD5 context
+ *
+ * \param ctx      MD5 context to be cleared
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_free( mbedtls_md5_context *ctx );
+
+/**
+ * \brief          Clone (the state of) an MD5 context
+ *
+ * \param dst      The destination context
+ * \param src      The context to be cloned
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_clone( mbedtls_md5_context *dst, const mbedtls_md5_context *src );
+
+/**
+ * \brief          MD5 process buffer
+ *
+ * \param ctx      MD5 context
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int esp_md5_update_ret( mbedtls_md5_context *ctx, const unsigned char *input, size_t ilen );
+
+/**
+ * \brief          MD5 final digest
+ *
+ * \param ctx      MD5 context
+ * \param output   MD5 checksum result
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int esp_md5_finish_ret( mbedtls_md5_context *ctx, unsigned char output[16] );
+
+/**
+ * \brief          MD5 process data block (internal use only)
+ *
+ * \param ctx      MD5 context
+ * \param data     buffer holding one block of data
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int esp_md5_process( mbedtls_md5_context *ctx, const unsigned char data[64] );
+
+/**
+ * \brief          MD5 context setup
+ *
+ * \deprecated     Superseded by mbedtls_md5_starts_ret() in 2.7.0
+ *
+ * \param ctx      context to be initialized
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_init( mbedtls_md5_context *ctx );
+
+/**
+ * \brief          MD5 process buffer
+ *
+ * \deprecated     Superseded by mbedtls_md5_update_ret() in 2.7.0
+ *
+ * \param ctx      MD5 context
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_update( mbedtls_md5_context *ctx, const unsigned char *input, size_t ilen );
+
+/**
+ * \brief          MD5 final digest
+ *
+ * \deprecated     Superseded by mbedtls_md5_finish_ret() in 2.7.0
+ *
+ * \param ctx      MD5 context
+ * \param output   MD5 checksum result
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_finish( mbedtls_md5_context *ctx, unsigned char output[16] );
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/mbedtls/port/include/md5_alt.h b/tools/sdk/esp32/include/mbedtls/port/include/md5_alt.h
new file mode 100644
index 00000000..4777d047
--- /dev/null
+++ b/tools/sdk/esp32/include/mbedtls/port/include/md5_alt.h
@@ -0,0 +1,50 @@
+/**
+ * \file md5_alt.h
+ *
+ * \brief MD5 block cipher
+ *
+ *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *
+ */
+#ifndef MD5_ALT_H
+#define MD5_ALT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(MBEDTLS_MD5_ALT)
+#include "md/esp_md.h"
+
+#define mbedtls_md5_init                        esp_md5_init
+#define mbedtls_md5_update                      esp_md5_update
+#define mbedtls_md5_finish                      esp_md5_finish
+#define mbedtls_md5_starts_ret                  esp_md5_init_ret
+#define mbedtls_md5_update_ret                  esp_md5_update_ret
+#define mbedtls_md5_finish_ret                  esp_md5_finish_ret
+
+#define mbedtls_md5_free                        esp_md5_free
+#define mbedtls_md5_clone                       esp_md5_clone
+#define mbedtls_internal_md5_process            esp_md5_process
+
+#endif /* MBEDTLS_MD5_ALT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32/include/newlib/platform_include/sys/dirent.h b/tools/sdk/esp32/include/newlib/platform_include/sys/dirent.h
index 97e4bfed..4626ae14 100644
--- a/tools/sdk/esp32/include/newlib/platform_include/sys/dirent.h
+++ b/tools/sdk/esp32/include/newlib/platform_include/sys/dirent.h
@@ -42,7 +42,12 @@ struct dirent {
 #define DT_UNKNOWN  0
 #define DT_REG      1
 #define DT_DIR      2
-    char d_name[256];   /*!< zero-terminated file name */
+#if __BSD_VISIBLE
+#define MAXNAMLEN 255
+    char d_name[MAXNAMLEN+1];   /*!< zero-terminated file name */
+#else
+    char d_name[256];
+#endif
 };
 
 DIR* opendir(const char* name);
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/cpu_caps.h b/tools/sdk/esp32/include/soc/esp32/include/soc/flash_encryption_reg.h
similarity index 60%
rename from tools/sdk/esp32c3/include/soc/esp32c3/include/soc/cpu_caps.h
rename to tools/sdk/esp32/include/soc/esp32/include/soc/flash_encryption_reg.h
index 2d8a80bc..6af14aa5 100644
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/cpu_caps.h
+++ b/tools/sdk/esp32/include/soc/esp32/include/soc/flash_encryption_reg.h
@@ -1,4 +1,4 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
 //
 // Licensed under the Apache License, Version 2.0 (the "License");
 // you may not use this file except in compliance with the License.
@@ -12,10 +12,9 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#pragma once
+#include "soc.h"
 
-#define SOC_CPU_BREAKPOINTS_NUM         8
-#define SOC_CPU_WATCHPOINTS_NUM         8
-#define SOC_CPU_HAS_FLEXIBLE_INTC       1
-
-#define SOC_CPU_WATCHPOINT_SIZE         0x80000000 // bytes
+#define FLASH_ENCRYPTION_BUFFER_REG   (PERIPHS_SPI_ENCRYPT_BASEADDR)
+#define FLASH_ENCRYPTION_START_REG    (PERIPHS_SPI_ENCRYPT_BASEADDR + 0x20)
+#define FLASH_ENCRYPTION_ADDRESS_REG  (PERIPHS_SPI_ENCRYPT_BASEADDR + 0x24)
+#define FLASH_ENCRYPTION_DONE_REG     (PERIPHS_SPI_ENCRYPT_BASEADDR + 0x28)
diff --git a/tools/sdk/esp32/include/soc/esp32/include/soc/soc_caps.h b/tools/sdk/esp32/include/soc/esp32/include/soc/soc_caps.h
index 488acd83..4fd86327 100644
--- a/tools/sdk/esp32/include/soc/esp32/include/soc/soc_caps.h
+++ b/tools/sdk/esp32/include/soc/esp32/include/soc/soc_caps.h
@@ -165,7 +165,7 @@
 /*-------------------------- MPU CAPS ----------------------------------------*/
 //TODO: correct the caller and remove unsupported lines
 #define SOC_MPU_CONFIGURABLE_REGIONS_SUPPORTED    0
-#define SOC_MPU_MIN_REGION_SIZE                   0x20000000
+#define SOC_MPU_MIN_REGION_SIZE                   0x20000000U
 #define SOC_MPU_REGIONS_MAX_NUM                   8
 #define SOC_MPU_REGION_RO_SUPPORTED               0
 #define SOC_MPU_REGION_WO_SUPPORTED               0
@@ -224,25 +224,14 @@
 
 /*-------------------------- TWAI CAPS ---------------------------------------*/
 #define SOC_TWAI_BRP_MIN                        2
-#define SOC_TWAI_SUPPORT_MULTI_ADDRESS_LAYOUT   1
-
-#define SOC_TWAI_BRP_MAX_ECO0               128
-//Any even number from 2 to 128
-#define SOC_TWAI_BRP_IS_VALID_ECO0(brp)     ((brp) >= 2 && (brp) <= 128 && ((brp) & 0x1) == 0)
-
-#define SOC_TWAI_BRP_MAX_ECO                256
-//Any even number from 2 to 128, or multiples of 4 from 132 to 256
-#define SOC_TWAI_BRP_IS_VALID_ECO(brp)      (((brp) >= 2 && (brp) <= 128 && ((brp) & 0x1) == 0) || ((brp) >= 132 && (brp) <= 256 && ((brp) & 0x3) == 0))
-
 #if SOC_CAPS_ECO_VER >= 2
+#  define SOC_TWAI_BRP_MAX              256
 #  define SOC_TWAI_BRP_DIV_SUPPORTED    1
 #  define SOC_TWAI_BRP_DIV_THRESH       128
-#  define SOC_TWAI_BRP_IS_VALID         SOC_TWAI_BRP_IS_VALID_ECO
-#  define SOC_TWAI_BRP_MAX              SOC_TWAI_BRP_MAX_ECO
 #else
-#  define SOC_TWAI_BRP_IS_VALID         SOC_TWAI_BRP_IS_VALID_ECO0
-#  define SOC_TWAI_BRP_MAX              SOC_TWAI_BRP_MAX_ECO0
+#  define SOC_TWAI_BRP_MAX              128
 #endif
+#define SOC_TWAI_SUPPORT_MULTI_ADDRESS_LAYOUT   1
 
 /*-------------------------- UART CAPS ---------------------------------------*/
 // ESP32 have 3 UART.
@@ -275,6 +264,9 @@
 #define SOC_AES_SUPPORT_AES_192 (1)
 #define SOC_AES_SUPPORT_AES_256 (1)
 
+/*-------------------------- Flash Encryption CAPS----------------------------*/
+#define SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX   (32)
+
 /*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
 #define SOC_PHY_DIG_REGS_MEM_SIZE       (21*4)
 
@@ -285,5 +277,8 @@
 #define SOC_CAN_SUPPORTED                   SOC_TWAI_SUPPORTED
 #define CAN_BRP_MIN                         SOC_TWAI_BRP_MIN
 #define CAN_BRP_MAX                         SOC_TWAI_BRP_MAX
-#define CAN_BRP_DIV_THRESH                  SOC_TWAI_BRP_DIV_THRESH
 #define CAN_SUPPORT_MULTI_ADDRESS_LAYOUT    SOC_TWAI_SUPPORT_MULTI_ADDRESS_LAYOUT
+#if SOC_CAPS_ECO_VER >= 2
+#  define CAN_BRP_DIV_SUPPORTED             SOC_TWAI_BRP_DIV_SUPPORTED
+#  define CAN_BRP_DIV_THRESH                SOC_TWAI_BRP_DIV_THRESH
+#endif
diff --git a/tools/sdk/esp32/include/soc/include/soc/gdma_periph.h b/tools/sdk/esp32/include/soc/include/soc/gdma_periph.h
index 2ccba244..4cc9cb17 100644
--- a/tools/sdk/esp32/include/soc/include/soc/gdma_periph.h
+++ b/tools/sdk/esp32/include/soc/include/soc/gdma_periph.h
@@ -25,7 +25,8 @@ typedef struct {
     struct {
         const periph_module_t module;
         struct {
-            const int irq_id;
+            const int rx_irq_id;
+            const int tx_irq_id;
         } pairs[SOC_GDMA_PAIRS_PER_GROUP];
     } groups[SOC_GDMA_GROUPS];
 } gdma_signal_conn_t;
diff --git a/tools/sdk/esp32/include/soc/include/soc/lcd_periph.h b/tools/sdk/esp32/include/soc/include/soc/lcd_periph.h
index fd56a06f..6b1071b3 100644
--- a/tools/sdk/esp32/include/soc/include/soc/lcd_periph.h
+++ b/tools/sdk/esp32/include/soc/include/soc/lcd_periph.h
@@ -25,7 +25,7 @@ typedef struct {
     struct {
         const periph_module_t module;
         const int irq_id;
-        const int data_sigs[SOC_LCD_MAX_DATA_WIDTH];
+        const int data_sigs[SOC_LCD_I80_BUS_WIDTH];
         const int cs_sig;
         const int dc_sig;
         const int wr_sig;
@@ -33,7 +33,7 @@ typedef struct {
     struct {
         const periph_module_t module;
         const int irq_id;
-        const int data_sigs[SOC_LCD_MAX_DATA_WIDTH];
+        const int data_sigs[SOC_LCD_RGB_DATA_WIDTH];
         const int hsync_sig;
         const int vsync_sig;
         const int pclk_sig;
diff --git a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/usb_periph.h b/tools/sdk/esp32/include/soc/include/soc/usb_periph.h
similarity index 100%
rename from tools/sdk/esp32s2/include/soc/esp32s2/include/soc/usb_periph.h
rename to tools/sdk/esp32/include/soc/include/soc/usb_periph.h
diff --git a/tools/sdk/esp32/include/spi_flash/include/esp_partition.h b/tools/sdk/esp32/include/spi_flash/include/esp_partition.h
index 24c1d3df..e59babb4 100644
--- a/tools/sdk/esp32/include/spi_flash/include/esp_partition.h
+++ b/tools/sdk/esp32/include/spi_flash/include/esp_partition.h
@@ -45,6 +45,8 @@ extern "C" {
 typedef enum {
     ESP_PARTITION_TYPE_APP = 0x00,       //!< Application partition type
     ESP_PARTITION_TYPE_DATA = 0x01,      //!< Data partition type
+
+    ESP_PARTITION_TYPE_ANY = 0xff,       //!< Used to search for partitions with any type
 } esp_partition_type_t;
 
 /**
@@ -123,7 +125,9 @@ typedef struct {
 /**
  * @brief Find partition based on one or more parameters
  *
- * @param type Partition type, one of esp_partition_type_t values or an 8-bit unsigned integer
+ * @param type Partition type, one of esp_partition_type_t values or an 8-bit unsigned integer.
+ *             To find all partitions, no matter the type, use ESP_PARTITION_TYPE_ANY, and set
+ *             subtype argument to ESP_PARTITION_SUBTYPE_ANY.
  * @param subtype Partition subtype, one of esp_partition_subtype_t values or an 8-bit unsigned integer.
  *                To find all partitions of given type, use ESP_PARTITION_SUBTYPE_ANY.
  * @param label (optional) Partition label. Set this value if looking
@@ -139,7 +143,9 @@ esp_partition_iterator_t esp_partition_find(esp_partition_type_t type, esp_parti
 /**
  * @brief Find first partition based on one or more parameters
  *
- * @param type Partition type, one of esp_partition_type_t values or an 8-bit unsigned integer
+ * @param type Partition type, one of esp_partition_type_t values or an 8-bit unsigned integer.
+ *             To find all partitions, no matter the type, use ESP_PARTITION_TYPE_ANY, and set
+ *             subtype argument to ESP_PARTITION_SUBTYPE_ANY.
  * @param subtype Partition subtype, one of esp_partition_subtype_t values or an 8-bit unsigned integer
  *                To find all partitions of given type, use ESP_PARTITION_SUBTYPE_ANY.
  * @param label (optional) Partition label. Set this value if looking
diff --git a/tools/sdk/esp32/include/spi_flash/include/spi_flash/spi_flash_defs.h b/tools/sdk/esp32/include/spi_flash/include/spi_flash/spi_flash_defs.h
new file mode 100644
index 00000000..cf26fda1
--- /dev/null
+++ b/tools/sdk/esp32/include/spi_flash/include/spi_flash/spi_flash_defs.h
@@ -0,0 +1,70 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+/* SPI commands (actual on-wire commands not SPI controller bitmasks)
+   Suitable for use with spi_flash_hal_common_command static function.
+*/
+#define CMD_RDID       0x9F
+#define CMD_RDUID      0x4B   /* Read the flash unique ID*/
+#define CMD_WRSR       0x01
+#define  SR_WIP         (1<<0) /* Status register write-in-progress bit */
+#define  SR_WREN        (1<<1) /* Status register write enable bit */
+#define CMD_WRSR2      0x31 /* Not all SPI flash uses this command */
+#define CMD_WREN       0x06
+#define CMD_WRDI       0x04
+#define CMD_RDSR       0x05
+#define CMD_RDSR2      0x35 /* Not all SPI flash uses this command */
+#define CMD_RDSCUR     0x2B /* on specific(MXIC) board, read security register */
+#define CMD_RDFR       0x48 /* on specific(ISSI) board, read function register */
+
+#define CMD_FASTRD_QIO      0xEB
+#define CMD_FASTRD_QIO_4B   0xEC
+#define CMD_FASTRD_QUAD     0x6B
+#define CMD_FASTRD_QUAD_4B  0x6C
+#define CMD_FASTRD_DIO      0xBB
+#define CMD_FASTRD_DIO_4B   0xBC
+#define CMD_FASTRD_DUAL     0x3B
+#define CMD_FASTRD_DUAL_4B  0x3C
+#define CMD_FASTRD          0x0B
+#define CMD_FASTRD_4B       0x0C
+#define CMD_READ            0x03 /* Speed limited */
+#define CMD_READ_4B         0x13 /* Speed limited */
+
+#define CMD_CHIP_ERASE          0xC7
+#define CMD_SECTOR_ERASE        0x20
+#define CMD_SECTOR_ERASE_4B     0x21
+#define CMD_LARGE_BLOCK_ERASE   0xD8 /* 64KB block erase command */
+#define CMD_LARGE_BLOCK_ERASE_4B 0xDC /* 64KB block erase command */
+#define CMD_PROGRAM_PAGE        0x02
+#define CMD_PROGRAM_PAGE_4B     0x12
+#define CMD_SUSPEND             0x75
+#define CMD_RESUME              0x7A
+
+#define CMD_RST_EN      0x66
+#define CMD_RST_DEV     0x99
+
+#define SPI_FLASH_DIO_ADDR_BITLEN       24
+#define SPI_FLASH_DIO_DUMMY_BITLEN      4
+#define SPI_FLASH_QIO_ADDR_BITLEN       24
+#define SPI_FLASH_QIO_DUMMY_BITLEN      6
+#define SPI_FLASH_QOUT_ADDR_BITLEN      24
+#define SPI_FLASH_QOUT_DUMMY_BITLEN     8
+#define SPI_FLASH_DOUT_ADDR_BITLEN      24
+#define SPI_FLASH_DOUT_DUMMY_BITLEN     8
+#define SPI_FLASH_FASTRD_ADDR_BITLEN    24
+#define SPI_FLASH_FASTRD_DUMMY_BITLEN   8
+#define SPI_FLASH_SLOWRD_ADDR_BITLEN    24
+#define SPI_FLASH_SLOWRD_DUMMY_BITLEN   0
diff --git a/tools/sdk/esp32/include/ulp/include/esp32/ulp.h b/tools/sdk/esp32/include/ulp/include/esp32/ulp.h
index a3fc455f..e5d673a2 100644
--- a/tools/sdk/esp32/include/ulp/include/esp32/ulp.h
+++ b/tools/sdk/esp32/include/ulp/include/esp32/ulp.h
@@ -464,10 +464,11 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) {
  * reg_addr register and offset_ field (this offset is expressed in 32-bit words).
  * 32 bits written to RTC memory are built as follows:
  * - bits [31:21] hold the PC of current instruction, expressed in 32-bit words
- * - bits [20:16] = 5'b1
+ * - bits [20:18] = 3'b0
+ * - bits [17:16] reg_addr (0..3)
  * - bits [15:0] are assigned the contents of reg_val
  *
- * RTC_SLOW_MEM[addr + offset_] = { 5'b0, insn_PC[10:0], val[15:0] }
+ * RTC_SLOW_MEM[addr + offset_] = { insn_PC[10:0], 3'b0, reg_addr, reg_val[15:0] }
  */
 #define I_ST(reg_val, reg_addr, offset_) { .st = { \
     .dreg = reg_val, \
diff --git a/tools/sdk/esp32/include/ulp/include/esp32s2/ulp.h b/tools/sdk/esp32/include/ulp/include/esp32s2/ulp.h
index 07ae895e..04d38c45 100644
--- a/tools/sdk/esp32/include/ulp/include/esp32s2/ulp.h
+++ b/tools/sdk/esp32/include/ulp/include/esp32s2/ulp.h
@@ -430,10 +430,11 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) {
  * reg_addr register and offset_ field (this offset is expressed in 32-bit words).
  * 32 bits written to RTC memory are built as follows:
  * - bits [31:21] hold the PC of current instruction, expressed in 32-bit words
- * - bits [20:16] = 5'b1
+ * - bits [20:18] = 3'b0
+ * - bits [17:16] reg_addr (0..3)
  * - bits [15:0] are assigned the contents of reg_val
  *
- * RTC_SLOW_MEM[addr + offset_] = { 5'b0, insn_PC[10:0], val[15:0] }
+ * RTC_SLOW_MEM[addr + offset_] = { insn_PC[10:0], 3'b0, reg_addr, reg_val[15:0] }
  */
 #define I_ST(reg_val, reg_addr, offset_) { .st = { \
     .dreg = reg_val, \
diff --git a/tools/sdk/esp32/include/unity/include/unity_config.h b/tools/sdk/esp32/include/unity/include/unity_config.h
index 8ebd88f2..32f97190 100644
--- a/tools/sdk/esp32/include/unity/include/unity_config.h
+++ b/tools/sdk/esp32/include/unity/include/unity_config.h
@@ -21,13 +21,16 @@
 #define UNITY_EXCLUDE_DOUBLE
 #endif //CONFIG_UNITY_ENABLE_DOUBLE
 
+#ifdef CONFIG_UNITY_ENABLE_64BIT
+#define UNITY_SUPPORT_64
+#endif
+
 #ifdef CONFIG_UNITY_ENABLE_COLOR
 #define UNITY_OUTPUT_COLOR
 #endif
 
 #define UNITY_EXCLUDE_TIME_H
 
-
 void unity_flush(void);
 void unity_putc(int c);
 void unity_gets(char* dst, size_t len);
diff --git a/tools/sdk/esp32/include/unity/include/unity_fixture_extras.h b/tools/sdk/esp32/include/unity/include/unity_fixture_extras.h
index 2eeaec2e..c6ad8ba4 100644
--- a/tools/sdk/esp32/include/unity/include/unity_fixture_extras.h
+++ b/tools/sdk/esp32/include/unity/include/unity_fixture_extras.h
@@ -1,25 +1,78 @@
-/* IDF-specific additions to "Unity Fixture" */
+// Copyright 2016-2021 Espressif Systems (Shanghai) Co. Ltd.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/* IDF-specific additions to "Unity Fixture".
+ * This file doesn't need to be included directly, it gets included into unity.h
+ * through unity_config.h.
+ */
+
 #pragma once
 
-#ifndef CONFIG_IDF_TARGET
+#include "sdkconfig.h"
 
-/* A shorthand for running one test group from the main function */
-#define UNITY_MAIN(group_) do { \
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(CONFIG_IDF_TARGET) || defined(CONFIG_IDF_TARGET_LINUX)
+#define UNITY_MAYBE_EXIT(rc)  do { exit(rc); } while(0)
+#else
+#define UNITY_MAYBE_EXIT(rc)  do { (void) rc; } while(0)
+#endif
+
+/* A shorthand for running all tests called from one function "func_", from the app_main function.
+ * Use this when there is more than one test group.
+ *
+ * Example:
+ *
+ *    #include "unity.h"
+ *    #include "unity_fixture.h"
+ *
+ *    static_void run_all_tests(void) {
+ *        RUN_TEST_GROUP(group1);   // test group defined in another file, e.g. test_group1.c
+ *        RUN_TEST_GROUP(group2);   // test group defined in another file, e.g. test_group2.c
+ *    }
+ *
+ *    void app_main(void) {
+ *        UNITY_MAIN_FUNC(run_all_tests);
+ *    }
+ */
+#define UNITY_MAIN_FUNC(func_) do { \
     const char* argv[] = { "test", "-v" }; \
     const int argc = sizeof(argv)/sizeof(argv[0]); \
-    int rc = UnityMain(argc, argv, TEST_ ## group_ ## _GROUP_RUNNER); \
+    int rc = UnityMain(argc, argv, func_); \
     printf("\nTests finished, rc=%d\n", rc); \
-    exit(rc); \
+    UNITY_MAYBE_EXIT(rc); \
 } while(0)
 
-#else // CONFIG_IDF_TARGET
+/* A shorthand for running one test group from the app_main function, when there is only
+ * one test group and it is defined in the same file.
+ *
+ * Example:
+ *
+ *    #include "unity.h"
+ *    #include "unity_fixture.h"
+ *
+ *    TEST_GROUP(my_feature);
+ *    // also define TEST_SETUP, TEST_TEARDOWN, TESTs, TEST_GROUP_RUNNER
+ *
+ *    void app_main(void) {
+ *        UNITY_MAIN(my_feature);
+ *    }
+ */
+#define UNITY_MAIN(group_) UNITY_MAIN_FUNC(TEST_ ## group_ ## _GROUP_RUNNER)
 
-/* A shorthand for running one test group from the main function */
-#define UNITY_MAIN(group_) do { \
-    const char* argv[] = { "test", "-v" }; \
-    const int argc = sizeof(argv)/sizeof(argv[0]); \
-    int rc = UnityMain(argc, argv, TEST_ ## group_ ## _GROUP_RUNNER); \
-    printf("\nTests finished, rc=%d\n", rc); \
-} while(0)
-
-#endif // CONFIG_IDF_TARGET
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/vfs/include/esp_vfs.h b/tools/sdk/esp32/include/vfs/include/esp_vfs.h
index ddbabd97..7ba63645 100644
--- a/tools/sdk/esp32/include/vfs/include/esp_vfs.h
+++ b/tools/sdk/esp32/include/vfs/include/esp_vfs.h
@@ -325,6 +325,15 @@ esp_err_t esp_vfs_register_with_id(const esp_vfs_t *vfs, void *ctx, esp_vfs_id_t
  */
 esp_err_t esp_vfs_unregister(const char* base_path);
 
+/**
+ * Unregister a virtual filesystem with the given index
+ *
+ * @param vfs_id  The VFS ID returned by esp_vfs_register_with_id
+ * @return ESP_OK if successful, ESP_ERR_INVALID_STATE if VFS for the given index
+ *         hasn't been registered
+ */
+esp_err_t esp_vfs_unregister_with_id(esp_vfs_id_t vfs_id);
+
 /**
  * Special function for registering another file descriptor for a VFS registered
  * by esp_vfs_register_with_id.
@@ -338,6 +347,21 @@ esp_err_t esp_vfs_unregister(const char* base_path);
  */
 esp_err_t esp_vfs_register_fd(esp_vfs_id_t vfs_id, int *fd);
 
+/**
+ * Special function for registering another file descriptor with given local_fd
+ * for a VFS registered by esp_vfs_register_with_id.
+ *
+ * @param vfs_id VFS identificator returned by esp_vfs_register_with_id.
+ * @param local_fd The fd in the local vfs. Passing -1 will set the local fd as the (*fd) value.
+ * @param permanent Whether the fd should be treated as permannet (not removed after close())
+ * @param fd The registered file descriptor will be written to this address.
+ *
+ * @return  ESP_OK if the registration is successful,
+ *          ESP_ERR_NO_MEM if too many file descriptors are registered,
+ *          ESP_ERR_INVALID_ARG if the arguments are incorrect.
+ */
+esp_err_t esp_vfs_register_fd_with_local_fd(esp_vfs_id_t vfs_id, int local_fd, bool permanent, int *fd);
+
 /**
  * Special function for unregistering a file descriptor belonging to a VFS
  * registered by esp_vfs_register_with_id.
diff --git a/tools/sdk/esp32/include/vfs/include/esp_vfs_eventfd.h b/tools/sdk/esp32/include/vfs/include/esp_vfs_eventfd.h
new file mode 100644
index 00000000..43011211
--- /dev/null
+++ b/tools/sdk/esp32/include/vfs/include/esp_vfs_eventfd.h
@@ -0,0 +1,71 @@
+// Copyright 2021 Espressif Systems (Shanghai) CO LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+
+#pragma once
+
+#include <stddef.h>
+#include <sys/types.h>
+
+#include "esp_err.h"
+
+#define EFD_SUPPORT_ISR (1 << 4)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Eventfd vfs initialization settings
+ */
+typedef struct {
+    size_t max_fds;     /*!< The maxinum number of eventfds supported */
+} esp_vfs_eventfd_config_t;
+
+#define ESP_VFS_EVENTD_CONFIG_DEFAULT() (esp_vfs_eventfd_config_t) { \
+      .max_fds = 5, \
+};
+
+/**
+ * @brief  Registers the event vfs.
+ *
+ * @return  ESP_OK if successful, ESP_ERR_NO_MEM if too many VFSes are
+ *          registered.
+ */
+esp_err_t esp_vfs_eventfd_register(const esp_vfs_eventfd_config_t *config);
+
+/**
+ * @brief  Unregisters the event vfs.
+ *
+ * @return ESP_OK if successful, ESP_ERR_INVALID_STATE if VFS for given prefix
+ *         hasn't been registered
+ */
+esp_err_t esp_vfs_eventfd_unregister(void);
+
+/*
+ * @brief Creates an event file descirptor.
+ *
+ * The behavior of read, write and select is the same as man(2) eventfd with
+ * EFD_SEMAPHORE **NOT** specified. A new flag EFD_SUPPORT_ISR has been added.
+ * This flag is required to write to event fds in interrupt handlers. Accessing
+ * the control blocks of event fds with EFD_SUPPORT_ISR will cause interrupts to
+ * be temporarily blocked (e.g. during read, write and beginning and ending of
+ * the * select).
+ *
+ * @return The file descriptor if successful, -1 if error happens.
+ */
+int eventfd(unsigned int initval, int flags);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/vfs/include/esp_vfs_usb_serial_jtag.h b/tools/sdk/esp32/include/vfs/include/esp_vfs_usb_serial_jtag.h
new file mode 100644
index 00000000..54ff1f4e
--- /dev/null
+++ b/tools/sdk/esp32/include/vfs/include/esp_vfs_usb_serial_jtag.h
@@ -0,0 +1,66 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_err.h"
+#include "esp_vfs.h"
+#include "esp_vfs_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief add /dev/usbserjtag virtual filesystem driver
+ *
+ * This function is called from startup code to enable console output
+ */
+esp_err_t esp_vfs_dev_usb_serial_jtag_register(void);
+
+/**
+ * @brief Set the line endings expected to be received
+ *
+ * This specifies the conversion between line endings received and
+ * newlines ('\n', LF) passed into stdin:
+ *
+ * - ESP_LINE_ENDINGS_CRLF: convert CRLF to LF
+ * - ESP_LINE_ENDINGS_CR: convert CR to LF
+ * - ESP_LINE_ENDINGS_LF: no modification
+ *
+ * @note this function is not thread safe w.r.t. reading
+ *
+ * @param mode line endings expected
+ */
+void esp_vfs_dev_usb_serial_jtag_set_rx_line_endings(esp_line_endings_t mode);
+
+/**
+ * @brief Set the line endings to sent
+ *
+ * This specifies the conversion between newlines ('\n', LF) on stdout and line
+ * endings sent:
+ *
+ * - ESP_LINE_ENDINGS_CRLF: convert LF to CRLF
+ * - ESP_LINE_ENDINGS_CR: convert LF to CR
+ * - ESP_LINE_ENDINGS_LF: no modification
+ *
+ * @note this function is not thread safe w.r.t. writing
+ *
+ * @param mode line endings to send
+ */
+void esp_vfs_dev_usb_serial_jtag_set_tx_line_endings(esp_line_endings_t mode);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32/include/wpa_supplicant/port/include/os.h b/tools/sdk/esp32/include/wpa_supplicant/port/include/os.h
index 66eea39d..74e1e349 100644
--- a/tools/sdk/esp32/include/wpa_supplicant/port/include/os.h
+++ b/tools/sdk/esp32/include/wpa_supplicant/port/include/os.h
@@ -19,6 +19,7 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include "esp_err.h"
+#include "supplicant_opt.h"
 
 typedef time_t os_time_t;
 
@@ -308,4 +309,27 @@ static inline void * os_realloc_array(void *ptr, size_t nmemb, size_t size)
 		return NULL;
 	return os_realloc(ptr, nmemb * size);
 }
+
+#ifdef USE_MBEDTLS_CRYPTO
+void forced_memzero(void *ptr, size_t len);
+#else
+/* Try to prevent most compilers from optimizing out clearing of memory that
+ * becomes unaccessible after this function is called. This is mostly the case
+ * for clearing local stack variables at the end of a function. This is not
+ * exactly perfect, i.e., someone could come up with a compiler that figures out
+ * the pointer is pointing to memset and then end up optimizing the call out, so
+ * try go a bit further by storing the first octet (now zero) to make this even
+ * a bit more difficult to optimize out. Once memset_s() is available, that
+ * could be used here instead. */
+static void * (* const volatile memset_func)(void *, int, size_t) = memset;
+static uint8_t forced_memzero_val;
+
+static inline void forced_memzero(void *ptr, size_t len)
+{
+	memset_func(ptr, 0, len);
+	if (len) {
+		forced_memzero_val = ((uint8_t *) ptr)[0];
+	}
+}
+#endif
 #endif /* OS_H */
diff --git a/tools/sdk/esp32/include/xtensa/include/xtensa/xtensa_api.h b/tools/sdk/esp32/include/xtensa/include/xtensa/xtensa_api.h
index 95501936..deef36f7 100644
--- a/tools/sdk/esp32/include/xtensa/include/xtensa/xtensa_api.h
+++ b/tools/sdk/esp32/include/xtensa/include/xtensa/xtensa_api.h
@@ -136,45 +136,4 @@ extern void * xt_get_interrupt_handler_arg(int n);
 */
 bool xt_int_has_handler(int intr, int cpu);
 
-/*
--------------------------------------------------------------------------------
-  Call this function to disable non iram located interrupts.
-
-    newmask       - mask containing the interrupts to disable.
--------------------------------------------------------------------------------
-*/
-static inline uint32_t xt_int_disable_mask(uint32_t newmask)
-{
-    uint32_t oldint;
-    asm volatile (
-        "movi %0,0\n"
-        "xsr %0,INTENABLE\n"    //disable all ints first
-        "rsync\n"
-        "and a3,%0,%1\n"        //mask ints that need disabling
-        "wsr a3,INTENABLE\n"    //write back
-        "rsync\n"
-        :"=&r"(oldint):"r"(newmask):"a3");
-
-    return oldint;
-}
-
-/*
--------------------------------------------------------------------------------
-  Call this function to enable non iram located interrupts.
-
-    newmask       - mask containing the interrupts to enable.
--------------------------------------------------------------------------------
-*/
-static inline void xt_int_enable_mask(uint32_t newmask)
-{
-    asm volatile (
-        "movi a3,0\n"
-        "xsr a3,INTENABLE\n"
-        "rsync\n"
-        "or a3,a3,%0\n"
-        "wsr a3,INTENABLE\n"
-        "rsync\n"
-        ::"r"(newmask):"a3");
-}
-
 #endif /* __XTENSA_API_H__ */
diff --git a/tools/sdk/esp32/ld/esp32.ld b/tools/sdk/esp32/ld/esp32.ld
index 22544af7..ffde6639 100644
--- a/tools/sdk/esp32/ld/esp32.ld
+++ b/tools/sdk/esp32/ld/esp32.ld
@@ -134,3 +134,12 @@ REGION_ALIAS("rtc_data_location", rtc_data_seg );
 #else
   REGION_ALIAS("default_rodata_seg", dram0_0_seg);
 #endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
+
+/**
+ *  If rodata default segment is placed in `drom0_0_seg`, then flash's first rodata section must
+ *  also be first in the segment.
+ */
+#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
+  ASSERT(_rodata_start == ORIGIN(default_rodata_seg),
+         ".flash.appdesc section must be placed at the beginning of the rodata segment.")
+#endif
diff --git a/tools/sdk/esp32/ld/esp32.project.ld b/tools/sdk/esp32/ld/esp32.project.ld
index c2e369ef..93f8b5e7 100644
--- a/tools/sdk/esp32/ld/esp32.project.ld
+++ b/tools/sdk/esp32/ld/esp32.project.ld
@@ -315,6 +315,7 @@ SECTIONS
     *libesp_ringbuf.a:(.literal .literal.* .text .text.*)
     *libesp_system.a:esp_err.*(.literal .literal.* .text .text.*)
     *libesp_system.a:esp_system.*(.literal.esp_system_abort .text.esp_system_abort)
+    *libesp_system.a:ubsan.*(.literal .literal.* .text .text.*)
     *libfreertos.a:(EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal.* EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text.*)
     *libfreertos.a:port.*(.literal.pxPortInitialiseStack .literal.unlikely.vPortEndScheduler .literal.vApplicationStackOverflowHook .literal.vPortAssertIfInISR .literal.vPortEnterCritical .literal.vPortExitCritical .literal.vPortReleaseTaskMPUSettings .literal.vPortSetStackWatchpoint .literal.vPortYieldOtherCore .literal.xPortInIsrContext .literal.xPortStartScheduler .literal.xPortSysTickHandler .text .text.pxPortInitialiseStack .text.unlikely.vPortEndScheduler .text.vApplicationStackOverflowHook .text.vPortAssertIfInISR .text.vPortEnterCritical .text.vPortExitCritical .text.vPortReleaseTaskMPUSettings .text.vPortSetStackWatchpoint .text.vPortStoreTaskMPUSettings .text.vPortYieldOtherCore .text.xPortGetTickRateHz .text.xPortInIsrContext .text.xPortStartScheduler .text.xPortSysTickHandler)
     *libfreertos.a:port_common.*(.literal.esp_startup_start_app_common .text .text.esp_startup_start_app_common)
@@ -324,6 +325,7 @@ SECTIONS
     *libhal.a:i2c_hal_iram.*(.literal .literal.* .text .text.*)
     *libhal.a:ledc_hal_iram.*(.literal .literal.* .text .text.*)
     *libhal.a:soc_hal.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*)
     *libhal.a:spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
     *libhal.a:spi_hal_iram.*(.literal .literal.* .text .text.*)
     *libhal.a:spi_slave_hal_iram.*(.literal .literal.* .text .text.*)
@@ -351,6 +353,7 @@ SECTIONS
     *libspi_flash.a:spi_flash_rom_patch.*(.literal .literal.* .text .text.*)
     *libxt_hal.a:(.literal .literal.* .text .text.*)
     *libxtensa.a:eri.*(.literal .literal.* .text .text.*)
+    *libxtensa.a:xtensa_intr_asm.*(.literal .literal.* .text .text.*)
 
   } > iram0_0_seg
 
@@ -513,11 +516,13 @@ SECTIONS
     *libc.a:lock.*(.rodata .rodata.*)
     *libesp_hw_support.a:rtc_clk.*(.rodata .rodata.*)
     *libesp_system.a:esp_err.*(.rodata .rodata.*)
+    *libesp_system.a:ubsan.*(.rodata .rodata.*)
     *libgcov.a:(.rodata .rodata.*)
     *libhal.a:cpu_hal.*(.rodata .rodata.*)
     *libhal.a:i2c_hal_iram.*(.rodata .rodata.*)
     *libhal.a:ledc_hal_iram.*(.rodata .rodata.*)
     *libhal.a:soc_hal.*(.rodata .rodata.*)
+    *libhal.a:spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
     *libhal.a:spi_flash_hal_iram.*(.rodata .rodata.*)
     *libhal.a:spi_hal_iram.*(.rodata .rodata.*)
     *libhal.a:spi_slave_hal_iram.*(.rodata .rodata.*)
@@ -577,8 +582,8 @@ SECTIONS
     _bss_start = ABSOLUTE(.);
 
     *(.bss .bss.*)
-    *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
     *(.ext_ram.bss .ext_ram.bss.*)
+    *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
     *(COMMON)
     _bt_bss_start = ABSOLUTE(.);
     *libbt.a:(.bss .bss.* COMMON)
@@ -600,15 +605,24 @@ SECTIONS
   ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
           "DRAM segment data does not fit.")
 
-  /* When modifying the alignment, update tls_section_alignment in pxPortInitialiseStack */
-  .flash.rodata : ALIGN(0x10)
+  .flash.appdesc : ALIGN(0x10)
   {
     _rodata_start = ABSOLUTE(.);
 
     *(.rodata_desc .rodata_desc.*)               /* Should be the first.  App version info.        DO NOT PUT ANYTHING BEFORE IT! */
     *(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
 
-    *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata.*)
+    /* Create an empty gap within this section. Thanks to this, the end of this
+     * section will match .flah.rodata's begin address. Thus, both sections
+     * will be merged when creating the final bin image. */
+    . = ALIGN(ALIGNOF(.flash.rodata));
+  } >default_rodata_seg
+
+  .flash.rodata : ALIGN(0x10)
+  {
+    _flash_rodata_start = ABSOLUTE(.);
+
+    *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata.*)
 
 
     *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
@@ -665,13 +679,15 @@ SECTIONS
     . = ALIGN(4);
   } >default_rodata_seg
 
+  _flash_rodata_align = ALIGNOF(.flash.rodata);
+
   .flash.text :
   {
     _stext = .;
     _text_start = ABSOLUTE(.);
 
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*libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* 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*libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.*) .text.*)
     *(.phyiram .phyiram.*)
+    *(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libc.a:creat.* *libc.a:isatty.* *libc.a:lib_a-abs.* *libc.a:lib_a-asctime.* *libc.a:lib_a-asctime_r.* *libc.a:lib_a-atoi.* *libc.a:lib_a-atol.* *libc.a:lib_a-bzero.* *libc.a:lib_a-close.* *libc.a:lib_a-creat.* *libc.a:lib_a-ctime.* *libc.a:lib_a-ctime_r.* *libc.a:lib_a-ctype_.* *libc.a:lib_a-div.* *libc.a:lib_a-environ.* *libc.a:lib_a-envlock.* *libc.a:lib_a-fclose.* *libc.a:lib_a-fflush.* *libc.a:lib_a-findfp.* *libc.a:lib_a-fputwc.* *libc.a:lib_a-fvwrite.* *libc.a:lib_a-fwalk.* *libc.a:lib_a-getenv_r.* *libc.a:lib_a-gettzinfo.* *libc.a:lib_a-gmtime.* *libc.a:lib_a-gmtime_r.* *libc.a:lib_a-impure.* *libc.a:lib_a-isalnum.* *libc.a:lib_a-isalpha.* *libc.a:lib_a-isascii.* *libc.a:lib_a-isblank.* *libc.a:lib_a-iscntrl.* *libc.a:lib_a-isdigit.* *libc.a:lib_a-isgraph.* *libc.a:lib_a-islower.* *libc.a:lib_a-isprint.* *libc.a:lib_a-ispunct.* *libc.a:lib_a-isspace.* *libc.a:lib_a-isupper.* *libc.a:lib_a-itoa.* *libc.a:lib_a-labs.* *libc.a:lib_a-lcltime.* *libc.a:lib_a-lcltime_r.* *libc.a:lib_a-ldiv.* *libc.a:lib_a-longjmp.* *libc.a:lib_a-makebuf.* *libc.a:lib_a-memccpy.* *libc.a:lib_a-memchr.* *libc.a:lib_a-memcmp.* *libc.a:lib_a-memcpy.* *libc.a:lib_a-memmove.* *libc.a:lib_a-memrchr.* *libc.a:lib_a-memset.* *libc.a:lib_a-mktime.* *libc.a:lib_a-month_lengths.* *libc.a:lib_a-open.* *libc.a:lib_a-quorem.* *libc.a:lib_a-raise.* *libc.a:lib_a-rand.* *libc.a:lib_a-rand_r.* *libc.a:lib_a-read.* *libc.a:lib_a-refill.* *libc.a:lib_a-rshift.* *libc.a:lib_a-s_fpclassify.* *libc.a:lib_a-sbrk.* *libc.a:lib_a-sccl.* *libc.a:lib_a-setjmp.* *libc.a:lib_a-sf_nan.* *libc.a:lib_a-srand.* *libc.a:lib_a-stdio.* *libc.a:lib_a-strcasecmp.* *libc.a:lib_a-strcasestr.* *libc.a:lib_a-strcat.* *libc.a:lib_a-strchr.* *libc.a:lib_a-strcmp.* *libc.a:lib_a-strcoll.* *libc.a:lib_a-strcpy.* *libc.a:lib_a-strcspn.* *libc.a:lib_a-strdup.* *libc.a:lib_a-strdup_r.* *libc.a:lib_a-strftime.* *libc.a:lib_a-strlcat.* *libc.a:lib_a-strlcpy.* *libc.a:lib_a-strlen.* *libc.a:lib_a-strlwr.* *libc.a:lib_a-strncasecmp.* *libc.a:lib_a-strncat.* *libc.a:lib_a-strncmp.* *libc.a:lib_a-strncpy.* *libc.a:lib_a-strndup.* *libc.a:lib_a-strndup_r.* *libc.a:lib_a-strnlen.* *libc.a:lib_a-strptime.* *libc.a:lib_a-strrchr.* *libc.a:lib_a-strsep.* *libc.a:lib_a-strspn.* *libc.a:lib_a-strstr.* *libc.a:lib_a-strtok_r.* *libc.a:lib_a-strtol.* *libc.a:lib_a-strtoul.* *libc.a:lib_a-strupr.* *libc.a:lib_a-sysclose.* *libc.a:lib_a-sysopen.* *libc.a:lib_a-sysread.* *libc.a:lib_a-syssbrk.* *libc.a:lib_a-system.* *libc.a:lib_a-systimes.* *libc.a:lib_a-syswrite.* *libc.a:lib_a-time.* *libc.a:lib_a-timelocal.* *libc.a:lib_a-toascii.* *libc.a:lib_a-tolower.* *libc.a:lib_a-toupper.* *libc.a:lib_a-tzcalc_limits.* *libc.a:lib_a-tzlock.* *libc.a:lib_a-tzset.* *libc.a:lib_a-tzset_r.* *libc.a:lib_a-tzvars.* *libc.a:lib_a-ungetc.* *libc.a:lib_a-utoa.* *libc.a:lib_a-wbuf.* *libc.a:lib_a-wcrtomb.* *libc.a:lib_a-wctomb_r.* *libc.a:lib_a-wsetup.* *libc.a:lock.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text.*)
     *(.wifi0iram .wifi0iram.*)
     *(.wifiorslpiram .wifiorslpiram.*)
     *(.wifirxiram .wifirxiram.*)
diff --git a/tools/sdk/esp32/ld/esp32_out.ld b/tools/sdk/esp32/ld/esp32_out.ld
index e6febb7b..b974ab93 100644
--- a/tools/sdk/esp32/ld/esp32_out.ld
+++ b/tools/sdk/esp32/ld/esp32_out.ld
@@ -77,3 +77,9 @@ _data_seg_org = ORIGIN(rtc_data_seg);
 REGION_ALIAS("rtc_data_location", rtc_slow_seg );
   REGION_ALIAS("default_code_seg", iram0_2_seg);
   REGION_ALIAS("default_rodata_seg", drom0_0_seg);
+/**
+ *  If rodata default segment is placed in `drom0_0_seg`, then flash's first rodata section must
+ *  also be first in the segment.
+ */
+  ASSERT(_rodata_start == ORIGIN(default_rodata_seg),
+         ".flash.appdesc section must be placed at the beginning of the rodata segment.")
diff --git a/tools/sdk/esp32/ld/libbtdm_app.a b/tools/sdk/esp32/ld/libbtdm_app.a
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index 227fc090..77259879 100644
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index c922cafa..7d2801f9 100644
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index 8f0f918d..389c9157 100644
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index 1c9be443..b429e5b3 100644
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index 5d0c355c..862773d8 100644
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index fa819c0b..dbbaeb4c 100644
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index a6dd100f..6df8dd9f 100644
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index 3d4d2aa0..5c5733c1 100644
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index a075a8ff..55e1fefa 100644
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index a2186c19..88ba8928 100644
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index 76311d9d..06043830 100644
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index 61979d27..954a4154 100644
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index b34ed662..018db75d 100644
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index 0ddef26c..f7b58bfd 100644
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diff --git a/tools/sdk/esp32/lib/libulp.a b/tools/sdk/esp32/lib/libulp.a
index 2fa8b2d4..e34e2d82 100644
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index 15743935..fd7add9c 100644
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diff --git a/tools/sdk/esp32/lib/libwapi.a b/tools/sdk/esp32/lib/libwapi.a
index 0532882e..ea17359e 100644
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diff --git a/tools/sdk/esp32/lib/libwear_levelling.a b/tools/sdk/esp32/lib/libwear_levelling.a
index 4e4275a5..0174bf52 100644
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diff --git a/tools/sdk/esp32/lib/libwifi_provisioning.a b/tools/sdk/esp32/lib/libwifi_provisioning.a
index 49724f0f..e49b49f5 100644
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diff --git a/tools/sdk/esp32/lib/libwpa_supplicant.a b/tools/sdk/esp32/lib/libwpa_supplicant.a
index e5d97f24..4138ef7c 100644
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diff --git a/tools/sdk/esp32/lib/libws2812_led.a b/tools/sdk/esp32/lib/libws2812_led.a
index b9e22b59..955423b6 100644
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diff --git a/tools/sdk/esp32/lib/libxtensa.a b/tools/sdk/esp32/lib/libxtensa.a
index 84de315b..8eb391f1 100644
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diff --git a/tools/sdk/esp32/sdkconfig b/tools/sdk/esp32/sdkconfig
index 211a303f..e3b21703 100644
--- a/tools/sdk/esp32/sdkconfig
+++ b/tools/sdk/esp32/sdkconfig
@@ -117,6 +117,7 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=115200
 # Partition Table
 #
 CONFIG_PARTITION_TABLE_SINGLE_APP=y
+# CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE is not set
 # CONFIG_PARTITION_TABLE_TWO_OTA is not set
 # CONFIG_PARTITION_TABLE_CUSTOM is not set
 CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
@@ -377,15 +378,18 @@ CONFIG_BT_BLE_ENABLED=y
 CONFIG_BT_GATTS_ENABLE=y
 # CONFIG_BT_GATTS_PPCP_CHAR_GAP is not set
 # CONFIG_BT_BLE_BLUFI_ENABLE is not set
+CONFIG_BT_GATT_SR_PROFILES=8
 # CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MANUAL is not set
 CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO=y
 CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MODE=0
 CONFIG_BT_GATTC_ENABLE=y
 # CONFIG_BT_GATTC_CACHE_NVS_FLASH is not set
+CONFIG_BT_GATTC_CONNECT_RETRY_COUNT=3
 CONFIG_BT_BLE_SMP_ENABLE=y
 # CONFIG_BT_SMP_SLAVE_CON_PARAMS_UPD_ENABLE is not set
 CONFIG_BT_STACK_NO_LOG=y
 CONFIG_BT_ACL_CONNECTIONS=4
+CONFIG_BT_MULTI_CONNECTION_ENBALE=y
 CONFIG_BT_ALLOCATION_FROM_SPIRAM_FIRST=y
 CONFIG_BT_BLE_DYNAMIC_ENV_MEMORY=y
 # CONFIG_BT_BLE_HOST_QUEUE_CONG_CHECK is not set
@@ -616,6 +620,7 @@ CONFIG_ETH_DMA_TX_BUFFER_NUM=10
 CONFIG_ETH_USE_SPI_ETHERNET=y
 CONFIG_ETH_SPI_ETHERNET_DM9051=y
 CONFIG_ETH_SPI_ETHERNET_W5500=y
+# CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL is not set
 # CONFIG_ETH_USE_OPENETH is not set
 # end of Ethernet
 
@@ -685,6 +690,11 @@ CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4
 # end of Sleep Config
 # end of Hardware Settings
 
+#
+# LCD and Touch Panel
+#
+# end of LCD and Touch Panel
+
 #
 # ESP NETIF Adapter
 #
@@ -779,6 +789,7 @@ CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32
 # CONFIG_ESP32_WIFI_IRAM_OPT is not set
 # CONFIG_ESP32_WIFI_RX_IRAM_OPT is not set
 # CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE is not set
+# CONFIG_ESP_WIFI_SLP_IRAM_OPT is not set
 # CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE is not set
 # end of Wi-Fi
 
@@ -941,6 +952,12 @@ CONFIG_LOG_DEFAULT_LEVEL_ERROR=y
 # CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set
 # CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set
 CONFIG_LOG_DEFAULT_LEVEL=1
+CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT=y
+# CONFIG_LOG_MAXIMUM_LEVEL_WARN is not set
+# CONFIG_LOG_MAXIMUM_LEVEL_INFO is not set
+# CONFIG_LOG_MAXIMUM_LEVEL_DEBUG is not set
+# CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE is not set
+CONFIG_LOG_MAXIMUM_LEVEL=1
 # CONFIG_LOG_COLORS is not set
 CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y
 # CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set
@@ -973,6 +990,7 @@ CONFIG_LWIP_ESP_GRATUITOUS_ARP=y
 CONFIG_LWIP_GARP_TMR_INTERVAL=60
 CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32
 # CONFIG_LWIP_DHCP_DOES_ARP_CHECK is not set
+# CONFIG_LWIP_DHCP_DISABLE_CLIENT_ID is not set
 CONFIG_LWIP_DHCP_RESTORE_LAST_IP=y
 
 #
@@ -985,6 +1003,9 @@ CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8
 # CONFIG_LWIP_AUTOIP is not set
 CONFIG_LWIP_IPV6=y
 # CONFIG_LWIP_IPV6_AUTOCONFIG is not set
+CONFIG_LWIP_IPV6_NUM_ADDRESSES=3
+# CONFIG_LWIP_IPV6_FORWARD is not set
+# CONFIG_LWIP_NETIF_STATUS_CALLBACK is not set
 CONFIG_LWIP_NETIF_LOOPBACK=y
 CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8
 
@@ -1075,6 +1096,9 @@ CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT=y
 CONFIG_LWIP_HOOK_IP6_ROUTE_NONE=y
 # CONFIG_LWIP_HOOK_IP6_ROUTE_DEFAULT is not set
 # CONFIG_LWIP_HOOK_IP6_ROUTE_CUSTOM is not set
+CONFIG_LWIP_HOOK_ND6_GET_GW_NONE=y
+# CONFIG_LWIP_HOOK_ND6_GET_GW_DEFAULT is not set
+# CONFIG_LWIP_HOOK_ND6_GET_GW_CUSTOM is not set
 CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE=y
 # CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_DEFAULT is not set
 # CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_CUSTOM is not set
@@ -1110,6 +1134,7 @@ CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y
 CONFIG_MBEDTLS_HARDWARE_AES=y
 CONFIG_MBEDTLS_HARDWARE_MPI=y
 # CONFIG_MBEDTLS_HARDWARE_SHA is not set
+CONFIG_MBEDTLS_ROM_MD5=y
 # CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set
 # CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set
 CONFIG_MBEDTLS_HAVE_TIME=y
@@ -1164,6 +1189,7 @@ CONFIG_MBEDTLS_RC4_DISABLED=y
 # CONFIG_MBEDTLS_XTEA_C is not set
 CONFIG_MBEDTLS_CCM_C=y
 CONFIG_MBEDTLS_GCM_C=y
+# CONFIG_MBEDTLS_NIST_KW_C is not set
 # end of Symmetric Ciphers
 
 # CONFIG_MBEDTLS_RIPEMD160_C is not set
@@ -1295,6 +1321,7 @@ CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=2
 CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=4096
 # CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set
 # CONFIG_SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED is not set
+# CONFIG_SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST is not set
 
 #
 # Auto-detect flash chips
@@ -1360,6 +1387,7 @@ CONFIG_WS_BUFFER_SIZE=1024
 #
 CONFIG_UNITY_ENABLE_FLOAT=y
 CONFIG_UNITY_ENABLE_DOUBLE=y
+# CONFIG_UNITY_ENABLE_64BIT is not set
 # CONFIG_UNITY_ENABLE_COLOR is not set
 CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER=y
 # CONFIG_UNITY_ENABLE_FIXTURE is not set
diff --git a/tools/sdk/esp32c3/bin/bootloader_dio_40m.bin b/tools/sdk/esp32c3/bin/bootloader_dio_40m.bin
index 043a7613..bf6e5901 100644
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diff --git a/tools/sdk/esp32c3/bin/bootloader_dio_80m.bin b/tools/sdk/esp32c3/bin/bootloader_dio_80m.bin
index 8b900914..c381d446 100644
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diff --git a/tools/sdk/esp32c3/bin/bootloader_dout_40m.bin b/tools/sdk/esp32c3/bin/bootloader_dout_40m.bin
index 96fc3173..c91659fb 100644
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diff --git a/tools/sdk/esp32c3/bin/bootloader_dout_80m.bin b/tools/sdk/esp32c3/bin/bootloader_dout_80m.bin
index 1b0cb18e..11b427f4 100644
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diff --git a/tools/sdk/esp32c3/bin/bootloader_qio_40m.bin b/tools/sdk/esp32c3/bin/bootloader_qio_40m.bin
index 207c7c57..483f7c8b 100644
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diff --git a/tools/sdk/esp32c3/bin/bootloader_qio_80m.bin b/tools/sdk/esp32c3/bin/bootloader_qio_80m.bin
index 2d797df8..9c35665d 100644
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diff --git a/tools/sdk/esp32c3/bin/bootloader_qout_40m.bin b/tools/sdk/esp32c3/bin/bootloader_qout_40m.bin
index 78c50287..0a1a639e 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_qout_40m.bin and b/tools/sdk/esp32c3/bin/bootloader_qout_40m.bin differ
diff --git a/tools/sdk/esp32c3/bin/bootloader_qout_80m.bin b/tools/sdk/esp32c3/bin/bootloader_qout_80m.bin
index 3f7a24ec..134aabdc 100644
Binary files a/tools/sdk/esp32c3/bin/bootloader_qout_80m.bin and b/tools/sdk/esp32c3/bin/bootloader_qout_80m.bin differ
diff --git a/tools/sdk/esp32c3/include/app_trace/include/esp_app_trace.h b/tools/sdk/esp32c3/include/app_trace/include/esp_app_trace.h
index b8374ae0..642b14c5 100644
--- a/tools/sdk/esp32c3/include/app_trace/include/esp_app_trace.h
+++ b/tools/sdk/esp32c3/include/app_trace/include/esp_app_trace.h
@@ -1,16 +1,8 @@
-// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef ESP_APP_TRACE_H_
 #define ESP_APP_TRACE_H_
 
diff --git a/tools/sdk/esp32c3/include/app_trace/include/esp_app_trace_util.h b/tools/sdk/esp32c3/include/app_trace/include/esp_app_trace_util.h
index 57c4f94f..a4de01c7 100644
--- a/tools/sdk/esp32c3/include/app_trace/include/esp_app_trace_util.h
+++ b/tools/sdk/esp32c3/include/app_trace/include/esp_app_trace_util.h
@@ -1,16 +1,8 @@
-// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef ESP_APP_TRACE_UTIL_H_
 #define ESP_APP_TRACE_UTIL_H_
 
diff --git a/tools/sdk/esp32c3/include/app_trace/include/esp_sysview_trace.h b/tools/sdk/esp32c3/include/app_trace/include/esp_sysview_trace.h
index 7a1bd5fd..b64fcca2 100644
--- a/tools/sdk/esp32c3/include/app_trace/include/esp_sysview_trace.h
+++ b/tools/sdk/esp32c3/include/app_trace/include/esp_sysview_trace.h
@@ -1,16 +1,8 @@
-// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef ESP_SYSVIEW_TRACE_H_
 #define ESP_SYSVIEW_TRACE_H_
 
diff --git a/tools/sdk/esp32c3/include/app_update/include/esp_ota_ops.h b/tools/sdk/esp32c3/include/app_update/include/esp_ota_ops.h
index 4d8053a6..ee29cdac 100644
--- a/tools/sdk/esp32c3/include/app_update/include/esp_ota_ops.h
+++ b/tools/sdk/esp32c3/include/app_update/include/esp_ota_ops.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef _OTA_OPS_H
 #define _OTA_OPS_H
diff --git a/tools/sdk/esp32c3/include/bootloader_support/include/bootloader_random.h b/tools/sdk/esp32c3/include/bootloader_support/include/bootloader_random.h
index 98a7712f..0c7b61eb 100644
--- a/tools/sdk/esp32c3/include/bootloader_support/include/bootloader_random.h
+++ b/tools/sdk/esp32c3/include/bootloader_support/include/bootloader_random.h
@@ -24,13 +24,14 @@ extern "C" {
  * @brief Enable early entropy source for RNG
  *
  * Uses the SAR ADC to feed entropy into the HWRNG. The ADC is put
- * into a test mode that reads the 1.1V internal reference source and
- * feeds the LSB of data into the HWRNG.
+ * into a test mode that reads an internal reference voltage and
+ * constantly feeds the LSB of data into the HWRNG. Consult the
+ * SoC Technical Reference Manual for more information.
  *
- * Can also be used from app code early during operation, if entropy
- * is required before WiFi stack is initialised. Call this function
- * from app code only if WiFi/BT are not yet enabled and I2S and SAR
- * ADC are not in use.
+ * Can also be used from app code early during operation, if true
+ * random numbers are required before WiFi stack is initialised.
+ * Call this function from app code only if WiFi/BT are not yet
+ * enabled and I2S and ADC are not in use.
  *
  * Call bootloader_random_disable() when done.
  */
diff --git a/tools/sdk/esp32c3/include/bt/include/esp32c3/include/esp_bt.h b/tools/sdk/esp32c3/include/bt/include/esp32c3/include/esp_bt.h
index 7a33d605..fa5ef7d4 100644
--- a/tools/sdk/esp32c3/include/bt/include/esp32c3/include/esp_bt.h
+++ b/tools/sdk/esp32c3/include/bt/include/esp32c3/include/esp_bt.h
@@ -26,7 +26,7 @@ extern "C" {
 #endif
 
 #define ESP_BT_CTRL_CONFIG_MAGIC_VAL    0x5A5AA5A5
-#define ESP_BT_CTRL_CONFIG_VERSION      0x02103080
+#define ESP_BT_CTRL_CONFIG_VERSION      0x02103310
 
 #define ESP_BT_HCI_TL_MAGIC_VALUE   0xfadebead
 #define ESP_BT_HCI_TL_VERSION       0x00010000
@@ -93,9 +93,17 @@ enum {
     ESP_BT_COEX_PHY_CODED_TX_RX_TIME_LIMIT_FORCE_ENABLE,         /*!< Always Enable the limit */
 };
 
+#define ESP_BT_HCI_TL_STATUS_OK            (0)   /*!< HCI_TL Tx/Rx operation status OK */
+
+/**
+ * @brief callback function for HCI Transport Layer send/receive operations
+ */
+typedef void (* esp_bt_hci_tl_callback_t) (void *arg, uint8_t status);
+
 #ifdef CONFIG_BT_ENABLED
 
 #define BT_CTRL_BLE_MAX_ACT_LIMIT           10  //Maximum BLE activity limitation
+#define SLAVE_CE_LEN_MIN_DEFAULT             5
 
 #ifdef CONFIG_BT_CTRL_SCAN_DUPL_TYPE
 #define SCAN_DUPLICATE_TYPE_VALUE  CONFIG_BT_CTRL_SCAN_DUPL_TYPE
@@ -161,6 +169,7 @@ enum {
     .mesh_adv_size = MESH_DUPLICATE_SCAN_CACHE_SIZE,                       \
     .coex_phy_coded_tx_rx_time_limit = CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF, \
     .hw_target_code = BLE_HW_TARGET_CODE_ESP32C3_CHIP_ECO0,                \
+    .slave_ce_len_min = SLAVE_CE_LEN_MIN_DEFAULT,                          \
 };
 
 #else
@@ -178,8 +187,8 @@ typedef struct {
     int (* _open)(void);                    /* hci tl open */
     void (* _close)(void);                  /* hci tl close */
     void (* _finish_transfers)(void);       /* hci tl finish trasnfers */
-    void (* _recv)(uint8_t *buf, uint32_t len, void (*callback) (void*, uint8_t), void* dummy); /* hci tl recv */
-    void (* _send)(uint8_t *buf, uint32_t len, void (*callback) (void*, uint8_t), void* dummy); /* hci tl send */
+    void (* _recv)(uint8_t *buf, uint32_t len, esp_bt_hci_tl_callback_t callback, void* arg); /* hci tl recv */
+    void (* _send)(uint8_t *buf, uint32_t len, esp_bt_hci_tl_callback_t callback, void* arg); /* hci tl send */
     bool (* _flow_off)(void); /* hci tl flow off */
     void (* _flow_on)(void); /* hci tl flow on */
 } esp_bt_hci_tl_t;
@@ -225,6 +234,7 @@ typedef struct {
     uint16_t mesh_adv_size;                 /*!< Mesh adv size for scan duplicate */
     uint8_t coex_phy_coded_tx_rx_time_limit;  /*!< limit on max tx/rx time in case of connection using CODED-PHY with Wi-Fi coexistence */
     uint32_t hw_target_code;                /*!< hardware target */
+    uint8_t slave_ce_len_min;
 } esp_bt_controller_config_t;
 
 /**
diff --git a/tools/sdk/esp32c3/include/config/sdkconfig.h b/tools/sdk/esp32c3/include/config/sdkconfig.h
index cc548951..789744ca 100644
--- a/tools/sdk/esp32c3/include/config/sdkconfig.h
+++ b/tools/sdk/esp32c3/include/config/sdkconfig.h
@@ -113,9 +113,11 @@
 #define CONFIG_BT_BLE_ENABLED 1
 #define CONFIG_BT_GATTS_ENABLE 1
 #define CONFIG_BT_BLE_BLUFI_ENABLE 1
+#define CONFIG_BT_GATT_SR_PROFILES 8
 #define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO 1
 #define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MODE 0
 #define CONFIG_BT_GATTC_ENABLE 1
+#define CONFIG_BT_GATTC_CONNECT_RETRY_COUNT 3
 #define CONFIG_BT_BLE_SMP_ENABLE 1
 #define CONFIG_BT_LOG_HCI_TRACE_LEVEL_WARNING 1
 #define CONFIG_BT_LOG_HCI_TRACE_LEVEL 2
@@ -160,12 +162,14 @@
 #define CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_WARNING 1
 #define CONFIG_BT_LOG_BLUFI_TRACE_LEVEL 2
 #define CONFIG_BT_ACL_CONNECTIONS 4
+#define CONFIG_BT_MULTI_CONNECTION_ENBALE 1
 #define CONFIG_BT_SMP_ENABLE 1
 #define CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT 30
 #define CONFIG_BT_BLE_RPA_SUPPORTED 1
 #define CONFIG_BT_BLE_50_FEATURES_SUPPORTED 1
 #define CONFIG_BT_BLE_42_FEATURES_SUPPORTED 1
 #define CONFIG_BT_RESERVE_DRAM 0xdb5c
+#define CONFIG_BT_NIMBLE_ENABLE_CONN_REATTEMPT 1
 #define CONFIG_COAP_MBEDTLS_PSK 1
 #define CONFIG_COAP_LOG_DEFAULT_LEVEL 0
 #define CONFIG_ADC_DISABLE_DAC 1
@@ -252,8 +256,6 @@
 #define CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN 752
 #define CONFIG_ESP32_WIFI_MGMT_SBUF_NUM 32
 #define CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE 1
-#define CONFIG_ESP_WIFI_FTM_INITIATOR_SUPPORT 1
-#define CONFIG_ESP_WIFI_FTM_RESPONDER_SUPPORT 1
 #define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER 20
 #define CONFIG_ESP32_PHY_MAX_TX_POWER 20
 #define CONFIG_ESP_COREDUMP_ENABLE_TO_NONE 1
@@ -313,6 +315,8 @@
 #define CONFIG_HEAP_TRACING_OFF 1
 #define CONFIG_LOG_DEFAULT_LEVEL_ERROR 1
 #define CONFIG_LOG_DEFAULT_LEVEL 1
+#define CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT 1
+#define CONFIG_LOG_MAXIMUM_LEVEL 1
 #define CONFIG_LOG_TIMESTAMP_SOURCE_RTOS 1
 #define CONFIG_LWIP_LOCAL_HOSTNAME "espressif"
 #define CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES 1
@@ -330,6 +334,7 @@
 #define CONFIG_LWIP_DHCPS_LEASE_UNIT 60
 #define CONFIG_LWIP_DHCPS_MAX_STATION_NUM 8
 #define CONFIG_LWIP_IPV6 1
+#define CONFIG_LWIP_IPV6_NUM_ADDRESSES 3
 #define CONFIG_LWIP_NETIF_LOOPBACK 1
 #define CONFIG_LWIP_LOOPBACK_MAX_PBUFS 8
 #define CONFIG_LWIP_MAX_ACTIVE_TCP 16
@@ -360,6 +365,7 @@
 #define CONFIG_LWIP_ESP_LWIP_ASSERT 1
 #define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
 #define CONFIG_LWIP_HOOK_IP6_ROUTE_NONE 1
+#define CONFIG_LWIP_HOOK_ND6_GET_GW_NONE 1
 #define CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE 1
 #define CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC 1
 #define CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN 1
@@ -370,6 +376,7 @@
 #define CONFIG_MBEDTLS_HARDWARE_AES 1
 #define CONFIG_MBEDTLS_HARDWARE_MPI 1
 #define CONFIG_MBEDTLS_HARDWARE_SHA 1
+#define CONFIG_MBEDTLS_ROM_MD5 1
 #define CONFIG_MBEDTLS_HAVE_TIME 1
 #define CONFIG_MBEDTLS_ECDSA_DETERMINISTIC 1
 #define CONFIG_MBEDTLS_SHA512_C 1
@@ -598,5 +605,5 @@
 #define CONFIG_TIMER_TASK_STACK_SIZE CONFIG_ESP_TIMER_TASK_STACK_SIZE
 #define CONFIG_TOOLPREFIX CONFIG_SDK_TOOLPREFIX
 #define CONFIG_UDP_RECVMBOX_SIZE CONFIG_LWIP_UDP_RECVMBOX_SIZE
-#define CONFIG_ARDUINO_IDF_COMMIT "cf457d412"
+#define CONFIG_ARDUINO_IDF_COMMIT "c13afea63"
 #define CONFIG_ARDUINO_IDF_BRANCH "master"
diff --git a/tools/sdk/esp32c3/include/driver/include/driver/adc_common.h b/tools/sdk/esp32c3/include/driver/include/driver/adc_common.h
index e38da915..f083b32d 100644
--- a/tools/sdk/esp32c3/include/driver/include/driver/adc_common.h
+++ b/tools/sdk/esp32c3/include/driver/include/driver/adc_common.h
@@ -49,8 +49,8 @@ typedef enum {
     ADC1_CHANNEL_5,     /*!< ADC1 channel 5 is GPIO6  */
     ADC1_CHANNEL_6,     /*!< ADC1 channel 6 is GPIO7  */
     ADC1_CHANNEL_7,     /*!< ADC1 channel 7 is GPIO8  */
-    ADC1_CHANNEL_8,     /*!< ADC1 channel 6 is GPIO9  */
-    ADC1_CHANNEL_9,     /*!< ADC1 channel 7 is GPIO10 */
+    ADC1_CHANNEL_8,     /*!< ADC1 channel 8 is GPIO9  */
+    ADC1_CHANNEL_9,     /*!< ADC1 channel 9 is GPIO10 */
     ADC1_CHANNEL_MAX,
 } adc1_channel_t;
 #elif CONFIG_IDF_TARGET_ESP32C3
@@ -135,7 +135,7 @@ typedef enum {
  * @brief Digital ADC DMA configuration
  */
 typedef struct adc_digi_init_config_s {
-    uint32_t max_store_buf_size;    ///< Max length of the converted data that driver can store before they are processed. When this length is reached, driver will dump out all the old data and start to store them again.
+    uint32_t max_store_buf_size;    ///< Max length of the converted data that driver can store before they are processed.
     uint32_t conv_num_each_intr;    ///< Bytes of data that can be converted in 1 interrupt.
     uint32_t adc1_chan_mask;        ///< Channel list of ADC1 to be initialized.
     uint32_t adc2_chan_mask;        ///< Channel list of ADC2 to be initialized.
diff --git a/tools/sdk/esp32c3/include/driver/include/driver/gpio.h b/tools/sdk/esp32c3/include/driver/include/driver/gpio.h
index aac81566..3e497e04 100644
--- a/tools/sdk/esp32c3/include/driver/include/driver/gpio.h
+++ b/tools/sdk/esp32c3/include/driver/include/driver/gpio.h
@@ -35,6 +35,8 @@
 #include "esp32s3/rom/gpio.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/gpio.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/gpio.h"
 #endif
 
 #ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
@@ -215,9 +217,9 @@ esp_err_t gpio_wakeup_disable(gpio_num_t gpio_num);
  * per-GPIO ISRs.
  *
  * @param  fn  Interrupt handler function.
+ * @param  arg  Parameter for handler function
  * @param  intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
  *            ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
- * @param  arg  Parameter for handler function
  * @param  handle Pointer to return handle. If non-NULL, a handle for the interrupt will be returned here.
  *
  * \verbatim embed:rst:leading-asterisk
diff --git a/tools/sdk/esp32c3/include/driver/include/driver/ledc.h b/tools/sdk/esp32c3/include/driver/include/driver/ledc.h
index 2ffcbd74..69660f3d 100644
--- a/tools/sdk/esp32c3/include/driver/include/driver/ledc.h
+++ b/tools/sdk/esp32c3/include/driver/include/driver/ledc.h
@@ -76,6 +76,7 @@ esp_err_t ledc_update_duty(ledc_mode_t speed_mode, ledc_channel_t channel);
 
 /**
  * @brief Set LEDC output gpio.
+ * @deprecated This function is redundant, please use ledc_channel_config to set gpio pins.
  *
  * @param  gpio_num The LEDC output gpio
  * @param  speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
@@ -85,8 +86,8 @@ esp_err_t ledc_update_duty(ledc_mode_t speed_mode, ledc_channel_t channel);
  *     - ESP_OK Success
  *     - ESP_ERR_INVALID_ARG Parameter error
  */
-esp_err_t ledc_set_pin(int gpio_num, ledc_mode_t speed_mode, ledc_channel_t ledc_channel);
-
+esp_err_t ledc_set_pin(int gpio_num, ledc_mode_t speed_mode, ledc_channel_t ledc_channel)
+    __attribute__((deprecated("use ledc_channel_config instead")));
 /**
  * @brief LEDC stop.
  *        Disable LEDC output, and set idle level
diff --git a/tools/sdk/esp32c3/include/driver/include/driver/mcpwm.h b/tools/sdk/esp32c3/include/driver/include/driver/mcpwm.h
index f4ec17a2..c19b80e4 100644
--- a/tools/sdk/esp32c3/include/driver/include/driver/mcpwm.h
+++ b/tools/sdk/esp32c3/include/driver/include/driver/mcpwm.h
@@ -568,6 +568,7 @@ esp_err_t mcpwm_fault_deinit(mcpwm_unit_t mcpwm_num, mcpwm_fault_signal_t fault_
  * @param cap_edge set capture edge, BIT(0) - negative edge, BIT(1) - positive edge
  * @param cap_sig capture pin, which needs to be enabled
  * @param num_of_pulse count time between rising/falling edge between 2 *(pulses mentioned), counter uses APB_CLK
+ *                     [0~MCPWM_LL_MAX_PRESCALE] (MCPWM_LL_MAX_PRESCALE = 255 on ESP32);
  *
  * @return
  *     - ESP_OK Success
diff --git a/tools/sdk/esp32c3/include/driver/include/driver/spi_slave_hd.h b/tools/sdk/esp32c3/include/driver/include/driver/spi_slave_hd.h
index 7e9289fb..b99d6fea 100644
--- a/tools/sdk/esp32c3/include/driver/include/driver/spi_slave_hd.h
+++ b/tools/sdk/esp32c3/include/driver/include/driver/spi_slave_hd.h
@@ -58,7 +58,9 @@ typedef enum {
 typedef struct {
     slave_cb_t cb_buffer_tx;                    ///< Callback when master reads from shared buffer
     slave_cb_t cb_buffer_rx;                    ///< Callback when master writes to shared buffer
+    slave_cb_t cb_send_dma_ready;               ///< Callback when TX data buffer is loaded to the hardware (DMA)
     slave_cb_t cb_sent;                         ///< Callback when data are sent
+    slave_cb_t cb_recv_dma_ready;               ///< Callback when RX data buffer is loaded to the hardware (DMA)
     slave_cb_t cb_recv;                         ///< Callback when data are received
     slave_cb_t cb_cmd9;                         ///< Callback when CMD9 received
     slave_cb_t cb_cmdA;                         ///< Callback when CMDA received
diff --git a/tools/sdk/esp32c3/include/driver/include/driver/timer.h b/tools/sdk/esp32c3/include/driver/include/driver/timer.h
index 1a4c074a..609d1006 100644
--- a/tools/sdk/esp32c3/include/driver/include/driver/timer.h
+++ b/tools/sdk/esp32c3/include/driver/include/driver/timer.h
@@ -432,6 +432,8 @@ void timer_group_clr_intr_sta_in_isr(timer_group_t group_num, timer_intr_t intr_
 bool timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer_idx_t timer_num);
 
 /** @brief Take timer spinlock to enter critical protect
+ *
+ *  @note Deprecated, the recommended way is to use ISR callbacks instead, see timer_group_example_main
  *
  * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
  *
@@ -439,9 +441,11 @@ bool timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer_idx_t tim
  *     - ESP_OK Success
  *     - ESP_ERR_INVALID_ARG Parameter error
  */
-esp_err_t timer_spinlock_take(timer_group_t group_num);
+esp_err_t timer_spinlock_take(timer_group_t group_num) __attribute__ ((deprecated));
 
 /** @brief Give timer spinlock to exit critical protect
+ *
+ *  @note Deprecated, the recommended way is to use ISR callbacks instead, see timer_group_example_main
  *
  * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
  *
@@ -449,7 +453,7 @@ esp_err_t timer_spinlock_take(timer_group_t group_num);
  *     - ESP_OK Success
  *     - ESP_ERR_INVALID_ARG Parameter error
  */
-esp_err_t timer_spinlock_give(timer_group_t group_num);
+esp_err_t timer_spinlock_give(timer_group_t group_num) __attribute__ ((deprecated));
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32c3/include/driver/include/esp_private/gdma.h b/tools/sdk/esp32c3/include/driver/include/esp_private/gdma.h
index dc27f582..2614a2d0 100644
--- a/tools/sdk/esp32c3/include/driver/include/esp_private/gdma.h
+++ b/tools/sdk/esp32c3/include/driver/include/esp_private/gdma.h
@@ -155,6 +155,7 @@ esp_err_t gdma_new_channel(const gdma_channel_alloc_config_t *config, gdma_chann
  * @brief Connect GDMA channel to trigger peripheral
  *
  * @note Suggest to use helper macro `GDMA_MAKE_TRIGGER` to construct parameter `trig_periph`. e.g. GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SHA,0)
+ * @note Connecting to a peripheral will also reset the DMA FIFO and FSM automatically
  *
  * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
  * @param[in] trig_periph GDMA trigger peripheral
@@ -279,6 +280,18 @@ esp_err_t gdma_stop(gdma_channel_handle_t dma_chan);
  */
 esp_err_t gdma_append(gdma_channel_handle_t dma_chan);
 
+/**
+ * @brief Reset DMA channel FIFO and internal finite state machine
+ * @note Resetting a DMA channel won't break the connection with the target peripheral
+ *
+ * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @return
+ *      - ESP_OK: DMA channel reset successfully
+ *      - ESP_ERR_INVALID_ARG: DMA channel reset failed due to invalid arguments
+ *      - ESP_FAIL: DMA channel reset failed due to other errors
+ */
+esp_err_t gdma_reset(gdma_channel_handle_t dma_chan);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/include/efuse/esp32c3/include/esp_efuse_table.h b/tools/sdk/esp32c3/include/efuse/esp32c3/include/esp_efuse_table.h
index 13f3f183..a6d4ca27 100644
--- a/tools/sdk/esp32c3/include/efuse/esp32c3/include/esp_efuse_table.h
+++ b/tools/sdk/esp32c3/include/efuse/esp32c3/include/esp_efuse_table.h
@@ -17,7 +17,7 @@ extern "C" {
 #endif
 
 
-// md5_digest_table f9a84eb22f94a7bc083b4c6817a33a59
+// md5_digest_table 61baa79d296df996c838bc2adc1837e5
 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
 // If you want to change some fields, you need to change esp_efuse_table.csv file
 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -138,6 +138,12 @@ extern const esp_efuse_desc_t* ESP_EFUSE_KEY3[];
 extern const esp_efuse_desc_t* ESP_EFUSE_KEY4[];
 extern const esp_efuse_desc_t* ESP_EFUSE_KEY5[];
 extern const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART2[];
+extern const esp_efuse_desc_t* ESP_EFUSE_K_RTC_LDO[];
+extern const esp_efuse_desc_t* ESP_EFUSE_K_DIG_LDO[];
+extern const esp_efuse_desc_t* ESP_EFUSE_V_RTC_DBIAS20[];
+extern const esp_efuse_desc_t* ESP_EFUSE_V_DIG_DBIAS20[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DIG_DBIAS_HVT[];
+extern const esp_efuse_desc_t* ESP_EFUSE_THRES_HVT[];
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32c3/include/esp_eth/include/esp_eth.h b/tools/sdk/esp32c3/include/esp_eth/include/esp_eth.h
index 480349d5..d204b508 100644
--- a/tools/sdk/esp32c3/include/esp_eth/include/esp_eth.h
+++ b/tools/sdk/esp32c3/include/esp_eth/include/esp_eth.h
@@ -86,6 +86,47 @@ typedef struct {
     */
     esp_err_t (*on_lowlevel_deinit_done)(esp_eth_handle_t eth_handle);
 
+    /**
+    * @brief Read PHY register
+    *
+    * @note Usually the PHY register read/write function is provided by MAC (SMI interface),
+    *       but if the PHY device is managed by other interface (e.g. I2C), then user needs to
+    *       implement the corresponding read/write.
+    *       Setting this to NULL means your PHY device is managed by MAC's SMI interface.
+    *
+    * @param[in] eth_handle: handle of Ethernet driver
+    * @param[in] phy_addr: PHY chip address (0~31)
+    * @param[in] phy_reg: PHY register index code
+    * @param[out] reg_value: PHY register value
+    *
+    * @return
+    *      - ESP_OK: read PHY register successfully
+    *      - ESP_ERR_INVALID_ARG: read PHY register failed because of invalid argument
+    *      - ESP_ERR_TIMEOUT: read PHY register failed because of timeout
+    *      - ESP_FAIL: read PHY register failed because some other error occurred
+    */
+    esp_err_t (*read_phy_reg)(esp_eth_handle_t eth_handle, uint32_t phy_addr, uint32_t phy_reg, uint32_t *reg_value);
+
+    /**
+    * @brief Write PHY register
+    *
+    * @note Usually the PHY register read/write function is provided by MAC (SMI interface),
+    *       but if the PHY device is managed by other interface (e.g. I2C), then user needs to
+    *       implement the corresponding read/write.
+    *       Setting this to NULL means your PHY device is managed by MAC's SMI interface.
+    *
+    * @param[in] eth_handle: handle of Ethernet driver
+    * @param[in] phy_addr: PHY chip address (0~31)
+    * @param[in] phy_reg: PHY register index code
+    * @param[in] reg_value: PHY register value
+    *
+    * @return
+    *      - ESP_OK: write PHY register successfully
+    *      - ESP_ERR_INVALID_ARG: read PHY register failed because of invalid argument
+    *      - ESP_ERR_TIMEOUT: write PHY register failed because of timeout
+    *      - ESP_FAIL: write PHY register failed because some other error occurred
+    */
+    esp_err_t (*write_phy_reg)(esp_eth_handle_t eth_handle, uint32_t phy_addr, uint32_t phy_reg, uint32_t reg_value);
 } esp_eth_config_t;
 
 /**
@@ -100,6 +141,8 @@ typedef struct {
         .stack_input = NULL,             \
         .on_lowlevel_init_done = NULL,   \
         .on_lowlevel_deinit_done = NULL, \
+        .read_phy_reg = NULL,            \
+        .write_phy_reg = NULL,           \
     }
 
 /**
diff --git a/tools/sdk/esp32c3/include/esp_eth/include/esp_eth_mac.h b/tools/sdk/esp32c3/include/esp_eth/include/esp_eth_mac.h
index 7543fdd2..042c369f 100644
--- a/tools/sdk/esp32c3/include/esp_eth/include/esp_eth_mac.h
+++ b/tools/sdk/esp32c3/include/esp_eth/include/esp_eth_mac.h
@@ -396,6 +396,39 @@ typedef struct {
 esp_eth_mac_t *esp_eth_mac_new_w5500(const eth_w5500_config_t *w5500_config, const eth_mac_config_t *mac_config);
 #endif // CONFIG_ETH_SPI_ETHERNET_W5500
 
+#if CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL
+/**
+ * @brief KSZ8851SNL specific configuration
+ *
+ */
+typedef struct {
+    void *spi_hdl;     /*!< Handle of SPI device driver */
+    int int_gpio_num;  /*!< Interrupt GPIO number */
+} eth_ksz8851snl_config_t;
+
+/**
+ * @brief Default KSZ8851SNL specific configuration
+ *
+ */
+#define ETH_KSZ8851SNL_DEFAULT_CONFIG(spi_device) \
+    {                                        \
+        .spi_hdl = spi_device,               \
+        .int_gpio_num = 14,                   \
+    }
+
+/**
+* @brief Create KSZ8851SNL Ethernet MAC instance
+*
+* @param ksz8851snl_config: KSZ8851SNL specific configuration
+* @param mac_config: Ethernet MAC configuration
+*
+* @return
+*      - instance: create MAC instance successfully
+*      - NULL: create MAC instance failed because some error occurred
+*/
+esp_eth_mac_t *esp_eth_mac_new_ksz8851snl(const eth_ksz8851snl_config_t *ksz8851snl_config, const eth_mac_config_t *mac_config);
+#endif // CONFIG_ETH_SPI_ETHERNET_KSZ8851
+
 #if CONFIG_ETH_USE_OPENETH
 /**
 * @brief Create OpenCores Ethernet MAC instance
diff --git a/tools/sdk/esp32c3/include/esp_eth/include/esp_eth_phy.h b/tools/sdk/esp32c3/include/esp_eth/include/esp_eth_phy.h
index 9dbc2ef9..c9d32b36 100644
--- a/tools/sdk/esp32c3/include/esp_eth/include/esp_eth_phy.h
+++ b/tools/sdk/esp32c3/include/esp_eth/include/esp_eth_phy.h
@@ -300,6 +300,19 @@ esp_eth_phy_t *esp_eth_phy_new_dm9051(const eth_phy_config_t *config);
 */
 esp_eth_phy_t *esp_eth_phy_new_w5500(const eth_phy_config_t *config);
 #endif
+
+#if CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL
+/**
+* @brief Create a PHY instance of KSZ8851SNL
+*
+* @param[in] config: configuration of PHY
+*
+* @return
+*      - instance: create PHY instance successfully
+*      - NULL: create PHY instance failed because some error occurred
+*/
+esp_eth_phy_t *esp_eth_phy_new_ksz8851snl(const eth_phy_config_t *config);
+#endif
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/include/esp_event/include/esp_event_legacy.h b/tools/sdk/esp32c3/include/esp_event/include/esp_event_legacy.h
index 021ac407..dbeeced6 100644
--- a/tools/sdk/esp32c3/include/esp_event/include/esp_event_legacy.h
+++ b/tools/sdk/esp32c3/include/esp_event/include/esp_event_legacy.h
@@ -58,6 +58,7 @@ typedef enum {
     SYSTEM_EVENT_ETH_CONNECTED,            /*!< ESP32 ethernet phy link up */
     SYSTEM_EVENT_ETH_DISCONNECTED,         /*!< ESP32 ethernet phy link down */
     SYSTEM_EVENT_ETH_GOT_IP,               /*!< ESP32 ethernet got IP from connected AP */
+    SYSTEM_EVENT_ETH_LOST_IP,              /*!< ESP32 ethernet lost IP and the IP is reset to 0 */
     SYSTEM_EVENT_MAX                       /*!< Number of members in this enum */
 } system_event_id_t;
 
diff --git a/tools/sdk/esp32c3/include/esp_hid/include/esp_hidh.h b/tools/sdk/esp32c3/include/esp_hid/include/esp_hidh.h
index b1a82643..d3d10021 100644
--- a/tools/sdk/esp32c3/include/esp_hid/include/esp_hidh.h
+++ b/tools/sdk/esp32c3/include/esp_hid/include/esp_hidh.h
@@ -100,6 +100,7 @@ typedef union {
 
 typedef struct {
     esp_event_handler_t callback;
+    uint16_t event_stack_size;
 } esp_hidh_config_t;
 
 /**
diff --git a/tools/sdk/esp32c3/include/esp_http_client/include/esp_http_client.h b/tools/sdk/esp32c3/include/esp_http_client/include/esp_http_client.h
index 249eb217..0f89972f 100644
--- a/tools/sdk/esp32c3/include/esp_http_client/include/esp_http_client.h
+++ b/tools/sdk/esp32c3/include/esp_http_client/include/esp_http_client.h
@@ -334,7 +334,7 @@ esp_err_t esp_http_client_get_password(esp_http_client_handle_t client, char **v
  *     - ESP_OK
  *     - ESP_ERR_INVALID_ARG
  */
-esp_err_t esp_http_client_set_password(esp_http_client_handle_t client, char *password);
+esp_err_t esp_http_client_set_password(esp_http_client_handle_t client, const char *password);
 
 /**
  * @brief      Set http request auth_type.
@@ -360,6 +360,18 @@ esp_err_t esp_http_client_set_authtype(esp_http_client_handle_t client, esp_http
  */
 esp_err_t esp_http_client_set_method(esp_http_client_handle_t client, esp_http_client_method_t method);
 
+/**
+ * @brief      Set http request timeout
+ *
+ * @param[in]  client      The esp_http_client handle
+ * @param[in]  timeout_ms  The timeout value
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_ERR_INVALID_ARG
+ */
+esp_err_t esp_http_client_set_timeout_ms(esp_http_client_handle_t client, int timeout_ms);
+
 /**
  * @brief      Delete http request header
  *
diff --git a/tools/sdk/esp32c3/include/esp_https_ota/include/esp_https_ota.h b/tools/sdk/esp32c3/include/esp_https_ota/include/esp_https_ota.h
index 2a987ca6..a87ba8df 100644
--- a/tools/sdk/esp32c3/include/esp_https_ota/include/esp_https_ota.h
+++ b/tools/sdk/esp32c3/include/esp_https_ota/include/esp_https_ota.h
@@ -201,6 +201,21 @@ esp_err_t esp_https_ota_get_img_desc(esp_https_ota_handle_t https_ota_handle, es
 */
 int esp_https_ota_get_image_len_read(esp_https_ota_handle_t https_ota_handle);
 
+
+/**
+* @brief  This function returns OTA image total size.
+*
+* @note   This API should be called after esp_https_ota_begin() has been already called.
+*         This can be used to create some sort of progress indication
+*         (in combination with esp_https_ota_get_image_len_read())
+*
+* @param[in]   https_ota_handle   pointer to esp_https_ota_handle_t structure
+*
+* @return
+*    - -1    On failure or chunked encoding
+*    - total bytes of image
+*/
+int esp_https_ota_get_image_size(esp_https_ota_handle_t https_ota_handle);
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/esp_mac.h b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_mac.h
index 9d91d8ce..698ccaa6 100644
--- a/tools/sdk/esp32c3/include/esp_hw_support/include/esp_mac.h
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_mac.h
@@ -47,17 +47,17 @@ typedef enum {
   * @brief  Set base MAC address with the MAC address which is stored in BLK3 of EFUSE or
   *         external storage e.g. flash and EEPROM.
   *
-  * Base MAC address is used to generate the MAC addresses used by the networking interfaces.
-  * If using base MAC address stored in BLK3 of EFUSE or external storage, call this API to set base MAC
-  * address with the MAC address which is stored in BLK3 of EFUSE or external storage before initializing
-  * WiFi/BT/Ethernet.
+  * Base MAC address is used to generate the MAC addresses used by network interfaces.
+  *
+  * If using a custom base MAC address, call this API before initializing any network interfaces.
+  * Refer to the ESP-IDF Programming Guide for details about how the Base MAC is used.
   *
   * @note Base MAC must be a unicast MAC (least significant bit of first byte must be zero).
   *
   * @note If not using a valid OUI, set the "locally administered" bit
   *       (bit value 0x02 in the first byte) to avoid collisions.
   *
-  * @param  mac  base MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes.
   *
   * @return ESP_OK on success
   *         ESP_ERR_INVALID_ARG If mac is NULL or is not a unicast MAC
@@ -67,7 +67,9 @@ esp_err_t esp_base_mac_addr_set(const uint8_t *mac);
 /**
   * @brief  Return base MAC address which is set using esp_base_mac_addr_set.
   *
-  * @param  mac  base MAC address, length: 6 bytes.
+  * @note If no custom Base MAC has been set, this returns the pre-programmed Espressif base MAC address.
+  *
+  * @param  mac base MAC address, length: 6 bytes.
   *
   * @return ESP_OK on success
   *         ESP_ERR_INVALID_MAC base MAC address has not been set
@@ -78,10 +80,14 @@ esp_err_t esp_base_mac_addr_get(uint8_t *mac);
   * @brief  Return base MAC address which was previously written to BLK3 of EFUSE.
   *
   * Base MAC address is used to generate the MAC addresses used by the networking interfaces.
-  * This API returns the custom base MAC address which was previously written to BLK3 of EFUSE.
+  * This API returns the custom base MAC address which was previously written to EFUSE BLK3 in
+  * a specified format.
+  *
   * Writing this EFUSE allows setting of a different (non-Espressif) base MAC address. It is also
   * possible to store a custom base MAC address elsewhere, see esp_base_mac_addr_set() for details.
   *
+  * @note This function is currently only supported on ESP32.
+  *
   * @param  mac  base MAC address, length: 6 bytes.
   *
   * @return ESP_OK on success
@@ -91,7 +97,7 @@ esp_err_t esp_base_mac_addr_get(uint8_t *mac);
 esp_err_t esp_efuse_mac_get_custom(uint8_t *mac);
 
 /**
-  * @brief  Return base MAC address which is factory-programmed by Espressif in BLK0 of EFUSE.
+  * @brief  Return base MAC address which is factory-programmed by Espressif in EFUSE.
   *
   * @param  mac  base MAC address, length: 6 bytes.
   *
@@ -102,12 +108,12 @@ esp_err_t esp_efuse_mac_get_default(uint8_t *mac);
 /**
   * @brief  Read base MAC address and set MAC address of the interface.
   *
-  * This function first get base MAC address using esp_base_mac_addr_get or reads base MAC address
-  * from BLK0 of EFUSE. Then set the MAC address of the interface including wifi station, wifi softap,
-  * bluetooth and ethernet.
+  * This function first get base MAC address using esp_base_mac_addr_get().
+  * Then calculates the MAC address of the specific interface requested,
+  * refer to ESP-IDF Programming Guide for the algorithm.
   *
   * @param  mac  MAC address of the interface, length: 6 bytes.
-  * @param  type  type of MAC address, 0:wifi station, 1:wifi softap, 2:bluetooth, 3:ethernet.
+  * @param  type Type of MAC address to return
   *
   * @return ESP_OK on success
   */
@@ -116,11 +122,13 @@ esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type);
 /**
   * @brief Derive local MAC address from universal MAC address.
   *
-  * This function derives a local MAC address from an universal MAC address.
-  * A `definition of local vs universal MAC address can be found on Wikipedia
-  * <https://en.wikipedia.org/wiki/MAC_address#Universal_vs._local>`.
-  * In ESP32, universal MAC address is generated from base MAC address in EFUSE or other external storage.
-  * Local MAC address is derived from the universal MAC address.
+  * This function copies a universal MAC address and then sets the "locally
+  * administered" bit (bit 0x2) in the first octet, creating a locally
+  * administered MAC address.
+  *
+  * If the universal MAC address argument is already a locally administered MAC
+  * address, then the first octet is XORed with 0x4 in order to create a different
+  * locally administered MAC address.
   *
   * @param  local_mac  Derived local MAC address, length: 6 bytes.
   * @param  universal_mac  Source universal MAC address, length: 6 bytes.
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/esp_random.h b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_random.h
index 26756b9d..7064fa81 100644
--- a/tools/sdk/esp32c3/include/esp_hw_support/include/esp_random.h
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_random.h
@@ -24,16 +24,27 @@ extern "C" {
 /**
  * @brief  Get one random 32-bit word from hardware RNG
  *
- * The hardware RNG is fully functional whenever an RF subsystem is running (ie Bluetooth or WiFi is enabled). For
- * random values, call this function after WiFi or Bluetooth are started.
+ * The hardware RNG produces true random numbers under any of the following conditions:
  *
- * If the RF subsystem is not used by the program, the function bootloader_random_enable() can be called to enable an
- * entropy source. bootloader_random_disable() must be called before RF subsystem or I2S peripheral are used. See these functions'
- * documentation for more details.
+ * - An RF subsystem is running (i.e. Bluetooth or WiFi is enabled)
+ * - An internal entropy source has been enabled by calling bootloader_random_enable()
+ *   and not yet disabled by calling bootloader_random_disable()
+ * - While the ESP-IDF bootloader is running (due to the internal entropy source being enabled
+ *   for the duration of bootloader execution).
  *
- * Any time the app is running without an RF subsystem (or bootloader_random) enabled, RNG hardware should be
- * considered a PRNG. A very small amount of entropy is available due to pre-seeding while the IDF
- * bootloader is running, but this should not be relied upon for any use.
+ * If none of the above conditions are true, the hardware RNG will produce pseudo-random numbers only.
+ *
+ * When the hardware RNG is producing true random numbers, external entropy (noise samples) are
+ * continuously mixed into the internal hardware RNG state. Consult the SoC Technical Reference Manual
+ * for more details.
+ *
+ * This function automatically busy-waits to ensure enough external entropy has been
+ * introduced into the hardware RNG state, before returning a new random number.
+ *
+ * If generating random numbers from an app which has not yet enabled Bluetooth or Wi-Fi, call the
+ * API function bootloader_random_enable() before generating random numbers and then call
+ * bootloader_random_disable() before using any APIs for Bluetooth, Wi-Fi, ADC, or I2S. Consult the
+ * bootloader_random.h header for more details.
  *
  * @return Random value between 0 and UINT32_MAX
  */
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/include/esp_sleep.h b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_sleep.h
index 1d81f716..000d020a 100644
--- a/tools/sdk/esp32c3/include/esp_hw_support/include/esp_sleep.h
+++ b/tools/sdk/esp32c3/include/esp_hw_support/include/esp_sleep.h
@@ -303,6 +303,12 @@ esp_err_t esp_sleep_enable_uart_wakeup(int uart_num);
  */
 esp_err_t esp_sleep_enable_wifi_wakeup(void);
 
+/**
+ * @brief Disable wakeup by WiFi MAC
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t esp_sleep_disable_wifi_wakeup(void);
 
 /**
  * @brief Get the bit mask of GPIOs which caused wakeup (ext1)
diff --git a/tools/sdk/esp32c3/include/esp_hw_support/port/esp32c3/regi2c_ctrl.h b/tools/sdk/esp32c3/include/esp_hw_support/port/esp32c3/regi2c_ctrl.h
index dbca47e0..95f26266 100644
--- a/tools/sdk/esp32c3/include/esp_hw_support/port/esp32c3/regi2c_ctrl.h
+++ b/tools/sdk/esp32c3/include/esp_hw_support/port/esp32c3/regi2c_ctrl.h
@@ -64,20 +64,45 @@ uint8_t rom_i2c_readReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, ui
 void rom_i2c_writeReg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data);
 void rom_i2c_writeReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data);
 
+#ifdef BOOTLOADER_BUILD
+
+/**
+ * If compiling for the bootloader, ROM functions can be called directly,
+ * without the need of a lock.
+ */
+#define regi2c_ctrl_read_reg         rom_i2c_readReg
+#define regi2c_ctrl_read_reg_mask    rom_i2c_readReg_Mask
+#define regi2c_ctrl_write_reg        rom_i2c_writeReg
+#define regi2c_ctrl_write_reg_mask   rom_i2c_writeReg_Mask
+
+#else
+
+#define i2c_read_reg_raw        rom_i2c_readReg
+#define i2c_read_reg_mask_raw   rom_i2c_readReg_Mask
+#define i2c_write_reg_raw       rom_i2c_writeReg
+#define i2c_write_reg_mask_raw  rom_i2c_writeReg_Mask
+
+uint8_t regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add);
+uint8_t regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb);
+void regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data);
+void regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data);
+
+#endif // BOOTLOADER_BUILD
+
 /* Convenience macros for the above functions, these use register definitions
  * from regi2c_bbpll.h/regi2c_dig_reg.h/regi2c_lp_bias.h/regi2c_bias.h header files.
  */
 #define REGI2C_WRITE_MASK(block, reg_add, indata) \
-      rom_i2c_writeReg_Mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB,  indata)
+      regi2c_ctrl_write_reg_mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB,  indata)
 
 #define REGI2C_READ_MASK(block, reg_add) \
-      rom_i2c_readReg_Mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB)
+      regi2c_ctrl_read_reg_mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB)
 
 #define REGI2C_WRITE(block, reg_add, indata) \
-      rom_i2c_writeReg(block, block##_HOSTID,  reg_add, indata)
+      regi2c_ctrl_write_reg(block, block##_HOSTID,  reg_add, indata)
 
 #define REGI2C_READ(block, reg_add) \
-      rom_i2c_readReg(block, block##_HOSTID,  reg_add)
+      regi2c_ctrl_read_reg(block, block##_HOSTID,  reg_add)
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_panel_io.h b/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_panel_io.h
new file mode 100644
index 00000000..c362180f
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_panel_io.h
@@ -0,0 +1,201 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_lcd_types.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef void *esp_lcd_spi_bus_handle_t;                       /*!< Type of LCD SPI bus handle */
+typedef void *esp_lcd_i2c_bus_handle_t;                       /*!< Type of LCD I2C bus handle */
+typedef struct esp_lcd_i80_bus_t *esp_lcd_i80_bus_handle_t;   /*!< Type of LCD intel 8080 bus handle */
+
+/**
+ * @brief Transmit LCD command and corresponding parameters
+ *
+ * @note Commands sent by this function are short, so they are sent using polling transactions.
+ *       The function does not return before the command tranfer is completed.
+ *       If any queued transactions sent by `esp_lcd_panel_io_tx_color()` are still pending when this function is called,
+ *       this function will wait until they are finished and the queue is empty before sending the command(s).
+ *
+ * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()`
+ * @param[in] lcd_cmd The specific LCD command
+ * @param[in] lcd_cmd_bits Length of LCD command, in bits (e.g. 8 bits or 16 bits)
+ * @param[in] param Buffer that holds the command specific parameters, set to NULL if no parameter is needed for the command
+ * @param[in] param_size Size of `param` in memory, in bytes, set to zero if no parameter is needed for the command
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_panel_io_tx_param(esp_lcd_panel_io_handle_t io, int lcd_cmd, int lcd_cmd_bits, const void *param, size_t param_size);
+
+/**
+ * @brief Transmit LCD RGB data
+ *
+ * @note This function will package the command and RGB data into a transaction, and push into a queue.
+ *       The real transmission is performed in the background (DMA+interrupt).
+ *       The caller should take care of the lifecycle of the `color` buffer.
+ *       Recycling of color buffer should be done in the callback `on_color_trans_done()`.
+ *
+ * @param[in] io LCD panel IO handle, which is created by factory API like `esp_lcd_new_panel_io_spi()`
+ * @param[in] lcd_cmd The specific LCD command
+ * @param[in] lcd_cmd_bits Length of LCD command, in bits (e.g. 8 bits or 16 bits)
+ * @param[in] color Buffer that holds the RGB color data
+ * @param[in] color_size Size of `color` in memory, in bytes
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_panel_io_tx_color(esp_lcd_panel_io_handle_t io, int lcd_cmd, int lcd_cmd_bits, const void *color, size_t color_size);
+
+/**
+ * @brief Destory LCD panel IO handle (deinitialize panel and free all corresponding resource)
+ *
+ * @param[in] io LCD panel IO handle, which is created by factory API like `esp_lcd_new_panel_io_spi()`
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_panel_io_del(esp_lcd_panel_io_handle_t io);
+
+/**
+ * @brief Panel IO configuration structure, for SPI interface
+ */
+typedef struct {
+    int cs_gpio_num; /*!< GPIO used for CS line */
+    int dc_gpio_num; /*!< GPIO used to select the D/C line, set this to -1 if the D/C line not controlled by manually pulling high/low GPIO */
+    int spi_mode;    /*!< Traditional SPI mode (0~3) */
+    unsigned int pclk_hz;    /*!< Frequency of pixel clock */
+    size_t trans_queue_depth; /*!< Size of internal transaction queue */
+    bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); /*!< Callback, invoked when color data transfer has finished */
+    void *user_data; /*!< User private data, passed directly to on_trans_frame_done's user_data */
+    struct {
+        unsigned int dc_as_cmd_phase: 1; /*!< D/C line value is encoded into SPI transaction command phase */
+        unsigned int dc_low_on_data: 1;  /*!< If this flag is enabled, DC line = 0 means transfer data, DC line = 1 means transfer command; vice versa */
+    } flags;
+} esp_lcd_panel_io_spi_config_t;
+
+/**
+ * @brief Create LCD panel IO handle, for SPI interface
+ *
+ * @param[in] bus SPI bus handle
+ * @param[in] io_config IO configuration, for SPI interface
+ * @param[out] ret_io Returned IO handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_io_spi(esp_lcd_spi_bus_handle_t bus, const esp_lcd_panel_io_spi_config_t *io_config, esp_lcd_panel_io_handle_t *ret_io);
+
+typedef struct {
+    uint32_t dev_addr; /*!< I2C device address */
+    bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); /*!< Callback, invoked when color data transfer has finished */
+    void *user_data; /*!< User private data, passed directly to on_trans_frame_done's user_data */
+    size_t control_phase_bytes; /*!< I2C LCD panel will encode control information (e.g. D/C seclection) into control phase, in several bytes */
+    unsigned int dc_bit_offset; /*!< Offset of the D/C selection bit in control phase */
+    struct {
+        unsigned int dc_low_on_data: 1;  /*!< If this flag is enabled, DC line = 0 means transfer data, DC line = 1 means transfer command; vice versa */
+    } flags;
+} esp_lcd_panel_io_i2c_config_t;
+
+/**
+ * @brief Create LCD panel IO handle, for I2C interface
+ *
+ * @param[in] bus I2C bus handle
+ * @param[in] io_config IO configuration, for I2C interface
+ * @param[out] ret_io Returned IO handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_io_i2c(esp_lcd_i2c_bus_handle_t bus, const esp_lcd_panel_io_i2c_config_t *io_config, esp_lcd_panel_io_handle_t *ret_io);
+
+#if SOC_LCD_I80_SUPPORTED
+/**
+ * @brief LCD Intel 8080 bus configuration structure
+ */
+typedef struct {
+    int dc_gpio_num; /*!< GPIO used for D/C line */
+    int wr_gpio_num; /*!< GPIO used for WR line */
+    int data_gpio_nums[SOC_LCD_I80_BUS_WIDTH]; /*!< GPIOs used for data lines */
+    size_t data_width;         /*!< Number of data lines, 8 or 16 */
+    size_t max_transfer_bytes; /*!< Maximum transfer size, this determines the length of internal DMA link */
+} esp_lcd_i80_bus_config_t;
+
+/**
+ * @brief Create Intel 8080 bus handle
+ *
+ * @param[in] bus_config Bus configuration
+ * @param[out] ret_bus Returned bus handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_ERR_NOT_FOUND     if no free bus is available
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lcd_i80_bus_handle_t *ret_bus);
+
+/**
+ * @brief Destory Intel 8080 bus handle
+ *
+ * @param[in] bus Intel 8080 bus handle, created by `esp_lcd_new_i80_bus()`
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_INVALID_STATE if there still be some device attached to the bus
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_del_i80_bus(esp_lcd_i80_bus_handle_t bus);
+
+/**
+ * @brief Panel IO configuration structure, for intel 8080 interface
+ */
+typedef struct {
+    int cs_gpio_num;         /*!< GPIO used for CS line */
+    unsigned int pclk_hz;    /*!< Frequency of pixel clock */
+    size_t trans_queue_depth; /*!< Transaction queue size, larger queue, higher throughput */
+    bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); /*!< Callback, invoked when color data was tranferred done */
+    void *user_data; /*!< User private data, passed directly to on_trans_done's user_data */
+    struct {
+        unsigned int dc_idle_level: 1;  /*!< Level of DC line in IDLE phase */
+        unsigned int dc_cmd_level: 1;   /*!< Level of DC line in CMD phase */
+        unsigned int dc_dummy_level: 1; /*!< Level of DC line in DUMMY phase */
+        unsigned int dc_data_level: 1;  /*!< Level of DC line in DATA phase */
+    } dc_levels; /*!< Each i80 device might have its own D/C control logic */
+    struct {
+        unsigned int invert_cs: 1;          /*!< Whether to invert the CS line */
+        unsigned int reverse_color_bits: 1; /*!< Reverse the data bits, D[N:0] -> D[0:N] */
+        unsigned int swap_color_bytes: 1;   /*!< Swap adjacent two color bytes */
+        unsigned int pclk_active_neg: 1;    /*!< The display will write data lines when there's a falling edge on WR signal (a.k.a the PCLK) */
+        unsigned int pclk_idle_low: 1;      /*!< The WR signal (a.k.a the PCLK) stays at low level in IDLE phase */
+    } flags;
+} esp_lcd_panel_io_i80_config_t;
+
+/**
+ * @brief Create LCD panel IO, for Intel 8080 interface
+ *
+ * @param[in] bus Intel 8080 bus handle, created by `esp_lcd_new_i80_bus()`
+ * @param[in] io_config IO configuration, for i80 interface
+ * @param[out] ret_io Returned panel IO handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NOT_SUPPORTED if some configuration can't be satisfied, e.g. pixel clock out of the range
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_io_i80(esp_lcd_i80_bus_handle_t bus, const esp_lcd_panel_io_i80_config_t *io_config, esp_lcd_panel_io_handle_t *ret_io);
+
+#endif // SOC_LCD_I80_SUPPORTED
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_panel_ops.h b/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_panel_ops.h
new file mode 100644
index 00000000..5099233c
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_panel_ops.h
@@ -0,0 +1,126 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_lcd_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Reset LCD panel
+ *
+ * @note Panel reset must be called before attempting to initialize the panel using `esp_lcd_panel_init()`.
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_reset(esp_lcd_panel_handle_t panel);
+
+/**
+ * @brief Initialize LCD panel
+ *
+ * @note Before calling this function, make sure the LCD panel has finished the `reset` stage by `esp_lcd_panel_reset()`.
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_init(esp_lcd_panel_handle_t panel);
+
+/**
+ * @brief Deinitialize the LCD panel
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_del(esp_lcd_panel_handle_t panel);
+
+/**
+ * @brief Draw bitmap on LCD panel
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] x_start Start index on x-axis (x_start included)
+ * @param[in] y_start Start index on y-axis (y_start included)
+ * @param[in] x_end End index on x-axis (x_end not included)
+ * @param[in] y_end End index on y-axis (y_end not included)
+ * @param[in] color_data RGB color data that will be dumped to the specific window range
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_draw_bitmap(esp_lcd_panel_handle_t panel, int x_start, int y_start, int x_end, int y_end, const void *color_data);
+
+/**
+ * @brief Mirror the LCD panel on specific axis
+ *
+ * @note Combined with `esp_lcd_panel_swap_xy()`, one can realize screen rotation
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] mirror_x Whether the panel will be mirrored about the x axis
+ * @param[in] mirror_y Whether the panel will be mirrored about the y axis
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+ */
+esp_err_t esp_lcd_panel_mirror(esp_lcd_panel_handle_t panel, bool mirror_x, bool mirror_y);
+
+/**
+ * @brief Swap/Exchange x and y axis
+ *
+ * @note Combined with `esp_lcd_panel_mirror()`, one can realize screen rotation
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] swap_axes Whether to swap the x and y axis
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+ */
+esp_err_t esp_lcd_panel_swap_xy(esp_lcd_panel_handle_t panel, bool swap_axes);
+
+/**
+ * @brief Set extra gap in x and y axis
+ *
+ * The gap is the space (in pixels) between the left/top sides of the LCD panel and the first row/column respectively of the actual contents displayed.
+ *
+ * @note Setting a gap is useful when positioning or centering a frame that is smaller than the LCD.
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] x_gap Extra gap on x axis, in pixels
+ * @param[in] y_gap Extra gap on y axis, in pixels
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_set_gap(esp_lcd_panel_handle_t panel, int x_gap, int y_gap);
+
+/**
+ * @brief Invert the color (bit-wise invert the color data line)
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] invert_color_data Whether to invert the color data
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_invert_color(esp_lcd_panel_handle_t panel, bool invert_color_data);
+
+/**
+ * @brief Turn off the display
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] off Whether to turn off the screen
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+ */
+esp_err_t esp_lcd_panel_disp_off(esp_lcd_panel_handle_t panel, bool off);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_panel_rgb.h b/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_panel_rgb.h
new file mode 100644
index 00000000..0847e84b
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_panel_rgb.h
@@ -0,0 +1,77 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_lcd_types.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if SOC_LCD_RGB_SUPPORTED
+/**
+ * @brief LCD RGB timing structure
+ */
+typedef struct {
+    unsigned int pclk_hz;           /*!< Frequency of pixel clock */
+    unsigned int h_res;             /*!< Horizontal resolution, i.e. the number of pixels in a line */
+    unsigned int v_res;             /*!< Vertical resolution, i.e. the number of lines in the frame  */
+    unsigned int hsync_pulse_width; /*!< Horizontal sync width, unit: PCLK period */
+    unsigned int hsync_back_porch;  /*!< Horizontal back porch, number of PCLK between hsync and start of line active data */
+    unsigned int hsync_front_porch; /*!< Horizontal front porch, number of PCLK between the end of active data and the next hsync */
+    unsigned int vsync_pulse_width; /*!< Vertical sync width, unit: number of lines */
+    unsigned int vsync_back_porch;  /*!< Vertical back porch, number of invalid lines between vsync and start of frame */
+    unsigned int vsync_front_porch; /*!< Vertical front porch, number of invalid lines between then end of frame and the next vsync */
+    struct {
+        unsigned int hsync_idle_low: 1;  /*!< The hsync signal is low in IDLE state */
+        unsigned int vsync_idle_low: 1;  /*!< The vsync signal is low in IDLE state */
+        unsigned int de_idle_high: 1;    /*!< The de signal is high in IDLE state */
+        unsigned int pclk_active_neg: 1; /*!< The display will write data lines when there's a falling edge on PCLK */
+        unsigned int pclk_idle_low: 1;   /*!< The PCLK stays at low level in IDLE phase */
+    } flags;
+} esp_lcd_rgb_timing_t;
+
+/**
+ * @brief LCD RGB panel configuration structure
+ */
+typedef struct {
+    esp_lcd_rgb_timing_t timings; /*!< RGB timing parameters */
+    size_t data_width;            /*!< Number of data lines */
+    int hsync_gpio_num;           /*!< GPIO used for HSYNC signal */
+    int vsync_gpio_num;           /*!< GPIO used for VSYNC signal */
+    int de_gpio_num;              /*!< GPIO used for DE signal, set to -1 if it's not used */
+    int pclk_gpio_num;            /*!< GPIO used for PCLK signal */
+    int data_gpio_nums[SOC_LCD_RGB_DATA_WIDTH]; /*!< GPIOs used for data lines */
+    int disp_gpio_num; /*!< GPIO used for display control signal, set to -1 if it's not used */
+    bool (*on_frame_trans_done)(esp_lcd_panel_handle_t panel, void *user_data); /*!< Callback, invoked when one frame buffer has transferred done */
+    void *user_data; /*!< User data which would be passed to on_frame_trans_done's user_data */
+    struct {
+        unsigned int disp_active_low: 1; /*!< If this flag is enabled, a low level of display control signal can turn the screen on; vice versa */
+        unsigned int relax_on_idle: 1;   /*!< If this flag is enabled, the host won't refresh the LCD if nothing changed in host's frame buffer (this is usefull for LCD with built-in GRAM) */
+    } flags;
+} esp_lcd_rgb_panel_config_t;
+
+/**
+ * @brief Create RGB LCD panel
+ *
+ * @param rgb_panel_config RGB panel configuration
+ * @param ret_panel Returned LCD panel handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_ERR_NOT_FOUND     if no free RGB panel is available
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_rgb_panel(const esp_lcd_rgb_panel_config_t *rgb_panel_config, esp_lcd_panel_handle_t *ret_panel);
+
+#endif // SOC_LCD_RGB_SUPPORTED
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_panel_vendor.h b/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_panel_vendor.h
new file mode 100644
index 00000000..ac98cc39
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_panel_vendor.h
@@ -0,0 +1,57 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_lcd_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Configuration structure for panel device
+ */
+typedef struct {
+    int reset_gpio_num; /*!< GPIO used to reset the LCD panel, set to -1 if it's not used */
+    esp_lcd_color_space_t color_space; /*!< Set the color space used by the LCD panel */
+    unsigned int bits_per_pixel;       /*!< Color depth, in bpp */
+    struct {
+        unsigned int reset_active_high: 1; /*!< Setting this if the panel reset is high level active */
+    } flags;
+    void *vendor_config; /* vendor specific configuration, optional, left as NULL if not used */
+} esp_lcd_panel_dev_config_t;
+
+/**
+ * @brief Create LCD panel for model ST7789
+ *
+ * @param[in] io LCD panel IO handle
+ * @param[in] panel_dev_config general panel device configuration
+ * @param[out] ret_panel Returned LCD panel handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_st7789(const esp_lcd_panel_io_handle_t io, const esp_lcd_panel_dev_config_t *panel_dev_config, esp_lcd_panel_handle_t *ret_panel);
+
+/**
+ * @brief Create LCD panel for model SSD1306
+ *
+ * @param[in] io LCD panel IO handle
+ * @param[in] panel_dev_config general panel device configuration
+ * @param[out] ret_panel Returned LCD panel handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_ssd1306(const esp_lcd_panel_io_handle_t io, const esp_lcd_panel_dev_config_t *panel_dev_config, esp_lcd_panel_handle_t *ret_panel);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_types.h b/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_types.h
new file mode 100644
index 00000000..7d495324
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_lcd/include/esp_lcd_types.h
@@ -0,0 +1,26 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct esp_lcd_panel_io_t *esp_lcd_panel_io_handle_t; /*!< Type of LCD panel IO handle */
+typedef struct esp_lcd_panel_t *esp_lcd_panel_handle_t;       /*!< Type of LCD panel handle */
+
+/**
+ * @brief LCD color space type definition
+ */
+typedef enum {
+    ESP_LCD_COLOR_SPACE_RGB,        /*!< Color space: RGB */
+    ESP_LCD_COLOR_SPACE_BGR,        /*!< Color space: BGR */
+    ESP_LCD_COLOR_SPACE_MONOCHROME, /*!< Color space: monochrome */
+} esp_lcd_color_space_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_lcd/interface/esp_lcd_panel_interface.h b/tools/sdk/esp32c3/include/esp_lcd/interface/esp_lcd_panel_interface.h
new file mode 100644
index 00000000..0705b145
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_lcd/interface/esp_lcd_panel_interface.h
@@ -0,0 +1,126 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct esp_lcd_panel_t esp_lcd_panel_t;  /*!< Type of LCD panel */
+
+/**
+ * @brief LCD panel interface
+ */
+struct esp_lcd_panel_t {
+    /**
+     * @brief Reset LCD panel
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*reset)(esp_lcd_panel_t *panel);
+
+    /**
+     * @brief Initialize LCD panel
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*init)(esp_lcd_panel_t *panel);
+
+    /**
+     * @brief Destory LCD panel
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*del)(esp_lcd_panel_t *panel);
+
+    /**
+     * @brief Draw bitmap on LCD panel
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] x_start Start index on x-axis (x_start included)
+     * @param[in] y_start Start index on y-axis (y_start included)
+     * @param[in] x_end End index on x-axis (x_end not included)
+     * @param[in] y_end End index on y-axis (y_end not included)
+     * @param[in] color_data RGB color data that will be dumped to the specific window range
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*draw_bitmap)(esp_lcd_panel_t *panel, int x_start, int y_start, int x_end, int y_end, const void *color_data);
+
+    /**
+     * @brief Mirror the LCD panel on specific axis
+     *
+     * @note Combine this function with `swap_xy`, one can realize screen rotatation
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] x_axis Whether the panel will be mirrored about the x_axis
+     * @param[in] y_axis Whether the panel will be mirrored about the y_axis
+     * @return
+     *          - ESP_OK on success
+     *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+     */
+    esp_err_t (*mirror)(esp_lcd_panel_t *panel, bool x_axis, bool y_axis);
+
+    /**
+     * @brief Swap/Exchange x and y axis
+     *
+     * @note Combine this function with `mirror`, one can realize screen rotatation
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] swap_axes Whether to swap the x and y axis
+     * @return
+     *          - ESP_OK on success
+     *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+     */
+    esp_err_t (*swap_xy)(esp_lcd_panel_t *panel, bool swap_axes);
+
+    /**
+     * @brief Set extra gap in x and y axis
+     *
+     * @note The gap is only used for calculating the real coordinates.
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] x_gap Extra gap on x axis, in pixels
+     * @param[in] y_gap Extra gap on y axis, in pixels
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*set_gap)(esp_lcd_panel_t *panel, int x_gap, int y_gap);
+
+    /**
+     * @brief Invert the color (bit 1 -> 0 for color data line, and vice versa)
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] invert_color_data Whether to invert the color data
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*invert_color)(esp_lcd_panel_t *panel, bool invert_color_data);
+
+    /**
+     * @brief Turn off the display
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] off Whether to turn off the screen
+     * @return
+     *          - ESP_OK on success
+     *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+     */
+    esp_err_t (*disp_off)(esp_lcd_panel_t *panel, bool off);
+};
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_lcd/interface/esp_lcd_panel_io_interface.h b/tools/sdk/esp32c3/include/esp_lcd/interface/esp_lcd_panel_io_interface.h
new file mode 100644
index 00000000..b6b85564
--- /dev/null
+++ b/tools/sdk/esp32c3/include/esp_lcd/interface/esp_lcd_panel_io_interface.h
@@ -0,0 +1,66 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct esp_lcd_panel_io_t esp_lcd_panel_io_t; /*!< Type of LCD panel IO */
+
+/**
+ * @brief LCD panel IO interface
+ */
+struct esp_lcd_panel_io_t {
+    /**
+     * @brief Transmit LCD command and corresponding parameters
+     *
+     * @note This is the panel-specific interface called by function `esp_lcd_panel_io_tx_param()`.
+     *
+     * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()`
+     * @param[in] lcd_cmd The specific LCD command
+     * @param[in] lcd_cmd_bits Length of LCD command, in bits (e.g. 8 bits or 16 bits)
+     * @param[in] param Buffer that holds the command specific parameters, set to NULL if no parameter is needed for the command
+     * @param[in] param_size Size of `param` in memory, in bytes, set to zero if no parameter is needed for the command
+     * @return
+     *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+     *          - ESP_OK                on success
+     */
+    esp_err_t (*tx_param)(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *param, size_t param_size);
+
+    /**
+     * @brief Transmit LCD RGB data
+     *
+     * @note This is the panel-specific interface called by function `esp_lcd_panel_io_tx_color()`.
+     *
+     * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()`
+     * @param[in] lcd_cmd The specific LCD command
+     * @param[in] lcd_cmd_bits Length of LCD command, in bits (e.g. 8 bits or 16 bits)
+     * @param[in] color Buffer that holds the RGB color data
+     * @param[in] color_size Size of `color` in memory, in bytes
+     * @return
+     *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+     *          - ESP_OK                on success
+     */
+    esp_err_t (*tx_color)(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *color, size_t color_size);
+
+    /**
+     * @brief Destory LCD panel IO handle (deinitialize all and free resource)
+     *
+     * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()`
+     * @return
+     *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+     *          - ESP_OK                on success
+     */
+    esp_err_t (*del)(esp_lcd_panel_io_t *io);
+};
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/esp_netif/include/esp_netif_defaults.h b/tools/sdk/esp32c3/include/esp_netif/include/esp_netif_defaults.h
index 7ef65260..903a678e 100644
--- a/tools/sdk/esp32c3/include/esp_netif/include/esp_netif_defaults.h
+++ b/tools/sdk/esp32c3/include/esp_netif/include/esp_netif_defaults.h
@@ -55,7 +55,7 @@ extern "C" {
         ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(mac) \
         ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(ip_info) \
         .get_ip_event = IP_EVENT_ETH_GOT_IP, \
-        .lost_ip_event = 0, \
+        .lost_ip_event = IP_EVENT_ETH_LOST_IP, \
         .if_key = "ETH_DEF", \
         .if_desc = "eth", \
         .route_prio = 50 \
diff --git a/tools/sdk/esp32c3/include/esp_netif/include/esp_netif_types.h b/tools/sdk/esp32c3/include/esp_netif/include/esp_netif_types.h
index 044ca0d1..7c68c717 100644
--- a/tools/sdk/esp32c3/include/esp_netif/include/esp_netif_types.h
+++ b/tools/sdk/esp32c3/include/esp_netif/include/esp_netif_types.h
@@ -88,6 +88,7 @@ typedef enum {
     IP_EVENT_AP_STAIPASSIGNED,         /*!< soft-AP assign an IP to a connected station */
     IP_EVENT_GOT_IP6,                  /*!< station or ap or ethernet interface v6IP addr is preferred */
     IP_EVENT_ETH_GOT_IP,               /*!< ethernet got IP from connected AP */
+    IP_EVENT_ETH_LOST_IP,              /*!< ethernet lost IP and the IP is reset to 0 */
     IP_EVENT_PPP_GOT_IP,               /*!< PPP interface got IP */
     IP_EVENT_PPP_LOST_IP,              /*!< PPP interface lost IP */
 } ip_event_t;
diff --git a/tools/sdk/esp32c3/include/esp_rom/esp32c3/esp_rom_caps.h b/tools/sdk/esp32c3/include/esp_rom/esp32c3/esp_rom_caps.h
index bae770da..6d5b8014 100644
--- a/tools/sdk/esp32c3/include/esp_rom/esp32c3/esp_rom_caps.h
+++ b/tools/sdk/esp32c3/include/esp_rom/esp32c3/esp_rom_caps.h
@@ -18,3 +18,4 @@
 #define ESP_ROM_HAS_CRC_BE       (1) // ROM CRC library supports Big Endian
 #define ESP_ROM_HAS_JPEG_DECODE  (1) // ROM has JPEG decode library
 #define ESP_ROM_UART_CLK_IS_XTAL (1) // UART clock source is selected to XTAL in ROM
+#define ESP_ROM_USB_SERIAL_DEVICE_NUM (3) // UART uses USB_SERIAL_JTAG port in ROM.
diff --git a/tools/sdk/esp32c3/include/esp_rom/include/esp32c3/rom/ets_sys.h b/tools/sdk/esp32c3/include/esp_rom/include/esp32c3/rom/ets_sys.h
index b3780248..b2567e92 100644
--- a/tools/sdk/esp32c3/include/esp_rom/include/esp32c3/rom/ets_sys.h
+++ b/tools/sdk/esp32c3/include/esp_rom/include/esp32c3/rom/ets_sys.h
@@ -191,7 +191,7 @@ int ets_printf(const char *fmt, ...);
   * @brief  Set the uart channel of ets_printf(uart_tx_one_char).
   *         ROM will set it base on the efuse and gpio setting, however, this can be changed after booting.
   *
-  * @param  uart_no : 0 for UART0, 1 for UART1, 2 for UART2.
+  * @param  uart_no : 0 for UART0, 1 for UART1.
   *
   * @return None
   */
diff --git a/tools/sdk/esp32c3/include/esp_rom/include/esp32c3/rom/uart.h b/tools/sdk/esp32c3/include/esp_rom/include/esp32c3/rom/uart.h
index adbae64d..4e7e5b8e 100644
--- a/tools/sdk/esp32c3/include/esp_rom/include/esp32c3/rom/uart.h
+++ b/tools/sdk/esp32c3/include/esp_rom/include/esp32c3/rom/uart.h
@@ -260,7 +260,7 @@ void uart_tx_flush(uint8_t uart_no);
 /**
   * @brief Wait until uart tx full empty and the last char send ok.
   *
-  * @param  uart_no : 0 for UART0, 1 for UART1, 2 for UART2
+  * @param  uart_no : 0 for UART0, 1 for UART1
   *
   * The function defined in ROM code has a bug, so we define the correct version
   * here for compatibility.
diff --git a/tools/sdk/esp32c3/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_spi.h b/tools/sdk/esp32c3/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_spi.h
index b7889100..a6c3c40c 100644
--- a/tools/sdk/esp32c3/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_spi.h
+++ b/tools/sdk/esp32c3/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_spi.h
@@ -28,7 +28,7 @@ extern "C"
 ////////////////////////////////////////////////////////////////////////////////
 
 /**
- * @brief Read the shared buffer from the slave.
+ * @brief Read the shared buffer from the slave in ISR way
  *
  * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
  *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
@@ -46,7 +46,25 @@ extern "C"
 esp_err_t essl_spi_rdbuf(spi_device_handle_t spi, uint8_t *out_data, int addr, int len, uint32_t flags);
 
 /**
- * @brief Write the shared buffer of the slave.
+ * @brief Read the shared buffer from the slave in polling way
+ *
+ * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
+ *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
+ *       overwritten, even the ``len`` is shorter than a word.
+ *
+ * @param spi       SPI device handle representing the slave
+ * @param out_data  Buffer for read data, strongly suggested to be in the DRAM and align to 4
+ * @param addr      Address of the slave shared buffer
+ * @param len       Length to read
+ * @param flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: on success
+ *      - or other return value from :cpp:func:`spi_device_transmit`.
+ */
+esp_err_t essl_spi_rdbuf_polling(spi_device_handle_t spi, uint8_t *out_data, int addr, int len, uint32_t flags);
+
+/**
+ * @brief Write the shared buffer of the slave in ISR way
  *
  * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
  *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
@@ -63,6 +81,24 @@ esp_err_t essl_spi_rdbuf(spi_device_handle_t spi, uint8_t *out_data, int addr, i
  */
 esp_err_t essl_spi_wrbuf(spi_device_handle_t spi, const uint8_t *data, int addr, int len, uint32_t flags);
 
+/**
+ * @brief Write the shared buffer of the slave in polling way
+ *
+ * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
+ *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
+ *       overwritten, even the ``len`` is shorter than a word.
+ *
+ * @param spi       SPI device handle representing the slave
+ * @param data      Buffer for data to send, strongly suggested to be in the DRAM and align to 4
+ * @param addr      Address of the slave shared buffer,
+ * @param len       Length to write
+ * @param flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: success
+ *      - or other return value from :cpp:func:`spi_device_polling_transmit`.
+ */
+esp_err_t essl_spi_wrbuf_polling(spi_device_handle_t spi, const uint8_t *data, int addr, int len, uint32_t flags);
+
 /**
  * @brief Receive long buffer in segments from the slave through its DMA.
  *
diff --git a/tools/sdk/esp32c3/include/esp_wifi/esp32c3/include/phy_init_data.h b/tools/sdk/esp32c3/include/esp_wifi/esp32c3/include/phy_init_data.h
index 774be4e4..bc5d1edd 100644
--- a/tools/sdk/esp32c3/include/esp_wifi/esp32c3/include/phy_init_data.h
+++ b/tools/sdk/esp32c3/include/esp_wifi/esp32c3/include/phy_init_data.h
@@ -38,78 +38,82 @@ extern "C" {
 #define PHY_SUPPORT_MULTIPLE_BIN_OFFSET 125
 #endif
 
-static const char phy_init_magic_pre[] = PHY_INIT_MAGIC;
+static const char __attribute__((section(".rodata"))) phy_init_magic_pre[] = PHY_INIT_MAGIC;
 
 /**
  * @brief Structure containing default recommended PHY initialization parameters.
  */
 static const esp_phy_init_data_t phy_init_data= { {
-        3,
-        3,
-        0x05,
-        0x09,
-        0x06,
-        0x05,
-        0x03,
-        0x06,
-        0x05,
-        0x04,
-        0x06,
-        0x04,
-        0x05,
+        0x00,
+        0x00,
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x50),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x50),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x50),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x4c),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x4c),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x4c),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x44),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x4a),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x46),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x46),
+        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 0x42),
         0x00,
         0x00,
         0x00,
-        0x00,
-        0x05,
-        0x09,
-        0x06,
-        0x05,
-        0x03,
-        0x06,
-        0x05,
-        0x00,
-        0x00,
-        0x00,
-        0x00,
-        0x00,
-        0x00,
-        0x00,
-        0x00,
-        0xfc,
-        0xfc,
-        0xfe,
-        0xf0,
-        0xf0,
-        0xf0,
-        0xe0,
-        0xe0,
-        0xe0,
-        0x18,
-        0x18,
-        0x18,
-        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 84),
-        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 72),
-        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 66),
-        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 60),
-        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 56),
-        LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 52),
-        0,
-        1,
-        1,
-        2,
-        2,
-        3,
-        4,
-        5,
-        0,
-        0,
-        0,
-        0,
-        0,
-        0,
-        0,
-        0,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
         0,
         0,
         0,
@@ -151,9 +155,10 @@ static const esp_phy_init_data_t phy_init_data= { {
         0,
         0,
         0,
+        0x74
 } };
 
-static const char phy_init_magic_post[] = PHY_INIT_MAGIC;
+static const char __attribute__((section(".rodata"))) phy_init_magic_post[] = PHY_INIT_MAGIC;
 
 #if CONFIG_ESP32_SUPPORT_MULTIPLE_PHY_INIT_DATA_BIN
 /**
diff --git a/tools/sdk/esp32c3/include/esp_wifi/include/esp_mesh.h b/tools/sdk/esp32c3/include/esp_wifi/include/esp_mesh.h
index 242e3ad8..ab8f8a4c 100644
--- a/tools/sdk/esp32c3/include/esp_wifi/include/esp_mesh.h
+++ b/tools/sdk/esp32c3/include/esp_wifi/include/esp_mesh.h
@@ -655,7 +655,7 @@ esp_err_t esp_mesh_stop(void);
  *               - If the packet is to the root ("to" parameter isn't NULL) or to external IP network, MESH_DATA_TODS should be set.
  *               - If the packet is from the root to an internal device, MESH_DATA_FROMDS should be set.
  *             - Specify whether this API is block or non-block, block by default
- *               - If needs non-block, MESH_DATA_NONBLOCK should be set.
+ *               - If needs non-blocking, MESH_DATA_NONBLOCK should be set. Otherwise, may use esp_mesh_send_block_time() to specify a blocking time.
  *             - In the situation of the root change, MESH_DATA_DROP identifies this packet can be dropped by the new root
  *               for upstream data to external IP network, we try our best to avoid data loss caused by the root change, but
  *               there is a risk that the new root is running out of memory because most of memory is occupied by the pending data which
@@ -688,6 +688,17 @@ esp_err_t esp_mesh_stop(void);
  */
 esp_err_t esp_mesh_send(const mesh_addr_t *to, const mesh_data_t *data,
                         int flag, const mesh_opt_t opt[],  int opt_count);
+/**
+ * @brief      Set blocking time of esp_mesh_send()
+ *
+ * @attention  This API shall be called before mesh is started.
+ *
+ * @param[in]  time_ms  blocking time of esp_mesh_send(), unit:ms
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_send_block_time(uint32_t time_ms);
 
 /**
  * @brief      Receive a packet targeted to self over the mesh network
@@ -1665,7 +1676,6 @@ int esp_mesh_get_running_active_duty_cycle(void);
  *    - ESP_OK
  */
 esp_err_t esp_mesh_ps_duty_signaling(int fwd_times);
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/include/esp_wifi/include/esp_private/wifi.h b/tools/sdk/esp32c3/include/esp_wifi/include/esp_private/wifi.h
index 3c5a93a1..428cc7d9 100644
--- a/tools/sdk/esp32c3/include/esp_wifi/include/esp_private/wifi.h
+++ b/tools/sdk/esp32c3/include/esp_wifi/include/esp_private/wifi.h
@@ -72,17 +72,6 @@ typedef enum {
     WIFI_LOG_MODULE_MESH, /*logs related to Mesh*/
 } wifi_log_module_t;
 
-/**
-  * @brief FTM Report log levels configuration
-  *
-  */
-typedef struct {
-    uint8_t show_rtt:1;     /**< Display all valid Round-Trip-Time readings for FTM frames */
-    uint8_t show_diag:1;    /**< Display dialogue tokens for all FTM frames with valid readings */
-    uint8_t show_t1t2t3t4:1;/**< Display all valid T1, T2, T3, T4 readings considered while calculating RTT */
-    uint8_t show_rxrssi:1;  /**< Display RSSI for each FTM frame with valid readings */
-} ftm_report_log_level_t;
-
 /**
   * @brief WiFi log submodule definition
   *
@@ -598,17 +587,6 @@ void esp_wifi_set_sleep_delay_time(uint32_t return_to_sleep_delay);
  */
 void esp_wifi_set_keep_alive_time(uint32_t keep_alive_time);
 
-/**
- * @brief Set FTM Report log level
- *
- * @param   log_lvl Log levels configuration
- *
- * @return
- *    - ESP_OK: succeed
- *    - ESP_ERR_NOT_SUPPORTED: No FTM support
- */
-esp_err_t esp_wifi_set_ftm_report_log_level(ftm_report_log_level_t *log_lvl);
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32c3/include/esp_wifi/include/esp_wifi_default.h b/tools/sdk/esp32c3/include/esp_wifi/include/esp_wifi_default.h
index 4ce7f8b2..958977bf 100644
--- a/tools/sdk/esp32c3/include/esp_wifi/include/esp_wifi_default.h
+++ b/tools/sdk/esp32c3/include/esp_wifi/include/esp_wifi_default.h
@@ -70,6 +70,9 @@ esp_err_t esp_wifi_clear_default_wifi_driver_and_handlers(void *esp_netif);
 /**
  * @brief Creates default WIFI AP. In case of any init error this API aborts.
  *
+ * @note The API creates esp_netif object with default WiFi access point config,
+ * attaches the netif to wifi and registers default wifi handlers.
+ *
  * @return pointer to esp-netif instance
  */
 esp_netif_t* esp_netif_create_default_wifi_ap(void);
@@ -77,10 +80,23 @@ esp_netif_t* esp_netif_create_default_wifi_ap(void);
 /**
  * @brief Creates default WIFI STA. In case of any init error this API aborts.
  *
+ * @note The API creates esp_netif object with default WiFi station config,
+ * attaches the netif to wifi and registers default wifi handlers.
+ *
  * @return pointer to esp-netif instance
  */
 esp_netif_t* esp_netif_create_default_wifi_sta(void);
 
+/**
+ * @brief Destroys default WIFI netif created with esp_netif_create_default_wifi_...() API.
+ *
+ * @param[in] esp_netif object to detach from WiFi and destroy
+ *
+ * @note This API unregisters wifi handlers and detaches the created object from the wifi.
+ * (this function is a no-operation if esp_netif is NULL)
+ */
+void esp_netif_destroy_default_wifi(void *esp_netif);
+
 /**
  * @brief Creates esp_netif WiFi object based on the custom configuration.
  *
diff --git a/tools/sdk/esp32c3/include/esp_wifi/include/esp_wifi_types.h b/tools/sdk/esp32c3/include/esp_wifi/include/esp_wifi_types.h
index f159857c..03b8ae6a 100644
--- a/tools/sdk/esp32c3/include/esp_wifi/include/esp_wifi_types.h
+++ b/tools/sdk/esp32c3/include/esp_wifi/include/esp_wifi_types.h
@@ -233,6 +233,7 @@ typedef struct {
     uint8_t max_connection;     /**< Max number of stations allowed to connect in, default 4, max 10 */
     uint16_t beacon_interval;   /**< Beacon interval which should be multiples of 100. Unit: TU(time unit, 1 TU = 1024 us). Range: 100 ~ 60000. Default value: 100 */
     wifi_cipher_type_t pairwise_cipher;   /**< pairwise cipher of SoftAP, group cipher will be derived using this. cipher values are valid starting from WIFI_CIPHER_TYPE_TKIP, enum values before that will be considered as invalid and default cipher suites(TKIP+CCMP) will be used. Valid cipher suites in softAP mode are WIFI_CIPHER_TYPE_TKIP, WIFI_CIPHER_TYPE_CCMP and WIFI_CIPHER_TYPE_TKIP_CCMP. */
+    bool ftm_responder;         /**< Enable FTM Responder mode */
 } wifi_ap_config_t;
 
 /** @brief STA configuration settings for the ESP32 */
diff --git a/tools/sdk/esp32c3/include/espcoredump/include/esp_core_dump.h b/tools/sdk/esp32c3/include/espcoredump/include/esp_core_dump.h
index f8b029d5..7d41b97e 100644
--- a/tools/sdk/esp32c3/include/espcoredump/include/esp_core_dump.h
+++ b/tools/sdk/esp32c3/include/espcoredump/include/esp_core_dump.h
@@ -104,6 +104,19 @@ void esp_core_dump_to_uart(panic_info_t *info);
 /*********************************** USER MODE API ************************************/
 /**************************************************************************************/
 
+/**
+ * @brief  Check integrity of coredump data in flash.
+ *         This function reads the coredump data while calculating their checksum. If it
+ *         doesn't match the checksum written on flash, it means data are corrupted,
+ *         an error will be returned. Else, ESP_OK is returned.
+ *
+ * @return `ESP_OK` if core dump is present and valid, `ESP_ERR_NOT_FOUND` if no core dump
+ *         is stored in the partition, `ESP_ERR_INVALID_SIZE` or `ESP_ERR_INVALID_CRC`
+ *         if the core dump is corrupted, other errors when unable to access flash, in that
+ *         case please refer to \see esp_err_t
+ */
+esp_err_t esp_core_dump_image_check(void);
+
 /**
  * @brief  Retrieves address and size of coredump data in flash.
  *         This function is always available, even when core dump is disabled in menuconfig.
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/cpu_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/cpu_ll.h
index 1ac07fda..4e9d4494 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/cpu_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/cpu_ll.h
@@ -15,7 +15,7 @@
 
 #include <stdint.h>
 
-#include "soc/cpu_caps.h"
+#include "soc/soc_caps.h"
 #include "esp_bit_defs.h"
 #include "soc/assist_debug_reg.h"
 #include "esp_attr.h"
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/ds_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/ds_ll.h
index 933c1573..fd98de36 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/ds_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/ds_ll.h
@@ -24,7 +24,7 @@
 #include <string.h>
 
 #include "soc/hwcrypto_reg.h"
-#include "soc/ds_caps.h"
+#include "soc/soc_caps.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -69,7 +69,7 @@ static inline ds_key_check_t ds_ll_key_error_source(void)
  */
 static inline void ds_ll_configure_iv(const uint32_t *iv)
 {
-    for (size_t i = 0; i < (DS_KEY_PARAM_MD_IV_LENGTH / sizeof(uint32_t)); i++) {
+    for (size_t i = 0; i < (SOC_DS_KEY_PARAM_MD_IV_LENGTH / sizeof(uint32_t)); i++) {
         REG_WRITE(DS_IV_BASE + (i * 4) , iv[i]);
     }
 }
@@ -99,9 +99,9 @@ static inline void ds_ll_write_private_key_params(const uint8_t *encrypted_key_p
     */
     typedef struct { uint32_t addr; size_t len; } frag_t;
     const frag_t frags[] = {
-                            {DS_C_Y_BASE,  DS_SIGNATURE_MAX_BIT_LEN / 8},
-                            {DS_C_M_BASE,  DS_SIGNATURE_MAX_BIT_LEN / 8},
-                            {DS_C_RB_BASE, DS_SIGNATURE_MAX_BIT_LEN / 8},
+                            {DS_C_Y_BASE,  SOC_DS_SIGNATURE_MAX_BIT_LEN / 8},
+                            {DS_C_M_BASE,  SOC_DS_SIGNATURE_MAX_BIT_LEN / 8},
+                            {DS_C_RB_BASE, SOC_DS_SIGNATURE_MAX_BIT_LEN / 8},
                             {DS_C_BOX_BASE, DS_IV_BASE - DS_C_BOX_BASE},
     };
     const size_t NUM_FRAGS = sizeof(frags)/sizeof(frag_t);
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/gdma_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/gdma_ll.h
index 22410d3b..6ce2f89f 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/gdma_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/gdma_ll.h
@@ -17,7 +17,6 @@
 #include <stdbool.h>
 #include "soc/gdma_struct.h"
 #include "soc/gdma_reg.h"
-#include "soc/gdma_caps.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -25,6 +24,9 @@ extern "C" {
 
 #define GDMA_LL_GET_HW(id) (((id) == 0) ? (&GDMA) : NULL)
 
+#define GDMA_LL_RX_EVENT_MASK       (0x06A7)
+#define GDMA_LL_TX_EVENT_MASK       (0x1958)
+
 #define GDMA_LL_EVENT_TX_FIFO_UDF   (1<<12)
 #define GDMA_LL_EVENT_TX_FIFO_OVF   (1<<11)
 #define GDMA_LL_EVENT_RX_FIFO_UDF   (1<<10)
@@ -47,40 +49,12 @@ static inline void gdma_ll_enable_m2m_mode(gdma_dev_t *dev, uint32_t channel, bo
 {
     dev->channel[channel].in.in_conf0.mem_trans_en = enable;
     if (enable) {
-        // only have to give it a valid value
+        // to enable m2m mode, the tx chan has to be the same to rx chan, and set to a valid value
         dev->channel[channel].in.in_peri_sel.sel = 0;
         dev->channel[channel].out.out_peri_sel.sel = 0;
     }
 }
 
-/**
- * @brief Get DMA interrupt status word
- */
-static inline uint32_t gdma_ll_get_interrupt_status(gdma_dev_t *dev, uint32_t channel)
-{
-    return dev->intr[channel].st.val;
-}
-
-/**
- * @brief Enable DMA interrupt
- */
-static inline void gdma_ll_enable_interrupt(gdma_dev_t *dev, uint32_t channel, uint32_t mask, bool enable)
-{
-    if (enable) {
-        dev->intr[channel].ena.val |= mask;
-    } else {
-        dev->intr[channel].ena.val &= ~mask;
-    }
-}
-
-/**
- * @brief Clear DMA interrupt
- */
-static inline void gdma_ll_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask)
-{
-    dev->intr[channel].clr.val = mask;
-}
-
 /**
  * @brief Enable DMA clock gating
  */
@@ -90,6 +64,42 @@ static inline void gdma_ll_enable_clock(gdma_dev_t *dev, bool enable)
 }
 
 ///////////////////////////////////// RX /////////////////////////////////////////
+/**
+ * @brief Get DMA RX channel interrupt status word
+ */
+static inline uint32_t gdma_ll_rx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel)
+{
+    return dev->intr[channel].st.val & GDMA_LL_RX_EVENT_MASK;
+}
+
+/**
+ * @brief Enable DMA RX channel interrupt
+ */
+static inline void gdma_ll_rx_enable_interrupt(gdma_dev_t *dev, uint32_t channel, uint32_t mask, bool enable)
+{
+    if (enable) {
+        dev->intr[channel].ena.val |= (mask & GDMA_LL_RX_EVENT_MASK);
+    } else {
+        dev->intr[channel].ena.val &= ~(mask & GDMA_LL_RX_EVENT_MASK);
+    }
+}
+
+/**
+ * @brief Clear DMA RX channel interrupt
+ */
+static inline void gdma_ll_rx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask)
+{
+    dev->intr[channel].clr.val = (mask & GDMA_LL_RX_EVENT_MASK);
+}
+
+/**
+ * @brief Get DMA RX channel interrupt status register address
+ */
+static inline volatile void *gdma_ll_rx_get_interrupt_status_reg(gdma_dev_t *dev, uint32_t channel)
+{
+    return (volatile void *)(&dev->intr[channel].st);
+}
+
 /**
  * @brief Enable DMA RX channel to check the owner bit in the descriptor, disabled by default
  */
@@ -248,6 +258,42 @@ static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channe
 }
 
 ///////////////////////////////////// TX /////////////////////////////////////////
+/**
+ * @brief Get DMA TX channel interrupt status word
+ */
+static inline uint32_t gdma_ll_tx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel)
+{
+    return dev->intr[channel].st.val & GDMA_LL_TX_EVENT_MASK;
+}
+
+/**
+ * @brief Enable DMA TX channel interrupt
+ */
+static inline void gdma_ll_tx_enable_interrupt(gdma_dev_t *dev, uint32_t channel, uint32_t mask, bool enable)
+{
+    if (enable) {
+        dev->intr[channel].ena.val |= (mask & GDMA_LL_TX_EVENT_MASK);
+    } else {
+        dev->intr[channel].ena.val &= ~(mask & GDMA_LL_TX_EVENT_MASK);
+    }
+}
+
+/**
+ * @brief Clear DMA TX channel interrupt
+ */
+static inline void gdma_ll_tx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask)
+{
+    dev->intr[channel].clr.val = (mask & GDMA_LL_TX_EVENT_MASK);
+}
+
+/**
+ * @brief Get DMA TX channel interrupt status register address
+ */
+static inline volatile void *gdma_ll_tx_get_interrupt_status_reg(gdma_dev_t *dev, uint32_t channel)
+{
+    return (volatile void *)(&dev->intr[channel].st);
+}
+
 /**
  * @brief Enable DMA TX channel to check the owner bit in the descriptor, disabled by default
  */
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/interrupt_controller_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/interrupt_controller_ll.h
index 1957e038..70afe314 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/interrupt_controller_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/interrupt_controller_ll.h
@@ -49,6 +49,16 @@ static inline void intr_cntrl_ll_disable_interrupts(uint32_t mask)
     RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE);
 }
 
+/**
+ * @brief Read the current interrupt mask of the CPU running this code.
+ *
+ * @return The current interrupt bitmask.
+ */
+static inline uint32_t intr_cntrl_ll_read_interrupt_mask(void)
+{
+    return REG_READ(INTERRUPT_CORE0_CPU_INT_ENABLE_REG);
+}
+
 /**
  * @brief checks if given interrupt number has a valid handler
  *
@@ -85,36 +95,6 @@ static inline void *intr_cntrl_ll_get_int_handler_arg(uint8_t intr)
     return intr_handler_get_arg(intr);
 }
 
-/**
- * @brief Disables interrupts that are not located in iram
- *
- * @param newmask mask of interrupts TO KEEP ENABLED (note: this is probably a bug, see IDF-2308)
- * @return oldmask previous interrupt mask value
- */
-static inline uint32_t intr_cntrl_ll_disable_int_mask(uint32_t newmask)
-{
-    // Disable interrupts in order to atomically update the interrupt enable register
-    unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE);
-
-    uint32_t old_int_enable = REG_READ(INTERRUPT_CORE0_CPU_INT_ENABLE_REG);
-    REG_WRITE(INTERRUPT_CORE0_CPU_INT_ENABLE_REG, old_int_enable & newmask);
-
-    RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE);
-    return old_int_enable;
-}
-
-/**
- * @brief Enables interrupts that are not located in iram
- *
- * @param newmask mask of interrupts needs to be enabled
- */
-static inline void intr_cntrl_ll_enable_int_mask(uint32_t newmask)
-{
-    unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE);
-    esprv_intc_int_enable(newmask);
-    RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE);
-}
-
 /**
  * @brief Acknowledge an edge-trigger interrupt by clearing its pending flag
  *
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/mpu_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/mpu_ll.h
index cfeec1d6..77fa580c 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/mpu_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/mpu_ll.h
@@ -14,7 +14,7 @@
 
 #include <stdint.h>
 
-#include "soc/mpu_caps.h"
+#include "soc/soc_caps.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -22,7 +22,7 @@ extern "C" {
 
 /* This LL is currently unused for ESP32-C3 - cleanup is TODO ESP32-C3 IDF-2375 */
 
-static inline uint32_t mpu_ll_id_to_addr(int id)
+static inline uint32_t mpu_ll_id_to_addr(unsigned id)
 {
     abort();
 }
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/spi_flash_encrypted_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/spi_flash_encrypted_ll.h
new file mode 100644
index 00000000..cc1e627b
--- /dev/null
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/spi_flash_encrypted_ll.h
@@ -0,0 +1,157 @@
+// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The ll is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The Lowlevel layer for SPI Flash Encryption.
+
+#include "soc/system_reg.h"
+#include "soc/hwcrypto_reg.h"
+#include "soc/soc.h"
+#include "string.h"
+#include "assert.h"
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Choose type of chip you want to encrypt manully
+typedef enum
+{
+    FLASH_ENCRYPTION_MANU = 0, ///!< Manually encrypt the flash chip.
+    PSRAM_ENCRYPTION_MANU = 1  ///!< Manually encrypt the psram chip.
+} flash_encrypt_ll_type_t;
+
+/**
+ * Enable the flash encryption function under spi boot mode and download boot mode.
+ */
+static inline void spi_flash_encrypt_ll_enable(void)
+{
+    REG_SET_BIT(SYSTEM_EXTERNAL_DEVICE_ENCRYPT_DECRYPT_CONTROL_REG,
+                SYSTEM_ENABLE_DOWNLOAD_MANUAL_ENCRYPT |
+                SYSTEM_ENABLE_SPI_MANUAL_ENCRYPT);
+}
+
+/*
+ * Disable the flash encryption mode.
+ */
+static inline void spi_flash_encrypt_ll_disable(void)
+{
+    REG_CLR_BIT(SYSTEM_EXTERNAL_DEVICE_ENCRYPT_DECRYPT_CONTROL_REG,
+                SYSTEM_ENABLE_SPI_MANUAL_ENCRYPT);
+}
+
+/**
+ * Choose type of chip you want to encrypt manully
+ *
+ * @param type The type of chip to be encrypted
+ *
+ * @note The hardware currently support flash encryption.
+ */
+static inline void spi_flash_encrypt_ll_type(flash_encrypt_ll_type_t type)
+{
+    // Our hardware only support flash encryption
+    assert(type == FLASH_ENCRYPTION_MANU);
+    REG_WRITE(AES_XTS_DESTINATION_REG, type);
+}
+
+/**
+ * Configure the data size of a single encryption.
+ *
+ * @param block_size Size of the desired block.
+ */
+static inline void spi_flash_encrypt_ll_buffer_length(uint32_t size)
+{
+    // Desired block should not be larger than the block size.
+    REG_WRITE(AES_XTS_SIZE_REG, size >> 5);
+}
+
+/**
+ * Save 32-bit piece of plaintext.
+ *
+ * @param address the address of written flash partition.
+ * @param buffer Buffer to store the input data.
+ * @param size Buffer size.
+ *
+ */
+static inline void spi_flash_encrypt_ll_plaintext_save(uint32_t address, const uint32_t* buffer, uint32_t size)
+{
+    uint32_t plaintext_offs = (address % 64);
+    memcpy((void *)(AES_XTS_PLAIN_BASE + plaintext_offs), buffer, size);
+}
+
+/**
+ * Copy the flash address to XTS_AES physical address
+ *
+ * @param flash_addr flash address to write.
+ */
+static inline void spi_flash_encrypt_ll_address_save(uint32_t flash_addr)
+{
+    REG_WRITE(AES_XTS_PHYSICAL_ADDR_REG, flash_addr);
+}
+
+/**
+ * Start flash encryption
+ */
+static inline void spi_flash_encrypt_ll_calculate_start(void)
+{
+    REG_WRITE(AES_XTS_TRIGGER_REG, 1);
+}
+
+/**
+ * Wait for flash encryption termination
+ */
+static inline void spi_flash_encrypt_ll_calculate_wait_idle(void)
+{
+    while(REG_READ(AES_XTS_STATE_REG) == 0x1) {
+    }
+}
+
+/**
+ * Finish the flash encryption and make encrypted result accessible to SPI.
+ */
+static inline void spi_flash_encrypt_ll_done(void)
+{
+    REG_WRITE(AES_XTS_RELEASE_REG, 1);
+    while(REG_READ(AES_XTS_STATE_REG) != 0x3) {
+    }
+}
+
+/**
+ * Set to destroy encrypted result
+ */
+static inline void spi_flash_encrypt_ll_destroy(void)
+{
+    REG_WRITE(AES_XTS_DESTROY_REG, 1);
+}
+
+/**
+ * Check if is qualified to encrypt the buffer
+ *
+ * @param address the address of written flash partition.
+ * @param length Buffer size.
+ */
+static inline bool spi_flash_encrypt_ll_check(uint32_t address, uint32_t length)
+{
+    return ((address % length) == 0) ? true : false;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/spi_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/spi_ll.h
index 5527ee1e..01323814 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/spi_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/spi_ll.h
@@ -1005,7 +1005,7 @@ static inline void spi_ll_set_intr(spi_dev_t* hw, spi_ll_intr_t intr_mask)
 
 static inline void spi_ll_clear_intr(spi_dev_t* hw, spi_ll_intr_t intr_mask)
 {
-#define CLR_INTR(intr_bit, _, __, clr_op) if (intr_mask & (intr_bit)) hw->clr_op;
+#define CLR_INTR(intr_bit, _, __, clr_reg) if (intr_mask & (intr_bit)) hw->clr_reg;
     FOR_EACH_ITEM(CLR_INTR, INTR_LIST);
 #undef CLR_INTR
 }
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/systimer_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/systimer_ll.h
index f0dab94c..9aa0c32d 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/systimer_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/systimer_ll.h
@@ -13,139 +13,150 @@
 // limitations under the License.
 #pragma once
 
+#include <stdint.h>
+#include <stdbool.h>
+#include <assert.h>
+#include "soc/systimer_struct.h"
+
+#define SYSTIMER_LL_COUNTER_CLOCK       (0) // Counter used for "wallclock" time
+#define SYSTIMER_LL_COUNTER_OS_TICK     (1) // Counter used for OS tick
+#define SYSTIMER_LL_ALARM_OS_TICK_CORE0 (0) // Alarm used for OS tick of CPU core 0
+#define SYSTIMER_LL_ALARM_CLOCK         (2) // Alarm used for "wallclock" time
+
+#define SYSTIMER_LL_TICKS_PER_US        (16) // 16 systimer ticks == 1us
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include <stdint.h>
-#include <stdbool.h>
-#include "soc/soc.h"
-#include "soc/systimer_reg.h"
-
 // All these functions get invoked either from ISR or HAL that linked to IRAM.
 // Always inline these functions even no gcc optimization is applied.
 
-/*******************counter*************************/
+/******************* Clock *************************/
 
-__attribute__((always_inline)) static inline void systimer_ll_enable_clock(void)
+__attribute__((always_inline)) static inline void systimer_ll_enable_clock(systimer_dev_t *dev, bool en)
 {
-    REG_SET_BIT(SYS_TIMER_SYSTIMER_CONF_REG, SYS_TIMER_CLK_EN);
+    dev->conf.clk_en = en;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_enable_counter(uint32_t counter_id)
-{
-    REG_SET_BIT(SYS_TIMER_SYSTIMER_CONF_REG, 1 << (30 - counter_id));
-}
+/******************* Counter *************************/
 
-__attribute__((always_inline)) static inline void systimer_ll_counter_can_stall_by_cpu(uint32_t counter_id, uint32_t cpu_id, bool can)
+__attribute__((always_inline)) static inline void systimer_ll_enable_counter(systimer_dev_t *dev, uint32_t counter_id, bool en)
 {
-    if (can) {
-        REG_SET_BIT(SYS_TIMER_SYSTIMER_CONF_REG, 1 << ((28 - counter_id * 2) - cpu_id));
+    if (en) {
+        dev->conf.val |= 1 << (30 - counter_id);
     } else {
-        REG_CLR_BIT(SYS_TIMER_SYSTIMER_CONF_REG, 1 << ((28 - counter_id * 2) - cpu_id));
+        dev->conf.val &= ~(1 << (30 - counter_id));
     }
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_counter_snapshot(uint32_t counter_id)
+__attribute__((always_inline)) static inline void systimer_ll_counter_can_stall_by_cpu(systimer_dev_t *dev, uint32_t counter_id, uint32_t cpu_id, bool can)
 {
-    REG_SET_BIT(SYS_TIMER_SYSTIMER_UNIT0_OP_REG + 4 * counter_id, 1 << 30);
+    if (can) {
+        dev->conf.val |= 1 << ((28 - counter_id * 2) - cpu_id);
+    } else {
+        dev->conf.val &= ~(1 << ((28 - counter_id * 2) - cpu_id));
+    }
 }
 
-__attribute__((always_inline)) static inline bool systimer_ll_is_counter_value_valid(uint32_t counter_id)
+__attribute__((always_inline)) static inline void systimer_ll_counter_snapshot(systimer_dev_t *dev, uint32_t counter_id)
 {
-    return REG_GET_BIT(SYS_TIMER_SYSTIMER_UNIT0_OP_REG + 4 * counter_id, 1 << 29);
+    dev->unit_op[counter_id].timer_unit_update = 1;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_set_counter_value(uint32_t counter_id, uint64_t value)
+__attribute__((always_inline)) static inline bool systimer_ll_is_counter_value_valid(systimer_dev_t *dev, uint32_t counter_id)
 {
-    REG_WRITE(SYS_TIMER_SYSTIMER_UNIT0_LOAD_LO_REG + 8 * counter_id, value & 0xFFFFFFFF);
-    REG_WRITE(SYS_TIMER_SYSTIMER_UNIT0_LOAD_HI_REG, (value >> 32) & 0xFFFFF);
+    return dev->unit_op[counter_id].timer_unit_value_valid;
 }
 
-__attribute__((always_inline)) static inline uint32_t systimer_ll_get_counter_value_low(uint32_t counter_id)
+__attribute__((always_inline)) static inline void systimer_ll_set_counter_value(systimer_dev_t *dev, uint32_t counter_id, uint64_t value)
 {
-    return REG_READ(SYS_TIMER_SYSTIMER_UNIT0_VALUE_LO_REG + 8 * counter_id);
+    dev->unit_load_val[counter_id].hi.timer_unit_load_hi = value >> 32;
+    dev->unit_load_val[counter_id].lo.timer_unit_load_lo = value & 0xFFFFFFFF;
 }
 
-__attribute__((always_inline)) static inline uint32_t systimer_ll_get_counter_value_high(uint32_t counter_id)
+__attribute__((always_inline)) static inline uint32_t systimer_ll_get_counter_value_low(systimer_dev_t *dev, uint32_t counter_id)
 {
-    return REG_READ(SYS_TIMER_SYSTIMER_UNIT0_VALUE_HI_REG + 8 * counter_id);
+    return dev->unit_val[counter_id].lo.timer_unit_value_lo;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_apply_counter_value(uint32_t counter_id)
+__attribute__((always_inline)) static inline uint32_t systimer_ll_get_counter_value_high(systimer_dev_t *dev, uint32_t counter_id)
 {
-    REG_SET_BIT(SYS_TIMER_SYSTIMER_UNIT0_LOAD_REG + 4 * counter_id, SYS_TIMER_TIMER_UNIT0_LOAD);
+    return dev->unit_val[counter_id].hi.timer_unit_value_hi;
 }
 
-/*******************alarm*************************/
-
-__attribute__((always_inline)) static inline void systimer_ll_set_alarm_target(uint32_t alarm_id, uint64_t value)
+__attribute__((always_inline)) static inline void systimer_ll_apply_counter_value(systimer_dev_t *dev, uint32_t counter_id)
 {
-    REG_WRITE(SYS_TIMER_SYSTIMER_TARGET0_LO_REG + alarm_id * 8, value & 0xFFFFFFFF);
-    REG_WRITE(SYS_TIMER_SYSTIMER_TARGET0_HI_REG + alarm_id * 8,  (value >> 32) & 0xFFFFF);
+    dev->unit_load[counter_id].val = 0x01;
 }
 
-__attribute__((always_inline)) static inline uint64_t systimer_ll_get_alarm_target(uint32_t alarm_id)
+/******************* Alarm *************************/
+
+__attribute__((always_inline)) static inline void systimer_ll_set_alarm_target(systimer_dev_t *dev, uint32_t alarm_id, uint64_t value)
 {
-    return ((uint64_t) REG_READ(SYS_TIMER_SYSTIMER_TARGET0_HI_REG + alarm_id * 8) << 32) \
-           | REG_READ(SYS_TIMER_SYSTIMER_TARGET0_LO_REG + alarm_id * 8);
+    dev->target_val[alarm_id].hi.timer_target_hi = value >> 32;
+    dev->target_val[alarm_id].lo.timer_target_lo = value & 0xFFFFFFFF;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_connect_alarm_counter(uint32_t alarm_id, uint32_t counter_id)
+__attribute__((always_inline)) static inline uint64_t systimer_ll_get_alarm_target(systimer_dev_t *dev, uint32_t alarm_id)
 {
-    REG_SET_FIELD(SYS_TIMER_SYSTIMER_TARGET0_CONF_REG + 4 * alarm_id, SYS_TIMER_TARGET0_TIMER_UNIT_SEL, counter_id);
+    return ((uint64_t)(dev->target_val[alarm_id].hi.timer_target_hi) << 32) | dev->target_val[alarm_id].lo.timer_target_lo;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_oneshot(uint32_t alarm_id)
+__attribute__((always_inline)) static inline void systimer_ll_connect_alarm_counter(systimer_dev_t *dev, uint32_t alarm_id, uint32_t counter_id)
 {
-    REG_CLR_BIT(SYS_TIMER_SYSTIMER_TARGET0_CONF_REG + alarm_id * 4, SYS_TIMER_TARGET0_PERIOD_MODE);
+    dev->target_conf[alarm_id].target_timer_unit_sel = counter_id;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_period(uint32_t alarm_id)
+__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_oneshot(systimer_dev_t *dev, uint32_t alarm_id)
 {
-    REG_SET_BIT(SYS_TIMER_SYSTIMER_TARGET0_CONF_REG + alarm_id * 4, SYS_TIMER_TARGET0_PERIOD_MODE);
+    dev->target_conf[alarm_id].target_period_mode = 0;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_set_alarm_period(uint32_t alarm_id, uint32_t period)
+__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_period(systimer_dev_t *dev, uint32_t alarm_id)
 {
-    REG_SET_FIELD(SYS_TIMER_SYSTIMER_TARGET0_CONF_REG + alarm_id * 4, SYS_TIMER_TARGET0_PERIOD, period);
+    dev->target_conf[alarm_id].target_period_mode = 1;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_apply_alarm_value(uint32_t alarm_id)
+__attribute__((always_inline)) static inline void systimer_ll_set_alarm_period(systimer_dev_t *dev, uint32_t alarm_id, uint32_t period)
 {
-    REG_SET_BIT(SYS_TIMER_SYSTIMER_COMP0_LOAD_REG + alarm_id * 4, SYS_TIMER_TIMER_COMP0_LOAD);
+    assert(period < (1 << 26));
+    dev->target_conf[alarm_id].target_period = period;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_disable_alarm(uint32_t alarm_id)
+__attribute__((always_inline)) static inline void systimer_ll_apply_alarm_value(systimer_dev_t *dev, uint32_t alarm_id)
 {
-    REG_CLR_BIT(SYS_TIMER_SYSTIMER_CONF_REG, 1 << (24 - alarm_id));
+    dev->comp_load[alarm_id].val = 0x01;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_enable_alarm(uint32_t alarm_id)
+__attribute__((always_inline)) static inline void systimer_ll_enable_alarm(systimer_dev_t *dev, uint32_t alarm_id, bool en)
 {
-    REG_SET_BIT(SYS_TIMER_SYSTIMER_CONF_REG, 1 << (24 - alarm_id));
+    if (en) {
+        dev->conf.val |= 1 << (24 - alarm_id);
+    } else {
+        dev->conf.val &= ~(1 << (24 - alarm_id));
+    }
 }
 
-/*******************interrupt*************************/
+/******************* Interrupt *************************/
 
-__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_int(uint32_t alarm_id)
+__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_int(systimer_dev_t *dev, uint32_t alarm_id, bool en)
 {
-    REG_SET_BIT(SYS_TIMER_SYSTIMER_INT_ENA_REG, 1 << alarm_id);
+    if (en) {
+        dev->int_ena.val |= 1 << alarm_id;
+    } else {
+        dev->int_ena.val &= ~(1 << alarm_id);
+    }
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_disable_alarm_int(uint32_t alarm_id)
+__attribute__((always_inline)) static inline bool systimer_ll_is_alarm_int_fired(systimer_dev_t *dev, uint32_t alarm_id)
 {
-    REG_CLR_BIT(SYS_TIMER_SYSTIMER_INT_ENA_REG, 1 << alarm_id);
+    return dev->int_st.val & (1 << alarm_id);
 }
 
-__attribute__((always_inline)) static inline bool systimer_ll_is_alarm_int_fired(uint32_t alarm_id)
+__attribute__((always_inline)) static inline void systimer_ll_clear_alarm_int(systimer_dev_t *dev, uint32_t alarm_id)
 {
-    return REG_GET_BIT(SYS_TIMER_SYSTIMER_INT_RAW_REG, 1 << alarm_id);
-}
-
-__attribute__((always_inline)) static inline void systimer_ll_clear_alarm_int(uint32_t alarm_id)
-{
-    REG_SET_BIT(SYS_TIMER_SYSTIMER_INT_CLR_REG, 1 << alarm_id);
+    dev->int_clr.val |= 1 << alarm_id;
 }
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/uart_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/uart_ll.h
index 931134f7..c166e472 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/uart_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/uart_ll.h
@@ -32,6 +32,9 @@ extern "C" {
 #define UART_LL_MIN_WAKEUP_THRESH (2)
 #define UART_LL_INTR_MASK         (0x7ffff) //All interrupt mask
 
+#define UART_LL_FSM_IDLE                       (0x0)
+#define UART_LL_FSM_TX_WAIT_SEND               (0xf)
+
 // Define UART interrupts
 typedef enum {
     UART_INTR_RXFIFO_FULL      = (0x1 << 0),
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/uhci_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/uhci_ll.h
index 1566d0b0..235d28ab 100644
--- a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/uhci_ll.h
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/uhci_ll.h
@@ -20,12 +20,16 @@
 #include <stdio.h>
 #include "uhci_types.h"
 #include "soc/uhci_struct.h"
-#include "soc/gdma_struct.h"
-
-#define UHCI_DMA_INDEX 0
 
 #define UHCI_LL_GET_HW(num) (((num) == 0) ? (&UHCI0) : (NULL))
 
+typedef enum {
+    UHCI_RX_BREAK_CHR_EOF = 0x1,
+    UHCI_RX_IDLE_EOF      = 0x2,
+    UHCI_RX_LEN_EOF       = 0x4,
+    UHCI_RX_EOF_MAX       = 0x7,
+} uhci_rxeof_cfg_t;
+
 static inline void uhci_ll_init(uhci_dev_t *hw)
 {
     typeof(hw->conf0) conf0_reg;
@@ -38,7 +42,8 @@ static inline void uhci_ll_init(uhci_dev_t *hw)
 
 static inline void uhci_ll_attach_uart_port(uhci_dev_t *hw, int uart_num)
 {
-    abort(); // TODO ESP32-C3 IDF-2117
+    hw->conf0.uart0_ce = (uart_num == 0)? 1: 0;
+    hw->conf0.uart1_ce = (uart_num == 1)? 1: 0;
 }
 
 static inline void uhci_ll_set_seper_chr(uhci_dev_t *hw, uhci_seper_chr_t *seper_char)
@@ -90,20 +95,6 @@ static inline void uhci_ll_set_swflow_ctrl_sub_chr(uhci_dev_t *hw, uhci_swflow_c
     hw->escape_conf.val = escape_conf_reg.val;
 }
 
-static inline void uhci_ll_dma_in_reset(uhci_dev_t *hw)
-{
-    (void)hw;
-    GDMA.channel[UHCI_DMA_INDEX].in.in_conf0.in_rst = 1;
-    GDMA.channel[UHCI_DMA_INDEX].in.in_conf0.in_rst = 0;
-}
-
-static inline void uhci_ll_dma_out_reset(uhci_dev_t *hw)
-{
-    (void)hw;
-    GDMA.channel[UHCI_DMA_INDEX].out.out_conf0.out_rst = 1;
-    GDMA.channel[UHCI_DMA_INDEX].out.out_conf0.out_rst = 0;
-}
-
 static inline void uhci_ll_enable_intr(uhci_dev_t *hw, uint32_t intr_mask)
 {
     hw->int_ena.val |= intr_mask;
@@ -124,41 +115,6 @@ static inline uint32_t uhci_ll_get_intr(uhci_dev_t *hw)
     return hw->int_st.val;
 }
 
-static inline void uhci_ll_set_rx_dma(uhci_dev_t *hw, uint32_t addr)
-{
-    (void)hw;
-    GDMA.channel[UHCI_DMA_INDEX].in.in_link.addr = addr;
-}
-
-static inline void uhci_ll_set_tx_dma(uhci_dev_t *hw, uint32_t addr)
-{
-    (void)hw;
-    GDMA.channel[UHCI_DMA_INDEX].out.out_link.addr = addr;
-}
-
-static inline void uhci_ll_rx_dma_start(uhci_dev_t *hw)
-{
-    (void)hw;
-    GDMA.channel[UHCI_DMA_INDEX].in.in_link.start = 1;
-}
-
-static inline void uhci_ll_tx_dma_start(uhci_dev_t *hw)
-{
-    (void)hw;
-    GDMA.channel[UHCI_DMA_INDEX].out.out_link.start = 1;
-}
-
-static inline void uhci_ll_rx_dma_stop(uhci_dev_t *hw)
-{
-    (void)hw;
-    GDMA.channel[UHCI_DMA_INDEX].in.in_link.stop = 1;
-}
-
-static inline void uhci_ll_tx_dma_stop(uhci_dev_t *hw)
-{
-    (void)hw;
-    GDMA.channel[UHCI_DMA_INDEX].out.out_link.stop = 1;
-}
 
 static inline void uhci_ll_set_eof_mode(uhci_dev_t *hw, uint32_t eof_mode)
 {
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/uhci_types.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/uhci_types.h
new file mode 100644
index 00000000..7b7f41d0
--- /dev/null
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/uhci_types.h
@@ -0,0 +1,54 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+
+// Though the UHCI driver hasn't been published, some types are defined here
+// for users to develop over the HAL. See example: controller_hci_uart_esp32c3
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+
+/**
+ * @brief UHCI escape sequence
+ */
+typedef struct {
+    uint8_t seper_chr;        /*!< escape sequence character */
+    uint8_t sub_chr1;         /*!< escape sequence sub-character 1 */
+    uint8_t sub_chr2;         /*!< escape sequence sub-character 2 */
+    bool sub_chr_en;          /*!< enable use of sub-chaacter of escape sequence */
+} uhci_seper_chr_t;
+
+/**
+ * @brief UHCI software flow control
+ */
+typedef struct {
+    uint8_t xon_chr;          /*!< character for XON */
+    uint8_t xon_sub1;         /*!< sub-character 1 for XON */
+    uint8_t xon_sub2;         /*!< sub-character 2 for XON */
+    uint8_t xoff_chr;         /*!< character 2 for XOFF */
+    uint8_t xoff_sub1;        /*!< sub-character 1 for XOFF */
+    uint8_t xoff_sub2;        /*!< sub-character 2 for XOFF */
+    uint8_t flow_en;          /*!< enable use of software flow control */
+} uhci_swflow_ctrl_sub_chr_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/usb_serial_jtag_ll.h b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/usb_serial_jtag_ll.h
new file mode 100644
index 00000000..e75cf67b
--- /dev/null
+++ b/tools/sdk/esp32c3/include/hal/esp32c3/include/hal/usb_serial_jtag_ll.h
@@ -0,0 +1,169 @@
+// Copyright 2021 Espressif Systems (Shanghai)
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// The LL layer of the USB-serial-jtag controller
+
+#pragma once
+#include "soc/usb_serial_jtag_reg.h"
+#include "soc/usb_serial_jtag_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//The in and out endpoints are this long.
+#define USB_SERIAL_JTAG_PACKET_SZ_BYTES 64
+
+#define USB_SERIAL_JTAG_LL_INTR_MASK         (0x7ffff) //All interrupt mask
+
+// Define USB_SERIAL_JTAG interrupts
+// Note the hardware has more interrupts, but they're only useful for debugging
+// the hardware.
+typedef enum {
+    USB_SERIAL_JTAG_INTR_SOF                    = (1 << 1),
+    USB_SERIAL_JTAG_INTR_SERIAL_OUT_RECV_PKT    = (1 << 2),
+    USB_SERIAL_JTAG_INTR_SERIAL_IN_EMPTY        = (1 << 3),
+    USB_SERIAL_JTAG_INTR_TOKEN_REC_IN_EP1       = (1 << 8),
+    USB_SERIAL_JTAG_INTR_BUS_RESET              = (1 << 9),
+    USB_SERIAL_JTAG_INTR_EP1_ZERO_PAYLOAD       = (1 << 10),
+} usb_serial_jtag_intr_t;
+
+/**
+ * @brief  Enable the USB_SERIAL_JTAG interrupt based on the given mask.
+ *
+ * @param  mask The bitmap of the interrupts need to be enabled.
+ *
+ * @return None
+ */
+static inline void usb_serial_jtag_ll_ena_intr_mask(uint32_t mask)
+{
+    USB_SERIAL_JTAG.int_ena.val |= mask;
+}
+
+/**
+ * @brief  Disable the USB_SERIAL_JTAG interrupt based on the given mask.
+ *
+ * @param  mask The bitmap of the interrupts need to be disabled.
+ *
+ * @return None
+ */
+static inline void usb_serial_jtag_ll_disable_intr_mask(uint32_t mask)
+{
+    USB_SERIAL_JTAG.int_ena.val &= (~mask);
+}
+
+/**
+ * @brief  Get the USB_SERIAL_JTAG interrupt status.
+ *
+ * @return The USB_SERIAL_JTAG interrupt status.
+ */
+static inline uint32_t usb_serial_jtag_ll_get_intsts_mask(void)
+{
+    return USB_SERIAL_JTAG.int_st.val;
+}
+
+/**
+ * @brief  Clear the USB_SERIAL_JTAG interrupt status based on the given mask.
+ *
+ * @param  mask The bitmap of the interrupts need to be cleared.
+ *
+ * @return None
+ */
+static inline void usb_serial_jtag_ll_clr_intsts_mask(uint32_t mask)
+{
+    USB_SERIAL_JTAG.int_clr.val = mask;
+}
+
+/**
+ * @brief  Get status of enabled interrupt.
+ *
+ * @return interrupt enable value
+ */
+static inline uint32_t usb_serial_jtag_ll_get_intr_ena_status(void)
+{
+    return USB_SERIAL_JTAG.int_ena.val;
+}
+
+/**
+ * @brief  Read the bytes from the USB_SERIAL_JTAG rxfifo.
+ *
+ * @param  buf The data buffer.
+ * @param  rd_len The data length needs to be read.
+ *
+ * @return amount of bytes read
+ */
+static inline int usb_serial_jtag_ll_read_rxfifo(uint8_t *buf, uint32_t rd_len)
+{
+    int i;
+    for (i = 0; i < (int)rd_len; i++) {
+        if (!USB_SERIAL_JTAG.ep1_conf.serial_out_ep_data_avail) break;
+        buf[i] = USB_SERIAL_JTAG.ep1.rdwr_byte;
+    }
+    return i;
+}
+
+/**
+ * @brief  Write byte to the USB_SERIAL_JTAG txfifo. Only writes bytes as long / if there
+ *         is room in the buffer.
+ *
+ * @param  buf The data buffer.
+ * @param  wr_len The data length needs to be writen.
+ *
+ * @return Amount of bytes actually written. May be less than wr_len.
+ */
+static inline int usb_serial_jtag_ll_write_txfifo(const uint8_t *buf, uint32_t wr_len)
+{
+    int i;
+    for (i = 0; i < (int)wr_len; i++) {
+        if (!USB_SERIAL_JTAG.ep1_conf.serial_in_ep_data_free) break;
+        USB_SERIAL_JTAG.ep1.rdwr_byte = buf[i];
+    }
+    return i;
+}
+
+/**
+ * @brief  Returns 1 if the USB_SERIAL_JTAG rxfifo has data available.
+ *
+ * @return 0 if no data available, 1 if data available
+ */
+static inline int usb_serial_jtag_ll_rxfifo_data_available(void)
+{
+    return USB_SERIAL_JTAG.ep1_conf.serial_out_ep_data_avail;
+}
+
+/**
+ * @brief  Returns 1 if the USB_SERIAL_JTAG txfifo has room.
+ *
+ * @return 0 if no data available, 1 if data available
+ */
+static inline int usb_serial_jtag_ll_txfifo_writable(void)
+{
+    return USB_SERIAL_JTAG.ep1_conf.serial_in_ep_data_free;
+}
+
+/**
+ * @brief  Flushes the TX buffer, that is, make it available for the
+ *         host to pick up.
+ *
+ * @return na
+ */
+static inline void usb_serial_jtag_ll_txfifo_flush(void)
+{
+    USB_SERIAL_JTAG.ep1_conf.wr_done=1;
+}
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/ds_hal.h b/tools/sdk/esp32c3/include/hal/include/hal/ds_hal.h
index fe7d7892..253fab9f 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/ds_hal.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/ds_hal.h
@@ -60,11 +60,6 @@ void ds_hal_start(void);
  */
 void ds_hal_finish(void);
 
-/**
- * @brief Check whether the key input (HMAC on ESP32-C3) is correct.
- */
-ds_key_check_t ds_hal_check_decryption_key(void);
-
 /**
  * @brief Write the initialization vector.
  */
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/gpio_types.h b/tools/sdk/esp32c3/include/hal/include/hal/gpio_types.h
index 2438014a..8f795e6a 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/gpio_types.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/gpio_types.h
@@ -76,6 +76,9 @@ typedef enum {
 #define GPIO_SEL_44             ((uint64_t)(((uint64_t)1)<<44))  /*!< Pin 44 selected */
 #define GPIO_SEL_45             ((uint64_t)(((uint64_t)1)<<45))  /*!< Pin 45 selected */
 #define GPIO_SEL_46             ((uint64_t)(((uint64_t)1)<<46))  /*!< Pin 46 selected */
+#if CONFIG_IDF_TARGET_ESP32S3
+#define GPIO_SEL_47             ((uint64_t)(((uint64_t)1)<<47))  /*!< Pin 47 selected */
+#endif
 #endif
 
 #define GPIO_PIN_REG_0          IO_MUX_GPIO0_REG
@@ -125,6 +128,7 @@ typedef enum {
 #define GPIO_PIN_REG_44          IO_MUX_GPIO44_REG
 #define GPIO_PIN_REG_45          IO_MUX_GPIO45_REG
 #define GPIO_PIN_REG_46          IO_MUX_GPIO46_REG
+#define GPIO_PIN_REG_47          IO_MUX_GPIO47_REG
 
 #if CONFIG_IDF_TARGET_ESP32
 typedef enum {
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/interrupt_controller_hal.h b/tools/sdk/esp32c3/include/hal/include/hal/interrupt_controller_hal.h
index a7c47e6a..39a5a8e6 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/interrupt_controller_hal.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/interrupt_controller_hal.h
@@ -135,6 +135,16 @@ static inline void interrupt_controller_hal_disable_interrupts(uint32_t mask)
     intr_cntrl_ll_disable_interrupts(mask);
 }
 
+/**
+ * @brief Read the current interrupt mask.
+ *
+ * @return The bitmask of current interrupts
+ */
+static inline uint32_t interrupt_controller_hal_read_interrupt_mask(void)
+{
+    return intr_cntrl_ll_read_interrupt_mask();
+}
+
 /**
  * @brief checks if given interrupt number has a valid handler
  *
@@ -171,27 +181,6 @@ static inline void * interrupt_controller_hal_get_int_handler_arg(uint8_t intr)
     return intr_cntrl_ll_get_int_handler_arg(intr);
 }
 
-/**
- * @brief Disables interrupts that are not located in iram
- *
- * @param newmask mask of interrupts needs to be disabled
- * @return oldmask where to store old interrupts state
- */
-static inline uint32_t interrupt_controller_hal_disable_int_mask(uint32_t newmask)
-{
-    return intr_cntrl_ll_disable_int_mask(newmask);
-}
-
-/**
- * @brief Enables interrupts that are not located in iram
- *
- * @param newmask mask of interrupts needs to be disabled
- */
-static inline void interrupt_controller_hal_enable_int_mask(uint32_t newmask)
-{
-    intr_cntrl_ll_enable_int_mask(newmask);
-}
-
 /**
  * @brief Acknowledge an edge-trigger interrupt by clearing its pending flag
  *
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/ledc_types.h b/tools/sdk/esp32c3/include/hal/include/hal/ledc_types.h
index fa05ef41..0ddcf18c 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/ledc_types.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/ledc_types.h
@@ -134,6 +134,10 @@ typedef struct {
     ledc_timer_t timer_sel;         /*!< Select the timer source of channel (0 - 3) */
     uint32_t duty;                  /*!< LEDC channel duty, the range of duty setting is [0, (2**duty_resolution)] */
     int hpoint;                     /*!< LEDC channel hpoint value, the max value is 0xfffff */
+    struct {
+        unsigned int output_invert: 1;/*!< Enable (1) or disable (0) gpio output invert */
+    } flags;                        /*!< LEDC flags */
+
 } ledc_channel_config_t;
 
 /**
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/spi_flash_encrypt_hal.h b/tools/sdk/esp32c3/include/hal/include/hal/spi_flash_encrypt_hal.h
new file mode 100644
index 00000000..adc22f7e
--- /dev/null
+++ b/tools/sdk/esp32c3/include/hal/include/hal/spi_flash_encrypt_hal.h
@@ -0,0 +1,62 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The HAL is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for SPI Flash Encryption
+
+#include "hal/spi_flash_encrypted_ll.h"
+
+/**
+ * @brief Enable the flash encryption
+ */
+void spi_flash_encryption_hal_enable(void);
+
+/**
+ * @brief Disable the flash encryption
+ */
+void spi_flash_encryption_hal_disable(void);
+
+/**
+ * Prepare flash encryption before operation.
+ *
+ * @param address The destination address in flash for the write operation.
+ * @param buffer Data for programming
+ * @param size Size to program.
+ *
+ * @note address and buffer must be 8-word aligned.
+ */
+void spi_flash_encryption_hal_prepare(uint32_t address, const uint32_t* buffer, uint32_t size);
+
+/**
+ * @brief flash data encryption operation is done.
+ */
+void spi_flash_encryption_hal_done(void);
+
+/**
+ * Destroy encrypted result
+ */
+void spi_flash_encryption_hal_destroy(void);
+
+/**
+ * Check if is qualified to encrypt the buffer
+ *
+ * @param address the address of written flash partition.
+ * @param length Buffer size.
+ */
+bool spi_flash_encryption_hal_check(uint32_t address, uint32_t length);
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/spi_flash_types.h b/tools/sdk/esp32c3/include/hal/include/hal/spi_flash_types.h
index ed68d24f..0cc60559 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/spi_flash_types.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/spi_flash_types.h
@@ -86,6 +86,44 @@ typedef struct {
     };
 } spi_flash_sus_cmd_conf;
 
+/// Structure for flash encryption operations.
+typedef struct
+{
+    /**
+     * @brief Enable the flash encryption
+    */
+    void (*flash_encryption_enable)(void);
+    /**
+     * @brief Disable the flash encryption
+    */
+    void (*flash_encryption_disable)(void);
+    /**
+     * Prepare flash encryption before operation.
+     *
+     * @param address The destination address in flash for the write operation.
+     * @param buffer Data for programming
+     * @param size Size to program.
+     *
+     * @note address and buffer must be 8-word aligned.
+     */
+    void (*flash_encryption_data_prepare)(uint32_t address, const uint32_t* buffer, uint32_t size);
+    /**
+     * @brief flash data encryption operation is done.
+     */
+    void (*flash_encryption_done)(void);
+    /**
+     * Destroy encrypted result
+    */
+    void (*flash_encryption_destroy)(void);
+    /**
+     * Check if is qualified to encrypt the buffer
+     *
+     * @param address the address of written flash partition.
+     * @param length Buffer size.
+     */
+    bool (*flash_encryption_check)(uint32_t address, uint32_t length);
+} spi_flash_encryption_t;
+
 ///Slowest io mode supported by ESP32, currently SlowRd
 #define SPI_FLASH_READ_MODE_MIN SPI_FLASH_SLOWRD
 
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/spi_types.h b/tools/sdk/esp32c3/include/hal/include/hal/spi_types.h
index 5eb7a18d..400b922a 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/spi_types.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/spi_types.h
@@ -31,13 +31,17 @@ typedef enum {
 
 /// SPI Events
 typedef enum {
-    SPI_EV_BUF_TX        = BIT(0), ///< The buffer has sent data to master, Slave HD only
-    SPI_EV_BUF_RX        = BIT(1), ///< The buffer has received data from master, Slave HD only
-    SPI_EV_SEND          = BIT(2), ///< Slave has loaded some data to DMA, and master has received certain number of the data, the number is determined by master. Slave HD only
-    SPI_EV_RECV          = BIT(3), ///< Slave has received certain number of data from master, the number is determined by master. Slave HD only.
-    SPI_EV_CMD9          = BIT(4), ///< Received CMD9 from master, Slave HD only
-    SPI_EV_CMDA          = BIT(5), ///< Received CMDA from master, Slave HD only
-    SPI_EV_TRANS         = BIT(6), ///< A transaction has done
+    /* Slave HD Only */
+    SPI_EV_BUF_TX         = BIT(0), ///< The buffer has sent data to master.
+    SPI_EV_BUF_RX         = BIT(1), ///< The buffer has received data from master.
+    SPI_EV_SEND_DMA_READY = BIT(2), ///< Slave has loaded its TX data buffer to the hardware (DMA).
+    SPI_EV_SEND           = BIT(3), ///< Master has received certain number of the data, the number is determined by Master.
+    SPI_EV_RECV_DMA_READY = BIT(4), ///< Slave has loaded its RX data buffer to the hardware (DMA).
+    SPI_EV_RECV           = BIT(5), ///< Slave has received certain number of data from master, the number is determined by Master.
+    SPI_EV_CMD9           = BIT(6), ///< Received CMD9 from master.
+    SPI_EV_CMDA           = BIT(7), ///< Received CMDA from master.
+    /* Common Event */
+    SPI_EV_TRANS          = BIT(8), ///< A transaction has done
 } spi_event_t;
 FLAG_ATTR(spi_event_t)
 
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/systimer_hal.h b/tools/sdk/esp32c3/include/hal/include/hal/systimer_hal.h
index 1f4eb5c4..9ac3262f 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/systimer_hal.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/systimer_hal.h
@@ -14,78 +14,91 @@
 
 #pragma once
 
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/soc_caps.h"
+#include "soc/systimer_struct.h"
+#include "hal/systimer_types.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include <stdint.h>
-#include <stdbool.h>
-#include "hal/systimer_types.h"
-
-/**
- * @brief enable systimer counter
- */
-void systimer_hal_enable_counter(systimer_counter_id_t counter_id);
-
-/**
- * @brief get current counter value
- */
-uint64_t systimer_hal_get_counter_value(systimer_counter_id_t counter_id);
-
-/**
- * @brief get current time (in microseconds)
- */
-uint64_t systimer_hal_get_time(systimer_counter_id_t counter_id);
-
-/*
- * @brief set alarm target value (used in one-shot mode)
- */
-void systimer_hal_set_alarm_target(systimer_alarm_id_t alarm_id, uint64_t target);
-
-/**
- * @brief set alarm period value (used in period mode)
- */
-void systimer_hal_set_alarm_period(systimer_alarm_id_t alarm_id, uint32_t period);
-
-/**
- * @brief get alarm time
- */
-uint64_t systimer_hal_get_alarm_value(systimer_alarm_id_t alarm_id);
-
-/**
- * @brief enable alarm interrupt
- */
-void systimer_hal_enable_alarm_int(systimer_alarm_id_t alarm_id);
-
-/**
- * @brief select alarm mode
- */
-void systimer_hal_select_alarm_mode(systimer_alarm_id_t alarm_id, systimer_alarm_mode_t mode);
-
-/**
- * @brief update systimer step when apb clock gets changed
- */
-void systimer_hal_on_apb_freq_update(uint32_t apb_ticks_per_us);
-
-/**
- * @brief move systimer counter value forward or backward
- */
-void systimer_hal_counter_value_advance(systimer_counter_id_t counter_id, int64_t time_us);
+typedef struct {
+    systimer_dev_t *dev;
+} systimer_hal_context_t;
 
 /**
  * @brief initialize systimer in HAL layer
  */
-void systimer_hal_init(void);
+void systimer_hal_init(systimer_hal_context_t *hal);
+
+/**
+ * @brief enable systimer counter
+ */
+void systimer_hal_enable_counter(systimer_hal_context_t *hal, uint32_t counter_id);
+
+/**
+ * @brief get current counter value
+ */
+uint64_t systimer_hal_get_counter_value(systimer_hal_context_t *hal, uint32_t counter_id);
+
+/**
+ * @brief get current time (in microseconds)
+ */
+uint64_t systimer_hal_get_time(systimer_hal_context_t *hal, uint32_t counter_id);
+
+/*
+ * @brief set alarm target value (used in one-shot mode)
+ */
+void systimer_hal_set_alarm_target(systimer_hal_context_t *hal, uint32_t alarm_id, uint64_t target);
+
+/**
+ * @brief set alarm period value (used in period mode)
+ */
+void systimer_hal_set_alarm_period(systimer_hal_context_t *hal, uint32_t alarm_id, uint32_t period);
+
+/**
+ * @brief get alarm time
+ */
+uint64_t systimer_hal_get_alarm_value(systimer_hal_context_t *hal, uint32_t alarm_id);
+
+/**
+ * @brief enable alarm interrupt
+ */
+void systimer_hal_enable_alarm_int(systimer_hal_context_t *hal, uint32_t alarm_id);
+
+/**
+ * @brief select alarm mode
+ */
+void systimer_hal_select_alarm_mode(systimer_hal_context_t *hal, uint32_t alarm_id, systimer_alarm_mode_t mode);
+
+/**
+ * @brief update systimer step when apb clock gets changed
+ */
+void systimer_hal_on_apb_freq_update(systimer_hal_context_t *hal, uint32_t apb_ticks_per_us);
+
+/**
+ * @brief move systimer counter value forward or backward
+ */
+void systimer_hal_counter_value_advance(systimer_hal_context_t *hal, uint32_t counter_id, int64_t time_us);
 
 /**
  * @brief  connect alarm unit to selected counter
  */
-void systimer_hal_connect_alarm_counter(systimer_alarm_id_t alarm_id, systimer_counter_id_t counter_id);
+void systimer_hal_connect_alarm_counter(systimer_hal_context_t *hal, uint32_t alarm_id, uint32_t counter_id);
 
 /**
  * @brief  set if a counter should be stalled when CPU is halted by the debugger
  */
-void systimer_hal_counter_can_stall_by_cpu(uint32_t counter_id, uint32_t cpu_id, bool can);
+void systimer_hal_counter_can_stall_by_cpu(systimer_hal_context_t *hal, uint32_t counter_id, uint32_t cpu_id, bool can);
+
+#if !SOC_SYSTIMER_FIXED_TICKS_US
+/**
+ * @brief set increase steps for systimer counter on different clock source
+ */
+void systimer_hal_set_steps_per_tick(systimer_hal_context_t *hal, int clock_source, uint32_t steps);
+#endif
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/systimer_types.h b/tools/sdk/esp32c3/include/hal/include/hal/systimer_types.h
index cf88a00f..2af2f60f 100644
--- a/tools/sdk/esp32c3/include/hal/include/hal/systimer_types.h
+++ b/tools/sdk/esp32c3/include/hal/include/hal/systimer_types.h
@@ -14,13 +14,13 @@
 
 #pragma once
 
+#include <stdint.h>
+#include "soc/soc_caps.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include <stdint.h>
-#include "soc/soc_caps.h"
-
 /*
  * @brief The structure of the counter value in systimer
  *
@@ -39,27 +39,6 @@ typedef struct {
 _Static_assert(sizeof(systimer_counter_value_t) == 8, "systimer_counter_value_t should occupy 8 bytes in memory");
 /** @endcond */
 
-/**
- * @brief systimer counter ID
- *
- */
-typedef enum {
-    SYSTIMER_COUNTER_0, /*!< systimer counter 0 */
-#if SOC_SYSTIMER_COUNTER_NUM > 1
-    SYSTIMER_COUNTER_1, /*!< systimer counter 1 */
-#endif
-} systimer_counter_id_t;
-
-/**
- * @brief systimer alarm ID
- *
- */
-typedef enum {
-    SYSTIMER_ALARM_0, /*!< systimer alarm 0 */
-    SYSTIMER_ALARM_1, /*!< systimer alarm 1 */
-    SYSTIMER_ALARM_2, /*!< systimer alarm 2 */
-} systimer_alarm_id_t;
-
 /**
  * @brief systimer alarm mode
  *
diff --git a/tools/sdk/esp32c3/include/hal/include/hal/usb_types.h b/tools/sdk/esp32c3/include/hal/include/hal/usb_types.h
deleted file mode 100644
index 00f8b8c2..00000000
--- a/tools/sdk/esp32c3/include/hal/include/hal/usb_types.h
+++ /dev/null
@@ -1,452 +0,0 @@
-// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#pragma once
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-#include <stdint.h>
-
-#define USB_CTRL_REQ_ATTR       __attribute__((packed))
-#define USB_DESC_ATTR           __attribute__((packed))
-
-/* -----------------------------------------------------------------------------
-------------------------------- Common USB Types -------------------------------
------------------------------------------------------------------------------ */
-
-// ----------------------------- Device Related --------------------------------
-
-/**
- * @brief Enumeration of USB PHY type
- */
-typedef enum {
-    USB_PHY_INTERNAL = 0,       /**< Use the chip's internal USB PHY */
-    USB_PHY_EXTERNAL,           /**< Use an external USB PHY */
-} usb_phy_t;
-
-// ------------------------------ Bus Related ----------------------------------
-
-/**
- * @brief USB Standard Speeds
- */
-typedef enum {
-    USB_SPEED_LOW = 0,                  /**< USB Low Speed (1.5 Mbit/s) */
-    USB_SPEED_FULL,                     /**< USB Full Speed (12 Mbit/s) */
-} usb_speed_t;
-
-// ---------------------------- Transfer Related -------------------------------
-
-/**
- * @brief The type of USB transfer
- *
- * @note The enum values need to match the bmAttributes field of an EP descriptor
- */
-typedef enum {
-    USB_XFER_TYPE_CTRL = 0,
-    USB_XFER_TYPE_ISOCHRONOUS,
-    USB_XFER_TYPE_BULK,
-    USB_XFER_TYPE_INTR,
-} usb_xfer_type_t;
-
-/**
- * @brief The status of a particular transfer
- */
-typedef enum {
-    USB_TRANSFER_STATUS_COMPLETED,      /**< The transfer was successful (but may be short) */
-    USB_TRANSFER_STATUS_ERROR,          /**< The transfer failed because due to excessive errors (e.g. no response or CRC error) */
-    USB_TRANSFER_STATUS_TIMED_OUT,      /**< The transfer failed due to to a time out */
-    USB_TRANSFER_STATUS_CANCELLED,      /**< The transfer was cancelled */
-    USB_TRANSFER_STATUS_STALL,          /**< The transfer was stalled */
-    USB_TRANSFER_STATUS_NO_DEVICE,      /**< The transfer failed because the device is no longer valid (e.g., disconencted */
-    USB_TRANSFER_STATUS_OVERFLOW,       /**< The transfer as more data was sent than was requested */
-} usb_transfer_status_t;
-
-/**
- * @brief Isochronous packet descriptor
- *
- * If the number of bytes in an IRP transfer is larger than the MPS of the
- * endpoint, the IRP is split over multiple packets (one packet per bInterval
- * of the endpoint). An array of Isochronous packet descriptos describes how
- * an IRP should be split over multiple packets.
- */
-typedef struct {
-    int length;                         /**< Number of bytes to transmit/receive in the packet */
-    int actual_length;                  /**< Actual number of bytes transmitted/received in the packet */
-    usb_transfer_status_t status;       /**< Status of the packet */
-} usb_iso_packet_desc_t;
-
-/**
- * @brief USB IRP (I/O Request Packet). See USB2.0 Spec
- *
- * An identifiable request by a software client to move data between itself (on the
- * host) and an endpoint of a device in an appropriate direction.
- *
- * This structure represents the barebones of the request. Different layers of
- * USB drivers will wrap their own objects around this.
- *
- * See 10.5.3.1 os USB2.0 specification
- * Bulk: Represnts a single bulk transfer which a pipe will transparently split
- *       into multiple MPS transactions (until the last)
- * Control: Represents a single contorl transfer with the setup packet at the
- *          first 8 bytes of the buffer.
- * Interrupt: Represnts a single interrupt transaction
- * Isochronous: Represnts a buffer of a stream of bytes which the pipe will transparently
- *              transfer the stream of bytes one or more service periods
- */
-typedef struct {
-    int num_bytes;                      /**< Number of bytes in IRP. Control should exclude size of setup. IN should be integer multiple of MPS */
-    int actual_num_bytes;               /**< Actual number of bytes transmitted/receives in the IRP */
-    uint8_t *data_buffer;               /**< Pointer to data buffer. Must be DMA capable memory */
-    usb_transfer_status_t status;       /**< Status of the transfer */
-    int num_iso_packets;                /**< Only relevant to isochronous. Number of service periods to transfer data buffer over. Set to 0 for non-iso transfers */
-    usb_iso_packet_desc_t iso_packet_desc[0];   /**< Descriptors for each ISO packet */
-} usb_irp_t;
-
-/* -----------------------------------------------------------------------------
------------------------------------ Chapter 9 ----------------------------------
------------------------------------------------------------------------------ */
-
-// ------------------------------ Control Request ------------------------------
-
-/**
- * @brief Size of a USB control transfer setup packet in bytes
- */
-#define USB_CTRL_REQ_SIZE       8
-
-/**
- * @brief Structure representing a USB control transfer setup packet
- */
-typedef union {
-    struct {
-        uint8_t bRequestType;
-        uint8_t bRequest;
-        uint16_t wValue;
-        uint16_t wIndex;
-        uint16_t wLength;
-    } USB_CTRL_REQ_ATTR;
-    uint8_t val[USB_CTRL_REQ_SIZE];
-} usb_ctrl_req_t;
-_Static_assert(sizeof(usb_ctrl_req_t) == USB_CTRL_REQ_SIZE, "Size of usb_ctrl_req_t incorrect");
-
-/**
- * @brief Bit masks pertaining to the bRequestType field of a setup packet
- */
-#define USB_B_REQUEST_TYPE_DIR_OUT          (0X00 << 7)
-#define USB_B_REQUEST_TYPE_DIR_IN           (0x01 << 7)
-#define USB_B_REQUEST_TYPE_TYPE_STANDARD    (0x00 << 5)
-#define USB_B_REQUEST_TYPE_TYPE_CLASS       (0x01 << 5)
-#define USB_B_REQUEST_TYPE_TYPE_VENDOR      (0x02 << 5)
-#define USB_B_REQUEST_TYPE_TYPE_RESERVED    (0x03 << 5)
-#define USB_B_REQUEST_TYPE_TYPE_MASK        (0x03 << 5)
-#define USB_B_REQUEST_TYPE_RECIP_DEVICE     (0x00 << 0)
-#define USB_B_REQUEST_TYPE_RECIP_INTERFACE  (0x01 << 0)
-#define USB_B_REQUEST_TYPE_RECIP_ENDPOINT   (0x02 << 0)
-#define USB_B_REQUEST_TYPE_RECIP_OTHER      (0x03 << 0)
-#define USB_B_REQUEST_TYPE_RECIP_MASK       (0x1f << 0)
-
-/**
- * @brief Bit masks pertaining to the bRequest field of a setup packet
- */
-#define USB_B_REQUEST_GET_STATUS            0x00
-#define USB_B_REQUEST_CLEAR_FEATURE         0x01
-#define USB_B_REQUEST_SET_FEATURE           0x03
-#define USB_B_REQUEST_SET_ADDRESS           0x05
-#define USB_B_REQUEST_GET_DESCRIPTOR        0x06
-#define USB_B_REQUEST_SET_DESCRIPTOR        0x07
-#define USB_B_REQUEST_GET_CONFIGURATION     0x08
-#define USB_B_REQUEST_SET_CONFIGURATION     0x09
-#define USB_B_REQUEST_GET_INTERFACE         0x0A
-#define USB_B_REQUEST_SET_INTERFACE         0x0B
-#define USB_B_REQUEST_SYNCH_FRAME           0x0C
-
-/**
- * @brief Bit masks pertaining to the wValue field of a setup packet
- */
-#define USB_W_VALUE_DT_DEVICE               0x01
-#define USB_W_VALUE_DT_CONFIG               0x02
-#define USB_W_VALUE_DT_STRING               0x03
-#define USB_W_VALUE_DT_INTERFACE            0x04
-#define USB_W_VALUE_DT_ENDPOINT             0x05
-#define USB_W_VALUE_DT_DEVICE_QUALIFIER     0x06
-#define USB_W_VALUE_DT_OTHER_SPEED_CONFIG   0x07
-#define USB_W_VALUE_DT_INTERFACE_POWER      0x08
-
-/**
- * @brief Initializer for a SET_ADDRESS request
- *
- * Sets the address of a connected device
- */
-#define USB_CTRL_REQ_INIT_SET_ADDR(ctrl_req_ptr, addr) ({  \
-    (ctrl_req_ptr)->bRequestType = USB_B_REQUEST_TYPE_DIR_OUT | USB_B_REQUEST_TYPE_TYPE_STANDARD |USB_B_REQUEST_TYPE_RECIP_DEVICE;   \
-    (ctrl_req_ptr)->bRequest = USB_B_REQUEST_SET_ADDRESS;  \
-    (ctrl_req_ptr)->wValue = (addr);   \
-    (ctrl_req_ptr)->wIndex = 0;    \
-    (ctrl_req_ptr)->wLength = 0;   \
-})
-
-/**
- * @brief Initializer for a request to get a device's device descriptor
- */
-#define USB_CTRL_REQ_INIT_GET_DEVC_DESC(ctrl_req_ptr) ({ \
-    (ctrl_req_ptr)->bRequestType = USB_B_REQUEST_TYPE_DIR_IN | USB_B_REQUEST_TYPE_TYPE_STANDARD | USB_B_REQUEST_TYPE_RECIP_DEVICE;   \
-    (ctrl_req_ptr)->bRequest = USB_B_REQUEST_GET_DESCRIPTOR;   \
-    (ctrl_req_ptr)->wValue = (USB_W_VALUE_DT_DEVICE << 8); \
-    (ctrl_req_ptr)->wIndex = 0;    \
-    (ctrl_req_ptr)->wLength = 18;  \
-})
-
-/**
- * @brief Initializer for a request to get a device's current configuration number
- */
-#define USB_CTRL_REQ_INIT_GET_CONFIG(ctrl_req_ptr) ({  \
-    (ctrl_req_ptr)->bRequestType = USB_B_REQUEST_TYPE_DIR_IN | USB_B_REQUEST_TYPE_TYPE_STANDARD | USB_B_REQUEST_TYPE_RECIP_DEVICE;   \
-    (ctrl_req_ptr)->bRequest = USB_B_REQUEST_GET_CONFIGURATION;    \
-    (ctrl_req_ptr)->wValue = 0;    \
-    (ctrl_req_ptr)->wIndex = 0;    \
-    (ctrl_req_ptr)->wLength = 1;   \
-})
-
-/**
- * @brief Initializer for a request to get one of the device's current configuration descriptor
- *
- * - desc_index indicates the configuration's index number
- * - Number of bytes of the configuration descriptor to get
- */
-#define USB_CTRL_REQ_INIT_GET_CFG_DESC(ctrl_req_ptr, desc_index, desc_len) ({  \
-    (ctrl_req_ptr)->bRequestType = USB_B_REQUEST_TYPE_DIR_IN | USB_B_REQUEST_TYPE_TYPE_STANDARD | USB_B_REQUEST_TYPE_RECIP_DEVICE;   \
-    (ctrl_req_ptr)->bRequest = USB_B_REQUEST_GET_DESCRIPTOR;   \
-    (ctrl_req_ptr)->wValue = (USB_W_VALUE_DT_CONFIG << 8) | ((desc_index) & 0xFF); \
-    (ctrl_req_ptr)->wIndex = 0;    \
-    (ctrl_req_ptr)->wLength = (desc_len);  \
-})
-
-/**
- * @brief Initializer for a request to set a device's current configuration number
- */
-#define USB_CTRL_REQ_INIT_SET_CONFIG(ctrl_req_ptr, config_num) ({  \
-    (ctrl_req_ptr)->bRequestType = USB_B_REQUEST_TYPE_DIR_OUT | USB_B_REQUEST_TYPE_TYPE_STANDARD | USB_B_REQUEST_TYPE_RECIP_DEVICE;   \
-    (ctrl_req_ptr)->bRequest = USB_B_REQUEST_SET_CONFIGURATION;    \
-    (ctrl_req_ptr)->wValue = (config_num); \
-    (ctrl_req_ptr)->wIndex = 0;    \
-    (ctrl_req_ptr)->wLength = 0;   \
-})
-
-// ---------------------------- Device Descriptor ------------------------------
-
-/**
- * @brief Size of a USB device descriptor in bytes
- */
-#define USB_DESC_DEV_SIZE       18
-
-/**
- * @brief Structure representing a USB device descriptor
- */
-typedef union {
-    struct {
-        uint8_t bLength;
-        uint8_t bDescriptorType;
-        uint16_t bcdUSB;
-        uint8_t bDeviceClass;
-        uint8_t bDeviceSubClass;
-        uint8_t bDeviceProtocol;
-        uint8_t bMaxPacketSize0;
-        uint16_t idVendor;
-        uint16_t idProduct;
-        uint16_t bcdDevice;
-        uint8_t iManufacturer;
-        uint8_t iProduct;
-        uint8_t iSerialNumber;
-        uint8_t bNumConfigurations;
-    } USB_DESC_ATTR;
-    uint8_t val[USB_DESC_DEV_SIZE];
-} usb_desc_devc_t;
-_Static_assert(sizeof(usb_desc_devc_t) == USB_DESC_DEV_SIZE, "Size of usb_desc_devc_t incorrect");
-
-/**
- * @brief Possible base class values of the bDeviceClass field of a USB device descriptor
- */
-#define USB_CLASS_PER_INTERFACE             0x00
-#define USB_CLASS_AUDIO                     0x01
-#define USB_CLASS_COMM                      0x02
-#define USB_CLASS_HID                       0x03
-#define USB_CLASS_PHYSICAL                  0x05
-#define USB_CLASS_STILL_IMAGE               0x06
-#define USB_CLASS_PRINTER                   0x07
-#define USB_CLASS_MASS_STORAGE              0x08
-#define USB_CLASS_HUB                       0x09
-#define USB_CLASS_CDC_DATA                  0x0a
-#define USB_CLASS_CSCID                     0x0b
-#define USB_CLASS_CONTENT_SEC               0x0d
-#define USB_CLASS_VIDEO                     0x0e
-#define USB_CLASS_WIRELESS_CONTROLLER       0xe0
-#define USB_CLASS_PERSONAL_HEALTHCARE       0x0f
-#define USB_CLASS_AUDIO_VIDEO               0x10
-#define USB_CLASS_BILLBOARD                 0x11
-#define USB_CLASS_USB_TYPE_C_BRIDGE         0x12
-#define USB_CLASS_MISC                      0xef
-#define USB_CLASS_APP_SPEC                  0xfe
-#define USB_CLASS_VENDOR_SPEC               0xff
-
-/**
- * @brief Vendor specific subclass code
- */
-#define USB_SUBCLASS_VENDOR_SPEC            0xff
-
-// ----------------------- Configuration Descriptor ----------------------------
-
-/**
- * @brief Size of a short USB configuration descriptor in bytes
- *
- * @note The size of a full USB configuration includes all the interface and endpoint
- *       descriptors of that configuration.
- */
-#define USB_DESC_CFG_SIZE       9
-
-/**
- * @brief Structure representing a short USB configuration descriptor
- *
- * @note The full USB configuration includes all the interface and endpoint
- *       descriptors of that configuration.
- */
-typedef union {
-    struct {
-        uint8_t bLength;
-        uint8_t bDescriptorType;
-        uint16_t wTotalLength;
-        uint8_t bNumInterfaces;
-        uint8_t bConfigurationValue;
-        uint8_t iConfiguration;
-        uint8_t bmAttributes;
-        uint8_t bMaxPower;
-    } USB_DESC_ATTR;
-    uint8_t val[USB_DESC_CFG_SIZE];
-} usb_desc_cfg_t;
-_Static_assert(sizeof(usb_desc_cfg_t) == USB_DESC_CFG_SIZE, "Size of usb_desc_cfg_t incorrect");
-
-/**
- * @brief Bit masks pertaining to the bmAttributes field of a configuration descriptor
- */
-#define USB_BM_ATTRIBUTES_ONE               (1 << 7)    //Must be set
-#define USB_BM_ATTRIBUTES_SELFPOWER         (1 << 6)    //Self powered
-#define USB_BM_ATTRIBUTES_WAKEUP            (1 << 5)    //Can wakeup
-#define USB_BM_ATTRIBUTES_BATTERY           (1 << 4)    //Battery powered
-
-// ------------------------- Interface Descriptor ------------------------------
-
-/**
- * @brief Size of a USB interface descriptor in bytes
- */
-#define USB_DESC_INTF_SIZE      9
-
-/**
- * @brief Structure representing a USB interface descriptor
- */
-typedef union {
-    struct {
-        uint8_t bLength;
-        uint8_t bDescriptorType;
-        uint8_t bInterfaceNumber;
-        uint8_t bAlternateSetting;
-        uint8_t bNumEndpoints;
-        uint8_t bInterfaceClass;
-        uint8_t bInterfaceSubClass;
-        uint8_t bInterfaceProtocol;
-        uint8_t iInterface;
-    } USB_DESC_ATTR;
-    uint8_t val[USB_DESC_INTF_SIZE];
-} usb_desc_intf_t;
-_Static_assert(sizeof(usb_desc_intf_t) == USB_DESC_INTF_SIZE, "Size of usb_desc_intf_t incorrect");
-
-// ------------------------- Endpoint Descriptor -------------------------------
-
-/**
- * @brief Size of a USB endpoint descriptor in bytes
- */
-#define USB_DESC_EP_SIZE        7
-
-/**
- * @brief Structure representing a USB endp;oint descriptor
- */
-typedef union {
-    struct {
-        uint8_t bLength;
-        uint8_t bDescriptorType;
-        uint8_t bEndpointAddress;
-        uint8_t bmAttributes;
-        uint16_t wMaxPacketSize;
-        uint8_t bInterval;
-    } USB_DESC_ATTR;
-    uint8_t val[USB_DESC_EP_SIZE];
-} usb_desc_ep_t;
-_Static_assert(sizeof(usb_desc_ep_t) == USB_DESC_EP_SIZE, "Size of usb_desc_ep_t incorrect");
-
-/**
- * @brief Bit masks pertaining to the bEndpointAddress field of an endpoint descriptor
- */
-#define USB_B_ENDPOINT_ADDRESS_EP_NUM_MASK              0x0f
-#define USB_B_ENDPOINT_ADDRESS_EP_DIR_MASK              0x80
-
-/**
- * @brief Bit masks pertaining to the bmAttributes field of an endpoint descriptor
- */
-#define USB_BM_ATTRIBUTES_XFERTYPE_MASK                 0x03
-#define USB_BM_ATTRIBUTES_XFER_CONTROL                  (0 << 0)
-#define USB_BM_ATTRIBUTES_XFER_ISOC                     (1 << 0)
-#define USB_BM_ATTRIBUTES_XFER_BULK                     (2 << 0)
-#define USB_BM_ATTRIBUTES_XFER_INT                      (3 << 0)
-#define USB_BM_ATTRIBUTES_SYNCTYPE_MASK                 0x0C    /* in bmAttributes */
-#define USB_BM_ATTRIBUTES_SYNC_NONE                     (0 << 2)
-#define USB_BM_ATTRIBUTES_SYNC_ASYNC                    (1 << 2)
-#define USB_BM_ATTRIBUTES_SYNC_ADAPTIVE                 (2 << 2)
-#define USB_BM_ATTRIBUTES_SYNC_SYNC                     (3 << 2)
-#define USB_BM_ATTRIBUTES_USAGETYPE_MASK                0x30
-#define USB_BM_ATTRIBUTES_USAGE_DATA                    (0 << 4)
-#define USB_BM_ATTRIBUTES_USAGE_FEEDBACK                (1 << 4)
-#define USB_BM_ATTRIBUTES_USAGE_IMPLICIT_FB             (2 << 4)
-
-/**
- * @brief Macro helpers to get information about an endpoint from its descriptor
- */
-#define USB_DESC_EP_GET_XFERTYPE(desc_ptr) ((usb_xfer_type_t) ((desc_ptr)->bmAttributes & USB_BM_ATTRIBUTES_XFERTYPE_MASK))
-#define USB_DESC_EP_GET_EP_NUM(desc_ptr) ((desc_ptr)->bEndpointAddress & USB_B_ENDPOINT_ADDRESS_EP_NUM_MASK)
-#define USB_DESC_EP_GET_EP_DIR(desc_ptr) (((desc_ptr)->bEndpointAddress & USB_B_ENDPOINT_ADDRESS_EP_DIR_MASK) ? 1 : 0)
-#define USB_DESC_EP_GET_MPS(desc_ptr) ((desc_ptr)->wMaxPacketSize & 0x7FF)
-
-
-// --------------------------- String Descriptor -------------------------------
-
-/**
- * @brief Size of a short USB string descriptor in bytes
- */
-#define USB_DESC_STR_SIZE       4
-
-/**
- * @brief Structure representing a USB string descriptor
- */
-typedef union {
-    struct {
-        uint8_t bLength;
-        uint8_t bDescriptorType;
-        uint16_t wData[1];        /* UTF-16LE encoded */
-    } USB_DESC_ATTR;
-    uint8_t val[USB_DESC_STR_SIZE];
-} usb_desc_str_t;
-_Static_assert(sizeof(usb_desc_str_t) == USB_DESC_STR_SIZE, "Size of usb_desc_str_t incorrect");
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32c3/include/log/include/esp_log.h b/tools/sdk/esp32c3/include/log/include/esp_log.h
index 5a488936..c41a9d3c 100644
--- a/tools/sdk/esp32c3/include/log/include/esp_log.h
+++ b/tools/sdk/esp32c3/include/log/include/esp_log.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef __ESP_LOG_H__
 #define __ESP_LOG_H__
@@ -48,13 +40,22 @@ typedef enum {
 
 typedef int (*vprintf_like_t)(const char *, va_list);
 
+/**
+ * @brief Default log level
+ *
+ * This is used by the definition of ESP_EARLY_LOGx macros. It is not
+ * recommended to set this directly, call esp_log_level_set("*", level)
+ * instead.
+ */
+extern esp_log_level_t esp_log_default_level;
+
 /**
  * @brief Set log level for given tag
  *
  * If logging for given component has already been enabled, changes previous setting.
  *
  * Note that this function can not raise log level above the level set using
- * CONFIG_LOG_DEFAULT_LEVEL setting in menuconfig.
+ * CONFIG_LOG_MAXIMUM_LEVEL setting in menuconfig.
  *
  * To raise log level above the default one for a given file, define
  * LOG_LOCAL_LEVEL to one of the ESP_LOG_* values, before including
@@ -145,7 +146,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 
 #ifndef LOG_LOCAL_LEVEL
 #ifndef BOOTLOADER_BUILD
-#define LOG_LOCAL_LEVEL  CONFIG_LOG_DEFAULT_LEVEL
+#define LOG_LOCAL_LEVEL  CONFIG_LOG_MAXIMUM_LEVEL
 #else
 #define LOG_LOCAL_LEVEL  CONFIG_BOOTLOADER_LOG_LEVEL
 #endif
@@ -279,7 +280,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 
 /** @endcond */
 
-/// macro to output logs in startup code, before heap allocator and syscalls have been initialized. log at ``ESP_LOG_ERROR`` level. @see ``printf``,``ESP_LOGE``
+/// macro to output logs in startup code, before heap allocator and syscalls have been initialized. log at ``ESP_LOG_ERROR`` level. @see ``printf``,``ESP_LOGE``,``ESP_DRAM_LOGE``
 #define ESP_EARLY_LOGE( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_ERROR,   E, ##__VA_ARGS__)
 /// macro to output logs in startup code at ``ESP_LOG_WARN`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
 #define ESP_EARLY_LOGW( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_WARN,    W, ##__VA_ARGS__)
@@ -290,8 +291,16 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 /// macro to output logs in startup code at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
 #define ESP_EARLY_LOGV( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_VERBOSE, V, ##__VA_ARGS__)
 
+#ifdef BOOTLOADER_BUILD
+#define _ESP_LOG_EARLY_ENABLED(log_level) (LOG_LOCAL_LEVEL >= (log_level))
+#else
+/* For early log, there is no log tag filtering. So we want to log only if both the LOG_LOCAL_LEVEL and the
+   currently configured min log level are higher than the log level */
+#define _ESP_LOG_EARLY_ENABLED(log_level) (LOG_LOCAL_LEVEL >= (log_level) && esp_log_default_level >= (log_level))
+#endif
+
 #define ESP_LOG_EARLY_IMPL(tag, format, log_level, log_tag_letter, ...) do {                             \
-        if (LOG_LOCAL_LEVEL >= log_level) {                                                              \
+        if (_ESP_LOG_EARLY_ENABLED(log_level)) {                                                         \
             esp_rom_printf(LOG_FORMAT(log_tag_letter, format), esp_log_timestamp(), tag, ##__VA_ARGS__); \
         }} while(0)
 
@@ -303,7 +312,9 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 #define ESP_LOGV( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_VERBOSE, tag, format, ##__VA_ARGS__)
 #else
 /**
- * macro to output logs at ESP_LOG_ERROR level.
+ * Macro to output logs at ESP_LOG_ERROR level.
+ *
+ * @note This macro cannot be used when interrupts are disabled or inside an ISR. @see ``ESP_DRAM_LOGE``.
  *
  * @param tag tag of the log, which can be used to change the log level by ``esp_log_level_set`` at runtime.
  *
@@ -359,7 +370,11 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 /**
  * @brief Macro to output logs when the cache is disabled. log at ``ESP_LOG_ERROR`` level.
  *
- * Similar to `ESP_EARLY_LOGE`, the log level cannot be changed by `esp_log_level_set`.
+ * @note Unlike normal logging macros, it's possible to use this macro when interrupts are
+ * disabled or inside an ISR.
+ *
+ * Similar to @see ``ESP_EARLY_LOGE``, the log level cannot be changed per-tag, however
+ * esp_log_level_set("*", level) will set the default level which controls these log lines also.
  *
  * Usage: `ESP_DRAM_LOGE(DRAM_STR("my_tag"), "format", or `ESP_DRAM_LOGE(TAG, "format", ...)`,
  * where TAG is a char* that points to a str in the DRAM.
@@ -382,7 +397,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 #define _ESP_LOG_DRAM_LOG_FORMAT(letter, format)  DRAM_STR(#letter " %s: " format "\n")
 
 #define ESP_DRAM_LOG_IMPL(tag, format, log_level, log_tag_letter, ...) do {                       \
-        if (LOG_LOCAL_LEVEL >= log_level) {                                                       \
+        if (_ESP_LOG_EARLY_ENABLED(log_level)) {                                                  \
             esp_rom_printf(_ESP_LOG_DRAM_LOG_FORMAT(log_tag_letter, format), tag, ##__VA_ARGS__); \
         }} while(0)
 /** @endcond */
diff --git a/tools/sdk/esp32c3/include/log/include/esp_log_internal.h b/tools/sdk/esp32c3/include/log/include/esp_log_internal.h
index ee4b2ce5..732f949c 100644
--- a/tools/sdk/esp32c3/include/log/include/esp_log_internal.h
+++ b/tools/sdk/esp32c3/include/log/include/esp_log_internal.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef __ESP_LOG_INTERNAL_H__
 #define __ESP_LOG_INTERNAL_H__
diff --git a/tools/sdk/esp32c3/include/lwip/port/esp32/include/arch/cc.h b/tools/sdk/esp32c3/include/lwip/port/esp32/include/arch/cc.h
index 78935f3b..f17c4978 100644
--- a/tools/sdk/esp32c3/include/lwip/port/esp32/include/arch/cc.h
+++ b/tools/sdk/esp32c3/include/lwip/port/esp32/include/arch/cc.h
@@ -39,8 +39,13 @@
 #include <assert.h>
 #include <stdio.h>
 
+#include "sdkconfig.h"
 #include "arch/sys_arch.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifndef BYTE_ORDER
 #define BYTE_ORDER LITTLE_ENDIAN
 #endif // BYTE_ORDER
@@ -103,5 +108,8 @@ typedef int sys_prot_t;
 
 #endif /* NDEBUG */
 
+#ifdef __cplusplus
+}
+#endif
 
 #endif /* __ARCH_CC_H__ */
diff --git a/tools/sdk/esp32c3/include/lwip/port/esp32/include/lwip_default_hooks.h b/tools/sdk/esp32c3/include/lwip/port/esp32/include/lwip_default_hooks.h
index 4af3c658..3f3ec0b2 100644
--- a/tools/sdk/esp32c3/include/lwip/port/esp32/include/lwip_default_hooks.h
+++ b/tools/sdk/esp32c3/include/lwip/port/esp32/include/lwip_default_hooks.h
@@ -42,6 +42,12 @@ lwip_hook_ip6_route(const ip6_addr_t *src, const ip6_addr_t *dest);
 #define LWIP_HOOK_IP6_ROUTE lwip_hook_ip6_route
 #endif /* CONFIG_LWIP_HOOK_IP6_ROUTE... */
 
+#if defined(CONFIG_LWIP_HOOK_ND6_GET_GW_CUSTOM) || defined(CONFIG_LWIP_HOOK_ND6_GET_GW_DEFAULT)
+const ip6_addr_t *lwip_hook_nd6_get_gw(struct netif *netif, const ip6_addr_t *dest);
+
+#define LWIP_HOOK_ND6_GET_GW lwip_hook_nd6_get_gw
+#endif /* CONFIG_LWIP_HOOK_ND6_GET_GATEWAY... */
+
 #if defined(CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_CUSTOM) || defined(CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_DEFAULT)
 int lwip_hook_netconn_external_resolve(const char *name, ip_addr_t *addr, u8_t addrtype, err_t *err);
 
diff --git a/tools/sdk/esp32c3/include/lwip/port/esp32/include/lwipopts.h b/tools/sdk/esp32c3/include/lwip/port/esp32/include/lwipopts.h
index 52d2d99d..4d580951 100644
--- a/tools/sdk/esp32c3/include/lwip/port/esp32/include/lwipopts.h
+++ b/tools/sdk/esp32c3/include/lwip/port/esp32/include/lwipopts.h
@@ -249,6 +249,10 @@
  */
 #define DHCP_DOES_ARP_CHECK             CONFIG_LWIP_DHCP_DOES_ARP_CHECK
 
+/**
+ * LWIP_DHCP_DISABLE_CLIENT_ID==1: Do not add option 61 (client-id) to DHCP packets
+ */
+#define ESP_DHCP_DISABLE_CLIENT_ID      CONFIG_LWIP_DHCP_DISABLE_CLIENT_ID
 
 /**
  * CONFIG_LWIP_DHCP_RESTORE_LAST_IP==1: Last valid IP address obtained from DHCP server
@@ -453,6 +457,8 @@
  */
 #define LWIP_NETIF_API                      CONFIG_LWIP_NETIF_API
 
+#define LWIP_NETIF_STATUS_CALLBACK      CONFIG_LWIP_NETIF_STATUS_CALLBACK
+
 /*
    ------------------------------------
    ---------- LOOPIF options ----------
@@ -688,7 +694,7 @@
  * Some modems do not support IPV6 addressing in local link and
  * the only option available is to disable IPV6 address negotiation.
  */
-#define PPP_IPV6_SUPPORT				CONFIG_LWIP_PPP_ENABLE_IPV6
+#define PPP_IPV6_SUPPORT                               CONFIG_LWIP_PPP_ENABLE_IPV6
 
 /**
  * PPP_NOTIFY_PHASE==1: Support PPP notify phase.
@@ -957,6 +963,10 @@
  */
 #define LWIP_SOCKET_OFFSET              (FD_SETSIZE - CONFIG_LWIP_MAX_SOCKETS)
 
+#define LWIP_IPV6_FORWARD               CONFIG_LWIP_IPV6_FORWARD
+
+#define LWIP_IPV6_NUM_ADDRESSES         CONFIG_LWIP_IPV6_NUM_ADDRESSES
+
 /* Enable all Espressif-only options */
 
 #define ESP_LWIP                        1
diff --git a/tools/sdk/esp32c3/include/mbedtls/port/include/mbedtls/esp_config.h b/tools/sdk/esp32c3/include/mbedtls/port/include/mbedtls/esp_config.h
index 844d3f1e..1ff7ea4a 100644
--- a/tools/sdk/esp32c3/include/mbedtls/port/include/mbedtls/esp_config.h
+++ b/tools/sdk/esp32c3/include/mbedtls/port/include/mbedtls/esp_config.h
@@ -144,6 +144,15 @@
 #undef MBEDTLS_SHA512_ALT
 #endif
 
+/* MBEDTLS_MDx_ALT to enable ROM MD support
+   with software fallback.
+*/
+#ifdef CONFIG_MBEDTLS_ROM_MD5
+#define MBEDTLS_MD5_ALT
+#else
+#undef MBEDTLS_MD5_ALT
+#endif
+
 /* The following MPI (bignum) functions have ESP32 hardware support.
    For exponential mod, both software and hardware implementation
    will be compiled. If CONFIG_MBEDTLS_HARDWARE_MPI is enabled, mod APIs
@@ -2451,6 +2460,21 @@
 #undef MBEDTLS_THREADING_PTHREAD
 #endif
 
+/**
+ * \def MBEDTLS_NIST_KW_C
+ *
+ * Enable AES key wrapping as per NIST
+ *
+ * Requires: MBEDTLS_AES_C
+ *
+ * Uncomment this to enable aes key wrap.
+ */
+#ifdef CONFIG_MBEDTLS_NIST_KW_C
+#define MBEDTLS_NIST_KW_C
+#else
+#undef MBEDTLS_NIST_KW_C
+#endif
+
 /* \} name SECTION: Module configuration options */
 
 #if defined(TARGET_LIKE_MBED)
diff --git a/tools/sdk/esp32c3/include/mbedtls/port/include/md/esp_md.h b/tools/sdk/esp32c3/include/mbedtls/port/include/md/esp_md.h
new file mode 100644
index 00000000..e61b6c4e
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/port/include/md/esp_md.h
@@ -0,0 +1,154 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+
+#pragma once
+
+#include "esp_rom_md5.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct MD5Context mbedtls_md5_context;
+
+/**
+ * \brief          Initialize MD5 context
+ *
+ * \param ctx      MD5 context to be initialized
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int esp_md5_init_ret( mbedtls_md5_context *ctx );
+
+/**
+ * \brief          Clear MD5 context
+ *
+ * \param ctx      MD5 context to be cleared
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_free( mbedtls_md5_context *ctx );
+
+/**
+ * \brief          Clone (the state of) an MD5 context
+ *
+ * \param dst      The destination context
+ * \param src      The context to be cloned
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_clone( mbedtls_md5_context *dst, const mbedtls_md5_context *src );
+
+/**
+ * \brief          MD5 process buffer
+ *
+ * \param ctx      MD5 context
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int esp_md5_update_ret( mbedtls_md5_context *ctx, const unsigned char *input, size_t ilen );
+
+/**
+ * \brief          MD5 final digest
+ *
+ * \param ctx      MD5 context
+ * \param output   MD5 checksum result
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int esp_md5_finish_ret( mbedtls_md5_context *ctx, unsigned char output[16] );
+
+/**
+ * \brief          MD5 process data block (internal use only)
+ *
+ * \param ctx      MD5 context
+ * \param data     buffer holding one block of data
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int esp_md5_process( mbedtls_md5_context *ctx, const unsigned char data[64] );
+
+/**
+ * \brief          MD5 context setup
+ *
+ * \deprecated     Superseded by mbedtls_md5_starts_ret() in 2.7.0
+ *
+ * \param ctx      context to be initialized
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_init( mbedtls_md5_context *ctx );
+
+/**
+ * \brief          MD5 process buffer
+ *
+ * \deprecated     Superseded by mbedtls_md5_update_ret() in 2.7.0
+ *
+ * \param ctx      MD5 context
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_update( mbedtls_md5_context *ctx, const unsigned char *input, size_t ilen );
+
+/**
+ * \brief          MD5 final digest
+ *
+ * \deprecated     Superseded by mbedtls_md5_finish_ret() in 2.7.0
+ *
+ * \param ctx      MD5 context
+ * \param output   MD5 checksum result
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_finish( mbedtls_md5_context *ctx, unsigned char output[16] );
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/mbedtls/port/include/md5_alt.h b/tools/sdk/esp32c3/include/mbedtls/port/include/md5_alt.h
new file mode 100644
index 00000000..4777d047
--- /dev/null
+++ b/tools/sdk/esp32c3/include/mbedtls/port/include/md5_alt.h
@@ -0,0 +1,50 @@
+/**
+ * \file md5_alt.h
+ *
+ * \brief MD5 block cipher
+ *
+ *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *
+ */
+#ifndef MD5_ALT_H
+#define MD5_ALT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(MBEDTLS_MD5_ALT)
+#include "md/esp_md.h"
+
+#define mbedtls_md5_init                        esp_md5_init
+#define mbedtls_md5_update                      esp_md5_update
+#define mbedtls_md5_finish                      esp_md5_finish
+#define mbedtls_md5_starts_ret                  esp_md5_init_ret
+#define mbedtls_md5_update_ret                  esp_md5_update_ret
+#define mbedtls_md5_finish_ret                  esp_md5_finish_ret
+
+#define mbedtls_md5_free                        esp_md5_free
+#define mbedtls_md5_clone                       esp_md5_clone
+#define mbedtls_internal_md5_process            esp_md5_process
+
+#endif /* MBEDTLS_MD5_ALT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32c3/include/newlib/platform_include/sys/dirent.h b/tools/sdk/esp32c3/include/newlib/platform_include/sys/dirent.h
index 97e4bfed..4626ae14 100644
--- a/tools/sdk/esp32c3/include/newlib/platform_include/sys/dirent.h
+++ b/tools/sdk/esp32c3/include/newlib/platform_include/sys/dirent.h
@@ -42,7 +42,12 @@ struct dirent {
 #define DT_UNKNOWN  0
 #define DT_REG      1
 #define DT_DIR      2
-    char d_name[256];   /*!< zero-terminated file name */
+#if __BSD_VISIBLE
+#define MAXNAMLEN 255
+    char d_name[MAXNAMLEN+1];   /*!< zero-terminated file name */
+#else
+    char d_name[256];
+#endif
 };
 
 DIR* opendir(const char* name);
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/brownout_caps.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/brownout_caps.h
deleted file mode 100644
index 797d33eb..00000000
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/brownout_caps.h
+++ /dev/null
@@ -1,25 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#pragma once
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define SOC_BROWNOUT_RESET_SUPPORTED 1
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/gdma_caps.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/gdma_caps.h
deleted file mode 100644
index 0bd39fe5..00000000
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/gdma_caps.h
+++ /dev/null
@@ -1,18 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#pragma once
-
-#define SOC_GDMA_GROUPS          (1)
-#define SOC_GDMA_PAIRS_PER_GROUP (3)
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/gpio_caps.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/gpio_caps.h
deleted file mode 100644
index 8da8d219..00000000
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/gpio_caps.h
+++ /dev/null
@@ -1,42 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#pragma once
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-// ESP32-C3 has 1 GPIO peripheral
-#define SOC_GPIO_PORT           (1)
-#define SOC_GPIO_PIN_COUNT          (22)
-
-// Target has no full RTC IO subsystem, so GPIO is 100% "independent" of RTC
-// On ESP32-C3, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers.
-#define GPIO_SUPPORTS_RTC_INDEPENDENT (1)
-// Force hold is a new function of ESP32-C3
-#define SOC_GPIO_SUPPORT_FORCE_HOLD      (1)
-// GPIO0~5 on ESP32C3 can support chip deep sleep wakeup
-#define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP      (1)
-
-#define SOC_GPIO_VALID_GPIO_MASK        ((1U<<SOC_GPIO_PIN_COUNT) - 1)
-#define SOC_GPIO_VALID_OUTPUT_GPIO_MASK SOC_GPIO_VALID_GPIO_MASK
-#define SOC_GPIO_DEEP_SLEEP_WAKEUP_VALID_GPIO_MASK        (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5)
-
-// Support to configure slept status
-#define SOC_GPIO_SUPPORT_SLP_SWITCH  (1)
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/i2c_caps.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/i2c_caps.h
deleted file mode 100644
index ae2f19e0..00000000
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/i2c_caps.h
+++ /dev/null
@@ -1,37 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#pragma once
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-// ESP32-C3 have 2 I2C.
-#define SOC_I2C_NUM            (1)
-
-#define SOC_I2C_FIFO_LEN       (32) /*!< I2C hardware FIFO depth */
-#define I2C_INTR_MASK          (0x3ffff) /*!< I2C all interrupt bitmap */
-
-//ESP32-C3 support hardware FSM reset
-#define I2C_SUPPORT_HW_FSM_RST  (1)
-//ESP32-C3 support hardware clear bus
-#define I2C_SUPPORT_HW_CLR_BUS  (1)
-
-#define SOC_I2C_SUPPORT_XTAL       (1)
-#define SOC_I2C_SUPPORT_RTC        (1)
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/i2s_caps.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/i2s_caps.h
deleted file mode 100644
index 69dfb683..00000000
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/i2s_caps.h
+++ /dev/null
@@ -1,22 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#pragma once
-
-#define SOC_I2S_APLL_MIN_FREQ                     (250000000)
-#define SOC_I2S_APLL_MAX_FREQ                     (500000000)
-#define SOC_I2S_APLL_MIN_RATE                 (10675) //in Hz, I2S Clock rate limited by hardware
-#define SOC_I2S_MAX_BUFFER_SIZE               (4 * 1024 * 1024) //the maximum RAM can be allocated
-
-#define SOC_I2S_NUM            (1)
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/ledc_caps.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/ledc_caps.h
deleted file mode 100644
index 7a003f64..00000000
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/ledc_caps.h
+++ /dev/null
@@ -1,26 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#pragma once
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define SOC_LEDC_SUPPORT_XTAL_CLOCK  (1)
-#define SOC_LEDC_CHANNEL_NUM         (6)
-#define SOC_LEDC_TIMER_BIT_WIDE_NUM  (14)
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/mpu_caps.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/mpu_caps.h
deleted file mode 100644
index b2675475..00000000
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/mpu_caps.h
+++ /dev/null
@@ -1,21 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#pragma once
-
-#define SOC_MPU_CONFIGURABLE_REGIONS_SUPPORTED    0
-#define SOC_MPU_MIN_REGION_SIZE                   0x20000000
-#define SOC_MPU_REGIONS_MAX_NUM                   8
-#define SOC_MPU_REGION_RO_SUPPORTED               0
-#define SOC_MPU_REGION_WO_SUPPORTED               0
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/rtc.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/rtc.h
index f6377477..3fda6cb8 100644
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/rtc.h
+++ b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/rtc.h
@@ -122,6 +122,15 @@ set sleep_init default param
 #define RTC_CNTL_PD_CUR_SLEEP_DEFAULT  1
 #define RTC_CNTL_DG_VDD_DRV_B_SLP_DEFAULT 254
 
+/*
+The follow value is used to get a reasonable rtc voltage dbias value according to digital dbias & some other value
+storing in efuse (based on ATE 5k ECO3 chips)
+*/
+#define K_RTC_MID_MUL10000 215
+#define K_DIG_MID_MUL10000 213
+#define V_RTC_MID_MUL10000  10800
+#define V_DIG_MID_MUL10000  10860
+
 /**
  * @brief Possible main XTAL frequency values.
  *
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/rtc_caps.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/rtc_caps.h
deleted file mode 100644
index aa71a3ec..00000000
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/rtc_caps.h
+++ /dev/null
@@ -1,22 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#pragma once
-
-#define RTC_CNTL_CPU_PD_DMA_BUS_WIDTH       (128)
-#define RTC_CNTL_CPU_PD_REG_FILE_NUM        (108)
-#define RTC_CNTL_CPU_PD_DMA_ADDR_ALIGN      (RTC_CNTL_CPU_PD_DMA_BUS_WIDTH >> 3)
-#define RTC_CNTL_CPU_PD_DMA_BLOCK_SIZE      (RTC_CNTL_CPU_PD_DMA_BUS_WIDTH >> 3)
-
-#define RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE  (RTC_CNTL_CPU_PD_REG_FILE_NUM * (RTC_CNTL_CPU_PD_DMA_BUS_WIDTH >> 3))
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/rtc_io_caps.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/rtc_io_caps.h
deleted file mode 100644
index 2aaa55d0..00000000
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/rtc_io_caps.h
+++ /dev/null
@@ -1,21 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#pragma once
-
-/* No dedicated RTCIO subsystem on ESP32-C3. RTC functions are still supported
- * for hold, wake & 32kHz crystal functions - via rtc_cntl_reg */
-#define SOC_RTCIO_PIN_COUNT    0
-
-#define RTCIO_LL_PIN_FUNC     0
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/sigmadelta_caps.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/sigmadelta_caps.h
deleted file mode 100644
index 7f2059a1..00000000
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/sigmadelta_caps.h
+++ /dev/null
@@ -1,25 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#pragma once
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define SOC_SIGMADELTA_NUM         (1) // 1 sigma-delta peripheral
-#define SOC_SIGMADELTA_CHANNEL_NUM (4) // 4 channels
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/soc.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/soc.h
index e17ef987..8c1963c3 100644
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/soc.h
+++ b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/soc.h
@@ -58,7 +58,7 @@
 #define DR_REG_BB_BASE                          0x6001D000
 #define DR_REG_TIMERGROUP0_BASE                 0x6001F000
 #define DR_REG_TIMERGROUP1_BASE                 0x60020000
-#define DR_REG_SYS_TIMER_BASE                   0x60023000
+#define DR_REG_SYSTIMER_BASE                    0x60023000
 #define DR_REG_SPI2_BASE                        0x60024000
 #define DR_REG_SYSCON_BASE                      0x60026000
 #define DR_REG_APB_CTRL_BASE                    0x60026000    /* Old name for SYSCON, to be removed */
@@ -67,14 +67,14 @@
 #define DR_REG_APB_SARADC_BASE                  0x60040000
 #define DR_REG_AES_XTS_BASE                     0x600CC000
 
-#define REG_UHCI_BASE(i)         (DR_REG_UHCI0_BASE - (i) * 0x8000)
-#define REG_UART_BASE( i )  (DR_REG_UART_BASE + (i) * 0x10000 + ( (i) > 1 ? 0xe000 : 0 ) )
-#define REG_UART_AHB_BASE(i)  (0x60000000 + (i) * 0x10000 + ( (i) > 1 ? 0xe000 : 0 ) )
-#define UART_FIFO_AHB_REG(i)  (REG_UART_AHB_BASE(i) + 0x0)
-#define REG_I2S_BASE( i ) (DR_REG_I2S_BASE + (i) * 0x1E000)
-#define REG_TIMG_BASE(i)              (DR_REG_TIMERGROUP0_BASE + (i)*0x1000)
-#define REG_SPI_MEM_BASE(i)     (DR_REG_SPI0_BASE - (i) * 0x1000)
-#define REG_I2C_BASE(i)    (DR_REG_I2C_EXT_BASE + (i) * 0x14000 )
+#define REG_UHCI_BASE(i)                        (DR_REG_UHCI0_BASE - (i) * 0x8000)
+#define REG_UART_BASE(i)                        (DR_REG_UART_BASE + (i) * 0x10000)
+#define REG_UART_AHB_BASE(i)                    (0x60000000 + (i) * 0x10000)
+#define UART_FIFO_AHB_REG(i)                    (REG_UART_AHB_BASE(i) + 0x0)
+#define REG_I2S_BASE(i)                         (DR_REG_I2S_BASE + (i) * 0x1E000)
+#define REG_TIMG_BASE(i)                        (DR_REG_TIMERGROUP0_BASE + (i)*0x1000)
+#define REG_SPI_MEM_BASE(i)                     (DR_REG_SPI0_BASE - (i) * 0x1000)
+#define REG_I2C_BASE(i)                         (DR_REG_I2C_EXT_BASE + (i) * 0x14000 )
 
 //Registers Operation {{
 #define ETS_UNCACHED_ADDR(addr) (addr)
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/soc_caps.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/soc_caps.h
index f36268f4..cfda89c2 100644
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/soc_caps.h
+++ b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/soc_caps.h
@@ -5,85 +5,18 @@
 
 #pragma once
 
-#define SOC_CPU_CORES_NUM           1
-#define SOC_GDMA_SUPPORTED          1
-#define SOC_TWAI_SUPPORTED          1
-#define SOC_BT_SUPPORTED            1
-#define SOC_DIG_SIGN_SUPPORTED      1
-#define SOC_HMAC_SUPPORTED          1
-#define SOC_ASYNC_MEMCPY_SUPPORTED  1
-
-#include "i2c_caps.h"
-#include "mpu_caps.h"
-#include "sigmadelta_caps.h"
-#include "systimer_caps.h"
-#include "uart_caps.h"
-#include "brownout_caps.h"
-#include "gdma_caps.h"
-#include "i2s_caps.h"
-#include "rtc_io_caps.h"
-#include "soc_caps.h"
-#include "cpu_caps.h"
-#include "gpio_caps.h"
-#include "ledc_caps.h"
-#include "spi_caps.h"
-#include "uart_caps.h"
-#include "rtc_caps.h"
+#define SOC_CPU_CORES_NUM               1
+#define SOC_GDMA_SUPPORTED              1
+#define SOC_TWAI_SUPPORTED              1
+#define SOC_BT_SUPPORTED                1
+#define SOC_DIG_SIGN_SUPPORTED          1
+#define SOC_HMAC_SUPPORTED              1
+#define SOC_ASYNC_MEMCPY_SUPPORTED      1
+#define SOC_USB_SERIAL_JTAG_SUPPORTED   1
 
 /*-------------------------- COMMON CAPS ---------------------------------------*/
-#define SOC_SUPPORTS_SECURE_DL_MODE     1
-#define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 3
-
-/*-------------------------- TOUCH SENSOR CAPS -------------------------------*/
-#define SOC_TOUCH_SENSOR_NUM            (0)    /*! No touch sensors on ESP32-C3 */
-
-/*-------------------------- TWAI CAPS ---------------------------------------*/
-#define SOC_TWAI_BRP_MIN                2
-#define SOC_TWAI_BRP_MAX                16384
-#define SOC_TWAI_SUPPORTS_RX_STATUS     1
-
-/*--------------------------- SHA CAPS ---------------------------------------*/
-
-/* Max amount of bytes in a single DMA operation is 4095,
-   for SHA this means that the biggest safe amount of bytes is
-   31 blocks of 128 bytes = 3968
-*/
-#define SOC_SHA_DMA_MAX_BUFFER_SIZE     (3968)
-#define SOC_SHA_SUPPORT_DMA             (1)
-
-/* The SHA engine is able to resume hashing from a user */
-#define SOC_SHA_SUPPORT_RESUME          (1)
-
-/* Has a centralized DMA, which is shared with all peripherals */
-#define SOC_SHA_GDMA             (1)
-
-/* Supported HW algorithms */
-#define SOC_SHA_SUPPORT_SHA1            (1)
-#define SOC_SHA_SUPPORT_SHA224          (1)
-#define SOC_SHA_SUPPORT_SHA256          (1)
-
-/*--------------------------- TIMER GROUP CAPS ---------------------------------------*/
-#define SOC_TIMER_GROUPS                  (2)
-#define SOC_TIMER_GROUP_TIMERS_PER_GROUP  (1)
-#define SOC_TIMER_GROUP_COUNTER_BIT_WIDTH (54)
-#define SOC_TIMER_GROUP_SUPPORT_XTAL      (1)
-#define SOC_TIMER_GROUP_TOTAL_TIMERS (SOC_TIMER_GROUPS * SOC_TIMER_GROUP_TIMERS_PER_GROUP)
-
-/*--------------------------- RMT CAPS ---------------------------------------*/
-#define SOC_RMT_GROUPS                  (1)  /*!< One RMT group */
-#define SOC_RMT_TX_CANDIDATES_PER_GROUP (2)  /*!< Number of channels that capable of Transmit */
-#define SOC_RMT_RX_CANDIDATES_PER_GROUP (2)  /*!< Number of channels that capable of Receive */
-#define SOC_RMT_CHANNELS_PER_GROUP      (4)  /*!< Total 4 channels */
-#define SOC_RMT_MEM_WORDS_PER_CHANNEL   (48) /*!< Each channel owns 48 words memory (1 word = 4 Bytes) */
-#define SOC_RMT_SUPPORT_RX_PINGPONG     (1)  /*!< Support Ping-Pong mode on RX path */
-#define SOC_RMT_SUPPORT_RX_DEMODULATION (1)  /*!< Support signal demodulation on RX path (i.e. remove carrier) */
-#define SOC_RMT_SUPPORT_TX_LOOP_COUNT   (1)  /*!< Support transmit specified number of cycles in loop mode */
-#define SOC_RMT_SUPPORT_TX_SYNCHRO      (1)  /*!< Support coordinate a group of TX channels to start simultaneously */
-#define SOC_RMT_SUPPORT_XTAL            (1)  /*!< Support set XTAL clock as the RMT clock source */
-
-/*--------------------------- RSA CAPS ---------------------------------------*/
-#define SOC_RSA_MAX_BIT_LEN    (3072)
-
+#define SOC_SUPPORTS_SECURE_DL_MODE         1
+#define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS   3
 
 
 /*-------------------------- AES CAPS -----------------------------------------*/
@@ -112,6 +45,207 @@
 /*-------------------------- APB BACKUP DMA CAPS -------------------------------*/
 #define SOC_APB_BACKUP_DMA              (1)
 
+/*-------------------------- BROWNOUT CAPS -----------------------------------*/
+#define SOC_BROWNOUT_RESET_SUPPORTED 1
+
+/*-------------------------- CPU CAPS ----------------------------------------*/
+#define SOC_CPU_BREAKPOINTS_NUM         8
+#define SOC_CPU_WATCHPOINTS_NUM         8
+#define SOC_CPU_HAS_FLEXIBLE_INTC       1
+
+#define SOC_CPU_WATCHPOINT_SIZE         0x80000000 // bytes
+
+/*-------------------------- DIGITAL SIGNATURE CAPS ----------------------------------------*/
+/** The maximum length of a Digital Signature in bits. */
+#define SOC_DS_SIGNATURE_MAX_BIT_LEN (3072)
+
+/** Initialization vector (IV) length for the RSA key parameter message digest (MD) in bytes. */
+#define SOC_DS_KEY_PARAM_MD_IV_LENGTH (16)
+
+/** Maximum wait time for DS parameter decryption key. If overdue, then key error.
+    See TRM DS chapter for more details */
+#define SOC_DS_KEY_CHECK_MAX_WAIT_US (1100)
+
+/*-------------------------- GDMA CAPS -------------------------------------*/
+#define SOC_GDMA_GROUPS                 (1) // Number of GDMA groups
+#define SOC_GDMA_PAIRS_PER_GROUP        (3) // Number of GDMA pairs in each group
+#define SOC_GDMA_TX_RX_SHARE_INTERRUPT  (1) // TX and RX channel in the same pair will share the same interrupt source number
+
+/*-------------------------- GPIO CAPS ---------------------------------------*/
+// ESP32-C3 has 1 GPIO peripheral
+#define SOC_GPIO_PORT               (1)
+#define SOC_GPIO_PIN_COUNT          (22)
+
+// Target has no full RTC IO subsystem, so GPIO is 100% "independent" of RTC
+// On ESP32-C3, Digital IOs have their own registers to control pullup/down capability, independent of RTC registers.
+#define GPIO_SUPPORTS_RTC_INDEPENDENT       (1)
+// Force hold is a new function of ESP32-C3
+#define SOC_GPIO_SUPPORT_FORCE_HOLD         (1)
+// GPIO0~5 on ESP32C3 can support chip deep sleep wakeup
+#define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP   (1)
+
+#define SOC_GPIO_VALID_GPIO_MASK        ((1U<<SOC_GPIO_PIN_COUNT) - 1)
+#define SOC_GPIO_VALID_OUTPUT_GPIO_MASK SOC_GPIO_VALID_GPIO_MASK
+#define SOC_GPIO_DEEP_SLEEP_WAKEUP_VALID_GPIO_MASK        (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5)
+
+// Support to configure sleep status
+#define SOC_GPIO_SUPPORT_SLP_SWITCH  (1)
+
+/*-------------------------- I2C CAPS ----------------------------------------*/
+// ESP32-C3 have 2 I2C.
+#define SOC_I2C_NUM                 (1)
+
+#define SOC_I2C_FIFO_LEN            (32) /*!< I2C hardware FIFO depth */
+
+#define SOC_I2C_SUPPORT_HW_FSM_RST  (1)
+#define SOC_I2C_SUPPORT_HW_CLR_BUS  (1)
+
+#define SOC_I2C_SUPPORT_XTAL        (1)
+#define SOC_I2C_SUPPORT_RTC         (1)
+
+/*-------------------------- I2S CAPS ----------------------------------------*/
+#define SOC_I2S_NUM                 (1)
+
+#define SOC_I2S_APLL_MIN_FREQ       (250000000)
+#define SOC_I2S_APLL_MAX_FREQ       (500000000)
+#define SOC_I2S_APLL_MIN_RATE       (10675) //in Hz, I2S Clock rate limited by hardware
+#define SOC_I2S_MAX_BUFFER_SIZE     (4 * 1024 * 1024) //the maximum RAM can be allocated
+
+/*-------------------------- LEDC CAPS ---------------------------------------*/
+#define SOC_LEDC_SUPPORT_XTAL_CLOCK  (1)
+#define SOC_LEDC_CHANNEL_NUM         (6)
+#define SOC_LEDC_TIMER_BIT_WIDE_NUM  (14)
+
+/*-------------------------- MPU CAPS ----------------------------------------*/
+#define SOC_MPU_CONFIGURABLE_REGIONS_SUPPORTED    0
+#define SOC_MPU_MIN_REGION_SIZE                   0x20000000U
+#define SOC_MPU_REGIONS_MAX_NUM                   8
+#define SOC_MPU_REGION_RO_SUPPORTED               0
+#define SOC_MPU_REGION_WO_SUPPORTED               0
+
+/*--------------------------- RMT CAPS ---------------------------------------*/
+#define SOC_RMT_GROUPS                  (1)  /*!< One RMT group */
+#define SOC_RMT_TX_CANDIDATES_PER_GROUP (2)  /*!< Number of channels that capable of Transmit */
+#define SOC_RMT_RX_CANDIDATES_PER_GROUP (2)  /*!< Number of channels that capable of Receive */
+#define SOC_RMT_CHANNELS_PER_GROUP      (4)  /*!< Total 4 channels */
+#define SOC_RMT_MEM_WORDS_PER_CHANNEL   (48) /*!< Each channel owns 48 words memory (1 word = 4 Bytes) */
+#define SOC_RMT_SUPPORT_RX_PINGPONG     (1)  /*!< Support Ping-Pong mode on RX path */
+#define SOC_RMT_SUPPORT_RX_DEMODULATION (1)  /*!< Support signal demodulation on RX path (i.e. remove carrier) */
+#define SOC_RMT_SUPPORT_TX_LOOP_COUNT   (1)  /*!< Support transmit specified number of cycles in loop mode */
+#define SOC_RMT_SUPPORT_TX_SYNCHRO      (1)  /*!< Support coordinate a group of TX channels to start simultaneously */
+#define SOC_RMT_SUPPORT_XTAL            (1)  /*!< Support set XTAL clock as the RMT clock source */
+
+/*-------------------------- RTC CAPS --------------------------------------*/
+#define SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH       (128)
+#define SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM        (108)
+#define SOC_RTC_CNTL_CPU_PD_DMA_ADDR_ALIGN      (SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH >> 3)
+#define SOC_RTC_CNTL_CPU_PD_DMA_BLOCK_SIZE      (SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH >> 3)
+
+#define SOC_RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE  (SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM * (SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH >> 3))
+
+/*-------------------------- RTCIO CAPS --------------------------------------*/
+/* No dedicated RTCIO subsystem on ESP32-C3. RTC functions are still supported
+ * for hold, wake & 32kHz crystal functions - via rtc_cntl_reg */
+#define SOC_RTCIO_PIN_COUNT    0
+
+/*--------------------------- RSA CAPS ---------------------------------------*/
+#define SOC_RSA_MAX_BIT_LEN    (3072)
+
+/*--------------------------- SHA CAPS ---------------------------------------*/
+
+/* Max amount of bytes in a single DMA operation is 4095,
+   for SHA this means that the biggest safe amount of bytes is
+   31 blocks of 128 bytes = 3968
+*/
+#define SOC_SHA_DMA_MAX_BUFFER_SIZE     (3968)
+#define SOC_SHA_SUPPORT_DMA             (1)
+
+/* The SHA engine is able to resume hashing from a user */
+#define SOC_SHA_SUPPORT_RESUME          (1)
+
+/* Has a centralized DMA, which is shared with all peripherals */
+#define SOC_SHA_GDMA             (1)
+
+/* Supported HW algorithms */
+#define SOC_SHA_SUPPORT_SHA1            (1)
+#define SOC_SHA_SUPPORT_SHA224          (1)
+#define SOC_SHA_SUPPORT_SHA256          (1)
+
+/*-------------------------- SIGMA DELTA CAPS --------------------------------*/
+#define SOC_SIGMADELTA_NUM         (1) // 1 sigma-delta peripheral
+#define SOC_SIGMADELTA_CHANNEL_NUM (4) // 4 channels
+
+/*-------------------------- SPI CAPS ----------------------------------------*/
+#define SOC_SPI_PERIPH_NUM          2
+#define SOC_SPI_PERIPH_CS_NUM(i)    6
+
+#define SOC_SPI_MAXIMUM_BUFFER_SIZE     64
+
+#define SOC_SPI_SUPPORT_DDRCLK              1
+#define SOC_SPI_SLAVE_SUPPORT_SEG_TRANS     1
+#define SOC_SPI_SUPPORT_CD_SIG              1
+#define SOC_SPI_SUPPORT_CONTINUOUS_TRANS    1
+#define SOC_SPI_SUPPORT_SLAVE_HD_VER2       1
+
+// Peripheral supports DIO, DOUT, QIO, or QOUT
+// host_id = 0 -> SPI0/SPI1, host_id = 1 -> SPI2,
+#define SOC_SPI_PERIPH_SUPPORT_MULTILINE_MODE(host_id)  ({(void)host_id; 1;})
+
+// Peripheral supports output given level during its "dummy phase"
+#define SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUTPUT 1
+
+#define SOC_MEMSPI_IS_INDEPENDENT 1
+#define SOC_SPI_MAX_PRE_DIVIDER 16
+
+/*-------------------------- SPI MEM CAPS ---------------------------------------*/
+#define SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE                (1)
+#define SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND                  (1)
+#define SOC_SPI_MEM_SUPPORT_AUTO_RESUME                   (1)
+#define SOC_SPI_MEM_SUPPORT_IDLE_INTR                     (1)
+#define SOC_SPI_MEM_SUPPORT_SW_SUSPEND                    (1)
+#define SOC_SPI_MEM_SUPPORT_CHECK_SUS                     (1)
+
+
+/*-------------------------- SYSTIMER CAPS ----------------------------------*/
+#define SOC_SYSTIMER_COUNTER_NUM           (2)  // Number of counter units
+#define SOC_SYSTIMER_ALARM_NUM             (3)  // Number of alarm units
+#define SOC_SYSTIMER_BIT_WIDTH_LO          (32) // Bit width of systimer low part
+#define SOC_SYSTIMER_BIT_WIDTH_HI          (20) // Bit width of systimer high part
+#define SOC_SYSTIMER_FIXED_TICKS_US        (16) // Number of ticks per microsecond is fixed
+#define SOC_SYSTIMER_INT_LEVEL             (1)  // Systimer peripheral uses level interrupt
+#define SOC_SYSTIMER_ALARM_MISS_COMPENSATE (1)  // Systimer peripheral can generate interrupt immediately if t(target) > t(current)
+
+/*--------------------------- TIMER GROUP CAPS ---------------------------------------*/
+#define SOC_TIMER_GROUPS                  (2)
+#define SOC_TIMER_GROUP_TIMERS_PER_GROUP  (1)
+#define SOC_TIMER_GROUP_COUNTER_BIT_WIDTH (54)
+#define SOC_TIMER_GROUP_SUPPORT_XTAL      (1)
+#define SOC_TIMER_GROUP_TOTAL_TIMERS (SOC_TIMER_GROUPS * SOC_TIMER_GROUP_TIMERS_PER_GROUP)
+
+/*-------------------------- TOUCH SENSOR CAPS -------------------------------*/
+#define SOC_TOUCH_SENSOR_NUM            (0)    /*! No touch sensors on ESP32-C3 */
+
+/*-------------------------- TWAI CAPS ---------------------------------------*/
+#define SOC_TWAI_BRP_MIN                2
+#define SOC_TWAI_BRP_MAX                16384
+#define SOC_TWAI_SUPPORTS_RX_STATUS     1
+
+/*-------------------------- Flash Encryption CAPS----------------------------*/
+#define SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX   (32)
+
+/*-------------------------- UART CAPS ---------------------------------------*/
+// ESP32-C3 has 2 UARTs
+#define SOC_UART_NUM                (2)
+
+#define SOC_UART_FIFO_LEN           (128)      /*!< The UART hardware FIFO length */
+#define SOC_UART_BITRATE_MAX        (5000000)  /*!< Max bit rate supported by UART */
+
+#define SOC_UART_SUPPORT_RTC_CLK    (1)
+#define SOC_UART_SUPPORT_XTAL_CLK   (1)
+
+// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
+#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND   (1)
+
 /*-------------------------- WI-FI HARDWARE TSF CAPS -------------------------------*/
 #define SOC_WIFI_HW_TSF                 (1)
 
@@ -125,13 +259,6 @@
 /*--------------- WIFI LIGHT SLEEP CLOCK WIDTH CAPS --------------------------*/
 #define SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH  (12)
 
-/*-------------------------- SPI MEM CAPS ---------------------------------------*/
-#define SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE                (1)
-#define SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND                  (1)
-#define SOC_SPI_MEM_SUPPORT_AUTO_RESUME                   (1)
-#define SOC_SPI_MEM_SUPPORT_IDLE_INTR                     (1)
-#define SOC_SPI_MEM_SUPPORT_SW_SUSPEND                    (1)
-#define SOC_SPI_MEM_SUPPORT_CHECK_SUS                     (1)
 /*-------------------------- Power Management CAPS ----------------------------*/
 #define SOC_PM_SUPPORT_WIFI_WAKEUP      (1)
 
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/spi_caps.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/spi_caps.h
deleted file mode 100644
index fefb464f..00000000
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/spi_caps.h
+++ /dev/null
@@ -1,38 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#pragma once
-
-#define SOC_SPI_PERIPH_NUM      2
-#define SOC_SPI_DMA_CHAN_NUM    3
-#define SOC_SPI_PERIPH_CS_NUM(i)    3
-
-#define SOC_SPI_MAXIMUM_BUFFER_SIZE     72
-
-//#define SOC_SPI_SUPPORT_AS_CS         //don't support to toggle the CS while the clock toggles
-#define SOC_SPI_SUPPORT_DDRCLK              1
-#define SOC_SPI_SLAVE_SUPPORT_SEG_TRANS     1
-#define SOC_SPI_SUPPORT_CD_SIG              1
-#define SOC_SPI_SUPPORT_CONTINUOUS_TRANS    1
-#define SOC_SPI_SUPPORT_SLAVE_HD_VER2       1
-
-// Peripheral supports DIO, DOUT, QIO, or QOUT
-#define SOC_SPI_PERIPH_SUPPORT_MULTILINE_MODE(host_id)          ((host_id) != 2)
-
-// Peripheral supports output given level during its "dummy phase"
-#define SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUTPUT              1
-
-#define SOC_MEMSPI_IS_INDEPENDENT 1
-
-#define SOC_SPI_MAX_PRE_DIVIDER 16
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/spi_struct.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/spi_struct.h
index 24844d58..cc22595d 100644
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/spi_struct.h
+++ b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/spi_struct.h
@@ -18,7 +18,6 @@
 #ifdef __cplusplus
 extern "C" {
 #endif
-#include "soc.h"
 
 typedef volatile struct {
     union {
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/systimer_reg.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/systimer_reg.h
index cb6ebe6a..4e9f64ff 100644
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/systimer_reg.h
+++ b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/systimer_reg.h
@@ -1,424 +1,567 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-#ifndef _SOC_SYS_TIMER_REG_H_
-#define _SOC_SYS_TIMER_REG_H_
-
+/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
 
+#include <stdint.h>
+#include "soc/soc.h"
 #ifdef __cplusplus
 extern "C" {
 #endif
-#include "soc.h"
-#define SYS_TIMER_SYSTIMER_CONF_REG          (DR_REG_SYS_TIMER_BASE + 0x0000)
-/* SYS_TIMER_CLK_EN : R/W ;bitpos:[31] ;default: 1'b0 ; */
-/*description: register file clk gating*/
-#define SYS_TIMER_CLK_EN  (BIT(31))
-#define SYS_TIMER_CLK_EN_M  (BIT(31))
-#define SYS_TIMER_CLK_EN_V  0x1
-#define SYS_TIMER_CLK_EN_S  31
-/* SYS_TIMER_TIMER_UNIT0_WORK_EN : R/W ;bitpos:[30] ;default: 1'b1 ; */
-/*description: timer unit0 work enable*/
-#define SYS_TIMER_TIMER_UNIT0_WORK_EN  (BIT(30))
-#define SYS_TIMER_TIMER_UNIT0_WORK_EN_M  (BIT(30))
-#define SYS_TIMER_TIMER_UNIT0_WORK_EN_V  0x1
-#define SYS_TIMER_TIMER_UNIT0_WORK_EN_S  30
-/* SYS_TIMER_TIMER_UNIT1_WORK_EN : R/W ;bitpos:[29] ;default: 1'b0 ; */
-/*description: timer unit1 work enable*/
-#define SYS_TIMER_TIMER_UNIT1_WORK_EN  (BIT(29))
-#define SYS_TIMER_TIMER_UNIT1_WORK_EN_M  (BIT(29))
-#define SYS_TIMER_TIMER_UNIT1_WORK_EN_V  0x1
-#define SYS_TIMER_TIMER_UNIT1_WORK_EN_S  29
-/* SYS_TIMER_TIMER_UNIT0_CORE0_STALL_EN : R/W ;bitpos:[28] ;default: 1'b0 ; */
-/*description: If timer unit0 is stalled when core0 stalled*/
-#define SYS_TIMER_TIMER_UNIT0_CORE0_STALL_EN  (BIT(28))
-#define SYS_TIMER_TIMER_UNIT0_CORE0_STALL_EN_M  (BIT(28))
-#define SYS_TIMER_TIMER_UNIT0_CORE0_STALL_EN_V  0x1
-#define SYS_TIMER_TIMER_UNIT0_CORE0_STALL_EN_S  28
-/* SYS_TIMER_TIMER_UNIT0_CORE1_STALL_EN : R/W ;bitpos:[27] ;default: 1'b0 ; */
-/*description: If timer unit0 is stalled when core1 stalled*/
-#define SYS_TIMER_TIMER_UNIT0_CORE1_STALL_EN  (BIT(27))
-#define SYS_TIMER_TIMER_UNIT0_CORE1_STALL_EN_M  (BIT(27))
-#define SYS_TIMER_TIMER_UNIT0_CORE1_STALL_EN_V  0x1
-#define SYS_TIMER_TIMER_UNIT0_CORE1_STALL_EN_S  27
-/* SYS_TIMER_TIMER_UNIT1_CORE0_STALL_EN : R/W ;bitpos:[26] ;default: 1'b1 ; */
-/*description: If timer unit1 is stalled when core0 stalled*/
-#define SYS_TIMER_TIMER_UNIT1_CORE0_STALL_EN  (BIT(26))
-#define SYS_TIMER_TIMER_UNIT1_CORE0_STALL_EN_M  (BIT(26))
-#define SYS_TIMER_TIMER_UNIT1_CORE0_STALL_EN_V  0x1
-#define SYS_TIMER_TIMER_UNIT1_CORE0_STALL_EN_S  26
-/* SYS_TIMER_TIMER_UNIT1_CORE1_STALL_EN : R/W ;bitpos:[25] ;default: 1'b1 ; */
-/*description: If timer unit1 is stalled when core1 stalled*/
-#define SYS_TIMER_TIMER_UNIT1_CORE1_STALL_EN  (BIT(25))
-#define SYS_TIMER_TIMER_UNIT1_CORE1_STALL_EN_M  (BIT(25))
-#define SYS_TIMER_TIMER_UNIT1_CORE1_STALL_EN_V  0x1
-#define SYS_TIMER_TIMER_UNIT1_CORE1_STALL_EN_S  25
-/* SYS_TIMER_TARGET0_WORK_EN : R/W ;bitpos:[24] ;default: 1'b0 ; */
-/*description: target0 work enable*/
-#define SYS_TIMER_TARGET0_WORK_EN  (BIT(24))
-#define SYS_TIMER_TARGET0_WORK_EN_M  (BIT(24))
-#define SYS_TIMER_TARGET0_WORK_EN_V  0x1
-#define SYS_TIMER_TARGET0_WORK_EN_S  24
-/* SYS_TIMER_TARGET1_WORK_EN : R/W ;bitpos:[23] ;default: 1'b0 ; */
-/*description: target1 work enable*/
-#define SYS_TIMER_TARGET1_WORK_EN  (BIT(23))
-#define SYS_TIMER_TARGET1_WORK_EN_M  (BIT(23))
-#define SYS_TIMER_TARGET1_WORK_EN_V  0x1
-#define SYS_TIMER_TARGET1_WORK_EN_S  23
-/* SYS_TIMER_TARGET2_WORK_EN : R/W ;bitpos:[22] ;default: 1'b0 ; */
-/*description: target2 work enable*/
-#define SYS_TIMER_TARGET2_WORK_EN  (BIT(22))
-#define SYS_TIMER_TARGET2_WORK_EN_M  (BIT(22))
-#define SYS_TIMER_TARGET2_WORK_EN_V  0x1
-#define SYS_TIMER_TARGET2_WORK_EN_S  22
-/* SYS_TIMER_SYSTIMER_CLK_FO : R/W ;bitpos:[0] ;default: 1'b0 ; */
-/*description: systimer clock force on*/
-#define SYS_TIMER_SYSTIMER_CLK_FO  (BIT(0))
-#define SYS_TIMER_SYSTIMER_CLK_FO_M  (BIT(0))
-#define SYS_TIMER_SYSTIMER_CLK_FO_V  0x1
-#define SYS_TIMER_SYSTIMER_CLK_FO_S  0
 
-#define SYS_TIMER_SYSTIMER_UNIT0_OP_REG          (DR_REG_SYS_TIMER_BASE + 0x0004)
-/* SYS_TIMER_TIMER_UNIT0_UPDATE : WT ;bitpos:[30] ;default: 1'b0 ; */
-/*description: update timer_unit0*/
-#define SYS_TIMER_TIMER_UNIT0_UPDATE  (BIT(30))
-#define SYS_TIMER_TIMER_UNIT0_UPDATE_M  (BIT(30))
-#define SYS_TIMER_TIMER_UNIT0_UPDATE_V  0x1
-#define SYS_TIMER_TIMER_UNIT0_UPDATE_S  30
-/* SYS_TIMER_TIMER_UNIT0_VALUE_VALID : R/SS/WTC ;bitpos:[29] ;default: 1'b0 ; */
-/*description: */
-#define SYS_TIMER_TIMER_UNIT0_VALUE_VALID  (BIT(29))
-#define SYS_TIMER_TIMER_UNIT0_VALUE_VALID_M  (BIT(29))
-#define SYS_TIMER_TIMER_UNIT0_VALUE_VALID_V  0x1
-#define SYS_TIMER_TIMER_UNIT0_VALUE_VALID_S  29
+/** SYSTIMER_CONF_REG register
+ *  SYSTIMER_CONF.
+ */
+#define SYSTIMER_CONF_REG (DR_REG_SYSTIMER_BASE + 0x0)
+/** SYSTIMER_SYSTIMER_CLK_FO : R/W; bitpos: [0]; default: 0;
+ *  systimer clock force on
+ */
+#define SYSTIMER_SYSTIMER_CLK_FO    (BIT(0))
+#define SYSTIMER_SYSTIMER_CLK_FO_M  (SYSTIMER_SYSTIMER_CLK_FO_V << SYSTIMER_SYSTIMER_CLK_FO_S)
+#define SYSTIMER_SYSTIMER_CLK_FO_V  0x00000001
+#define SYSTIMER_SYSTIMER_CLK_FO_S  0
+/** SYSTIMER_TARGET2_WORK_EN : R/W; bitpos: [22]; default: 0;
+ *  target2 work enable
+ */
+#define SYSTIMER_TARGET2_WORK_EN    (BIT(22))
+#define SYSTIMER_TARGET2_WORK_EN_M  (SYSTIMER_TARGET2_WORK_EN_V << SYSTIMER_TARGET2_WORK_EN_S)
+#define SYSTIMER_TARGET2_WORK_EN_V  0x00000001
+#define SYSTIMER_TARGET2_WORK_EN_S  22
+/** SYSTIMER_TARGET1_WORK_EN : R/W; bitpos: [23]; default: 0;
+ *  target1 work enable
+ */
+#define SYSTIMER_TARGET1_WORK_EN    (BIT(23))
+#define SYSTIMER_TARGET1_WORK_EN_M  (SYSTIMER_TARGET1_WORK_EN_V << SYSTIMER_TARGET1_WORK_EN_S)
+#define SYSTIMER_TARGET1_WORK_EN_V  0x00000001
+#define SYSTIMER_TARGET1_WORK_EN_S  23
+/** SYSTIMER_TARGET0_WORK_EN : R/W; bitpos: [24]; default: 0;
+ *  target0 work enable
+ */
+#define SYSTIMER_TARGET0_WORK_EN    (BIT(24))
+#define SYSTIMER_TARGET0_WORK_EN_M  (SYSTIMER_TARGET0_WORK_EN_V << SYSTIMER_TARGET0_WORK_EN_S)
+#define SYSTIMER_TARGET0_WORK_EN_V  0x00000001
+#define SYSTIMER_TARGET0_WORK_EN_S  24
+/** SYSTIMER_TIMER_UNIT1_CORE1_STALL_EN : R/W; bitpos: [25]; default: 1;
+ *  If timer unit1 is stalled when core1 stalled
+ */
+#define SYSTIMER_TIMER_UNIT1_CORE1_STALL_EN    (BIT(25))
+#define SYSTIMER_TIMER_UNIT1_CORE1_STALL_EN_M  (SYSTIMER_TIMER_UNIT1_CORE1_STALL_EN_V << SYSTIMER_TIMER_UNIT1_CORE1_STALL_EN_S)
+#define SYSTIMER_TIMER_UNIT1_CORE1_STALL_EN_V  0x00000001
+#define SYSTIMER_TIMER_UNIT1_CORE1_STALL_EN_S  25
+/** SYSTIMER_TIMER_UNIT1_CORE0_STALL_EN : R/W; bitpos: [26]; default: 1;
+ *  If timer unit1 is stalled when core0 stalled
+ */
+#define SYSTIMER_TIMER_UNIT1_CORE0_STALL_EN    (BIT(26))
+#define SYSTIMER_TIMER_UNIT1_CORE0_STALL_EN_M  (SYSTIMER_TIMER_UNIT1_CORE0_STALL_EN_V << SYSTIMER_TIMER_UNIT1_CORE0_STALL_EN_S)
+#define SYSTIMER_TIMER_UNIT1_CORE0_STALL_EN_V  0x00000001
+#define SYSTIMER_TIMER_UNIT1_CORE0_STALL_EN_S  26
+/** SYSTIMER_TIMER_UNIT0_CORE1_STALL_EN : R/W; bitpos: [27]; default: 0;
+ *  If timer unit0 is stalled when core1 stalled
+ */
+#define SYSTIMER_TIMER_UNIT0_CORE1_STALL_EN    (BIT(27))
+#define SYSTIMER_TIMER_UNIT0_CORE1_STALL_EN_M  (SYSTIMER_TIMER_UNIT0_CORE1_STALL_EN_V << SYSTIMER_TIMER_UNIT0_CORE1_STALL_EN_S)
+#define SYSTIMER_TIMER_UNIT0_CORE1_STALL_EN_V  0x00000001
+#define SYSTIMER_TIMER_UNIT0_CORE1_STALL_EN_S  27
+/** SYSTIMER_TIMER_UNIT0_CORE0_STALL_EN : R/W; bitpos: [28]; default: 0;
+ *  If timer unit0 is stalled when core0 stalled
+ */
+#define SYSTIMER_TIMER_UNIT0_CORE0_STALL_EN    (BIT(28))
+#define SYSTIMER_TIMER_UNIT0_CORE0_STALL_EN_M  (SYSTIMER_TIMER_UNIT0_CORE0_STALL_EN_V << SYSTIMER_TIMER_UNIT0_CORE0_STALL_EN_S)
+#define SYSTIMER_TIMER_UNIT0_CORE0_STALL_EN_V  0x00000001
+#define SYSTIMER_TIMER_UNIT0_CORE0_STALL_EN_S  28
+/** SYSTIMER_TIMER_UNIT1_WORK_EN : R/W; bitpos: [29]; default: 0;
+ *  timer unit1 work enable
+ */
+#define SYSTIMER_TIMER_UNIT1_WORK_EN    (BIT(29))
+#define SYSTIMER_TIMER_UNIT1_WORK_EN_M  (SYSTIMER_TIMER_UNIT1_WORK_EN_V << SYSTIMER_TIMER_UNIT1_WORK_EN_S)
+#define SYSTIMER_TIMER_UNIT1_WORK_EN_V  0x00000001
+#define SYSTIMER_TIMER_UNIT1_WORK_EN_S  29
+/** SYSTIMER_TIMER_UNIT0_WORK_EN : R/W; bitpos: [30]; default: 1;
+ *  timer unit0 work enable
+ */
+#define SYSTIMER_TIMER_UNIT0_WORK_EN    (BIT(30))
+#define SYSTIMER_TIMER_UNIT0_WORK_EN_M  (SYSTIMER_TIMER_UNIT0_WORK_EN_V << SYSTIMER_TIMER_UNIT0_WORK_EN_S)
+#define SYSTIMER_TIMER_UNIT0_WORK_EN_V  0x00000001
+#define SYSTIMER_TIMER_UNIT0_WORK_EN_S  30
+/** SYSTIMER_CLK_EN : R/W; bitpos: [31]; default: 0;
+ *  register file clk gating
+ */
+#define SYSTIMER_CLK_EN    (BIT(31))
+#define SYSTIMER_CLK_EN_M  (SYSTIMER_CLK_EN_V << SYSTIMER_CLK_EN_S)
+#define SYSTIMER_CLK_EN_V  0x00000001
+#define SYSTIMER_CLK_EN_S  31
 
-#define SYS_TIMER_SYSTIMER_UNIT1_OP_REG          (DR_REG_SYS_TIMER_BASE + 0x0008)
-/* SYS_TIMER_TIMER_UNIT1_UPDATE : WT ;bitpos:[30] ;default: 1'b0 ; */
-/*description: update timer unit1*/
-#define SYS_TIMER_TIMER_UNIT1_UPDATE  (BIT(30))
-#define SYS_TIMER_TIMER_UNIT1_UPDATE_M  (BIT(30))
-#define SYS_TIMER_TIMER_UNIT1_UPDATE_V  0x1
-#define SYS_TIMER_TIMER_UNIT1_UPDATE_S  30
-/* SYS_TIMER_TIMER_UNIT1_VALUE_VALID : R/SS/WTC ;bitpos:[29] ;default: 1'b0 ; */
-/*description: timer value is sync and valid*/
-#define SYS_TIMER_TIMER_UNIT1_VALUE_VALID  (BIT(29))
-#define SYS_TIMER_TIMER_UNIT1_VALUE_VALID_M  (BIT(29))
-#define SYS_TIMER_TIMER_UNIT1_VALUE_VALID_V  0x1
-#define SYS_TIMER_TIMER_UNIT1_VALUE_VALID_S  29
+/** SYSTIMER_UNIT0_OP_REG register
+ *  SYSTIMER_UNIT0_OP.
+ */
+#define SYSTIMER_UNIT0_OP_REG (DR_REG_SYSTIMER_BASE + 0x4)
+/** SYSTIMER_TIMER_UNIT0_VALUE_VALID : R/SS/WTC; bitpos: [29]; default: 0;
+ *  reg_timer_unit0_value_valid
+ */
+#define SYSTIMER_TIMER_UNIT0_VALUE_VALID    (BIT(29))
+#define SYSTIMER_TIMER_UNIT0_VALUE_VALID_M  (SYSTIMER_TIMER_UNIT0_VALUE_VALID_V << SYSTIMER_TIMER_UNIT0_VALUE_VALID_S)
+#define SYSTIMER_TIMER_UNIT0_VALUE_VALID_V  0x00000001
+#define SYSTIMER_TIMER_UNIT0_VALUE_VALID_S  29
+/** SYSTIMER_TIMER_UNIT0_UPDATE : WT; bitpos: [30]; default: 0;
+ *  update timer_unit0
+ */
+#define SYSTIMER_TIMER_UNIT0_UPDATE    (BIT(30))
+#define SYSTIMER_TIMER_UNIT0_UPDATE_M  (SYSTIMER_TIMER_UNIT0_UPDATE_V << SYSTIMER_TIMER_UNIT0_UPDATE_S)
+#define SYSTIMER_TIMER_UNIT0_UPDATE_V  0x00000001
+#define SYSTIMER_TIMER_UNIT0_UPDATE_S  30
 
-#define SYS_TIMER_SYSTIMER_UNIT0_LOAD_HI_REG          (DR_REG_SYS_TIMER_BASE + 0x000C)
-/* SYS_TIMER_TIMER_UNIT0_LOAD_HI : R/W ;bitpos:[19:0] ;default: 20'd0 ; */
-/*description: timer unit0 load high 32 bit*/
-#define SYS_TIMER_TIMER_UNIT0_LOAD_HI  0x000FFFFF
-#define SYS_TIMER_TIMER_UNIT0_LOAD_HI_M  ((SYS_TIMER_TIMER_UNIT0_LOAD_HI_V)<<(SYS_TIMER_TIMER_UNIT0_LOAD_HI_S))
-#define SYS_TIMER_TIMER_UNIT0_LOAD_HI_V  0xFFFFF
-#define SYS_TIMER_TIMER_UNIT0_LOAD_HI_S  0
+/** SYSTIMER_UNIT1_OP_REG register
+ *  SYSTIMER_UNIT1_OP.
+ */
+#define SYSTIMER_UNIT1_OP_REG (DR_REG_SYSTIMER_BASE + 0x8)
+/** SYSTIMER_TIMER_UNIT1_VALUE_VALID : R/SS/WTC; bitpos: [29]; default: 0;
+ *  timer value is sync and valid
+ */
+#define SYSTIMER_TIMER_UNIT1_VALUE_VALID    (BIT(29))
+#define SYSTIMER_TIMER_UNIT1_VALUE_VALID_M  (SYSTIMER_TIMER_UNIT1_VALUE_VALID_V << SYSTIMER_TIMER_UNIT1_VALUE_VALID_S)
+#define SYSTIMER_TIMER_UNIT1_VALUE_VALID_V  0x00000001
+#define SYSTIMER_TIMER_UNIT1_VALUE_VALID_S  29
+/** SYSTIMER_TIMER_UNIT1_UPDATE : WT; bitpos: [30]; default: 0;
+ *  update timer unit1
+ */
+#define SYSTIMER_TIMER_UNIT1_UPDATE    (BIT(30))
+#define SYSTIMER_TIMER_UNIT1_UPDATE_M  (SYSTIMER_TIMER_UNIT1_UPDATE_V << SYSTIMER_TIMER_UNIT1_UPDATE_S)
+#define SYSTIMER_TIMER_UNIT1_UPDATE_V  0x00000001
+#define SYSTIMER_TIMER_UNIT1_UPDATE_S  30
 
-#define SYS_TIMER_SYSTIMER_UNIT0_LOAD_LO_REG          (DR_REG_SYS_TIMER_BASE + 0x0010)
-/* SYS_TIMER_TIMER_UNIT0_LOAD_LO : R/W ;bitpos:[31:0] ;default: 32'd0 ; */
-/*description: timer unit0 load low 32 bit*/
-#define SYS_TIMER_TIMER_UNIT0_LOAD_LO  0xFFFFFFFF
-#define SYS_TIMER_TIMER_UNIT0_LOAD_LO_M  ((SYS_TIMER_TIMER_UNIT0_LOAD_LO_V)<<(SYS_TIMER_TIMER_UNIT0_LOAD_LO_S))
-#define SYS_TIMER_TIMER_UNIT0_LOAD_LO_V  0xFFFFFFFF
-#define SYS_TIMER_TIMER_UNIT0_LOAD_LO_S  0
+/** SYSTIMER_UNIT0_LOAD_HI_REG register
+ *  SYSTIMER_UNIT0_LOAD_HI.
+ */
+#define SYSTIMER_UNIT0_LOAD_HI_REG (DR_REG_SYSTIMER_BASE + 0xc)
+/** SYSTIMER_TIMER_UNIT0_LOAD_HI : R/W; bitpos: [19:0]; default: 0;
+ *  timer unit0 load high 32 bit
+ */
+#define SYSTIMER_TIMER_UNIT0_LOAD_HI    0x000FFFFF
+#define SYSTIMER_TIMER_UNIT0_LOAD_HI_M  (SYSTIMER_TIMER_UNIT0_LOAD_HI_V << SYSTIMER_TIMER_UNIT0_LOAD_HI_S)
+#define SYSTIMER_TIMER_UNIT0_LOAD_HI_V  0x000FFFFF
+#define SYSTIMER_TIMER_UNIT0_LOAD_HI_S  0
 
-#define SYS_TIMER_SYSTIMER_UNIT1_LOAD_HI_REG          (DR_REG_SYS_TIMER_BASE + 0x0014)
-/* SYS_TIMER_TIMER_UNIT1_LOAD_HI : R/W ;bitpos:[19:0] ;default: 20'd0 ; */
-/*description: timer unit1 load high 32 bit*/
-#define SYS_TIMER_TIMER_UNIT1_LOAD_HI  0x000FFFFF
-#define SYS_TIMER_TIMER_UNIT1_LOAD_HI_M  ((SYS_TIMER_TIMER_UNIT1_LOAD_HI_V)<<(SYS_TIMER_TIMER_UNIT1_LOAD_HI_S))
-#define SYS_TIMER_TIMER_UNIT1_LOAD_HI_V  0xFFFFF
-#define SYS_TIMER_TIMER_UNIT1_LOAD_HI_S  0
+/** SYSTIMER_UNIT0_LOAD_LO_REG register
+ *  SYSTIMER_UNIT0_LOAD_LO.
+ */
+#define SYSTIMER_UNIT0_LOAD_LO_REG (DR_REG_SYSTIMER_BASE + 0x10)
+/** SYSTIMER_TIMER_UNIT0_LOAD_LO : R/W; bitpos: [31:0]; default: 0;
+ *  timer unit0 load low 32 bit
+ */
+#define SYSTIMER_TIMER_UNIT0_LOAD_LO    0xFFFFFFFF
+#define SYSTIMER_TIMER_UNIT0_LOAD_LO_M  (SYSTIMER_TIMER_UNIT0_LOAD_LO_V << SYSTIMER_TIMER_UNIT0_LOAD_LO_S)
+#define SYSTIMER_TIMER_UNIT0_LOAD_LO_V  0xFFFFFFFF
+#define SYSTIMER_TIMER_UNIT0_LOAD_LO_S  0
 
-#define SYS_TIMER_SYSTIMER_UNIT1_LOAD_LO_REG          (DR_REG_SYS_TIMER_BASE + 0x0018)
-/* SYS_TIMER_TIMER_UNIT1_LOAD_LO : R/W ;bitpos:[31:0] ;default: 32'd0 ; */
-/*description: timer unit1 load low 32 bit*/
-#define SYS_TIMER_TIMER_UNIT1_LOAD_LO  0xFFFFFFFF
-#define SYS_TIMER_TIMER_UNIT1_LOAD_LO_M  ((SYS_TIMER_TIMER_UNIT1_LOAD_LO_V)<<(SYS_TIMER_TIMER_UNIT1_LOAD_LO_S))
-#define SYS_TIMER_TIMER_UNIT1_LOAD_LO_V  0xFFFFFFFF
-#define SYS_TIMER_TIMER_UNIT1_LOAD_LO_S  0
+/** SYSTIMER_UNIT1_LOAD_HI_REG register
+ *  SYSTIMER_UNIT1_LOAD_HI.
+ */
+#define SYSTIMER_UNIT1_LOAD_HI_REG (DR_REG_SYSTIMER_BASE + 0x14)
+/** SYSTIMER_TIMER_UNIT1_LOAD_HI : R/W; bitpos: [19:0]; default: 0;
+ *  timer unit1 load high 32 bit
+ */
+#define SYSTIMER_TIMER_UNIT1_LOAD_HI    0x000FFFFF
+#define SYSTIMER_TIMER_UNIT1_LOAD_HI_M  (SYSTIMER_TIMER_UNIT1_LOAD_HI_V << SYSTIMER_TIMER_UNIT1_LOAD_HI_S)
+#define SYSTIMER_TIMER_UNIT1_LOAD_HI_V  0x000FFFFF
+#define SYSTIMER_TIMER_UNIT1_LOAD_HI_S  0
 
-#define SYS_TIMER_SYSTIMER_TARGET0_HI_REG          (DR_REG_SYS_TIMER_BASE + 0x001C)
-/* SYS_TIMER_TIMER_TARGET0_HI : R/W ;bitpos:[19:0] ;default: 20'd0 ; */
-/*description: timer taget0 high 32 bit*/
-#define SYS_TIMER_TIMER_TARGET0_HI  0x000FFFFF
-#define SYS_TIMER_TIMER_TARGET0_HI_M  ((SYS_TIMER_TIMER_TARGET0_HI_V)<<(SYS_TIMER_TIMER_TARGET0_HI_S))
-#define SYS_TIMER_TIMER_TARGET0_HI_V  0xFFFFF
-#define SYS_TIMER_TIMER_TARGET0_HI_S  0
+/** SYSTIMER_UNIT1_LOAD_LO_REG register
+ *  SYSTIMER_UNIT1_LOAD_LO.
+ */
+#define SYSTIMER_UNIT1_LOAD_LO_REG (DR_REG_SYSTIMER_BASE + 0x18)
+/** SYSTIMER_TIMER_UNIT1_LOAD_LO : R/W; bitpos: [31:0]; default: 0;
+ *  timer unit1 load low 32 bit
+ */
+#define SYSTIMER_TIMER_UNIT1_LOAD_LO    0xFFFFFFFF
+#define SYSTIMER_TIMER_UNIT1_LOAD_LO_M  (SYSTIMER_TIMER_UNIT1_LOAD_LO_V << SYSTIMER_TIMER_UNIT1_LOAD_LO_S)
+#define SYSTIMER_TIMER_UNIT1_LOAD_LO_V  0xFFFFFFFF
+#define SYSTIMER_TIMER_UNIT1_LOAD_LO_S  0
 
-#define SYS_TIMER_SYSTIMER_TARGET0_LO_REG          (DR_REG_SYS_TIMER_BASE + 0x0020)
-/* SYS_TIMER_TIMER_TARGET0_LO : R/W ;bitpos:[31:0] ;default: 32'd0 ; */
-/*description: timer taget0 low 32 bit*/
-#define SYS_TIMER_TIMER_TARGET0_LO  0xFFFFFFFF
-#define SYS_TIMER_TIMER_TARGET0_LO_M  ((SYS_TIMER_TIMER_TARGET0_LO_V)<<(SYS_TIMER_TIMER_TARGET0_LO_S))
-#define SYS_TIMER_TIMER_TARGET0_LO_V  0xFFFFFFFF
-#define SYS_TIMER_TIMER_TARGET0_LO_S  0
+/** SYSTIMER_TARGET0_HI_REG register
+ *  SYSTIMER_TARGET0_HI.
+ */
+#define SYSTIMER_TARGET0_HI_REG (DR_REG_SYSTIMER_BASE + 0x1c)
+/** SYSTIMER_TIMER_TARGET0_HI : R/W; bitpos: [19:0]; default: 0;
+ *  timer taget0 high 32 bit
+ */
+#define SYSTIMER_TIMER_TARGET0_HI    0x000FFFFF
+#define SYSTIMER_TIMER_TARGET0_HI_M  (SYSTIMER_TIMER_TARGET0_HI_V << SYSTIMER_TIMER_TARGET0_HI_S)
+#define SYSTIMER_TIMER_TARGET0_HI_V  0x000FFFFF
+#define SYSTIMER_TIMER_TARGET0_HI_S  0
 
-#define SYS_TIMER_SYSTIMER_TARGET1_HI_REG          (DR_REG_SYS_TIMER_BASE + 0x0024)
-/* SYS_TIMER_TIMER_TARGET1_HI : R/W ;bitpos:[19:0] ;default: 20'd0 ; */
-/*description: timer taget1 high 32 bit*/
-#define SYS_TIMER_TIMER_TARGET1_HI  0x000FFFFF
-#define SYS_TIMER_TIMER_TARGET1_HI_M  ((SYS_TIMER_TIMER_TARGET1_HI_V)<<(SYS_TIMER_TIMER_TARGET1_HI_S))
-#define SYS_TIMER_TIMER_TARGET1_HI_V  0xFFFFF
-#define SYS_TIMER_TIMER_TARGET1_HI_S  0
+/** SYSTIMER_TARGET0_LO_REG register
+ *  SYSTIMER_TARGET0_LO.
+ */
+#define SYSTIMER_TARGET0_LO_REG (DR_REG_SYSTIMER_BASE + 0x20)
+/** SYSTIMER_TIMER_TARGET0_LO : R/W; bitpos: [31:0]; default: 0;
+ *  timer taget0 low 32 bit
+ */
+#define SYSTIMER_TIMER_TARGET0_LO    0xFFFFFFFF
+#define SYSTIMER_TIMER_TARGET0_LO_M  (SYSTIMER_TIMER_TARGET0_LO_V << SYSTIMER_TIMER_TARGET0_LO_S)
+#define SYSTIMER_TIMER_TARGET0_LO_V  0xFFFFFFFF
+#define SYSTIMER_TIMER_TARGET0_LO_S  0
 
-#define SYS_TIMER_SYSTIMER_TARGET1_LO_REG          (DR_REG_SYS_TIMER_BASE + 0x0028)
-/* SYS_TIMER_TIMER_TARGET1_LO : R/W ;bitpos:[31:0] ;default: 32'd0 ; */
-/*description: timer taget1 low 32 bit*/
-#define SYS_TIMER_TIMER_TARGET1_LO  0xFFFFFFFF
-#define SYS_TIMER_TIMER_TARGET1_LO_M  ((SYS_TIMER_TIMER_TARGET1_LO_V)<<(SYS_TIMER_TIMER_TARGET1_LO_S))
-#define SYS_TIMER_TIMER_TARGET1_LO_V  0xFFFFFFFF
-#define SYS_TIMER_TIMER_TARGET1_LO_S  0
+/** SYSTIMER_TARGET1_HI_REG register
+ *  SYSTIMER_TARGET1_HI.
+ */
+#define SYSTIMER_TARGET1_HI_REG (DR_REG_SYSTIMER_BASE + 0x24)
+/** SYSTIMER_TIMER_TARGET1_HI : R/W; bitpos: [19:0]; default: 0;
+ *  timer taget1 high 32 bit
+ */
+#define SYSTIMER_TIMER_TARGET1_HI    0x000FFFFF
+#define SYSTIMER_TIMER_TARGET1_HI_M  (SYSTIMER_TIMER_TARGET1_HI_V << SYSTIMER_TIMER_TARGET1_HI_S)
+#define SYSTIMER_TIMER_TARGET1_HI_V  0x000FFFFF
+#define SYSTIMER_TIMER_TARGET1_HI_S  0
 
-#define SYS_TIMER_SYSTIMER_TARGET2_HI_REG          (DR_REG_SYS_TIMER_BASE + 0x002C)
-/* SYS_TIMER_TIMER_TARGET2_HI : R/W ;bitpos:[19:0] ;default: 20'd0 ; */
-/*description: timer taget2 high 32 bit*/
-#define SYS_TIMER_TIMER_TARGET2_HI  0x000FFFFF
-#define SYS_TIMER_TIMER_TARGET2_HI_M  ((SYS_TIMER_TIMER_TARGET2_HI_V)<<(SYS_TIMER_TIMER_TARGET2_HI_S))
-#define SYS_TIMER_TIMER_TARGET2_HI_V  0xFFFFF
-#define SYS_TIMER_TIMER_TARGET2_HI_S  0
+/** SYSTIMER_TARGET1_LO_REG register
+ *  SYSTIMER_TARGET1_LO.
+ */
+#define SYSTIMER_TARGET1_LO_REG (DR_REG_SYSTIMER_BASE + 0x28)
+/** SYSTIMER_TIMER_TARGET1_LO : R/W; bitpos: [31:0]; default: 0;
+ *  timer taget1 low 32 bit
+ */
+#define SYSTIMER_TIMER_TARGET1_LO    0xFFFFFFFF
+#define SYSTIMER_TIMER_TARGET1_LO_M  (SYSTIMER_TIMER_TARGET1_LO_V << SYSTIMER_TIMER_TARGET1_LO_S)
+#define SYSTIMER_TIMER_TARGET1_LO_V  0xFFFFFFFF
+#define SYSTIMER_TIMER_TARGET1_LO_S  0
 
-#define SYS_TIMER_SYSTIMER_TARGET2_LO_REG          (DR_REG_SYS_TIMER_BASE + 0x0030)
-/* SYS_TIMER_TIMER_TARGET2_LO : R/W ;bitpos:[31:0] ;default: 32'd0 ; */
-/*description: timer taget2 low 32 bit*/
-#define SYS_TIMER_TIMER_TARGET2_LO  0xFFFFFFFF
-#define SYS_TIMER_TIMER_TARGET2_LO_M  ((SYS_TIMER_TIMER_TARGET2_LO_V)<<(SYS_TIMER_TIMER_TARGET2_LO_S))
-#define SYS_TIMER_TIMER_TARGET2_LO_V  0xFFFFFFFF
-#define SYS_TIMER_TIMER_TARGET2_LO_S  0
+/** SYSTIMER_TARGET2_HI_REG register
+ *  SYSTIMER_TARGET2_HI.
+ */
+#define SYSTIMER_TARGET2_HI_REG (DR_REG_SYSTIMER_BASE + 0x2c)
+/** SYSTIMER_TIMER_TARGET2_HI : R/W; bitpos: [19:0]; default: 0;
+ *  timer taget2 high 32 bit
+ */
+#define SYSTIMER_TIMER_TARGET2_HI    0x000FFFFF
+#define SYSTIMER_TIMER_TARGET2_HI_M  (SYSTIMER_TIMER_TARGET2_HI_V << SYSTIMER_TIMER_TARGET2_HI_S)
+#define SYSTIMER_TIMER_TARGET2_HI_V  0x000FFFFF
+#define SYSTIMER_TIMER_TARGET2_HI_S  0
 
-#define SYS_TIMER_SYSTIMER_TARGET0_CONF_REG          (DR_REG_SYS_TIMER_BASE + 0x0034)
-/* SYS_TIMER_TARGET0_TIMER_UNIT_SEL : R/W ;bitpos:[31] ;default: 1'b0 ; */
-/*description: select which unit to compare*/
-#define SYS_TIMER_TARGET0_TIMER_UNIT_SEL  (BIT(31))
-#define SYS_TIMER_TARGET0_TIMER_UNIT_SEL_M  (BIT(31))
-#define SYS_TIMER_TARGET0_TIMER_UNIT_SEL_V  0x1
-#define SYS_TIMER_TARGET0_TIMER_UNIT_SEL_S  31
-/* SYS_TIMER_TARGET0_PERIOD_MODE : R/W ;bitpos:[30] ;default: 1'b0 ; */
-/*description: Set target0 to period mode*/
-#define SYS_TIMER_TARGET0_PERIOD_MODE  (BIT(30))
-#define SYS_TIMER_TARGET0_PERIOD_MODE_M  (BIT(30))
-#define SYS_TIMER_TARGET0_PERIOD_MODE_V  0x1
-#define SYS_TIMER_TARGET0_PERIOD_MODE_S  30
-/* SYS_TIMER_TARGET0_PERIOD : R/W ;bitpos:[25:0] ;default: 26'h0 ; */
-/*description: target0 period*/
-#define SYS_TIMER_TARGET0_PERIOD  0x03FFFFFF
-#define SYS_TIMER_TARGET0_PERIOD_M  ((SYS_TIMER_TARGET0_PERIOD_V)<<(SYS_TIMER_TARGET0_PERIOD_S))
-#define SYS_TIMER_TARGET0_PERIOD_V  0x3FFFFFF
-#define SYS_TIMER_TARGET0_PERIOD_S  0
+/** SYSTIMER_TARGET2_LO_REG register
+ *  SYSTIMER_TARGET2_LO.
+ */
+#define SYSTIMER_TARGET2_LO_REG (DR_REG_SYSTIMER_BASE + 0x30)
+/** SYSTIMER_TIMER_TARGET2_LO : R/W; bitpos: [31:0]; default: 0;
+ *  timer taget2 low 32 bit
+ */
+#define SYSTIMER_TIMER_TARGET2_LO    0xFFFFFFFF
+#define SYSTIMER_TIMER_TARGET2_LO_M  (SYSTIMER_TIMER_TARGET2_LO_V << SYSTIMER_TIMER_TARGET2_LO_S)
+#define SYSTIMER_TIMER_TARGET2_LO_V  0xFFFFFFFF
+#define SYSTIMER_TIMER_TARGET2_LO_S  0
 
-#define SYS_TIMER_SYSTIMER_TARGET1_CONF_REG          (DR_REG_SYS_TIMER_BASE + 0x0038)
-/* SYS_TIMER_TARGET1_TIMER_UNIT_SEL : R/W ;bitpos:[31] ;default: 1'b0 ; */
-/*description: select which unit to compare*/
-#define SYS_TIMER_TARGET1_TIMER_UNIT_SEL  (BIT(31))
-#define SYS_TIMER_TARGET1_TIMER_UNIT_SEL_M  (BIT(31))
-#define SYS_TIMER_TARGET1_TIMER_UNIT_SEL_V  0x1
-#define SYS_TIMER_TARGET1_TIMER_UNIT_SEL_S  31
-/* SYS_TIMER_TARGET1_PERIOD_MODE : R/W ;bitpos:[30] ;default: 1'b0 ; */
-/*description: Set target1 to period mode*/
-#define SYS_TIMER_TARGET1_PERIOD_MODE  (BIT(30))
-#define SYS_TIMER_TARGET1_PERIOD_MODE_M  (BIT(30))
-#define SYS_TIMER_TARGET1_PERIOD_MODE_V  0x1
-#define SYS_TIMER_TARGET1_PERIOD_MODE_S  30
-/* SYS_TIMER_TARGET1_PERIOD : R/W ;bitpos:[25:0] ;default: 26'h0 ; */
-/*description: target1 period*/
-#define SYS_TIMER_TARGET1_PERIOD  0x03FFFFFF
-#define SYS_TIMER_TARGET1_PERIOD_M  ((SYS_TIMER_TARGET1_PERIOD_V)<<(SYS_TIMER_TARGET1_PERIOD_S))
-#define SYS_TIMER_TARGET1_PERIOD_V  0x3FFFFFF
-#define SYS_TIMER_TARGET1_PERIOD_S  0
+/** SYSTIMER_TARGET0_CONF_REG register
+ *  SYSTIMER_TARGET0_CONF.
+ */
+#define SYSTIMER_TARGET0_CONF_REG (DR_REG_SYSTIMER_BASE + 0x34)
+/** SYSTIMER_TARGET0_PERIOD : R/W; bitpos: [25:0]; default: 0;
+ *  target0 period
+ */
+#define SYSTIMER_TARGET0_PERIOD    0x03FFFFFF
+#define SYSTIMER_TARGET0_PERIOD_M  (SYSTIMER_TARGET0_PERIOD_V << SYSTIMER_TARGET0_PERIOD_S)
+#define SYSTIMER_TARGET0_PERIOD_V  0x03FFFFFF
+#define SYSTIMER_TARGET0_PERIOD_S  0
+/** SYSTIMER_TARGET0_PERIOD_MODE : R/W; bitpos: [30]; default: 0;
+ *  Set target0 to period mode
+ */
+#define SYSTIMER_TARGET0_PERIOD_MODE    (BIT(30))
+#define SYSTIMER_TARGET0_PERIOD_MODE_M  (SYSTIMER_TARGET0_PERIOD_MODE_V << SYSTIMER_TARGET0_PERIOD_MODE_S)
+#define SYSTIMER_TARGET0_PERIOD_MODE_V  0x00000001
+#define SYSTIMER_TARGET0_PERIOD_MODE_S  30
+/** SYSTIMER_TARGET0_TIMER_UNIT_SEL : R/W; bitpos: [31]; default: 0;
+ *  select which unit to compare
+ */
+#define SYSTIMER_TARGET0_TIMER_UNIT_SEL    (BIT(31))
+#define SYSTIMER_TARGET0_TIMER_UNIT_SEL_M  (SYSTIMER_TARGET0_TIMER_UNIT_SEL_V << SYSTIMER_TARGET0_TIMER_UNIT_SEL_S)
+#define SYSTIMER_TARGET0_TIMER_UNIT_SEL_V  0x00000001
+#define SYSTIMER_TARGET0_TIMER_UNIT_SEL_S  31
 
-#define SYS_TIMER_SYSTIMER_TARGET2_CONF_REG          (DR_REG_SYS_TIMER_BASE + 0x003C)
-/* SYS_TIMER_TARGET2_TIMER_UNIT_SEL : R/W ;bitpos:[31] ;default: 1'b0 ; */
-/*description: select which unit to compare*/
-#define SYS_TIMER_TARGET2_TIMER_UNIT_SEL  (BIT(31))
-#define SYS_TIMER_TARGET2_TIMER_UNIT_SEL_M  (BIT(31))
-#define SYS_TIMER_TARGET2_TIMER_UNIT_SEL_V  0x1
-#define SYS_TIMER_TARGET2_TIMER_UNIT_SEL_S  31
-/* SYS_TIMER_TARGET2_PERIOD_MODE : R/W ;bitpos:[30] ;default: 1'b0 ; */
-/*description: Set target2 to period mode*/
-#define SYS_TIMER_TARGET2_PERIOD_MODE  (BIT(30))
-#define SYS_TIMER_TARGET2_PERIOD_MODE_M  (BIT(30))
-#define SYS_TIMER_TARGET2_PERIOD_MODE_V  0x1
-#define SYS_TIMER_TARGET2_PERIOD_MODE_S  30
-/* SYS_TIMER_TARGET2_PERIOD : R/W ;bitpos:[25:0] ;default: 26'h0 ; */
-/*description: target2 period*/
-#define SYS_TIMER_TARGET2_PERIOD  0x03FFFFFF
-#define SYS_TIMER_TARGET2_PERIOD_M  ((SYS_TIMER_TARGET2_PERIOD_V)<<(SYS_TIMER_TARGET2_PERIOD_S))
-#define SYS_TIMER_TARGET2_PERIOD_V  0x3FFFFFF
-#define SYS_TIMER_TARGET2_PERIOD_S  0
+/** SYSTIMER_TARGET1_CONF_REG register
+ *  SYSTIMER_TARGET1_CONF.
+ */
+#define SYSTIMER_TARGET1_CONF_REG (DR_REG_SYSTIMER_BASE + 0x38)
+/** SYSTIMER_TARGET1_PERIOD : R/W; bitpos: [25:0]; default: 0;
+ *  target1 period
+ */
+#define SYSTIMER_TARGET1_PERIOD    0x03FFFFFF
+#define SYSTIMER_TARGET1_PERIOD_M  (SYSTIMER_TARGET1_PERIOD_V << SYSTIMER_TARGET1_PERIOD_S)
+#define SYSTIMER_TARGET1_PERIOD_V  0x03FFFFFF
+#define SYSTIMER_TARGET1_PERIOD_S  0
+/** SYSTIMER_TARGET1_PERIOD_MODE : R/W; bitpos: [30]; default: 0;
+ *  Set target1 to period mode
+ */
+#define SYSTIMER_TARGET1_PERIOD_MODE    (BIT(30))
+#define SYSTIMER_TARGET1_PERIOD_MODE_M  (SYSTIMER_TARGET1_PERIOD_MODE_V << SYSTIMER_TARGET1_PERIOD_MODE_S)
+#define SYSTIMER_TARGET1_PERIOD_MODE_V  0x00000001
+#define SYSTIMER_TARGET1_PERIOD_MODE_S  30
+/** SYSTIMER_TARGET1_TIMER_UNIT_SEL : R/W; bitpos: [31]; default: 0;
+ *  select which unit to compare
+ */
+#define SYSTIMER_TARGET1_TIMER_UNIT_SEL    (BIT(31))
+#define SYSTIMER_TARGET1_TIMER_UNIT_SEL_M  (SYSTIMER_TARGET1_TIMER_UNIT_SEL_V << SYSTIMER_TARGET1_TIMER_UNIT_SEL_S)
+#define SYSTIMER_TARGET1_TIMER_UNIT_SEL_V  0x00000001
+#define SYSTIMER_TARGET1_TIMER_UNIT_SEL_S  31
 
-#define SYS_TIMER_SYSTIMER_UNIT0_VALUE_HI_REG          (DR_REG_SYS_TIMER_BASE + 0x0040)
-/* SYS_TIMER_TIMER_UNIT0_VALUE_HI : RO ;bitpos:[19:0] ;default: 20'd0 ; */
-/*description: timer read value high 32bit*/
-#define SYS_TIMER_TIMER_UNIT0_VALUE_HI  0x000FFFFF
-#define SYS_TIMER_TIMER_UNIT0_VALUE_HI_M  ((SYS_TIMER_TIMER_UNIT0_VALUE_HI_V)<<(SYS_TIMER_TIMER_UNIT0_VALUE_HI_S))
-#define SYS_TIMER_TIMER_UNIT0_VALUE_HI_V  0xFFFFF
-#define SYS_TIMER_TIMER_UNIT0_VALUE_HI_S  0
+/** SYSTIMER_TARGET2_CONF_REG register
+ *  SYSTIMER_TARGET2_CONF.
+ */
+#define SYSTIMER_TARGET2_CONF_REG (DR_REG_SYSTIMER_BASE + 0x3c)
+/** SYSTIMER_TARGET2_PERIOD : R/W; bitpos: [25:0]; default: 0;
+ *  target2 period
+ */
+#define SYSTIMER_TARGET2_PERIOD    0x03FFFFFF
+#define SYSTIMER_TARGET2_PERIOD_M  (SYSTIMER_TARGET2_PERIOD_V << SYSTIMER_TARGET2_PERIOD_S)
+#define SYSTIMER_TARGET2_PERIOD_V  0x03FFFFFF
+#define SYSTIMER_TARGET2_PERIOD_S  0
+/** SYSTIMER_TARGET2_PERIOD_MODE : R/W; bitpos: [30]; default: 0;
+ *  Set target2 to period mode
+ */
+#define SYSTIMER_TARGET2_PERIOD_MODE    (BIT(30))
+#define SYSTIMER_TARGET2_PERIOD_MODE_M  (SYSTIMER_TARGET2_PERIOD_MODE_V << SYSTIMER_TARGET2_PERIOD_MODE_S)
+#define SYSTIMER_TARGET2_PERIOD_MODE_V  0x00000001
+#define SYSTIMER_TARGET2_PERIOD_MODE_S  30
+/** SYSTIMER_TARGET2_TIMER_UNIT_SEL : R/W; bitpos: [31]; default: 0;
+ *  select which unit to compare
+ */
+#define SYSTIMER_TARGET2_TIMER_UNIT_SEL    (BIT(31))
+#define SYSTIMER_TARGET2_TIMER_UNIT_SEL_M  (SYSTIMER_TARGET2_TIMER_UNIT_SEL_V << SYSTIMER_TARGET2_TIMER_UNIT_SEL_S)
+#define SYSTIMER_TARGET2_TIMER_UNIT_SEL_V  0x00000001
+#define SYSTIMER_TARGET2_TIMER_UNIT_SEL_S  31
 
-#define SYS_TIMER_SYSTIMER_UNIT0_VALUE_LO_REG          (DR_REG_SYS_TIMER_BASE + 0x0044)
-/* SYS_TIMER_TIMER_UNIT0_VALUE_LO : RO ;bitpos:[31:0] ;default: 32'd0 ; */
-/*description: timer read value low 32bit*/
-#define SYS_TIMER_TIMER_UNIT0_VALUE_LO  0xFFFFFFFF
-#define SYS_TIMER_TIMER_UNIT0_VALUE_LO_M  ((SYS_TIMER_TIMER_UNIT0_VALUE_LO_V)<<(SYS_TIMER_TIMER_UNIT0_VALUE_LO_S))
-#define SYS_TIMER_TIMER_UNIT0_VALUE_LO_V  0xFFFFFFFF
-#define SYS_TIMER_TIMER_UNIT0_VALUE_LO_S  0
+/** SYSTIMER_UNIT0_VALUE_HI_REG register
+ *  SYSTIMER_UNIT0_VALUE_HI.
+ */
+#define SYSTIMER_UNIT0_VALUE_HI_REG (DR_REG_SYSTIMER_BASE + 0x40)
+/** SYSTIMER_TIMER_UNIT0_VALUE_HI : RO; bitpos: [19:0]; default: 0;
+ *  timer read value high 32bit
+ */
+#define SYSTIMER_TIMER_UNIT0_VALUE_HI    0x000FFFFF
+#define SYSTIMER_TIMER_UNIT0_VALUE_HI_M  (SYSTIMER_TIMER_UNIT0_VALUE_HI_V << SYSTIMER_TIMER_UNIT0_VALUE_HI_S)
+#define SYSTIMER_TIMER_UNIT0_VALUE_HI_V  0x000FFFFF
+#define SYSTIMER_TIMER_UNIT0_VALUE_HI_S  0
 
-#define SYS_TIMER_SYSTIMER_UNIT1_VALUE_HI_REG          (DR_REG_SYS_TIMER_BASE + 0x0048)
-/* SYS_TIMER_TIMER_UNIT1_VALUE_HI : RO ;bitpos:[19:0] ;default: 20'd0 ; */
-/*description: timer read value high 32bit*/
-#define SYS_TIMER_TIMER_UNIT1_VALUE_HI  0x000FFFFF
-#define SYS_TIMER_TIMER_UNIT1_VALUE_HI_M  ((SYS_TIMER_TIMER_UNIT1_VALUE_HI_V)<<(SYS_TIMER_TIMER_UNIT1_VALUE_HI_S))
-#define SYS_TIMER_TIMER_UNIT1_VALUE_HI_V  0xFFFFF
-#define SYS_TIMER_TIMER_UNIT1_VALUE_HI_S  0
+/** SYSTIMER_UNIT0_VALUE_LO_REG register
+ *  SYSTIMER_UNIT0_VALUE_LO.
+ */
+#define SYSTIMER_UNIT0_VALUE_LO_REG (DR_REG_SYSTIMER_BASE + 0x44)
+/** SYSTIMER_TIMER_UNIT0_VALUE_LO : RO; bitpos: [31:0]; default: 0;
+ *  timer read value low 32bit
+ */
+#define SYSTIMER_TIMER_UNIT0_VALUE_LO    0xFFFFFFFF
+#define SYSTIMER_TIMER_UNIT0_VALUE_LO_M  (SYSTIMER_TIMER_UNIT0_VALUE_LO_V << SYSTIMER_TIMER_UNIT0_VALUE_LO_S)
+#define SYSTIMER_TIMER_UNIT0_VALUE_LO_V  0xFFFFFFFF
+#define SYSTIMER_TIMER_UNIT0_VALUE_LO_S  0
 
-#define SYS_TIMER_SYSTIMER_UNIT1_VALUE_LO_REG          (DR_REG_SYS_TIMER_BASE + 0x004C)
-/* SYS_TIMER_TIMER_UNIT1_VALUE_LO : RO ;bitpos:[31:0] ;default: 32'd0 ; */
-/*description: timer read value low 32bit*/
-#define SYS_TIMER_TIMER_UNIT1_VALUE_LO  0xFFFFFFFF
-#define SYS_TIMER_TIMER_UNIT1_VALUE_LO_M  ((SYS_TIMER_TIMER_UNIT1_VALUE_LO_V)<<(SYS_TIMER_TIMER_UNIT1_VALUE_LO_S))
-#define SYS_TIMER_TIMER_UNIT1_VALUE_LO_V  0xFFFFFFFF
-#define SYS_TIMER_TIMER_UNIT1_VALUE_LO_S  0
+/** SYSTIMER_UNIT1_VALUE_HI_REG register
+ *  SYSTIMER_UNIT1_VALUE_HI.
+ */
+#define SYSTIMER_UNIT1_VALUE_HI_REG (DR_REG_SYSTIMER_BASE + 0x48)
+/** SYSTIMER_TIMER_UNIT1_VALUE_HI : RO; bitpos: [19:0]; default: 0;
+ *  timer read value high 32bit
+ */
+#define SYSTIMER_TIMER_UNIT1_VALUE_HI    0x000FFFFF
+#define SYSTIMER_TIMER_UNIT1_VALUE_HI_M  (SYSTIMER_TIMER_UNIT1_VALUE_HI_V << SYSTIMER_TIMER_UNIT1_VALUE_HI_S)
+#define SYSTIMER_TIMER_UNIT1_VALUE_HI_V  0x000FFFFF
+#define SYSTIMER_TIMER_UNIT1_VALUE_HI_S  0
 
-#define SYS_TIMER_SYSTIMER_COMP0_LOAD_REG          (DR_REG_SYS_TIMER_BASE + 0x0050)
-/* SYS_TIMER_TIMER_COMP0_LOAD : WT ;bitpos:[0] ;default: 1'b0 ; */
-/*description: timer comp0 load value*/
-#define SYS_TIMER_TIMER_COMP0_LOAD  (BIT(0))
-#define SYS_TIMER_TIMER_COMP0_LOAD_M  (BIT(0))
-#define SYS_TIMER_TIMER_COMP0_LOAD_V  0x1
-#define SYS_TIMER_TIMER_COMP0_LOAD_S  0
+/** SYSTIMER_UNIT1_VALUE_LO_REG register
+ *  SYSTIMER_UNIT1_VALUE_LO.
+ */
+#define SYSTIMER_UNIT1_VALUE_LO_REG (DR_REG_SYSTIMER_BASE + 0x4c)
+/** SYSTIMER_TIMER_UNIT1_VALUE_LO : RO; bitpos: [31:0]; default: 0;
+ *  timer read value low 32bit
+ */
+#define SYSTIMER_TIMER_UNIT1_VALUE_LO    0xFFFFFFFF
+#define SYSTIMER_TIMER_UNIT1_VALUE_LO_M  (SYSTIMER_TIMER_UNIT1_VALUE_LO_V << SYSTIMER_TIMER_UNIT1_VALUE_LO_S)
+#define SYSTIMER_TIMER_UNIT1_VALUE_LO_V  0xFFFFFFFF
+#define SYSTIMER_TIMER_UNIT1_VALUE_LO_S  0
 
-#define SYS_TIMER_SYSTIMER_COMP1_LOAD_REG          (DR_REG_SYS_TIMER_BASE + 0x0054)
-/* SYS_TIMER_TIMER_COMP1_LOAD : WT ;bitpos:[0] ;default: 1'b0 ; */
-/*description: timer comp1 load value*/
-#define SYS_TIMER_TIMER_COMP1_LOAD  (BIT(0))
-#define SYS_TIMER_TIMER_COMP1_LOAD_M  (BIT(0))
-#define SYS_TIMER_TIMER_COMP1_LOAD_V  0x1
-#define SYS_TIMER_TIMER_COMP1_LOAD_S  0
+/** SYSTIMER_COMP0_LOAD_REG register
+ *  SYSTIMER_COMP0_LOAD.
+ */
+#define SYSTIMER_COMP0_LOAD_REG (DR_REG_SYSTIMER_BASE + 0x50)
+/** SYSTIMER_TIMER_COMP0_LOAD : WT; bitpos: [0]; default: 0;
+ *  timer comp0 load value
+ */
+#define SYSTIMER_TIMER_COMP0_LOAD    (BIT(0))
+#define SYSTIMER_TIMER_COMP0_LOAD_M  (SYSTIMER_TIMER_COMP0_LOAD_V << SYSTIMER_TIMER_COMP0_LOAD_S)
+#define SYSTIMER_TIMER_COMP0_LOAD_V  0x00000001
+#define SYSTIMER_TIMER_COMP0_LOAD_S  0
 
-#define SYS_TIMER_SYSTIMER_COMP2_LOAD_REG          (DR_REG_SYS_TIMER_BASE + 0x0058)
-/* SYS_TIMER_TIMER_COMP2_LOAD : WT ;bitpos:[0] ;default: 1'b0 ; */
-/*description: timer comp2 load value*/
-#define SYS_TIMER_TIMER_COMP2_LOAD  (BIT(0))
-#define SYS_TIMER_TIMER_COMP2_LOAD_M  (BIT(0))
-#define SYS_TIMER_TIMER_COMP2_LOAD_V  0x1
-#define SYS_TIMER_TIMER_COMP2_LOAD_S  0
+/** SYSTIMER_COMP1_LOAD_REG register
+ *  SYSTIMER_COMP1_LOAD.
+ */
+#define SYSTIMER_COMP1_LOAD_REG (DR_REG_SYSTIMER_BASE + 0x54)
+/** SYSTIMER_TIMER_COMP1_LOAD : WT; bitpos: [0]; default: 0;
+ *  timer comp1 load value
+ */
+#define SYSTIMER_TIMER_COMP1_LOAD    (BIT(0))
+#define SYSTIMER_TIMER_COMP1_LOAD_M  (SYSTIMER_TIMER_COMP1_LOAD_V << SYSTIMER_TIMER_COMP1_LOAD_S)
+#define SYSTIMER_TIMER_COMP1_LOAD_V  0x00000001
+#define SYSTIMER_TIMER_COMP1_LOAD_S  0
 
-#define SYS_TIMER_SYSTIMER_UNIT0_LOAD_REG          (DR_REG_SYS_TIMER_BASE + 0x005C)
-/* SYS_TIMER_TIMER_UNIT0_LOAD : WT ;bitpos:[0] ;default: 1'b0 ; */
-/*description: timer unit0 load value*/
-#define SYS_TIMER_TIMER_UNIT0_LOAD  (BIT(0))
-#define SYS_TIMER_TIMER_UNIT0_LOAD_M  (BIT(0))
-#define SYS_TIMER_TIMER_UNIT0_LOAD_V  0x1
-#define SYS_TIMER_TIMER_UNIT0_LOAD_S  0
+/** SYSTIMER_COMP2_LOAD_REG register
+ *  SYSTIMER_COMP2_LOAD.
+ */
+#define SYSTIMER_COMP2_LOAD_REG (DR_REG_SYSTIMER_BASE + 0x58)
+/** SYSTIMER_TIMER_COMP2_LOAD : WT; bitpos: [0]; default: 0;
+ *  timer comp2 load value
+ */
+#define SYSTIMER_TIMER_COMP2_LOAD    (BIT(0))
+#define SYSTIMER_TIMER_COMP2_LOAD_M  (SYSTIMER_TIMER_COMP2_LOAD_V << SYSTIMER_TIMER_COMP2_LOAD_S)
+#define SYSTIMER_TIMER_COMP2_LOAD_V  0x00000001
+#define SYSTIMER_TIMER_COMP2_LOAD_S  0
 
-#define SYS_TIMER_SYSTIMER_UNIT1_LOAD_REG          (DR_REG_SYS_TIMER_BASE + 0x0060)
-/* SYS_TIMER_TIMER_UNIT1_LOAD : WT ;bitpos:[0] ;default: 1'b0 ; */
-/*description: timer unit1 load value*/
-#define SYS_TIMER_TIMER_UNIT1_LOAD  (BIT(0))
-#define SYS_TIMER_TIMER_UNIT1_LOAD_M  (BIT(0))
-#define SYS_TIMER_TIMER_UNIT1_LOAD_V  0x1
-#define SYS_TIMER_TIMER_UNIT1_LOAD_S  0
+/** SYSTIMER_UNIT0_LOAD_REG register
+ *  SYSTIMER_UNIT0_LOAD.
+ */
+#define SYSTIMER_UNIT0_LOAD_REG (DR_REG_SYSTIMER_BASE + 0x5c)
+/** SYSTIMER_TIMER_UNIT0_LOAD : WT; bitpos: [0]; default: 0;
+ *  timer unit0 load value
+ */
+#define SYSTIMER_TIMER_UNIT0_LOAD    (BIT(0))
+#define SYSTIMER_TIMER_UNIT0_LOAD_M  (SYSTIMER_TIMER_UNIT0_LOAD_V << SYSTIMER_TIMER_UNIT0_LOAD_S)
+#define SYSTIMER_TIMER_UNIT0_LOAD_V  0x00000001
+#define SYSTIMER_TIMER_UNIT0_LOAD_S  0
 
-#define SYS_TIMER_SYSTIMER_INT_ENA_REG          (DR_REG_SYS_TIMER_BASE + 0x0064)
-/* SYS_TIMER_TARGET2_INT_ENA : R/W ;bitpos:[2] ;default: 1'b0 ; */
-/*description: interupt2 enable*/
-#define SYS_TIMER_TARGET2_INT_ENA  (BIT(2))
-#define SYS_TIMER_TARGET2_INT_ENA_M  (BIT(2))
-#define SYS_TIMER_TARGET2_INT_ENA_V  0x1
-#define SYS_TIMER_TARGET2_INT_ENA_S  2
-/* SYS_TIMER_TARGET1_INT_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
-/*description: interupt1 enable*/
-#define SYS_TIMER_TARGET1_INT_ENA  (BIT(1))
-#define SYS_TIMER_TARGET1_INT_ENA_M  (BIT(1))
-#define SYS_TIMER_TARGET1_INT_ENA_V  0x1
-#define SYS_TIMER_TARGET1_INT_ENA_S  1
-/* SYS_TIMER_TARGET0_INT_ENA : R/W ;bitpos:[0] ;default: 1'b0 ; */
-/*description: interupt0 enable*/
-#define SYS_TIMER_TARGET0_INT_ENA  (BIT(0))
-#define SYS_TIMER_TARGET0_INT_ENA_M  (BIT(0))
-#define SYS_TIMER_TARGET0_INT_ENA_V  0x1
-#define SYS_TIMER_TARGET0_INT_ENA_S  0
+/** SYSTIMER_UNIT1_LOAD_REG register
+ *  SYSTIMER_UNIT1_LOAD.
+ */
+#define SYSTIMER_UNIT1_LOAD_REG (DR_REG_SYSTIMER_BASE + 0x60)
+/** SYSTIMER_TIMER_UNIT1_LOAD : WT; bitpos: [0]; default: 0;
+ *  timer unit1 load value
+ */
+#define SYSTIMER_TIMER_UNIT1_LOAD    (BIT(0))
+#define SYSTIMER_TIMER_UNIT1_LOAD_M  (SYSTIMER_TIMER_UNIT1_LOAD_V << SYSTIMER_TIMER_UNIT1_LOAD_S)
+#define SYSTIMER_TIMER_UNIT1_LOAD_V  0x00000001
+#define SYSTIMER_TIMER_UNIT1_LOAD_S  0
 
-#define SYS_TIMER_SYSTIMER_INT_RAW_REG          (DR_REG_SYS_TIMER_BASE + 0x0068)
-/* SYS_TIMER_TARGET2_INT_RAW : R/WTC/SS ;bitpos:[2] ;default: 1'b0 ; */
-/*description: interupt2 raw*/
-#define SYS_TIMER_TARGET2_INT_RAW  (BIT(2))
-#define SYS_TIMER_TARGET2_INT_RAW_M  (BIT(2))
-#define SYS_TIMER_TARGET2_INT_RAW_V  0x1
-#define SYS_TIMER_TARGET2_INT_RAW_S  2
-/* SYS_TIMER_TARGET1_INT_RAW : R/WTC/SS ;bitpos:[1] ;default: 1'b0 ; */
-/*description: interupt1 raw*/
-#define SYS_TIMER_TARGET1_INT_RAW  (BIT(1))
-#define SYS_TIMER_TARGET1_INT_RAW_M  (BIT(1))
-#define SYS_TIMER_TARGET1_INT_RAW_V  0x1
-#define SYS_TIMER_TARGET1_INT_RAW_S  1
-/* SYS_TIMER_TARGET0_INT_RAW : R/WTC/SS ;bitpos:[0] ;default: 1'b0 ; */
-/*description: interupt0 raw*/
-#define SYS_TIMER_TARGET0_INT_RAW  (BIT(0))
-#define SYS_TIMER_TARGET0_INT_RAW_M  (BIT(0))
-#define SYS_TIMER_TARGET0_INT_RAW_V  0x1
-#define SYS_TIMER_TARGET0_INT_RAW_S  0
+/** SYSTIMER_INT_ENA_REG register
+ *  SYSTIMER_INT_ENA.
+ */
+#define SYSTIMER_INT_ENA_REG (DR_REG_SYSTIMER_BASE + 0x64)
+/** SYSTIMER_TARGET0_INT_ENA : R/W; bitpos: [0]; default: 0;
+ *  interupt0 enable
+ */
+#define SYSTIMER_TARGET0_INT_ENA    (BIT(0))
+#define SYSTIMER_TARGET0_INT_ENA_M  (SYSTIMER_TARGET0_INT_ENA_V << SYSTIMER_TARGET0_INT_ENA_S)
+#define SYSTIMER_TARGET0_INT_ENA_V  0x00000001
+#define SYSTIMER_TARGET0_INT_ENA_S  0
+/** SYSTIMER_TARGET1_INT_ENA : R/W; bitpos: [1]; default: 0;
+ *  interupt1 enable
+ */
+#define SYSTIMER_TARGET1_INT_ENA    (BIT(1))
+#define SYSTIMER_TARGET1_INT_ENA_M  (SYSTIMER_TARGET1_INT_ENA_V << SYSTIMER_TARGET1_INT_ENA_S)
+#define SYSTIMER_TARGET1_INT_ENA_V  0x00000001
+#define SYSTIMER_TARGET1_INT_ENA_S  1
+/** SYSTIMER_TARGET2_INT_ENA : R/W; bitpos: [2]; default: 0;
+ *  interupt2 enable
+ */
+#define SYSTIMER_TARGET2_INT_ENA    (BIT(2))
+#define SYSTIMER_TARGET2_INT_ENA_M  (SYSTIMER_TARGET2_INT_ENA_V << SYSTIMER_TARGET2_INT_ENA_S)
+#define SYSTIMER_TARGET2_INT_ENA_V  0x00000001
+#define SYSTIMER_TARGET2_INT_ENA_S  2
 
-#define SYS_TIMER_SYSTIMER_INT_CLR_REG          (DR_REG_SYS_TIMER_BASE + 0x006c)
-/* SYS_TIMER_TARGET2_INT_CLR : WT ;bitpos:[2] ;default: 1'b0 ; */
-/*description: interupt2 clear*/
-#define SYS_TIMER_TARGET2_INT_CLR  (BIT(2))
-#define SYS_TIMER_TARGET2_INT_CLR_M  (BIT(2))
-#define SYS_TIMER_TARGET2_INT_CLR_V  0x1
-#define SYS_TIMER_TARGET2_INT_CLR_S  2
-/* SYS_TIMER_TARGET1_INT_CLR : WT ;bitpos:[1] ;default: 1'b0 ; */
-/*description: interupt1 clear*/
-#define SYS_TIMER_TARGET1_INT_CLR  (BIT(1))
-#define SYS_TIMER_TARGET1_INT_CLR_M  (BIT(1))
-#define SYS_TIMER_TARGET1_INT_CLR_V  0x1
-#define SYS_TIMER_TARGET1_INT_CLR_S  1
-/* SYS_TIMER_TARGET0_INT_CLR : WT ;bitpos:[0] ;default: 1'b0 ; */
-/*description: interupt0 clear*/
-#define SYS_TIMER_TARGET0_INT_CLR  (BIT(0))
-#define SYS_TIMER_TARGET0_INT_CLR_M  (BIT(0))
-#define SYS_TIMER_TARGET0_INT_CLR_V  0x1
-#define SYS_TIMER_TARGET0_INT_CLR_S  0
+/** SYSTIMER_INT_RAW_REG register
+ *  SYSTIMER_INT_RAW.
+ */
+#define SYSTIMER_INT_RAW_REG (DR_REG_SYSTIMER_BASE + 0x68)
+/** SYSTIMER_TARGET0_INT_RAW : R/WTC/SS; bitpos: [0]; default: 0;
+ *  interupt0 raw
+ */
+#define SYSTIMER_TARGET0_INT_RAW    (BIT(0))
+#define SYSTIMER_TARGET0_INT_RAW_M  (SYSTIMER_TARGET0_INT_RAW_V << SYSTIMER_TARGET0_INT_RAW_S)
+#define SYSTIMER_TARGET0_INT_RAW_V  0x00000001
+#define SYSTIMER_TARGET0_INT_RAW_S  0
+/** SYSTIMER_TARGET1_INT_RAW : R/WTC/SS; bitpos: [1]; default: 0;
+ *  interupt1 raw
+ */
+#define SYSTIMER_TARGET1_INT_RAW    (BIT(1))
+#define SYSTIMER_TARGET1_INT_RAW_M  (SYSTIMER_TARGET1_INT_RAW_V << SYSTIMER_TARGET1_INT_RAW_S)
+#define SYSTIMER_TARGET1_INT_RAW_V  0x00000001
+#define SYSTIMER_TARGET1_INT_RAW_S  1
+/** SYSTIMER_TARGET2_INT_RAW : R/WTC/SS; bitpos: [2]; default: 0;
+ *  interupt2 raw
+ */
+#define SYSTIMER_TARGET2_INT_RAW    (BIT(2))
+#define SYSTIMER_TARGET2_INT_RAW_M  (SYSTIMER_TARGET2_INT_RAW_V << SYSTIMER_TARGET2_INT_RAW_S)
+#define SYSTIMER_TARGET2_INT_RAW_V  0x00000001
+#define SYSTIMER_TARGET2_INT_RAW_S  2
 
-#define SYS_TIMER_SYSTIMER_INT_ST_REG          (DR_REG_SYS_TIMER_BASE + 0x0070)
-/* SYS_TIMER_TARGET2_INT_ST : RO ;bitpos:[2] ;default: 1'b0 ; */
-/*description: */
-#define SYS_TIMER_TARGET2_INT_ST  (BIT(2))
-#define SYS_TIMER_TARGET2_INT_ST_M  (BIT(2))
-#define SYS_TIMER_TARGET2_INT_ST_V  0x1
-#define SYS_TIMER_TARGET2_INT_ST_S  2
-/* SYS_TIMER_TARGET1_INT_ST : RO ;bitpos:[1] ;default: 1'b0 ; */
-/*description: */
-#define SYS_TIMER_TARGET1_INT_ST  (BIT(1))
-#define SYS_TIMER_TARGET1_INT_ST_M  (BIT(1))
-#define SYS_TIMER_TARGET1_INT_ST_V  0x1
-#define SYS_TIMER_TARGET1_INT_ST_S  1
-/* SYS_TIMER_TARGET0_INT_ST : RO ;bitpos:[0] ;default: 1'b0 ; */
-/*description: */
-#define SYS_TIMER_TARGET0_INT_ST  (BIT(0))
-#define SYS_TIMER_TARGET0_INT_ST_M  (BIT(0))
-#define SYS_TIMER_TARGET0_INT_ST_V  0x1
-#define SYS_TIMER_TARGET0_INT_ST_S  0
+/** SYSTIMER_INT_CLR_REG register
+ *  SYSTIMER_INT_CLR.
+ */
+#define SYSTIMER_INT_CLR_REG (DR_REG_SYSTIMER_BASE + 0x6c)
+/** SYSTIMER_TARGET0_INT_CLR : WT; bitpos: [0]; default: 0;
+ *  interupt0 clear
+ */
+#define SYSTIMER_TARGET0_INT_CLR    (BIT(0))
+#define SYSTIMER_TARGET0_INT_CLR_M  (SYSTIMER_TARGET0_INT_CLR_V << SYSTIMER_TARGET0_INT_CLR_S)
+#define SYSTIMER_TARGET0_INT_CLR_V  0x00000001
+#define SYSTIMER_TARGET0_INT_CLR_S  0
+/** SYSTIMER_TARGET1_INT_CLR : WT; bitpos: [1]; default: 0;
+ *  interupt1 clear
+ */
+#define SYSTIMER_TARGET1_INT_CLR    (BIT(1))
+#define SYSTIMER_TARGET1_INT_CLR_M  (SYSTIMER_TARGET1_INT_CLR_V << SYSTIMER_TARGET1_INT_CLR_S)
+#define SYSTIMER_TARGET1_INT_CLR_V  0x00000001
+#define SYSTIMER_TARGET1_INT_CLR_S  1
+/** SYSTIMER_TARGET2_INT_CLR : WT; bitpos: [2]; default: 0;
+ *  interupt2 clear
+ */
+#define SYSTIMER_TARGET2_INT_CLR    (BIT(2))
+#define SYSTIMER_TARGET2_INT_CLR_M  (SYSTIMER_TARGET2_INT_CLR_V << SYSTIMER_TARGET2_INT_CLR_S)
+#define SYSTIMER_TARGET2_INT_CLR_V  0x00000001
+#define SYSTIMER_TARGET2_INT_CLR_S  2
 
-#define SYS_TIMER_SYSTIMER_DATE_REG          (DR_REG_SYS_TIMER_BASE + 0x00fc)
-/* SYS_TIMER_DATE : R/W ;bitpos:[31:0] ;default: 28'h2006171 ; */
-/*description: */
-#define SYS_TIMER_DATE  0xFFFFFFFF
-#define SYS_TIMER_DATE_M  ((SYS_TIMER_DATE_V)<<(SYS_TIMER_DATE_S))
-#define SYS_TIMER_DATE_V  0xFFFFFFFF
-#define SYS_TIMER_DATE_S  0
+/** SYSTIMER_INT_ST_REG register
+ *  SYSTIMER_INT_ST.
+ */
+#define SYSTIMER_INT_ST_REG (DR_REG_SYSTIMER_BASE + 0x70)
+/** SYSTIMER_TARGET0_INT_ST : RO; bitpos: [0]; default: 0;
+ *  reg_target0_int_st
+ */
+#define SYSTIMER_TARGET0_INT_ST    (BIT(0))
+#define SYSTIMER_TARGET0_INT_ST_M  (SYSTIMER_TARGET0_INT_ST_V << SYSTIMER_TARGET0_INT_ST_S)
+#define SYSTIMER_TARGET0_INT_ST_V  0x00000001
+#define SYSTIMER_TARGET0_INT_ST_S  0
+/** SYSTIMER_TARGET1_INT_ST : RO; bitpos: [1]; default: 0;
+ *  reg_target1_int_st
+ */
+#define SYSTIMER_TARGET1_INT_ST    (BIT(1))
+#define SYSTIMER_TARGET1_INT_ST_M  (SYSTIMER_TARGET1_INT_ST_V << SYSTIMER_TARGET1_INT_ST_S)
+#define SYSTIMER_TARGET1_INT_ST_V  0x00000001
+#define SYSTIMER_TARGET1_INT_ST_S  1
+/** SYSTIMER_TARGET2_INT_ST : RO; bitpos: [2]; default: 0;
+ *  reg_target2_int_st
+ */
+#define SYSTIMER_TARGET2_INT_ST    (BIT(2))
+#define SYSTIMER_TARGET2_INT_ST_M  (SYSTIMER_TARGET2_INT_ST_V << SYSTIMER_TARGET2_INT_ST_S)
+#define SYSTIMER_TARGET2_INT_ST_V  0x00000001
+#define SYSTIMER_TARGET2_INT_ST_S  2
+
+/** SYSTIMER_DATE_REG register
+ *  SYSTIMER_DATE.
+ */
+#define SYSTIMER_DATE_REG (DR_REG_SYSTIMER_BASE + 0xfc)
+/** SYSTIMER_DATE : R/W; bitpos: [31:0]; default: 33579377;
+ *  reg_date
+ */
+#define SYSTIMER_DATE    0xFFFFFFFF
+#define SYSTIMER_DATE_M  (SYSTIMER_DATE_V << SYSTIMER_DATE_S)
+#define SYSTIMER_DATE_V  0xFFFFFFFF
+#define SYSTIMER_DATE_S  0
 
 #ifdef __cplusplus
 }
 #endif
-
-
-
-#endif /*_SOC_SYS_TIMER_REG_H_ */
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/systimer_struct.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/systimer_struct.h
index b029eca8..af41b1f3 100644
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/systimer_struct.h
+++ b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/systimer_struct.h
@@ -1,251 +1,370 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-#ifndef _SOC_SYS_TIMER_STRUCT_H_
-#define _SOC_SYS_TIMER_STRUCT_H_
+/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
+
+#include <stdint.h>
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-typedef volatile struct {
+/** Configuration Register */
+/** Type of conf register
+ *  SYSTIMER_CONF.
+ */
+typedef union {
+    struct {
+        /** systimer_clk_fo : R/W; bitpos: [0]; default: 0;
+         *  systimer clock force on
+         */
+        uint32_t systimer_clk_fo: 1;
+        uint32_t reserved_1: 21;
+        /** target2_work_en : R/W; bitpos: [22]; default: 0;
+         *  target2 work enable
+         */
+        uint32_t target2_work_en: 1;
+        /** target1_work_en : R/W; bitpos: [23]; default: 0;
+         *  target1 work enable
+         */
+        uint32_t target1_work_en: 1;
+        /** target0_work_en : R/W; bitpos: [24]; default: 0;
+         *  target0 work enable
+         */
+        uint32_t target0_work_en: 1;
+        /** timer_unit1_core1_stall_en : R/W; bitpos: [25]; default: 1;
+         *  If timer unit1 is stalled when core1 stalled
+         */
+        uint32_t timer_unit1_core1_stall_en: 1;
+        /** timer_unit1_core0_stall_en : R/W; bitpos: [26]; default: 1;
+         *  If timer unit1 is stalled when core0 stalled
+         */
+        uint32_t timer_unit1_core0_stall_en: 1;
+        /** timer_unit0_core1_stall_en : R/W; bitpos: [27]; default: 0;
+         *  If timer unit0 is stalled when core1 stalled
+         */
+        uint32_t timer_unit0_core1_stall_en: 1;
+        /** timer_unit0_core0_stall_en : R/W; bitpos: [28]; default: 0;
+         *  If timer unit0 is stalled when core0 stalled
+         */
+        uint32_t timer_unit0_core0_stall_en: 1;
+        /** timer_unit1_work_en : R/W; bitpos: [29]; default: 0;
+         *  timer unit1 work enable
+         */
+        uint32_t timer_unit1_work_en: 1;
+        /** timer_unit0_work_en : R/W; bitpos: [30]; default: 1;
+         *  timer unit0 work enable
+         */
+        uint32_t timer_unit0_work_en: 1;
+        /** clk_en : R/W; bitpos: [31]; default: 0;
+         *  register file clk gating
+         */
+        uint32_t clk_en: 1;
+    };
+    uint32_t val;
+} systimer_conf_reg_t;
+
+/** Type of unit_op register
+ *  SYSTIMER_UNIT_OP.
+ */
+typedef union {
+    struct {
+        uint32_t reserved_0: 29;
+        /** timer_unit_value_valid : R/SS/WTC; bitpos: [29]; default: 0;
+         *  reg_timer_unit0_value_valid
+         */
+        uint32_t timer_unit_value_valid: 1;
+        /** timer_unit_update : WT; bitpos: [30]; default: 0;
+         *  update timer_unit0
+         */
+        uint32_t timer_unit_update: 1;
+    };
+    uint32_t val;
+} systimer_unit_op_reg_t;
+
+/** Type of unit_load register
+ *  SYSTIMER_UNIT_LOAD
+ */
+typedef struct {
     union {
         struct {
-            uint32_t systimer_clk_fo:            1;       /*systimer clock force on*/
-            uint32_t reserved1:                 21;
-            uint32_t target2_work_en:            1;       /*target2 work enable*/
-            uint32_t target1_work_en:            1;       /*target1 work enable*/
-            uint32_t target0_work_en:            1;       /*target0 work enable*/
-            uint32_t timer_unit1_core1_stall_en: 1;       /*If timer unit1 is stalled when core1 stalled*/
-            uint32_t timer_unit1_core0_stall_en: 1;       /*If timer unit1 is stalled when core0 stalled*/
-            uint32_t timer_unit0_core1_stall_en: 1;       /*If timer unit0 is stalled when core1 stalled*/
-            uint32_t timer_unit0_core0_stall_en: 1;       /*If timer unit0 is stalled when core0 stalled*/
-            uint32_t timer_unit1_work_en:        1;       /*timer unit1 work enable*/
-            uint32_t timer_unit0_work_en:        1;       /*timer unit0 work enable*/
-            uint32_t clk_en:                     1;       /*register file clk gating*/
+            /** timer_unit_load_hi : R/W; bitpos: [19:0]; default: 0;
+             *  timer unit load high 32 bit
+             */
+            uint32_t timer_unit_load_hi: 20;
         };
         uint32_t val;
-    } systimer_conf;
+    } hi;
     union {
         struct {
-            uint32_t reserved0:              29;
-            uint32_t timer_unit0_value_valid: 1;
-            uint32_t timer_unit0_update:      1;          /*update timer_unit0*/
-            uint32_t reserved31:              1;
+            /** timer_unit_load_lo : R/W; bitpos: [31:0]; default: 0;
+             *  timer unit load low 32 bit
+             */
+            uint32_t timer_unit_load_lo: 32;
         };
         uint32_t val;
-    } systimer_unit0_op;
+    } lo;
+} systimer_unit_load_val_reg_t;
+
+/** Type of target register
+ *  SYSTIMER_TARGET.
+ */
+typedef struct {
     union {
         struct {
-            uint32_t reserved0:              29;
-            uint32_t timer_unit1_value_valid: 1;          /*timer value is sync and valid*/
-            uint32_t timer_unit1_update:      1;          /*update timer unit1*/
-            uint32_t reserved31:              1;
+            /** timer_target_hi : R/W; bitpos: [19:0]; default: 0;
+             *  timer target high 32 bit
+             */
+            uint32_t timer_target_hi: 20;
         };
         uint32_t val;
-    } systimer_unit1_op;
+    } hi;
     union {
         struct {
-            uint32_t timer_unit0_load_hi:20;              /*timer unit0 load high 32 bit*/
-            uint32_t reserved20:         12;
+            /** timer_target_lo : R/W; bitpos: [31:0]; default: 0;
+             *  timer target low 32 bit
+             */
+            uint32_t timer_target_lo: 32;
         };
         uint32_t val;
-    } systimer_unit0_load_hi;
-    uint32_t systimer_unit0_load_lo;                      /**/
+    } lo;
+} systimer_target_val_reg_t;
+
+/** Type of target_conf register
+ *  SYSTIMER_TARGET_CONF.
+ */
+typedef union {
+    struct {
+        /** target_period : R/W; bitpos: [25:0]; default: 0;
+         *  target period
+         */
+        uint32_t target_period: 26;
+        uint32_t reserved_26: 4;
+        /** target_period_mode : R/W; bitpos: [30]; default: 0;
+         *  Set target to period mode
+         */
+        uint32_t target_period_mode: 1;
+        /** target_timer_unit_sel : R/W; bitpos: [31]; default: 0;
+         *  select which unit to compare
+         */
+        uint32_t target_timer_unit_sel: 1;
+    };
+    uint32_t val;
+} systimer_target_conf_reg_t;
+
+/** Type of unit_value_hi register
+ *  SYSTIMER_UNIT_VALUE_HI.
+ */
+typedef struct {
     union {
         struct {
-            uint32_t timer_unit1_load_hi:20;              /*timer unit1 load high 32 bit*/
-            uint32_t reserved20:         12;
+            /** timer_unit_value_hi : RO; bitpos: [19:0]; default: 0;
+             *  timer read value high 20bit
+             */
+            uint32_t timer_unit_value_hi: 20;
         };
         uint32_t val;
-    } systimer_unit1_load_hi;
-    uint32_t systimer_unit1_load_lo;                      /**/
+    } hi;
     union {
         struct {
-            uint32_t timer_target0_hi:20;                 /*timer taget0 high 32 bit*/
-            uint32_t reserved20:      12;
+            /** timer_unit_value_lo : RO; bitpos: [31:0]; default: 0;
+             *  timer read value low 32bit
+             */
+            uint32_t timer_unit_value_lo: 32;
         };
         uint32_t val;
-    } systimer_target0_hi;
-    uint32_t systimer_target0_lo;                         /**/
-    union {
-        struct {
-            uint32_t timer_target1_hi:20;                 /*timer taget1 high 32 bit*/
-            uint32_t reserved20:      12;
-        };
-        uint32_t val;
-    } systimer_target1_hi;
-    uint32_t systimer_target1_lo;                         /**/
-    union {
-        struct {
-            uint32_t timer_target2_hi:20;                 /*timer taget2 high 32 bit*/
-            uint32_t reserved20:      12;
-        };
-        uint32_t val;
-    } systimer_target2_hi;
-    uint32_t systimer_target2_lo;                         /**/
-    union {
-        struct {
-            uint32_t target0_period:        26;           /*target0 period*/
-            uint32_t reserved26:             4;
-            uint32_t target0_period_mode:    1;           /*Set target0 to period mode*/
-            uint32_t target0_timer_unit_sel: 1;           /*select which unit to compare*/
-        };
-        uint32_t val;
-    } systimer_target0_conf;
-    union {
-        struct {
-            uint32_t target1_period:        26;           /*target1 period*/
-            uint32_t reserved26:             4;
-            uint32_t target1_period_mode:    1;           /*Set target1 to period mode*/
-            uint32_t target1_timer_unit_sel: 1;           /*select which unit to compare*/
-        };
-        uint32_t val;
-    } systimer_target1_conf;
-    union {
-        struct {
-            uint32_t target2_period:        26;           /*target2 period*/
-            uint32_t reserved26:             4;
-            uint32_t target2_period_mode:    1;           /*Set target2 to period mode*/
-            uint32_t target2_timer_unit_sel: 1;           /*select which unit to compare*/
-        };
-        uint32_t val;
-    } systimer_target2_conf;
-    union {
-        struct {
-            uint32_t timer_unit0_value_hi:20;             /*timer read value high 32bit*/
-            uint32_t reserved20:          12;
-        };
-        uint32_t val;
-    } systimer_unit0_value_hi;
-    uint32_t systimer_unit0_value_lo;                     /**/
-    union {
-        struct {
-            uint32_t timer_unit1_value_hi:20;             /*timer read value high 32bit*/
-            uint32_t reserved20:          12;
-        };
-        uint32_t val;
-    } systimer_unit1_value_hi;
-    uint32_t systimer_unit1_value_lo;                     /**/
-    union {
-        struct {
-            uint32_t timer_comp0_load: 1;                 /*timer comp0 load value*/
-            uint32_t reserved1:       31;
-        };
-        uint32_t val;
-    } systimer_comp0_load;
-    union {
-        struct {
-            uint32_t timer_comp1_load: 1;                 /*timer comp1 load value*/
-            uint32_t reserved1:       31;
-        };
-        uint32_t val;
-    } systimer_comp1_load;
-    union {
-        struct {
-            uint32_t timer_comp2_load: 1;                 /*timer comp2 load value*/
-            uint32_t reserved1:       31;
-        };
-        uint32_t val;
-    } systimer_comp2_load;
-    union {
-        struct {
-            uint32_t timer_unit0_load: 1;                 /*timer unit0 load value*/
-            uint32_t reserved1:       31;
-        };
-        uint32_t val;
-    } systimer_unit0_load;
-    union {
-        struct {
-            uint32_t timer_unit1_load: 1;                 /*timer unit1 load value*/
-            uint32_t reserved1:       31;
-        };
-        uint32_t val;
-    } systimer_unit1_load;
-    union {
-        struct {
-            uint32_t target0:         1;                  /*interupt0 enable*/
-            uint32_t target1:         1;                  /*interupt1 enable*/
-            uint32_t target2:         1;                  /*interupt2 enable*/
-            uint32_t reserved3:      29;
-        };
-        uint32_t val;
-    } systimer_int_ena;
-    union {
-        struct {
-            uint32_t target0:         1;                  /*interupt0 raw*/
-            uint32_t target1:         1;                  /*interupt1 raw*/
-            uint32_t target2:         1;                  /*interupt2 raw*/
-            uint32_t reserved3:      29;
-        };
-        uint32_t val;
-    } systimer_int_raw;
-    union {
-        struct {
-            uint32_t target0:         1;                  /*interupt0 clear*/
-            uint32_t target1:         1;                  /*interupt1 clear*/
-            uint32_t target2:         1;                  /*interupt2 clear*/
-            uint32_t reserved3:      29;
-        };
-        uint32_t val;
-    } systimer_int_clr;
-    union {
-        struct {
-            uint32_t target0:        1;
-            uint32_t target1:        1;
-            uint32_t target2:        1;
-            uint32_t reserved3:     29;
-        };
-        uint32_t val;
-    } systimer_int_st;
-    uint32_t reserved_74;
-    uint32_t reserved_78;
-    uint32_t reserved_7c;
-    uint32_t reserved_80;
-    uint32_t reserved_84;
-    uint32_t reserved_88;
-    uint32_t reserved_8c;
-    uint32_t reserved_90;
-    uint32_t reserved_94;
-    uint32_t reserved_98;
-    uint32_t reserved_9c;
-    uint32_t reserved_a0;
-    uint32_t reserved_a4;
-    uint32_t reserved_a8;
-    uint32_t reserved_ac;
-    uint32_t reserved_b0;
-    uint32_t reserved_b4;
-    uint32_t reserved_b8;
-    uint32_t reserved_bc;
-    uint32_t reserved_c0;
-    uint32_t reserved_c4;
-    uint32_t reserved_c8;
-    uint32_t reserved_cc;
-    uint32_t reserved_d0;
-    uint32_t reserved_d4;
-    uint32_t reserved_d8;
-    uint32_t reserved_dc;
-    uint32_t reserved_e0;
-    uint32_t reserved_e4;
-    uint32_t reserved_e8;
-    uint32_t reserved_ec;
-    uint32_t reserved_f0;
-    uint32_t reserved_f4;
-    uint32_t reserved_f8;
-    uint32_t systimer_date;                               /**/
-} sys_timer_dev_t;
-extern sys_timer_dev_t SYS_TIMER;
+    } lo;
+} systimer_unit_value_reg_t;
+
+/** Type of comp_load register
+ *  SYSTIMER_COMP_LOAD.
+ */
+typedef union {
+    struct {
+        /** timer_comp_load : WT; bitpos: [0]; default: 0;
+         *  timer comp load value
+         */
+        uint32_t timer_comp_load: 1;
+    };
+    uint32_t val;
+} systimer_comp_load_reg_t;
+
+/** Type of unit_load register
+ *  SYSTIMER_UNIT_LOAD.
+ */
+typedef union {
+    struct {
+        /** timer_unit_load : WT; bitpos: [0]; default: 0;
+         *  timer unit load value
+         */
+        uint32_t timer_unit_load: 1;
+    };
+    uint32_t val;
+} systimer_unit_load_reg_t;
+
+/** Interrupt Register */
+/** Type of int_ena register
+ *  SYSTIMER_INT_ENA.
+ */
+typedef union {
+    struct {
+        /** target0_int_ena : R/W; bitpos: [0]; default: 0;
+         *  interupt0 enable
+         */
+        uint32_t target0_int_ena: 1;
+        /** target1_int_ena : R/W; bitpos: [1]; default: 0;
+         *  interupt1 enable
+         */
+        uint32_t target1_int_ena: 1;
+        /** target2_int_ena : R/W; bitpos: [2]; default: 0;
+         *  interupt2 enable
+         */
+        uint32_t target2_int_ena: 1;
+    };
+    uint32_t val;
+} systimer_int_ena_reg_t;
+
+/** Type of int_raw register
+ *  SYSTIMER_INT_RAW.
+ */
+typedef union {
+    struct {
+        /** target0_int_raw : R/WTC/SS; bitpos: [0]; default: 0;
+         *  interupt0 raw
+         */
+        uint32_t target0_int_raw: 1;
+        /** target1_int_raw : R/WTC/SS; bitpos: [1]; default: 0;
+         *  interupt1 raw
+         */
+        uint32_t target1_int_raw: 1;
+        /** target2_int_raw : R/WTC/SS; bitpos: [2]; default: 0;
+         *  interupt2 raw
+         */
+        uint32_t target2_int_raw: 1;
+    };
+    uint32_t val;
+} systimer_int_raw_reg_t;
+
+/** Type of int_clr register
+ *  SYSTIMER_INT_CLR.
+ */
+typedef union {
+    struct {
+        /** target0_int_clr : WT; bitpos: [0]; default: 0;
+         *  interupt0 clear
+         */
+        uint32_t target0_int_clr: 1;
+        /** target1_int_clr : WT; bitpos: [1]; default: 0;
+         *  interupt1 clear
+         */
+        uint32_t target1_int_clr: 1;
+        /** target2_int_clr : WT; bitpos: [2]; default: 0;
+         *  interupt2 clear
+         */
+        uint32_t target2_int_clr: 1;
+    };
+    uint32_t val;
+} systimer_int_clr_reg_t;
+
+/** Type of int_st register
+ *  SYSTIMER_INT_ST.
+ */
+typedef union {
+    struct {
+        /** target0_int_st : RO; bitpos: [0]; default: 0;
+         *  reg_target0_int_st
+         */
+        uint32_t target0_int_st: 1;
+        /** target1_int_st : RO; bitpos: [1]; default: 0;
+         *  reg_target1_int_st
+         */
+        uint32_t target1_int_st: 1;
+        /** target2_int_st : RO; bitpos: [2]; default: 0;
+         *  reg_target2_int_st
+         */
+        uint32_t target2_int_st: 1;
+    };
+    uint32_t val;
+} systimer_int_st_reg_t;
+
+
+/** Version Register */
+/** Type of date register
+ *  SYSTIMER_DATE.
+ */
+typedef union {
+    struct {
+        /** date : R/W; bitpos: [31:0]; default: 33579377;
+         *  reg_date
+         */
+        uint32_t date: 32;
+    };
+    uint32_t val;
+} systimer_date_reg_t;
+
+
+typedef struct {
+    volatile systimer_conf_reg_t conf;
+    volatile systimer_unit_op_reg_t unit_op[2];
+    volatile systimer_unit_load_val_reg_t unit_load_val[2];
+    volatile systimer_target_val_reg_t target_val[3];
+    volatile systimer_target_conf_reg_t target_conf[3];
+    volatile systimer_unit_value_reg_t unit_val[2];
+    volatile systimer_comp_load_reg_t comp_load[3];
+    volatile systimer_unit_load_reg_t unit_load[2];
+    volatile systimer_int_ena_reg_t int_ena;
+    volatile systimer_int_raw_reg_t int_raw;
+    volatile systimer_int_clr_reg_t int_clr;
+    volatile systimer_int_st_reg_t int_st;
+    uint32_t reserved_074;
+    uint32_t reserved_078;
+    uint32_t reserved_07c;
+    uint32_t reserved_080;
+    uint32_t reserved_084;
+    uint32_t reserved_088;
+    uint32_t reserved_08c;
+    uint32_t reserved_090;
+    uint32_t reserved_094;
+    uint32_t reserved_098;
+    uint32_t reserved_09c;
+    uint32_t reserved_0a0;
+    uint32_t reserved_0a4;
+    uint32_t reserved_0a8;
+    uint32_t reserved_0ac;
+    uint32_t reserved_0b0;
+    uint32_t reserved_0b4;
+    uint32_t reserved_0b8;
+    uint32_t reserved_0bc;
+    uint32_t reserved_0c0;
+    uint32_t reserved_0c4;
+    uint32_t reserved_0c8;
+    uint32_t reserved_0cc;
+    uint32_t reserved_0d0;
+    uint32_t reserved_0d4;
+    uint32_t reserved_0d8;
+    uint32_t reserved_0dc;
+    uint32_t reserved_0e0;
+    uint32_t reserved_0e4;
+    uint32_t reserved_0e8;
+    uint32_t reserved_0ec;
+    uint32_t reserved_0f0;
+    uint32_t reserved_0f4;
+    uint32_t reserved_0f8;
+    volatile systimer_date_reg_t date;
+} systimer_dev_t;
+
+extern systimer_dev_t SYSTIMER;
+
 #ifdef __cplusplus
 }
 #endif
-
-#endif  /* _SOC_SYS_TIMER_STRUCT_H_ */
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/uart_caps.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/uart_caps.h
deleted file mode 100644
index bcbca36a..00000000
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/uart_caps.h
+++ /dev/null
@@ -1,37 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#pragma once
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define SOC_UART_FIFO_LEN          (128)      /*!< The UART hardware FIFO length */
-#define SOC_UART_BITRATE_MAX       (5000000)  /*!< Max bit rate supported by UART */
-
-#define SOC_UART_SUPPORT_RTC_CLK    (1)
-#define SOC_UART_SUPPORT_XTAL_CLK   (1)
-
-// ESP32-C3 have 2 UART
-#define SOC_UART_NUM           (2)
-
-// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
-#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND   (1)
-#define UART_FSM_IDLE                       (0x0)
-#define UART_FSM_TX_WAIT_SEND               (0xf)
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/usb_serial_jtag_reg.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/usb_serial_jtag_reg.h
new file mode 100644
index 00000000..432fe1aa
--- /dev/null
+++ b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/usb_serial_jtag_reg.h
@@ -0,0 +1,993 @@
+
+/** Copyright 2021 Espressif Systems (Shanghai) Co. Ltd.
+ *  SPDX-License-Identifier: Apache-2.0
+ */
+
+
+#pragma once
+
+#include <stdint.h>
+#include "soc/soc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/** Configuration Registers */
+
+/** USB_SERIAL_JTAG_EP1_REG register
+ *  USB_SERIAL_JTAG_EP1_REG.
+ */
+#define USB_SERIAL_JTAG_EP1_REG (SOC_DPORT_USB_BASE + 0x0)
+/* USB_SERIAL_JTAG_RDWR_BYTE : R/W; bitpos: [8:0]; default: 0;
+ * Write and read byte data to/from UART Tx/Rx FIFO through this field.
+ * When USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT is set  then user can write
+ * data (up to 64 bytes) into UART Tx FIFO. When
+ * USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT is set, user can check
+ * USB_SERIAL_JTAG_OUT_EP1_WR_ADDR and USB_SERIAL_JTAG_OUT_EP0_RD_ADDR to
+ * know how many data is received, then read that amount of data from UART
+ * Rx
+ * FIFO.
+ */
+#define USB_SERIAL_JTAG_RDWR_BYTE    0x000000FF
+#define USB_SERIAL_JTAG_RDWR_BYTE_M  (USB_SERIAL_JTAG_RDWR_BYTE_V << USB_SERIAL_JTAG_RDWR_BYTE_S)
+#define USB_SERIAL_JTAG_RDWR_BYTE_V  0x000000FF
+#define USB_SERIAL_JTAG_RDWR_BYTE_S  0
+
+/** USB_SERIAL_JTAG_CONF0_REG register
+ *  USB_SERIAL_JTAG_CONF0_REG.
+ */
+#define USB_SERIAL_JTAG_CONF0_REG (SOC_DPORT_USB_BASE + 0x18)
+/* USB_SERIAL_JTAG_PHY_SEL : R/W; bitpos: [0]; default: 0;
+ * Select internal/external PHY. 1’b0: internal PHY, 1’b1: external
+ * PHY
+ */
+#define USB_SERIAL_JTAG_PHY_SEL    (BIT(0))
+#define USB_SERIAL_JTAG_PHY_SEL_M  (USB_SERIAL_JTAG_PHY_SEL_V << USB_SERIAL_JTAG_PHY_SEL_S)
+#define USB_SERIAL_JTAG_PHY_SEL_V  0x00000001
+#define USB_SERIAL_JTAG_PHY_SEL_S  0
+/* USB_SERIAL_JTAG_EXCHG_PINS_OVERRIDE : R/W; bitpos: [1]; default: 0;
+ * Enable software control USB D+ D-
+ * exchange
+ */
+#define USB_SERIAL_JTAG_EXCHG_PINS_OVERRIDE    (BIT(1))
+#define USB_SERIAL_JTAG_EXCHG_PINS_OVERRIDE_M  (USB_SERIAL_JTAG_EXCHG_PINS_OVERRIDE_V << USB_SERIAL_JTAG_EXCHG_PINS_OVERRIDE_S)
+#define USB_SERIAL_JTAG_EXCHG_PINS_OVERRIDE_V  0x00000001
+#define USB_SERIAL_JTAG_EXCHG_PINS_OVERRIDE_S  1
+/* USB_SERIAL_JTAG_EXCHG_PINS : R/W; bitpos: [2]; default: 0;
+ * USB D+ D-
+ * exchange
+ */
+#define USB_SERIAL_JTAG_EXCHG_PINS    (BIT(2))
+#define USB_SERIAL_JTAG_EXCHG_PINS_M  (USB_SERIAL_JTAG_EXCHG_PINS_V << USB_SERIAL_JTAG_EXCHG_PINS_S)
+#define USB_SERIAL_JTAG_EXCHG_PINS_V  0x00000001
+#define USB_SERIAL_JTAG_EXCHG_PINS_S  2
+/* USB_SERIAL_JTAG_VREFL : R/W; bitpos: [5:3]; default: 0;
+ * Control single-end input high threshold. 1.76V to 2V, step
+ * 80mV
+ */
+#define USB_SERIAL_JTAG_VREFL    0x00000003
+#define USB_SERIAL_JTAG_VREFL_M  (USB_SERIAL_JTAG_VREFL_V << USB_SERIAL_JTAG_VREFL_S)
+#define USB_SERIAL_JTAG_VREFL_V  0x00000003
+#define USB_SERIAL_JTAG_VREFL_S  3
+/* USB_SERIAL_JTAG_VREFH : R/W; bitpos: [7:5]; default: 0;
+ * Control single-end input low threshold. 0.8V to 1.04V, step
+ * 80mV
+ */
+#define USB_SERIAL_JTAG_VREFH    0x00000003
+#define USB_SERIAL_JTAG_VREFH_M  (USB_SERIAL_JTAG_VREFH_V << USB_SERIAL_JTAG_VREFH_S)
+#define USB_SERIAL_JTAG_VREFH_V  0x00000003
+#define USB_SERIAL_JTAG_VREFH_S  5
+/* USB_SERIAL_JTAG_VREF_OVERRIDE : R/W; bitpos: [7]; default: 0;
+ * Enable software control input
+ * threshold
+ */
+#define USB_SERIAL_JTAG_VREF_OVERRIDE    (BIT(7))
+#define USB_SERIAL_JTAG_VREF_OVERRIDE_M  (USB_SERIAL_JTAG_VREF_OVERRIDE_V << USB_SERIAL_JTAG_VREF_OVERRIDE_S)
+#define USB_SERIAL_JTAG_VREF_OVERRIDE_V  0x00000001
+#define USB_SERIAL_JTAG_VREF_OVERRIDE_S  7
+/* USB_SERIAL_JTAG_PAD_PULL_OVERRIDE : R/W; bitpos: [8]; default: 0;
+ * Enable software control USB D+ D- pullup
+ * pulldown
+ */
+#define USB_SERIAL_JTAG_PAD_PULL_OVERRIDE    (BIT(8))
+#define USB_SERIAL_JTAG_PAD_PULL_OVERRIDE_M  (USB_SERIAL_JTAG_PAD_PULL_OVERRIDE_V << USB_SERIAL_JTAG_PAD_PULL_OVERRIDE_S)
+#define USB_SERIAL_JTAG_PAD_PULL_OVERRIDE_V  0x00000001
+#define USB_SERIAL_JTAG_PAD_PULL_OVERRIDE_S  8
+/* USB_SERIAL_JTAG_DP_PULLUP : R/W; bitpos: [9]; default: 1;
+ * Control USB D+ pull
+ * up.
+ */
+#define USB_SERIAL_JTAG_DP_PULLUP    (BIT(9))
+#define USB_SERIAL_JTAG_DP_PULLUP_M  (USB_SERIAL_JTAG_DP_PULLUP_V << USB_SERIAL_JTAG_DP_PULLUP_S)
+#define USB_SERIAL_JTAG_DP_PULLUP_V  0x00000001
+#define USB_SERIAL_JTAG_DP_PULLUP_S  9
+/* USB_SERIAL_JTAG_DP_PULLDOWN : R/W; bitpos: [10]; default: 0;
+ * Control USB D+ pull
+ * down.
+ */
+#define USB_SERIAL_JTAG_DP_PULLDOWN    (BIT(10))
+#define USB_SERIAL_JTAG_DP_PULLDOWN_M  (USB_SERIAL_JTAG_DP_PULLDOWN_V << USB_SERIAL_JTAG_DP_PULLDOWN_S)
+#define USB_SERIAL_JTAG_DP_PULLDOWN_V  0x00000001
+#define USB_SERIAL_JTAG_DP_PULLDOWN_S  10
+/* USB_SERIAL_JTAG_DM_PULLUP : R/W; bitpos: [11]; default: 0;
+ * Control USB D- pull
+ * up.
+ */
+#define USB_SERIAL_JTAG_DM_PULLUP    (BIT(11))
+#define USB_SERIAL_JTAG_DM_PULLUP_M  (USB_SERIAL_JTAG_DM_PULLUP_V << USB_SERIAL_JTAG_DM_PULLUP_S)
+#define USB_SERIAL_JTAG_DM_PULLUP_V  0x00000001
+#define USB_SERIAL_JTAG_DM_PULLUP_S  11
+/* USB_SERIAL_JTAG_DM_PULLDOWN : R/W; bitpos: [12]; default: 0;
+ * Control USB D- pull
+ * down.
+ */
+#define USB_SERIAL_JTAG_DM_PULLDOWN    (BIT(12))
+#define USB_SERIAL_JTAG_DM_PULLDOWN_M  (USB_SERIAL_JTAG_DM_PULLDOWN_V << USB_SERIAL_JTAG_DM_PULLDOWN_S)
+#define USB_SERIAL_JTAG_DM_PULLDOWN_V  0x00000001
+#define USB_SERIAL_JTAG_DM_PULLDOWN_S  12
+/* USB_SERIAL_JTAG_PULLUP_VALUE : R/W; bitpos: [13]; default: 0;
+ * Control pull up
+ * value.
+ */
+#define USB_SERIAL_JTAG_PULLUP_VALUE    (BIT(13))
+#define USB_SERIAL_JTAG_PULLUP_VALUE_M  (USB_SERIAL_JTAG_PULLUP_VALUE_V << USB_SERIAL_JTAG_PULLUP_VALUE_S)
+#define USB_SERIAL_JTAG_PULLUP_VALUE_V  0x00000001
+#define USB_SERIAL_JTAG_PULLUP_VALUE_S  13
+/* USB_SERIAL_JTAG_USB_PAD_ENABLE : R/W; bitpos: [14]; default: 1;
+ * Enable USB pad
+ * function.
+ */
+#define USB_SERIAL_JTAG_USB_PAD_ENABLE    (BIT(14))
+#define USB_SERIAL_JTAG_USB_PAD_ENABLE_M  (USB_SERIAL_JTAG_USB_PAD_ENABLE_V << USB_SERIAL_JTAG_USB_PAD_ENABLE_S)
+#define USB_SERIAL_JTAG_USB_PAD_ENABLE_V  0x00000001
+#define USB_SERIAL_JTAG_USB_PAD_ENABLE_S  14
+
+/** USB_SERIAL_JTAG_TEST_REG register
+ *  USB_SERIAL_JTAG_TEST_REG.
+ */
+#define USB_SERIAL_JTAG_TEST_REG (SOC_DPORT_USB_BASE + 0x1c)
+/* USB_SERIAL_JTAG_TEST_ENABLE : R/W; bitpos: [0]; default: 0;
+ * Enable test of the USB
+ * pad
+ */
+#define USB_SERIAL_JTAG_TEST_ENABLE    (BIT(0))
+#define USB_SERIAL_JTAG_TEST_ENABLE_M  (USB_SERIAL_JTAG_TEST_ENABLE_V << USB_SERIAL_JTAG_TEST_ENABLE_S)
+#define USB_SERIAL_JTAG_TEST_ENABLE_V  0x00000001
+#define USB_SERIAL_JTAG_TEST_ENABLE_S  0
+/* USB_SERIAL_JTAG_TEST_USB_OE : R/W; bitpos: [1]; default: 0;
+ * USB pad oen in
+ * test
+ */
+#define USB_SERIAL_JTAG_TEST_USB_OE    (BIT(1))
+#define USB_SERIAL_JTAG_TEST_USB_OE_M  (USB_SERIAL_JTAG_TEST_USB_OE_V << USB_SERIAL_JTAG_TEST_USB_OE_S)
+#define USB_SERIAL_JTAG_TEST_USB_OE_V  0x00000001
+#define USB_SERIAL_JTAG_TEST_USB_OE_S  1
+/* USB_SERIAL_JTAG_TEST_TX_DP : R/W; bitpos: [2]; default: 0;
+ * USB D+ tx value in
+ * test
+ */
+#define USB_SERIAL_JTAG_TEST_TX_DP    (BIT(2))
+#define USB_SERIAL_JTAG_TEST_TX_DP_M  (USB_SERIAL_JTAG_TEST_TX_DP_V << USB_SERIAL_JTAG_TEST_TX_DP_S)
+#define USB_SERIAL_JTAG_TEST_TX_DP_V  0x00000001
+#define USB_SERIAL_JTAG_TEST_TX_DP_S  2
+/* USB_SERIAL_JTAG_TEST_TX_DM : R/W; bitpos: [3]; default: 0;
+ * USB D- tx value in
+ * test
+ */
+#define USB_SERIAL_JTAG_TEST_TX_DM    (BIT(3))
+#define USB_SERIAL_JTAG_TEST_TX_DM_M  (USB_SERIAL_JTAG_TEST_TX_DM_V << USB_SERIAL_JTAG_TEST_TX_DM_S)
+#define USB_SERIAL_JTAG_TEST_TX_DM_V  0x00000001
+#define USB_SERIAL_JTAG_TEST_TX_DM_S  3
+
+/** USB_SERIAL_JTAG_MISC_CONF_REG register
+ *  USB_SERIAL_JTAG_MISC_CONF_REG.
+ */
+#define USB_SERIAL_JTAG_MISC_CONF_REG (SOC_DPORT_USB_BASE + 0x44)
+/* USB_SERIAL_JTAG_CLK_EN : R/W; bitpos: [0]; default: 0;
+ * 1'h1: Force clock on for register. 1'h0: Support clock only when
+ * application writes
+ * registers.
+ */
+#define USB_SERIAL_JTAG_CLK_EN    (BIT(0))
+#define USB_SERIAL_JTAG_CLK_EN_M  (USB_SERIAL_JTAG_CLK_EN_V << USB_SERIAL_JTAG_CLK_EN_S)
+#define USB_SERIAL_JTAG_CLK_EN_V  0x00000001
+#define USB_SERIAL_JTAG_CLK_EN_S  0
+
+/** USB_SERIAL_JTAG_MEM_CONF_REG register
+ *  USB_SERIAL_JTAG_MEM_CONF_REG.
+ */
+#define USB_SERIAL_JTAG_MEM_CONF_REG (SOC_DPORT_USB_BASE + 0x48)
+/* USB_SERIAL_JTAG_USB_MEM_PD : R/W; bitpos: [0]; default: 0;
+ * 1: power down usb
+ * memory.
+ */
+#define USB_SERIAL_JTAG_USB_MEM_PD    (BIT(0))
+#define USB_SERIAL_JTAG_USB_MEM_PD_M  (USB_SERIAL_JTAG_USB_MEM_PD_V << USB_SERIAL_JTAG_USB_MEM_PD_S)
+#define USB_SERIAL_JTAG_USB_MEM_PD_V  0x00000001
+#define USB_SERIAL_JTAG_USB_MEM_PD_S  0
+/* USB_SERIAL_JTAG_USB_MEM_CLK_EN : R/W; bitpos: [1]; default: 1;
+ * 1: Force clock on for usb
+ * memory.
+ */
+#define USB_SERIAL_JTAG_USB_MEM_CLK_EN    (BIT(1))
+#define USB_SERIAL_JTAG_USB_MEM_CLK_EN_M  (USB_SERIAL_JTAG_USB_MEM_CLK_EN_V << USB_SERIAL_JTAG_USB_MEM_CLK_EN_S)
+#define USB_SERIAL_JTAG_USB_MEM_CLK_EN_V  0x00000001
+#define USB_SERIAL_JTAG_USB_MEM_CLK_EN_S  1
+
+
+/** Status Registers */
+
+/** USB_SERIAL_JTAG_EP1_CONF_REG register
+ *  USB_SERIAL_JTAG_EP1_CONF_REG.
+ */
+#define USB_SERIAL_JTAG_EP1_CONF_REG (SOC_DPORT_USB_BASE + 0x4)
+/* USB_SERIAL_JTAG_WR_DONE : WT; bitpos: [0]; default: 0;
+ * Set this bit to indicate writing byte data to UART Tx FIFO is done.
+ * This bit then stays 0 until data in UART Tx FIFO is read by the USB
+ * Host.
+ */
+#define USB_SERIAL_JTAG_WR_DONE    (BIT(0))
+#define USB_SERIAL_JTAG_WR_DONE_M  (USB_SERIAL_JTAG_WR_DONE_V << USB_SERIAL_JTAG_WR_DONE_S)
+#define USB_SERIAL_JTAG_WR_DONE_V  0x00000001
+#define USB_SERIAL_JTAG_WR_DONE_S  0
+/* USB_SERIAL_JTAG_SERIAL_IN_EP_DATA_FREE : RO; bitpos: [1]; default: 1;
+ * 1'b1: Indicate UART Tx FIFO is not full and data can be written into
+ * in. After writing USB_SERIAL_JTAG_WR_DONE, this will be 1’b0 until the
+ * data is sent to the USB
+ * Host.
+ */
+#define USB_SERIAL_JTAG_SERIAL_IN_EP_DATA_FREE    (BIT(1))
+#define USB_SERIAL_JTAG_SERIAL_IN_EP_DATA_FREE_M  (USB_SERIAL_JTAG_SERIAL_IN_EP_DATA_FREE_V << USB_SERIAL_JTAG_SERIAL_IN_EP_DATA_FREE_S)
+#define USB_SERIAL_JTAG_SERIAL_IN_EP_DATA_FREE_V  0x00000001
+#define USB_SERIAL_JTAG_SERIAL_IN_EP_DATA_FREE_S  1
+/* USB_SERIAL_JTAG_SERIAL_OUT_EP_DATA_AVAIL : RO; bitpos: [2]; default: 0;
+ * 1'b1: Indicate there is data in UART Rx
+ * FIFO.
+ */
+#define USB_SERIAL_JTAG_SERIAL_OUT_EP_DATA_AVAIL    (BIT(2))
+#define USB_SERIAL_JTAG_SERIAL_OUT_EP_DATA_AVAIL_M  (USB_SERIAL_JTAG_SERIAL_OUT_EP_DATA_AVAIL_V << USB_SERIAL_JTAG_SERIAL_OUT_EP_DATA_AVAIL_S)
+#define USB_SERIAL_JTAG_SERIAL_OUT_EP_DATA_AVAIL_V  0x00000001
+#define USB_SERIAL_JTAG_SERIAL_OUT_EP_DATA_AVAIL_S  2
+
+/** USB_SERIAL_JTAG_JFIFO_ST_REG register
+ *  USB_SERIAL_JTAG_JFIFO_ST_REG.
+ */
+#define USB_SERIAL_JTAG_JFIFO_ST_REG (SOC_DPORT_USB_BASE + 0x20)
+/* USB_SERIAL_JTAG_IN_FIFO_CNT : RO; bitpos: [2:0]; default: 0;
+ * JTAG in fifo
+ * counter.
+ */
+#define USB_SERIAL_JTAG_IN_FIFO_CNT    0x00000003
+#define USB_SERIAL_JTAG_IN_FIFO_CNT_M  (USB_SERIAL_JTAG_IN_FIFO_CNT_V << USB_SERIAL_JTAG_IN_FIFO_CNT_S)
+#define USB_SERIAL_JTAG_IN_FIFO_CNT_V  0x00000003
+#define USB_SERIAL_JTAG_IN_FIFO_CNT_S  0
+/* USB_SERIAL_JTAG_IN_FIFO_EMPTY : RO; bitpos: [2]; default: 1;
+ * 1: JTAG in fifo is
+ * empty.
+ */
+#define USB_SERIAL_JTAG_IN_FIFO_EMPTY    (BIT(2))
+#define USB_SERIAL_JTAG_IN_FIFO_EMPTY_M  (USB_SERIAL_JTAG_IN_FIFO_EMPTY_V << USB_SERIAL_JTAG_IN_FIFO_EMPTY_S)
+#define USB_SERIAL_JTAG_IN_FIFO_EMPTY_V  0x00000001
+#define USB_SERIAL_JTAG_IN_FIFO_EMPTY_S  2
+/* USB_SERIAL_JTAG_IN_FIFO_FULL : RO; bitpos: [3]; default: 0;
+ * 1: JTAG in fifo is
+ * full.
+ */
+#define USB_SERIAL_JTAG_IN_FIFO_FULL    (BIT(3))
+#define USB_SERIAL_JTAG_IN_FIFO_FULL_M  (USB_SERIAL_JTAG_IN_FIFO_FULL_V << USB_SERIAL_JTAG_IN_FIFO_FULL_S)
+#define USB_SERIAL_JTAG_IN_FIFO_FULL_V  0x00000001
+#define USB_SERIAL_JTAG_IN_FIFO_FULL_S  3
+/* USB_SERIAL_JTAG_OUT_FIFO_CNT : RO; bitpos: [6:4]; default: 0;
+ * JTAT out fifo
+ * counter.
+ */
+#define USB_SERIAL_JTAG_OUT_FIFO_CNT    0x00000003
+#define USB_SERIAL_JTAG_OUT_FIFO_CNT_M  (USB_SERIAL_JTAG_OUT_FIFO_CNT_V << USB_SERIAL_JTAG_OUT_FIFO_CNT_S)
+#define USB_SERIAL_JTAG_OUT_FIFO_CNT_V  0x00000003
+#define USB_SERIAL_JTAG_OUT_FIFO_CNT_S  4
+/* USB_SERIAL_JTAG_OUT_FIFO_EMPTY : RO; bitpos: [6]; default: 1;
+ * 1: JTAG out fifo is
+ * empty.
+ */
+#define USB_SERIAL_JTAG_OUT_FIFO_EMPTY    (BIT(6))
+#define USB_SERIAL_JTAG_OUT_FIFO_EMPTY_M  (USB_SERIAL_JTAG_OUT_FIFO_EMPTY_V << USB_SERIAL_JTAG_OUT_FIFO_EMPTY_S)
+#define USB_SERIAL_JTAG_OUT_FIFO_EMPTY_V  0x00000001
+#define USB_SERIAL_JTAG_OUT_FIFO_EMPTY_S  6
+/* USB_SERIAL_JTAG_OUT_FIFO_FULL : RO; bitpos: [7]; default: 0;
+ * 1: JTAG out fifo is
+ * full.
+ */
+#define USB_SERIAL_JTAG_OUT_FIFO_FULL    (BIT(7))
+#define USB_SERIAL_JTAG_OUT_FIFO_FULL_M  (USB_SERIAL_JTAG_OUT_FIFO_FULL_V << USB_SERIAL_JTAG_OUT_FIFO_FULL_S)
+#define USB_SERIAL_JTAG_OUT_FIFO_FULL_V  0x00000001
+#define USB_SERIAL_JTAG_OUT_FIFO_FULL_S  7
+/* USB_SERIAL_JTAG_IN_FIFO_RESET : R/W; bitpos: [8]; default: 0;
+ * Write 1 to reset JTAG in
+ * fifo.
+ */
+#define USB_SERIAL_JTAG_IN_FIFO_RESET    (BIT(8))
+#define USB_SERIAL_JTAG_IN_FIFO_RESET_M  (USB_SERIAL_JTAG_IN_FIFO_RESET_V << USB_SERIAL_JTAG_IN_FIFO_RESET_S)
+#define USB_SERIAL_JTAG_IN_FIFO_RESET_V  0x00000001
+#define USB_SERIAL_JTAG_IN_FIFO_RESET_S  8
+/* USB_SERIAL_JTAG_OUT_FIFO_RESET : R/W; bitpos: [9]; default: 0;
+ * Write 1 to reset JTAG out
+ * fifo.
+ */
+#define USB_SERIAL_JTAG_OUT_FIFO_RESET    (BIT(9))
+#define USB_SERIAL_JTAG_OUT_FIFO_RESET_M  (USB_SERIAL_JTAG_OUT_FIFO_RESET_V << USB_SERIAL_JTAG_OUT_FIFO_RESET_S)
+#define USB_SERIAL_JTAG_OUT_FIFO_RESET_V  0x00000001
+#define USB_SERIAL_JTAG_OUT_FIFO_RESET_S  9
+
+/** USB_SERIAL_JTAG_FRAM_NUM_REG register
+ *  USB_SERIAL_JTAG_FRAM_NUM_REG.
+ */
+#define USB_SERIAL_JTAG_FRAM_NUM_REG (SOC_DPORT_USB_BASE + 0x24)
+/* USB_SERIAL_JTAG_SOF_FRAME_INDEX : RO; bitpos: [11:0]; default: 0;
+ * Frame index of received SOF
+ * frame.
+ */
+#define USB_SERIAL_JTAG_SOF_FRAME_INDEX    0x000007FF
+#define USB_SERIAL_JTAG_SOF_FRAME_INDEX_M  (USB_SERIAL_JTAG_SOF_FRAME_INDEX_V << USB_SERIAL_JTAG_SOF_FRAME_INDEX_S)
+#define USB_SERIAL_JTAG_SOF_FRAME_INDEX_V  0x000007FF
+#define USB_SERIAL_JTAG_SOF_FRAME_INDEX_S  0
+
+/** USB_SERIAL_JTAG_IN_EP0_ST_REG register
+ *  USB_SERIAL_JTAG_IN_EP0_ST_REG.
+ */
+#define USB_SERIAL_JTAG_IN_EP0_ST_REG (SOC_DPORT_USB_BASE + 0x28)
+/* USB_SERIAL_JTAG_IN_EP0_STATE : RO; bitpos: [2:0]; default: 1;
+ * State of IN Endpoint
+ * 0.
+ */
+#define USB_SERIAL_JTAG_IN_EP0_STATE    0x00000003
+#define USB_SERIAL_JTAG_IN_EP0_STATE_M  (USB_SERIAL_JTAG_IN_EP0_STATE_V << USB_SERIAL_JTAG_IN_EP0_STATE_S)
+#define USB_SERIAL_JTAG_IN_EP0_STATE_V  0x00000003
+#define USB_SERIAL_JTAG_IN_EP0_STATE_S  0
+/* USB_SERIAL_JTAG_IN_EP0_WR_ADDR : RO; bitpos: [9:2]; default: 0;
+ * Write data address of IN endpoint
+ * 0.
+ */
+#define USB_SERIAL_JTAG_IN_EP0_WR_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_IN_EP0_WR_ADDR_M  (USB_SERIAL_JTAG_IN_EP0_WR_ADDR_V << USB_SERIAL_JTAG_IN_EP0_WR_ADDR_S)
+#define USB_SERIAL_JTAG_IN_EP0_WR_ADDR_V  0x0000007F
+#define USB_SERIAL_JTAG_IN_EP0_WR_ADDR_S  2
+/* USB_SERIAL_JTAG_IN_EP0_RD_ADDR : RO; bitpos: [16:9]; default: 0;
+ * Read data address of IN endpoint
+ * 0.
+ */
+#define USB_SERIAL_JTAG_IN_EP0_RD_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_IN_EP0_RD_ADDR_M  (USB_SERIAL_JTAG_IN_EP0_RD_ADDR_V << USB_SERIAL_JTAG_IN_EP0_RD_ADDR_S)
+#define USB_SERIAL_JTAG_IN_EP0_RD_ADDR_V  0x0000007F
+#define USB_SERIAL_JTAG_IN_EP0_RD_ADDR_S  9
+
+/** USB_SERIAL_JTAG_IN_EP1_ST_REG register
+ *  USB_SERIAL_JTAG_IN_EP1_ST_REG.
+ */
+#define USB_SERIAL_JTAG_IN_EP1_ST_REG (SOC_DPORT_USB_BASE + 0x2c)
+/* USB_SERIAL_JTAG_IN_EP1_STATE : RO; bitpos: [2:0]; default: 1;
+ * State of IN Endpoint
+ * 1.
+ */
+#define USB_SERIAL_JTAG_IN_EP1_STATE    0x00000003
+#define USB_SERIAL_JTAG_IN_EP1_STATE_M  (USB_SERIAL_JTAG_IN_EP1_STATE_V << USB_SERIAL_JTAG_IN_EP1_STATE_S)
+#define USB_SERIAL_JTAG_IN_EP1_STATE_V  0x00000003
+#define USB_SERIAL_JTAG_IN_EP1_STATE_S  0
+/* USB_SERIAL_JTAG_IN_EP1_WR_ADDR : RO; bitpos: [9:2]; default: 0;
+ * Write data address of IN endpoint
+ * 1.
+ */
+#define USB_SERIAL_JTAG_IN_EP1_WR_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_IN_EP1_WR_ADDR_M  (USB_SERIAL_JTAG_IN_EP1_WR_ADDR_V << USB_SERIAL_JTAG_IN_EP1_WR_ADDR_S)
+#define USB_SERIAL_JTAG_IN_EP1_WR_ADDR_V  0x0000007F
+#define USB_SERIAL_JTAG_IN_EP1_WR_ADDR_S  2
+/* USB_SERIAL_JTAG_IN_EP1_RD_ADDR : RO; bitpos: [16:9]; default: 0;
+ * Read data address of IN endpoint
+ * 1.
+ */
+#define USB_SERIAL_JTAG_IN_EP1_RD_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_IN_EP1_RD_ADDR_M  (USB_SERIAL_JTAG_IN_EP1_RD_ADDR_V << USB_SERIAL_JTAG_IN_EP1_RD_ADDR_S)
+#define USB_SERIAL_JTAG_IN_EP1_RD_ADDR_V  0x0000007F
+#define USB_SERIAL_JTAG_IN_EP1_RD_ADDR_S  9
+
+/** USB_SERIAL_JTAG_IN_EP2_ST_REG register
+ *  USB_SERIAL_JTAG_IN_EP2_ST_REG.
+ */
+#define USB_SERIAL_JTAG_IN_EP2_ST_REG (SOC_DPORT_USB_BASE + 0x30)
+/* USB_SERIAL_JTAG_IN_EP2_STATE : RO; bitpos: [2:0]; default: 1;
+ * State of IN Endpoint
+ * 2.
+ */
+#define USB_SERIAL_JTAG_IN_EP2_STATE    0x00000003
+#define USB_SERIAL_JTAG_IN_EP2_STATE_M  (USB_SERIAL_JTAG_IN_EP2_STATE_V << USB_SERIAL_JTAG_IN_EP2_STATE_S)
+#define USB_SERIAL_JTAG_IN_EP2_STATE_V  0x00000003
+#define USB_SERIAL_JTAG_IN_EP2_STATE_S  0
+/* USB_SERIAL_JTAG_IN_EP2_WR_ADDR : RO; bitpos: [9:2]; default: 0;
+ * Write data address of IN endpoint
+ * 2.
+ */
+#define USB_SERIAL_JTAG_IN_EP2_WR_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_IN_EP2_WR_ADDR_M  (USB_SERIAL_JTAG_IN_EP2_WR_ADDR_V << USB_SERIAL_JTAG_IN_EP2_WR_ADDR_S)
+#define USB_SERIAL_JTAG_IN_EP2_WR_ADDR_V  0x0000007F
+#define USB_SERIAL_JTAG_IN_EP2_WR_ADDR_S  2
+/* USB_SERIAL_JTAG_IN_EP2_RD_ADDR : RO; bitpos: [16:9]; default: 0;
+ * Read data address of IN endpoint
+ * 2.
+ */
+#define USB_SERIAL_JTAG_IN_EP2_RD_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_IN_EP2_RD_ADDR_M  (USB_SERIAL_JTAG_IN_EP2_RD_ADDR_V << USB_SERIAL_JTAG_IN_EP2_RD_ADDR_S)
+#define USB_SERIAL_JTAG_IN_EP2_RD_ADDR_V  0x0000007F
+#define USB_SERIAL_JTAG_IN_EP2_RD_ADDR_S  9
+
+/** USB_SERIAL_JTAG_IN_EP3_ST_REG register
+ *  USB_SERIAL_JTAG_IN_EP3_ST_REG.
+ */
+#define USB_SERIAL_JTAG_IN_EP3_ST_REG (SOC_DPORT_USB_BASE + 0x34)
+/* USB_SERIAL_JTAG_IN_EP3_STATE : RO; bitpos: [2:0]; default: 1;
+ * State of IN Endpoint
+ * 3.
+ */
+#define USB_SERIAL_JTAG_IN_EP3_STATE    0x00000003
+#define USB_SERIAL_JTAG_IN_EP3_STATE_M  (USB_SERIAL_JTAG_IN_EP3_STATE_V << USB_SERIAL_JTAG_IN_EP3_STATE_S)
+#define USB_SERIAL_JTAG_IN_EP3_STATE_V  0x00000003
+#define USB_SERIAL_JTAG_IN_EP3_STATE_S  0
+/* USB_SERIAL_JTAG_IN_EP3_WR_ADDR : RO; bitpos: [9:2]; default: 0;
+ * Write data address of IN endpoint
+ * 3.
+ */
+#define USB_SERIAL_JTAG_IN_EP3_WR_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_IN_EP3_WR_ADDR_M  (USB_SERIAL_JTAG_IN_EP3_WR_ADDR_V << USB_SERIAL_JTAG_IN_EP3_WR_ADDR_S)
+#define USB_SERIAL_JTAG_IN_EP3_WR_ADDR_V  0x0000007F
+#define USB_SERIAL_JTAG_IN_EP3_WR_ADDR_S  2
+/* USB_SERIAL_JTAG_IN_EP3_RD_ADDR : RO; bitpos: [16:9]; default: 0;
+ * Read data address of IN endpoint
+ * 3.
+ */
+#define USB_SERIAL_JTAG_IN_EP3_RD_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_IN_EP3_RD_ADDR_M  (USB_SERIAL_JTAG_IN_EP3_RD_ADDR_V << USB_SERIAL_JTAG_IN_EP3_RD_ADDR_S)
+#define USB_SERIAL_JTAG_IN_EP3_RD_ADDR_V  0x0000007F
+#define USB_SERIAL_JTAG_IN_EP3_RD_ADDR_S  9
+
+/** USB_SERIAL_JTAG_OUT_EP0_ST_REG register
+ *  USB_SERIAL_JTAG_OUT_EP0_ST_REG.
+ */
+#define USB_SERIAL_JTAG_OUT_EP0_ST_REG (SOC_DPORT_USB_BASE + 0x38)
+/* USB_SERIAL_JTAG_OUT_EP0_STATE : RO; bitpos: [2:0]; default: 0;
+ * State of OUT Endpoint
+ * 0.
+ */
+#define USB_SERIAL_JTAG_OUT_EP0_STATE    0x00000003
+#define USB_SERIAL_JTAG_OUT_EP0_STATE_M  (USB_SERIAL_JTAG_OUT_EP0_STATE_V << USB_SERIAL_JTAG_OUT_EP0_STATE_S)
+#define USB_SERIAL_JTAG_OUT_EP0_STATE_V  0x00000003
+#define USB_SERIAL_JTAG_OUT_EP0_STATE_S  0
+/* USB_SERIAL_JTAG_OUT_EP0_WR_ADDR : RO; bitpos: [9:2]; default: 0;
+ * Write data address of OUT endpoint 0. When
+ * USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT is detected.  there are
+ * USB_SERIAL_JTAG_OUT_EP0_WR_ADDR-2 bytes data in OUT
+ * EP0.
+ */
+#define USB_SERIAL_JTAG_OUT_EP0_WR_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP0_WR_ADDR_M  (USB_SERIAL_JTAG_OUT_EP0_WR_ADDR_V << USB_SERIAL_JTAG_OUT_EP0_WR_ADDR_S)
+#define USB_SERIAL_JTAG_OUT_EP0_WR_ADDR_V  0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP0_WR_ADDR_S  2
+/* USB_SERIAL_JTAG_OUT_EP0_RD_ADDR : RO; bitpos: [16:9]; default: 0;
+ * Read data address of OUT endpoint
+ * 0.
+ */
+#define USB_SERIAL_JTAG_OUT_EP0_RD_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP0_RD_ADDR_M  (USB_SERIAL_JTAG_OUT_EP0_RD_ADDR_V << USB_SERIAL_JTAG_OUT_EP0_RD_ADDR_S)
+#define USB_SERIAL_JTAG_OUT_EP0_RD_ADDR_V  0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP0_RD_ADDR_S  9
+
+/** USB_SERIAL_JTAG_OUT_EP1_ST_REG register
+ *  USB_SERIAL_JTAG_OUT_EP1_ST_REG.
+ */
+#define USB_SERIAL_JTAG_OUT_EP1_ST_REG (SOC_DPORT_USB_BASE + 0x3c)
+/* USB_SERIAL_JTAG_OUT_EP1_STATE : RO; bitpos: [2:0]; default: 0;
+ * State of OUT Endpoint
+ * 1.
+ */
+#define USB_SERIAL_JTAG_OUT_EP1_STATE    0x00000003
+#define USB_SERIAL_JTAG_OUT_EP1_STATE_M  (USB_SERIAL_JTAG_OUT_EP1_STATE_V << USB_SERIAL_JTAG_OUT_EP1_STATE_S)
+#define USB_SERIAL_JTAG_OUT_EP1_STATE_V  0x00000003
+#define USB_SERIAL_JTAG_OUT_EP1_STATE_S  0
+/* USB_SERIAL_JTAG_OUT_EP1_WR_ADDR : RO; bitpos: [9:2]; default: 0;
+ * Write data address of OUT endpoint 1. When
+ * USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT is detected.  there are
+ * USB_SERIAL_JTAG_OUT_EP1_WR_ADDR-2 bytes data in OUT
+ * EP1.
+ */
+#define USB_SERIAL_JTAG_OUT_EP1_WR_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP1_WR_ADDR_M  (USB_SERIAL_JTAG_OUT_EP1_WR_ADDR_V << USB_SERIAL_JTAG_OUT_EP1_WR_ADDR_S)
+#define USB_SERIAL_JTAG_OUT_EP1_WR_ADDR_V  0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP1_WR_ADDR_S  2
+/* USB_SERIAL_JTAG_OUT_EP1_RD_ADDR : RO; bitpos: [16:9]; default: 0;
+ * Read data address of OUT endpoint
+ * 1.
+ */
+#define USB_SERIAL_JTAG_OUT_EP1_RD_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP1_RD_ADDR_M  (USB_SERIAL_JTAG_OUT_EP1_RD_ADDR_V << USB_SERIAL_JTAG_OUT_EP1_RD_ADDR_S)
+#define USB_SERIAL_JTAG_OUT_EP1_RD_ADDR_V  0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP1_RD_ADDR_S  9
+/* USB_SERIAL_JTAG_OUT_EP1_REC_DATA_CNT : RO; bitpos: [23:16]; default: 0;
+ * Data count in OUT endpoint 1 when one packet is
+ * received.
+ */
+#define USB_SERIAL_JTAG_OUT_EP1_REC_DATA_CNT    0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP1_REC_DATA_CNT_M  (USB_SERIAL_JTAG_OUT_EP1_REC_DATA_CNT_V << USB_SERIAL_JTAG_OUT_EP1_REC_DATA_CNT_S)
+#define USB_SERIAL_JTAG_OUT_EP1_REC_DATA_CNT_V  0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP1_REC_DATA_CNT_S  16
+
+/** USB_SERIAL_JTAG_OUT_EP2_ST_REG register
+ *  USB_SERIAL_JTAG_OUT_EP2_ST_REG.
+ */
+#define USB_SERIAL_JTAG_OUT_EP2_ST_REG (SOC_DPORT_USB_BASE + 0x40)
+/* USB_SERIAL_JTAG_OUT_EP2_STATE : RO; bitpos: [2:0]; default: 0;
+ * State of OUT Endpoint
+ * 2.
+ */
+#define USB_SERIAL_JTAG_OUT_EP2_STATE    0x00000003
+#define USB_SERIAL_JTAG_OUT_EP2_STATE_M  (USB_SERIAL_JTAG_OUT_EP2_STATE_V << USB_SERIAL_JTAG_OUT_EP2_STATE_S)
+#define USB_SERIAL_JTAG_OUT_EP2_STATE_V  0x00000003
+#define USB_SERIAL_JTAG_OUT_EP2_STATE_S  0
+/* USB_SERIAL_JTAG_OUT_EP2_WR_ADDR : RO; bitpos: [9:2]; default: 0;
+ * Write data address of OUT endpoint 2. When
+ * USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT is detected.  there are
+ * USB_SERIAL_JTAG_OUT_EP2_WR_ADDR-2 bytes data in OUT
+ * EP2.
+ */
+#define USB_SERIAL_JTAG_OUT_EP2_WR_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP2_WR_ADDR_M  (USB_SERIAL_JTAG_OUT_EP2_WR_ADDR_V << USB_SERIAL_JTAG_OUT_EP2_WR_ADDR_S)
+#define USB_SERIAL_JTAG_OUT_EP2_WR_ADDR_V  0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP2_WR_ADDR_S  2
+/* USB_SERIAL_JTAG_OUT_EP2_RD_ADDR : RO; bitpos: [16:9]; default: 0;
+ * Read data address of OUT endpoint
+ * 2.
+ */
+#define USB_SERIAL_JTAG_OUT_EP2_RD_ADDR    0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP2_RD_ADDR_M  (USB_SERIAL_JTAG_OUT_EP2_RD_ADDR_V << USB_SERIAL_JTAG_OUT_EP2_RD_ADDR_S)
+#define USB_SERIAL_JTAG_OUT_EP2_RD_ADDR_V  0x0000007F
+#define USB_SERIAL_JTAG_OUT_EP2_RD_ADDR_S  9
+
+
+/** Interrupt Registers */
+
+/** USB_SERIAL_JTAG_INT_RAW_REG register
+ *  USB_SERIAL_JTAG_INT_RAW_REG.
+ */
+#define USB_SERIAL_JTAG_INT_RAW_REG (SOC_DPORT_USB_BASE + 0x8)
+/* USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_RAW : R/WTC/SS; bitpos: [0]; default: 0;
+ * The raw interrupt bit turns to high level when a flush command is
+ * received for IN endpoint 2 of
+ * JTAG.
+ */
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_RAW    (BIT(0))
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_RAW_M  (USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_RAW_V << USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_RAW_S)
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_RAW_V  0x00000001
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_RAW_S  0
+/* USB_SERIAL_JTAG_SOF_INT_RAW : R/WTC/SS; bitpos: [1]; default: 0;
+ * The raw interrupt bit turns to high level when a SOF frame is
+ * received.
+ */
+#define USB_SERIAL_JTAG_SOF_INT_RAW    (BIT(1))
+#define USB_SERIAL_JTAG_SOF_INT_RAW_M  (USB_SERIAL_JTAG_SOF_INT_RAW_V << USB_SERIAL_JTAG_SOF_INT_RAW_S)
+#define USB_SERIAL_JTAG_SOF_INT_RAW_V  0x00000001
+#define USB_SERIAL_JTAG_SOF_INT_RAW_S  1
+/* USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_RAW : R/WTC/SS; bitpos: [2]; default: 0;
+ * The raw interrupt bit turns to high level when the Serial Port OUT
+ * Endpoint received one
+ * packet.
+ */
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_RAW    (BIT(2))
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_RAW_M  (USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_RAW_V << USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_RAW_S)
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_RAW_V  0x00000001
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_RAW_S  2
+/* USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_RAW : R/WTC/SS; bitpos: [3]; default: 1;
+ * The raw interrupt bit turns to high level when the Serial Port IN
+ * Endpoint is
+ * empty.
+ */
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_RAW    (BIT(3))
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_RAW_M  (USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_RAW_V << USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_RAW_S)
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_RAW_V  0x00000001
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_RAW_S  3
+/* USB_SERIAL_JTAG_PID_ERR_INT_RAW : R/WTC/SS; bitpos: [4]; default: 0;
+ * The raw interrupt bit turns to high level when a PID error is
+ * detected.
+ */
+#define USB_SERIAL_JTAG_PID_ERR_INT_RAW    (BIT(4))
+#define USB_SERIAL_JTAG_PID_ERR_INT_RAW_M  (USB_SERIAL_JTAG_PID_ERR_INT_RAW_V << USB_SERIAL_JTAG_PID_ERR_INT_RAW_S)
+#define USB_SERIAL_JTAG_PID_ERR_INT_RAW_V  0x00000001
+#define USB_SERIAL_JTAG_PID_ERR_INT_RAW_S  4
+/* USB_SERIAL_JTAG_CRC5_ERR_INT_RAW : R/WTC/SS; bitpos: [5]; default: 0;
+ * The raw interrupt bit turns to high level when a CRC5 error is
+ * detected.
+ */
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_RAW    (BIT(5))
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_RAW_M  (USB_SERIAL_JTAG_CRC5_ERR_INT_RAW_V << USB_SERIAL_JTAG_CRC5_ERR_INT_RAW_S)
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_RAW_V  0x00000001
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_RAW_S  5
+/* USB_SERIAL_JTAG_CRC16_ERR_INT_RAW : R/WTC/SS; bitpos: [6]; default: 0;
+ * The raw interrupt bit turns to high level when a CRC16 error is
+ * detected.
+ */
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_RAW    (BIT(6))
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_RAW_M  (USB_SERIAL_JTAG_CRC16_ERR_INT_RAW_V << USB_SERIAL_JTAG_CRC16_ERR_INT_RAW_S)
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_RAW_V  0x00000001
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_RAW_S  6
+/* USB_SERIAL_JTAG_STUFF_ERR_INT_RAW : R/WTC/SS; bitpos: [7]; default: 0;
+ * The raw interrupt bit turns to high level when a bit stuffing error is
+ * detected.
+ */
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_RAW    (BIT(7))
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_RAW_M  (USB_SERIAL_JTAG_STUFF_ERR_INT_RAW_V << USB_SERIAL_JTAG_STUFF_ERR_INT_RAW_S)
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_RAW_V  0x00000001
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_RAW_S  7
+/* USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_RAW : R/WTC/SS; bitpos: [8]; default: 0;
+ * The raw interrupt bit turns to high level when an IN token for IN
+ * endpoint 1 is
+ * received.
+ */
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_RAW    (BIT(8))
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_RAW_M  (USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_RAW_V << USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_RAW_S)
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_RAW_V  0x00000001
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_RAW_S  8
+/* USB_SERIAL_JTAG_USB_BUS_RESET_INT_RAW : R/WTC/SS; bitpos: [9]; default: 0;
+ * The raw interrupt bit turns to high level when a USB bus reset is
+ * detected.
+ */
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_RAW    (BIT(9))
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_RAW_M  (USB_SERIAL_JTAG_USB_BUS_RESET_INT_RAW_V << USB_SERIAL_JTAG_USB_BUS_RESET_INT_RAW_S)
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_RAW_V  0x00000001
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_RAW_S  9
+/* USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_RAW : R/WTC/SS; bitpos: [10]; default: 0;
+ * The raw interrupt bit turns to high level when OUT endpoint 1 received
+ * packet with zero
+ * payload.
+ */
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_RAW    (BIT(10))
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_RAW_M  (USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_RAW_V << USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_RAW_S)
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_RAW_V  0x00000001
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_RAW_S  10
+/* USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_RAW : R/WTC/SS; bitpos: [11]; default: 0;
+ * The raw interrupt bit turns to high level when OUT endpoint 2 received
+ * packet with zero
+ * payload.
+ */
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_RAW    (BIT(11))
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_RAW_M  (USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_RAW_V << USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_RAW_S)
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_RAW_V  0x00000001
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_RAW_S  11
+
+/** USB_SERIAL_JTAG_INT_ST_REG register
+ *  USB_SERIAL_JTAG_INT_ST_REG.
+ */
+#define USB_SERIAL_JTAG_INT_ST_REG (SOC_DPORT_USB_BASE + 0xc)
+/* USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ST : RO; bitpos: [0]; default: 0;
+ * The raw interrupt status bit for the USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ST    (BIT(0))
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ST_M  (USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ST_V << USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ST_S)
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ST_V  0x00000001
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ST_S  0
+/* USB_SERIAL_JTAG_SOF_INT_ST : RO; bitpos: [1]; default: 0;
+ * The raw interrupt status bit for the USB_SERIAL_JTAG_SOF_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_SOF_INT_ST    (BIT(1))
+#define USB_SERIAL_JTAG_SOF_INT_ST_M  (USB_SERIAL_JTAG_SOF_INT_ST_V << USB_SERIAL_JTAG_SOF_INT_ST_S)
+#define USB_SERIAL_JTAG_SOF_INT_ST_V  0x00000001
+#define USB_SERIAL_JTAG_SOF_INT_ST_S  1
+/* USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ST : RO; bitpos: [2]; default: 0;
+ * The raw interrupt status bit for the
+ * USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ST    (BIT(2))
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ST_M  (USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ST_V << USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ST_S)
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ST_V  0x00000001
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ST_S  2
+/* USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ST : RO; bitpos: [3]; default: 0;
+ * The raw interrupt status bit for the
+ * USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ST    (BIT(3))
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ST_M  (USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ST_V << USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ST_S)
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ST_V  0x00000001
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ST_S  3
+/* USB_SERIAL_JTAG_PID_ERR_INT_ST : RO; bitpos: [4]; default: 0;
+ * The raw interrupt status bit for the USB_SERIAL_JTAG_PID_ERR_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_PID_ERR_INT_ST    (BIT(4))
+#define USB_SERIAL_JTAG_PID_ERR_INT_ST_M  (USB_SERIAL_JTAG_PID_ERR_INT_ST_V << USB_SERIAL_JTAG_PID_ERR_INT_ST_S)
+#define USB_SERIAL_JTAG_PID_ERR_INT_ST_V  0x00000001
+#define USB_SERIAL_JTAG_PID_ERR_INT_ST_S  4
+/* USB_SERIAL_JTAG_CRC5_ERR_INT_ST : RO; bitpos: [5]; default: 0;
+ * The raw interrupt status bit for the USB_SERIAL_JTAG_CRC5_ERR_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_ST    (BIT(5))
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_ST_M  (USB_SERIAL_JTAG_CRC5_ERR_INT_ST_V << USB_SERIAL_JTAG_CRC5_ERR_INT_ST_S)
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_ST_V  0x00000001
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_ST_S  5
+/* USB_SERIAL_JTAG_CRC16_ERR_INT_ST : RO; bitpos: [6]; default: 0;
+ * The raw interrupt status bit for the USB_SERIAL_JTAG_CRC16_ERR_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_ST    (BIT(6))
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_ST_M  (USB_SERIAL_JTAG_CRC16_ERR_INT_ST_V << USB_SERIAL_JTAG_CRC16_ERR_INT_ST_S)
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_ST_V  0x00000001
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_ST_S  6
+/* USB_SERIAL_JTAG_STUFF_ERR_INT_ST : RO; bitpos: [7]; default: 0;
+ * The raw interrupt status bit for the USB_SERIAL_JTAG_STUFF_ERR_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_ST    (BIT(7))
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_ST_M  (USB_SERIAL_JTAG_STUFF_ERR_INT_ST_V << USB_SERIAL_JTAG_STUFF_ERR_INT_ST_S)
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_ST_V  0x00000001
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_ST_S  7
+/* USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ST : RO; bitpos: [8]; default: 0;
+ * The raw interrupt status bit for the
+ * USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ST    (BIT(8))
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ST_M  (USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ST_V << USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ST_S)
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ST_V  0x00000001
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ST_S  8
+/* USB_SERIAL_JTAG_USB_BUS_RESET_INT_ST : RO; bitpos: [9]; default: 0;
+ * The raw interrupt status bit for the USB_SERIAL_JTAG_USB_BUS_RESET_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_ST    (BIT(9))
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_ST_M  (USB_SERIAL_JTAG_USB_BUS_RESET_INT_ST_V << USB_SERIAL_JTAG_USB_BUS_RESET_INT_ST_S)
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_ST_V  0x00000001
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_ST_S  9
+/* USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ST : RO; bitpos: [10]; default: 0;
+ * The raw interrupt status bit for the
+ * USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ST    (BIT(10))
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ST_M  (USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ST_V << USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ST_S)
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ST_V  0x00000001
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ST_S  10
+/* USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ST : RO; bitpos: [11]; default: 0;
+ * The raw interrupt status bit for the
+ * USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ST    (BIT(11))
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ST_M  (USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ST_V << USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ST_S)
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ST_V  0x00000001
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ST_S  11
+
+/** USB_SERIAL_JTAG_INT_ENA_REG register
+ *  USB_SERIAL_JTAG_INT_ENA_REG.
+ */
+#define USB_SERIAL_JTAG_INT_ENA_REG (SOC_DPORT_USB_BASE + 0x10)
+/* USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ENA : R/W; bitpos: [0]; default: 0;
+ * The interrupt enable bit for the USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ENA    (BIT(0))
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ENA_M  (USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ENA_V << USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ENA_S)
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ENA_V  0x00000001
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_ENA_S  0
+/* USB_SERIAL_JTAG_SOF_INT_ENA : R/W; bitpos: [1]; default: 0;
+ * The interrupt enable bit for the USB_SERIAL_JTAG_SOF_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_SOF_INT_ENA    (BIT(1))
+#define USB_SERIAL_JTAG_SOF_INT_ENA_M  (USB_SERIAL_JTAG_SOF_INT_ENA_V << USB_SERIAL_JTAG_SOF_INT_ENA_S)
+#define USB_SERIAL_JTAG_SOF_INT_ENA_V  0x00000001
+#define USB_SERIAL_JTAG_SOF_INT_ENA_S  1
+/* USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ENA : R/W; bitpos: [2]; default: 0;
+ * The interrupt enable bit for the
+ * USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ENA    (BIT(2))
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ENA_M  (USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ENA_V << USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ENA_S)
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ENA_V  0x00000001
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_ENA_S  2
+/* USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ENA : R/W; bitpos: [3]; default: 0;
+ * The interrupt enable bit for the USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ENA    (BIT(3))
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ENA_M  (USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ENA_V << USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ENA_S)
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ENA_V  0x00000001
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_ENA_S  3
+/* USB_SERIAL_JTAG_PID_ERR_INT_ENA : R/W; bitpos: [4]; default: 0;
+ * The interrupt enable bit for the USB_SERIAL_JTAG_PID_ERR_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_PID_ERR_INT_ENA    (BIT(4))
+#define USB_SERIAL_JTAG_PID_ERR_INT_ENA_M  (USB_SERIAL_JTAG_PID_ERR_INT_ENA_V << USB_SERIAL_JTAG_PID_ERR_INT_ENA_S)
+#define USB_SERIAL_JTAG_PID_ERR_INT_ENA_V  0x00000001
+#define USB_SERIAL_JTAG_PID_ERR_INT_ENA_S  4
+/* USB_SERIAL_JTAG_CRC5_ERR_INT_ENA : R/W; bitpos: [5]; default: 0;
+ * The interrupt enable bit for the USB_SERIAL_JTAG_CRC5_ERR_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_ENA    (BIT(5))
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_ENA_M  (USB_SERIAL_JTAG_CRC5_ERR_INT_ENA_V << USB_SERIAL_JTAG_CRC5_ERR_INT_ENA_S)
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_ENA_V  0x00000001
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_ENA_S  5
+/* USB_SERIAL_JTAG_CRC16_ERR_INT_ENA : R/W; bitpos: [6]; default: 0;
+ * The interrupt enable bit for the USB_SERIAL_JTAG_CRC16_ERR_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_ENA    (BIT(6))
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_ENA_M  (USB_SERIAL_JTAG_CRC16_ERR_INT_ENA_V << USB_SERIAL_JTAG_CRC16_ERR_INT_ENA_S)
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_ENA_V  0x00000001
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_ENA_S  6
+/* USB_SERIAL_JTAG_STUFF_ERR_INT_ENA : R/W; bitpos: [7]; default: 0;
+ * The interrupt enable bit for the USB_SERIAL_JTAG_STUFF_ERR_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_ENA    (BIT(7))
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_ENA_M  (USB_SERIAL_JTAG_STUFF_ERR_INT_ENA_V << USB_SERIAL_JTAG_STUFF_ERR_INT_ENA_S)
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_ENA_V  0x00000001
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_ENA_S  7
+/* USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ENA : R/W; bitpos: [8]; default: 0;
+ * The interrupt enable bit for the
+ * USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ENA    (BIT(8))
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ENA_M  (USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ENA_V << USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ENA_S)
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ENA_V  0x00000001
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_ENA_S  8
+/* USB_SERIAL_JTAG_USB_BUS_RESET_INT_ENA : R/W; bitpos: [9]; default: 0;
+ * The interrupt enable bit for the USB_SERIAL_JTAG_USB_BUS_RESET_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_ENA    (BIT(9))
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_ENA_M  (USB_SERIAL_JTAG_USB_BUS_RESET_INT_ENA_V << USB_SERIAL_JTAG_USB_BUS_RESET_INT_ENA_S)
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_ENA_V  0x00000001
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_ENA_S  9
+/* USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ENA : R/W; bitpos: [10]; default: 0;
+ * The interrupt enable bit for the
+ * USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ENA    (BIT(10))
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ENA_M  (USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ENA_V << USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ENA_S)
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ENA_V  0x00000001
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_ENA_S  10
+/* USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ENA : R/W; bitpos: [11]; default: 0;
+ * The interrupt enable bit for the
+ * USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ENA    (BIT(11))
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ENA_M  (USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ENA_V << USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ENA_S)
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ENA_V  0x00000001
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_ENA_S  11
+
+/** USB_SERIAL_JTAG_INT_CLR_REG register
+ *  USB_SERIAL_JTAG_INT_CLR_REG.
+ */
+#define USB_SERIAL_JTAG_INT_CLR_REG (SOC_DPORT_USB_BASE + 0x14)
+/* USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_CLR : WT; bitpos: [0]; default: 0;
+ * Set this bit to clear the USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_CLR    (BIT(0))
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_CLR_M  (USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_CLR_V << USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_CLR_S)
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_CLR_V  0x00000001
+#define USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT_CLR_S  0
+/* USB_SERIAL_JTAG_SOF_INT_CLR : WT; bitpos: [1]; default: 0;
+ * Set this bit to clear the USB_SERIAL_JTAG_JTAG_SOF_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_SOF_INT_CLR    (BIT(1))
+#define USB_SERIAL_JTAG_SOF_INT_CLR_M  (USB_SERIAL_JTAG_SOF_INT_CLR_V << USB_SERIAL_JTAG_SOF_INT_CLR_S)
+#define USB_SERIAL_JTAG_SOF_INT_CLR_V  0x00000001
+#define USB_SERIAL_JTAG_SOF_INT_CLR_S  1
+/* USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_CLR : WT; bitpos: [2]; default: 0;
+ * Set this bit to clear the USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_CLR    (BIT(2))
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_CLR_M  (USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_CLR_V << USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_CLR_S)
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_CLR_V  0x00000001
+#define USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT_CLR_S  2
+/* USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_CLR : WT; bitpos: [3]; default: 0;
+ * Set this bit to clear the USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_CLR    (BIT(3))
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_CLR_M  (USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_CLR_V << USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_CLR_S)
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_CLR_V  0x00000001
+#define USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT_CLR_S  3
+/* USB_SERIAL_JTAG_PID_ERR_INT_CLR : WT; bitpos: [4]; default: 0;
+ * Set this bit to clear the USB_SERIAL_JTAG_PID_ERR_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_PID_ERR_INT_CLR    (BIT(4))
+#define USB_SERIAL_JTAG_PID_ERR_INT_CLR_M  (USB_SERIAL_JTAG_PID_ERR_INT_CLR_V << USB_SERIAL_JTAG_PID_ERR_INT_CLR_S)
+#define USB_SERIAL_JTAG_PID_ERR_INT_CLR_V  0x00000001
+#define USB_SERIAL_JTAG_PID_ERR_INT_CLR_S  4
+/* USB_SERIAL_JTAG_CRC5_ERR_INT_CLR : WT; bitpos: [5]; default: 0;
+ * Set this bit to clear the USB_SERIAL_JTAG_CRC5_ERR_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_CLR    (BIT(5))
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_CLR_M  (USB_SERIAL_JTAG_CRC5_ERR_INT_CLR_V << USB_SERIAL_JTAG_CRC5_ERR_INT_CLR_S)
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_CLR_V  0x00000001
+#define USB_SERIAL_JTAG_CRC5_ERR_INT_CLR_S  5
+/* USB_SERIAL_JTAG_CRC16_ERR_INT_CLR : WT; bitpos: [6]; default: 0;
+ * Set this bit to clear the USB_SERIAL_JTAG_CRC16_ERR_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_CLR    (BIT(6))
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_CLR_M  (USB_SERIAL_JTAG_CRC16_ERR_INT_CLR_V << USB_SERIAL_JTAG_CRC16_ERR_INT_CLR_S)
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_CLR_V  0x00000001
+#define USB_SERIAL_JTAG_CRC16_ERR_INT_CLR_S  6
+/* USB_SERIAL_JTAG_STUFF_ERR_INT_CLR : WT; bitpos: [7]; default: 0;
+ * Set this bit to clear the USB_SERIAL_JTAG_STUFF_ERR_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_CLR    (BIT(7))
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_CLR_M  (USB_SERIAL_JTAG_STUFF_ERR_INT_CLR_V << USB_SERIAL_JTAG_STUFF_ERR_INT_CLR_S)
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_CLR_V  0x00000001
+#define USB_SERIAL_JTAG_STUFF_ERR_INT_CLR_S  7
+/* USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_CLR : WT; bitpos: [8]; default: 0;
+ * Set this bit to clear the USB_SERIAL_JTAG_IN_TOKEN_IN_EP1_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_CLR    (BIT(8))
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_CLR_M  (USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_CLR_V << USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_CLR_S)
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_CLR_V  0x00000001
+#define USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT_CLR_S  8
+/* USB_SERIAL_JTAG_USB_BUS_RESET_INT_CLR : WT; bitpos: [9]; default: 0;
+ * Set this bit to clear the USB_SERIAL_JTAG_USB_BUS_RESET_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_CLR    (BIT(9))
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_CLR_M  (USB_SERIAL_JTAG_USB_BUS_RESET_INT_CLR_V << USB_SERIAL_JTAG_USB_BUS_RESET_INT_CLR_S)
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_CLR_V  0x00000001
+#define USB_SERIAL_JTAG_USB_BUS_RESET_INT_CLR_S  9
+/* USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_CLR : WT; bitpos: [10]; default: 0;
+ * Set this bit to clear the USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_CLR    (BIT(10))
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_CLR_M  (USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_CLR_V << USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_CLR_S)
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_CLR_V  0x00000001
+#define USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT_CLR_S  10
+/* USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_CLR : WT; bitpos: [11]; default: 0;
+ * Set this bit to clear the USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT
+ * interrupt.
+ */
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_CLR    (BIT(11))
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_CLR_M  (USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_CLR_V << USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_CLR_S)
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_CLR_V  0x00000001
+#define USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT_CLR_S  11
+
+
+/** Version Registers */
+
+/** USB_SERIAL_JTAG_DATE_REG register
+ *  USB_SERIAL_JTAG_DATE_REG.
+ */
+#define USB_SERIAL_JTAG_DATE_REG (SOC_DPORT_USB_BASE + 0x80)
+/* USB_SERIAL_JTAG_DATE : R/W; bitpos: [32:0]; default: 33583872;
+ * register
+ * version.
+ */
+#define USB_SERIAL_JTAG_DATE    0xFFFFFFFF
+#define USB_SERIAL_JTAG_DATE_M  (USB_SERIAL_JTAG_DATE_V << USB_SERIAL_JTAG_DATE_S)
+#define USB_SERIAL_JTAG_DATE_V  0xFFFFFFFF
+#define USB_SERIAL_JTAG_DATE_S  0
+
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/usb_serial_jtag_struct.h b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/usb_serial_jtag_struct.h
new file mode 100644
index 00000000..72c1005d
--- /dev/null
+++ b/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/usb_serial_jtag_struct.h
@@ -0,0 +1,263 @@
+// Copyright 2021 Espressif Systems (Shanghai) Co. Ltd.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _SOC_USB_SERIAL_JTAG_STRUCT_H_
+#define _SOC_USB_SERIAL_JTAG_STRUCT_H_
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+#include "soc.h"
+
+typedef volatile struct {
+    union {
+        struct {
+            uint32_t rdwr_byte                     :    8;  /*Write and read byte data to/from UART Tx/Rx FIFO through this field. When USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT is set  then user can write data (up to 64 bytes) into UART Tx FIFO. When USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT is set, user can check USB_SERIAL_JTAG_OUT_EP1_WR_ADDR and USB_SERIAL_JTAG_OUT_EP0_RD_ADDR to know how many data is received, then read that amount of data from UART Rx FIFO. */
+            uint32_t reserved8                     :    24;  /*reserved*/
+        };
+        uint32_t val;
+    } ep1;
+    union {
+        struct {
+            uint32_t wr_done                       :    1;  /*Set this bit to indicate writing byte data to UART Tx FIFO is done.  This bit then stays 0 until data in UART Tx FIFO is read by the USB Host.*/
+            uint32_t serial_in_ep_data_free        :    1;  /*1'b1: Indicate UART Tx FIFO is not full and data can be written into in. After writing USB_SERIAL_JTAG_WR_DONE, this will be 1’b0 until the data is sent to the USB Host.*/
+            uint32_t serial_out_ep_data_avail      :    1;  /*1'b1: Indicate there is data in UART Rx FIFO.*/
+            uint32_t reserved3                     :    29;  /*reserved*/
+        };
+        uint32_t val;
+    } ep1_conf;
+    union {
+        struct {
+            uint32_t jtag_in_flush_int_raw         :    1;  /*The raw interrupt bit turns to high level when a flush command is received for IN endpoint 2 of JTAG.*/
+            uint32_t sof_int_raw                   :    1;  /*The raw interrupt bit turns to high level when a SOF frame is received.*/
+            uint32_t serial_out_recv_pkt_int_raw   :    1;  /*The raw interrupt bit turns to high level when the Serial Port OUT Endpoint received one packet.*/
+            uint32_t serial_in_empty_int_raw       :    1;  /*The raw interrupt bit turns to high level when the Serial Port IN Endpoint is empty.*/
+            uint32_t pid_err_int_raw               :    1;  /*The raw interrupt bit turns to high level when a PID error is detected.*/
+            uint32_t crc5_err_int_raw              :    1;  /*The raw interrupt bit turns to high level when a CRC5 error is detected.*/
+            uint32_t crc16_err_int_raw             :    1;  /*The raw interrupt bit turns to high level when a CRC16 error is detected.*/
+            uint32_t stuff_err_int_raw             :    1;  /*The raw interrupt bit turns to high level when a bit stuffing error is detected.*/
+            uint32_t in_token_rec_in_ep1_int_raw   :    1;  /*The raw interrupt bit turns to high level when an IN token for IN endpoint 1 is received.*/
+            uint32_t usb_bus_reset_int_raw         :    1;  /*The raw interrupt bit turns to high level when a USB bus reset is detected.*/
+            uint32_t out_ep1_zero_payload_int_raw  :    1;  /*The raw interrupt bit turns to high level when OUT endpoint 1 received packet with zero payload.*/
+            uint32_t out_ep2_zero_payload_int_raw  :    1;  /*The raw interrupt bit turns to high level when OUT endpoint 2 received packet with zero payload.*/
+            uint32_t reserved12                    :    20;  /*reserved*/
+        };
+        uint32_t val;
+    } int_raw;
+    union {
+        struct {
+            uint32_t jtag_in_flush_int_st          :    1;  /*The raw interrupt status bit for the USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT interrupt.*/
+            uint32_t sof_int_st                    :    1;  /*The raw interrupt status bit for the USB_SERIAL_JTAG_SOF_INT interrupt.*/
+            uint32_t serial_out_recv_pkt_int_st    :    1;  /*The raw interrupt status bit for the USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT interrupt.*/
+            uint32_t serial_in_empty_int_st        :    1;  /*The raw interrupt status bit for the USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT interrupt.*/
+            uint32_t pid_err_int_st                :    1;  /*The raw interrupt status bit for the USB_SERIAL_JTAG_PID_ERR_INT interrupt.*/
+            uint32_t crc5_err_int_st               :    1;  /*The raw interrupt status bit for the USB_SERIAL_JTAG_CRC5_ERR_INT interrupt.*/
+            uint32_t crc16_err_int_st              :    1;  /*The raw interrupt status bit for the USB_SERIAL_JTAG_CRC16_ERR_INT interrupt.*/
+            uint32_t stuff_err_int_st              :    1;  /*The raw interrupt status bit for the USB_SERIAL_JTAG_STUFF_ERR_INT interrupt.*/
+            uint32_t in_token_rec_in_ep1_int_st    :    1;  /*The raw interrupt status bit for the USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT interrupt.*/
+            uint32_t usb_bus_reset_int_st          :    1;  /*The raw interrupt status bit for the USB_SERIAL_JTAG_USB_BUS_RESET_INT interrupt.*/
+            uint32_t out_ep1_zero_payload_int_st   :    1;  /*The raw interrupt status bit for the USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT interrupt.*/
+            uint32_t out_ep2_zero_payload_int_st   :    1;  /*The raw interrupt status bit for the USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT interrupt.*/
+            uint32_t reserved12                    :    20;  /*reserved*/
+        };
+        uint32_t val;
+    } int_st;
+    union {
+        struct {
+            uint32_t jtag_in_flush_int_ena         :    1;  /*The interrupt enable bit for the USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT interrupt.*/
+            uint32_t sof_int_ena                   :    1;  /*The interrupt enable bit for the USB_SERIAL_JTAG_SOF_INT interrupt.*/
+            uint32_t serial_out_recv_pkt_int_ena   :    1;  /*The interrupt enable bit for the USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT interrupt.*/
+            uint32_t serial_in_empty_int_ena       :    1;  /*The interrupt enable bit for the USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT interrupt.*/
+            uint32_t pid_err_int_ena               :    1;  /*The interrupt enable bit for the USB_SERIAL_JTAG_PID_ERR_INT interrupt.*/
+            uint32_t crc5_err_int_ena              :    1;  /*The interrupt enable bit for the USB_SERIAL_JTAG_CRC5_ERR_INT interrupt.*/
+            uint32_t crc16_err_int_ena             :    1;  /*The interrupt enable bit for the USB_SERIAL_JTAG_CRC16_ERR_INT interrupt.*/
+            uint32_t stuff_err_int_ena             :    1;  /*The interrupt enable bit for the USB_SERIAL_JTAG_STUFF_ERR_INT interrupt.*/
+            uint32_t in_token_rec_in_ep1_int_ena   :    1;  /*The interrupt enable bit for the USB_SERIAL_JTAG_IN_TOKEN_REC_IN_EP1_INT interrupt.*/
+            uint32_t usb_bus_reset_int_ena         :    1;  /*The interrupt enable bit for the USB_SERIAL_JTAG_USB_BUS_RESET_INT interrupt.*/
+            uint32_t out_ep1_zero_payload_int_ena  :    1;  /*The interrupt enable bit for the USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT interrupt.*/
+            uint32_t out_ep2_zero_payload_int_ena  :    1;  /*The interrupt enable bit for the USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT interrupt.*/
+            uint32_t reserved12                    :    20;  /*reserved*/
+        };
+        uint32_t val;
+    } int_ena;
+    union {
+        struct {
+            uint32_t jtag_in_flush_int_clr         :    1;  /*Set this bit to clear the USB_SERIAL_JTAG_JTAG_IN_FLUSH_INT interrupt.*/
+            uint32_t sof_int_clr                   :    1;  /*Set this bit to clear the USB_SERIAL_JTAG_JTAG_SOF_INT interrupt.*/
+            uint32_t serial_out_recv_pkt_int_clr   :    1;  /*Set this bit to clear the USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT interrupt.*/
+            uint32_t serial_in_empty_int_clr       :    1;  /*Set this bit to clear the USB_SERIAL_JTAG_SERIAL_IN_EMPTY_INT interrupt.*/
+            uint32_t pid_err_int_clr               :    1;  /*Set this bit to clear the USB_SERIAL_JTAG_PID_ERR_INT interrupt.*/
+            uint32_t crc5_err_int_clr              :    1;  /*Set this bit to clear the USB_SERIAL_JTAG_CRC5_ERR_INT interrupt.*/
+            uint32_t crc16_err_int_clr             :    1;  /*Set this bit to clear the USB_SERIAL_JTAG_CRC16_ERR_INT interrupt.*/
+            uint32_t stuff_err_int_clr             :    1;  /*Set this bit to clear the USB_SERIAL_JTAG_STUFF_ERR_INT interrupt.*/
+            uint32_t in_token_rec_in_ep1_int_clr   :    1;  /*Set this bit to clear the USB_SERIAL_JTAG_IN_TOKEN_IN_EP1_INT interrupt.*/
+            uint32_t usb_bus_reset_int_clr         :    1;  /*Set this bit to clear the USB_SERIAL_JTAG_USB_BUS_RESET_INT interrupt.*/
+            uint32_t out_ep1_zero_payload_int_clr  :    1;  /*Set this bit to clear the USB_SERIAL_JTAG_OUT_EP1_ZERO_PAYLOAD_INT interrupt.*/
+            uint32_t out_ep2_zero_payload_int_clr  :    1;  /*Set this bit to clear the USB_SERIAL_JTAG_OUT_EP2_ZERO_PAYLOAD_INT interrupt.*/
+            uint32_t reserved12                    :    20;  /*reserved*/
+        };
+        uint32_t val;
+    } int_clr;
+    union {
+        struct {
+            uint32_t phy_sel                       :    1;  /*Select internal/external PHY. 1’b0: internal PHY, 1’b1: external PHY*/
+            uint32_t exchg_pins_override           :    1;  /*Enable software control USB D+ D- exchange*/
+            uint32_t exchg_pins                    :    1;  /*USB D+ D- exchange*/
+            uint32_t vrefh                         :    2;  /*Control single-end input high threshold. 1.76V to 2V, step 80mV */
+            uint32_t vrefl                         :    2;  /*Control single-end input low threshold. 0.8V to 1.04V, step 80mV*/
+            uint32_t vref_override                 :    1;  /*Enable software control input  threshold*/
+            uint32_t pad_pull_override             :    1;  /*Enable software control USB D+ D- pullup pulldown*/
+            uint32_t dp_pullup                     :    1;  /*Control USB D+ pull up.*/
+            uint32_t dp_pulldown                   :    1;  /*Control USB D+ pull down.*/
+            uint32_t dm_pullup                     :    1;  /*Control USB D- pull up.*/
+            uint32_t dm_pulldown                   :    1;  /*Control USB D- pull down.*/
+            uint32_t pullup_value                  :    1;  /*Control pull up value.*/
+            uint32_t usb_pad_enable                :    1;  /*Enable USB pad function.*/
+            uint32_t reserved15                    :    17;
+        };
+        uint32_t val;
+    } conf0;
+    union {
+        struct {
+            uint32_t test_enable                   :    1;  /*Enable test of the USB pad*/
+            uint32_t test_usb_oe                   :    1;  /*USB pad oen in test*/
+            uint32_t test_tx_dp                    :    1;  /*USB D+ tx value in test*/
+            uint32_t test_tx_dm                    :    1;  /*USB D- tx value in test*/
+            uint32_t reserved4                     :    28;
+        };
+        uint32_t val;
+    } test;
+    union {
+        struct {
+            uint32_t in_fifo_cnt                   :    2;  /*JTAG in fifo counter.*/
+            uint32_t in_fifo_empty                 :    1;  /*1: JTAG in fifo is empty.*/
+            uint32_t in_fifo_full                  :    1;  /*1: JTAG in fifo is full.*/
+            uint32_t out_fifo_cnt                  :    2;  /*JTAT out fifo counter.*/
+            uint32_t out_fifo_empty                :    1;  /*1: JTAG out fifo is empty.*/
+            uint32_t out_fifo_full                 :    1;  /*1: JTAG out fifo is full.*/
+            uint32_t in_fifo_reset                 :    1;  /*Write 1 to reset JTAG in fifo.*/
+            uint32_t out_fifo_reset                :    1;  /*Write 1 to reset JTAG out fifo.*/
+            uint32_t reserved10                    :    22;
+        };
+        uint32_t val;
+    } jfifo_st;
+    union {
+        struct {
+            uint32_t sof_frame_index               :    11;  /*Frame index of received SOF frame.*/
+            uint32_t reserved11                    :    21;
+        };
+        uint32_t val;
+    } fram_num;
+    union {
+        struct {
+            uint32_t in_ep0_state                  :    2;  /*State of IN Endpoint 0.*/
+            uint32_t in_ep0_wr_addr                :    7;  /*Write data address of IN endpoint 0.*/
+            uint32_t in_ep0_rd_addr                :    7;  /*Read data address of IN endpoint 0.*/
+            uint32_t reserved16                    :    16;  /*reserved*/
+        };
+        uint32_t val;
+    } in_ep0_st;
+    union {
+        struct {
+            uint32_t in_ep1_state                  :    2;  /*State of IN Endpoint 1.*/
+            uint32_t in_ep1_wr_addr                :    7;  /*Write data address of IN endpoint 1.*/
+            uint32_t in_ep1_rd_addr                :    7;  /*Read data address of IN endpoint 1.*/
+            uint32_t reserved16                    :    16;  /*reserved*/
+        };
+        uint32_t val;
+    } in_ep1_st;
+    union {
+        struct {
+            uint32_t in_ep2_state                  :    2;  /*State of IN Endpoint 2.*/
+            uint32_t in_ep2_wr_addr                :    7;  /*Write data address of IN endpoint 2.*/
+            uint32_t in_ep2_rd_addr                :    7;  /*Read data address of IN endpoint 2.*/
+            uint32_t reserved16                    :    16;  /*reserved*/
+        };
+        uint32_t val;
+    } in_ep2_st;
+    union {
+        struct {
+            uint32_t in_ep3_state                  :    2;  /*State of IN Endpoint 3.*/
+            uint32_t in_ep3_wr_addr                :    7;  /*Write data address of IN endpoint 3.*/
+            uint32_t in_ep3_rd_addr                :    7;  /*Read data address of IN endpoint 3.*/
+            uint32_t reserved16                    :    16;  /*reserved*/
+        };
+        uint32_t val;
+    } in_ep3_st;
+    union {
+        struct {
+            uint32_t out_ep0_state                 :    2;  /*State of OUT Endpoint 0.*/
+            uint32_t out_ep0_wr_addr               :    7;  /*Write data address of OUT endpoint 0. When USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT is detected.  there are USB_SERIAL_JTAG_OUT_EP0_WR_ADDR-2 bytes data in OUT EP0. */
+            uint32_t out_ep0_rd_addr               :    7;  /*Read data address of OUT endpoint 0.*/
+            uint32_t reserved16                    :    16;  /*reserved*/
+        };
+        uint32_t val;
+    } out_ep0_st;
+    union {
+        struct {
+            uint32_t out_ep1_state                 :    2;  /*State of OUT Endpoint 1.*/
+            uint32_t out_ep1_wr_addr               :    7;  /*Write data address of OUT endpoint 1. When USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT is detected.  there are USB_SERIAL_JTAG_OUT_EP1_WR_ADDR-2 bytes data in OUT EP1.*/
+            uint32_t out_ep1_rd_addr               :    7;  /*Read data address of OUT endpoint 1.*/
+            uint32_t out_ep1_rec_data_cnt          :    7;  /*Data count in OUT endpoint 1 when one packet is received.*/
+            uint32_t reserved23                    :    9;  /*reserved*/
+        };
+        uint32_t val;
+    } out_ep1_st;
+    union {
+        struct {
+            uint32_t out_ep2_state                 :    2;  /*State of OUT Endpoint 2.*/
+            uint32_t out_ep2_wr_addr               :    7;  /*Write data address of OUT endpoint 2. When USB_SERIAL_JTAG_SERIAL_OUT_RECV_PKT_INT is detected.  there are USB_SERIAL_JTAG_OUT_EP2_WR_ADDR-2 bytes data in OUT EP2.*/
+            uint32_t out_ep2_rd_addr               :    7;  /*Read data address of OUT endpoint 2.*/
+            uint32_t reserved16                    :    16;  /*reserved*/
+        };
+        uint32_t val;
+    } out_ep2_st;
+    union {
+        struct {
+            uint32_t clk_en                        :    1;  /*1'h1: Force clock on for register. 1'h0: Support clock only when application writes registers.*/
+            uint32_t reserved1                     :    31;
+        };
+        uint32_t val;
+    } misc_conf;
+    union {
+        struct {
+            uint32_t usb_mem_pd                    :    1;  /*1: power down usb memory.*/
+            uint32_t usb_mem_clk_en                :    1;  /*1: Force clock on for usb memory.*/
+            uint32_t reserved2                     :    30;
+        };
+        uint32_t val;
+    } mem_conf;
+    uint32_t reserved_4c;
+    uint32_t reserved_50;
+    uint32_t reserved_54;
+    uint32_t reserved_58;
+    uint32_t reserved_5c;
+    uint32_t reserved_60;
+    uint32_t reserved_64;
+    uint32_t reserved_68;
+    uint32_t reserved_6c;
+    uint32_t reserved_70;
+    uint32_t reserved_74;
+    uint32_t reserved_78;
+    uint32_t reserved_7c;
+    uint32_t date;
+} usb_serial_jtag_dev_t;
+extern usb_serial_jtag_dev_t USB_SERIAL_JTAG;
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif /*_SOC_USB_SERIAL_JTAG_STRUCT_H_ */
diff --git a/tools/sdk/esp32c3/include/soc/include/soc/gdma_periph.h b/tools/sdk/esp32c3/include/soc/include/soc/gdma_periph.h
index 2ccba244..4cc9cb17 100644
--- a/tools/sdk/esp32c3/include/soc/include/soc/gdma_periph.h
+++ b/tools/sdk/esp32c3/include/soc/include/soc/gdma_periph.h
@@ -25,7 +25,8 @@ typedef struct {
     struct {
         const periph_module_t module;
         struct {
-            const int irq_id;
+            const int rx_irq_id;
+            const int tx_irq_id;
         } pairs[SOC_GDMA_PAIRS_PER_GROUP];
     } groups[SOC_GDMA_GROUPS];
 } gdma_signal_conn_t;
diff --git a/tools/sdk/esp32c3/include/soc/include/soc/lcd_periph.h b/tools/sdk/esp32c3/include/soc/include/soc/lcd_periph.h
index fd56a06f..6b1071b3 100644
--- a/tools/sdk/esp32c3/include/soc/include/soc/lcd_periph.h
+++ b/tools/sdk/esp32c3/include/soc/include/soc/lcd_periph.h
@@ -25,7 +25,7 @@ typedef struct {
     struct {
         const periph_module_t module;
         const int irq_id;
-        const int data_sigs[SOC_LCD_MAX_DATA_WIDTH];
+        const int data_sigs[SOC_LCD_I80_BUS_WIDTH];
         const int cs_sig;
         const int dc_sig;
         const int wr_sig;
@@ -33,7 +33,7 @@ typedef struct {
     struct {
         const periph_module_t module;
         const int irq_id;
-        const int data_sigs[SOC_LCD_MAX_DATA_WIDTH];
+        const int data_sigs[SOC_LCD_RGB_DATA_WIDTH];
         const int hsync_sig;
         const int vsync_sig;
         const int pclk_sig;
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/systimer_caps.h b/tools/sdk/esp32c3/include/soc/include/soc/usb_periph.h
similarity index 57%
rename from tools/sdk/esp32c3/include/soc/esp32c3/include/soc/systimer_caps.h
rename to tools/sdk/esp32c3/include/soc/include/soc/usb_periph.h
index feda097f..af18350a 100644
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/systimer_caps.h
+++ b/tools/sdk/esp32c3/include/soc/include/soc/usb_periph.h
@@ -14,11 +14,24 @@
 
 #pragma once
 
-#define SOC_SYSTIMER_COUNTER_NUM (2)   // Number of counter units
-#define SOC_SYSTIMER_ALARM_NUM (3)     // Number of alarm units
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/soc_pins.h"
+#include "soc/gpio_sig_map.h"
+#include "soc/usb_reg.h"
+#include "soc/usb_types.h"
+#include "soc/usb_struct.h"
+#include "soc/usb_wrap_reg.h"
+#include "soc/usb_wrap_struct.h"
 
-#define SOC_SYSTIMER_BIT_WIDTH_LO (32) // Bit width of systimer low part
-#define SOC_SYSTIMER_BIT_WIDTH_HI (20) // Bit width of systimer high part
+/**
+ * @brief A pin descriptor for init
+ */
+typedef struct {
+    const int pin;
+    const int func;
+    const bool is_output;
+    const int ext_phy_only;
+} usb_iopin_dsc_t;
 
-#define SOC_SYSTIMER_FIXED_TICKS_US (16)  // If defined, number of ticks per microsecond is fixed
-#define SOC_SYSTIMER_INT_LEVEL      (1)   // Systimer peripheral uses level interrupt
+extern const usb_iopin_dsc_t usb_periph_iopins[];
diff --git a/tools/sdk/esp32c3/include/spi_flash/include/esp_partition.h b/tools/sdk/esp32c3/include/spi_flash/include/esp_partition.h
index 24c1d3df..e59babb4 100644
--- a/tools/sdk/esp32c3/include/spi_flash/include/esp_partition.h
+++ b/tools/sdk/esp32c3/include/spi_flash/include/esp_partition.h
@@ -45,6 +45,8 @@ extern "C" {
 typedef enum {
     ESP_PARTITION_TYPE_APP = 0x00,       //!< Application partition type
     ESP_PARTITION_TYPE_DATA = 0x01,      //!< Data partition type
+
+    ESP_PARTITION_TYPE_ANY = 0xff,       //!< Used to search for partitions with any type
 } esp_partition_type_t;
 
 /**
@@ -123,7 +125,9 @@ typedef struct {
 /**
  * @brief Find partition based on one or more parameters
  *
- * @param type Partition type, one of esp_partition_type_t values or an 8-bit unsigned integer
+ * @param type Partition type, one of esp_partition_type_t values or an 8-bit unsigned integer.
+ *             To find all partitions, no matter the type, use ESP_PARTITION_TYPE_ANY, and set
+ *             subtype argument to ESP_PARTITION_SUBTYPE_ANY.
  * @param subtype Partition subtype, one of esp_partition_subtype_t values or an 8-bit unsigned integer.
  *                To find all partitions of given type, use ESP_PARTITION_SUBTYPE_ANY.
  * @param label (optional) Partition label. Set this value if looking
@@ -139,7 +143,9 @@ esp_partition_iterator_t esp_partition_find(esp_partition_type_t type, esp_parti
 /**
  * @brief Find first partition based on one or more parameters
  *
- * @param type Partition type, one of esp_partition_type_t values or an 8-bit unsigned integer
+ * @param type Partition type, one of esp_partition_type_t values or an 8-bit unsigned integer.
+ *             To find all partitions, no matter the type, use ESP_PARTITION_TYPE_ANY, and set
+ *             subtype argument to ESP_PARTITION_SUBTYPE_ANY.
  * @param subtype Partition subtype, one of esp_partition_subtype_t values or an 8-bit unsigned integer
  *                To find all partitions of given type, use ESP_PARTITION_SUBTYPE_ANY.
  * @param label (optional) Partition label. Set this value if looking
diff --git a/tools/sdk/esp32c3/include/spi_flash/include/spi_flash/spi_flash_defs.h b/tools/sdk/esp32c3/include/spi_flash/include/spi_flash/spi_flash_defs.h
new file mode 100644
index 00000000..cf26fda1
--- /dev/null
+++ b/tools/sdk/esp32c3/include/spi_flash/include/spi_flash/spi_flash_defs.h
@@ -0,0 +1,70 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+/* SPI commands (actual on-wire commands not SPI controller bitmasks)
+   Suitable for use with spi_flash_hal_common_command static function.
+*/
+#define CMD_RDID       0x9F
+#define CMD_RDUID      0x4B   /* Read the flash unique ID*/
+#define CMD_WRSR       0x01
+#define  SR_WIP         (1<<0) /* Status register write-in-progress bit */
+#define  SR_WREN        (1<<1) /* Status register write enable bit */
+#define CMD_WRSR2      0x31 /* Not all SPI flash uses this command */
+#define CMD_WREN       0x06
+#define CMD_WRDI       0x04
+#define CMD_RDSR       0x05
+#define CMD_RDSR2      0x35 /* Not all SPI flash uses this command */
+#define CMD_RDSCUR     0x2B /* on specific(MXIC) board, read security register */
+#define CMD_RDFR       0x48 /* on specific(ISSI) board, read function register */
+
+#define CMD_FASTRD_QIO      0xEB
+#define CMD_FASTRD_QIO_4B   0xEC
+#define CMD_FASTRD_QUAD     0x6B
+#define CMD_FASTRD_QUAD_4B  0x6C
+#define CMD_FASTRD_DIO      0xBB
+#define CMD_FASTRD_DIO_4B   0xBC
+#define CMD_FASTRD_DUAL     0x3B
+#define CMD_FASTRD_DUAL_4B  0x3C
+#define CMD_FASTRD          0x0B
+#define CMD_FASTRD_4B       0x0C
+#define CMD_READ            0x03 /* Speed limited */
+#define CMD_READ_4B         0x13 /* Speed limited */
+
+#define CMD_CHIP_ERASE          0xC7
+#define CMD_SECTOR_ERASE        0x20
+#define CMD_SECTOR_ERASE_4B     0x21
+#define CMD_LARGE_BLOCK_ERASE   0xD8 /* 64KB block erase command */
+#define CMD_LARGE_BLOCK_ERASE_4B 0xDC /* 64KB block erase command */
+#define CMD_PROGRAM_PAGE        0x02
+#define CMD_PROGRAM_PAGE_4B     0x12
+#define CMD_SUSPEND             0x75
+#define CMD_RESUME              0x7A
+
+#define CMD_RST_EN      0x66
+#define CMD_RST_DEV     0x99
+
+#define SPI_FLASH_DIO_ADDR_BITLEN       24
+#define SPI_FLASH_DIO_DUMMY_BITLEN      4
+#define SPI_FLASH_QIO_ADDR_BITLEN       24
+#define SPI_FLASH_QIO_DUMMY_BITLEN      6
+#define SPI_FLASH_QOUT_ADDR_BITLEN      24
+#define SPI_FLASH_QOUT_DUMMY_BITLEN     8
+#define SPI_FLASH_DOUT_ADDR_BITLEN      24
+#define SPI_FLASH_DOUT_DUMMY_BITLEN     8
+#define SPI_FLASH_FASTRD_ADDR_BITLEN    24
+#define SPI_FLASH_FASTRD_DUMMY_BITLEN   8
+#define SPI_FLASH_SLOWRD_ADDR_BITLEN    24
+#define SPI_FLASH_SLOWRD_DUMMY_BITLEN   0
diff --git a/tools/sdk/esp32c3/include/unity/include/unity_config.h b/tools/sdk/esp32c3/include/unity/include/unity_config.h
index 8ebd88f2..32f97190 100644
--- a/tools/sdk/esp32c3/include/unity/include/unity_config.h
+++ b/tools/sdk/esp32c3/include/unity/include/unity_config.h
@@ -21,13 +21,16 @@
 #define UNITY_EXCLUDE_DOUBLE
 #endif //CONFIG_UNITY_ENABLE_DOUBLE
 
+#ifdef CONFIG_UNITY_ENABLE_64BIT
+#define UNITY_SUPPORT_64
+#endif
+
 #ifdef CONFIG_UNITY_ENABLE_COLOR
 #define UNITY_OUTPUT_COLOR
 #endif
 
 #define UNITY_EXCLUDE_TIME_H
 
-
 void unity_flush(void);
 void unity_putc(int c);
 void unity_gets(char* dst, size_t len);
diff --git a/tools/sdk/esp32c3/include/unity/include/unity_fixture_extras.h b/tools/sdk/esp32c3/include/unity/include/unity_fixture_extras.h
index 2eeaec2e..c6ad8ba4 100644
--- a/tools/sdk/esp32c3/include/unity/include/unity_fixture_extras.h
+++ b/tools/sdk/esp32c3/include/unity/include/unity_fixture_extras.h
@@ -1,25 +1,78 @@
-/* IDF-specific additions to "Unity Fixture" */
+// Copyright 2016-2021 Espressif Systems (Shanghai) Co. Ltd.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/* IDF-specific additions to "Unity Fixture".
+ * This file doesn't need to be included directly, it gets included into unity.h
+ * through unity_config.h.
+ */
+
 #pragma once
 
-#ifndef CONFIG_IDF_TARGET
+#include "sdkconfig.h"
 
-/* A shorthand for running one test group from the main function */
-#define UNITY_MAIN(group_) do { \
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(CONFIG_IDF_TARGET) || defined(CONFIG_IDF_TARGET_LINUX)
+#define UNITY_MAYBE_EXIT(rc)  do { exit(rc); } while(0)
+#else
+#define UNITY_MAYBE_EXIT(rc)  do { (void) rc; } while(0)
+#endif
+
+/* A shorthand for running all tests called from one function "func_", from the app_main function.
+ * Use this when there is more than one test group.
+ *
+ * Example:
+ *
+ *    #include "unity.h"
+ *    #include "unity_fixture.h"
+ *
+ *    static_void run_all_tests(void) {
+ *        RUN_TEST_GROUP(group1);   // test group defined in another file, e.g. test_group1.c
+ *        RUN_TEST_GROUP(group2);   // test group defined in another file, e.g. test_group2.c
+ *    }
+ *
+ *    void app_main(void) {
+ *        UNITY_MAIN_FUNC(run_all_tests);
+ *    }
+ */
+#define UNITY_MAIN_FUNC(func_) do { \
     const char* argv[] = { "test", "-v" }; \
     const int argc = sizeof(argv)/sizeof(argv[0]); \
-    int rc = UnityMain(argc, argv, TEST_ ## group_ ## _GROUP_RUNNER); \
+    int rc = UnityMain(argc, argv, func_); \
     printf("\nTests finished, rc=%d\n", rc); \
-    exit(rc); \
+    UNITY_MAYBE_EXIT(rc); \
 } while(0)
 
-#else // CONFIG_IDF_TARGET
+/* A shorthand for running one test group from the app_main function, when there is only
+ * one test group and it is defined in the same file.
+ *
+ * Example:
+ *
+ *    #include "unity.h"
+ *    #include "unity_fixture.h"
+ *
+ *    TEST_GROUP(my_feature);
+ *    // also define TEST_SETUP, TEST_TEARDOWN, TESTs, TEST_GROUP_RUNNER
+ *
+ *    void app_main(void) {
+ *        UNITY_MAIN(my_feature);
+ *    }
+ */
+#define UNITY_MAIN(group_) UNITY_MAIN_FUNC(TEST_ ## group_ ## _GROUP_RUNNER)
 
-/* A shorthand for running one test group from the main function */
-#define UNITY_MAIN(group_) do { \
-    const char* argv[] = { "test", "-v" }; \
-    const int argc = sizeof(argv)/sizeof(argv[0]); \
-    int rc = UnityMain(argc, argv, TEST_ ## group_ ## _GROUP_RUNNER); \
-    printf("\nTests finished, rc=%d\n", rc); \
-} while(0)
-
-#endif // CONFIG_IDF_TARGET
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/vfs/include/esp_vfs.h b/tools/sdk/esp32c3/include/vfs/include/esp_vfs.h
index ddbabd97..7ba63645 100644
--- a/tools/sdk/esp32c3/include/vfs/include/esp_vfs.h
+++ b/tools/sdk/esp32c3/include/vfs/include/esp_vfs.h
@@ -325,6 +325,15 @@ esp_err_t esp_vfs_register_with_id(const esp_vfs_t *vfs, void *ctx, esp_vfs_id_t
  */
 esp_err_t esp_vfs_unregister(const char* base_path);
 
+/**
+ * Unregister a virtual filesystem with the given index
+ *
+ * @param vfs_id  The VFS ID returned by esp_vfs_register_with_id
+ * @return ESP_OK if successful, ESP_ERR_INVALID_STATE if VFS for the given index
+ *         hasn't been registered
+ */
+esp_err_t esp_vfs_unregister_with_id(esp_vfs_id_t vfs_id);
+
 /**
  * Special function for registering another file descriptor for a VFS registered
  * by esp_vfs_register_with_id.
@@ -338,6 +347,21 @@ esp_err_t esp_vfs_unregister(const char* base_path);
  */
 esp_err_t esp_vfs_register_fd(esp_vfs_id_t vfs_id, int *fd);
 
+/**
+ * Special function for registering another file descriptor with given local_fd
+ * for a VFS registered by esp_vfs_register_with_id.
+ *
+ * @param vfs_id VFS identificator returned by esp_vfs_register_with_id.
+ * @param local_fd The fd in the local vfs. Passing -1 will set the local fd as the (*fd) value.
+ * @param permanent Whether the fd should be treated as permannet (not removed after close())
+ * @param fd The registered file descriptor will be written to this address.
+ *
+ * @return  ESP_OK if the registration is successful,
+ *          ESP_ERR_NO_MEM if too many file descriptors are registered,
+ *          ESP_ERR_INVALID_ARG if the arguments are incorrect.
+ */
+esp_err_t esp_vfs_register_fd_with_local_fd(esp_vfs_id_t vfs_id, int local_fd, bool permanent, int *fd);
+
 /**
  * Special function for unregistering a file descriptor belonging to a VFS
  * registered by esp_vfs_register_with_id.
diff --git a/tools/sdk/esp32c3/include/vfs/include/esp_vfs_eventfd.h b/tools/sdk/esp32c3/include/vfs/include/esp_vfs_eventfd.h
new file mode 100644
index 00000000..43011211
--- /dev/null
+++ b/tools/sdk/esp32c3/include/vfs/include/esp_vfs_eventfd.h
@@ -0,0 +1,71 @@
+// Copyright 2021 Espressif Systems (Shanghai) CO LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+
+#pragma once
+
+#include <stddef.h>
+#include <sys/types.h>
+
+#include "esp_err.h"
+
+#define EFD_SUPPORT_ISR (1 << 4)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Eventfd vfs initialization settings
+ */
+typedef struct {
+    size_t max_fds;     /*!< The maxinum number of eventfds supported */
+} esp_vfs_eventfd_config_t;
+
+#define ESP_VFS_EVENTD_CONFIG_DEFAULT() (esp_vfs_eventfd_config_t) { \
+      .max_fds = 5, \
+};
+
+/**
+ * @brief  Registers the event vfs.
+ *
+ * @return  ESP_OK if successful, ESP_ERR_NO_MEM if too many VFSes are
+ *          registered.
+ */
+esp_err_t esp_vfs_eventfd_register(const esp_vfs_eventfd_config_t *config);
+
+/**
+ * @brief  Unregisters the event vfs.
+ *
+ * @return ESP_OK if successful, ESP_ERR_INVALID_STATE if VFS for given prefix
+ *         hasn't been registered
+ */
+esp_err_t esp_vfs_eventfd_unregister(void);
+
+/*
+ * @brief Creates an event file descirptor.
+ *
+ * The behavior of read, write and select is the same as man(2) eventfd with
+ * EFD_SEMAPHORE **NOT** specified. A new flag EFD_SUPPORT_ISR has been added.
+ * This flag is required to write to event fds in interrupt handlers. Accessing
+ * the control blocks of event fds with EFD_SUPPORT_ISR will cause interrupts to
+ * be temporarily blocked (e.g. during read, write and beginning and ending of
+ * the * select).
+ *
+ * @return The file descriptor if successful, -1 if error happens.
+ */
+int eventfd(unsigned int initval, int flags);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/vfs/include/esp_vfs_usb_serial_jtag.h b/tools/sdk/esp32c3/include/vfs/include/esp_vfs_usb_serial_jtag.h
new file mode 100644
index 00000000..54ff1f4e
--- /dev/null
+++ b/tools/sdk/esp32c3/include/vfs/include/esp_vfs_usb_serial_jtag.h
@@ -0,0 +1,66 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_err.h"
+#include "esp_vfs.h"
+#include "esp_vfs_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief add /dev/usbserjtag virtual filesystem driver
+ *
+ * This function is called from startup code to enable console output
+ */
+esp_err_t esp_vfs_dev_usb_serial_jtag_register(void);
+
+/**
+ * @brief Set the line endings expected to be received
+ *
+ * This specifies the conversion between line endings received and
+ * newlines ('\n', LF) passed into stdin:
+ *
+ * - ESP_LINE_ENDINGS_CRLF: convert CRLF to LF
+ * - ESP_LINE_ENDINGS_CR: convert CR to LF
+ * - ESP_LINE_ENDINGS_LF: no modification
+ *
+ * @note this function is not thread safe w.r.t. reading
+ *
+ * @param mode line endings expected
+ */
+void esp_vfs_dev_usb_serial_jtag_set_rx_line_endings(esp_line_endings_t mode);
+
+/**
+ * @brief Set the line endings to sent
+ *
+ * This specifies the conversion between newlines ('\n', LF) on stdout and line
+ * endings sent:
+ *
+ * - ESP_LINE_ENDINGS_CRLF: convert LF to CRLF
+ * - ESP_LINE_ENDINGS_CR: convert LF to CR
+ * - ESP_LINE_ENDINGS_LF: no modification
+ *
+ * @note this function is not thread safe w.r.t. writing
+ *
+ * @param mode line endings to send
+ */
+void esp_vfs_dev_usb_serial_jtag_set_tx_line_endings(esp_line_endings_t mode);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32c3/include/wpa_supplicant/port/include/os.h b/tools/sdk/esp32c3/include/wpa_supplicant/port/include/os.h
index 66eea39d..74e1e349 100644
--- a/tools/sdk/esp32c3/include/wpa_supplicant/port/include/os.h
+++ b/tools/sdk/esp32c3/include/wpa_supplicant/port/include/os.h
@@ -19,6 +19,7 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include "esp_err.h"
+#include "supplicant_opt.h"
 
 typedef time_t os_time_t;
 
@@ -308,4 +309,27 @@ static inline void * os_realloc_array(void *ptr, size_t nmemb, size_t size)
 		return NULL;
 	return os_realloc(ptr, nmemb * size);
 }
+
+#ifdef USE_MBEDTLS_CRYPTO
+void forced_memzero(void *ptr, size_t len);
+#else
+/* Try to prevent most compilers from optimizing out clearing of memory that
+ * becomes unaccessible after this function is called. This is mostly the case
+ * for clearing local stack variables at the end of a function. This is not
+ * exactly perfect, i.e., someone could come up with a compiler that figures out
+ * the pointer is pointing to memset and then end up optimizing the call out, so
+ * try go a bit further by storing the first octet (now zero) to make this even
+ * a bit more difficult to optimize out. Once memset_s() is available, that
+ * could be used here instead. */
+static void * (* const volatile memset_func)(void *, int, size_t) = memset;
+static uint8_t forced_memzero_val;
+
+static inline void forced_memzero(void *ptr, size_t len)
+{
+	memset_func(ptr, 0, len);
+	if (len) {
+		forced_memzero_val = ((uint8_t *) ptr)[0];
+	}
+}
+#endif
 #endif /* OS_H */
diff --git a/tools/sdk/esp32c3/ld/esp32c3.ld b/tools/sdk/esp32c3/ld/esp32c3.ld
index 7f897a1c..63a26c42 100644
--- a/tools/sdk/esp32c3/ld/esp32c3.ld
+++ b/tools/sdk/esp32c3/ld/esp32c3.ld
@@ -107,3 +107,12 @@ REGION_ALIAS("rtc_data_location", rtc_iram_seg );
 #else
   REGION_ALIAS("default_rodata_seg", dram0_0_seg);
 #endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
+
+/**
+ *  If rodata default segment is placed in `drom0_0_seg`, then flash's first rodata section must
+ *  also be first in the segment.
+ */
+#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
+  ASSERT(_flash_rodata_dummy_start == ORIGIN(default_rodata_seg),
+         ".flash_rodata_dummy section must be placed at the beginning of the rodata segment.")
+#endif
diff --git a/tools/sdk/esp32c3/ld/esp32c3.peripherals.ld b/tools/sdk/esp32c3/ld/esp32c3.peripherals.ld
index 61164a12..49a57408 100644
--- a/tools/sdk/esp32c3/ld/esp32c3.peripherals.ld
+++ b/tools/sdk/esp32c3/ld/esp32c3.peripherals.ld
@@ -1,6 +1,5 @@
 PROVIDE ( UART0 = 0x60000000 );
 PROVIDE ( UART1 = 0x60010000 );
-PROVIDE ( UART2 = 0x6002e000 );
 PROVIDE ( SPIMEM1 = 0x60002000 );
 PROVIDE ( SPIMEM0 = 0x60003000 );
 PROVIDE ( GPIO = 0x60004000 );
@@ -20,10 +19,12 @@ PROVIDE ( SLC = 0x60018000 );
 PROVIDE ( LEDC = 0x60019000 );
 PROVIDE ( TIMERG0 = 0x6001F000 );
 PROVIDE ( TIMERG1 = 0x60020000 );
+PROVIDE ( SYSTIMER = 0x60023000 );
 PROVIDE ( GPSPI2  = 0x60024000 );
 PROVIDE ( GPSPI3  = 0x60025000 );
 PROVIDE ( SYSCON = 0x60026000 );
 PROVIDE ( TWAI   = 0x6002B000 );
 PROVIDE ( GPSPI4 = 0x60037000 );
 PROVIDE ( APB_SARADC = 0x60040000 );
+PROVIDE ( USB_SERIAL_JTAG = 0x60043000 );
 PROVIDE ( GDMA    = 0x6003F000 );
diff --git a/tools/sdk/esp32c3/ld/esp32c3.project.ld b/tools/sdk/esp32c3/ld/esp32c3.project.ld
index ea80b791..9741dafa 100644
--- a/tools/sdk/esp32c3/ld/esp32c3.project.ld
+++ b/tools/sdk/esp32c3/ld/esp32c3.project.ld
@@ -158,6 +158,7 @@ SECTIONS
     *libesp_ringbuf.a:(.literal .literal.* .text .text.*)
     *libesp_system.a:esp_err.*(.literal .literal.* .text .text.*)
     *libesp_system.a:esp_system.*(.literal.esp_system_abort .text.esp_system_abort)
+    *libesp_system.a:ubsan.*(.literal .literal.* .text .text.*)
     *libfreertos.a:(EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal.* EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text.*)
     *libfreertos.a:port.*(.text .text.prvTaskExitError .text.pxPortInitialiseStack .text.vApplicationStackOverflowHook .text.vPortCPUAcquireMutex .text.vPortCPUAcquireMutexTimeout .text.vPortCPUInitializeMutex .text.vPortCPUReleaseMutex .text.vPortClearInterruptMask .text.vPortEndScheduler .text.vPortEnterCritical .text.vPortExitCritical .text.vPortSetInterruptMask .text.vPortSetStackWatchpoint .text.vPortSetupTimer .text.vPortYield .text.vPortYieldFromISR .text.vPortYieldOtherCore .text.xPortGetTickRateHz .text.xPortInIsrContext .text.xPortStartScheduler)
     *libfreertos.a:port_common.*(.text .text.esp_startup_start_app_common)
@@ -168,6 +169,7 @@ SECTIONS
     *libhal.a:i2c_hal_iram.*(.literal .literal.* .text .text.*)
     *libhal.a:ledc_hal_iram.*(.literal .literal.* .text .text.*)
     *libhal.a:soc_hal.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*)
     *libhal.a:spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
     *libhal.a:spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
     *libhal.a:spi_hal_iram.*(.literal .literal.* .text .text.*)
@@ -244,12 +246,14 @@ SECTIONS
     _btdm_data_end = ABSOLUTE(.);
     *libesp_hw_support.a:rtc_clk.*(.rodata .rodata.*)
     *libesp_system.a:esp_err.*(.rodata .rodata.*)
+    *libesp_system.a:ubsan.*(.rodata .rodata.*)
     *libgcc.a:_divsf3.*(.rodata .rodata.*)
     *libgcov.a:(.rodata .rodata.*)
     *libhal.a:cpu_hal.*(.rodata .rodata.*)
     *libhal.a:i2c_hal_iram.*(.rodata .rodata.*)
     *libhal.a:ledc_hal_iram.*(.rodata .rodata.*)
     *libhal.a:soc_hal.*(.rodata .rodata.*)
+    *libhal.a:spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
     *libhal.a:spi_flash_hal_gpspi.*(.rodata .rodata.*)
     *libhal.a:spi_flash_hal_iram.*(.rodata .rodata.*)
     *libhal.a:spi_hal_iram.*(.rodata .rodata.*)
@@ -342,7 +346,7 @@ SECTIONS
     _instruction_reserved_start = ABSOLUTE(.);
     _text_start = ABSOLUTE(.);
 
-    *(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .text.*)
+    *(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .text.*)
     *(.wifi0iram .wifi0iram.*)
     *(.wifiorslpiram .wifiorslpiram.*)
     *(.wifirxiram .wifirxiram.*)
@@ -350,7 +354,7 @@ SECTIONS
     *(.wifislprxiram .wifislprxiram.*)
     *libesp_event.a:default_event_loop.*(.text .text.esp_event_handler_instance_register .text.esp_event_handler_instance_unregister .text.esp_event_handler_register .text.esp_event_handler_unregister .text.esp_event_loop_create_default .text.esp_event_loop_delete_default .text.esp_event_post .text.esp_event_send_to_default_loop)
     *libesp_event.a:esp_event.*(.text .text.base_node_add_handler .text.base_node_remove_all_handler .text.base_node_remove_handler .text.esp_event_dump .text.esp_event_handler_instance_register_with .text.esp_event_handler_instance_unregister_with .text.esp_event_handler_register_with .text.esp_event_handler_register_with_internal .text.esp_event_handler_unregister_with .text.esp_event_handler_unregister_with_internal .text.esp_event_loop_create .text.esp_event_loop_delete .text.esp_event_loop_run .text.esp_event_loop_run_task .text.esp_event_post_to .text.handler_execute .text.handler_instances_add .text.handler_instances_remove .text.handler_instances_remove_all .text.loop_node_add_handler .text.loop_node_remove_all_handler .text.loop_node_remove_handler)
-    *libesp_hw_support.a:rtc_init.*(.text .text.calibrate_ocode .text.rtc_init .text.rtc_vddsdio_get_config .text.set_ocode_by_efuse)
+    *libesp_hw_support.a:rtc_init.*(.text .text.calibrate_ocode .text.get_dig_dbias_by_efuse .text.get_rtc_dbias_by_efuse .text.rtc_init .text.rtc_vddsdio_get_config .text.set_ocode_by_efuse .text.set_rtc_dig_dbias)
     *libesp_system.a:esp_system.*(.text .text.esp_get_free_heap_size .text.esp_get_free_internal_heap_size .text.esp_get_idf_version .text.esp_get_minimum_free_heap_size .text.esp_register_shutdown_handler .text.esp_unregister_shutdown_handler)
     *libfreertos.a:port.*(.literal.esp_startup_start_app .text.esp_startup_start_app)
     *libfreertos.a:port_common.*(.literal.main_task .text.main_task)
@@ -388,6 +392,7 @@ SECTIONS
    */
   .flash_rodata_dummy (NOLOAD):
   {
+    _flash_rodata_dummy_start = .;
     /* Start at the same alignement constraint than .flash.text */
     . = ALIGN(ALIGNOF(.flash.text));
     /* Create an empty gap as big as .flash.text section */
@@ -398,15 +403,24 @@ SECTIONS
     _rodata_reserved_start = .;
   } > default_rodata_seg
 
-  /* When modifying the alignment, don't forget to update tls_section_alignment in pxPortInitialiseStack */
-  .flash.rodata : ALIGN(0x10)
+  .flash.appdesc : ALIGN(0x10)
   {
     _rodata_start = ABSOLUTE(.);
 
     *(.rodata_desc .rodata_desc.*)               /* Should be the first.  App version info.        DO NOT PUT ANYTHING BEFORE IT! */
     *(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
 
-    *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata.*)
+    /* Create an empty gap within this section. Thanks to this, the end of this
+     * section will match .flash.rodata's begin address. Thus, both sections
+     * will be merged when creating the final bin image. */
+    . = ALIGN(ALIGNOF(.flash.rodata));
+  } >default_rodata_seg
+
+  .flash.rodata : ALIGN(0x10)
+  {
+    _flash_rodata_start = ABSOLUTE(.);
+
+    *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata.*)
 
     *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
     *(.gnu.linkonce.r.*)
diff --git a/tools/sdk/esp32c3/ld/esp32c3_out.ld b/tools/sdk/esp32c3/ld/esp32c3_out.ld
index 8d490333..04bf683e 100644
--- a/tools/sdk/esp32c3/ld/esp32c3_out.ld
+++ b/tools/sdk/esp32c3/ld/esp32c3_out.ld
@@ -55,3 +55,9 @@ REGION_ALIAS("rtc_slow_seg", rtc_iram_seg );
 REGION_ALIAS("rtc_data_location", rtc_iram_seg );
   REGION_ALIAS("default_code_seg", iram0_2_seg);
   REGION_ALIAS("default_rodata_seg", drom0_0_seg);
+/**
+ *  If rodata default segment is placed in `drom0_0_seg`, then flash's first rodata section must
+ *  also be first in the segment.
+ */
+  ASSERT(_flash_rodata_dummy_start == ORIGIN(default_rodata_seg),
+         ".flash_rodata_dummy section must be placed at the beginning of the rodata segment.")
diff --git a/tools/sdk/esp32c3/ld/libbtbb.a b/tools/sdk/esp32c3/ld/libbtbb.a
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diff --git a/tools/sdk/esp32c3/ld/libbtdm_app.a b/tools/sdk/esp32c3/ld/libbtdm_app.a
old mode 100755
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index b45cbf4c..a5cc31e6
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diff --git a/tools/sdk/esp32c3/lib/libapp_trace.a b/tools/sdk/esp32c3/lib/libapp_trace.a
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index 99b64e3d..57c8c6fd 100644
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diff --git a/tools/sdk/esp32c3/lib/libesp_serial_slave_link.a b/tools/sdk/esp32c3/lib/libesp_serial_slave_link.a
index 9803da44..85653515 100644
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index 083dec03..eba90bf4 100644
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index c8fe62ed..013bb9d8 100644
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index 032a825c..6648e4e8 100644
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index 830f0114..7876e176 100644
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index 65294491..7bc47219 100644
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index b7daa6be..9bc68564 100644
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index 04b5adc5..fcc87075 100644
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index 7e1722d0..c4b4e8d1 100644
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index 9d97af50..8d8ec17f 100644
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index 767c226d..9c7c3466 100644
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index e5fc7250..937ab3cc 100644
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index c68600b3..527eb870 100644
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diff --git a/tools/sdk/esp32c3/lib/libmbedcrypto.a b/tools/sdk/esp32c3/lib/libmbedcrypto.a
index 42192552..1bd7e586 100644
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index 478cc1d9..719b090f 100644
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index 3ff95911..71195d91 100644
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index d08a3f8d..f351527b 100644
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index 51e9fcbc..ff3cab10 100644
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index 37514461..68f64e1e 100644
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index 10a4f29b..a3d2a5f4 100644
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index e2ac1fdd..17846597 100644
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diff --git a/tools/sdk/esp32c3/lib/libopenssl.a b/tools/sdk/esp32c3/lib/libopenssl.a
index 7e49d480..df545800 100644
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diff --git a/tools/sdk/esp32c3/lib/libphy.a b/tools/sdk/esp32c3/lib/libphy.a
index 9ee70688..e52504f1 100644
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diff --git a/tools/sdk/esp32c3/lib/libpp.a b/tools/sdk/esp32c3/lib/libpp.a
index 6cdf55cb..5676acbe 100644
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index 0ab07666..bf822a85 100644
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index 10b62925..9c11cde0 100644
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index 8ae8e2e0..d3c1496c 100644
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index d7c2670c..b6fdb814 100644
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index f4926de0..432f004b 100644
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index a9708b91..33450a38 100644
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index 55316d51..d9c5dccc 100644
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diff --git a/tools/sdk/esp32c3/lib/libtcpip_adapter.a b/tools/sdk/esp32c3/lib/libtcpip_adapter.a
index 53e25770..fb16a0aa 100644
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diff --git a/tools/sdk/esp32c3/lib/libunity.a b/tools/sdk/esp32c3/lib/libunity.a
index 9198aa2c..0a797796 100644
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diff --git a/tools/sdk/esp32c3/lib/libvfs.a b/tools/sdk/esp32c3/lib/libvfs.a
index 99751366..cad692e4 100644
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diff --git a/tools/sdk/esp32c3/lib/libwapi.a b/tools/sdk/esp32c3/lib/libwapi.a
index e823d8b2..f92ee064 100644
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diff --git a/tools/sdk/esp32c3/lib/libwear_levelling.a b/tools/sdk/esp32c3/lib/libwear_levelling.a
index cdf414b0..43fd2a20 100644
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diff --git a/tools/sdk/esp32c3/lib/libwifi_provisioning.a b/tools/sdk/esp32c3/lib/libwifi_provisioning.a
index 9bbb0899..12a48b39 100644
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diff --git a/tools/sdk/esp32c3/lib/libwpa_supplicant.a b/tools/sdk/esp32c3/lib/libwpa_supplicant.a
index fc1d7b04..dc5fcb93 100644
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diff --git a/tools/sdk/esp32c3/sdkconfig b/tools/sdk/esp32c3/sdkconfig
index 33747392..fd5f4adf 100644
--- a/tools/sdk/esp32c3/sdkconfig
+++ b/tools/sdk/esp32c3/sdkconfig
@@ -126,6 +126,7 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=115200
 # Partition Table
 #
 CONFIG_PARTITION_TABLE_SINGLE_APP=y
+# CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE is not set
 # CONFIG_PARTITION_TABLE_TWO_OTA is not set
 # CONFIG_PARTITION_TABLE_CUSTOM is not set
 CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
@@ -327,11 +328,13 @@ CONFIG_BT_BLE_ENABLED=y
 CONFIG_BT_GATTS_ENABLE=y
 # CONFIG_BT_GATTS_PPCP_CHAR_GAP is not set
 CONFIG_BT_BLE_BLUFI_ENABLE=y
+CONFIG_BT_GATT_SR_PROFILES=8
 # CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MANUAL is not set
 CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO=y
 CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MODE=0
 CONFIG_BT_GATTC_ENABLE=y
 # CONFIG_BT_GATTC_CACHE_NVS_FLASH is not set
+CONFIG_BT_GATTC_CONNECT_RETRY_COUNT=3
 CONFIG_BT_BLE_SMP_ENABLE=y
 # CONFIG_BT_SMP_SLAVE_CON_PARAMS_UPD_ENABLE is not set
 # CONFIG_BT_STACK_NO_LOG is not set
@@ -510,6 +513,7 @@ CONFIG_BT_LOG_BLUFI_TRACE_LEVEL=2
 # end of BT DEBUG LOG LEVEL
 
 CONFIG_BT_ACL_CONNECTIONS=4
+CONFIG_BT_MULTI_CONNECTION_ENBALE=y
 # CONFIG_BT_ALLOCATION_FROM_SPIRAM_FIRST is not set
 # CONFIG_BT_BLE_DYNAMIC_ENV_MEMORY is not set
 # CONFIG_BT_BLE_HOST_QUEUE_CONG_CHECK is not set
@@ -520,6 +524,8 @@ CONFIG_BT_BLE_50_FEATURES_SUPPORTED=y
 CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y
 CONFIG_BT_RESERVE_DRAM=0xdb5c
 # end of Bluedroid Options
+
+CONFIG_BT_NIMBLE_ENABLE_CONN_REATTEMPT=y
 # end of Bluetooth
 
 # CONFIG_BLE_MESH is not set
@@ -635,6 +641,7 @@ CONFIG_ETH_ENABLED=y
 CONFIG_ETH_USE_SPI_ETHERNET=y
 # CONFIG_ETH_SPI_ETHERNET_DM9051 is not set
 # CONFIG_ETH_SPI_ETHERNET_W5500 is not set
+# CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL is not set
 # CONFIG_ETH_USE_OPENETH is not set
 # end of Ethernet
 
@@ -705,6 +712,11 @@ CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y
 # end of Sleep Config
 # end of Hardware Settings
 
+#
+# LCD and Touch Panel
+#
+# end of LCD and Touch Panel
+
 #
 # ESP NETIF Adapter
 #
@@ -747,6 +759,7 @@ CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0=y
 CONFIG_ESP_MAIN_TASK_AFFINITY=0x0
 CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048
 CONFIG_ESP_CONSOLE_UART_DEFAULT=y
+# CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG is not set
 # CONFIG_ESP_CONSOLE_UART_CUSTOM is not set
 # CONFIG_ESP_CONSOLE_NONE is not set
 CONFIG_ESP_CONSOLE_UART=y
@@ -796,9 +809,8 @@ CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32
 # CONFIG_ESP32_WIFI_IRAM_OPT is not set
 # CONFIG_ESP32_WIFI_RX_IRAM_OPT is not set
 CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y
-CONFIG_ESP_WIFI_FTM_INITIATOR_SUPPORT=y
-# CONFIG_ESP_WIFI_FTM_REPORT_LOG_ENABLE is not set
-CONFIG_ESP_WIFI_FTM_RESPONDER_SUPPORT=y
+# CONFIG_ESP_WIFI_SLP_IRAM_OPT is not set
+# CONFIG_ESP_WIFI_FTM_ENABLE is not set
 # CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE is not set
 # end of Wi-Fi
 
@@ -958,6 +970,12 @@ CONFIG_LOG_DEFAULT_LEVEL_ERROR=y
 # CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set
 # CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set
 CONFIG_LOG_DEFAULT_LEVEL=1
+CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT=y
+# CONFIG_LOG_MAXIMUM_LEVEL_WARN is not set
+# CONFIG_LOG_MAXIMUM_LEVEL_INFO is not set
+# CONFIG_LOG_MAXIMUM_LEVEL_DEBUG is not set
+# CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE is not set
+CONFIG_LOG_MAXIMUM_LEVEL=1
 # CONFIG_LOG_COLORS is not set
 CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y
 # CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set
@@ -990,6 +1008,7 @@ CONFIG_LWIP_ESP_GRATUITOUS_ARP=y
 CONFIG_LWIP_GARP_TMR_INTERVAL=60
 CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32
 CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y
+# CONFIG_LWIP_DHCP_DISABLE_CLIENT_ID is not set
 # CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set
 
 #
@@ -1002,6 +1021,9 @@ CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8
 # CONFIG_LWIP_AUTOIP is not set
 CONFIG_LWIP_IPV6=y
 # CONFIG_LWIP_IPV6_AUTOCONFIG is not set
+CONFIG_LWIP_IPV6_NUM_ADDRESSES=3
+# CONFIG_LWIP_IPV6_FORWARD is not set
+# CONFIG_LWIP_NETIF_STATUS_CALLBACK is not set
 CONFIG_LWIP_NETIF_LOOPBACK=y
 CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8
 
@@ -1083,6 +1105,9 @@ CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT=y
 CONFIG_LWIP_HOOK_IP6_ROUTE_NONE=y
 # CONFIG_LWIP_HOOK_IP6_ROUTE_DEFAULT is not set
 # CONFIG_LWIP_HOOK_IP6_ROUTE_CUSTOM is not set
+CONFIG_LWIP_HOOK_ND6_GET_GW_NONE=y
+# CONFIG_LWIP_HOOK_ND6_GET_GW_DEFAULT is not set
+# CONFIG_LWIP_HOOK_ND6_GET_GW_CUSTOM is not set
 CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE=y
 # CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_DEFAULT is not set
 # CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_CUSTOM is not set
@@ -1118,6 +1143,7 @@ CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y
 CONFIG_MBEDTLS_HARDWARE_AES=y
 CONFIG_MBEDTLS_HARDWARE_MPI=y
 CONFIG_MBEDTLS_HARDWARE_SHA=y
+CONFIG_MBEDTLS_ROM_MD5=y
 # CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set
 # CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set
 CONFIG_MBEDTLS_HAVE_TIME=y
@@ -1172,6 +1198,7 @@ CONFIG_MBEDTLS_RC4_DISABLED=y
 # CONFIG_MBEDTLS_XTEA_C is not set
 CONFIG_MBEDTLS_CCM_C=y
 CONFIG_MBEDTLS_GCM_C=y
+# CONFIG_MBEDTLS_NIST_KW_C is not set
 # end of Symmetric Ciphers
 
 # CONFIG_MBEDTLS_RIPEMD160_C is not set
@@ -1301,6 +1328,7 @@ CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1
 CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192
 # CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set
 # CONFIG_SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED is not set
+# CONFIG_SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST is not set
 
 #
 # Auto-detect flash chips
@@ -1367,6 +1395,7 @@ CONFIG_WS_BUFFER_SIZE=1024
 #
 CONFIG_UNITY_ENABLE_FLOAT=y
 CONFIG_UNITY_ENABLE_DOUBLE=y
+# CONFIG_UNITY_ENABLE_64BIT is not set
 # CONFIG_UNITY_ENABLE_COLOR is not set
 CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER=y
 # CONFIG_UNITY_ENABLE_FIXTURE is not set
diff --git a/tools/sdk/esp32s2/bin/bootloader_dio_40m.bin b/tools/sdk/esp32s2/bin/bootloader_dio_40m.bin
index 9c4afcba..b4c3144d 100644
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diff --git a/tools/sdk/esp32s2/bin/bootloader_dio_80m.bin b/tools/sdk/esp32s2/bin/bootloader_dio_80m.bin
index 8459a46a..7733796a 100644
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diff --git a/tools/sdk/esp32s2/bin/bootloader_dout_40m.bin b/tools/sdk/esp32s2/bin/bootloader_dout_40m.bin
index df7f99c6..07271b41 100644
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diff --git a/tools/sdk/esp32s2/bin/bootloader_dout_80m.bin b/tools/sdk/esp32s2/bin/bootloader_dout_80m.bin
index d87a5a72..a6a6f0ac 100644
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diff --git a/tools/sdk/esp32s2/bin/bootloader_qio_40m.bin b/tools/sdk/esp32s2/bin/bootloader_qio_40m.bin
index eb306c18..d5d586d7 100644
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diff --git a/tools/sdk/esp32s2/bin/bootloader_qio_80m.bin b/tools/sdk/esp32s2/bin/bootloader_qio_80m.bin
index 2a1d55b7..fbd646fe 100644
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diff --git a/tools/sdk/esp32s2/bin/bootloader_qout_40m.bin b/tools/sdk/esp32s2/bin/bootloader_qout_40m.bin
index 8ce8c3f2..6a6ff275 100644
Binary files a/tools/sdk/esp32s2/bin/bootloader_qout_40m.bin and b/tools/sdk/esp32s2/bin/bootloader_qout_40m.bin differ
diff --git a/tools/sdk/esp32s2/bin/bootloader_qout_80m.bin b/tools/sdk/esp32s2/bin/bootloader_qout_80m.bin
index 3d62c3db..4bf3a242 100644
Binary files a/tools/sdk/esp32s2/bin/bootloader_qout_80m.bin and b/tools/sdk/esp32s2/bin/bootloader_qout_80m.bin differ
diff --git a/tools/sdk/esp32s2/include/app_trace/include/esp_app_trace.h b/tools/sdk/esp32s2/include/app_trace/include/esp_app_trace.h
index b8374ae0..642b14c5 100644
--- a/tools/sdk/esp32s2/include/app_trace/include/esp_app_trace.h
+++ b/tools/sdk/esp32s2/include/app_trace/include/esp_app_trace.h
@@ -1,16 +1,8 @@
-// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef ESP_APP_TRACE_H_
 #define ESP_APP_TRACE_H_
 
diff --git a/tools/sdk/esp32s2/include/app_trace/include/esp_app_trace_util.h b/tools/sdk/esp32s2/include/app_trace/include/esp_app_trace_util.h
index 57c4f94f..a4de01c7 100644
--- a/tools/sdk/esp32s2/include/app_trace/include/esp_app_trace_util.h
+++ b/tools/sdk/esp32s2/include/app_trace/include/esp_app_trace_util.h
@@ -1,16 +1,8 @@
-// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef ESP_APP_TRACE_UTIL_H_
 #define ESP_APP_TRACE_UTIL_H_
 
diff --git a/tools/sdk/esp32s2/include/app_trace/include/esp_sysview_trace.h b/tools/sdk/esp32s2/include/app_trace/include/esp_sysview_trace.h
index 7a1bd5fd..b64fcca2 100644
--- a/tools/sdk/esp32s2/include/app_trace/include/esp_sysview_trace.h
+++ b/tools/sdk/esp32s2/include/app_trace/include/esp_sysview_trace.h
@@ -1,16 +1,8 @@
-// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef ESP_SYSVIEW_TRACE_H_
 #define ESP_SYSVIEW_TRACE_H_
 
diff --git a/tools/sdk/esp32s2/include/app_update/include/esp_ota_ops.h b/tools/sdk/esp32s2/include/app_update/include/esp_ota_ops.h
index 4d8053a6..ee29cdac 100644
--- a/tools/sdk/esp32s2/include/app_update/include/esp_ota_ops.h
+++ b/tools/sdk/esp32s2/include/app_update/include/esp_ota_ops.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef _OTA_OPS_H
 #define _OTA_OPS_H
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/audio/audio_device.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/audio/audio_device.h
index f91540b6..b8e6ef9c 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/audio/audio_device.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/audio/audio_device.h
@@ -358,33 +358,37 @@ extern "C" {
 // Application API (Multiple Interfaces)
 // CFG_TUD_AUDIO > 1
 //--------------------------------------------------------------------+
-bool     tud_audio_n_mounted    (uint8_t itf);
+bool     tud_audio_n_mounted    (uint8_t func_id);
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING
-uint16_t tud_audio_n_available                    (uint8_t itf);
-uint16_t tud_audio_n_read                         (uint8_t itf, void* buffer, uint16_t bufsize);
-bool     tud_audio_n_clear_ep_out_ff              (uint8_t itf);                          // Delete all content in the EP OUT FIFO
+uint16_t tud_audio_n_available                    (uint8_t func_id);
+uint16_t tud_audio_n_read                         (uint8_t func_id, void* buffer, uint16_t bufsize);
+bool     tud_audio_n_clear_ep_out_ff              (uint8_t func_id);                          // Delete all content in the EP OUT FIFO
+tu_fifo_t*   tud_audio_n_get_ep_out_ff            (uint8_t func_id);
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
-bool     tud_audio_n_clear_rx_support_ff          (uint8_t itf, uint8_t channelId);       // Delete all content in the support RX FIFOs
-uint16_t tud_audio_n_available_support_ff         (uint8_t itf, uint8_t channelId);
-uint16_t tud_audio_n_read_support_ff              (uint8_t itf, uint8_t channelId, void* buffer, uint16_t bufsize);
+bool     tud_audio_n_clear_rx_support_ff          (uint8_t func_id, uint8_t ff_idx);       // Delete all content in the support RX FIFOs
+uint16_t tud_audio_n_available_support_ff         (uint8_t func_id, uint8_t ff_idx);
+uint16_t tud_audio_n_read_support_ff              (uint8_t func_id, uint8_t ff_idx, void* buffer, uint16_t bufsize);
+tu_fifo_t* tud_audio_n_get_rx_support_ff          (uint8_t func_id, uint8_t ff_idx);
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
-uint16_t tud_audio_n_write                        (uint8_t itf, const void * data, uint16_t len);
-bool     tud_audio_n_clear_ep_in_ff               (uint8_t itf);                          // Delete all content in the EP IN FIFO
+uint16_t tud_audio_n_write                        (uint8_t func_id, const void * data, uint16_t len);
+bool     tud_audio_n_clear_ep_in_ff               (uint8_t func_id);                          // Delete all content in the EP IN FIFO
+tu_fifo_t*   tud_audio_n_get_ep_in_ff             (uint8_t func_id);
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING
-uint16_t tud_audio_n_flush_tx_support_ff          (uint8_t itf);      // Force all content in the support TX FIFOs to be written into EP SW FIFO
-bool     tud_audio_n_clear_tx_support_ff          (uint8_t itf, uint8_t channelId);
-uint16_t tud_audio_n_write_support_ff             (uint8_t itf, uint8_t channelId, const void * data, uint16_t len);
+uint16_t tud_audio_n_flush_tx_support_ff          (uint8_t func_id);      // Force all content in the support TX FIFOs to be written into EP SW FIFO
+bool     tud_audio_n_clear_tx_support_ff          (uint8_t func_id, uint8_t ff_idx);
+uint16_t tud_audio_n_write_support_ff             (uint8_t func_id, uint8_t ff_idx, const void * data, uint16_t len);
+tu_fifo_t* tud_audio_n_get_tx_support_ff          (uint8_t func_id, uint8_t ff_idx);
 #endif
 
 #if CFG_TUD_AUDIO_INT_CTR_EPSIZE_IN
-uint16_t    tud_audio_int_ctr_n_write             (uint8_t itf, uint8_t const* buffer, uint16_t len);
+uint16_t    tud_audio_int_ctr_n_write             (uint8_t func_id, uint8_t const* buffer, uint16_t len);
 #endif
 
 //--------------------------------------------------------------------+
@@ -399,12 +403,14 @@ static inline bool         tud_audio_mounted                (void);
 static inline uint16_t     tud_audio_available              (void);
 static inline bool         tud_audio_clear_ep_out_ff        (void);                       // Delete all content in the EP OUT FIFO
 static inline uint16_t     tud_audio_read                   (void* buffer, uint16_t bufsize);
+static inline tu_fifo_t*   tud_audio_get_ep_out_ff          (void);
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
-static inline bool     tud_audio_clear_rx_support_ff        (uint8_t channelId);
-static inline uint16_t tud_audio_available_support_ff       (uint8_t channelId);
-static inline uint16_t tud_audio_read_support_ff            (uint8_t channelId, void* buffer, uint16_t bufsize);
+static inline bool     tud_audio_clear_rx_support_ff        (uint8_t ff_idx);
+static inline uint16_t tud_audio_available_support_ff       (uint8_t ff_idx);
+static inline uint16_t tud_audio_read_support_ff            (uint8_t ff_idx, void* buffer, uint16_t bufsize);
+static inline tu_fifo_t* tud_audio_get_rx_support_ff        (uint8_t ff_idx);
 #endif
 
 // TX API
@@ -412,12 +418,14 @@ static inline uint16_t tud_audio_read_support_ff            (uint8_t channelId,
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
 static inline uint16_t tud_audio_write                      (const void * data, uint16_t len);
 static inline bool 	   tud_audio_clear_ep_in_ff             (void);
+static inline tu_fifo_t* tud_audio_get_ep_in_ff             (void);
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING
 static inline uint16_t tud_audio_flush_tx_support_ff        (void);
-static inline uint16_t tud_audio_clear_tx_support_ff        (uint8_t channelId);
-static inline uint16_t tud_audio_write_support_ff           (uint8_t channelId, const void * data, uint16_t len);
+static inline uint16_t tud_audio_clear_tx_support_ff        (uint8_t ff_idx);
+static inline uint16_t tud_audio_write_support_ff           (uint8_t ff_idx, const void * data, uint16_t len);
+static inline tu_fifo_t* tud_audio_get_tx_support_ff        (uint8_t ff_idx);
 #endif
 
 // INT CTR API
@@ -439,13 +447,13 @@ bool tud_audio_buffer_and_schedule_control_xfer(uint8_t rhport, tusb_control_req
 //--------------------------------------------------------------------+
 
 #if CFG_TUD_AUDIO_ENABLE_EP_IN
-TU_ATTR_WEAK bool tud_audio_tx_done_pre_load_cb(uint8_t rhport, uint8_t itf, uint8_t ep_in, uint8_t cur_alt_setting);
-TU_ATTR_WEAK bool tud_audio_tx_done_post_load_cb(uint8_t rhport, uint16_t n_bytes_copied, uint8_t itf, uint8_t ep_in, uint8_t cur_alt_setting);
+TU_ATTR_WEAK bool tud_audio_tx_done_pre_load_cb(uint8_t rhport, uint8_t func_id, uint8_t ep_in, uint8_t cur_alt_setting);
+TU_ATTR_WEAK bool tud_audio_tx_done_post_load_cb(uint8_t rhport, uint16_t n_bytes_copied, uint8_t func_id, uint8_t ep_in, uint8_t cur_alt_setting);
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT
-TU_ATTR_WEAK bool tud_audio_rx_done_pre_read_cb(uint8_t rhport, uint16_t n_bytes_received, uint8_t itf, uint8_t ep_out, uint8_t cur_alt_setting);
-TU_ATTR_WEAK bool tud_audio_rx_done_post_read_cb(uint8_t rhport, uint16_t n_bytes_received, uint8_t itf, uint8_t ep_out, uint8_t cur_alt_setting);
+TU_ATTR_WEAK bool tud_audio_rx_done_pre_read_cb(uint8_t rhport, uint16_t n_bytes_received, uint8_t func_id, uint8_t ep_out, uint8_t cur_alt_setting);
+TU_ATTR_WEAK bool tud_audio_rx_done_post_read_cb(uint8_t rhport, uint16_t n_bytes_received, uint8_t func_id, uint8_t ep_out, uint8_t cur_alt_setting);
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
@@ -454,7 +462,7 @@ TU_ATTR_WEAK bool tud_audio_fb_done_cb(uint8_t rhport);
 // Value will be corrected for FS to 10.14 format automatically.
 // (see Universal Serial Bus Specification Revision 2.0 5.12.4.2).
 // Feedback value will be sent at FB endpoint interval till it's changed.
-bool tud_audio_n_fb_set(uint8_t itf, uint32_t feedback);
+bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback);
 static inline bool tud_audio_fb_set(uint32_t feedback);
 #endif
 
@@ -514,23 +522,33 @@ static inline bool tud_audio_clear_ep_out_ff(void)
   return tud_audio_n_clear_ep_out_ff(0);
 }
 
+static inline tu_fifo_t* tud_audio_get_ep_out_ff(void)
+{
+  return tud_audio_n_get_ep_out_ff(0);
+}
+
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
 
-static inline bool tud_audio_clear_rx_support_ff(uint8_t channelId)
+static inline bool tud_audio_clear_rx_support_ff(uint8_t ff_idx)
 {
-  return tud_audio_n_clear_rx_support_ff(0, channelId);
+  return tud_audio_n_clear_rx_support_ff(0, ff_idx);
 }
 
-static inline uint16_t tud_audio_available_support_ff(uint8_t channelId)
+static inline uint16_t tud_audio_available_support_ff(uint8_t ff_idx)
 {
-  return tud_audio_n_available_support_ff(0, channelId);
+  return tud_audio_n_available_support_ff(0, ff_idx);
 }
 
-static inline uint16_t tud_audio_read_support_ff(uint8_t channelId, void* buffer, uint16_t bufsize)
+static inline uint16_t tud_audio_read_support_ff(uint8_t ff_idx, void* buffer, uint16_t bufsize)
 {
-  return tud_audio_n_read_support_ff(0, channelId, buffer, bufsize);
+  return tud_audio_n_read_support_ff(0, ff_idx, buffer, bufsize);
+}
+
+static inline tu_fifo_t* tud_audio_get_rx_support_ff(uint8_t ff_idx)
+{
+  return tud_audio_n_get_rx_support_ff(0, ff_idx);
 }
 
 #endif
@@ -549,6 +567,11 @@ static inline bool tud_audio_clear_ep_in_ff(void)
   return tud_audio_n_clear_ep_in_ff(0);
 }
 
+static inline tu_fifo_t* tud_audio_get_ep_in_ff(void)
+{
+  return tud_audio_n_get_ep_in_ff(0);
+}
+
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING
@@ -558,14 +581,19 @@ static inline uint16_t tud_audio_flush_tx_support_ff(void)
   return tud_audio_n_flush_tx_support_ff(0);
 }
 
-static inline uint16_t tud_audio_clear_tx_support_ff(uint8_t channelId)
+static inline uint16_t tud_audio_clear_tx_support_ff(uint8_t ff_idx)
 {
-  return tud_audio_n_clear_tx_support_ff(0, channelId);
+  return tud_audio_n_clear_tx_support_ff(0, ff_idx);
 }
 
-static inline uint16_t tud_audio_write_support_ff(uint8_t channelId, const void * data, uint16_t len)
+static inline uint16_t tud_audio_write_support_ff(uint8_t ff_idx, const void * data, uint16_t len)
 {
-  return tud_audio_n_write_support_ff(0, channelId, data, len);
+  return tud_audio_n_write_support_ff(0, ff_idx, data, len);
+}
+
+static inline tu_fifo_t* tud_audio_get_tx_support_ff(uint8_t ff_idx)
+{
+  return tud_audio_n_get_tx_support_ff(0, ff_idx);
 }
 
 #endif
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_device.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_device.h
index 0885922c..986585c5 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_device.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/cdc/cdc_device.h
@@ -83,7 +83,7 @@ int32_t  tud_cdc_n_read_char       (uint8_t itf);
 void     tud_cdc_n_read_flush      (uint8_t itf);
 
 // Get a byte from FIFO at the specified position without removing it
-bool     tud_cdc_n_peek            (uint8_t itf, int pos, uint8_t* u8);
+bool     tud_cdc_n_peek            (uint8_t itf, uint8_t* u8);
 
 // Write bytes to TX FIFO, data may remain in the FIFO for a while
 uint32_t tud_cdc_n_write           (uint8_t itf, void const* buffer, uint32_t bufsize);
@@ -117,7 +117,7 @@ static inline uint32_t tud_cdc_available       (void);
 static inline int32_t  tud_cdc_read_char       (void);
 static inline uint32_t tud_cdc_read            (void* buffer, uint32_t bufsize);
 static inline void     tud_cdc_read_flush      (void);
-static inline bool     tud_cdc_peek            (int pos, uint8_t* u8);
+static inline bool     tud_cdc_peek            (uint8_t* u8);
 
 static inline uint32_t tud_cdc_write_char      (char ch);
 static inline uint32_t tud_cdc_write           (void const* buffer, uint32_t bufsize);
@@ -207,9 +207,9 @@ static inline void tud_cdc_read_flush (void)
   tud_cdc_n_read_flush(0);
 }
 
-static inline bool tud_cdc_peek (int pos, uint8_t* u8)
+static inline bool tud_cdc_peek (uint8_t* u8)
 {
-  return tud_cdc_n_peek(0, pos, u8);
+  return tud_cdc_n_peek(0, u8);
 }
 
 static inline uint32_t tud_cdc_write_char (char ch)
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu.h
new file mode 100644
index 00000000..18de3bf9
--- /dev/null
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu.h
@@ -0,0 +1,118 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 XMOS LIMITED
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_DFU_H_
+#define _TUSB_DFU_H_
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+  extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Common Definitions
+//--------------------------------------------------------------------+
+// DFU Protocol
+typedef enum
+{
+  DFU_PROTOCOL_RT  = 0x01,
+  DFU_PROTOCOL_DFU = 0x02,
+} dfu_protocol_type_t;
+
+// DFU Descriptor Type
+typedef enum
+{
+  DFU_DESC_FUNCTIONAL = 0x21,
+} dfu_descriptor_type_t;
+
+// DFU Requests
+typedef enum {
+  DFU_REQUEST_DETACH         = 0,
+  DFU_REQUEST_DNLOAD         = 1,
+  DFU_REQUEST_UPLOAD         = 2,
+  DFU_REQUEST_GETSTATUS      = 3,
+  DFU_REQUEST_CLRSTATUS      = 4,
+  DFU_REQUEST_GETSTATE       = 5,
+  DFU_REQUEST_ABORT          = 6,
+} dfu_requests_t;
+
+// DFU States
+typedef enum {
+  APP_IDLE                   = 0,
+  APP_DETACH                 = 1,
+  DFU_IDLE                   = 2,
+  DFU_DNLOAD_SYNC            = 3,
+  DFU_DNBUSY                 = 4,
+  DFU_DNLOAD_IDLE            = 5,
+  DFU_MANIFEST_SYNC          = 6,
+  DFU_MANIFEST               = 7,
+  DFU_MANIFEST_WAIT_RESET    = 8,
+  DFU_UPLOAD_IDLE            = 9,
+  DFU_ERROR                  = 10,
+} dfu_state_t;
+
+// DFU Status
+typedef enum {
+  DFU_STATUS_OK              = 0x00,
+  DFU_STATUS_ERRTARGET       = 0x01,
+  DFU_STATUS_ERRFILE         = 0x02,
+  DFU_STATUS_ERRWRITE        = 0x03,
+  DFU_STATUS_ERRERASE        = 0x04,
+  DFU_STATUS_ERRCHECK_ERASED = 0x05,
+  DFU_STATUS_ERRPROG         = 0x06,
+  DFU_STATUS_ERRVERIFY       = 0x07,
+  DFU_STATUS_ERRADDRESS      = 0x08,
+  DFU_STATUS_ERRNOTDONE      = 0x09,
+  DFU_STATUS_ERRFIRMWARE     = 0x0A,
+  DFU_STATUS_ERRVENDOR       = 0x0B,
+  DFU_STATUS_ERRUSBR         = 0x0C,
+  DFU_STATUS_ERRPOR          = 0x0D,
+  DFU_STATUS_ERRUNKNOWN      = 0x0E,
+  DFU_STATUS_ERRSTALLEDPKT   = 0x0F,
+} dfu_device_status_t;
+
+#define DFU_FUNC_ATTR_CAN_DOWNLOAD_BITMASK              (1 << 0)
+#define DFU_FUNC_ATTR_CAN_UPLOAD_BITMASK                (1 << 1)
+#define DFU_FUNC_ATTR_MANIFESTATION_TOLERANT_BITMASK    (1 << 2)
+#define DFU_FUNC_ATTR_WILL_DETACH_BITMASK               (1 << 3)
+
+// DFU Status Request Payload
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bStatus;
+  uint8_t bwPollTimeout[3];
+  uint8_t bState;
+  uint8_t iString;
+} dfu_status_req_payload_t;
+
+TU_VERIFY_STATIC( sizeof(dfu_status_req_payload_t) == 6, "size is not correct");
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_DFU_H_ */
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu_device.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu_device.h
new file mode 100644
index 00000000..c45c436c
--- /dev/null
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu_device.h
@@ -0,0 +1,84 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 XMOS LIMITED
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_DFU_DEVICE_H_
+#define _TUSB_DFU_DEVICE_H_
+
+#include "common/tusb_common.h"
+#include "device/usbd.h"
+#include "dfu.h"
+
+#ifdef __cplusplus
+  extern "C" {
+#endif
+
+
+//--------------------------------------------------------------------+
+// Application Callback API (weak is optional)
+//--------------------------------------------------------------------+
+// Invoked during DFU_MANIFEST_SYNC get status request to check if firmware
+// is valid
+bool tud_dfu_firmware_valid_check_cb(void);
+
+// Invoked when a DFU_DNLOAD request is received
+// This callback takes the wBlockNum chunk of length length and provides it
+// to the application at the data pointer.  This data is only valid for this
+// call, so the app must use it not or copy it.
+void tud_dfu_req_dnload_data_cb(uint16_t wBlockNum, uint8_t* data, uint16_t length);
+
+// Must be called when the application is done using the last block of data
+// provided by tud_dfu_req_dnload_data_cb
+void tud_dfu_dnload_complete(void);
+
+// Invoked during the last DFU_DNLOAD request, signifying that the host believes
+// it is done transmitting data.
+// Return true if the application agrees there is no more data
+// Return false if the device disagrees, which will stall the pipe, and the Host
+//              should initiate a recovery procedure
+bool tud_dfu_device_data_done_check_cb(void);
+
+// Invoked when the Host has terminated a download or upload transfer
+TU_ATTR_WEAK void tud_dfu_abort_cb(void);
+
+// Invoked when a DFU_UPLOAD request is received
+// This callback must populate data with up to length bytes
+// Return the number of bytes to write
+uint16_t tud_dfu_req_upload_data_cb(uint16_t block_num, uint8_t* data, uint16_t length);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     dfu_moded_init(void);
+void     dfu_moded_reset(uint8_t rhport);
+uint16_t dfu_moded_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_DFU_MODE_DEVICE_H_ */
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu_rt_device.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu_rt_device.h
index cff43d03..0e5fd005 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu_rt_device.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/dfu/dfu_rt_device.h
@@ -29,36 +29,17 @@
 
 #include "common/tusb_common.h"
 #include "device/usbd.h"
+#include "dfu.h"
 
 #ifdef __cplusplus
  extern "C" {
 #endif
 
-
-//--------------------------------------------------------------------+
-// Common Definitions
-//--------------------------------------------------------------------+
-
-// DFU Protocol
-typedef enum
-{
-  DFU_PROTOCOL_RT  = 1,
-  DFU_PROTOCOL_DFU = 2,
-} dfu_protocol_type_t;
-
-// DFU Descriptor Type
-typedef enum
-{
-  DFU_DESC_FUNCTIONAL = 0x21,
-} dfu_descriptor_type_t;
-
-
 //--------------------------------------------------------------------+
 // Application Callback API (weak is optional)
 //--------------------------------------------------------------------+
-
-// Invoked when received new data
-TU_ATTR_WEAK void tud_dfu_runtime_reboot_to_dfu_cb(void);
+// Invoked when a DFU_DETACH request is received and bitWillDetach is set
+void tud_dfu_runtime_reboot_to_dfu_cb(void);
 
 //--------------------------------------------------------------------+
 // Internal Class Driver API
@@ -67,7 +48,6 @@ void     dfu_rtd_init(void);
 void     dfu_rtd_reset(uint8_t rhport);
 uint16_t dfu_rtd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
 bool     dfu_rtd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
-bool     dfu_rtd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
 
 #ifdef __cplusplus
  }
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/hid/hid.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/hid/hid.h
index 351a4d60..5cc9233b 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/hid/hid.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/hid/hid.h
@@ -62,15 +62,15 @@ typedef enum
 {
   HID_SUBCLASS_NONE = 0, ///< No Subclass
   HID_SUBCLASS_BOOT = 1  ///< Boot Interface Subclass
-}hid_subclass_type_t;
+}hid_subclass_enum_t;
 
-/// HID Protocol
+/// HID Interface Protocol
 typedef enum
 {
-  HID_PROTOCOL_NONE     = 0, ///< None
-  HID_PROTOCOL_KEYBOARD = 1, ///< Keyboard
-  HID_PROTOCOL_MOUSE    = 2  ///< Mouse
-}hid_protocol_type_t;
+  HID_ITF_PROTOCOL_NONE     = 0, ///< None
+  HID_ITF_PROTOCOL_KEYBOARD = 1, ///< Keyboard
+  HID_ITF_PROTOCOL_MOUSE    = 2  ///< Mouse
+}hid_interface_protocol_enum_t;
 
 /// HID Descriptor Type
 typedef enum
@@ -78,7 +78,7 @@ typedef enum
   HID_DESC_TYPE_HID      = 0x21, ///< HID Descriptor
   HID_DESC_TYPE_REPORT   = 0x22, ///< Report Descriptor
   HID_DESC_TYPE_PHYSICAL = 0x23  ///< Physical Descriptor
-}hid_descriptor_type_t;
+}hid_descriptor_enum_t;
 
 /// HID Request Report Type
 typedef enum
@@ -98,9 +98,9 @@ typedef enum
   HID_REQ_CONTROL_SET_REPORT   = 0x09, ///< Set Report
   HID_REQ_CONTROL_SET_IDLE     = 0x0a, ///< Set Idle
   HID_REQ_CONTROL_SET_PROTOCOL = 0x0b  ///< Set Protocol
-}hid_request_type_t;
+}hid_request_enum_t;
 
-/// HID Country Code
+/// HID Local Code
 typedef enum
 {
   HID_LOCAL_NotSupported = 0   , ///< NotSupported
@@ -139,7 +139,14 @@ typedef enum
   HID_LOCAL_US                 , ///< US
   HID_LOCAL_Yugoslavia         , ///< Yugoslavia
   HID_LOCAL_Turkish_F            ///< Turkish-F
-} hid_country_code_t;
+} hid_local_enum_t;
+
+// HID protocol value used by GetProtocol / SetProtocol
+typedef enum
+{
+  HID_PROTOCOL_BOOT = 0,
+  HID_PROTOCOL_REPORT = 1
+} hid_protocol_mode_enum_t;
 
 /** @} */
 
@@ -479,6 +486,7 @@ typedef enum
 //--------------------------------------------------------------------+
 // REPORT DESCRIPTOR
 //--------------------------------------------------------------------+
+
 //------------- ITEM & TAG -------------//
 #define HID_REPORT_DATA_0(data)
 #define HID_REPORT_DATA_1(data) , data
@@ -488,18 +496,31 @@ typedef enum
 #define HID_REPORT_ITEM(data, tag, type, size) \
   (((tag) << 4) | ((type) << 2) | (size)) HID_REPORT_DATA_##size(data)
 
-#define RI_TYPE_MAIN   0
-#define RI_TYPE_GLOBAL 1
-#define RI_TYPE_LOCAL  2
+// Report Item Types
+enum {
+  RI_TYPE_MAIN   = 0,
+  RI_TYPE_GLOBAL = 1,
+  RI_TYPE_LOCAL  = 2
+};
 
-//------------- MAIN ITEMS 6.2.2.4 -------------//
-#define HID_INPUT(x)           HID_REPORT_ITEM(x,  8, RI_TYPE_MAIN, 1)
-#define HID_OUTPUT(x)          HID_REPORT_ITEM(x,  9, RI_TYPE_MAIN, 1)
-#define HID_COLLECTION(x)      HID_REPORT_ITEM(x, 10, RI_TYPE_MAIN, 1)
-#define HID_FEATURE(x)         HID_REPORT_ITEM(x, 11, RI_TYPE_MAIN, 1)
-#define HID_COLLECTION_END     HID_REPORT_ITEM(x, 12, RI_TYPE_MAIN, 0)
+//------------- Main Items - HID 1.11 section 6.2.2.4 -------------//
 
-//------------- INPUT, OUTPUT, FEATURE 6.2.2.5 -------------//
+// Report Item Main group
+enum {
+  RI_MAIN_INPUT          = 8,
+  RI_MAIN_OUTPUT         = 9,
+  RI_MAIN_COLLECTION     = 10,
+  RI_MAIN_FEATURE        = 11,
+  RI_MAIN_COLLECTION_END = 12
+};
+
+#define HID_INPUT(x)           HID_REPORT_ITEM(x, RI_MAIN_INPUT         , RI_TYPE_MAIN, 1)
+#define HID_OUTPUT(x)          HID_REPORT_ITEM(x, RI_MAIN_OUTPUT        , RI_TYPE_MAIN, 1)
+#define HID_COLLECTION(x)      HID_REPORT_ITEM(x, RI_MAIN_COLLECTION    , RI_TYPE_MAIN, 1)
+#define HID_FEATURE(x)         HID_REPORT_ITEM(x, RI_MAIN_FEATURE       , RI_TYPE_MAIN, 1)
+#define HID_COLLECTION_END     HID_REPORT_ITEM(x, RI_MAIN_COLLECTION_END, RI_TYPE_MAIN, 0)
+
+//------------- Input, Output, Feature - HID 1.11 section 6.2.2.5 -------------//
 #define HID_DATA             (0<<0)
 #define HID_CONSTANT         (1<<0)
 
@@ -527,7 +548,7 @@ typedef enum
 #define HID_BITFIELD         (0<<8)
 #define HID_BUFFERED_BYTES   (1<<8)
 
-//------------- COLLECTION ITEM 6.2.2.6 -------------//
+//------------- Collection Item - HID 1.11 section 6.2.2.6 -------------//
 enum {
   HID_COLLECTION_PHYSICAL = 0,
   HID_COLLECTION_APPLICATION,
@@ -538,49 +559,81 @@ enum {
   HID_COLLECTION_USAGE_MODIFIER
 };
 
-//------------- GLOBAL ITEMS 6.2.2.7 -------------//
-#define HID_USAGE_PAGE(x)         HID_REPORT_ITEM(x, 0, RI_TYPE_GLOBAL, 1)
-#define HID_USAGE_PAGE_N(x, n)    HID_REPORT_ITEM(x, 0, RI_TYPE_GLOBAL, n)
+//------------- Global Items - HID 1.11 section 6.2.2.7 -------------//
 
-#define HID_LOGICAL_MIN(x)        HID_REPORT_ITEM(x, 1, RI_TYPE_GLOBAL, 1)
-#define HID_LOGICAL_MIN_N(x, n)   HID_REPORT_ITEM(x, 1, RI_TYPE_GLOBAL, n)
+// Report Item Global group
+enum {
+  RI_GLOBAL_USAGE_PAGE    = 0,
+  RI_GLOBAL_LOGICAL_MIN   = 1,
+  RI_GLOBAL_LOGICAL_MAX   = 2,
+  RI_GLOBAL_PHYSICAL_MIN  = 3,
+  RI_GLOBAL_PHYSICAL_MAX  = 4,
+  RI_GLOBAL_UNIT_EXPONENT = 5,
+  RI_GLOBAL_UNIT          = 6,
+  RI_GLOBAL_REPORT_SIZE   = 7,
+  RI_GLOBAL_REPORT_ID     = 8,
+  RI_GLOBAL_REPORT_COUNT  = 9,
+  RI_GLOBAL_PUSH          = 10,
+  RI_GLOBAL_POP           = 11
+};
 
-#define HID_LOGICAL_MAX(x)        HID_REPORT_ITEM(x, 2, RI_TYPE_GLOBAL, 1)
-#define HID_LOGICAL_MAX_N(x, n)   HID_REPORT_ITEM(x, 2, RI_TYPE_GLOBAL, n)
+#define HID_USAGE_PAGE(x)         HID_REPORT_ITEM(x, RI_GLOBAL_USAGE_PAGE, RI_TYPE_GLOBAL, 1)
+#define HID_USAGE_PAGE_N(x, n)    HID_REPORT_ITEM(x, RI_GLOBAL_USAGE_PAGE, RI_TYPE_GLOBAL, n)
 
-#define HID_PHYSICAL_MIN(x)       HID_REPORT_ITEM(x, 3, RI_TYPE_GLOBAL, 1)
-#define HID_PHYSICAL_MIN_N(x, n)  HID_REPORT_ITEM(x, 3, RI_TYPE_GLOBAL, n)
+#define HID_LOGICAL_MIN(x)        HID_REPORT_ITEM(x, RI_GLOBAL_LOGICAL_MIN, RI_TYPE_GLOBAL, 1)
+#define HID_LOGICAL_MIN_N(x, n)   HID_REPORT_ITEM(x, RI_GLOBAL_LOGICAL_MIN, RI_TYPE_GLOBAL, n)
 
-#define HID_PHYSICAL_MAX(x)       HID_REPORT_ITEM(x, 4, RI_TYPE_GLOBAL, 1)
-#define HID_PHYSICAL_MAX_N(x, n)  HID_REPORT_ITEM(x, 4, RI_TYPE_GLOBAL, n)
+#define HID_LOGICAL_MAX(x)        HID_REPORT_ITEM(x, RI_GLOBAL_LOGICAL_MAX, RI_TYPE_GLOBAL, 1)
+#define HID_LOGICAL_MAX_N(x, n)   HID_REPORT_ITEM(x, RI_GLOBAL_LOGICAL_MAX, RI_TYPE_GLOBAL, n)
 
-#define HID_UNIT_EXPONENT(x)      HID_REPORT_ITEM(x, 5, RI_TYPE_GLOBAL, 1)
-#define HID_UNIT_EXPONENT_N(x, n) HID_REPORT_ITEM(x, 5, RI_TYPE_GLOBAL, n)
+#define HID_PHYSICAL_MIN(x)       HID_REPORT_ITEM(x, RI_GLOBAL_PHYSICAL_MIN, RI_TYPE_GLOBAL, 1)
+#define HID_PHYSICAL_MIN_N(x, n)  HID_REPORT_ITEM(x, RI_GLOBAL_PHYSICAL_MIN, RI_TYPE_GLOBAL, n)
 
-#define HID_UNIT(x)               HID_REPORT_ITEM(x, 6, RI_TYPE_GLOBAL, 1)
-#define HID_UNIT_N(x, n)          HID_REPORT_ITEM(x, 6, RI_TYPE_GLOBAL, n)
+#define HID_PHYSICAL_MAX(x)       HID_REPORT_ITEM(x, RI_GLOBAL_PHYSICAL_MAX, RI_TYPE_GLOBAL, 1)
+#define HID_PHYSICAL_MAX_N(x, n)  HID_REPORT_ITEM(x, RI_GLOBAL_PHYSICAL_MAX, RI_TYPE_GLOBAL, n)
 
-#define HID_REPORT_SIZE(x)        HID_REPORT_ITEM(x, 7, RI_TYPE_GLOBAL, 1)
-#define HID_REPORT_SIZE_N(x, n)   HID_REPORT_ITEM(x, 7, RI_TYPE_GLOBAL, n)
+#define HID_UNIT_EXPONENT(x)      HID_REPORT_ITEM(x, RI_GLOBAL_UNIT_EXPONENT, RI_TYPE_GLOBAL, 1)
+#define HID_UNIT_EXPONENT_N(x, n) HID_REPORT_ITEM(x, RI_GLOBAL_UNIT_EXPONENT, RI_TYPE_GLOBAL, n)
 
-#define HID_REPORT_ID(x)          HID_REPORT_ITEM(x, 8, RI_TYPE_GLOBAL, 1),
-#define HID_REPORT_ID_N(x)        HID_REPORT_ITEM(x, 8, RI_TYPE_GLOBAL, n),
+#define HID_UNIT(x)               HID_REPORT_ITEM(x, RI_GLOBAL_UNIT, RI_TYPE_GLOBAL, 1)
+#define HID_UNIT_N(x, n)          HID_REPORT_ITEM(x, RI_GLOBAL_UNIT, RI_TYPE_GLOBAL, n)
 
-#define HID_REPORT_COUNT(x)       HID_REPORT_ITEM(x, 9, RI_TYPE_GLOBAL, 1)
-#define HID_REPORT_COUNT_N(x, n)  HID_REPORT_ITEM(x, 9, RI_TYPE_GLOBAL, n)
+#define HID_REPORT_SIZE(x)        HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_SIZE, RI_TYPE_GLOBAL, 1)
+#define HID_REPORT_SIZE_N(x, n)   HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_SIZE, RI_TYPE_GLOBAL, n)
 
-#define HID_PUSH                  HID_REPORT_ITEM(x, 10, RI_TYPE_GLOBAL, 0)
-#define HID_POP                   HID_REPORT_ITEM(x, 11, RI_TYPE_GLOBAL, 0)
+#define HID_REPORT_ID(x)          HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_ID, RI_TYPE_GLOBAL, 1),
+#define HID_REPORT_ID_N(x)        HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_ID, RI_TYPE_GLOBAL, n),
+
+#define HID_REPORT_COUNT(x)       HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_COUNT, RI_TYPE_GLOBAL, 1)
+#define HID_REPORT_COUNT_N(x, n)  HID_REPORT_ITEM(x, RI_GLOBAL_REPORT_COUNT, RI_TYPE_GLOBAL, n)
+
+#define HID_PUSH                  HID_REPORT_ITEM(x, RI_GLOBAL_PUSH, RI_TYPE_GLOBAL, 0)
+#define HID_POP                   HID_REPORT_ITEM(x, RI_GLOBAL_POP, RI_TYPE_GLOBAL, 0)
 
 //------------- LOCAL ITEMS 6.2.2.8 -------------//
-#define HID_USAGE(x)              HID_REPORT_ITEM(x, 0, RI_TYPE_LOCAL, 1)
-#define HID_USAGE_N(x, n)         HID_REPORT_ITEM(x, 0, RI_TYPE_LOCAL, n)
 
-#define HID_USAGE_MIN(x)          HID_REPORT_ITEM(x, 1, RI_TYPE_LOCAL, 1)
-#define HID_USAGE_MIN_N(x, n)     HID_REPORT_ITEM(x, 1, RI_TYPE_LOCAL, n)
+enum {
+  RI_LOCAL_USAGE            = 0,
+  RI_LOCAL_USAGE_MIN        = 1,
+  RI_LOCAL_USAGE_MAX        = 2,
+  RI_LOCAL_DESIGNATOR_INDEX = 3,
+  RI_LOCAL_DESIGNATOR_MIN   = 4,
+  RI_LOCAL_DESIGNATOR_MAX   = 5,
+  // 6 is reserved
+  RI_LOCAL_STRING_INDEX     = 7,
+  RI_LOCAL_STRING_MIN       = 8,
+  RI_LOCAL_STRING_MAX       = 9,
+  RI_LOCAL_DELIMITER        = 10,
+};
 
-#define HID_USAGE_MAX(x)          HID_REPORT_ITEM(x, 2, RI_TYPE_LOCAL, 1)
-#define HID_USAGE_MAX_N(x, n)     HID_REPORT_ITEM(x, 2, RI_TYPE_LOCAL, n)
+#define HID_USAGE(x)              HID_REPORT_ITEM(x, RI_LOCAL_USAGE, RI_TYPE_LOCAL, 1)
+#define HID_USAGE_N(x, n)         HID_REPORT_ITEM(x, RI_LOCAL_USAGE, RI_TYPE_LOCAL, n)
+
+#define HID_USAGE_MIN(x)          HID_REPORT_ITEM(x, RI_LOCAL_USAGE_MIN, RI_TYPE_LOCAL, 1)
+#define HID_USAGE_MIN_N(x, n)     HID_REPORT_ITEM(x, RI_LOCAL_USAGE_MIN, RI_TYPE_LOCAL, n)
+
+#define HID_USAGE_MAX(x)          HID_REPORT_ITEM(x, RI_LOCAL_USAGE_MAX, RI_TYPE_LOCAL, 1)
+#define HID_USAGE_MAX_N(x, n)     HID_REPORT_ITEM(x, RI_LOCAL_USAGE_MAX, RI_TYPE_LOCAL, n)
 
 //--------------------------------------------------------------------+
 // Usage Table
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/hid/hid_device.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/hid/hid_device.h
index 0c59d5d2..61274be4 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/hid/hid_device.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/hid/hid_device.h
@@ -50,39 +50,44 @@
 #endif
 
 //--------------------------------------------------------------------+
-// Application API (Multiple Ports)
+// Application API (Multiple Instances)
 // CFG_TUD_HID > 1
 //--------------------------------------------------------------------+
 
 // Check if the interface is ready to use
-bool tud_hid_n_ready(uint8_t itf);
+bool tud_hid_n_ready(uint8_t instance);
 
-// Check if current mode is Boot (true) or Report (false)
-bool tud_hid_n_boot_mode(uint8_t itf);
+// Get interface supported protocol (bInterfaceProtocol) check out hid_interface_protocol_enum_t for possible values
+uint8_t tud_hid_n_interface_protocol(uint8_t instance);
+
+// Get current active protocol: HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1)
+uint8_t tud_hid_n_get_protocol(uint8_t instance);
 
 // Send report to host
-bool tud_hid_n_report(uint8_t itf, uint8_t report_id, void const* report, uint8_t len);
+bool tud_hid_n_report(uint8_t instance, uint8_t report_id, void const* report, uint8_t len);
 
 // KEYBOARD: convenient helper to send keyboard report if application
 // use template layout report as defined by hid_keyboard_report_t
-bool tud_hid_n_keyboard_report(uint8_t itf, uint8_t report_id, uint8_t modifier, uint8_t keycode[6]);
+bool tud_hid_n_keyboard_report(uint8_t instance, uint8_t report_id, uint8_t modifier, uint8_t keycode[6]);
 
 // MOUSE: convenient helper to send mouse report if application
 // use template layout report as defined by hid_mouse_report_t
-bool tud_hid_n_mouse_report(uint8_t itf, uint8_t report_id, uint8_t buttons, int8_t x, int8_t y, int8_t vertical, int8_t horizontal);
+bool tud_hid_n_mouse_report(uint8_t instance, uint8_t report_id, uint8_t buttons, int8_t x, int8_t y, int8_t vertical, int8_t horizontal);
 
 // Gamepad: convenient helper to send mouse report if application
 // use template layout report TUD_HID_REPORT_DESC_GAMEPAD
-bool tud_hid_n_gamepad_report(uint8_t itf, uint8_t report_id, int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint16_t buttons);
+bool tud_hid_n_gamepad_report(uint8_t instance, uint8_t report_id, int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint16_t buttons);
 
 //--------------------------------------------------------------------+
 // Application API (Single Port)
 //--------------------------------------------------------------------+
-static inline bool tud_hid_ready(void);
-static inline bool tud_hid_boot_mode(void);
-static inline bool tud_hid_report(uint8_t report_id, void const* report, uint8_t len);
-static inline bool tud_hid_keyboard_report(uint8_t report_id, uint8_t modifier, uint8_t keycode[6]);
-static inline bool tud_hid_mouse_report(uint8_t report_id, uint8_t buttons, int8_t x, int8_t y, int8_t vertical, int8_t horizontal);
+static inline bool    tud_hid_ready(void);
+static inline uint8_t tud_hid_interface_protocol(void);
+static inline uint8_t tud_hid_get_protocol(void);
+static inline bool    tud_hid_report(uint8_t report_id, void const* report, uint8_t len);
+static inline bool    tud_hid_keyboard_report(uint8_t report_id, uint8_t modifier, uint8_t keycode[6]);
+static inline bool    tud_hid_mouse_report(uint8_t report_id, uint8_t buttons, int8_t x, int8_t y, int8_t vertical, int8_t horizontal);
+static inline bool    tud_hid_gamepad_report(uint8_t report_id, int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint16_t buttons);
 
 //--------------------------------------------------------------------+
 // Callbacks (Weak is optional)
@@ -90,29 +95,30 @@ static inline bool tud_hid_mouse_report(uint8_t report_id, uint8_t buttons, int8
 
 // Invoked when received GET HID REPORT DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint8_t const * tud_hid_descriptor_report_cb(uint8_t itf);
+uint8_t const * tud_hid_descriptor_report_cb(uint8_t instance);
 
 // Invoked when received GET_REPORT control request
 // Application must fill buffer report's content and return its length.
 // Return zero will cause the stack to STALL request
-uint16_t tud_hid_get_report_cb(uint8_t itf, uint8_t report_id, hid_report_type_t report_type, uint8_t* buffer, uint16_t reqlen);
+uint16_t tud_hid_get_report_cb(uint8_t instance, uint8_t report_id, hid_report_type_t report_type, uint8_t* buffer, uint16_t reqlen);
 
 // Invoked when received SET_REPORT control request or
 // received data on OUT endpoint ( Report ID = 0, Type = 0 )
-void tud_hid_set_report_cb(uint8_t itf, uint8_t report_id, hid_report_type_t report_type, uint8_t const* buffer, uint16_t bufsize);
+void tud_hid_set_report_cb(uint8_t instance, uint8_t report_id, hid_report_type_t report_type, uint8_t const* buffer, uint16_t bufsize);
 
-// Invoked when received SET_PROTOCOL request ( mode switch Boot <-> Report )
-TU_ATTR_WEAK void tud_hid_boot_mode_cb(uint8_t itf, uint8_t boot_mode);
+// Invoked when received SET_PROTOCOL request
+// protocol is either HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1)
+TU_ATTR_WEAK void tud_hid_set_protocol_cb(uint8_t instance, uint8_t protocol);
 
 // Invoked when received SET_IDLE request. return false will stall the request
 // - Idle Rate = 0 : only send report if there is changes, i.e skip duplication
 // - Idle Rate > 0 : skip duplication, but send at least 1 report every idle rate (in unit of 4 ms).
-TU_ATTR_WEAK bool tud_hid_set_idle_cb(uint8_t itf, uint8_t idle_rate);
+TU_ATTR_WEAK bool tud_hid_set_idle_cb(uint8_t instance, uint8_t idle_rate);
 
 // Invoked when sent REPORT successfully to host
 // Application can use this to send the next report
 // Note: For composite reports, report[0] is report ID
-TU_ATTR_WEAK void tud_hid_report_complete_cb(uint8_t itf, uint8_t const* report, uint8_t len);
+TU_ATTR_WEAK void tud_hid_report_complete_cb(uint8_t instance, uint8_t const* report, uint8_t len);
 
 
 //--------------------------------------------------------------------+
@@ -123,9 +129,14 @@ static inline bool tud_hid_ready(void)
   return tud_hid_n_ready(0);
 }
 
-static inline bool tud_hid_boot_mode(void)
+static inline uint8_t tud_hid_interface_protocol(void)
 {
-  return tud_hid_n_boot_mode(0);
+  return tud_hid_n_interface_protocol(0);
+}
+
+static inline uint8_t tud_hid_get_protocol(void)
+{
+  return tud_hid_n_get_protocol(0);
 }
 
 static inline bool tud_hid_report(uint8_t report_id, void const* report, uint8_t len)
@@ -143,6 +154,11 @@ static inline bool tud_hid_mouse_report(uint8_t report_id, uint8_t buttons, int8
   return tud_hid_n_mouse_report(0, report_id, buttons, x, y, vertical, horizontal);
 }
 
+static inline bool  tud_hid_gamepad_report(uint8_t report_id, int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint16_t buttons)
+{
+  return tud_hid_n_gamepad_report(0, report_id, x, y, z, rz, rx, ry, hat, buttons);
+}
+
 /* --------------------------------------------------------------------+
  * HID Report Descriptor Template
  *
@@ -184,9 +200,9 @@ static inline bool tud_hid_mouse_report(uint8_t report_id, uint8_t buttons, int8
     /* 6-byte Keycodes */ \
     HID_USAGE_PAGE ( HID_USAGE_PAGE_KEYBOARD )                     ,\
       HID_USAGE_MIN    ( 0                                   )     ,\
-      HID_USAGE_MAX    ( 255                                 )     ,\
+      HID_USAGE_MAX_N  ( 255, 2                              )     ,\
       HID_LOGICAL_MIN  ( 0                                   )     ,\
-      HID_LOGICAL_MAX  ( 255                                 )     ,\
+      HID_LOGICAL_MAX_N( 255, 2                              )     ,\
       HID_REPORT_COUNT ( 6                                   )     ,\
       HID_REPORT_SIZE  ( 8                                   )     ,\
       HID_INPUT        ( HID_DATA | HID_ARRAY | HID_ABSOLUTE )     ,\
@@ -272,7 +288,7 @@ static inline bool tud_hid_mouse_report(uint8_t report_id, uint8_t buttons, int8
  * 0x00 - do nothing
  * 0x01 - Power Off
  * 0x02 - Standby
- * 0x04 - Wake Host
+ * 0x03 - Wake Host
  */
 #define TUD_HID_REPORT_DESC_SYSTEM_CONTROL(...) \
   HID_USAGE_PAGE ( HID_USAGE_PAGE_DESKTOP           )        ,\
@@ -285,8 +301,8 @@ static inline bool tud_hid_mouse_report(uint8_t report_id, uint8_t buttons, int8
     HID_LOGICAL_MAX  ( 3                                   ) ,\
     HID_REPORT_COUNT ( 1                                   ) ,\
     HID_REPORT_SIZE  ( 2                                   ) ,\
-    HID_USAGE        ( HID_USAGE_DESKTOP_SYSTEM_SLEEP      ) ,\
     HID_USAGE        ( HID_USAGE_DESKTOP_SYSTEM_POWER_DOWN ) ,\
+    HID_USAGE        ( HID_USAGE_DESKTOP_SYSTEM_SLEEP      ) ,\
     HID_USAGE        ( HID_USAGE_DESKTOP_SYSTEM_WAKE_UP    ) ,\
     HID_INPUT        ( HID_DATA | HID_ARRAY | HID_ABSOLUTE ) ,\
     /* 6 bit padding */ \
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/hid/hid_host.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/hid/hid_host.h
index 5c77398f..ea693df6 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/hid/hid_host.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/hid/hid_host.h
@@ -39,166 +39,94 @@
 #endif
 
 //--------------------------------------------------------------------+
-// KEYBOARD Application API
+// Class Driver Configuration
 //--------------------------------------------------------------------+
-/** \addtogroup ClassDriver_HID_Keyboard Keyboard
- *  @{ */
 
-/** \defgroup Keyboard_Host Host
- *  The interface API includes status checking function, data transferring function and callback functions
- *  @{ */
+// TODO Highspeed interrupt can be up to 512 bytes
+#ifndef CFG_TUH_HID_EP_BUFSIZE
+#define CFG_TUH_HID_EP_BUFSIZE 64
+#endif
 
-extern uint8_t const hid_keycode_to_ascii_tbl[2][128]; // TODO used weak attr if build failed without KEYBOARD enabled
+typedef struct
+{
+  uint8_t  report_id;
+  uint8_t  usage;
+  uint16_t usage_page;
 
-/** \brief      Check if device supports Keyboard interface or not
- * \param[in]   dev_addr    device address
- * \retval      true if device supports Keyboard interface
- * \retval      false if device does not support Keyboard interface or is not mounted
- */
-bool tuh_hid_keyboard_is_mounted(uint8_t dev_addr);
-
-/** \brief      Check if the interface is currently busy or not
- * \param[in]   dev_addr device address
- * \retval      true if the interface is busy meaning the stack is still transferring/waiting data from/to device
- * \retval      false if the interface is not busy meaning the stack successfully transferred data from/to device
- * \note        This function is primarily used for polling/waiting result after \ref tuh_hid_keyboard_get_report.
- *              Alternatively, asynchronous event API can be used
- */
-bool tuh_hid_keyboard_is_busy(uint8_t dev_addr);
-
-/** \brief        Perform a get report from Keyboard interface
- * \param[in]		  dev_addr device address
- * \param[in,out] p_report address that is used to store data from device. Must be accessible by usb controller (see \ref CFG_TUSB_MEM_SECTION)
- * \returns       \ref tusb_error_t type to indicate success or error condition.
- * \retval        TUSB_ERROR_NONE on success
- * \retval        TUSB_ERROR_INTERFACE_IS_BUSY if the interface is already transferring data with device
- * \retval        TUSB_ERROR_DEVICE_NOT_READY if device is not yet configured (by SET CONFIGURED request)
- * \retval        TUSB_ERROR_INVALID_PARA if input parameters are not correct
- * \note          This function is non-blocking and returns immediately. The result of usb transfer will be reported by the interface's callback function
- */
-tusb_error_t  tuh_hid_keyboard_get_report(uint8_t dev_addr, void * p_report);
-
-//------------- Application Callback -------------//
-/** \brief      Callback function that is invoked when an transferring event occurred
- * \param[in]		dev_addr	Address of device
- * \param[in]   event an value from \ref xfer_result_t
- * \note        event can be one of following
- *              - XFER_RESULT_SUCCESS : previously scheduled transfer completes successfully.
- *              - XFER_RESULT_FAILED   : previously scheduled transfer encountered a transaction error.
- *              - XFER_RESULT_STALLED : previously scheduled transfer is stalled by device.
- * \note        Application should schedule the next report by calling \ref tuh_hid_keyboard_get_report within this callback
- */
-void tuh_hid_keyboard_isr(uint8_t dev_addr, xfer_result_t event);
-
-/** \brief 			Callback function that will be invoked when a device with Keyboard interface is mounted
- * \param[in] 	dev_addr Address of newly mounted device
- * \note        This callback should be used by Application to set-up interface-related data
- */
-void tuh_hid_keyboard_mounted_cb(uint8_t dev_addr);
-
-/** \brief 			Callback function that will be invoked when a device with Keyboard interface is unmounted
- * \param[in] 	dev_addr Address of newly unmounted device
- * \note        This callback should be used by Application to tear-down interface-related data
- */
-void tuh_hid_keyboard_unmounted_cb(uint8_t dev_addr);
-
-/** @} */ // Keyboard_Host
-/** @} */ // ClassDriver_HID_Keyboard
+  // TODO still use the endpoint size for now
+//  uint8_t in_len;      // length of IN report
+//  uint8_t out_len;     // length of OUT report
+} tuh_hid_report_info_t;
 
 //--------------------------------------------------------------------+
-// MOUSE Application API
+// Application API
 //--------------------------------------------------------------------+
-/** \addtogroup ClassDriver_HID_Mouse Mouse
- *  @{ */
 
-/** \defgroup Mouse_Host Host
- *  The interface API includes status checking function, data transferring function and callback functions
- *  @{ */
+// Get the number of HID instances
+uint8_t tuh_hid_instance_count(uint8_t dev_addr);
 
-/** \brief      Check if device supports Mouse interface or not
- * \param[in]   dev_addr    device address
- * \retval      true if device supports Mouse interface
- * \retval      false if device does not support Mouse interface or is not mounted
- */
-bool          tuh_hid_mouse_is_mounted(uint8_t dev_addr);
+// Check if HID instance is mounted
+bool tuh_hid_mounted(uint8_t dev_addr, uint8_t instance);
 
-/** \brief      Check if the interface is currently busy or not
- * \param[in]   dev_addr device address
- * \retval      true if the interface is busy meaning the stack is still transferring/waiting data from/to device
- * \retval      false if the interface is not busy meaning the stack successfully transferred data from/to device
- * \note        This function is primarily used for polling/waiting result after \ref tuh_hid_mouse_get_report.
- *              Alternatively, asynchronous event API can be used
- */
-bool          tuh_hid_mouse_is_busy(uint8_t dev_addr);
+// Get interface supported protocol (bInterfaceProtocol) check out hid_interface_protocol_enum_t for possible values
+uint8_t tuh_hid_interface_protocol(uint8_t dev_addr, uint8_t instance);
 
-/** \brief        Perform a get report from Mouse interface
- * \param[in]		  dev_addr device address
- * \param[in,out] p_report address that is used to store data from device. Must be accessible by usb controller (see \ref CFG_TUSB_MEM_SECTION)
- * \returns       \ref tusb_error_t type to indicate success or error condition.
- * \retval        TUSB_ERROR_NONE on success
- * \retval        TUSB_ERROR_INTERFACE_IS_BUSY if the interface is already transferring data with device
- * \retval        TUSB_ERROR_DEVICE_NOT_READY if device is not yet configured (by SET CONFIGURED request)
- * \retval        TUSB_ERROR_INVALID_PARA if input parameters are not correct
- * \note          This function is non-blocking and returns immediately. The result of usb transfer will be reported by the interface's callback function
- */
-tusb_error_t  tuh_hid_mouse_get_report(uint8_t dev_addr, void* p_report);
+// Get current active protocol: HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1)
+// Note: as HID spec, device will be initialized in Report mode
+bool tuh_hid_get_protocol(uint8_t dev_addr, uint8_t instance);
 
-//------------- Application Callback -------------//
-/** \brief      Callback function that is invoked when an transferring event occurred
- * \param[in]		dev_addr	Address of device
- * \param[in]   event an value from \ref xfer_result_t
- * \note        event can be one of following
- *              - XFER_RESULT_SUCCESS : previously scheduled transfer completes successfully.
- *              - XFER_RESULT_FAILED   : previously scheduled transfer encountered a transaction error.
- *              - XFER_RESULT_STALLED : previously scheduled transfer is stalled by device.
- * \note        Application should schedule the next report by calling \ref tuh_hid_mouse_get_report within this callback
- */
-void tuh_hid_mouse_isr(uint8_t dev_addr, xfer_result_t event);
+// Set protocol to HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1)
+// This function is only supported by Boot interface (tuh_n_hid_interface_protocol() != NONE)
+bool tuh_hid_set_protocol(uint8_t dev_addr, uint8_t instance, uint8_t protocol);
 
-/** \brief 			Callback function that will be invoked when a device with Mouse interface is mounted
- * \param[in]	  dev_addr Address of newly mounted device
- * \note        This callback should be used by Application to set-up interface-related data
- */
-void tuh_hid_mouse_mounted_cb(uint8_t dev_addr);
+// Set Report using control endpoint
+// report_type is either Intput, Output or Feature, (value from hid_report_type_t)
+bool tuh_hid_set_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t report_type, void* report, uint16_t len);
 
-/** \brief 			Callback function that will be invoked when a device with Mouse interface is unmounted
- * \param[in] 	dev_addr Address of newly unmounted device
- * \note        This callback should be used by Application to tear-down interface-related data
- */
-void tuh_hid_mouse_unmounted_cb(uint8_t dev_addr);
+// Parse report descriptor into array of report_info struct and return number of reports.
+// For complicated report, application should write its own parser.
+uint8_t tuh_hid_parse_report_descriptor(tuh_hid_report_info_t* reports_info_arr, uint8_t arr_count, uint8_t const* desc_report, uint16_t desc_len) TU_ATTR_UNUSED;
 
-/** @} */ // Mouse_Host
-/** @} */ // ClassDriver_HID_Mouse
+// Check if the interface is ready to use
+//bool tuh_n_hid_n_ready(uint8_t dev_addr, uint8_t instance);
+
+// Send report using interrupt endpoint
+// If report_id > 0 (composite), it will be sent as 1st byte, then report contents. Otherwise only report content is sent.
+//void tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t const* report, uint16_t len);
 
 //--------------------------------------------------------------------+
-// GENERIC Application API
+// Callbacks (Weak is optional)
 //--------------------------------------------------------------------+
-/** \addtogroup ClassDriver_HID_Generic Generic (not supported yet)
- *  @{ */
 
-/** \defgroup Generic_Host Host
- *  The interface API includes status checking function, data transferring function and callback functions
- *  @{ */
+// Invoked when device with hid interface is mounted
+// Report descriptor is also available for use. tuh_hid_parse_report_descriptor()
+// can be used to parse common/simple enough descriptor.
+void tuh_hid_mount_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* report_desc, uint16_t desc_len);
 
-bool          tuh_hid_generic_is_mounted(uint8_t dev_addr);
-tusb_error_t  tuh_hid_generic_get_report(uint8_t dev_addr, void* p_report, bool int_on_complete);
-tusb_error_t  tuh_hid_generic_set_report(uint8_t dev_addr, void* p_report, bool int_on_complete);
-tusb_interface_status_t tuh_hid_generic_get_status(uint8_t dev_addr);
-tusb_interface_status_t tuh_hid_generic_set_status(uint8_t dev_addr);
+// Invoked when device with hid interface is un-mounted
+TU_ATTR_WEAK void tuh_hid_umount_cb(uint8_t dev_addr, uint8_t instance);
 
-//------------- Application Callback -------------//
-void tuh_hid_generic_isr(uint8_t dev_addr, xfer_result_t event);
+// Invoked when received report from device via interrupt endpoint
+// Note: if there is report ID (composite), it is 1st byte of report
+void tuh_hid_report_received_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* report, uint16_t len);
 
-/** @} */ // Generic_Host
-/** @} */ // ClassDriver_HID_Generic
+// Invoked when sent report to device successfully via interrupt endpoint
+TU_ATTR_WEAK void tuh_hid_report_sent_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* report, uint16_t len);
+
+// Invoked when Sent Report to device via either control endpoint
+// len = 0 indicate there is error in the transfer e.g stalled response
+TU_ATTR_WEAK void tuh_hid_set_report_complete_cb(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t report_type, uint16_t len);
+
+// Invoked when Set Protocol request is complete
+TU_ATTR_WEAK void tuh_hid_set_protocol_complete_cb(uint8_t dev_addr, uint8_t instance, uint8_t protocol);
 
 //--------------------------------------------------------------------+
 // Internal Class Driver API
 //--------------------------------------------------------------------+
 void hidh_init(void);
-bool hidh_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length);
+bool hidh_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *desc_itf, uint16_t *p_length);
 bool hidh_set_config(uint8_t dev_addr, uint8_t itf_num);
-bool hidh_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+bool hidh_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
 void hidh_close(uint8_t dev_addr);
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/msc/msc_host.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/msc/msc_host.h
index 8116e729..b5ffcd40 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/msc/msc_host.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/msc/msc_host.h
@@ -106,17 +106,17 @@ bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_r
 //------------- Application Callback -------------//
 
 // Invoked when a device with MassStorage interface is mounted
-void tuh_msc_mount_cb(uint8_t dev_addr);
+TU_ATTR_WEAK void tuh_msc_mount_cb(uint8_t dev_addr);
 
 // Invoked when a device with MassStorage interface is unmounted
-void tuh_msc_unmount_cb(uint8_t dev_addr);
+TU_ATTR_WEAK void tuh_msc_umount_cb(uint8_t dev_addr);
 
 //--------------------------------------------------------------------+
 // Internal Class Driver API
 //--------------------------------------------------------------------+
 
 void msch_init(void);
-bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length);
+bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *desc_itf, uint16_t *p_length);
 bool msch_set_config(uint8_t dev_addr, uint8_t itf_num);
 bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
 void msch_close(uint8_t dev_addr);
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_device.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_device.h
index a4235bfc..2c3d79a3 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_device.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/class/vendor/vendor_device.h
@@ -45,7 +45,7 @@ bool     tud_vendor_n_mounted         (uint8_t itf);
 
 uint32_t tud_vendor_n_available       (uint8_t itf);
 uint32_t tud_vendor_n_read            (uint8_t itf, void* buffer, uint32_t bufsize);
-bool     tud_vendor_n_peek            (uint8_t itf, int pos, uint8_t* u8);
+bool     tud_vendor_n_peek            (uint8_t itf, uint8_t* u8);
 
 uint32_t tud_vendor_n_write           (uint8_t itf, void const* buffer, uint32_t bufsize);
 uint32_t tud_vendor_n_write_available (uint8_t itf);
@@ -59,7 +59,7 @@ uint32_t tud_vendor_n_write_str       (uint8_t itf, char const* str);
 static inline bool     tud_vendor_mounted         (void);
 static inline uint32_t tud_vendor_available       (void);
 static inline uint32_t tud_vendor_read            (void* buffer, uint32_t bufsize);
-static inline bool     tud_vendor_peek            (int pos, uint8_t* u8);
+static inline bool     tud_vendor_peek            (uint8_t* u8);
 static inline uint32_t tud_vendor_write           (void const* buffer, uint32_t bufsize);
 static inline uint32_t tud_vendor_write_str       (char const* str);
 static inline uint32_t tud_vendor_write_available (void);
@@ -95,9 +95,9 @@ static inline uint32_t tud_vendor_read (void* buffer, uint32_t bufsize)
   return tud_vendor_n_read(0, buffer, bufsize);
 }
 
-static inline bool tud_vendor_peek (int pos, uint8_t* u8)
+static inline bool tud_vendor_peek (uint8_t* u8)
 {
-  return tud_vendor_n_peek(0, pos, u8);
+  return tud_vendor_n_peek(0, u8);
 }
 
 static inline uint32_t tud_vendor_write (void const* buffer, uint32_t bufsize)
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_common.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_common.h
index 147856d4..88e85c9e 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_common.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_common.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -47,13 +47,13 @@
 #define U16_TO_U8S_BE(u16)    TU_U16_HIGH(u16), TU_U16_LOW(u16)
 #define U16_TO_U8S_LE(u16)    TU_U16_LOW(u16), TU_U16_HIGH(u16)
 
-#define U32_B1_U8(u32)        ((uint8_t) ((((uint32_t) u32) >> 24) & 0x000000ff)) // MSB
-#define U32_B2_U8(u32)        ((uint8_t) ((((uint32_t) u32) >> 16) & 0x000000ff))
-#define U32_B3_U8(u32)        ((uint8_t) ((((uint32_t) u32) >>  8) & 0x000000ff))
-#define U32_B4_U8(u32)        ((uint8_t) (((uint32_t)  u32)        & 0x000000ff)) // LSB
+#define TU_U32_BYTE3(u32)     ((uint8_t) ((((uint32_t) u32) >> 24) & 0x000000ff)) // MSB
+#define TU_U32_BYTE2(u32)     ((uint8_t) ((((uint32_t) u32) >> 16) & 0x000000ff))
+#define TU_U32_BYTE1(u32)     ((uint8_t) ((((uint32_t) u32) >>  8) & 0x000000ff))
+#define TU_U32_BYTE0(u32)     ((uint8_t) (((uint32_t)  u32)        & 0x000000ff)) // LSB
 
-#define U32_TO_U8S_BE(u32)    U32_B1_U8(u32), U32_B2_U8(u32), U32_B3_U8(u32), U32_B4_U8(u32)
-#define U32_TO_U8S_LE(u32)    U32_B4_U8(u32), U32_B3_U8(u32), U32_B2_U8(u32), U32_B1_U8(u32)
+#define U32_TO_U8S_BE(u32)    TU_U32_BYTE3(u32), TU_U32_BYTE2(u32), TU_U32_BYTE1(u32), TU_U32_BYTE0(u32)
+#define U32_TO_U8S_LE(u32)    TU_U32_BYTE0(u32), TU_U32_BYTE1(u32), TU_U32_BYTE2(u32), TU_U32_BYTE3(u32)
 
 #define TU_BIT(n)             (1U << (n))
 
@@ -81,9 +81,9 @@
 #define tu_varclr(_var)          tu_memclr(_var, sizeof(*(_var)))
 
 //------------- Bytes -------------//
-TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_u32(uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4)
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_u32(uint8_t b3, uint8_t b2, uint8_t b1, uint8_t b0)
 {
-  return ( ((uint32_t) b1) << 24) | ( ((uint32_t) b2) << 16) | ( ((uint32_t) b3) << 8) | b4;
+  return ( ((uint32_t) b3) << 24) | ( ((uint32_t) b2) << 16) | ( ((uint32_t) b1) << 8) | b0;
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u16(uint8_t high, uint8_t low)
@@ -91,8 +91,13 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u16(uint8_t high, uint8_t low)
   return (uint16_t) ((((uint16_t) high) << 8) | low);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_high(uint16_t u16) { return (uint8_t) (((uint16_t) (u16 >> 8)) & 0x00ff); }
-TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_low (uint16_t u16) { return (uint8_t) (u16 & 0x00ff); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte3(uint32_t u32) { return TU_U32_BYTE3(u32); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte2(uint32_t u32) { return TU_U32_BYTE2(u32); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte1(uint32_t u32) { return TU_U32_BYTE1(u32); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte0(uint32_t u32) { return TU_U32_BYTE0(u32); }
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_high(uint16_t u16) { return TU_U16_HIGH(u16); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_low (uint16_t u16) { return TU_U16_LOW(u16); }
 
 //------------- Bits -------------//
 TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_bit_set  (uint32_t value, uint8_t pos) { return value | TU_BIT(pos);                  }
@@ -115,8 +120,8 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align(uint32_t value, uint32_t a
   return value & ((uint32_t) ~(alignment-1));
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align32 (uint32_t value) { return (value & 0xFFFFFFE0UL); }
 TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align16 (uint32_t value) { return (value & 0xFFFFFFF0UL); }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align32 (uint32_t value) { return (value & 0xFFFFFFE0UL); }
 TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align4k (uint32_t value) { return (value & 0xFFFFF000UL); }
 TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_offset4k(uint32_t value) { return (value & 0xFFFUL); }
 
@@ -141,6 +146,8 @@ static inline uint8_t tu_log2(uint32_t value)
 //------------- Unaligned Access -------------//
 #if TUP_ARCH_STRICT_ALIGN
 
+// Rely on compiler to generate correct code for unaligned access
+
 typedef struct { uint16_t val; } TU_ATTR_PACKED tu_unaligned_uint16_t;
 typedef struct { uint32_t val; } TU_ATTR_PACKED tu_unaligned_uint32_t;
 
@@ -168,8 +175,44 @@ TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void* mem, uint16_
   ua16->val = value;
 }
 
+#elif TUP_MCU_STRICT_ALIGN
+
+// MCU such as LPC_IP3511 Highspeed cannot access unaligned memory on USB_RAM although it is ARM M4.
+// We have to manually pick up bytes since tu_unaligned_uint32_t will still generate unaligned code
+// NOTE: volatile cast to memory to prevent compiler to optimize and generate unaligned code
+// TODO Big Endian may need minor changes
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_unaligned_read32(const void* mem)
+{
+  volatile uint8_t const* buf8 = (uint8_t const*) mem;
+  return tu_u32(buf8[3], buf8[2], buf8[1], buf8[0]);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write32(void* mem, uint32_t value)
+{
+  volatile uint8_t* buf8 = (uint8_t*) mem;
+  buf8[0] = tu_u32_byte0(value);
+  buf8[1] = tu_u32_byte1(value);
+  buf8[2] = tu_u32_byte2(value);
+  buf8[3] = tu_u32_byte3(value);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_unaligned_read16(const void* mem)
+{
+  volatile uint8_t const* buf8 = (uint8_t const*) mem;
+  return tu_u16(buf8[1], buf8[0]);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void* mem, uint16_t value)
+{
+  volatile uint8_t* buf8 = (uint8_t*) mem;
+  buf8[0] = tu_u16_low(value);
+  buf8[1] = tu_u16_high(value);
+}
+
+
 #else
 
+// MCU that could access unaligned memory natively
 TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_unaligned_read32  (const void* mem           ) { return *((uint32_t*) mem);  }
 TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_unaligned_read16  (const void* mem           ) { return *((uint16_t*) mem);  }
 
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_fifo.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_fifo.h
index b2d0b5be..8d73911f 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_fifo.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_fifo.h
@@ -25,10 +25,6 @@
  * This file is part of the TinyUSB stack.
  */
 
-/** \ingroup Group_Common
- * \defgroup group_fifo fifo
- *  @{ */
-
 #ifndef _TUSB_FIFO_H_
 #define _TUSB_FIFO_H_
 
@@ -62,16 +58,16 @@ extern "C" {
  */
 typedef struct
 {
-  uint8_t* buffer                        ; ///< buffer pointer
-  uint16_t depth                         ; ///< max items
-  uint16_t item_size                     ; ///< size of each item
-  bool overwritable                      ;
+  uint8_t* buffer               ; ///< buffer pointer
+  uint16_t depth                ; ///< max items
+  uint16_t item_size            ; ///< size of each item
+  bool overwritable             ;
 
-  uint16_t non_used_index_space          ; ///< required for non-power-of-two buffer length
-  uint16_t max_pointer_idx               ; ///< maximum absolute pointer index
+  uint16_t non_used_index_space ; ///< required for non-power-of-two buffer length
+  uint16_t max_pointer_idx      ; ///< maximum absolute pointer index
 
-  volatile uint16_t wr_idx               ; ///< write pointer
-  volatile uint16_t rd_idx               ; ///< read pointer
+  volatile uint16_t wr_idx      ; ///< write pointer
+  volatile uint16_t rd_idx      ; ///< read pointer
 
 #if CFG_FIFO_MUTEX
   tu_fifo_mutex_t mutex_wr;
@@ -80,6 +76,14 @@ typedef struct
 
 } tu_fifo_t;
 
+typedef struct
+{
+  uint16_t len_lin  ; ///< linear length in item size
+  uint16_t len_wrap ; ///< wrapped length in item size
+  void * ptr_lin    ; ///< linear part start pointer
+  void * ptr_wrap   ; ///< wrapped part start pointer
+} tu_fifo_buffer_info_t;
+
 #define TU_FIFO_INIT(_buffer, _depth, _type, _overwritable) \
 {                                                           \
   .buffer               = _buffer,                          \
@@ -115,8 +119,8 @@ bool     tu_fifo_read                   (tu_fifo_t* f, void * p_buffer);
 uint16_t tu_fifo_read_n                 (tu_fifo_t* f, void * p_buffer, uint16_t n);
 uint16_t tu_fifo_read_n_const_addr_full_words     (tu_fifo_t* f, void * buffer, uint16_t n);
 
-bool     tu_fifo_peek_at                (tu_fifo_t* f, uint16_t pos, void * p_buffer);
-uint16_t tu_fifo_peek_at_n              (tu_fifo_t* f, uint16_t pos, void * p_buffer, uint16_t n);
+bool     tu_fifo_peek                   (tu_fifo_t* f, void * p_buffer);
+uint16_t tu_fifo_peek_n                 (tu_fifo_t* f, void * p_buffer, uint16_t n);
 
 uint16_t tu_fifo_count                  (tu_fifo_t* f);
 bool     tu_fifo_empty                  (tu_fifo_t* f);
@@ -125,27 +129,22 @@ uint16_t tu_fifo_remaining              (tu_fifo_t* f);
 bool     tu_fifo_overflowed             (tu_fifo_t* f);
 void     tu_fifo_correct_read_pointer   (tu_fifo_t* f);
 
+static inline uint16_t tu_fifo_depth(tu_fifo_t* f)
+{
+  return f->depth;
+}
+
 // Pointer modifications intended to be used in combinations with DMAs.
 // USE WITH CARE - NO SAFTY CHECKS CONDUCTED HERE! NOT MUTEX PROTECTED!
 void     tu_fifo_advance_write_pointer  (tu_fifo_t *f, uint16_t n);
 void     tu_fifo_advance_read_pointer   (tu_fifo_t *f, uint16_t n);
 
-// If you want to read/write from/to the FIFO by use of a DMA, you may need to conduct two copies to handle a possible wrapping part
-// This functions deliver a pointer to start reading/writing from/to and a valid linear length along which no wrap occurs.
-// In case not all of your data is available within one read/write, update the read/write pointer by
-// tu_fifo_advance_read_pointer()/tu_fifo_advance_write_pointer and conduct a second read/write operation
-uint16_t tu_fifo_get_linear_read_info   (tu_fifo_t *f, uint16_t offset, void **ptr, uint16_t n);
-uint16_t tu_fifo_get_linear_write_info  (tu_fifo_t *f, uint16_t offset, void **ptr, uint16_t n);
+// If you want to read/write from/to the FIFO by use of a DMA, you may need to conduct two copies
+// to handle a possible wrapping part. These functions deliver a pointer to start
+// reading/writing from/to and a valid linear length along which no wrap occurs.
+void tu_fifo_get_read_info (tu_fifo_t *f, tu_fifo_buffer_info_t *info);
+void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info);
 
-static inline bool tu_fifo_peek(tu_fifo_t* f, void * p_buffer)
-{
-  return tu_fifo_peek_at(f, 0, p_buffer);
-}
-
-static inline uint16_t tu_fifo_depth(tu_fifo_t* f)
-{
-  return f->depth;
-}
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_types.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_types.h
index ba3fe2c4..ec58a318 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_types.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_types.h
@@ -309,6 +309,8 @@ typedef struct TU_ATTR_PACKED
   uint8_t  bMaxPower           ; ///< Maximum power consumption of the USB device from the bus in this specific configuration when the device is fully operational. Expressed in 2 mA units (i.e., 50 = 100 mA).
 } tusb_desc_configuration_t;
 
+TU_VERIFY_STATIC( sizeof(tusb_desc_configuration_t) == 9, "size is not correct");
+
 /// USB Interface Descriptor
 typedef struct TU_ATTR_PACKED
 {
@@ -421,6 +423,29 @@ typedef struct TU_ATTR_PACKED
   char    url[];
 } tusb_desc_webusb_url_t;
 
+// DFU Functional Descriptor
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t  bLength;
+  uint8_t  bDescriptorType;
+
+  union {
+    struct TU_ATTR_PACKED {
+      uint8_t bitCanDnload             : 1;
+      uint8_t bitCanUpload             : 1;
+      uint8_t bitManifestationTolerant : 1;
+      uint8_t bitWillDetach            : 1;
+      uint8_t reserved                 : 4;
+    } bmAttributes;
+
+    uint8_t bAttributes;
+  };
+
+  uint16_t wDetachTimeOut;
+  uint16_t wTransferSize;
+  uint16_t bcdDFUVersion;
+} tusb_desc_dfu_functional_t;
+
 /*------------------------------------------------------------------*/
 /* Types
  *------------------------------------------------------------------*/
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd.h
index 1e5b3ff1..71e88054 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/dcd.h
@@ -24,10 +24,6 @@
  * This file is part of the TinyUSB stack.
  */
 
-/** \ingroup group_usbd
- * \defgroup group_dcd Device Controller Driver (DCD)
- *  @{ */
-
 #ifndef _TUSB_DCD_H_
 #define _TUSB_DCD_H_
 
@@ -168,5 +164,3 @@ extern void dcd_event_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t x
 #endif
 
 #endif /* _TUSB_DCD_H_ */
-
-/// @}
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd.h
index 7c50a6db..53519c4d 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -41,7 +41,10 @@ extern "C" {
 //--------------------------------------------------------------------+
 
 // Init device stack
-bool tud_init (void);
+bool tud_init (uint8_t rhport);
+
+// Check if device stack is already initialized
+bool tud_inited(void);
 
 // Task function should be called in main/rtos loop
 void tud_task (void);
@@ -67,6 +70,7 @@ bool tud_mounted(void);
 bool tud_suspended(void);
 
 // Check if device is ready to transfer
+TU_ATTR_ALWAYS_INLINE
 static inline bool tud_ready(void)
 {
   return tud_mounted() && !tud_suspended();
@@ -583,7 +587,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
 
 //------------- DFU Runtime -------------//
 #define TUD_DFU_APP_CLASS    (TUSB_CLASS_APPLICATION_SPECIFIC)
-#define TUD_DFU_APP_SUBCLASS 0x01u
+#define TUD_DFU_APP_SUBCLASS (APP_SUBCLASS_DFU_RUNTIME)
 
 // Length of template descriptr: 18 bytes
 #define TUD_DFU_RT_DESC_LEN (9 + 9)
@@ -596,6 +600,17 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
   /* Function */ \
   9, DFU_DESC_FUNCTIONAL, _attr, U16_TO_U8S_LE(_timeout), U16_TO_U8S_LE(_xfer_size), U16_TO_U8S_LE(0x0101)
 
+// Length of template descriptr: 18 bytes
+#define TUD_DFU_MODE_DESC_LEN (9 + 9)
+
+// DFU runtime descriptor
+// Interface number, string index, attributes, detach timeout, transfer size
+#define TUD_DFU_MODE_DESCRIPTOR(_itfnum, _stridx, _attr, _timeout, _xfer_size) \
+  /* Interface */ \
+  9, TUSB_DESC_INTERFACE, _itfnum, 0, 0, TUD_DFU_APP_CLASS, TUD_DFU_APP_SUBCLASS, DFU_PROTOCOL_DFU, _stridx, \
+  /* Function */ \
+  9, DFU_DESC_FUNCTIONAL, _attr, U16_TO_U8S_LE(_timeout), U16_TO_U8S_LE(_xfer_size), U16_TO_U8S_LE(0x0101)
+
 
 //------------- CDC-ECM -------------//
 
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd_pvt.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd_pvt.h
index 412a97a5..44310f02 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd_pvt.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd_pvt.h
@@ -47,7 +47,7 @@ typedef struct
   void     (* reset            ) (uint8_t rhport);
   uint16_t (* open             ) (uint8_t rhport, tusb_desc_interface_t const * desc_intf, uint16_t max_len);
   bool     (* control_xfer_cb  ) (uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
-  bool     (* xfer_cb          ) (uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+  bool     (* xfer_cb          ) (uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
   void     (* sof              ) (uint8_t rhport); /* optional */
 } usbd_class_driver_t;
 
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/hcd.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/hcd.h
index 4810ef8d..ba6a9c5c 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/hcd.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/hcd.h
@@ -24,14 +24,10 @@
  * This file is part of the TinyUSB stack.
  */
 
-/** \ingroup group_usbh
- * \defgroup Group_HCD Host Controller Driver (HCD)
- *  @{ */
-
 #ifndef _TUSB_HCD_H_
 #define _TUSB_HCD_H_
 
-#include <common/tusb_common.h>
+#include "common/tusb_common.h"
 
 #ifdef __cplusplus
  extern "C" {
@@ -85,9 +81,8 @@ typedef struct
 #if TUSB_OPT_HOST_ENABLED
 // Max number of endpoints per device
 enum {
-  HCD_MAX_ENDPOINT = CFG_TUSB_HOST_DEVICE_MAX*(CFG_TUH_HUB + CFG_TUH_HID_KEYBOARD + CFG_TUH_HID_MOUSE + CFG_TUSB_HOST_HID_GENERIC +
-                     CFG_TUH_MSC*2 + CFG_TUH_CDC*3),
-
+  // TODO better computation
+  HCD_MAX_ENDPOINT = CFG_TUSB_HOST_DEVICE_MAX*(CFG_TUH_HUB + CFG_TUH_HID*2 + CFG_TUH_MSC*2 + CFG_TUH_CDC*3),
   HCD_MAX_XFER     = HCD_MAX_ENDPOINT*2,
 };
 
@@ -96,27 +91,46 @@ enum {
 #endif
 
 //--------------------------------------------------------------------+
-// Controller & Port API
+// Controller API
 //--------------------------------------------------------------------+
+
+// Initialize controller to host mode
 bool hcd_init(uint8_t rhport);
+
+// Interrupt Handler
 void hcd_int_handler(uint8_t rhport);
+
+// Enable USB interrupt
 void hcd_int_enable (uint8_t rhport);
+
+// Disable USB interrupt
 void hcd_int_disable(uint8_t rhport);
 
 // Get micro frame number (125 us)
 uint32_t hcd_uframe_number(uint8_t rhport);
 
 // Get frame number (1ms)
-static inline uint32_t hcd_frame_number(uint8_t rhport)
+TU_ATTR_ALWAYS_INLINE static inline
+uint32_t hcd_frame_number(uint8_t rhport)
 {
   return hcd_uframe_number(rhport) >> 3;
 }
 
-/// return the current connect status of roothub port
-bool hcd_port_connect_status(uint8_t hostid);
-void hcd_port_reset(uint8_t hostid);
+//--------------------------------------------------------------------+
+// Port API
+//--------------------------------------------------------------------+
+
+// Get the current connect status of roothub port
+bool hcd_port_connect_status(uint8_t rhport);
+
+// Reset USB bus on the port
+void hcd_port_reset(uint8_t rhport);
+
+// TODO implement later
 void hcd_port_reset_end(uint8_t rhport);
-tusb_speed_t hcd_port_speed_get(uint8_t hostid);
+
+// Get port link speed
+tusb_speed_t hcd_port_speed_get(uint8_t rhport);
 
 // HCD closes all opened endpoints belong to this device
 void hcd_device_close(uint8_t rhport, uint8_t dev_addr);
@@ -124,6 +138,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr);
 //--------------------------------------------------------------------+
 // Endpoints API
 //--------------------------------------------------------------------+
+
 bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]);
 bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
 
@@ -135,14 +150,12 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr);
 bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen);
 
 //--------------------------------------------------------------------+
-// PIPE API
+// PIPE API - TODO remove later
 //--------------------------------------------------------------------+
 // TODO control xfer should be used via usbh layer
 bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes); // only queue, not transferring yet
 bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete);
 
-// tusb_error_t hcd_pipe_cancel();
-
 //--------------------------------------------------------------------+
 // Event API (implemented by stack)
 //--------------------------------------------------------------------+
@@ -164,5 +177,3 @@ extern void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, uint32_t
 #endif
 
 #endif /* _TUSB_HCD_H_ */
-
-/// @}
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/usbh.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/usbh.h
index a05010b3..590c8a35 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/usbh.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/host/usbh.h
@@ -76,7 +76,10 @@ typedef bool (*tuh_control_complete_cb_t)(uint8_t dev_addr, tusb_control_request
 //--------------------------------------------------------------------+
 
 // Init host stack
-bool tuh_init(void);
+bool tuh_init(uint8_t rhport);
+
+// Check if host stack is already initialized
+bool tuh_inited(void);
 
 // Task function should be called in main/rtos loop
 void tuh_task(void);
@@ -85,13 +88,19 @@ void tuh_task(void);
 extern void hcd_int_handler(uint8_t rhport);
 #define tuh_int_handler   hcd_int_handler
 
-tusb_device_state_t tuh_device_get_state (uint8_t dev_addr);
 tusb_speed_t tuh_device_get_speed (uint8_t dev_addr);
-static inline bool tuh_device_is_configured(uint8_t dev_addr)
+
+// Check if device is configured
+bool tuh_device_configured(uint8_t dev_addr);
+
+// Check if device is ready to communicate with
+TU_ATTR_ALWAYS_INLINE
+static inline bool tuh_device_ready(uint8_t dev_addr)
 {
-  return tuh_device_get_state(dev_addr) == TUSB_DEVICE_STATE_CONFIGURED;
+  return tuh_device_configured(dev_addr);
 }
 
+// Carry out control transfer
 bool tuh_control_xfer (uint8_t dev_addr, tusb_control_request_t const* request, void* buffer, tuh_control_complete_cb_t complete_cb);
 
 //--------------------------------------------------------------------+
@@ -121,6 +130,8 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num);
 
 uint8_t usbh_get_rhport(uint8_t dev_addr);
 
+uint8_t* usbh_get_enum_buf(void);
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_freertos.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_freertos.h
index 004bd1b6..66070c27 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_freertos.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_freertos.h
@@ -67,7 +67,7 @@ static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr)
     BaseType_t xHigherPriorityTaskWoken;
     BaseType_t res = xSemaphoreGiveFromISR(sem_hdl, &xHigherPriorityTaskWoken);
 
-#if CFG_TUSB_MCU == OPT_MCU_ESP32S2
+#if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3
     if ( xHigherPriorityTaskWoken ) portYIELD_FROM_ISR();
 #else
     portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
@@ -150,7 +150,7 @@ static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in
     BaseType_t xHigherPriorityTaskWoken;
     BaseType_t res = xQueueSendToBackFromISR(qhdl, data, &xHigherPriorityTaskWoken);
 
-#if CFG_TUSB_MCU == OPT_MCU_ESP32S2
+#if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3
     if ( xHigherPriorityTaskWoken ) portYIELD_FROM_ISR();
 #else
     portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_pico.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_pico.h
index bae1217e..1c3366e0 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_pico.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/osal/osal_pico.h
@@ -57,6 +57,7 @@ static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semde
 
 static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr)
 {
+  (void) in_isr;
   sem_release(sem_hdl);
   return true;
 }
@@ -158,6 +159,7 @@ static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in
   //  however osal_queue_recieve may be. therefore my assumption is that
   //  the fifo mutex is not populated for queues used from an IRQ context
   //assert(!qhdl->ff.mutex);
+  (void) in_isr;
 
   _osal_q_lock(qhdl);
   bool success = tu_fifo_write(&qhdl->ff, data);
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/ehci/hcd_ehci.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/ehci/hcd_ehci.h
new file mode 100644
index 00000000..480d11ed
--- /dev/null
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/portable/ehci/hcd_ehci.h
@@ -0,0 +1,53 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_HCD_EHCI_H_
+#define _TUSB_HCD_EHCI_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+
+//--------------------------------------------------------------------+
+// API Implemented by HCD
+//--------------------------------------------------------------------+
+
+// Get operational address i.e EHCI Command register
+uint32_t hcd_ehci_register_addr(uint8_t rhport);
+
+//--------------------------------------------------------------------+
+// API Implemented by EHCI
+//--------------------------------------------------------------------+
+
+// Initialize EHCI driver
+extern bool hcd_ehci_init (uint8_t rhport);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb.h
index cc82c440..2b1d7483 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -42,7 +42,7 @@
 #if TUSB_OPT_HOST_ENABLED
   #include "host/usbh.h"
 
-  #if HOST_CLASS_HID
+  #if CFG_TUH_HID
     #include "class/hid/hid_host.h"
   #endif
 
@@ -96,6 +96,10 @@
     #include "class/dfu/dfu_rt_device.h"
   #endif
 
+  #if CFG_TUD_DFU_MODE
+    #include "class/dfu/dfu_device.h"
+  #endif
+
   #if CFG_TUD_NET
     #include "class/net/net_device.h"
   #endif
diff --git a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb_option.h b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb_option.h
index 7585a9ff..b317f763 100644
--- a/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb_option.h
+++ b/tools/sdk/esp32s2/include/arduino_tinyusb/tinyusb/src/tusb_option.h
@@ -94,6 +94,7 @@
 
 // Espressif
 #define OPT_MCU_ESP32S2           900 ///< Espressif ESP32-S2
+#define OPT_MCU_ESP32S3           901 ///< Espressif ESP32-S3
 
 // Dialog
 #define OPT_MCU_DA1469X          1000 ///< Dialog Semiconductor DA1469x
@@ -240,7 +241,15 @@
 #endif
 
 #ifndef CFG_TUD_DFU_RUNTIME
-  #define CFG_TUD_DFU_RUNTIME          0
+  #define CFG_TUD_DFU_RUNTIME     0
+#endif
+
+#ifndef CFG_TUD_DFU_MODE
+  #define CFG_TUD_DFU_MODE        0
+#endif
+
+#ifndef CFG_TUD_DFU_TRANSFER_BUFFER_SIZE
+  #define CFG_TUD_DFU_TRANSFER_BUFFER_SIZE  64
 #endif
 
 #ifndef CFG_TUD_NET
@@ -265,11 +274,8 @@
     #error there is no benefit enable hub with max device is 1. Please disable hub or increase CFG_TUSB_HOST_DEVICE_MAX
   #endif
 
-  //------------- HID CLASS -------------//
-  #define HOST_CLASS_HID   ( CFG_TUH_HID_KEYBOARD + CFG_TUH_HID_MOUSE + CFG_TUSB_HOST_HID_GENERIC )
-
-  #ifndef CFG_TUSB_HOST_ENUM_BUFFER_SIZE
-    #define CFG_TUSB_HOST_ENUM_BUFFER_SIZE 256
+  #ifndef CFG_TUH_ENUMERATION_BUFSZIE
+    #define CFG_TUH_ENUMERATION_BUFSZIE 256
   #endif
 
   //------------- CLASS -------------//
@@ -282,6 +288,7 @@
 
 // TUP_ARCH_STRICT_ALIGN if arch cannot access unaligned memory
 
+
 // ARMv7+ (M3-M7, M23-M33) can access unaligned memory
 #if (defined(__ARM_ARCH) && (__ARM_ARCH >= 7))
   #define TUP_ARCH_STRICT_ALIGN   0
@@ -289,6 +296,16 @@
   #define TUP_ARCH_STRICT_ALIGN   1
 #endif
 
+// TUP_MCU_STRICT_ALIGN will overwrite TUP_ARCH_STRICT_ALIGN.
+// In case TUP_MCU_STRICT_ALIGN = 1 and TUP_ARCH_STRICT_ALIGN =0, we will not reply on compiler
+// to generate unaligned access code.
+// LPC_IP3511 Highspeed cannot access unaligned memory on USB_RAM
+#if TUD_OPT_HIGH_SPEED && (CFG_TUSB_MCU == OPT_MCU_LPC54XXX || CFG_TUSB_MCU == OPT_MCU_LPC55XX)
+  #define TUP_MCU_STRICT_ALIGN   1
+#else
+  #define TUP_MCU_STRICT_ALIGN   0
+#endif
+
 //------------------------------------------------------------------
 // Configuration Validation
 //------------------------------------------------------------------
diff --git a/tools/sdk/esp32s2/include/bootloader_support/include/bootloader_random.h b/tools/sdk/esp32s2/include/bootloader_support/include/bootloader_random.h
index 98a7712f..0c7b61eb 100644
--- a/tools/sdk/esp32s2/include/bootloader_support/include/bootloader_random.h
+++ b/tools/sdk/esp32s2/include/bootloader_support/include/bootloader_random.h
@@ -24,13 +24,14 @@ extern "C" {
  * @brief Enable early entropy source for RNG
  *
  * Uses the SAR ADC to feed entropy into the HWRNG. The ADC is put
- * into a test mode that reads the 1.1V internal reference source and
- * feeds the LSB of data into the HWRNG.
+ * into a test mode that reads an internal reference voltage and
+ * constantly feeds the LSB of data into the HWRNG. Consult the
+ * SoC Technical Reference Manual for more information.
  *
- * Can also be used from app code early during operation, if entropy
- * is required before WiFi stack is initialised. Call this function
- * from app code only if WiFi/BT are not yet enabled and I2S and SAR
- * ADC are not in use.
+ * Can also be used from app code early during operation, if true
+ * random numbers are required before WiFi stack is initialised.
+ * Call this function from app code only if WiFi/BT are not yet
+ * enabled and I2S and ADC are not in use.
  *
  * Call bootloader_random_disable() when done.
  */
diff --git a/tools/sdk/esp32s2/include/config/sdkconfig.h b/tools/sdk/esp32s2/include/config/sdkconfig.h
index fc425af3..deb45346 100644
--- a/tools/sdk/esp32s2/include/config/sdkconfig.h
+++ b/tools/sdk/esp32s2/include/config/sdkconfig.h
@@ -70,11 +70,9 @@
 #define CONFIG_TINYUSB_MSC_ENABLED 1
 #define CONFIG_TINYUSB_DESC_MSC_STRING "Espressif MSC Device"
 #define CONFIG_TINYUSB_MSC_BUFSIZE 512
-#define CONFIG_USB_HID_ENABLED 1
-#define CONFIG_TINYUSB_MIDI_ENABLED 1
-#define CONFIG_TINYUSB_DESC_MIDI_STRING "Espressif MIDI Device"
-#define CONFIG_TINYUSB_MIDI_RX_BUFSIZE 64
-#define CONFIG_TINYUSB_MIDI_TX_BUFSIZE 64
+#define CONFIG_TINYUSB_HID_ENABLED 1
+#define CONFIG_TINYUSB_DESC_HID_STRING "Espressif HID Device"
+#define CONFIG_TINYUSB_HID_BUFSIZE 64
 #define CONFIG_TINYUSB_DFU_RT_ENABLED 1
 #define CONFIG_TINYUSB_DESC_DFU_RT_STRING "Espressif DFU Device"
 #define CONFIG_TINYUSB_VENDOR_ENABLED 1
@@ -218,8 +216,6 @@
 #define CONFIG_ESP32_WIFI_NVS_ENABLED 1
 #define CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN 752
 #define CONFIG_ESP32_WIFI_MGMT_SBUF_NUM 32
-#define CONFIG_ESP_WIFI_FTM_INITIATOR_SUPPORT 1
-#define CONFIG_ESP_WIFI_FTM_RESPONDER_SUPPORT 1
 #define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER 20
 #define CONFIG_ESP32_PHY_MAX_TX_POWER 20
 #define CONFIG_ESP_COREDUMP_ENABLE_TO_NONE 1
@@ -278,6 +274,8 @@
 #define CONFIG_LIBSODIUM_USE_MBEDTLS_SHA 1
 #define CONFIG_LOG_DEFAULT_LEVEL_ERROR 1
 #define CONFIG_LOG_DEFAULT_LEVEL 1
+#define CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT 1
+#define CONFIG_LOG_MAXIMUM_LEVEL 1
 #define CONFIG_LOG_TIMESTAMP_SOURCE_RTOS 1
 #define CONFIG_LWIP_LOCAL_HOSTNAME "espressif"
 #define CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES 1
@@ -296,6 +294,7 @@
 #define CONFIG_LWIP_DHCPS_LEASE_UNIT 60
 #define CONFIG_LWIP_DHCPS_MAX_STATION_NUM 8
 #define CONFIG_LWIP_IPV6 1
+#define CONFIG_LWIP_IPV6_NUM_ADDRESSES 3
 #define CONFIG_LWIP_NETIF_LOOPBACK 1
 #define CONFIG_LWIP_LOOPBACK_MAX_PBUFS 8
 #define CONFIG_LWIP_MAX_ACTIVE_TCP 16
@@ -332,6 +331,7 @@
 #define CONFIG_LWIP_ESP_LWIP_ASSERT 1
 #define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
 #define CONFIG_LWIP_HOOK_IP6_ROUTE_NONE 1
+#define CONFIG_LWIP_HOOK_ND6_GET_GW_NONE 1
 #define CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE 1
 #define CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC 1
 #define CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN 16384
@@ -340,6 +340,7 @@
 #define CONFIG_MBEDTLS_HARDWARE_AES 1
 #define CONFIG_MBEDTLS_AES_USE_INTERRUPT 1
 #define CONFIG_MBEDTLS_HARDWARE_GCM 1
+#define CONFIG_MBEDTLS_ROM_MD5 1
 #define CONFIG_MBEDTLS_HAVE_TIME 1
 #define CONFIG_MBEDTLS_ECDSA_DETERMINISTIC 1
 #define CONFIG_MBEDTLS_SHA512_C 1
@@ -459,6 +460,13 @@
 #define CONFIG_MFN56_1X 1
 #define CONFIG_HD_NANO1 1
 #define CONFIG_HP_NANO1 1
+#define CONFIG_OV7670_SUPPORT 1
+#define CONFIG_NT99141_SUPPORT 1
+#define CONFIG_OV2640_SUPPORT 1
+#define CONFIG_OV3660_SUPPORT 1
+#define CONFIG_OV5640_SUPPORT 1
+#define CONFIG_SCCB_HARDWARE_I2C_PORT1 1
+#define CONFIG_CAMERA_CORE0 1
 #define CONFIG_LITTLEFS_MAX_PARTITIONS 3
 #define CONFIG_LITTLEFS_PAGE_SIZE 256
 #define CONFIG_LITTLEFS_OBJ_NAME_LEN 64
@@ -549,5 +557,5 @@
 #define CONFIG_TOOLPREFIX CONFIG_SDK_TOOLPREFIX
 #define CONFIG_UDP_RECVMBOX_SIZE CONFIG_LWIP_UDP_RECVMBOX_SIZE
 #define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
-#define CONFIG_ARDUINO_IDF_COMMIT "cf457d412"
+#define CONFIG_ARDUINO_IDF_COMMIT "c13afea63"
 #define CONFIG_ARDUINO_IDF_BRANCH "master"
diff --git a/tools/sdk/esp32s2/include/driver/include/driver/adc_common.h b/tools/sdk/esp32s2/include/driver/include/driver/adc_common.h
index e38da915..f083b32d 100644
--- a/tools/sdk/esp32s2/include/driver/include/driver/adc_common.h
+++ b/tools/sdk/esp32s2/include/driver/include/driver/adc_common.h
@@ -49,8 +49,8 @@ typedef enum {
     ADC1_CHANNEL_5,     /*!< ADC1 channel 5 is GPIO6  */
     ADC1_CHANNEL_6,     /*!< ADC1 channel 6 is GPIO7  */
     ADC1_CHANNEL_7,     /*!< ADC1 channel 7 is GPIO8  */
-    ADC1_CHANNEL_8,     /*!< ADC1 channel 6 is GPIO9  */
-    ADC1_CHANNEL_9,     /*!< ADC1 channel 7 is GPIO10 */
+    ADC1_CHANNEL_8,     /*!< ADC1 channel 8 is GPIO9  */
+    ADC1_CHANNEL_9,     /*!< ADC1 channel 9 is GPIO10 */
     ADC1_CHANNEL_MAX,
 } adc1_channel_t;
 #elif CONFIG_IDF_TARGET_ESP32C3
@@ -135,7 +135,7 @@ typedef enum {
  * @brief Digital ADC DMA configuration
  */
 typedef struct adc_digi_init_config_s {
-    uint32_t max_store_buf_size;    ///< Max length of the converted data that driver can store before they are processed. When this length is reached, driver will dump out all the old data and start to store them again.
+    uint32_t max_store_buf_size;    ///< Max length of the converted data that driver can store before they are processed.
     uint32_t conv_num_each_intr;    ///< Bytes of data that can be converted in 1 interrupt.
     uint32_t adc1_chan_mask;        ///< Channel list of ADC1 to be initialized.
     uint32_t adc2_chan_mask;        ///< Channel list of ADC2 to be initialized.
diff --git a/tools/sdk/esp32s2/include/driver/include/driver/gpio.h b/tools/sdk/esp32s2/include/driver/include/driver/gpio.h
index aac81566..3e497e04 100644
--- a/tools/sdk/esp32s2/include/driver/include/driver/gpio.h
+++ b/tools/sdk/esp32s2/include/driver/include/driver/gpio.h
@@ -35,6 +35,8 @@
 #include "esp32s3/rom/gpio.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/gpio.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/rom/gpio.h"
 #endif
 
 #ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
@@ -215,9 +217,9 @@ esp_err_t gpio_wakeup_disable(gpio_num_t gpio_num);
  * per-GPIO ISRs.
  *
  * @param  fn  Interrupt handler function.
+ * @param  arg  Parameter for handler function
  * @param  intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
  *            ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
- * @param  arg  Parameter for handler function
  * @param  handle Pointer to return handle. If non-NULL, a handle for the interrupt will be returned here.
  *
  * \verbatim embed:rst:leading-asterisk
diff --git a/tools/sdk/esp32s2/include/driver/include/driver/ledc.h b/tools/sdk/esp32s2/include/driver/include/driver/ledc.h
index 2ffcbd74..69660f3d 100644
--- a/tools/sdk/esp32s2/include/driver/include/driver/ledc.h
+++ b/tools/sdk/esp32s2/include/driver/include/driver/ledc.h
@@ -76,6 +76,7 @@ esp_err_t ledc_update_duty(ledc_mode_t speed_mode, ledc_channel_t channel);
 
 /**
  * @brief Set LEDC output gpio.
+ * @deprecated This function is redundant, please use ledc_channel_config to set gpio pins.
  *
  * @param  gpio_num The LEDC output gpio
  * @param  speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
@@ -85,8 +86,8 @@ esp_err_t ledc_update_duty(ledc_mode_t speed_mode, ledc_channel_t channel);
  *     - ESP_OK Success
  *     - ESP_ERR_INVALID_ARG Parameter error
  */
-esp_err_t ledc_set_pin(int gpio_num, ledc_mode_t speed_mode, ledc_channel_t ledc_channel);
-
+esp_err_t ledc_set_pin(int gpio_num, ledc_mode_t speed_mode, ledc_channel_t ledc_channel)
+    __attribute__((deprecated("use ledc_channel_config instead")));
 /**
  * @brief LEDC stop.
  *        Disable LEDC output, and set idle level
diff --git a/tools/sdk/esp32s2/include/driver/include/driver/mcpwm.h b/tools/sdk/esp32s2/include/driver/include/driver/mcpwm.h
index f4ec17a2..c19b80e4 100644
--- a/tools/sdk/esp32s2/include/driver/include/driver/mcpwm.h
+++ b/tools/sdk/esp32s2/include/driver/include/driver/mcpwm.h
@@ -568,6 +568,7 @@ esp_err_t mcpwm_fault_deinit(mcpwm_unit_t mcpwm_num, mcpwm_fault_signal_t fault_
  * @param cap_edge set capture edge, BIT(0) - negative edge, BIT(1) - positive edge
  * @param cap_sig capture pin, which needs to be enabled
  * @param num_of_pulse count time between rising/falling edge between 2 *(pulses mentioned), counter uses APB_CLK
+ *                     [0~MCPWM_LL_MAX_PRESCALE] (MCPWM_LL_MAX_PRESCALE = 255 on ESP32);
  *
  * @return
  *     - ESP_OK Success
diff --git a/tools/sdk/esp32s2/include/driver/include/driver/spi_slave_hd.h b/tools/sdk/esp32s2/include/driver/include/driver/spi_slave_hd.h
index 7e9289fb..b99d6fea 100644
--- a/tools/sdk/esp32s2/include/driver/include/driver/spi_slave_hd.h
+++ b/tools/sdk/esp32s2/include/driver/include/driver/spi_slave_hd.h
@@ -58,7 +58,9 @@ typedef enum {
 typedef struct {
     slave_cb_t cb_buffer_tx;                    ///< Callback when master reads from shared buffer
     slave_cb_t cb_buffer_rx;                    ///< Callback when master writes to shared buffer
+    slave_cb_t cb_send_dma_ready;               ///< Callback when TX data buffer is loaded to the hardware (DMA)
     slave_cb_t cb_sent;                         ///< Callback when data are sent
+    slave_cb_t cb_recv_dma_ready;               ///< Callback when RX data buffer is loaded to the hardware (DMA)
     slave_cb_t cb_recv;                         ///< Callback when data are received
     slave_cb_t cb_cmd9;                         ///< Callback when CMD9 received
     slave_cb_t cb_cmdA;                         ///< Callback when CMDA received
diff --git a/tools/sdk/esp32s2/include/driver/include/driver/timer.h b/tools/sdk/esp32s2/include/driver/include/driver/timer.h
index 1a4c074a..609d1006 100644
--- a/tools/sdk/esp32s2/include/driver/include/driver/timer.h
+++ b/tools/sdk/esp32s2/include/driver/include/driver/timer.h
@@ -432,6 +432,8 @@ void timer_group_clr_intr_sta_in_isr(timer_group_t group_num, timer_intr_t intr_
 bool timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer_idx_t timer_num);
 
 /** @brief Take timer spinlock to enter critical protect
+ *
+ *  @note Deprecated, the recommended way is to use ISR callbacks instead, see timer_group_example_main
  *
  * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
  *
@@ -439,9 +441,11 @@ bool timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer_idx_t tim
  *     - ESP_OK Success
  *     - ESP_ERR_INVALID_ARG Parameter error
  */
-esp_err_t timer_spinlock_take(timer_group_t group_num);
+esp_err_t timer_spinlock_take(timer_group_t group_num) __attribute__ ((deprecated));
 
 /** @brief Give timer spinlock to exit critical protect
+ *
+ *  @note Deprecated, the recommended way is to use ISR callbacks instead, see timer_group_example_main
  *
  * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
  *
@@ -449,7 +453,7 @@ esp_err_t timer_spinlock_take(timer_group_t group_num);
  *     - ESP_OK Success
  *     - ESP_ERR_INVALID_ARG Parameter error
  */
-esp_err_t timer_spinlock_give(timer_group_t group_num);
+esp_err_t timer_spinlock_give(timer_group_t group_num) __attribute__ ((deprecated));
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32s2/include/driver/include/esp_private/gdma.h b/tools/sdk/esp32s2/include/driver/include/esp_private/gdma.h
index dc27f582..2614a2d0 100644
--- a/tools/sdk/esp32s2/include/driver/include/esp_private/gdma.h
+++ b/tools/sdk/esp32s2/include/driver/include/esp_private/gdma.h
@@ -155,6 +155,7 @@ esp_err_t gdma_new_channel(const gdma_channel_alloc_config_t *config, gdma_chann
  * @brief Connect GDMA channel to trigger peripheral
  *
  * @note Suggest to use helper macro `GDMA_MAKE_TRIGGER` to construct parameter `trig_periph`. e.g. GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SHA,0)
+ * @note Connecting to a peripheral will also reset the DMA FIFO and FSM automatically
  *
  * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
  * @param[in] trig_periph GDMA trigger peripheral
@@ -279,6 +280,18 @@ esp_err_t gdma_stop(gdma_channel_handle_t dma_chan);
  */
 esp_err_t gdma_append(gdma_channel_handle_t dma_chan);
 
+/**
+ * @brief Reset DMA channel FIFO and internal finite state machine
+ * @note Resetting a DMA channel won't break the connection with the target peripheral
+ *
+ * @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
+ * @return
+ *      - ESP_OK: DMA channel reset successfully
+ *      - ESP_ERR_INVALID_ARG: DMA channel reset failed due to invalid arguments
+ *      - ESP_FAIL: DMA channel reset failed due to other errors
+ */
+esp_err_t gdma_reset(gdma_channel_handle_t dma_chan);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/esp32-camera/conversions/include/esp_jpg_decode.h b/tools/sdk/esp32s2/include/esp32-camera/conversions/include/esp_jpg_decode.h
new file mode 100644
index 00000000..f13536ed
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp32-camera/conversions/include/esp_jpg_decode.h
@@ -0,0 +1,43 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _ESP_JPG_DECODE_H_
+#define _ESP_JPG_DECODE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+
+typedef enum {
+    JPG_SCALE_NONE,
+    JPG_SCALE_2X,
+    JPG_SCALE_4X,
+    JPG_SCALE_8X,
+    JPG_SCALE_MAX = JPG_SCALE_8X
+} jpg_scale_t;
+
+typedef size_t (* jpg_reader_cb)(void * arg, size_t index, uint8_t *buf, size_t len);
+typedef bool (* jpg_writer_cb)(void * arg, uint16_t x, uint16_t y, uint16_t w, uint16_t h, uint8_t *data);
+
+esp_err_t esp_jpg_decode(size_t len, jpg_scale_t scale, jpg_reader_cb reader, jpg_writer_cb writer, void * arg);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_JPG_DECODE_H_ */
diff --git a/tools/sdk/esp32s2/include/esp32-camera/conversions/include/img_converters.h b/tools/sdk/esp32s2/include/esp32-camera/conversions/include/img_converters.h
new file mode 100644
index 00000000..f736200a
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp32-camera/conversions/include/img_converters.h
@@ -0,0 +1,130 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef _IMG_CONVERTERS_H_
+#define _IMG_CONVERTERS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_camera.h"
+#include "esp_jpg_decode.h"
+
+typedef size_t (* jpg_out_cb)(void * arg, size_t index, const void* data, size_t len);
+
+/**
+ * @brief Convert image buffer to JPEG
+ *
+ * @param src       Source buffer in RGB565, RGB888, YUYV or GRAYSCALE format
+ * @param src_len   Length in bytes of the source buffer
+ * @param width     Width in pixels of the source image
+ * @param height    Height in pixels of the source image
+ * @param format    Format of the source image
+ * @param quality   JPEG quality of the resulting image
+ * @param cp        Callback to be called to write the bytes of the output JPEG
+ * @param arg       Pointer to be passed to the callback
+ *
+ * @return true on success
+ */
+bool fmt2jpg_cb(uint8_t *src, size_t src_len, uint16_t width, uint16_t height, pixformat_t format, uint8_t quality, jpg_out_cb cb, void * arg);
+
+/**
+ * @brief Convert camera frame buffer to JPEG
+ *
+ * @param fb        Source camera frame buffer
+ * @param quality   JPEG quality of the resulting image
+ * @param cp        Callback to be called to write the bytes of the output JPEG
+ * @param arg       Pointer to be passed to the callback
+ *
+ * @return true on success
+ */
+bool frame2jpg_cb(camera_fb_t * fb, uint8_t quality, jpg_out_cb cb, void * arg);
+
+/**
+ * @brief Convert image buffer to JPEG buffer
+ *
+ * @param src       Source buffer in RGB565, RGB888, YUYV or GRAYSCALE format
+ * @param src_len   Length in bytes of the source buffer
+ * @param width     Width in pixels of the source image
+ * @param height    Height in pixels of the source image
+ * @param format    Format of the source image
+ * @param quality   JPEG quality of the resulting image
+ * @param out       Pointer to be populated with the address of the resulting buffer.
+ *                  You MUST free the pointer once you are done with it.
+ * @param out_len   Pointer to be populated with the length of the output buffer
+ *
+ * @return true on success
+ */
+bool fmt2jpg(uint8_t *src, size_t src_len, uint16_t width, uint16_t height, pixformat_t format, uint8_t quality, uint8_t ** out, size_t * out_len);
+
+/**
+ * @brief Convert camera frame buffer to JPEG buffer
+ *
+ * @param fb        Source camera frame buffer
+ * @param quality   JPEG quality of the resulting image
+ * @param out       Pointer to be populated with the address of the resulting buffer
+ * @param out_len   Pointer to be populated with the length of the output buffer
+ *
+ * @return true on success
+ */
+bool frame2jpg(camera_fb_t * fb, uint8_t quality, uint8_t ** out, size_t * out_len);
+
+/**
+ * @brief Convert image buffer to BMP buffer
+ *
+ * @param src       Source buffer in JPEG, RGB565, RGB888, YUYV or GRAYSCALE format
+ * @param src_len   Length in bytes of the source buffer
+ * @param width     Width in pixels of the source image
+ * @param height    Height in pixels of the source image
+ * @param format    Format of the source image
+ * @param out       Pointer to be populated with the address of the resulting buffer
+ * @param out_len   Pointer to be populated with the length of the output buffer
+ *
+ * @return true on success
+ */
+bool fmt2bmp(uint8_t *src, size_t src_len, uint16_t width, uint16_t height, pixformat_t format, uint8_t ** out, size_t * out_len);
+
+/**
+ * @brief Convert camera frame buffer to BMP buffer
+ *
+ * @param fb        Source camera frame buffer
+ * @param out       Pointer to be populated with the address of the resulting buffer
+ * @param out_len   Pointer to be populated with the length of the output buffer
+ *
+ * @return true on success
+ */
+bool frame2bmp(camera_fb_t * fb, uint8_t ** out, size_t * out_len);
+
+/**
+ * @brief Convert image buffer to RGB888 buffer (used for face detection)
+ *
+ * @param src       Source buffer in JPEG, RGB565, RGB888, YUYV or GRAYSCALE format
+ * @param src_len   Length in bytes of the source buffer
+ * @param format    Format of the source image
+ * @param rgb_buf   Pointer to the output buffer (width * height * 3)
+ *
+ * @return true on success
+ */
+bool fmt2rgb888(const uint8_t *src_buf, size_t src_len, pixformat_t format, uint8_t * rgb_buf);
+
+bool jpg2rgb565(const uint8_t *src, size_t src_len, uint8_t * out, jpg_scale_t scale);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _IMG_CONVERTERS_H_ */
diff --git a/tools/sdk/esp32s2/include/esp32-camera/driver/include/esp_camera.h b/tools/sdk/esp32s2/include/esp32-camera/driver/include/esp_camera.h
new file mode 100755
index 00000000..46d9cf16
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp32-camera/driver/include/esp_camera.h
@@ -0,0 +1,205 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+/*
+ * Example Use
+ *
+    static camera_config_t camera_example_config = {
+        .pin_pwdn       = PIN_PWDN,
+        .pin_reset      = PIN_RESET,
+        .pin_xclk       = PIN_XCLK,
+        .pin_sscb_sda   = PIN_SIOD,
+        .pin_sscb_scl   = PIN_SIOC,
+        .pin_d7         = PIN_D7,
+        .pin_d6         = PIN_D6,
+        .pin_d5         = PIN_D5,
+        .pin_d4         = PIN_D4,
+        .pin_d3         = PIN_D3,
+        .pin_d2         = PIN_D2,
+        .pin_d1         = PIN_D1,
+        .pin_d0         = PIN_D0,
+        .pin_vsync      = PIN_VSYNC,
+        .pin_href       = PIN_HREF,
+        .pin_pclk       = PIN_PCLK,
+
+        .xclk_freq_hz   = 20000000,
+        .ledc_timer     = LEDC_TIMER_0,
+        .ledc_channel   = LEDC_CHANNEL_0,
+        .pixel_format   = PIXFORMAT_JPEG,
+        .frame_size     = FRAMESIZE_SVGA,
+        .jpeg_quality   = 10,
+        .fb_count       = 2,
+        .grab_mode      = CAMERA_GRAB_WHEN_EMPTY
+    };
+
+    esp_err_t camera_example_init(){
+        return esp_camera_init(&camera_example_config);
+    }
+
+    esp_err_t camera_example_capture(){
+        //capture a frame
+        camera_fb_t * fb = esp_camera_fb_get();
+        if (!fb) {
+            ESP_LOGE(TAG, "Frame buffer could not be acquired");
+            return ESP_FAIL;
+        }
+
+        //replace this with your own function
+        display_image(fb->width, fb->height, fb->pixformat, fb->buf, fb->len);
+
+        //return the frame buffer back to be reused
+        esp_camera_fb_return(fb);
+
+        return ESP_OK;
+    }
+*/
+
+#pragma once
+
+#include "esp_err.h"
+#include "driver/ledc.h"
+#include "sensor.h"
+#include "sys/time.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Configuration structure for camera initialization
+ */
+typedef enum {
+    CAMERA_GRAB_WHEN_EMPTY,         /*!< Fills buffers when they are empty. Less resources but first 'fb_count' frames might be old */
+    CAMERA_GRAB_LATEST              /*!< Except when 1 frame buffer is used, queue will always contain the last 'fb_count' frames */
+} camera_grab_mode_t;
+
+/**
+ * @brief Configuration structure for camera initialization
+ */
+typedef struct {
+    int pin_pwdn;                   /*!< GPIO pin for camera power down line */
+    int pin_reset;                  /*!< GPIO pin for camera reset line */
+    int pin_xclk;                   /*!< GPIO pin for camera XCLK line */
+    int pin_sscb_sda;               /*!< GPIO pin for camera SDA line */
+    int pin_sscb_scl;               /*!< GPIO pin for camera SCL line */
+    int pin_d7;                     /*!< GPIO pin for camera D7 line */
+    int pin_d6;                     /*!< GPIO pin for camera D6 line */
+    int pin_d5;                     /*!< GPIO pin for camera D5 line */
+    int pin_d4;                     /*!< GPIO pin for camera D4 line */
+    int pin_d3;                     /*!< GPIO pin for camera D3 line */
+    int pin_d2;                     /*!< GPIO pin for camera D2 line */
+    int pin_d1;                     /*!< GPIO pin for camera D1 line */
+    int pin_d0;                     /*!< GPIO pin for camera D0 line */
+    int pin_vsync;                  /*!< GPIO pin for camera VSYNC line */
+    int pin_href;                   /*!< GPIO pin for camera HREF line */
+    int pin_pclk;                   /*!< GPIO pin for camera PCLK line */
+
+    int xclk_freq_hz;               /*!< Frequency of XCLK signal, in Hz. Either 20KHz or 10KHz for OV2640 double FPS (Experimental) */
+
+    ledc_timer_t ledc_timer;        /*!< LEDC timer to be used for generating XCLK  */
+    ledc_channel_t ledc_channel;    /*!< LEDC channel to be used for generating XCLK  */
+
+    pixformat_t pixel_format;       /*!< Format of the pixel data: PIXFORMAT_ + YUV422|GRAYSCALE|RGB565|JPEG  */
+    framesize_t frame_size;         /*!< Size of the output image: FRAMESIZE_ + QVGA|CIF|VGA|SVGA|XGA|SXGA|UXGA  */
+
+    int jpeg_quality;               /*!< Quality of JPEG output. 0-63 lower means higher quality  */
+    size_t fb_count;                /*!< Number of frame buffers to be allocated. If more than one, then each frame will be acquired (double speed)  */
+    camera_grab_mode_t grab_mode;   /*!< When buffers should be filled */
+} camera_config_t;
+
+/**
+ * @brief Data structure of camera frame buffer
+ */
+typedef struct {
+    uint8_t * buf;              /*!< Pointer to the pixel data */
+    size_t len;                 /*!< Length of the buffer in bytes */
+    size_t width;               /*!< Width of the buffer in pixels */
+    size_t height;              /*!< Height of the buffer in pixels */
+    pixformat_t format;         /*!< Format of the pixel data */
+    struct timeval timestamp;   /*!< Timestamp since boot of the first DMA buffer of the frame */
+} camera_fb_t;
+
+#define ESP_ERR_CAMERA_BASE 0x20000
+#define ESP_ERR_CAMERA_NOT_DETECTED             (ESP_ERR_CAMERA_BASE + 1)
+#define ESP_ERR_CAMERA_FAILED_TO_SET_FRAME_SIZE (ESP_ERR_CAMERA_BASE + 2)
+#define ESP_ERR_CAMERA_FAILED_TO_SET_OUT_FORMAT (ESP_ERR_CAMERA_BASE + 3)
+#define ESP_ERR_CAMERA_NOT_SUPPORTED            (ESP_ERR_CAMERA_BASE + 4)
+
+/**
+ * @brief Initialize the camera driver
+ *
+ * @note call camera_probe before calling this function
+ *
+ * This function detects and configures camera over I2C interface,
+ * allocates framebuffer and DMA buffers,
+ * initializes parallel I2S input, and sets up DMA descriptors.
+ *
+ * Currently this function can only be called once and there is
+ * no way to de-initialize this module.
+ *
+ * @param config  Camera configuration parameters
+ *
+ * @return ESP_OK on success
+ */
+esp_err_t esp_camera_init(const camera_config_t* config);
+
+/**
+ * @brief Deinitialize the camera driver
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_STATE if the driver hasn't been initialized yet
+ */
+esp_err_t esp_camera_deinit();
+
+/**
+ * @brief Obtain pointer to a frame buffer.
+ *
+ * @return pointer to the frame buffer
+ */
+camera_fb_t* esp_camera_fb_get();
+
+/**
+ * @brief Return the frame buffer to be reused again.
+ *
+ * @param fb    Pointer to the frame buffer
+ */
+void esp_camera_fb_return(camera_fb_t * fb);
+
+/**
+ * @brief Get a pointer to the image sensor control structure
+ *
+ * @return pointer to the sensor
+ */
+sensor_t * esp_camera_sensor_get();
+
+/**
+ * @brief Save camera settings to non-volatile-storage (NVS)
+ * 
+ * @param key   A unique nvs key name for the camera settings 
+ */
+esp_err_t esp_camera_save_to_nvs(const char *key);
+
+/**
+ * @brief Load camera settings from non-volatile-storage (NVS)
+ * 
+ * @param key   A unique nvs key name for the camera settings 
+ */
+esp_err_t esp_camera_load_from_nvs(const char *key);
+
+#ifdef __cplusplus
+}
+#endif
+
+#include "img_converters.h"
+
diff --git a/tools/sdk/esp32s2/include/esp32-camera/driver/include/sensor.h b/tools/sdk/esp32s2/include/esp32-camera/driver/include/sensor.h
new file mode 100755
index 00000000..ac54731e
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp32-camera/driver/include/sensor.h
@@ -0,0 +1,234 @@
+/*
+ * This file is part of the OpenMV project.
+ * Copyright (c) 2013/2014 Ibrahim Abdelkader <i.abdalkader@gmail.com>
+ * This work is licensed under the MIT license, see the file LICENSE for details.
+ *
+ * Sensor abstraction layer.
+ *
+ */
+#ifndef __SENSOR_H__
+#define __SENSOR_H__
+#include <stdint.h>
+#include <stdbool.h>
+
+// Chip ID Registers
+#define REG_PID        0x0A
+#define REG_VER        0x0B
+#define REG_MIDH       0x1C
+#define REG_MIDL       0x1D
+
+#define REG16_CHIDH     0x300A
+#define REG16_CHIDL     0x300B
+
+typedef enum {
+    OV9650_PID = 0x96,
+    OV7725_PID = 0x77,
+    OV2640_PID = 0x26,
+    OV3660_PID = 0x36,
+    OV5640_PID = 0x56,
+    OV7670_PID = 0x76,
+    NT99141_PID = 0x14
+} camera_pid_t;
+
+typedef enum {
+    CAMERA_OV7725,
+    CAMERA_OV2640,
+    CAMERA_OV3660,
+    CAMERA_OV5640,
+    CAMERA_OV7670,
+    CAMERA_NT99141,
+    CAMERA_MODEL_MAX,
+    CAMERA_NONE,
+    CAMERA_UNKNOWN
+} camera_model_t;
+
+typedef enum {
+    OV2640_SCCB_ADDR   = 0x30,
+    OV5640_SCCB_ADDR   = 0x3C,
+    OV3660_SCCB_ADDR   = 0x3C,
+    OV7725_SCCB_ADDR   = 0x21,
+    OV7670_SCCB_ADDR   = 0x21,
+    NT99141_SCCB_ADDR  = 0x2A,
+} camera_sccb_addr_t;
+
+typedef enum {
+    PIXFORMAT_RGB565,    // 2BPP/RGB565
+    PIXFORMAT_YUV422,    // 2BPP/YUV422
+    PIXFORMAT_GRAYSCALE, // 1BPP/GRAYSCALE
+    PIXFORMAT_JPEG,      // JPEG/COMPRESSED
+    PIXFORMAT_RGB888,    // 3BPP/RGB888
+    PIXFORMAT_RAW,       // RAW
+    PIXFORMAT_RGB444,    // 3BP2P/RGB444
+    PIXFORMAT_RGB555,    // 3BP2P/RGB555
+} pixformat_t;
+
+typedef enum {
+    FRAMESIZE_96X96,    // 96x96
+    FRAMESIZE_QQVGA,    // 160x120
+    FRAMESIZE_QCIF,     // 176x144
+    FRAMESIZE_HQVGA,    // 240x176
+    FRAMESIZE_240X240,  // 240x240
+    FRAMESIZE_QVGA,     // 320x240
+    FRAMESIZE_CIF,      // 400x296
+    FRAMESIZE_HVGA,     // 480x320
+    FRAMESIZE_VGA,      // 640x480
+    FRAMESIZE_SVGA,     // 800x600
+    FRAMESIZE_XGA,      // 1024x768
+    FRAMESIZE_HD,       // 1280x720
+    FRAMESIZE_SXGA,     // 1280x1024
+    FRAMESIZE_UXGA,     // 1600x1200
+    // 3MP Sensors
+    FRAMESIZE_FHD,      // 1920x1080
+    FRAMESIZE_P_HD,     //  720x1280
+    FRAMESIZE_P_3MP,    //  864x1536
+    FRAMESIZE_QXGA,     // 2048x1536
+    // 5MP Sensors
+    FRAMESIZE_QHD,      // 2560x1440
+    FRAMESIZE_WQXGA,    // 2560x1600
+    FRAMESIZE_P_FHD,    // 1080x1920
+    FRAMESIZE_QSXGA,    // 2560x1920
+    FRAMESIZE_INVALID
+} framesize_t;
+
+typedef struct {
+    const camera_model_t model;
+    const camera_sccb_addr_t sccb_addr;
+    const camera_pid_t pid;
+    const framesize_t max_size;
+} camera_sensor_info_t;
+
+typedef enum {
+    ASPECT_RATIO_4X3,
+    ASPECT_RATIO_3X2,
+    ASPECT_RATIO_16X10,
+    ASPECT_RATIO_5X3,
+    ASPECT_RATIO_16X9,
+    ASPECT_RATIO_21X9,
+    ASPECT_RATIO_5X4,
+    ASPECT_RATIO_1X1,
+    ASPECT_RATIO_9X16
+} aspect_ratio_t;
+
+typedef enum {
+    GAINCEILING_2X,
+    GAINCEILING_4X,
+    GAINCEILING_8X,
+    GAINCEILING_16X,
+    GAINCEILING_32X,
+    GAINCEILING_64X,
+    GAINCEILING_128X,
+} gainceiling_t;
+
+typedef struct {
+        uint16_t max_width;
+        uint16_t max_height;
+        uint16_t start_x;
+        uint16_t start_y;
+        uint16_t end_x;
+        uint16_t end_y;
+        uint16_t offset_x;
+        uint16_t offset_y;
+        uint16_t total_x;
+        uint16_t total_y;
+} ratio_settings_t;
+
+typedef struct {
+        const uint16_t width;
+        const uint16_t height;
+        const aspect_ratio_t aspect_ratio;
+} resolution_info_t;
+
+// Resolution table (in sensor.c)
+extern const resolution_info_t resolution[];
+// camera sensor table (in sensor.c)
+extern const camera_sensor_info_t camera_sensor[];
+
+typedef struct {
+    uint8_t MIDH;
+    uint8_t MIDL;
+    uint8_t PID;
+    uint8_t VER;
+} sensor_id_t;
+
+typedef struct {
+    framesize_t framesize;//0 - 10
+    bool scale;
+    bool binning;
+    uint8_t quality;//0 - 63
+    int8_t brightness;//-2 - 2
+    int8_t contrast;//-2 - 2
+    int8_t saturation;//-2 - 2
+    int8_t sharpness;//-2 - 2
+    uint8_t denoise;
+    uint8_t special_effect;//0 - 6
+    uint8_t wb_mode;//0 - 4
+    uint8_t awb;
+    uint8_t awb_gain;
+    uint8_t aec;
+    uint8_t aec2;
+    int8_t ae_level;//-2 - 2
+    uint16_t aec_value;//0 - 1200
+    uint8_t agc;
+    uint8_t agc_gain;//0 - 30
+    uint8_t gainceiling;//0 - 6
+    uint8_t bpc;
+    uint8_t wpc;
+    uint8_t raw_gma;
+    uint8_t lenc;
+    uint8_t hmirror;
+    uint8_t vflip;
+    uint8_t dcw;
+    uint8_t colorbar;
+} camera_status_t;
+
+typedef struct _sensor sensor_t;
+typedef struct _sensor {
+    sensor_id_t id;             // Sensor ID.
+    uint8_t  slv_addr;          // Sensor I2C slave address.
+    pixformat_t pixformat;
+    camera_status_t status;
+    int xclk_freq_hz;
+
+    // Sensor function pointers
+    int  (*init_status)         (sensor_t *sensor);
+    int  (*reset)               (sensor_t *sensor);
+    int  (*set_pixformat)       (sensor_t *sensor, pixformat_t pixformat);
+    int  (*set_framesize)       (sensor_t *sensor, framesize_t framesize);
+    int  (*set_contrast)        (sensor_t *sensor, int level);
+    int  (*set_brightness)      (sensor_t *sensor, int level);
+    int  (*set_saturation)      (sensor_t *sensor, int level);
+    int  (*set_sharpness)       (sensor_t *sensor, int level);
+    int  (*set_denoise)         (sensor_t *sensor, int level);
+    int  (*set_gainceiling)     (sensor_t *sensor, gainceiling_t gainceiling);
+    int  (*set_quality)         (sensor_t *sensor, int quality);
+    int  (*set_colorbar)        (sensor_t *sensor, int enable);
+    int  (*set_whitebal)        (sensor_t *sensor, int enable);
+    int  (*set_gain_ctrl)       (sensor_t *sensor, int enable);
+    int  (*set_exposure_ctrl)   (sensor_t *sensor, int enable);
+    int  (*set_hmirror)         (sensor_t *sensor, int enable);
+    int  (*set_vflip)           (sensor_t *sensor, int enable);
+
+    int  (*set_aec2)            (sensor_t *sensor, int enable);
+    int  (*set_awb_gain)        (sensor_t *sensor, int enable);
+    int  (*set_agc_gain)        (sensor_t *sensor, int gain);
+    int  (*set_aec_value)       (sensor_t *sensor, int gain);
+
+    int  (*set_special_effect)  (sensor_t *sensor, int effect);
+    int  (*set_wb_mode)         (sensor_t *sensor, int mode);
+    int  (*set_ae_level)        (sensor_t *sensor, int level);
+
+    int  (*set_dcw)             (sensor_t *sensor, int enable);
+    int  (*set_bpc)             (sensor_t *sensor, int enable);
+    int  (*set_wpc)             (sensor_t *sensor, int enable);
+
+    int  (*set_raw_gma)         (sensor_t *sensor, int enable);
+    int  (*set_lenc)            (sensor_t *sensor, int enable);
+
+    int  (*get_reg)             (sensor_t *sensor, int reg, int mask);
+    int  (*set_reg)             (sensor_t *sensor, int reg, int mask, int value);
+    int  (*set_res_raw)         (sensor_t *sensor, int startX, int startY, int endX, int endY, int offsetX, int offsetY, int totalX, int totalY, int outputX, int outputY, bool scale, bool binning);
+    int  (*set_pll)             (sensor_t *sensor, int bypass, int mul, int sys, int root, int pre, int seld5, int pclken, int pclk);
+    int  (*set_xclk)            (sensor_t *sensor, int timer, int xclk);
+} sensor_t;
+
+#endif /* __SENSOR_H__ */
diff --git a/tools/sdk/esp32s2/include/esp32s2/include/esp_ssc.h b/tools/sdk/esp32s2/include/esp32s2/include/esp_ssc.h
deleted file mode 100644
index 02893ff4..00000000
--- a/tools/sdk/esp32s2/include/esp32s2/include/esp_ssc.h
+++ /dev/null
@@ -1,119 +0,0 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#ifndef __ESP_SSC_H__
-#define __ESP_SSC_H__
-
-#include <stdint.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define CMD_T_ASYNC   0x01
-#define CMD_T_SYNC    0x02
-
-typedef struct cmd_s {
-    char *cmd_str;
-    uint8_t flag;
-    uint8_t id;
-    void (* cmd_func)(void);
-    void (* cmd_callback)(void *arg);
-} ssc_cmd_t;
-
-#define MAX_LINE_N  127
-
-typedef enum {
-    SSC_BR_9600   = 9600,
-    SSC_BR_19200  = 19200,
-    SSC_BR_38400  = 38400,
-    SSC_BR_57600  = 57600,
-    SSC_BR_74880  = 74880,
-    SSC_BR_115200 = 115200,
-    SSC_BR_230400 = 230400,
-    SSC_BR_460800 = 460800,
-    SSC_BR_921600 = 921600
-} SscBaudRate;
-
-/** \defgroup SSC_APIs SSC APIs
-  * @brief SSC APIs
-  *
-  * SSC means simple serial command.
-  * SSC APIs allows users to define their own command, users can refer to spiffs_test/test_main.c.
-  *
-  */
-
-/** @addtogroup SSC_APIs
-  * @{
-  */
-
-/**
-  * @brief  Initial the ssc function.
-  *
-  * @attention param is no use, just compatible with ESP8266, default bandrate is 115200
-  *
-  * @param  SscBaudRate bandrate : baud rate
-  *
-  * @return null
-  */
-void ssc_attach(SscBaudRate bandrate);
-
-/**
-  * @brief   Get the length of the simple serial command.
-  *
-  * @param   null
-  *
-  * @return  length of the command.
-  */
-int ssc_param_len(void);
-
-/**
-  * @brief   Get the simple serial command string.
-  *
-  * @param   null
-  *
-  * @return  the command.
-  */
-char *ssc_param_str(void);
-
-/**
-  * @brief   Parse the simple serial command (ssc).
-  *
-  * @param   char *pLine  : [input] the ssc string
-  * @param   char *argv[] : [output] parameters of the ssc
-  *
-  * @return  the number of parameters.
-  */
-int ssc_parse_param(char *pLine, char *argv[]);
-
-/**
-  * @brief  Register the user-defined simple serial command (ssc) set.
-  *
-  * @param  ssc_cmd_t *cmdset   : the ssc set
-  * @param  uint8 cmdnum        : number of commands
-  * @param  void (* help)(void) : callback of user-guide
-  *
-  * @return  null
-  */
-void ssc_register(ssc_cmd_t *cmdset, uint8_t cmdnum, void (* help)(void));
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __ESP_SSC_H__ */
diff --git a/tools/sdk/esp32s2/include/esp_eth/include/esp_eth.h b/tools/sdk/esp32s2/include/esp_eth/include/esp_eth.h
index 480349d5..d204b508 100644
--- a/tools/sdk/esp32s2/include/esp_eth/include/esp_eth.h
+++ b/tools/sdk/esp32s2/include/esp_eth/include/esp_eth.h
@@ -86,6 +86,47 @@ typedef struct {
     */
     esp_err_t (*on_lowlevel_deinit_done)(esp_eth_handle_t eth_handle);
 
+    /**
+    * @brief Read PHY register
+    *
+    * @note Usually the PHY register read/write function is provided by MAC (SMI interface),
+    *       but if the PHY device is managed by other interface (e.g. I2C), then user needs to
+    *       implement the corresponding read/write.
+    *       Setting this to NULL means your PHY device is managed by MAC's SMI interface.
+    *
+    * @param[in] eth_handle: handle of Ethernet driver
+    * @param[in] phy_addr: PHY chip address (0~31)
+    * @param[in] phy_reg: PHY register index code
+    * @param[out] reg_value: PHY register value
+    *
+    * @return
+    *      - ESP_OK: read PHY register successfully
+    *      - ESP_ERR_INVALID_ARG: read PHY register failed because of invalid argument
+    *      - ESP_ERR_TIMEOUT: read PHY register failed because of timeout
+    *      - ESP_FAIL: read PHY register failed because some other error occurred
+    */
+    esp_err_t (*read_phy_reg)(esp_eth_handle_t eth_handle, uint32_t phy_addr, uint32_t phy_reg, uint32_t *reg_value);
+
+    /**
+    * @brief Write PHY register
+    *
+    * @note Usually the PHY register read/write function is provided by MAC (SMI interface),
+    *       but if the PHY device is managed by other interface (e.g. I2C), then user needs to
+    *       implement the corresponding read/write.
+    *       Setting this to NULL means your PHY device is managed by MAC's SMI interface.
+    *
+    * @param[in] eth_handle: handle of Ethernet driver
+    * @param[in] phy_addr: PHY chip address (0~31)
+    * @param[in] phy_reg: PHY register index code
+    * @param[in] reg_value: PHY register value
+    *
+    * @return
+    *      - ESP_OK: write PHY register successfully
+    *      - ESP_ERR_INVALID_ARG: read PHY register failed because of invalid argument
+    *      - ESP_ERR_TIMEOUT: write PHY register failed because of timeout
+    *      - ESP_FAIL: write PHY register failed because some other error occurred
+    */
+    esp_err_t (*write_phy_reg)(esp_eth_handle_t eth_handle, uint32_t phy_addr, uint32_t phy_reg, uint32_t reg_value);
 } esp_eth_config_t;
 
 /**
@@ -100,6 +141,8 @@ typedef struct {
         .stack_input = NULL,             \
         .on_lowlevel_init_done = NULL,   \
         .on_lowlevel_deinit_done = NULL, \
+        .read_phy_reg = NULL,            \
+        .write_phy_reg = NULL,           \
     }
 
 /**
diff --git a/tools/sdk/esp32s2/include/esp_eth/include/esp_eth_mac.h b/tools/sdk/esp32s2/include/esp_eth/include/esp_eth_mac.h
index 7543fdd2..042c369f 100644
--- a/tools/sdk/esp32s2/include/esp_eth/include/esp_eth_mac.h
+++ b/tools/sdk/esp32s2/include/esp_eth/include/esp_eth_mac.h
@@ -396,6 +396,39 @@ typedef struct {
 esp_eth_mac_t *esp_eth_mac_new_w5500(const eth_w5500_config_t *w5500_config, const eth_mac_config_t *mac_config);
 #endif // CONFIG_ETH_SPI_ETHERNET_W5500
 
+#if CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL
+/**
+ * @brief KSZ8851SNL specific configuration
+ *
+ */
+typedef struct {
+    void *spi_hdl;     /*!< Handle of SPI device driver */
+    int int_gpio_num;  /*!< Interrupt GPIO number */
+} eth_ksz8851snl_config_t;
+
+/**
+ * @brief Default KSZ8851SNL specific configuration
+ *
+ */
+#define ETH_KSZ8851SNL_DEFAULT_CONFIG(spi_device) \
+    {                                        \
+        .spi_hdl = spi_device,               \
+        .int_gpio_num = 14,                   \
+    }
+
+/**
+* @brief Create KSZ8851SNL Ethernet MAC instance
+*
+* @param ksz8851snl_config: KSZ8851SNL specific configuration
+* @param mac_config: Ethernet MAC configuration
+*
+* @return
+*      - instance: create MAC instance successfully
+*      - NULL: create MAC instance failed because some error occurred
+*/
+esp_eth_mac_t *esp_eth_mac_new_ksz8851snl(const eth_ksz8851snl_config_t *ksz8851snl_config, const eth_mac_config_t *mac_config);
+#endif // CONFIG_ETH_SPI_ETHERNET_KSZ8851
+
 #if CONFIG_ETH_USE_OPENETH
 /**
 * @brief Create OpenCores Ethernet MAC instance
diff --git a/tools/sdk/esp32s2/include/esp_eth/include/esp_eth_phy.h b/tools/sdk/esp32s2/include/esp_eth/include/esp_eth_phy.h
index 9dbc2ef9..c9d32b36 100644
--- a/tools/sdk/esp32s2/include/esp_eth/include/esp_eth_phy.h
+++ b/tools/sdk/esp32s2/include/esp_eth/include/esp_eth_phy.h
@@ -300,6 +300,19 @@ esp_eth_phy_t *esp_eth_phy_new_dm9051(const eth_phy_config_t *config);
 */
 esp_eth_phy_t *esp_eth_phy_new_w5500(const eth_phy_config_t *config);
 #endif
+
+#if CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL
+/**
+* @brief Create a PHY instance of KSZ8851SNL
+*
+* @param[in] config: configuration of PHY
+*
+* @return
+*      - instance: create PHY instance successfully
+*      - NULL: create PHY instance failed because some error occurred
+*/
+esp_eth_phy_t *esp_eth_phy_new_ksz8851snl(const eth_phy_config_t *config);
+#endif
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/esp_event/include/esp_event_legacy.h b/tools/sdk/esp32s2/include/esp_event/include/esp_event_legacy.h
index 021ac407..dbeeced6 100644
--- a/tools/sdk/esp32s2/include/esp_event/include/esp_event_legacy.h
+++ b/tools/sdk/esp32s2/include/esp_event/include/esp_event_legacy.h
@@ -58,6 +58,7 @@ typedef enum {
     SYSTEM_EVENT_ETH_CONNECTED,            /*!< ESP32 ethernet phy link up */
     SYSTEM_EVENT_ETH_DISCONNECTED,         /*!< ESP32 ethernet phy link down */
     SYSTEM_EVENT_ETH_GOT_IP,               /*!< ESP32 ethernet got IP from connected AP */
+    SYSTEM_EVENT_ETH_LOST_IP,              /*!< ESP32 ethernet lost IP and the IP is reset to 0 */
     SYSTEM_EVENT_MAX                       /*!< Number of members in this enum */
 } system_event_id_t;
 
diff --git a/tools/sdk/esp32s2/include/esp_hid/include/esp_hidh.h b/tools/sdk/esp32s2/include/esp_hid/include/esp_hidh.h
index b1a82643..d3d10021 100644
--- a/tools/sdk/esp32s2/include/esp_hid/include/esp_hidh.h
+++ b/tools/sdk/esp32s2/include/esp_hid/include/esp_hidh.h
@@ -100,6 +100,7 @@ typedef union {
 
 typedef struct {
     esp_event_handler_t callback;
+    uint16_t event_stack_size;
 } esp_hidh_config_t;
 
 /**
diff --git a/tools/sdk/esp32s2/include/esp_http_client/include/esp_http_client.h b/tools/sdk/esp32s2/include/esp_http_client/include/esp_http_client.h
index 249eb217..0f89972f 100644
--- a/tools/sdk/esp32s2/include/esp_http_client/include/esp_http_client.h
+++ b/tools/sdk/esp32s2/include/esp_http_client/include/esp_http_client.h
@@ -334,7 +334,7 @@ esp_err_t esp_http_client_get_password(esp_http_client_handle_t client, char **v
  *     - ESP_OK
  *     - ESP_ERR_INVALID_ARG
  */
-esp_err_t esp_http_client_set_password(esp_http_client_handle_t client, char *password);
+esp_err_t esp_http_client_set_password(esp_http_client_handle_t client, const char *password);
 
 /**
  * @brief      Set http request auth_type.
@@ -360,6 +360,18 @@ esp_err_t esp_http_client_set_authtype(esp_http_client_handle_t client, esp_http
  */
 esp_err_t esp_http_client_set_method(esp_http_client_handle_t client, esp_http_client_method_t method);
 
+/**
+ * @brief      Set http request timeout
+ *
+ * @param[in]  client      The esp_http_client handle
+ * @param[in]  timeout_ms  The timeout value
+ *
+ * @return
+ *     - ESP_OK
+ *     - ESP_ERR_INVALID_ARG
+ */
+esp_err_t esp_http_client_set_timeout_ms(esp_http_client_handle_t client, int timeout_ms);
+
 /**
  * @brief      Delete http request header
  *
diff --git a/tools/sdk/esp32s2/include/esp_https_ota/include/esp_https_ota.h b/tools/sdk/esp32s2/include/esp_https_ota/include/esp_https_ota.h
index 2a987ca6..a87ba8df 100644
--- a/tools/sdk/esp32s2/include/esp_https_ota/include/esp_https_ota.h
+++ b/tools/sdk/esp32s2/include/esp_https_ota/include/esp_https_ota.h
@@ -201,6 +201,21 @@ esp_err_t esp_https_ota_get_img_desc(esp_https_ota_handle_t https_ota_handle, es
 */
 int esp_https_ota_get_image_len_read(esp_https_ota_handle_t https_ota_handle);
 
+
+/**
+* @brief  This function returns OTA image total size.
+*
+* @note   This API should be called after esp_https_ota_begin() has been already called.
+*         This can be used to create some sort of progress indication
+*         (in combination with esp_https_ota_get_image_len_read())
+*
+* @param[in]   https_ota_handle   pointer to esp_https_ota_handle_t structure
+*
+* @return
+*    - -1    On failure or chunked encoding
+*    - total bytes of image
+*/
+int esp_https_ota_get_image_size(esp_https_ota_handle_t https_ota_handle);
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/esp_mac.h b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_mac.h
index 9d91d8ce..698ccaa6 100644
--- a/tools/sdk/esp32s2/include/esp_hw_support/include/esp_mac.h
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_mac.h
@@ -47,17 +47,17 @@ typedef enum {
   * @brief  Set base MAC address with the MAC address which is stored in BLK3 of EFUSE or
   *         external storage e.g. flash and EEPROM.
   *
-  * Base MAC address is used to generate the MAC addresses used by the networking interfaces.
-  * If using base MAC address stored in BLK3 of EFUSE or external storage, call this API to set base MAC
-  * address with the MAC address which is stored in BLK3 of EFUSE or external storage before initializing
-  * WiFi/BT/Ethernet.
+  * Base MAC address is used to generate the MAC addresses used by network interfaces.
+  *
+  * If using a custom base MAC address, call this API before initializing any network interfaces.
+  * Refer to the ESP-IDF Programming Guide for details about how the Base MAC is used.
   *
   * @note Base MAC must be a unicast MAC (least significant bit of first byte must be zero).
   *
   * @note If not using a valid OUI, set the "locally administered" bit
   *       (bit value 0x02 in the first byte) to avoid collisions.
   *
-  * @param  mac  base MAC address, length: 6 bytes.
+  * @param  mac base MAC address, length: 6 bytes.
   *
   * @return ESP_OK on success
   *         ESP_ERR_INVALID_ARG If mac is NULL or is not a unicast MAC
@@ -67,7 +67,9 @@ esp_err_t esp_base_mac_addr_set(const uint8_t *mac);
 /**
   * @brief  Return base MAC address which is set using esp_base_mac_addr_set.
   *
-  * @param  mac  base MAC address, length: 6 bytes.
+  * @note If no custom Base MAC has been set, this returns the pre-programmed Espressif base MAC address.
+  *
+  * @param  mac base MAC address, length: 6 bytes.
   *
   * @return ESP_OK on success
   *         ESP_ERR_INVALID_MAC base MAC address has not been set
@@ -78,10 +80,14 @@ esp_err_t esp_base_mac_addr_get(uint8_t *mac);
   * @brief  Return base MAC address which was previously written to BLK3 of EFUSE.
   *
   * Base MAC address is used to generate the MAC addresses used by the networking interfaces.
-  * This API returns the custom base MAC address which was previously written to BLK3 of EFUSE.
+  * This API returns the custom base MAC address which was previously written to EFUSE BLK3 in
+  * a specified format.
+  *
   * Writing this EFUSE allows setting of a different (non-Espressif) base MAC address. It is also
   * possible to store a custom base MAC address elsewhere, see esp_base_mac_addr_set() for details.
   *
+  * @note This function is currently only supported on ESP32.
+  *
   * @param  mac  base MAC address, length: 6 bytes.
   *
   * @return ESP_OK on success
@@ -91,7 +97,7 @@ esp_err_t esp_base_mac_addr_get(uint8_t *mac);
 esp_err_t esp_efuse_mac_get_custom(uint8_t *mac);
 
 /**
-  * @brief  Return base MAC address which is factory-programmed by Espressif in BLK0 of EFUSE.
+  * @brief  Return base MAC address which is factory-programmed by Espressif in EFUSE.
   *
   * @param  mac  base MAC address, length: 6 bytes.
   *
@@ -102,12 +108,12 @@ esp_err_t esp_efuse_mac_get_default(uint8_t *mac);
 /**
   * @brief  Read base MAC address and set MAC address of the interface.
   *
-  * This function first get base MAC address using esp_base_mac_addr_get or reads base MAC address
-  * from BLK0 of EFUSE. Then set the MAC address of the interface including wifi station, wifi softap,
-  * bluetooth and ethernet.
+  * This function first get base MAC address using esp_base_mac_addr_get().
+  * Then calculates the MAC address of the specific interface requested,
+  * refer to ESP-IDF Programming Guide for the algorithm.
   *
   * @param  mac  MAC address of the interface, length: 6 bytes.
-  * @param  type  type of MAC address, 0:wifi station, 1:wifi softap, 2:bluetooth, 3:ethernet.
+  * @param  type Type of MAC address to return
   *
   * @return ESP_OK on success
   */
@@ -116,11 +122,13 @@ esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type);
 /**
   * @brief Derive local MAC address from universal MAC address.
   *
-  * This function derives a local MAC address from an universal MAC address.
-  * A `definition of local vs universal MAC address can be found on Wikipedia
-  * <https://en.wikipedia.org/wiki/MAC_address#Universal_vs._local>`.
-  * In ESP32, universal MAC address is generated from base MAC address in EFUSE or other external storage.
-  * Local MAC address is derived from the universal MAC address.
+  * This function copies a universal MAC address and then sets the "locally
+  * administered" bit (bit 0x2) in the first octet, creating a locally
+  * administered MAC address.
+  *
+  * If the universal MAC address argument is already a locally administered MAC
+  * address, then the first octet is XORed with 0x4 in order to create a different
+  * locally administered MAC address.
   *
   * @param  local_mac  Derived local MAC address, length: 6 bytes.
   * @param  universal_mac  Source universal MAC address, length: 6 bytes.
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/esp_random.h b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_random.h
index 26756b9d..7064fa81 100644
--- a/tools/sdk/esp32s2/include/esp_hw_support/include/esp_random.h
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_random.h
@@ -24,16 +24,27 @@ extern "C" {
 /**
  * @brief  Get one random 32-bit word from hardware RNG
  *
- * The hardware RNG is fully functional whenever an RF subsystem is running (ie Bluetooth or WiFi is enabled). For
- * random values, call this function after WiFi or Bluetooth are started.
+ * The hardware RNG produces true random numbers under any of the following conditions:
  *
- * If the RF subsystem is not used by the program, the function bootloader_random_enable() can be called to enable an
- * entropy source. bootloader_random_disable() must be called before RF subsystem or I2S peripheral are used. See these functions'
- * documentation for more details.
+ * - An RF subsystem is running (i.e. Bluetooth or WiFi is enabled)
+ * - An internal entropy source has been enabled by calling bootloader_random_enable()
+ *   and not yet disabled by calling bootloader_random_disable()
+ * - While the ESP-IDF bootloader is running (due to the internal entropy source being enabled
+ *   for the duration of bootloader execution).
  *
- * Any time the app is running without an RF subsystem (or bootloader_random) enabled, RNG hardware should be
- * considered a PRNG. A very small amount of entropy is available due to pre-seeding while the IDF
- * bootloader is running, but this should not be relied upon for any use.
+ * If none of the above conditions are true, the hardware RNG will produce pseudo-random numbers only.
+ *
+ * When the hardware RNG is producing true random numbers, external entropy (noise samples) are
+ * continuously mixed into the internal hardware RNG state. Consult the SoC Technical Reference Manual
+ * for more details.
+ *
+ * This function automatically busy-waits to ensure enough external entropy has been
+ * introduced into the hardware RNG state, before returning a new random number.
+ *
+ * If generating random numbers from an app which has not yet enabled Bluetooth or Wi-Fi, call the
+ * API function bootloader_random_enable() before generating random numbers and then call
+ * bootloader_random_disable() before using any APIs for Bluetooth, Wi-Fi, ADC, or I2S. Consult the
+ * bootloader_random.h header for more details.
  *
  * @return Random value between 0 and UINT32_MAX
  */
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/include/esp_sleep.h b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_sleep.h
index 1d81f716..000d020a 100644
--- a/tools/sdk/esp32s2/include/esp_hw_support/include/esp_sleep.h
+++ b/tools/sdk/esp32s2/include/esp_hw_support/include/esp_sleep.h
@@ -303,6 +303,12 @@ esp_err_t esp_sleep_enable_uart_wakeup(int uart_num);
  */
 esp_err_t esp_sleep_enable_wifi_wakeup(void);
 
+/**
+ * @brief Disable wakeup by WiFi MAC
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t esp_sleep_disable_wifi_wakeup(void);
 
 /**
  * @brief Get the bit mask of GPIOs which caused wakeup (ext1)
diff --git a/tools/sdk/esp32s2/include/esp_hw_support/port/esp32s2/regi2c_ctrl.h b/tools/sdk/esp32s2/include/esp_hw_support/port/esp32s2/regi2c_ctrl.h
index 16d63340..51a0a22d 100644
--- a/tools/sdk/esp32s2/include/esp_hw_support/port/esp32s2/regi2c_ctrl.h
+++ b/tools/sdk/esp32s2/include/esp_hw_support/port/esp32s2/regi2c_ctrl.h
@@ -45,20 +45,45 @@ void i2c_rtc_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t
 void i2c_rtc_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data);
 void i2c_rtc_init(void);
 
+#ifdef BOOTLOADER_BUILD
+
+/**
+ * If compiling for the bootloader, internal functions can be called directly,
+ * without the need of a lock.
+ */
+#define regi2c_ctrl_read_reg         i2c_rtc_read_reg
+#define regi2c_ctrl_read_reg_mask    i2c_rtc_read_reg_mask
+#define regi2c_ctrl_write_reg        i2c_rtc_write_reg
+#define regi2c_ctrl_write_reg_mask   i2c_rtc_write_reg_mask
+
+#else
+
+#define i2c_read_reg_raw        i2c_rtc_read_reg
+#define i2c_read_reg_mask_raw   i2c_rtc_read_reg_mask
+#define i2c_write_reg_raw       i2c_rtc_write_reg
+#define i2c_write_reg_mask_raw  i2c_rtc_write_reg_mask
+
+uint8_t regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add);
+uint8_t regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb);
+void regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data);
+void regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data);
+
+#endif // BOOTLOADER_BUILD
+
 /* Convenience macros for the above functions, these use register definitions
  * from regi2c_apll.h/regi2c_bbpll.h header files.
  */
 #define REGI2C_WRITE_MASK(block, reg_add, indata) \
-      i2c_rtc_write_reg_mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB,  indata)
+      regi2c_ctrl_write_reg_mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB,  indata)
 
 #define REGI2C_READ_MASK(block, reg_add) \
-      i2c_rtc_read_reg_mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB)
+      regi2c_ctrl_read_reg_mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB)
 
 #define REGI2C_WRITE(block, reg_add, indata) \
-      i2c_rtc_write_reg(block, block##_HOSTID,  reg_add, indata)
+      regi2c_ctrl_write_reg(block, block##_HOSTID,  reg_add, indata)
 
 #define REGI2C_READ(block, reg_add) \
-      i2c_rtc_read_reg(block, block##_HOSTID,  reg_add)
+      regi2c_ctrl_read_reg(block, block##_HOSTID,  reg_add)
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_panel_io.h b/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_panel_io.h
new file mode 100644
index 00000000..c362180f
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_panel_io.h
@@ -0,0 +1,201 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_lcd_types.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef void *esp_lcd_spi_bus_handle_t;                       /*!< Type of LCD SPI bus handle */
+typedef void *esp_lcd_i2c_bus_handle_t;                       /*!< Type of LCD I2C bus handle */
+typedef struct esp_lcd_i80_bus_t *esp_lcd_i80_bus_handle_t;   /*!< Type of LCD intel 8080 bus handle */
+
+/**
+ * @brief Transmit LCD command and corresponding parameters
+ *
+ * @note Commands sent by this function are short, so they are sent using polling transactions.
+ *       The function does not return before the command tranfer is completed.
+ *       If any queued transactions sent by `esp_lcd_panel_io_tx_color()` are still pending when this function is called,
+ *       this function will wait until they are finished and the queue is empty before sending the command(s).
+ *
+ * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()`
+ * @param[in] lcd_cmd The specific LCD command
+ * @param[in] lcd_cmd_bits Length of LCD command, in bits (e.g. 8 bits or 16 bits)
+ * @param[in] param Buffer that holds the command specific parameters, set to NULL if no parameter is needed for the command
+ * @param[in] param_size Size of `param` in memory, in bytes, set to zero if no parameter is needed for the command
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_panel_io_tx_param(esp_lcd_panel_io_handle_t io, int lcd_cmd, int lcd_cmd_bits, const void *param, size_t param_size);
+
+/**
+ * @brief Transmit LCD RGB data
+ *
+ * @note This function will package the command and RGB data into a transaction, and push into a queue.
+ *       The real transmission is performed in the background (DMA+interrupt).
+ *       The caller should take care of the lifecycle of the `color` buffer.
+ *       Recycling of color buffer should be done in the callback `on_color_trans_done()`.
+ *
+ * @param[in] io LCD panel IO handle, which is created by factory API like `esp_lcd_new_panel_io_spi()`
+ * @param[in] lcd_cmd The specific LCD command
+ * @param[in] lcd_cmd_bits Length of LCD command, in bits (e.g. 8 bits or 16 bits)
+ * @param[in] color Buffer that holds the RGB color data
+ * @param[in] color_size Size of `color` in memory, in bytes
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_panel_io_tx_color(esp_lcd_panel_io_handle_t io, int lcd_cmd, int lcd_cmd_bits, const void *color, size_t color_size);
+
+/**
+ * @brief Destory LCD panel IO handle (deinitialize panel and free all corresponding resource)
+ *
+ * @param[in] io LCD panel IO handle, which is created by factory API like `esp_lcd_new_panel_io_spi()`
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_panel_io_del(esp_lcd_panel_io_handle_t io);
+
+/**
+ * @brief Panel IO configuration structure, for SPI interface
+ */
+typedef struct {
+    int cs_gpio_num; /*!< GPIO used for CS line */
+    int dc_gpio_num; /*!< GPIO used to select the D/C line, set this to -1 if the D/C line not controlled by manually pulling high/low GPIO */
+    int spi_mode;    /*!< Traditional SPI mode (0~3) */
+    unsigned int pclk_hz;    /*!< Frequency of pixel clock */
+    size_t trans_queue_depth; /*!< Size of internal transaction queue */
+    bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); /*!< Callback, invoked when color data transfer has finished */
+    void *user_data; /*!< User private data, passed directly to on_trans_frame_done's user_data */
+    struct {
+        unsigned int dc_as_cmd_phase: 1; /*!< D/C line value is encoded into SPI transaction command phase */
+        unsigned int dc_low_on_data: 1;  /*!< If this flag is enabled, DC line = 0 means transfer data, DC line = 1 means transfer command; vice versa */
+    } flags;
+} esp_lcd_panel_io_spi_config_t;
+
+/**
+ * @brief Create LCD panel IO handle, for SPI interface
+ *
+ * @param[in] bus SPI bus handle
+ * @param[in] io_config IO configuration, for SPI interface
+ * @param[out] ret_io Returned IO handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_io_spi(esp_lcd_spi_bus_handle_t bus, const esp_lcd_panel_io_spi_config_t *io_config, esp_lcd_panel_io_handle_t *ret_io);
+
+typedef struct {
+    uint32_t dev_addr; /*!< I2C device address */
+    bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); /*!< Callback, invoked when color data transfer has finished */
+    void *user_data; /*!< User private data, passed directly to on_trans_frame_done's user_data */
+    size_t control_phase_bytes; /*!< I2C LCD panel will encode control information (e.g. D/C seclection) into control phase, in several bytes */
+    unsigned int dc_bit_offset; /*!< Offset of the D/C selection bit in control phase */
+    struct {
+        unsigned int dc_low_on_data: 1;  /*!< If this flag is enabled, DC line = 0 means transfer data, DC line = 1 means transfer command; vice versa */
+    } flags;
+} esp_lcd_panel_io_i2c_config_t;
+
+/**
+ * @brief Create LCD panel IO handle, for I2C interface
+ *
+ * @param[in] bus I2C bus handle
+ * @param[in] io_config IO configuration, for I2C interface
+ * @param[out] ret_io Returned IO handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_io_i2c(esp_lcd_i2c_bus_handle_t bus, const esp_lcd_panel_io_i2c_config_t *io_config, esp_lcd_panel_io_handle_t *ret_io);
+
+#if SOC_LCD_I80_SUPPORTED
+/**
+ * @brief LCD Intel 8080 bus configuration structure
+ */
+typedef struct {
+    int dc_gpio_num; /*!< GPIO used for D/C line */
+    int wr_gpio_num; /*!< GPIO used for WR line */
+    int data_gpio_nums[SOC_LCD_I80_BUS_WIDTH]; /*!< GPIOs used for data lines */
+    size_t data_width;         /*!< Number of data lines, 8 or 16 */
+    size_t max_transfer_bytes; /*!< Maximum transfer size, this determines the length of internal DMA link */
+} esp_lcd_i80_bus_config_t;
+
+/**
+ * @brief Create Intel 8080 bus handle
+ *
+ * @param[in] bus_config Bus configuration
+ * @param[out] ret_bus Returned bus handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_ERR_NOT_FOUND     if no free bus is available
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lcd_i80_bus_handle_t *ret_bus);
+
+/**
+ * @brief Destory Intel 8080 bus handle
+ *
+ * @param[in] bus Intel 8080 bus handle, created by `esp_lcd_new_i80_bus()`
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_INVALID_STATE if there still be some device attached to the bus
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_del_i80_bus(esp_lcd_i80_bus_handle_t bus);
+
+/**
+ * @brief Panel IO configuration structure, for intel 8080 interface
+ */
+typedef struct {
+    int cs_gpio_num;         /*!< GPIO used for CS line */
+    unsigned int pclk_hz;    /*!< Frequency of pixel clock */
+    size_t trans_queue_depth; /*!< Transaction queue size, larger queue, higher throughput */
+    bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); /*!< Callback, invoked when color data was tranferred done */
+    void *user_data; /*!< User private data, passed directly to on_trans_done's user_data */
+    struct {
+        unsigned int dc_idle_level: 1;  /*!< Level of DC line in IDLE phase */
+        unsigned int dc_cmd_level: 1;   /*!< Level of DC line in CMD phase */
+        unsigned int dc_dummy_level: 1; /*!< Level of DC line in DUMMY phase */
+        unsigned int dc_data_level: 1;  /*!< Level of DC line in DATA phase */
+    } dc_levels; /*!< Each i80 device might have its own D/C control logic */
+    struct {
+        unsigned int invert_cs: 1;          /*!< Whether to invert the CS line */
+        unsigned int reverse_color_bits: 1; /*!< Reverse the data bits, D[N:0] -> D[0:N] */
+        unsigned int swap_color_bytes: 1;   /*!< Swap adjacent two color bytes */
+        unsigned int pclk_active_neg: 1;    /*!< The display will write data lines when there's a falling edge on WR signal (a.k.a the PCLK) */
+        unsigned int pclk_idle_low: 1;      /*!< The WR signal (a.k.a the PCLK) stays at low level in IDLE phase */
+    } flags;
+} esp_lcd_panel_io_i80_config_t;
+
+/**
+ * @brief Create LCD panel IO, for Intel 8080 interface
+ *
+ * @param[in] bus Intel 8080 bus handle, created by `esp_lcd_new_i80_bus()`
+ * @param[in] io_config IO configuration, for i80 interface
+ * @param[out] ret_io Returned panel IO handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NOT_SUPPORTED if some configuration can't be satisfied, e.g. pixel clock out of the range
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_io_i80(esp_lcd_i80_bus_handle_t bus, const esp_lcd_panel_io_i80_config_t *io_config, esp_lcd_panel_io_handle_t *ret_io);
+
+#endif // SOC_LCD_I80_SUPPORTED
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_panel_ops.h b/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_panel_ops.h
new file mode 100644
index 00000000..5099233c
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_panel_ops.h
@@ -0,0 +1,126 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_lcd_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Reset LCD panel
+ *
+ * @note Panel reset must be called before attempting to initialize the panel using `esp_lcd_panel_init()`.
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_reset(esp_lcd_panel_handle_t panel);
+
+/**
+ * @brief Initialize LCD panel
+ *
+ * @note Before calling this function, make sure the LCD panel has finished the `reset` stage by `esp_lcd_panel_reset()`.
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_init(esp_lcd_panel_handle_t panel);
+
+/**
+ * @brief Deinitialize the LCD panel
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_del(esp_lcd_panel_handle_t panel);
+
+/**
+ * @brief Draw bitmap on LCD panel
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] x_start Start index on x-axis (x_start included)
+ * @param[in] y_start Start index on y-axis (y_start included)
+ * @param[in] x_end End index on x-axis (x_end not included)
+ * @param[in] y_end End index on y-axis (y_end not included)
+ * @param[in] color_data RGB color data that will be dumped to the specific window range
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_draw_bitmap(esp_lcd_panel_handle_t panel, int x_start, int y_start, int x_end, int y_end, const void *color_data);
+
+/**
+ * @brief Mirror the LCD panel on specific axis
+ *
+ * @note Combined with `esp_lcd_panel_swap_xy()`, one can realize screen rotation
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] mirror_x Whether the panel will be mirrored about the x axis
+ * @param[in] mirror_y Whether the panel will be mirrored about the y axis
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+ */
+esp_err_t esp_lcd_panel_mirror(esp_lcd_panel_handle_t panel, bool mirror_x, bool mirror_y);
+
+/**
+ * @brief Swap/Exchange x and y axis
+ *
+ * @note Combined with `esp_lcd_panel_mirror()`, one can realize screen rotation
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] swap_axes Whether to swap the x and y axis
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+ */
+esp_err_t esp_lcd_panel_swap_xy(esp_lcd_panel_handle_t panel, bool swap_axes);
+
+/**
+ * @brief Set extra gap in x and y axis
+ *
+ * The gap is the space (in pixels) between the left/top sides of the LCD panel and the first row/column respectively of the actual contents displayed.
+ *
+ * @note Setting a gap is useful when positioning or centering a frame that is smaller than the LCD.
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] x_gap Extra gap on x axis, in pixels
+ * @param[in] y_gap Extra gap on y axis, in pixels
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_set_gap(esp_lcd_panel_handle_t panel, int x_gap, int y_gap);
+
+/**
+ * @brief Invert the color (bit-wise invert the color data line)
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] invert_color_data Whether to invert the color data
+ * @return
+ *          - ESP_OK on success
+ */
+esp_err_t esp_lcd_panel_invert_color(esp_lcd_panel_handle_t panel, bool invert_color_data);
+
+/**
+ * @brief Turn off the display
+ *
+ * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+ * @param[in] off Whether to turn off the screen
+ * @return
+ *          - ESP_OK on success
+ *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+ */
+esp_err_t esp_lcd_panel_disp_off(esp_lcd_panel_handle_t panel, bool off);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_panel_rgb.h b/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_panel_rgb.h
new file mode 100644
index 00000000..0847e84b
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_panel_rgb.h
@@ -0,0 +1,77 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_lcd_types.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if SOC_LCD_RGB_SUPPORTED
+/**
+ * @brief LCD RGB timing structure
+ */
+typedef struct {
+    unsigned int pclk_hz;           /*!< Frequency of pixel clock */
+    unsigned int h_res;             /*!< Horizontal resolution, i.e. the number of pixels in a line */
+    unsigned int v_res;             /*!< Vertical resolution, i.e. the number of lines in the frame  */
+    unsigned int hsync_pulse_width; /*!< Horizontal sync width, unit: PCLK period */
+    unsigned int hsync_back_porch;  /*!< Horizontal back porch, number of PCLK between hsync and start of line active data */
+    unsigned int hsync_front_porch; /*!< Horizontal front porch, number of PCLK between the end of active data and the next hsync */
+    unsigned int vsync_pulse_width; /*!< Vertical sync width, unit: number of lines */
+    unsigned int vsync_back_porch;  /*!< Vertical back porch, number of invalid lines between vsync and start of frame */
+    unsigned int vsync_front_porch; /*!< Vertical front porch, number of invalid lines between then end of frame and the next vsync */
+    struct {
+        unsigned int hsync_idle_low: 1;  /*!< The hsync signal is low in IDLE state */
+        unsigned int vsync_idle_low: 1;  /*!< The vsync signal is low in IDLE state */
+        unsigned int de_idle_high: 1;    /*!< The de signal is high in IDLE state */
+        unsigned int pclk_active_neg: 1; /*!< The display will write data lines when there's a falling edge on PCLK */
+        unsigned int pclk_idle_low: 1;   /*!< The PCLK stays at low level in IDLE phase */
+    } flags;
+} esp_lcd_rgb_timing_t;
+
+/**
+ * @brief LCD RGB panel configuration structure
+ */
+typedef struct {
+    esp_lcd_rgb_timing_t timings; /*!< RGB timing parameters */
+    size_t data_width;            /*!< Number of data lines */
+    int hsync_gpio_num;           /*!< GPIO used for HSYNC signal */
+    int vsync_gpio_num;           /*!< GPIO used for VSYNC signal */
+    int de_gpio_num;              /*!< GPIO used for DE signal, set to -1 if it's not used */
+    int pclk_gpio_num;            /*!< GPIO used for PCLK signal */
+    int data_gpio_nums[SOC_LCD_RGB_DATA_WIDTH]; /*!< GPIOs used for data lines */
+    int disp_gpio_num; /*!< GPIO used for display control signal, set to -1 if it's not used */
+    bool (*on_frame_trans_done)(esp_lcd_panel_handle_t panel, void *user_data); /*!< Callback, invoked when one frame buffer has transferred done */
+    void *user_data; /*!< User data which would be passed to on_frame_trans_done's user_data */
+    struct {
+        unsigned int disp_active_low: 1; /*!< If this flag is enabled, a low level of display control signal can turn the screen on; vice versa */
+        unsigned int relax_on_idle: 1;   /*!< If this flag is enabled, the host won't refresh the LCD if nothing changed in host's frame buffer (this is usefull for LCD with built-in GRAM) */
+    } flags;
+} esp_lcd_rgb_panel_config_t;
+
+/**
+ * @brief Create RGB LCD panel
+ *
+ * @param rgb_panel_config RGB panel configuration
+ * @param ret_panel Returned LCD panel handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_ERR_NOT_FOUND     if no free RGB panel is available
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_rgb_panel(const esp_lcd_rgb_panel_config_t *rgb_panel_config, esp_lcd_panel_handle_t *ret_panel);
+
+#endif // SOC_LCD_RGB_SUPPORTED
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_panel_vendor.h b/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_panel_vendor.h
new file mode 100644
index 00000000..ac98cc39
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_panel_vendor.h
@@ -0,0 +1,57 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+#include "esp_lcd_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Configuration structure for panel device
+ */
+typedef struct {
+    int reset_gpio_num; /*!< GPIO used to reset the LCD panel, set to -1 if it's not used */
+    esp_lcd_color_space_t color_space; /*!< Set the color space used by the LCD panel */
+    unsigned int bits_per_pixel;       /*!< Color depth, in bpp */
+    struct {
+        unsigned int reset_active_high: 1; /*!< Setting this if the panel reset is high level active */
+    } flags;
+    void *vendor_config; /* vendor specific configuration, optional, left as NULL if not used */
+} esp_lcd_panel_dev_config_t;
+
+/**
+ * @brief Create LCD panel for model ST7789
+ *
+ * @param[in] io LCD panel IO handle
+ * @param[in] panel_dev_config general panel device configuration
+ * @param[out] ret_panel Returned LCD panel handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_st7789(const esp_lcd_panel_io_handle_t io, const esp_lcd_panel_dev_config_t *panel_dev_config, esp_lcd_panel_handle_t *ret_panel);
+
+/**
+ * @brief Create LCD panel for model SSD1306
+ *
+ * @param[in] io LCD panel IO handle
+ * @param[in] panel_dev_config general panel device configuration
+ * @param[out] ret_panel Returned LCD panel handle
+ * @return
+ *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+ *          - ESP_ERR_NO_MEM        if out of memory
+ *          - ESP_OK                on success
+ */
+esp_err_t esp_lcd_new_panel_ssd1306(const esp_lcd_panel_io_handle_t io, const esp_lcd_panel_dev_config_t *panel_dev_config, esp_lcd_panel_handle_t *ret_panel);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_types.h b/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_types.h
new file mode 100644
index 00000000..7d495324
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_lcd/include/esp_lcd_types.h
@@ -0,0 +1,26 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct esp_lcd_panel_io_t *esp_lcd_panel_io_handle_t; /*!< Type of LCD panel IO handle */
+typedef struct esp_lcd_panel_t *esp_lcd_panel_handle_t;       /*!< Type of LCD panel handle */
+
+/**
+ * @brief LCD color space type definition
+ */
+typedef enum {
+    ESP_LCD_COLOR_SPACE_RGB,        /*!< Color space: RGB */
+    ESP_LCD_COLOR_SPACE_BGR,        /*!< Color space: BGR */
+    ESP_LCD_COLOR_SPACE_MONOCHROME, /*!< Color space: monochrome */
+} esp_lcd_color_space_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_lcd/interface/esp_lcd_panel_interface.h b/tools/sdk/esp32s2/include/esp_lcd/interface/esp_lcd_panel_interface.h
new file mode 100644
index 00000000..0705b145
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_lcd/interface/esp_lcd_panel_interface.h
@@ -0,0 +1,126 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct esp_lcd_panel_t esp_lcd_panel_t;  /*!< Type of LCD panel */
+
+/**
+ * @brief LCD panel interface
+ */
+struct esp_lcd_panel_t {
+    /**
+     * @brief Reset LCD panel
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*reset)(esp_lcd_panel_t *panel);
+
+    /**
+     * @brief Initialize LCD panel
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*init)(esp_lcd_panel_t *panel);
+
+    /**
+     * @brief Destory LCD panel
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*del)(esp_lcd_panel_t *panel);
+
+    /**
+     * @brief Draw bitmap on LCD panel
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] x_start Start index on x-axis (x_start included)
+     * @param[in] y_start Start index on y-axis (y_start included)
+     * @param[in] x_end End index on x-axis (x_end not included)
+     * @param[in] y_end End index on y-axis (y_end not included)
+     * @param[in] color_data RGB color data that will be dumped to the specific window range
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*draw_bitmap)(esp_lcd_panel_t *panel, int x_start, int y_start, int x_end, int y_end, const void *color_data);
+
+    /**
+     * @brief Mirror the LCD panel on specific axis
+     *
+     * @note Combine this function with `swap_xy`, one can realize screen rotatation
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] x_axis Whether the panel will be mirrored about the x_axis
+     * @param[in] y_axis Whether the panel will be mirrored about the y_axis
+     * @return
+     *          - ESP_OK on success
+     *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+     */
+    esp_err_t (*mirror)(esp_lcd_panel_t *panel, bool x_axis, bool y_axis);
+
+    /**
+     * @brief Swap/Exchange x and y axis
+     *
+     * @note Combine this function with `mirror`, one can realize screen rotatation
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] swap_axes Whether to swap the x and y axis
+     * @return
+     *          - ESP_OK on success
+     *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+     */
+    esp_err_t (*swap_xy)(esp_lcd_panel_t *panel, bool swap_axes);
+
+    /**
+     * @brief Set extra gap in x and y axis
+     *
+     * @note The gap is only used for calculating the real coordinates.
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] x_gap Extra gap on x axis, in pixels
+     * @param[in] y_gap Extra gap on y axis, in pixels
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*set_gap)(esp_lcd_panel_t *panel, int x_gap, int y_gap);
+
+    /**
+     * @brief Invert the color (bit 1 -> 0 for color data line, and vice versa)
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] invert_color_data Whether to invert the color data
+     * @return
+     *          - ESP_OK on success
+     */
+    esp_err_t (*invert_color)(esp_lcd_panel_t *panel, bool invert_color_data);
+
+    /**
+     * @brief Turn off the display
+     *
+     * @param[in] panel LCD panel handle, which is created by other factory API like `esp_lcd_new_panel_st7789()`
+     * @param[in] off Whether to turn off the screen
+     * @return
+     *          - ESP_OK on success
+     *          - ESP_ERR_NOT_SUPPORTED if this function is not supported by the panel
+     */
+    esp_err_t (*disp_off)(esp_lcd_panel_t *panel, bool off);
+};
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_lcd/interface/esp_lcd_panel_io_interface.h b/tools/sdk/esp32s2/include/esp_lcd/interface/esp_lcd_panel_io_interface.h
new file mode 100644
index 00000000..b6b85564
--- /dev/null
+++ b/tools/sdk/esp32s2/include/esp_lcd/interface/esp_lcd_panel_io_interface.h
@@ -0,0 +1,66 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct esp_lcd_panel_io_t esp_lcd_panel_io_t; /*!< Type of LCD panel IO */
+
+/**
+ * @brief LCD panel IO interface
+ */
+struct esp_lcd_panel_io_t {
+    /**
+     * @brief Transmit LCD command and corresponding parameters
+     *
+     * @note This is the panel-specific interface called by function `esp_lcd_panel_io_tx_param()`.
+     *
+     * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()`
+     * @param[in] lcd_cmd The specific LCD command
+     * @param[in] lcd_cmd_bits Length of LCD command, in bits (e.g. 8 bits or 16 bits)
+     * @param[in] param Buffer that holds the command specific parameters, set to NULL if no parameter is needed for the command
+     * @param[in] param_size Size of `param` in memory, in bytes, set to zero if no parameter is needed for the command
+     * @return
+     *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+     *          - ESP_OK                on success
+     */
+    esp_err_t (*tx_param)(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *param, size_t param_size);
+
+    /**
+     * @brief Transmit LCD RGB data
+     *
+     * @note This is the panel-specific interface called by function `esp_lcd_panel_io_tx_color()`.
+     *
+     * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()`
+     * @param[in] lcd_cmd The specific LCD command
+     * @param[in] lcd_cmd_bits Length of LCD command, in bits (e.g. 8 bits or 16 bits)
+     * @param[in] color Buffer that holds the RGB color data
+     * @param[in] color_size Size of `color` in memory, in bytes
+     * @return
+     *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+     *          - ESP_OK                on success
+     */
+    esp_err_t (*tx_color)(esp_lcd_panel_io_t *io, int lcd_cmd, int lcd_cmd_bits, const void *color, size_t color_size);
+
+    /**
+     * @brief Destory LCD panel IO handle (deinitialize all and free resource)
+     *
+     * @param[in] io LCD panel IO handle, which is created by other factory API like `esp_lcd_new_panel_io_spi()`
+     * @return
+     *          - ESP_ERR_INVALID_ARG   if parameter is invalid
+     *          - ESP_OK                on success
+     */
+    esp_err_t (*del)(esp_lcd_panel_io_t *io);
+};
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/esp_netif/include/esp_netif_defaults.h b/tools/sdk/esp32s2/include/esp_netif/include/esp_netif_defaults.h
index 7ef65260..903a678e 100644
--- a/tools/sdk/esp32s2/include/esp_netif/include/esp_netif_defaults.h
+++ b/tools/sdk/esp32s2/include/esp_netif/include/esp_netif_defaults.h
@@ -55,7 +55,7 @@ extern "C" {
         ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(mac) \
         ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(ip_info) \
         .get_ip_event = IP_EVENT_ETH_GOT_IP, \
-        .lost_ip_event = 0, \
+        .lost_ip_event = IP_EVENT_ETH_LOST_IP, \
         .if_key = "ETH_DEF", \
         .if_desc = "eth", \
         .route_prio = 50 \
diff --git a/tools/sdk/esp32s2/include/esp_netif/include/esp_netif_types.h b/tools/sdk/esp32s2/include/esp_netif/include/esp_netif_types.h
index 044ca0d1..7c68c717 100644
--- a/tools/sdk/esp32s2/include/esp_netif/include/esp_netif_types.h
+++ b/tools/sdk/esp32s2/include/esp_netif/include/esp_netif_types.h
@@ -88,6 +88,7 @@ typedef enum {
     IP_EVENT_AP_STAIPASSIGNED,         /*!< soft-AP assign an IP to a connected station */
     IP_EVENT_GOT_IP6,                  /*!< station or ap or ethernet interface v6IP addr is preferred */
     IP_EVENT_ETH_GOT_IP,               /*!< ethernet got IP from connected AP */
+    IP_EVENT_ETH_LOST_IP,              /*!< ethernet lost IP and the IP is reset to 0 */
     IP_EVENT_PPP_GOT_IP,               /*!< PPP interface got IP */
     IP_EVENT_PPP_LOST_IP,              /*!< PPP interface lost IP */
 } ip_event_t;
diff --git a/tools/sdk/esp32s2/include/esp_rom/include/esp32c3/rom/ets_sys.h b/tools/sdk/esp32s2/include/esp_rom/include/esp32c3/rom/ets_sys.h
index b3780248..b2567e92 100644
--- a/tools/sdk/esp32s2/include/esp_rom/include/esp32c3/rom/ets_sys.h
+++ b/tools/sdk/esp32s2/include/esp_rom/include/esp32c3/rom/ets_sys.h
@@ -191,7 +191,7 @@ int ets_printf(const char *fmt, ...);
   * @brief  Set the uart channel of ets_printf(uart_tx_one_char).
   *         ROM will set it base on the efuse and gpio setting, however, this can be changed after booting.
   *
-  * @param  uart_no : 0 for UART0, 1 for UART1, 2 for UART2.
+  * @param  uart_no : 0 for UART0, 1 for UART1.
   *
   * @return None
   */
diff --git a/tools/sdk/esp32s2/include/esp_rom/include/esp32c3/rom/uart.h b/tools/sdk/esp32s2/include/esp_rom/include/esp32c3/rom/uart.h
index adbae64d..4e7e5b8e 100644
--- a/tools/sdk/esp32s2/include/esp_rom/include/esp32c3/rom/uart.h
+++ b/tools/sdk/esp32s2/include/esp_rom/include/esp32c3/rom/uart.h
@@ -260,7 +260,7 @@ void uart_tx_flush(uint8_t uart_no);
 /**
   * @brief Wait until uart tx full empty and the last char send ok.
   *
-  * @param  uart_no : 0 for UART0, 1 for UART1, 2 for UART2
+  * @param  uart_no : 0 for UART0, 1 for UART1
   *
   * The function defined in ROM code has a bug, so we define the correct version
   * here for compatibility.
diff --git a/tools/sdk/esp32s2/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_spi.h b/tools/sdk/esp32s2/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_spi.h
index b7889100..a6c3c40c 100644
--- a/tools/sdk/esp32s2/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_spi.h
+++ b/tools/sdk/esp32s2/include/esp_serial_slave_link/include/esp_serial_slave_link/essl_spi.h
@@ -28,7 +28,7 @@ extern "C"
 ////////////////////////////////////////////////////////////////////////////////
 
 /**
- * @brief Read the shared buffer from the slave.
+ * @brief Read the shared buffer from the slave in ISR way
  *
  * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
  *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
@@ -46,7 +46,25 @@ extern "C"
 esp_err_t essl_spi_rdbuf(spi_device_handle_t spi, uint8_t *out_data, int addr, int len, uint32_t flags);
 
 /**
- * @brief Write the shared buffer of the slave.
+ * @brief Read the shared buffer from the slave in polling way
+ *
+ * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
+ *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
+ *       overwritten, even the ``len`` is shorter than a word.
+ *
+ * @param spi       SPI device handle representing the slave
+ * @param out_data  Buffer for read data, strongly suggested to be in the DRAM and align to 4
+ * @param addr      Address of the slave shared buffer
+ * @param len       Length to read
+ * @param flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: on success
+ *      - or other return value from :cpp:func:`spi_device_transmit`.
+ */
+esp_err_t essl_spi_rdbuf_polling(spi_device_handle_t spi, uint8_t *out_data, int addr, int len, uint32_t flags);
+
+/**
+ * @brief Write the shared buffer of the slave in ISR way
  *
  * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
  *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
@@ -63,6 +81,24 @@ esp_err_t essl_spi_rdbuf(spi_device_handle_t spi, uint8_t *out_data, int addr, i
  */
 esp_err_t essl_spi_wrbuf(spi_device_handle_t spi, const uint8_t *data, int addr, int len, uint32_t flags);
 
+/**
+ * @brief Write the shared buffer of the slave in polling way
+ *
+ * @note ``out_data`` should be prepared in words and in the DRAM. The buffer may be written in words
+ *       by the DMA. When a byte is written, the remaining bytes in the same word will also be
+ *       overwritten, even the ``len`` is shorter than a word.
+ *
+ * @param spi       SPI device handle representing the slave
+ * @param data      Buffer for data to send, strongly suggested to be in the DRAM and align to 4
+ * @param addr      Address of the slave shared buffer,
+ * @param len       Length to write
+ * @param flags     `SPI_TRANS_*` flags to control the transaction mode of the transaction to send.
+ * @return
+ *      - ESP_OK: success
+ *      - or other return value from :cpp:func:`spi_device_polling_transmit`.
+ */
+esp_err_t essl_spi_wrbuf_polling(spi_device_handle_t spi, const uint8_t *data, int addr, int len, uint32_t flags);
+
 /**
  * @brief Receive long buffer in segments from the slave through its DMA.
  *
diff --git a/tools/sdk/esp32s2/include/esp_wifi/include/esp_mesh.h b/tools/sdk/esp32s2/include/esp_wifi/include/esp_mesh.h
index 242e3ad8..ab8f8a4c 100644
--- a/tools/sdk/esp32s2/include/esp_wifi/include/esp_mesh.h
+++ b/tools/sdk/esp32s2/include/esp_wifi/include/esp_mesh.h
@@ -655,7 +655,7 @@ esp_err_t esp_mesh_stop(void);
  *               - If the packet is to the root ("to" parameter isn't NULL) or to external IP network, MESH_DATA_TODS should be set.
  *               - If the packet is from the root to an internal device, MESH_DATA_FROMDS should be set.
  *             - Specify whether this API is block or non-block, block by default
- *               - If needs non-block, MESH_DATA_NONBLOCK should be set.
+ *               - If needs non-blocking, MESH_DATA_NONBLOCK should be set. Otherwise, may use esp_mesh_send_block_time() to specify a blocking time.
  *             - In the situation of the root change, MESH_DATA_DROP identifies this packet can be dropped by the new root
  *               for upstream data to external IP network, we try our best to avoid data loss caused by the root change, but
  *               there is a risk that the new root is running out of memory because most of memory is occupied by the pending data which
@@ -688,6 +688,17 @@ esp_err_t esp_mesh_stop(void);
  */
 esp_err_t esp_mesh_send(const mesh_addr_t *to, const mesh_data_t *data,
                         int flag, const mesh_opt_t opt[],  int opt_count);
+/**
+ * @brief      Set blocking time of esp_mesh_send()
+ *
+ * @attention  This API shall be called before mesh is started.
+ *
+ * @param[in]  time_ms  blocking time of esp_mesh_send(), unit:ms
+ *
+ * @return
+ *    - ESP_OK
+ */
+esp_err_t esp_mesh_send_block_time(uint32_t time_ms);
 
 /**
  * @brief      Receive a packet targeted to self over the mesh network
@@ -1665,7 +1676,6 @@ int esp_mesh_get_running_active_duty_cycle(void);
  *    - ESP_OK
  */
 esp_err_t esp_mesh_ps_duty_signaling(int fwd_times);
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/esp_wifi/include/esp_private/wifi.h b/tools/sdk/esp32s2/include/esp_wifi/include/esp_private/wifi.h
index 3c5a93a1..428cc7d9 100644
--- a/tools/sdk/esp32s2/include/esp_wifi/include/esp_private/wifi.h
+++ b/tools/sdk/esp32s2/include/esp_wifi/include/esp_private/wifi.h
@@ -72,17 +72,6 @@ typedef enum {
     WIFI_LOG_MODULE_MESH, /*logs related to Mesh*/
 } wifi_log_module_t;
 
-/**
-  * @brief FTM Report log levels configuration
-  *
-  */
-typedef struct {
-    uint8_t show_rtt:1;     /**< Display all valid Round-Trip-Time readings for FTM frames */
-    uint8_t show_diag:1;    /**< Display dialogue tokens for all FTM frames with valid readings */
-    uint8_t show_t1t2t3t4:1;/**< Display all valid T1, T2, T3, T4 readings considered while calculating RTT */
-    uint8_t show_rxrssi:1;  /**< Display RSSI for each FTM frame with valid readings */
-} ftm_report_log_level_t;
-
 /**
   * @brief WiFi log submodule definition
   *
@@ -598,17 +587,6 @@ void esp_wifi_set_sleep_delay_time(uint32_t return_to_sleep_delay);
  */
 void esp_wifi_set_keep_alive_time(uint32_t keep_alive_time);
 
-/**
- * @brief Set FTM Report log level
- *
- * @param   log_lvl Log levels configuration
- *
- * @return
- *    - ESP_OK: succeed
- *    - ESP_ERR_NOT_SUPPORTED: No FTM support
- */
-esp_err_t esp_wifi_set_ftm_report_log_level(ftm_report_log_level_t *log_lvl);
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/esp_wifi/include/esp_wifi_default.h b/tools/sdk/esp32s2/include/esp_wifi/include/esp_wifi_default.h
index 4ce7f8b2..958977bf 100644
--- a/tools/sdk/esp32s2/include/esp_wifi/include/esp_wifi_default.h
+++ b/tools/sdk/esp32s2/include/esp_wifi/include/esp_wifi_default.h
@@ -70,6 +70,9 @@ esp_err_t esp_wifi_clear_default_wifi_driver_and_handlers(void *esp_netif);
 /**
  * @brief Creates default WIFI AP. In case of any init error this API aborts.
  *
+ * @note The API creates esp_netif object with default WiFi access point config,
+ * attaches the netif to wifi and registers default wifi handlers.
+ *
  * @return pointer to esp-netif instance
  */
 esp_netif_t* esp_netif_create_default_wifi_ap(void);
@@ -77,10 +80,23 @@ esp_netif_t* esp_netif_create_default_wifi_ap(void);
 /**
  * @brief Creates default WIFI STA. In case of any init error this API aborts.
  *
+ * @note The API creates esp_netif object with default WiFi station config,
+ * attaches the netif to wifi and registers default wifi handlers.
+ *
  * @return pointer to esp-netif instance
  */
 esp_netif_t* esp_netif_create_default_wifi_sta(void);
 
+/**
+ * @brief Destroys default WIFI netif created with esp_netif_create_default_wifi_...() API.
+ *
+ * @param[in] esp_netif object to detach from WiFi and destroy
+ *
+ * @note This API unregisters wifi handlers and detaches the created object from the wifi.
+ * (this function is a no-operation if esp_netif is NULL)
+ */
+void esp_netif_destroy_default_wifi(void *esp_netif);
+
 /**
  * @brief Creates esp_netif WiFi object based on the custom configuration.
  *
diff --git a/tools/sdk/esp32s2/include/esp_wifi/include/esp_wifi_types.h b/tools/sdk/esp32s2/include/esp_wifi/include/esp_wifi_types.h
index f159857c..03b8ae6a 100644
--- a/tools/sdk/esp32s2/include/esp_wifi/include/esp_wifi_types.h
+++ b/tools/sdk/esp32s2/include/esp_wifi/include/esp_wifi_types.h
@@ -233,6 +233,7 @@ typedef struct {
     uint8_t max_connection;     /**< Max number of stations allowed to connect in, default 4, max 10 */
     uint16_t beacon_interval;   /**< Beacon interval which should be multiples of 100. Unit: TU(time unit, 1 TU = 1024 us). Range: 100 ~ 60000. Default value: 100 */
     wifi_cipher_type_t pairwise_cipher;   /**< pairwise cipher of SoftAP, group cipher will be derived using this. cipher values are valid starting from WIFI_CIPHER_TYPE_TKIP, enum values before that will be considered as invalid and default cipher suites(TKIP+CCMP) will be used. Valid cipher suites in softAP mode are WIFI_CIPHER_TYPE_TKIP, WIFI_CIPHER_TYPE_CCMP and WIFI_CIPHER_TYPE_TKIP_CCMP. */
+    bool ftm_responder;         /**< Enable FTM Responder mode */
 } wifi_ap_config_t;
 
 /** @brief STA configuration settings for the ESP32 */
diff --git a/tools/sdk/esp32s2/include/espcoredump/include/esp_core_dump.h b/tools/sdk/esp32s2/include/espcoredump/include/esp_core_dump.h
index f8b029d5..7d41b97e 100644
--- a/tools/sdk/esp32s2/include/espcoredump/include/esp_core_dump.h
+++ b/tools/sdk/esp32s2/include/espcoredump/include/esp_core_dump.h
@@ -104,6 +104,19 @@ void esp_core_dump_to_uart(panic_info_t *info);
 /*********************************** USER MODE API ************************************/
 /**************************************************************************************/
 
+/**
+ * @brief  Check integrity of coredump data in flash.
+ *         This function reads the coredump data while calculating their checksum. If it
+ *         doesn't match the checksum written on flash, it means data are corrupted,
+ *         an error will be returned. Else, ESP_OK is returned.
+ *
+ * @return `ESP_OK` if core dump is present and valid, `ESP_ERR_NOT_FOUND` if no core dump
+ *         is stored in the partition, `ESP_ERR_INVALID_SIZE` or `ESP_ERR_INVALID_CRC`
+ *         if the core dump is corrupted, other errors when unable to access flash, in that
+ *         case please refer to \see esp_err_t
+ */
+esp_err_t esp_core_dump_image_check(void);
+
 /**
  * @brief  Retrieves address and size of coredump data in flash.
  *         This function is always available, even when core dump is disabled in menuconfig.
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/cpu_ll.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/cpu_ll.h
index c70955eb..ded1ca3a 100644
--- a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/cpu_ll.h
+++ b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/cpu_ll.h
@@ -165,7 +165,7 @@ static inline bool cpu_ll_is_debugger_attached(void)
 
 static inline void cpu_ll_break(void)
 {
-    __asm__ ("break 0,0");
+    __asm__ ("break 1,15");
 }
 
 static inline void cpu_ll_set_vecbase(const void* vecbase)
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/interrupt_controller_ll.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/interrupt_controller_ll.h
index 5c270ec6..3a33d92a 100644
--- a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/interrupt_controller_ll.h
+++ b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/interrupt_controller_ll.h
@@ -18,6 +18,8 @@
 #include "soc/soc_caps.h"
 #include "soc/soc.h"
 #include "xtensa/xtensa_api.h"
+#include "xtensa/config/specreg.h"
+#include "xt_instr_macros.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -43,6 +45,18 @@ static inline void intr_cntrl_ll_disable_interrupts(uint32_t mask)
     xt_ints_off(mask);
 }
 
+/**
+ * @brief Read the current interrupt mask of the CPU running this code.
+ *
+ * @return The current interrupt bitmask.
+ */
+static inline uint32_t intr_cntrl_ll_read_interrupt_mask(void)
+{
+    uint32_t int_mask;
+    RSR(INTENABLE, int_mask);
+    return int_mask;
+}
+
 /**
  * @brief checks if given interrupt number has a valid handler
  *
@@ -79,27 +93,6 @@ static inline void *intr_cntrl_ll_get_int_handler_arg(uint8_t intr)
     return xt_get_interrupt_handler_arg(intr);
 }
 
-/**
- * @brief Disables interrupts that are not located in iram
- *
- * @param newmask mask of interrupts needs to be disabled
- * @return oldmask where to store old interrupts state
- */
-static inline uint32_t intr_cntrl_ll_disable_int_mask(uint32_t newmask)
-{
-    return xt_int_disable_mask(newmask);
-}
-
-/**
- * @brief Enables interrupts that are not located in iram
- *
- * @param newmask mask of interrupts needs to be disabled
- */
-static inline void intr_cntrl_ll_enable_int_mask(uint32_t newmask)
-{
-    xt_int_enable_mask(newmask);
-}
-
 /**
  * @brief Acknowledge an edge-trigger interrupt by clearing its pending flag
  *
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/mpu_ll.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/mpu_ll.h
index fc491e2b..2ec955b4 100644
--- a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/mpu_ll.h
+++ b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/mpu_ll.h
@@ -22,7 +22,7 @@
 extern "C" {
 #endif
 
-static inline uint32_t mpu_ll_id_to_addr(int id)
+static inline uint32_t mpu_ll_id_to_addr(unsigned id)
 {
     // vpn - id
     // 0x00000000 = 0
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/spi_flash_encrypted_ll.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/spi_flash_encrypted_ll.h
new file mode 100644
index 00000000..db30884b
--- /dev/null
+++ b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/spi_flash_encrypted_ll.h
@@ -0,0 +1,166 @@
+// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The ll is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The Lowlevel layer for SPI Flash Encryption.
+
+#include "soc/system_reg.h"
+#include "soc/hwcrypto_reg.h"
+#include "soc/soc.h"
+#include "string.h"
+#include "assert.h"
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// Choose type of chip you want to encrypt manully
+typedef enum
+{
+    FLASH_ENCRYPTION_MANU = 0, ///!< Manually encrypt the flash chip.
+    PSRAM_ENCRYPTION_MANU = 1  ///!< Manually encrypt the psram chip.
+} flash_encrypt_ll_type_t;
+
+/**
+ * Enable the flash encryption function under spi boot mode and download boot mode.
+ */
+static inline void spi_flash_encrypt_ll_enable(void)
+{
+    REG_SET_BIT(DPORT_EXTERNAL_DEVICE_ENCRYPT_DECRYPT_CONTROL_REG,
+                DPORT_ENABLE_DOWNLOAD_MANUAL_ENCRYPT |
+                DPORT_ENABLE_SPI_MANUAL_ENCRYPT);
+}
+
+/**
+ * Enable the AES accelerator.
+ * Also clear reset on digital signature unit, otherwise AES is held in resetop.
+ */
+static inline void spi_flash_encrypt_ll_aes_accelerator_enable(void)
+{
+    REG_SET_BIT(DPORT_CPU_PERIP_CLK_EN1_REG, DPORT_CRYPTO_AES_CLK_EN);
+    REG_CLR_BIT(DPORT_CPU_PERIP_RST_EN1_REG, DPORT_CRYPTO_AES_RST | DPORT_CRYPTO_DS_RST);
+}
+
+/*
+ * Disable the flash encryption mode.
+ */
+static inline void spi_flash_encrypt_ll_disable(void)
+{
+    REG_CLR_BIT(DPORT_EXTERNAL_DEVICE_ENCRYPT_DECRYPT_CONTROL_REG,
+                DPORT_ENABLE_SPI_MANUAL_ENCRYPT);
+}
+
+/**
+ * Choose type of chip you want to encrypt manully
+ *
+ * @param type The type of chip to be encrypted
+ *
+ * @note The hardware currently support flash encryption.
+ */
+static inline void spi_flash_encrypt_ll_type(flash_encrypt_ll_type_t type)
+{
+    // Our hardware only support flash encryption
+    assert(type == FLASH_ENCRYPTION_MANU);
+    REG_WRITE(AES_XTS_DESTINATION_REG, type);
+}
+
+/**
+ * Configure the data size of a single encryption.
+ *
+ * @param block_size Size of the desired block.
+ */
+static inline void spi_flash_encrypt_ll_buffer_length(uint32_t size)
+{
+    // Desired block should not be larger than the block size.
+    REG_WRITE(AES_XTS_SIZE_REG, size >> 5);
+}
+
+/**
+ * Save 32-bit piece of plaintext.
+ *
+ * @param address the address of written flash partition.
+ * @param buffer Buffer to store the input data.
+ * @param size Buffer size.
+ */
+static inline void spi_flash_encrypt_ll_plaintext_save(uint32_t address, const uint32_t* buffer, uint32_t size)
+{
+    uint32_t plaintext_offs = (address % 64);
+    memcpy((void *)(AES_XTS_PLAIN_BASE + plaintext_offs), buffer, size);
+}
+
+/**
+ * Copy the flash address to XTS_AES physical address
+ *
+ * @param flash_addr flash address to write.
+ */
+static inline void spi_flash_encrypt_ll_address_save(uint32_t flash_addr)
+{
+    REG_WRITE(AES_XTS_PHYSICAL_ADDR_REG, flash_addr);
+}
+
+/**
+ * Start flash encryption
+ */
+static inline void spi_flash_encrypt_ll_calculate_start(void)
+{
+    REG_WRITE(AES_XTS_TRIGGER_REG, 1);
+}
+
+/**
+ * Wait for flash encryption termination
+ */
+static inline void spi_flash_encrypt_ll_calculate_wait_idle(void)
+{
+    while(REG_READ(AES_XTS_STATE_REG) == 0x1) {
+    }
+}
+
+/**
+ * Finish the flash encryption and make encrypted result accessible to SPI.
+ */
+static inline void spi_flash_encrypt_ll_done(void)
+{
+    REG_WRITE(AES_XTS_RELEASE_REG, 1);
+    while(REG_READ(AES_XTS_STATE_REG) != 0x3) {
+    }
+}
+
+/**
+ * Set to destroy encrypted result
+ */
+static inline void spi_flash_encrypt_ll_destroy(void)
+{
+    REG_WRITE(AES_XTS_DESTROY_REG, 1);
+}
+
+/**
+ * Check if is qualified to encrypt the buffer
+ *
+ * @param address the address of written flash partition.
+ * @param length Buffer size.
+ */
+static inline bool spi_flash_encrypt_ll_check(uint32_t address, uint32_t length)
+{
+    return ((address % length) == 0) ? true : false;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/spi_ll.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/spi_ll.h
index d11fbcd9..5ede97d9 100644
--- a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/spi_ll.h
+++ b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/spi_ll.h
@@ -995,7 +995,7 @@ static inline void spi_ll_set_intr(spi_dev_t* hw, spi_ll_intr_t intr_mask)
 
 static inline void spi_ll_clear_intr(spi_dev_t* hw, spi_ll_intr_t intr_mask)
 {
-#define CLR_INTR(intr_bit, _, __, clr_op) if (intr_mask & (intr_bit)) hw->clr_op;
+#define CLR_INTR(intr_bit, _, __, clr_reg) if (intr_mask & (intr_bit)) hw->clr_reg;
     FOR_EACH_ITEM(CLR_INTR, INTR_LIST);
 #undef CLR_INTR
 }
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/systimer_ll.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/systimer_ll.h
index 752ad2dd..158c4a8a 100644
--- a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/systimer_ll.h
+++ b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/systimer_ll.h
@@ -1,4 +1,4 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+// Copyright 2020-2021 Espressif Systems (Shanghai) PTE LTD
 //
 // Licensed under the Apache License, Version 2.0 (the "License");
 // you may not use this file except in compliance with the License.
@@ -13,124 +13,158 @@
 // limitations under the License.
 #pragma once
 
+#include <stdint.h>
+#include <stdbool.h>
+#include <assert.h>
+#include "soc/systimer_struct.h"
+
+#define SYSTIMER_LL_COUNTER_CLOCK (0) // Counter used for "wallclock" time
+#define SYSTIMER_LL_ALARM_CLOCK   (2) // Alarm used for "wallclock" time
+
+#define SYSTIMER_LL_TICKS_PER_US  (80) // 80 systimer ticks == 1us
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include <stdint.h>
-#include <stdbool.h>
-#include "soc/soc.h"
-#include "soc/systimer_reg.h"
-
 // All these functions get invoked either from ISR or HAL that linked to IRAM.
 // Always inline these functions even no gcc optimization is applied.
 
-/*******************counter*************************/
+/******************* Clock *************************/
 
-__attribute__((always_inline)) static inline void systimer_ll_enable_clock(void)
+__attribute__((always_inline)) static inline void systimer_ll_enable_clock(systimer_dev_t *dev, bool en)
 {
-    REG_SET_BIT(SYSTIMER_CONF_REG, SYSTIMER_CLK_EN);
+    dev->conf.clk_en = en;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_apply_counter_value(void)
+/******************* Counter *************************/
+
+__attribute__((always_inline)) static inline void systimer_ll_enable_counter(systimer_dev_t *dev, uint32_t counter_id, bool en)
 {
-    REG_SET_BIT(SYSTIMER_LOAD_REG, SYSTIMER_TIMER_LOAD);
+    // ESP32-S2 only has one counter in systimer group
+    (void)dev;
+    (void)counter_id;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_load_counter_value(uint64_t value)
+__attribute__((always_inline)) static inline void systimer_ll_counter_can_stall_by_cpu(systimer_dev_t *dev, uint32_t counter_id, uint32_t cpu_id, bool can)
 {
-    REG_WRITE(SYSTIMER_LOAD_LO_REG, value & 0xFFFFFFFF);
-    REG_WRITE(SYSTIMER_LOAD_HI_REG, (value & 0xFFFFFFFF00000000) >> 32);
+    (void)dev;
+    (void)counter_id;
+    (void)cpu_id;
+    (void)can;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_set_step_for_pll(uint32_t step)
+__attribute__((always_inline)) static inline void systimer_ll_counter_snapshot(systimer_dev_t *dev, uint32_t counter_id)
 {
-    REG_SET_FIELD(SYSTIMER_STEP_REG, SYSTIMER_TIMER_PLL_STEP, step);
+    (void)counter_id;
+    dev->update.timer_update = 1;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_set_step_for_xtal(uint32_t step)
+__attribute__((always_inline)) static inline bool systimer_ll_is_counter_value_valid(systimer_dev_t *dev, uint32_t counter_id)
 {
-    REG_SET_FIELD(SYSTIMER_STEP_REG, SYSTIMER_TIMER_XTAL_STEP, step);
+    (void)counter_id;
+    return dev->update.timer_value_valid;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_counter_snapshot(void)
+__attribute__((always_inline)) static inline void systimer_ll_set_counter_value(systimer_dev_t *dev, uint32_t counter_id, uint64_t value)
 {
-    REG_WRITE(SYSTIMER_UPDATE_REG, SYSTIMER_TIMER_UPDATE);
+    (void)counter_id;
+    dev->load_hi.timer_load_hi = value >> 32;
+    dev->load_lo.timer_load_lo = value;
 }
 
-__attribute__((always_inline)) static inline bool systimer_ll_is_counter_value_valid(void)
+__attribute__((always_inline)) static inline uint32_t systimer_ll_get_counter_value_low(systimer_dev_t *dev, uint32_t counter_id)
 {
-    return REG_GET_BIT(SYSTIMER_UPDATE_REG, SYSTIMER_TIMER_VALUE_VALID);
+    return dev->value_lo.timer_value_lo;
 }
 
-__attribute__((always_inline)) static inline uint32_t systimer_ll_get_counter_value_low(void)
+__attribute__((always_inline)) static inline uint32_t systimer_ll_get_counter_value_high(systimer_dev_t *dev, uint32_t counter_id)
 {
-    return REG_READ(SYSTIMER_VALUE_LO_REG);
+    return dev->value_hi.timer_value_hi;
 }
 
-__attribute__((always_inline)) static inline uint32_t systimer_ll_get_counter_value_high(void)
+__attribute__((always_inline)) static inline void systimer_ll_apply_counter_value(systimer_dev_t *dev, uint32_t counter_id)
 {
-    return REG_READ(SYSTIMER_VALUE_HI_REG);
+    dev->load.timer_load = 1;
 }
 
-/*******************alarm*************************/
-
-__attribute__((always_inline)) static inline void systimer_ll_set_alarm_value(uint32_t alarm_id, uint64_t value)
+__attribute__((always_inline)) static inline void systimer_ll_set_step_for_pll(systimer_dev_t *dev, uint32_t step)
 {
-    REG_WRITE(SYSTIMER_TARGET0_LO_REG + alarm_id * 8, value & 0xFFFFFFFF);
-    REG_WRITE(SYSTIMER_TARGET0_HI_REG + alarm_id * 8, (value & 0xFFFFFFFF00000000) >> 32);
+    dev->step.timer_pll_step = step;
 }
 
-__attribute__((always_inline)) static inline uint64_t systimer_ll_get_alarm_value(uint32_t alarm_id)
+__attribute__((always_inline)) static inline void systimer_ll_set_step_for_xtal(systimer_dev_t *dev, uint32_t step)
 {
-    return (uint64_t)REG_READ(SYSTIMER_TARGET0_HI_REG + alarm_id * 8) << 32 | REG_READ(SYSTIMER_TARGET0_LO_REG + alarm_id * 8);
+    dev->step.timer_xtal_step = step;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_enable_alarm(uint32_t alarm_id)
+/******************* Alarm *************************/
+
+__attribute__((always_inline)) static inline void systimer_ll_set_alarm_target(systimer_dev_t *dev, uint32_t alarm_id, uint64_t value)
 {
-    REG_SET_BIT(SYSTIMER_TARGET0_CONF_REG + alarm_id * 4, BIT(31));
+    dev->target_val[alarm_id].hi.timer_target_hi = value >> 32;
+    dev->target_val[alarm_id].lo.timer_target_lo = value;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_disable_alarm(uint32_t alarm_id)
+__attribute__((always_inline)) static inline uint64_t systimer_ll_get_alarm_target(systimer_dev_t *dev, uint32_t alarm_id)
 {
-    REG_CLR_BIT(SYSTIMER_TARGET0_CONF_REG + alarm_id * 4, BIT(31));
+    return ((uint64_t)(dev->target_val[alarm_id].hi.timer_target_hi) << 32) | dev->target_val[alarm_id].lo.timer_target_lo;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_oneshot(uint32_t alarm_id)
+__attribute__((always_inline)) static inline void systimer_ll_connect_alarm_counter(systimer_dev_t *dev, uint32_t alarm_id, uint32_t counter_id)
 {
-    REG_CLR_BIT(SYSTIMER_TARGET0_CONF_REG + alarm_id * 4, BIT(30));
+    // On esp32-s2, counter int the systimer is fixed connectred to other three alarm comparators
+    (void)dev;
+    (void)alarm_id;
+    (void)counter_id;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_period(uint32_t alarm_id)
+__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_oneshot(systimer_dev_t *dev, uint32_t alarm_id)
 {
-    REG_SET_BIT(SYSTIMER_TARGET0_CONF_REG + alarm_id * 4, BIT(30));
+    dev->target_conf[alarm_id].target_period_mode = 0;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_set_alarm_period(uint32_t alarm_id, uint32_t period)
+__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_period(systimer_dev_t *dev, uint32_t alarm_id)
 {
-    REG_SET_FIELD(SYSTIMER_TARGET0_CONF_REG + alarm_id * 4, SYSTIMER_TARGET0_PERIOD, period);
+    dev->target_conf[alarm_id].target_period_mode = 1;
 }
 
-/*******************interrupt*************************/
-
-__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_int(uint32_t alarm_id)
+__attribute__((always_inline)) static inline void systimer_ll_set_alarm_period(systimer_dev_t *dev, uint32_t alarm_id, uint32_t period)
 {
-    REG_SET_BIT(SYSTIMER_INT_ENA_REG, 1 << alarm_id);
+    assert(period < (1 << 30));
+    dev->target_conf[alarm_id].target_period = period;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_disable_alarm_int(uint32_t alarm_id)
+__attribute__((always_inline)) static inline void systimer_ll_apply_alarm_value(systimer_dev_t *dev, uint32_t alarm_id)
 {
-    REG_CLR_BIT(SYSTIMER_INT_ENA_REG, 1 << alarm_id);
+    (void)dev;
+    (void)alarm_id;
 }
 
-__attribute__((always_inline)) static inline bool systimer_ll_is_alarm_int_fired(uint32_t alarm_id)
+__attribute__((always_inline)) static inline void systimer_ll_enable_alarm(systimer_dev_t *dev, uint32_t alarm_id, bool en)
 {
-    return REG_GET_BIT(SYSTIMER_INT_RAW_REG, 1 << alarm_id);
+    dev->target_conf[alarm_id].target_work_en = en;
 }
 
-__attribute__((always_inline)) static inline void systimer_ll_clear_alarm_int(uint32_t alarm_id)
+/******************* Interrupt *************************/
+
+__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_int(systimer_dev_t *dev, uint32_t alarm_id, bool en)
 {
-    REG_SET_BIT(SYSTIMER_INT_CLR_REG, 1 << alarm_id);
+    if (en) {
+        dev->int_ena.val |= 1 << alarm_id;
+    } else {
+        dev->int_ena.val &= ~(1 << alarm_id);
+    }
+}
+
+__attribute__((always_inline)) static inline bool systimer_ll_is_alarm_int_fired(systimer_dev_t *dev, uint32_t alarm_id)
+{
+    return dev->int_raw.val & (1 << alarm_id);
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_clear_alarm_int(systimer_dev_t *dev, uint32_t alarm_id)
+{
+    dev->int_clr.val |= 1 << alarm_id;
 }
 
 #ifdef __cplusplus
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/usb_types_private.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/usb_types_private.h
new file mode 100644
index 00000000..0a501605
--- /dev/null
+++ b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/usb_types_private.h
@@ -0,0 +1,49 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*
+Note: This header file contains USB2.0 related types and macros that can be used by code specific to the DWC_OTG
+controller (i.e., the HW specific layers of the USB host stack). Thus, this header is only meant to be used below (and
+including) the HAL layer. For types and macros that are HW implementation agnostic (i.e., HCD layer and above), add them
+to the "usb.h" header instead.
+*/
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief USB speeds supported by the DWC OTG controller
+ */
+typedef enum {
+    USB_PRIV_SPEED_FULL,
+    USB_PRIV_SPEED_LOW,
+} usb_priv_speed_t;
+
+/**
+ * @brief USB transfer types supported by the DWC OTG controller
+ */
+typedef enum {
+    USB_PRIV_XFER_TYPE_CTRL,
+    USB_PRIV_XFER_TYPE_ISOCHRONOUS,
+    USB_PRIV_XFER_TYPE_BULK,
+    USB_PRIV_XFER_TYPE_INTR,
+} usb_priv_xfer_type_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/usbh_hal.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/usbh_hal.h
index 6e1f0577..17afacd7 100644
--- a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/usbh_hal.h
+++ b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/usbh_hal.h
@@ -28,7 +28,7 @@ NOTE: Thread safety is the responsibility fo the HAL user. All USB Host HAL
 #include "soc/usbh_struct.h"
 #include "soc/usb_wrap_struct.h"
 #include "hal/usbh_ll.h"
-#include "hal/usb_types.h"
+#include "hal/usb_types_private.h"
 
 /* -----------------------------------------------------------------------------
 ------------------------------- Macros and Types -------------------------------
@@ -121,7 +121,7 @@ typedef enum {
 typedef struct {
     union {
         struct {
-            usb_xfer_type_t type: 2;        /**< The type of endpoint */
+            usb_priv_xfer_type_t type: 2;   /**< The type of endpoint */
             uint32_t bEndpointAddress: 8;   /**< Endpoint address (containing endpoint number and direction) */
             uint32_t mps: 11;               /**< Maximum Packet Size */
             uint32_t dev_addr: 8;           /**< Device Address */
@@ -413,9 +413,9 @@ static inline bool usbh_hal_port_check_if_connected(usbh_hal_context_t *hal)
  *       connected to the host port
  *
  * @param hal Context of the HAL layer
- * @return usb_speed_t Speed of the connected device
+ * @return usb_priv_speed_t Speed of the connected device (FS or LS only on the esp32-s2)
  */
-static inline usb_speed_t usbh_hal_port_get_conn_speed(usbh_hal_context_t *hal)
+static inline usb_priv_speed_t usbh_hal_port_get_conn_speed(usbh_hal_context_t *hal)
 {
     return usbh_ll_hprt_get_speed(hal->dev);
 }
diff --git a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/usbh_ll.h b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/usbh_ll.h
index af82e25b..6e7a9a06 100644
--- a/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/usbh_ll.h
+++ b/tools/sdk/esp32s2/include/hal/esp32s2/include/hal/usbh_ll.h
@@ -22,7 +22,7 @@ extern "C" {
 #include <stdbool.h>
 #include "soc/usbh_struct.h"
 #include "soc/usb_wrap_struct.h"
-#include "hal/usb_types.h"
+#include "hal/usb_types_private.h"
 
 /* -----------------------------------------------------------------------------
 ------------------------------- Global Registers -------------------------------
@@ -419,7 +419,7 @@ static inline void usbh_ll_hcfg_set_fsls_pclk_sel(usbh_dev_t *hw)
  *
  * @param hw
  */
-static inline void usbh_ll_hcfg_set_defaults(usbh_dev_t *hw, usb_speed_t speed)
+static inline void usbh_ll_hcfg_set_defaults(usbh_dev_t *hw, usb_priv_speed_t speed)
 {
     hw->hcfg_reg.descdma = 1;   //Enable scatt/gatt
     hw->hcfg_reg.fslssupp = 1;  //FS/LS supp only
@@ -428,13 +428,13 @@ static inline void usbh_ll_hcfg_set_defaults(usbh_dev_t *hw, usb_speed_t speed)
     Note: It seems like our PHY has an implicit 8 divider applied when in LS mode,
           so the values of FSLSPclkSel and FrInt have to be adjusted accordingly.
     */
-    hw->hcfg_reg.fslspclksel = (speed == USB_SPEED_FULL) ? 1 : 2;
+    hw->hcfg_reg.fslspclksel = (speed == USB_PRIV_SPEED_FULL) ? 1 : 2;  //esp32-s2 only supports FS or LS
     hw->hcfg_reg.perschedena = 0;   //Disable perio sched
 }
 
 // ----------------------------- HFIR Register ---------------------------------
 
-static inline void usbh_ll_hfir_set_defaults(usbh_dev_t *hw, usb_speed_t speed)
+static inline void usbh_ll_hfir_set_defaults(usbh_dev_t *hw, usb_priv_speed_t speed)
 {
     usb_hfir_reg_t hfir;
     hfir.val = hw->hfir_reg.val;
@@ -444,7 +444,7 @@ static inline void usbh_ll_hfir_set_defaults(usbh_dev_t *hw, usb_speed_t speed)
     Note: It seems like our PHY has an implicit 8 divider applied when in LS mode,
           so the values of FSLSPclkSel and FrInt have to be adjusted accordingly.
     */
-    hfir.frint = (speed == USB_SPEED_FULL) ? 48000 : 6000;
+    hfir.frint = (speed == USB_PRIV_SPEED_FULL) ? 48000 : 6000; //esp32-s2 only supports FS or LS
     hw->hfir_reg.val = hfir.val;
 }
 
@@ -510,14 +510,19 @@ static inline uint32_t usbh_ll_get_frame_list_base_addr(usbh_dev_t *hw)
 
 // ----------------------------- HPRT Register ---------------------------------
 
-static inline usb_speed_t usbh_ll_hprt_get_speed(usbh_dev_t *hw)
+static inline usb_priv_speed_t usbh_ll_hprt_get_speed(usbh_dev_t *hw)
 {
-    int prtspd = hw->hprt_reg.prtspd;
-    if (prtspd == 1) {
-        return USB_SPEED_FULL;
-    } else {
-        return USB_SPEED_LOW;
+    usb_priv_speed_t speed;
+    //esp32-s2 only supports FS or LS
+    switch (hw->hprt_reg.prtspd) {
+        case 1:
+            speed = USB_PRIV_SPEED_FULL;
+            break;
+        default:
+            speed = USB_PRIV_SPEED_LOW;
+            break;
     }
+    return speed;
 }
 
 static inline uint32_t usbh_ll_hprt_get_test_ctl(usbh_dev_t *hw)
@@ -674,24 +679,24 @@ static inline void usbh_ll_chan_set_dev_addr(volatile usb_host_chan_regs_t *chan
     chan->hcchar_reg.devaddr = addr;
 }
 
-static inline void usbh_ll_chan_set_ep_type(volatile usb_host_chan_regs_t *chan, usb_xfer_type_t type)
+static inline void usbh_ll_chan_set_ep_type(volatile usb_host_chan_regs_t *chan, usb_priv_xfer_type_t type)
 {
+    uint32_t ep_type;
     switch (type) {
-        case USB_XFER_TYPE_CTRL:
-            chan->hcchar_reg.eptype = 0x0;
+        case USB_PRIV_XFER_TYPE_CTRL:
+            ep_type = 0;
             break;
-        case USB_XFER_TYPE_ISOCHRONOUS:
-            chan->hcchar_reg.eptype = 0x1;
+        case USB_PRIV_XFER_TYPE_ISOCHRONOUS:
+            ep_type = 1;
             break;
-        case USB_XFER_TYPE_BULK:
-            chan->hcchar_reg.eptype = 0x2;
+        case USB_PRIV_XFER_TYPE_BULK:
+            ep_type = 2;
             break;
-        case USB_XFER_TYPE_INTR:
-            chan->hcchar_reg.eptype = 0x3;
+        default:    //USB_PRIV_XFER_TYPE_INTR
+            ep_type = 3;
             break;
-        default:
-            ;
     }
+    chan->hcchar_reg.eptype = ep_type;
 }
 
 //Indicates whether channel is commuunicating with a LS device connected via a FS hub. Setting this bit to 1 will cause
@@ -716,9 +721,9 @@ static inline void usbh_ll_chan_set_mps(volatile usb_host_chan_regs_t *chan, uin
     chan->hcchar_reg.mps = mps;
 }
 
-static inline void usbh_ll_chan_hcchar_init(volatile usb_host_chan_regs_t *chan, int dev_addr, int ep_num, int mps, usb_xfer_type_t type, bool is_in, bool is_ls)
+static inline void usbh_ll_chan_hcchar_init(volatile usb_host_chan_regs_t *chan, int dev_addr, int ep_num, int mps, usb_priv_xfer_type_t type, bool is_in, bool is_ls)
 {
-    //Sets all persistent fields of the channel over its lifetime
+    //Sets all persistent fields of the channel over its lifetimez
     usbh_ll_chan_set_dev_addr(chan, dev_addr);
     usbh_ll_chan_set_ep_type(chan, type);
     usbh_ll_chan_set_lspddev(chan, is_ls);
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/ds_hal.h b/tools/sdk/esp32s2/include/hal/include/hal/ds_hal.h
index fe7d7892..253fab9f 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/ds_hal.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/ds_hal.h
@@ -60,11 +60,6 @@ void ds_hal_start(void);
  */
 void ds_hal_finish(void);
 
-/**
- * @brief Check whether the key input (HMAC on ESP32-C3) is correct.
- */
-ds_key_check_t ds_hal_check_decryption_key(void);
-
 /**
  * @brief Write the initialization vector.
  */
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/gpio_types.h b/tools/sdk/esp32s2/include/hal/include/hal/gpio_types.h
index 2438014a..8f795e6a 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/gpio_types.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/gpio_types.h
@@ -76,6 +76,9 @@ typedef enum {
 #define GPIO_SEL_44             ((uint64_t)(((uint64_t)1)<<44))  /*!< Pin 44 selected */
 #define GPIO_SEL_45             ((uint64_t)(((uint64_t)1)<<45))  /*!< Pin 45 selected */
 #define GPIO_SEL_46             ((uint64_t)(((uint64_t)1)<<46))  /*!< Pin 46 selected */
+#if CONFIG_IDF_TARGET_ESP32S3
+#define GPIO_SEL_47             ((uint64_t)(((uint64_t)1)<<47))  /*!< Pin 47 selected */
+#endif
 #endif
 
 #define GPIO_PIN_REG_0          IO_MUX_GPIO0_REG
@@ -125,6 +128,7 @@ typedef enum {
 #define GPIO_PIN_REG_44          IO_MUX_GPIO44_REG
 #define GPIO_PIN_REG_45          IO_MUX_GPIO45_REG
 #define GPIO_PIN_REG_46          IO_MUX_GPIO46_REG
+#define GPIO_PIN_REG_47          IO_MUX_GPIO47_REG
 
 #if CONFIG_IDF_TARGET_ESP32
 typedef enum {
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/interrupt_controller_hal.h b/tools/sdk/esp32s2/include/hal/include/hal/interrupt_controller_hal.h
index a7c47e6a..39a5a8e6 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/interrupt_controller_hal.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/interrupt_controller_hal.h
@@ -135,6 +135,16 @@ static inline void interrupt_controller_hal_disable_interrupts(uint32_t mask)
     intr_cntrl_ll_disable_interrupts(mask);
 }
 
+/**
+ * @brief Read the current interrupt mask.
+ *
+ * @return The bitmask of current interrupts
+ */
+static inline uint32_t interrupt_controller_hal_read_interrupt_mask(void)
+{
+    return intr_cntrl_ll_read_interrupt_mask();
+}
+
 /**
  * @brief checks if given interrupt number has a valid handler
  *
@@ -171,27 +181,6 @@ static inline void * interrupt_controller_hal_get_int_handler_arg(uint8_t intr)
     return intr_cntrl_ll_get_int_handler_arg(intr);
 }
 
-/**
- * @brief Disables interrupts that are not located in iram
- *
- * @param newmask mask of interrupts needs to be disabled
- * @return oldmask where to store old interrupts state
- */
-static inline uint32_t interrupt_controller_hal_disable_int_mask(uint32_t newmask)
-{
-    return intr_cntrl_ll_disable_int_mask(newmask);
-}
-
-/**
- * @brief Enables interrupts that are not located in iram
- *
- * @param newmask mask of interrupts needs to be disabled
- */
-static inline void interrupt_controller_hal_enable_int_mask(uint32_t newmask)
-{
-    intr_cntrl_ll_enable_int_mask(newmask);
-}
-
 /**
  * @brief Acknowledge an edge-trigger interrupt by clearing its pending flag
  *
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/ledc_types.h b/tools/sdk/esp32s2/include/hal/include/hal/ledc_types.h
index fa05ef41..0ddcf18c 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/ledc_types.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/ledc_types.h
@@ -134,6 +134,10 @@ typedef struct {
     ledc_timer_t timer_sel;         /*!< Select the timer source of channel (0 - 3) */
     uint32_t duty;                  /*!< LEDC channel duty, the range of duty setting is [0, (2**duty_resolution)] */
     int hpoint;                     /*!< LEDC channel hpoint value, the max value is 0xfffff */
+    struct {
+        unsigned int output_invert: 1;/*!< Enable (1) or disable (0) gpio output invert */
+    } flags;                        /*!< LEDC flags */
+
 } ledc_channel_config_t;
 
 /**
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/spi_flash_encrypt_hal.h b/tools/sdk/esp32s2/include/hal/include/hal/spi_flash_encrypt_hal.h
new file mode 100644
index 00000000..adc22f7e
--- /dev/null
+++ b/tools/sdk/esp32s2/include/hal/include/hal/spi_flash_encrypt_hal.h
@@ -0,0 +1,62 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*******************************************************************************
+ * NOTICE
+ * The HAL is not public api, don't use in application code.
+ * See readme.md in hal/include/hal/readme.md
+ ******************************************************************************/
+
+// The HAL layer for SPI Flash Encryption
+
+#include "hal/spi_flash_encrypted_ll.h"
+
+/**
+ * @brief Enable the flash encryption
+ */
+void spi_flash_encryption_hal_enable(void);
+
+/**
+ * @brief Disable the flash encryption
+ */
+void spi_flash_encryption_hal_disable(void);
+
+/**
+ * Prepare flash encryption before operation.
+ *
+ * @param address The destination address in flash for the write operation.
+ * @param buffer Data for programming
+ * @param size Size to program.
+ *
+ * @note address and buffer must be 8-word aligned.
+ */
+void spi_flash_encryption_hal_prepare(uint32_t address, const uint32_t* buffer, uint32_t size);
+
+/**
+ * @brief flash data encryption operation is done.
+ */
+void spi_flash_encryption_hal_done(void);
+
+/**
+ * Destroy encrypted result
+ */
+void spi_flash_encryption_hal_destroy(void);
+
+/**
+ * Check if is qualified to encrypt the buffer
+ *
+ * @param address the address of written flash partition.
+ * @param length Buffer size.
+ */
+bool spi_flash_encryption_hal_check(uint32_t address, uint32_t length);
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/spi_flash_types.h b/tools/sdk/esp32s2/include/hal/include/hal/spi_flash_types.h
index ed68d24f..0cc60559 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/spi_flash_types.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/spi_flash_types.h
@@ -86,6 +86,44 @@ typedef struct {
     };
 } spi_flash_sus_cmd_conf;
 
+/// Structure for flash encryption operations.
+typedef struct
+{
+    /**
+     * @brief Enable the flash encryption
+    */
+    void (*flash_encryption_enable)(void);
+    /**
+     * @brief Disable the flash encryption
+    */
+    void (*flash_encryption_disable)(void);
+    /**
+     * Prepare flash encryption before operation.
+     *
+     * @param address The destination address in flash for the write operation.
+     * @param buffer Data for programming
+     * @param size Size to program.
+     *
+     * @note address and buffer must be 8-word aligned.
+     */
+    void (*flash_encryption_data_prepare)(uint32_t address, const uint32_t* buffer, uint32_t size);
+    /**
+     * @brief flash data encryption operation is done.
+     */
+    void (*flash_encryption_done)(void);
+    /**
+     * Destroy encrypted result
+    */
+    void (*flash_encryption_destroy)(void);
+    /**
+     * Check if is qualified to encrypt the buffer
+     *
+     * @param address the address of written flash partition.
+     * @param length Buffer size.
+     */
+    bool (*flash_encryption_check)(uint32_t address, uint32_t length);
+} spi_flash_encryption_t;
+
 ///Slowest io mode supported by ESP32, currently SlowRd
 #define SPI_FLASH_READ_MODE_MIN SPI_FLASH_SLOWRD
 
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/spi_types.h b/tools/sdk/esp32s2/include/hal/include/hal/spi_types.h
index 5eb7a18d..400b922a 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/spi_types.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/spi_types.h
@@ -31,13 +31,17 @@ typedef enum {
 
 /// SPI Events
 typedef enum {
-    SPI_EV_BUF_TX        = BIT(0), ///< The buffer has sent data to master, Slave HD only
-    SPI_EV_BUF_RX        = BIT(1), ///< The buffer has received data from master, Slave HD only
-    SPI_EV_SEND          = BIT(2), ///< Slave has loaded some data to DMA, and master has received certain number of the data, the number is determined by master. Slave HD only
-    SPI_EV_RECV          = BIT(3), ///< Slave has received certain number of data from master, the number is determined by master. Slave HD only.
-    SPI_EV_CMD9          = BIT(4), ///< Received CMD9 from master, Slave HD only
-    SPI_EV_CMDA          = BIT(5), ///< Received CMDA from master, Slave HD only
-    SPI_EV_TRANS         = BIT(6), ///< A transaction has done
+    /* Slave HD Only */
+    SPI_EV_BUF_TX         = BIT(0), ///< The buffer has sent data to master.
+    SPI_EV_BUF_RX         = BIT(1), ///< The buffer has received data from master.
+    SPI_EV_SEND_DMA_READY = BIT(2), ///< Slave has loaded its TX data buffer to the hardware (DMA).
+    SPI_EV_SEND           = BIT(3), ///< Master has received certain number of the data, the number is determined by Master.
+    SPI_EV_RECV_DMA_READY = BIT(4), ///< Slave has loaded its RX data buffer to the hardware (DMA).
+    SPI_EV_RECV           = BIT(5), ///< Slave has received certain number of data from master, the number is determined by Master.
+    SPI_EV_CMD9           = BIT(6), ///< Received CMD9 from master.
+    SPI_EV_CMDA           = BIT(7), ///< Received CMDA from master.
+    /* Common Event */
+    SPI_EV_TRANS          = BIT(8), ///< A transaction has done
 } spi_event_t;
 FLAG_ATTR(spi_event_t)
 
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/systimer_hal.h b/tools/sdk/esp32s2/include/hal/include/hal/systimer_hal.h
index 1f4eb5c4..9ac3262f 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/systimer_hal.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/systimer_hal.h
@@ -14,78 +14,91 @@
 
 #pragma once
 
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/soc_caps.h"
+#include "soc/systimer_struct.h"
+#include "hal/systimer_types.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include <stdint.h>
-#include <stdbool.h>
-#include "hal/systimer_types.h"
-
-/**
- * @brief enable systimer counter
- */
-void systimer_hal_enable_counter(systimer_counter_id_t counter_id);
-
-/**
- * @brief get current counter value
- */
-uint64_t systimer_hal_get_counter_value(systimer_counter_id_t counter_id);
-
-/**
- * @brief get current time (in microseconds)
- */
-uint64_t systimer_hal_get_time(systimer_counter_id_t counter_id);
-
-/*
- * @brief set alarm target value (used in one-shot mode)
- */
-void systimer_hal_set_alarm_target(systimer_alarm_id_t alarm_id, uint64_t target);
-
-/**
- * @brief set alarm period value (used in period mode)
- */
-void systimer_hal_set_alarm_period(systimer_alarm_id_t alarm_id, uint32_t period);
-
-/**
- * @brief get alarm time
- */
-uint64_t systimer_hal_get_alarm_value(systimer_alarm_id_t alarm_id);
-
-/**
- * @brief enable alarm interrupt
- */
-void systimer_hal_enable_alarm_int(systimer_alarm_id_t alarm_id);
-
-/**
- * @brief select alarm mode
- */
-void systimer_hal_select_alarm_mode(systimer_alarm_id_t alarm_id, systimer_alarm_mode_t mode);
-
-/**
- * @brief update systimer step when apb clock gets changed
- */
-void systimer_hal_on_apb_freq_update(uint32_t apb_ticks_per_us);
-
-/**
- * @brief move systimer counter value forward or backward
- */
-void systimer_hal_counter_value_advance(systimer_counter_id_t counter_id, int64_t time_us);
+typedef struct {
+    systimer_dev_t *dev;
+} systimer_hal_context_t;
 
 /**
  * @brief initialize systimer in HAL layer
  */
-void systimer_hal_init(void);
+void systimer_hal_init(systimer_hal_context_t *hal);
+
+/**
+ * @brief enable systimer counter
+ */
+void systimer_hal_enable_counter(systimer_hal_context_t *hal, uint32_t counter_id);
+
+/**
+ * @brief get current counter value
+ */
+uint64_t systimer_hal_get_counter_value(systimer_hal_context_t *hal, uint32_t counter_id);
+
+/**
+ * @brief get current time (in microseconds)
+ */
+uint64_t systimer_hal_get_time(systimer_hal_context_t *hal, uint32_t counter_id);
+
+/*
+ * @brief set alarm target value (used in one-shot mode)
+ */
+void systimer_hal_set_alarm_target(systimer_hal_context_t *hal, uint32_t alarm_id, uint64_t target);
+
+/**
+ * @brief set alarm period value (used in period mode)
+ */
+void systimer_hal_set_alarm_period(systimer_hal_context_t *hal, uint32_t alarm_id, uint32_t period);
+
+/**
+ * @brief get alarm time
+ */
+uint64_t systimer_hal_get_alarm_value(systimer_hal_context_t *hal, uint32_t alarm_id);
+
+/**
+ * @brief enable alarm interrupt
+ */
+void systimer_hal_enable_alarm_int(systimer_hal_context_t *hal, uint32_t alarm_id);
+
+/**
+ * @brief select alarm mode
+ */
+void systimer_hal_select_alarm_mode(systimer_hal_context_t *hal, uint32_t alarm_id, systimer_alarm_mode_t mode);
+
+/**
+ * @brief update systimer step when apb clock gets changed
+ */
+void systimer_hal_on_apb_freq_update(systimer_hal_context_t *hal, uint32_t apb_ticks_per_us);
+
+/**
+ * @brief move systimer counter value forward or backward
+ */
+void systimer_hal_counter_value_advance(systimer_hal_context_t *hal, uint32_t counter_id, int64_t time_us);
 
 /**
  * @brief  connect alarm unit to selected counter
  */
-void systimer_hal_connect_alarm_counter(systimer_alarm_id_t alarm_id, systimer_counter_id_t counter_id);
+void systimer_hal_connect_alarm_counter(systimer_hal_context_t *hal, uint32_t alarm_id, uint32_t counter_id);
 
 /**
  * @brief  set if a counter should be stalled when CPU is halted by the debugger
  */
-void systimer_hal_counter_can_stall_by_cpu(uint32_t counter_id, uint32_t cpu_id, bool can);
+void systimer_hal_counter_can_stall_by_cpu(systimer_hal_context_t *hal, uint32_t counter_id, uint32_t cpu_id, bool can);
+
+#if !SOC_SYSTIMER_FIXED_TICKS_US
+/**
+ * @brief set increase steps for systimer counter on different clock source
+ */
+void systimer_hal_set_steps_per_tick(systimer_hal_context_t *hal, int clock_source, uint32_t steps);
+#endif
 
 #ifdef __cplusplus
 }
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/systimer_types.h b/tools/sdk/esp32s2/include/hal/include/hal/systimer_types.h
index cf88a00f..2af2f60f 100644
--- a/tools/sdk/esp32s2/include/hal/include/hal/systimer_types.h
+++ b/tools/sdk/esp32s2/include/hal/include/hal/systimer_types.h
@@ -14,13 +14,13 @@
 
 #pragma once
 
+#include <stdint.h>
+#include "soc/soc_caps.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include <stdint.h>
-#include "soc/soc_caps.h"
-
 /*
  * @brief The structure of the counter value in systimer
  *
@@ -39,27 +39,6 @@ typedef struct {
 _Static_assert(sizeof(systimer_counter_value_t) == 8, "systimer_counter_value_t should occupy 8 bytes in memory");
 /** @endcond */
 
-/**
- * @brief systimer counter ID
- *
- */
-typedef enum {
-    SYSTIMER_COUNTER_0, /*!< systimer counter 0 */
-#if SOC_SYSTIMER_COUNTER_NUM > 1
-    SYSTIMER_COUNTER_1, /*!< systimer counter 1 */
-#endif
-} systimer_counter_id_t;
-
-/**
- * @brief systimer alarm ID
- *
- */
-typedef enum {
-    SYSTIMER_ALARM_0, /*!< systimer alarm 0 */
-    SYSTIMER_ALARM_1, /*!< systimer alarm 1 */
-    SYSTIMER_ALARM_2, /*!< systimer alarm 2 */
-} systimer_alarm_id_t;
-
 /**
  * @brief systimer alarm mode
  *
diff --git a/tools/sdk/esp32s2/include/hal/include/hal/usb_types.h b/tools/sdk/esp32s2/include/hal/include/hal/usb_types.h
deleted file mode 100644
index 00f8b8c2..00000000
--- a/tools/sdk/esp32s2/include/hal/include/hal/usb_types.h
+++ /dev/null
@@ -1,452 +0,0 @@
-// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#pragma once
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-#include <stdint.h>
-
-#define USB_CTRL_REQ_ATTR       __attribute__((packed))
-#define USB_DESC_ATTR           __attribute__((packed))
-
-/* -----------------------------------------------------------------------------
-------------------------------- Common USB Types -------------------------------
------------------------------------------------------------------------------ */
-
-// ----------------------------- Device Related --------------------------------
-
-/**
- * @brief Enumeration of USB PHY type
- */
-typedef enum {
-    USB_PHY_INTERNAL = 0,       /**< Use the chip's internal USB PHY */
-    USB_PHY_EXTERNAL,           /**< Use an external USB PHY */
-} usb_phy_t;
-
-// ------------------------------ Bus Related ----------------------------------
-
-/**
- * @brief USB Standard Speeds
- */
-typedef enum {
-    USB_SPEED_LOW = 0,                  /**< USB Low Speed (1.5 Mbit/s) */
-    USB_SPEED_FULL,                     /**< USB Full Speed (12 Mbit/s) */
-} usb_speed_t;
-
-// ---------------------------- Transfer Related -------------------------------
-
-/**
- * @brief The type of USB transfer
- *
- * @note The enum values need to match the bmAttributes field of an EP descriptor
- */
-typedef enum {
-    USB_XFER_TYPE_CTRL = 0,
-    USB_XFER_TYPE_ISOCHRONOUS,
-    USB_XFER_TYPE_BULK,
-    USB_XFER_TYPE_INTR,
-} usb_xfer_type_t;
-
-/**
- * @brief The status of a particular transfer
- */
-typedef enum {
-    USB_TRANSFER_STATUS_COMPLETED,      /**< The transfer was successful (but may be short) */
-    USB_TRANSFER_STATUS_ERROR,          /**< The transfer failed because due to excessive errors (e.g. no response or CRC error) */
-    USB_TRANSFER_STATUS_TIMED_OUT,      /**< The transfer failed due to to a time out */
-    USB_TRANSFER_STATUS_CANCELLED,      /**< The transfer was cancelled */
-    USB_TRANSFER_STATUS_STALL,          /**< The transfer was stalled */
-    USB_TRANSFER_STATUS_NO_DEVICE,      /**< The transfer failed because the device is no longer valid (e.g., disconencted */
-    USB_TRANSFER_STATUS_OVERFLOW,       /**< The transfer as more data was sent than was requested */
-} usb_transfer_status_t;
-
-/**
- * @brief Isochronous packet descriptor
- *
- * If the number of bytes in an IRP transfer is larger than the MPS of the
- * endpoint, the IRP is split over multiple packets (one packet per bInterval
- * of the endpoint). An array of Isochronous packet descriptos describes how
- * an IRP should be split over multiple packets.
- */
-typedef struct {
-    int length;                         /**< Number of bytes to transmit/receive in the packet */
-    int actual_length;                  /**< Actual number of bytes transmitted/received in the packet */
-    usb_transfer_status_t status;       /**< Status of the packet */
-} usb_iso_packet_desc_t;
-
-/**
- * @brief USB IRP (I/O Request Packet). See USB2.0 Spec
- *
- * An identifiable request by a software client to move data between itself (on the
- * host) and an endpoint of a device in an appropriate direction.
- *
- * This structure represents the barebones of the request. Different layers of
- * USB drivers will wrap their own objects around this.
- *
- * See 10.5.3.1 os USB2.0 specification
- * Bulk: Represnts a single bulk transfer which a pipe will transparently split
- *       into multiple MPS transactions (until the last)
- * Control: Represents a single contorl transfer with the setup packet at the
- *          first 8 bytes of the buffer.
- * Interrupt: Represnts a single interrupt transaction
- * Isochronous: Represnts a buffer of a stream of bytes which the pipe will transparently
- *              transfer the stream of bytes one or more service periods
- */
-typedef struct {
-    int num_bytes;                      /**< Number of bytes in IRP. Control should exclude size of setup. IN should be integer multiple of MPS */
-    int actual_num_bytes;               /**< Actual number of bytes transmitted/receives in the IRP */
-    uint8_t *data_buffer;               /**< Pointer to data buffer. Must be DMA capable memory */
-    usb_transfer_status_t status;       /**< Status of the transfer */
-    int num_iso_packets;                /**< Only relevant to isochronous. Number of service periods to transfer data buffer over. Set to 0 for non-iso transfers */
-    usb_iso_packet_desc_t iso_packet_desc[0];   /**< Descriptors for each ISO packet */
-} usb_irp_t;
-
-/* -----------------------------------------------------------------------------
------------------------------------ Chapter 9 ----------------------------------
------------------------------------------------------------------------------ */
-
-// ------------------------------ Control Request ------------------------------
-
-/**
- * @brief Size of a USB control transfer setup packet in bytes
- */
-#define USB_CTRL_REQ_SIZE       8
-
-/**
- * @brief Structure representing a USB control transfer setup packet
- */
-typedef union {
-    struct {
-        uint8_t bRequestType;
-        uint8_t bRequest;
-        uint16_t wValue;
-        uint16_t wIndex;
-        uint16_t wLength;
-    } USB_CTRL_REQ_ATTR;
-    uint8_t val[USB_CTRL_REQ_SIZE];
-} usb_ctrl_req_t;
-_Static_assert(sizeof(usb_ctrl_req_t) == USB_CTRL_REQ_SIZE, "Size of usb_ctrl_req_t incorrect");
-
-/**
- * @brief Bit masks pertaining to the bRequestType field of a setup packet
- */
-#define USB_B_REQUEST_TYPE_DIR_OUT          (0X00 << 7)
-#define USB_B_REQUEST_TYPE_DIR_IN           (0x01 << 7)
-#define USB_B_REQUEST_TYPE_TYPE_STANDARD    (0x00 << 5)
-#define USB_B_REQUEST_TYPE_TYPE_CLASS       (0x01 << 5)
-#define USB_B_REQUEST_TYPE_TYPE_VENDOR      (0x02 << 5)
-#define USB_B_REQUEST_TYPE_TYPE_RESERVED    (0x03 << 5)
-#define USB_B_REQUEST_TYPE_TYPE_MASK        (0x03 << 5)
-#define USB_B_REQUEST_TYPE_RECIP_DEVICE     (0x00 << 0)
-#define USB_B_REQUEST_TYPE_RECIP_INTERFACE  (0x01 << 0)
-#define USB_B_REQUEST_TYPE_RECIP_ENDPOINT   (0x02 << 0)
-#define USB_B_REQUEST_TYPE_RECIP_OTHER      (0x03 << 0)
-#define USB_B_REQUEST_TYPE_RECIP_MASK       (0x1f << 0)
-
-/**
- * @brief Bit masks pertaining to the bRequest field of a setup packet
- */
-#define USB_B_REQUEST_GET_STATUS            0x00
-#define USB_B_REQUEST_CLEAR_FEATURE         0x01
-#define USB_B_REQUEST_SET_FEATURE           0x03
-#define USB_B_REQUEST_SET_ADDRESS           0x05
-#define USB_B_REQUEST_GET_DESCRIPTOR        0x06
-#define USB_B_REQUEST_SET_DESCRIPTOR        0x07
-#define USB_B_REQUEST_GET_CONFIGURATION     0x08
-#define USB_B_REQUEST_SET_CONFIGURATION     0x09
-#define USB_B_REQUEST_GET_INTERFACE         0x0A
-#define USB_B_REQUEST_SET_INTERFACE         0x0B
-#define USB_B_REQUEST_SYNCH_FRAME           0x0C
-
-/**
- * @brief Bit masks pertaining to the wValue field of a setup packet
- */
-#define USB_W_VALUE_DT_DEVICE               0x01
-#define USB_W_VALUE_DT_CONFIG               0x02
-#define USB_W_VALUE_DT_STRING               0x03
-#define USB_W_VALUE_DT_INTERFACE            0x04
-#define USB_W_VALUE_DT_ENDPOINT             0x05
-#define USB_W_VALUE_DT_DEVICE_QUALIFIER     0x06
-#define USB_W_VALUE_DT_OTHER_SPEED_CONFIG   0x07
-#define USB_W_VALUE_DT_INTERFACE_POWER      0x08
-
-/**
- * @brief Initializer for a SET_ADDRESS request
- *
- * Sets the address of a connected device
- */
-#define USB_CTRL_REQ_INIT_SET_ADDR(ctrl_req_ptr, addr) ({  \
-    (ctrl_req_ptr)->bRequestType = USB_B_REQUEST_TYPE_DIR_OUT | USB_B_REQUEST_TYPE_TYPE_STANDARD |USB_B_REQUEST_TYPE_RECIP_DEVICE;   \
-    (ctrl_req_ptr)->bRequest = USB_B_REQUEST_SET_ADDRESS;  \
-    (ctrl_req_ptr)->wValue = (addr);   \
-    (ctrl_req_ptr)->wIndex = 0;    \
-    (ctrl_req_ptr)->wLength = 0;   \
-})
-
-/**
- * @brief Initializer for a request to get a device's device descriptor
- */
-#define USB_CTRL_REQ_INIT_GET_DEVC_DESC(ctrl_req_ptr) ({ \
-    (ctrl_req_ptr)->bRequestType = USB_B_REQUEST_TYPE_DIR_IN | USB_B_REQUEST_TYPE_TYPE_STANDARD | USB_B_REQUEST_TYPE_RECIP_DEVICE;   \
-    (ctrl_req_ptr)->bRequest = USB_B_REQUEST_GET_DESCRIPTOR;   \
-    (ctrl_req_ptr)->wValue = (USB_W_VALUE_DT_DEVICE << 8); \
-    (ctrl_req_ptr)->wIndex = 0;    \
-    (ctrl_req_ptr)->wLength = 18;  \
-})
-
-/**
- * @brief Initializer for a request to get a device's current configuration number
- */
-#define USB_CTRL_REQ_INIT_GET_CONFIG(ctrl_req_ptr) ({  \
-    (ctrl_req_ptr)->bRequestType = USB_B_REQUEST_TYPE_DIR_IN | USB_B_REQUEST_TYPE_TYPE_STANDARD | USB_B_REQUEST_TYPE_RECIP_DEVICE;   \
-    (ctrl_req_ptr)->bRequest = USB_B_REQUEST_GET_CONFIGURATION;    \
-    (ctrl_req_ptr)->wValue = 0;    \
-    (ctrl_req_ptr)->wIndex = 0;    \
-    (ctrl_req_ptr)->wLength = 1;   \
-})
-
-/**
- * @brief Initializer for a request to get one of the device's current configuration descriptor
- *
- * - desc_index indicates the configuration's index number
- * - Number of bytes of the configuration descriptor to get
- */
-#define USB_CTRL_REQ_INIT_GET_CFG_DESC(ctrl_req_ptr, desc_index, desc_len) ({  \
-    (ctrl_req_ptr)->bRequestType = USB_B_REQUEST_TYPE_DIR_IN | USB_B_REQUEST_TYPE_TYPE_STANDARD | USB_B_REQUEST_TYPE_RECIP_DEVICE;   \
-    (ctrl_req_ptr)->bRequest = USB_B_REQUEST_GET_DESCRIPTOR;   \
-    (ctrl_req_ptr)->wValue = (USB_W_VALUE_DT_CONFIG << 8) | ((desc_index) & 0xFF); \
-    (ctrl_req_ptr)->wIndex = 0;    \
-    (ctrl_req_ptr)->wLength = (desc_len);  \
-})
-
-/**
- * @brief Initializer for a request to set a device's current configuration number
- */
-#define USB_CTRL_REQ_INIT_SET_CONFIG(ctrl_req_ptr, config_num) ({  \
-    (ctrl_req_ptr)->bRequestType = USB_B_REQUEST_TYPE_DIR_OUT | USB_B_REQUEST_TYPE_TYPE_STANDARD | USB_B_REQUEST_TYPE_RECIP_DEVICE;   \
-    (ctrl_req_ptr)->bRequest = USB_B_REQUEST_SET_CONFIGURATION;    \
-    (ctrl_req_ptr)->wValue = (config_num); \
-    (ctrl_req_ptr)->wIndex = 0;    \
-    (ctrl_req_ptr)->wLength = 0;   \
-})
-
-// ---------------------------- Device Descriptor ------------------------------
-
-/**
- * @brief Size of a USB device descriptor in bytes
- */
-#define USB_DESC_DEV_SIZE       18
-
-/**
- * @brief Structure representing a USB device descriptor
- */
-typedef union {
-    struct {
-        uint8_t bLength;
-        uint8_t bDescriptorType;
-        uint16_t bcdUSB;
-        uint8_t bDeviceClass;
-        uint8_t bDeviceSubClass;
-        uint8_t bDeviceProtocol;
-        uint8_t bMaxPacketSize0;
-        uint16_t idVendor;
-        uint16_t idProduct;
-        uint16_t bcdDevice;
-        uint8_t iManufacturer;
-        uint8_t iProduct;
-        uint8_t iSerialNumber;
-        uint8_t bNumConfigurations;
-    } USB_DESC_ATTR;
-    uint8_t val[USB_DESC_DEV_SIZE];
-} usb_desc_devc_t;
-_Static_assert(sizeof(usb_desc_devc_t) == USB_DESC_DEV_SIZE, "Size of usb_desc_devc_t incorrect");
-
-/**
- * @brief Possible base class values of the bDeviceClass field of a USB device descriptor
- */
-#define USB_CLASS_PER_INTERFACE             0x00
-#define USB_CLASS_AUDIO                     0x01
-#define USB_CLASS_COMM                      0x02
-#define USB_CLASS_HID                       0x03
-#define USB_CLASS_PHYSICAL                  0x05
-#define USB_CLASS_STILL_IMAGE               0x06
-#define USB_CLASS_PRINTER                   0x07
-#define USB_CLASS_MASS_STORAGE              0x08
-#define USB_CLASS_HUB                       0x09
-#define USB_CLASS_CDC_DATA                  0x0a
-#define USB_CLASS_CSCID                     0x0b
-#define USB_CLASS_CONTENT_SEC               0x0d
-#define USB_CLASS_VIDEO                     0x0e
-#define USB_CLASS_WIRELESS_CONTROLLER       0xe0
-#define USB_CLASS_PERSONAL_HEALTHCARE       0x0f
-#define USB_CLASS_AUDIO_VIDEO               0x10
-#define USB_CLASS_BILLBOARD                 0x11
-#define USB_CLASS_USB_TYPE_C_BRIDGE         0x12
-#define USB_CLASS_MISC                      0xef
-#define USB_CLASS_APP_SPEC                  0xfe
-#define USB_CLASS_VENDOR_SPEC               0xff
-
-/**
- * @brief Vendor specific subclass code
- */
-#define USB_SUBCLASS_VENDOR_SPEC            0xff
-
-// ----------------------- Configuration Descriptor ----------------------------
-
-/**
- * @brief Size of a short USB configuration descriptor in bytes
- *
- * @note The size of a full USB configuration includes all the interface and endpoint
- *       descriptors of that configuration.
- */
-#define USB_DESC_CFG_SIZE       9
-
-/**
- * @brief Structure representing a short USB configuration descriptor
- *
- * @note The full USB configuration includes all the interface and endpoint
- *       descriptors of that configuration.
- */
-typedef union {
-    struct {
-        uint8_t bLength;
-        uint8_t bDescriptorType;
-        uint16_t wTotalLength;
-        uint8_t bNumInterfaces;
-        uint8_t bConfigurationValue;
-        uint8_t iConfiguration;
-        uint8_t bmAttributes;
-        uint8_t bMaxPower;
-    } USB_DESC_ATTR;
-    uint8_t val[USB_DESC_CFG_SIZE];
-} usb_desc_cfg_t;
-_Static_assert(sizeof(usb_desc_cfg_t) == USB_DESC_CFG_SIZE, "Size of usb_desc_cfg_t incorrect");
-
-/**
- * @brief Bit masks pertaining to the bmAttributes field of a configuration descriptor
- */
-#define USB_BM_ATTRIBUTES_ONE               (1 << 7)    //Must be set
-#define USB_BM_ATTRIBUTES_SELFPOWER         (1 << 6)    //Self powered
-#define USB_BM_ATTRIBUTES_WAKEUP            (1 << 5)    //Can wakeup
-#define USB_BM_ATTRIBUTES_BATTERY           (1 << 4)    //Battery powered
-
-// ------------------------- Interface Descriptor ------------------------------
-
-/**
- * @brief Size of a USB interface descriptor in bytes
- */
-#define USB_DESC_INTF_SIZE      9
-
-/**
- * @brief Structure representing a USB interface descriptor
- */
-typedef union {
-    struct {
-        uint8_t bLength;
-        uint8_t bDescriptorType;
-        uint8_t bInterfaceNumber;
-        uint8_t bAlternateSetting;
-        uint8_t bNumEndpoints;
-        uint8_t bInterfaceClass;
-        uint8_t bInterfaceSubClass;
-        uint8_t bInterfaceProtocol;
-        uint8_t iInterface;
-    } USB_DESC_ATTR;
-    uint8_t val[USB_DESC_INTF_SIZE];
-} usb_desc_intf_t;
-_Static_assert(sizeof(usb_desc_intf_t) == USB_DESC_INTF_SIZE, "Size of usb_desc_intf_t incorrect");
-
-// ------------------------- Endpoint Descriptor -------------------------------
-
-/**
- * @brief Size of a USB endpoint descriptor in bytes
- */
-#define USB_DESC_EP_SIZE        7
-
-/**
- * @brief Structure representing a USB endp;oint descriptor
- */
-typedef union {
-    struct {
-        uint8_t bLength;
-        uint8_t bDescriptorType;
-        uint8_t bEndpointAddress;
-        uint8_t bmAttributes;
-        uint16_t wMaxPacketSize;
-        uint8_t bInterval;
-    } USB_DESC_ATTR;
-    uint8_t val[USB_DESC_EP_SIZE];
-} usb_desc_ep_t;
-_Static_assert(sizeof(usb_desc_ep_t) == USB_DESC_EP_SIZE, "Size of usb_desc_ep_t incorrect");
-
-/**
- * @brief Bit masks pertaining to the bEndpointAddress field of an endpoint descriptor
- */
-#define USB_B_ENDPOINT_ADDRESS_EP_NUM_MASK              0x0f
-#define USB_B_ENDPOINT_ADDRESS_EP_DIR_MASK              0x80
-
-/**
- * @brief Bit masks pertaining to the bmAttributes field of an endpoint descriptor
- */
-#define USB_BM_ATTRIBUTES_XFERTYPE_MASK                 0x03
-#define USB_BM_ATTRIBUTES_XFER_CONTROL                  (0 << 0)
-#define USB_BM_ATTRIBUTES_XFER_ISOC                     (1 << 0)
-#define USB_BM_ATTRIBUTES_XFER_BULK                     (2 << 0)
-#define USB_BM_ATTRIBUTES_XFER_INT                      (3 << 0)
-#define USB_BM_ATTRIBUTES_SYNCTYPE_MASK                 0x0C    /* in bmAttributes */
-#define USB_BM_ATTRIBUTES_SYNC_NONE                     (0 << 2)
-#define USB_BM_ATTRIBUTES_SYNC_ASYNC                    (1 << 2)
-#define USB_BM_ATTRIBUTES_SYNC_ADAPTIVE                 (2 << 2)
-#define USB_BM_ATTRIBUTES_SYNC_SYNC                     (3 << 2)
-#define USB_BM_ATTRIBUTES_USAGETYPE_MASK                0x30
-#define USB_BM_ATTRIBUTES_USAGE_DATA                    (0 << 4)
-#define USB_BM_ATTRIBUTES_USAGE_FEEDBACK                (1 << 4)
-#define USB_BM_ATTRIBUTES_USAGE_IMPLICIT_FB             (2 << 4)
-
-/**
- * @brief Macro helpers to get information about an endpoint from its descriptor
- */
-#define USB_DESC_EP_GET_XFERTYPE(desc_ptr) ((usb_xfer_type_t) ((desc_ptr)->bmAttributes & USB_BM_ATTRIBUTES_XFERTYPE_MASK))
-#define USB_DESC_EP_GET_EP_NUM(desc_ptr) ((desc_ptr)->bEndpointAddress & USB_B_ENDPOINT_ADDRESS_EP_NUM_MASK)
-#define USB_DESC_EP_GET_EP_DIR(desc_ptr) (((desc_ptr)->bEndpointAddress & USB_B_ENDPOINT_ADDRESS_EP_DIR_MASK) ? 1 : 0)
-#define USB_DESC_EP_GET_MPS(desc_ptr) ((desc_ptr)->wMaxPacketSize & 0x7FF)
-
-
-// --------------------------- String Descriptor -------------------------------
-
-/**
- * @brief Size of a short USB string descriptor in bytes
- */
-#define USB_DESC_STR_SIZE       4
-
-/**
- * @brief Structure representing a USB string descriptor
- */
-typedef union {
-    struct {
-        uint8_t bLength;
-        uint8_t bDescriptorType;
-        uint16_t wData[1];        /* UTF-16LE encoded */
-    } USB_DESC_ATTR;
-    uint8_t val[USB_DESC_STR_SIZE];
-} usb_desc_str_t;
-_Static_assert(sizeof(usb_desc_str_t) == USB_DESC_STR_SIZE, "Size of usb_desc_str_t incorrect");
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/tools/sdk/esp32s2/include/log/include/esp_log.h b/tools/sdk/esp32s2/include/log/include/esp_log.h
index 5a488936..c41a9d3c 100644
--- a/tools/sdk/esp32s2/include/log/include/esp_log.h
+++ b/tools/sdk/esp32s2/include/log/include/esp_log.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef __ESP_LOG_H__
 #define __ESP_LOG_H__
@@ -48,13 +40,22 @@ typedef enum {
 
 typedef int (*vprintf_like_t)(const char *, va_list);
 
+/**
+ * @brief Default log level
+ *
+ * This is used by the definition of ESP_EARLY_LOGx macros. It is not
+ * recommended to set this directly, call esp_log_level_set("*", level)
+ * instead.
+ */
+extern esp_log_level_t esp_log_default_level;
+
 /**
  * @brief Set log level for given tag
  *
  * If logging for given component has already been enabled, changes previous setting.
  *
  * Note that this function can not raise log level above the level set using
- * CONFIG_LOG_DEFAULT_LEVEL setting in menuconfig.
+ * CONFIG_LOG_MAXIMUM_LEVEL setting in menuconfig.
  *
  * To raise log level above the default one for a given file, define
  * LOG_LOCAL_LEVEL to one of the ESP_LOG_* values, before including
@@ -145,7 +146,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 
 #ifndef LOG_LOCAL_LEVEL
 #ifndef BOOTLOADER_BUILD
-#define LOG_LOCAL_LEVEL  CONFIG_LOG_DEFAULT_LEVEL
+#define LOG_LOCAL_LEVEL  CONFIG_LOG_MAXIMUM_LEVEL
 #else
 #define LOG_LOCAL_LEVEL  CONFIG_BOOTLOADER_LOG_LEVEL
 #endif
@@ -279,7 +280,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 
 /** @endcond */
 
-/// macro to output logs in startup code, before heap allocator and syscalls have been initialized. log at ``ESP_LOG_ERROR`` level. @see ``printf``,``ESP_LOGE``
+/// macro to output logs in startup code, before heap allocator and syscalls have been initialized. log at ``ESP_LOG_ERROR`` level. @see ``printf``,``ESP_LOGE``,``ESP_DRAM_LOGE``
 #define ESP_EARLY_LOGE( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_ERROR,   E, ##__VA_ARGS__)
 /// macro to output logs in startup code at ``ESP_LOG_WARN`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
 #define ESP_EARLY_LOGW( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_WARN,    W, ##__VA_ARGS__)
@@ -290,8 +291,16 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 /// macro to output logs in startup code at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
 #define ESP_EARLY_LOGV( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_VERBOSE, V, ##__VA_ARGS__)
 
+#ifdef BOOTLOADER_BUILD
+#define _ESP_LOG_EARLY_ENABLED(log_level) (LOG_LOCAL_LEVEL >= (log_level))
+#else
+/* For early log, there is no log tag filtering. So we want to log only if both the LOG_LOCAL_LEVEL and the
+   currently configured min log level are higher than the log level */
+#define _ESP_LOG_EARLY_ENABLED(log_level) (LOG_LOCAL_LEVEL >= (log_level) && esp_log_default_level >= (log_level))
+#endif
+
 #define ESP_LOG_EARLY_IMPL(tag, format, log_level, log_tag_letter, ...) do {                             \
-        if (LOG_LOCAL_LEVEL >= log_level) {                                                              \
+        if (_ESP_LOG_EARLY_ENABLED(log_level)) {                                                         \
             esp_rom_printf(LOG_FORMAT(log_tag_letter, format), esp_log_timestamp(), tag, ##__VA_ARGS__); \
         }} while(0)
 
@@ -303,7 +312,9 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 #define ESP_LOGV( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_VERBOSE, tag, format, ##__VA_ARGS__)
 #else
 /**
- * macro to output logs at ESP_LOG_ERROR level.
+ * Macro to output logs at ESP_LOG_ERROR level.
+ *
+ * @note This macro cannot be used when interrupts are disabled or inside an ISR. @see ``ESP_DRAM_LOGE``.
  *
  * @param tag tag of the log, which can be used to change the log level by ``esp_log_level_set`` at runtime.
  *
@@ -359,7 +370,11 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 /**
  * @brief Macro to output logs when the cache is disabled. log at ``ESP_LOG_ERROR`` level.
  *
- * Similar to `ESP_EARLY_LOGE`, the log level cannot be changed by `esp_log_level_set`.
+ * @note Unlike normal logging macros, it's possible to use this macro when interrupts are
+ * disabled or inside an ISR.
+ *
+ * Similar to @see ``ESP_EARLY_LOGE``, the log level cannot be changed per-tag, however
+ * esp_log_level_set("*", level) will set the default level which controls these log lines also.
  *
  * Usage: `ESP_DRAM_LOGE(DRAM_STR("my_tag"), "format", or `ESP_DRAM_LOGE(TAG, "format", ...)`,
  * where TAG is a char* that points to a str in the DRAM.
@@ -382,7 +397,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 #define _ESP_LOG_DRAM_LOG_FORMAT(letter, format)  DRAM_STR(#letter " %s: " format "\n")
 
 #define ESP_DRAM_LOG_IMPL(tag, format, log_level, log_tag_letter, ...) do {                       \
-        if (LOG_LOCAL_LEVEL >= log_level) {                                                       \
+        if (_ESP_LOG_EARLY_ENABLED(log_level)) {                                                  \
             esp_rom_printf(_ESP_LOG_DRAM_LOG_FORMAT(log_tag_letter, format), tag, ##__VA_ARGS__); \
         }} while(0)
 /** @endcond */
diff --git a/tools/sdk/esp32s2/include/log/include/esp_log_internal.h b/tools/sdk/esp32s2/include/log/include/esp_log_internal.h
index ee4b2ce5..732f949c 100644
--- a/tools/sdk/esp32s2/include/log/include/esp_log_internal.h
+++ b/tools/sdk/esp32s2/include/log/include/esp_log_internal.h
@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef __ESP_LOG_INTERNAL_H__
 #define __ESP_LOG_INTERNAL_H__
diff --git a/tools/sdk/esp32s2/include/lwip/port/esp32/include/arch/cc.h b/tools/sdk/esp32s2/include/lwip/port/esp32/include/arch/cc.h
index 78935f3b..f17c4978 100644
--- a/tools/sdk/esp32s2/include/lwip/port/esp32/include/arch/cc.h
+++ b/tools/sdk/esp32s2/include/lwip/port/esp32/include/arch/cc.h
@@ -39,8 +39,13 @@
 #include <assert.h>
 #include <stdio.h>
 
+#include "sdkconfig.h"
 #include "arch/sys_arch.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifndef BYTE_ORDER
 #define BYTE_ORDER LITTLE_ENDIAN
 #endif // BYTE_ORDER
@@ -103,5 +108,8 @@ typedef int sys_prot_t;
 
 #endif /* NDEBUG */
 
+#ifdef __cplusplus
+}
+#endif
 
 #endif /* __ARCH_CC_H__ */
diff --git a/tools/sdk/esp32s2/include/lwip/port/esp32/include/lwip_default_hooks.h b/tools/sdk/esp32s2/include/lwip/port/esp32/include/lwip_default_hooks.h
index 4af3c658..3f3ec0b2 100644
--- a/tools/sdk/esp32s2/include/lwip/port/esp32/include/lwip_default_hooks.h
+++ b/tools/sdk/esp32s2/include/lwip/port/esp32/include/lwip_default_hooks.h
@@ -42,6 +42,12 @@ lwip_hook_ip6_route(const ip6_addr_t *src, const ip6_addr_t *dest);
 #define LWIP_HOOK_IP6_ROUTE lwip_hook_ip6_route
 #endif /* CONFIG_LWIP_HOOK_IP6_ROUTE... */
 
+#if defined(CONFIG_LWIP_HOOK_ND6_GET_GW_CUSTOM) || defined(CONFIG_LWIP_HOOK_ND6_GET_GW_DEFAULT)
+const ip6_addr_t *lwip_hook_nd6_get_gw(struct netif *netif, const ip6_addr_t *dest);
+
+#define LWIP_HOOK_ND6_GET_GW lwip_hook_nd6_get_gw
+#endif /* CONFIG_LWIP_HOOK_ND6_GET_GATEWAY... */
+
 #if defined(CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_CUSTOM) || defined(CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_DEFAULT)
 int lwip_hook_netconn_external_resolve(const char *name, ip_addr_t *addr, u8_t addrtype, err_t *err);
 
diff --git a/tools/sdk/esp32s2/include/lwip/port/esp32/include/lwipopts.h b/tools/sdk/esp32s2/include/lwip/port/esp32/include/lwipopts.h
index 52d2d99d..4d580951 100644
--- a/tools/sdk/esp32s2/include/lwip/port/esp32/include/lwipopts.h
+++ b/tools/sdk/esp32s2/include/lwip/port/esp32/include/lwipopts.h
@@ -249,6 +249,10 @@
  */
 #define DHCP_DOES_ARP_CHECK             CONFIG_LWIP_DHCP_DOES_ARP_CHECK
 
+/**
+ * LWIP_DHCP_DISABLE_CLIENT_ID==1: Do not add option 61 (client-id) to DHCP packets
+ */
+#define ESP_DHCP_DISABLE_CLIENT_ID      CONFIG_LWIP_DHCP_DISABLE_CLIENT_ID
 
 /**
  * CONFIG_LWIP_DHCP_RESTORE_LAST_IP==1: Last valid IP address obtained from DHCP server
@@ -453,6 +457,8 @@
  */
 #define LWIP_NETIF_API                      CONFIG_LWIP_NETIF_API
 
+#define LWIP_NETIF_STATUS_CALLBACK      CONFIG_LWIP_NETIF_STATUS_CALLBACK
+
 /*
    ------------------------------------
    ---------- LOOPIF options ----------
@@ -688,7 +694,7 @@
  * Some modems do not support IPV6 addressing in local link and
  * the only option available is to disable IPV6 address negotiation.
  */
-#define PPP_IPV6_SUPPORT				CONFIG_LWIP_PPP_ENABLE_IPV6
+#define PPP_IPV6_SUPPORT                               CONFIG_LWIP_PPP_ENABLE_IPV6
 
 /**
  * PPP_NOTIFY_PHASE==1: Support PPP notify phase.
@@ -957,6 +963,10 @@
  */
 #define LWIP_SOCKET_OFFSET              (FD_SETSIZE - CONFIG_LWIP_MAX_SOCKETS)
 
+#define LWIP_IPV6_FORWARD               CONFIG_LWIP_IPV6_FORWARD
+
+#define LWIP_IPV6_NUM_ADDRESSES         CONFIG_LWIP_IPV6_NUM_ADDRESSES
+
 /* Enable all Espressif-only options */
 
 #define ESP_LWIP                        1
diff --git a/tools/sdk/esp32s2/include/mbedtls/port/include/mbedtls/esp_config.h b/tools/sdk/esp32s2/include/mbedtls/port/include/mbedtls/esp_config.h
index 844d3f1e..1ff7ea4a 100644
--- a/tools/sdk/esp32s2/include/mbedtls/port/include/mbedtls/esp_config.h
+++ b/tools/sdk/esp32s2/include/mbedtls/port/include/mbedtls/esp_config.h
@@ -144,6 +144,15 @@
 #undef MBEDTLS_SHA512_ALT
 #endif
 
+/* MBEDTLS_MDx_ALT to enable ROM MD support
+   with software fallback.
+*/
+#ifdef CONFIG_MBEDTLS_ROM_MD5
+#define MBEDTLS_MD5_ALT
+#else
+#undef MBEDTLS_MD5_ALT
+#endif
+
 /* The following MPI (bignum) functions have ESP32 hardware support.
    For exponential mod, both software and hardware implementation
    will be compiled. If CONFIG_MBEDTLS_HARDWARE_MPI is enabled, mod APIs
@@ -2451,6 +2460,21 @@
 #undef MBEDTLS_THREADING_PTHREAD
 #endif
 
+/**
+ * \def MBEDTLS_NIST_KW_C
+ *
+ * Enable AES key wrapping as per NIST
+ *
+ * Requires: MBEDTLS_AES_C
+ *
+ * Uncomment this to enable aes key wrap.
+ */
+#ifdef CONFIG_MBEDTLS_NIST_KW_C
+#define MBEDTLS_NIST_KW_C
+#else
+#undef MBEDTLS_NIST_KW_C
+#endif
+
 /* \} name SECTION: Module configuration options */
 
 #if defined(TARGET_LIKE_MBED)
diff --git a/tools/sdk/esp32s2/include/mbedtls/port/include/md/esp_md.h b/tools/sdk/esp32s2/include/mbedtls/port/include/md/esp_md.h
new file mode 100644
index 00000000..e61b6c4e
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/port/include/md/esp_md.h
@@ -0,0 +1,154 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+
+#pragma once
+
+#include "esp_rom_md5.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct MD5Context mbedtls_md5_context;
+
+/**
+ * \brief          Initialize MD5 context
+ *
+ * \param ctx      MD5 context to be initialized
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int esp_md5_init_ret( mbedtls_md5_context *ctx );
+
+/**
+ * \brief          Clear MD5 context
+ *
+ * \param ctx      MD5 context to be cleared
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_free( mbedtls_md5_context *ctx );
+
+/**
+ * \brief          Clone (the state of) an MD5 context
+ *
+ * \param dst      The destination context
+ * \param src      The context to be cloned
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_clone( mbedtls_md5_context *dst, const mbedtls_md5_context *src );
+
+/**
+ * \brief          MD5 process buffer
+ *
+ * \param ctx      MD5 context
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int esp_md5_update_ret( mbedtls_md5_context *ctx, const unsigned char *input, size_t ilen );
+
+/**
+ * \brief          MD5 final digest
+ *
+ * \param ctx      MD5 context
+ * \param output   MD5 checksum result
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int esp_md5_finish_ret( mbedtls_md5_context *ctx, unsigned char output[16] );
+
+/**
+ * \brief          MD5 process data block (internal use only)
+ *
+ * \param ctx      MD5 context
+ * \param data     buffer holding one block of data
+ *
+ * \return         0 if successful
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+int esp_md5_process( mbedtls_md5_context *ctx, const unsigned char data[64] );
+
+/**
+ * \brief          MD5 context setup
+ *
+ * \deprecated     Superseded by mbedtls_md5_starts_ret() in 2.7.0
+ *
+ * \param ctx      context to be initialized
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_init( mbedtls_md5_context *ctx );
+
+/**
+ * \brief          MD5 process buffer
+ *
+ * \deprecated     Superseded by mbedtls_md5_update_ret() in 2.7.0
+ *
+ * \param ctx      MD5 context
+ * \param input    buffer holding the data
+ * \param ilen     length of the input data
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_update( mbedtls_md5_context *ctx, const unsigned char *input, size_t ilen );
+
+/**
+ * \brief          MD5 final digest
+ *
+ * \deprecated     Superseded by mbedtls_md5_finish_ret() in 2.7.0
+ *
+ * \param ctx      MD5 context
+ * \param output   MD5 checksum result
+ *
+ * \warning        MD5 is considered a weak message digest and its use
+ *                 constitutes a security risk. We recommend considering
+ *                 stronger message digests instead.
+ *
+ */
+void esp_md5_finish( mbedtls_md5_context *ctx, unsigned char output[16] );
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/mbedtls/port/include/md5_alt.h b/tools/sdk/esp32s2/include/mbedtls/port/include/md5_alt.h
new file mode 100644
index 00000000..4777d047
--- /dev/null
+++ b/tools/sdk/esp32s2/include/mbedtls/port/include/md5_alt.h
@@ -0,0 +1,50 @@
+/**
+ * \file md5_alt.h
+ *
+ * \brief MD5 block cipher
+ *
+ *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *
+ */
+#ifndef MD5_ALT_H
+#define MD5_ALT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(MBEDTLS_MD5_ALT)
+#include "md/esp_md.h"
+
+#define mbedtls_md5_init                        esp_md5_init
+#define mbedtls_md5_update                      esp_md5_update
+#define mbedtls_md5_finish                      esp_md5_finish
+#define mbedtls_md5_starts_ret                  esp_md5_init_ret
+#define mbedtls_md5_update_ret                  esp_md5_update_ret
+#define mbedtls_md5_finish_ret                  esp_md5_finish_ret
+
+#define mbedtls_md5_free                        esp_md5_free
+#define mbedtls_md5_clone                       esp_md5_clone
+#define mbedtls_internal_md5_process            esp_md5_process
+
+#endif /* MBEDTLS_MD5_ALT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/sdk/esp32s2/include/newlib/platform_include/sys/dirent.h b/tools/sdk/esp32s2/include/newlib/platform_include/sys/dirent.h
index 97e4bfed..4626ae14 100644
--- a/tools/sdk/esp32s2/include/newlib/platform_include/sys/dirent.h
+++ b/tools/sdk/esp32s2/include/newlib/platform_include/sys/dirent.h
@@ -42,7 +42,12 @@ struct dirent {
 #define DT_UNKNOWN  0
 #define DT_REG      1
 #define DT_DIR      2
-    char d_name[256];   /*!< zero-terminated file name */
+#if __BSD_VISIBLE
+#define MAXNAMLEN 255
+    char d_name[MAXNAMLEN+1];   /*!< zero-terminated file name */
+#else
+    char d_name[256];
+#endif
 };
 
 DIR* opendir(const char* name);
diff --git a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/rtc.h b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/rtc.h
index 878819a5..4ad78cd6 100644
--- a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/rtc.h
+++ b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/rtc.h
@@ -113,6 +113,9 @@ extern "C" {
 #define RTC_CNTL_CK8M_DFREQ_DEFAULT 172
 #define RTC_CNTL_SCK_DCAP_DEFAULT   255
 
+#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_IN_SLEEP    (0xFF)
+#define RTC_CNTL_ULPCP_TOUCH_START_WAIT_DEFAULT     (0x10)
+
 /*
 set sleep_init default param
 */
diff --git a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/soc_caps.h b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/soc_caps.h
index 5d16add7..cd7aa1a0 100644
--- a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/soc_caps.h
+++ b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/soc_caps.h
@@ -149,7 +149,7 @@
 /*-------------------------- MPU CAPS ----------------------------------------*/
 //TODO: correct the caller and remove unsupported lines
 #define SOC_MPU_CONFIGURABLE_REGIONS_SUPPORTED    0
-#define SOC_MPU_MIN_REGION_SIZE                   0x20000000
+#define SOC_MPU_MIN_REGION_SIZE                   0x20000000U
 #define SOC_MPU_REGIONS_MAX_NUM                   8
 #define SOC_MPU_REGION_RO_SUPPORTED               0
 #define SOC_MPU_REGION_WO_SUPPORTED               0
@@ -210,10 +210,9 @@
 
 #define SOC_MEMSPI_IS_INDEPENDENT 1
 
-/*-------------------------- SYS TIMER CAPS ----------------------------------*/
-#define SOC_SYSTIMER_COUNTER_NUM (1)   // Number of counter units
-#define SOC_SYSTIMER_ALARM_NUM (3)     // Number of alarm units
-
+/*-------------------------- SYSTIMER CAPS ----------------------------------*/
+#define SOC_SYSTIMER_COUNTER_NUM  (1)  // Number of counter units
+#define SOC_SYSTIMER_ALARM_NUM    (3)  // Number of alarm units
 #define SOC_SYSTIMER_BIT_WIDTH_LO (32) // Bit width of systimer low part
 #define SOC_SYSTIMER_BIT_WIDTH_HI (32) // Bit width of systimer high part
 
@@ -291,6 +290,9 @@
 #define SOC_AES_SUPPORT_DMA     (1)
 #define SOC_AES_SUPPORT_GCM     (1)
 
+/*-------------------------- Flash Encryption CAPS----------------------------*/
+#define SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX   (64)
+
 /* Has "crypto DMA", which is shared with SHA */
 #define SOC_AES_CRYPTO_DMA      (1)
 
diff --git a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/systimer_reg.h b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/systimer_reg.h
index 5debf114..ede37127 100644
--- a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/systimer_reg.h
+++ b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/systimer_reg.h
@@ -1,16 +1,17 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
 #pragma once
 
 #include <stdint.h>
@@ -38,7 +39,6 @@ extern "C" {
 #define SYSTIMER_CLK_EN_V  0x00000001
 #define SYSTIMER_CLK_EN_S  31
 
-
 /** SYSTIMER_LOAD_REG register
  *  load value to system timer
  */
@@ -51,12 +51,11 @@ extern "C" {
 #define SYSTIMER_TIMER_LOAD_V  0x00000001
 #define SYSTIMER_TIMER_LOAD_S  31
 
-
 /** SYSTIMER_LOAD_HI_REG register
  *  High 32-bit load to system timer
  */
 #define SYSTIMER_LOAD_HI_REG (DR_REG_SYSTIMER_BASE + 0x8)
-/** SYSTIMER_TIMER_LOAD_HI : R/W; bitpos: [32:0]; default: 0;
+/** SYSTIMER_TIMER_LOAD_HI : R/W; bitpos: [31:0]; default: 0;
  *  High 32-bit load to system timer
  */
 #define SYSTIMER_TIMER_LOAD_HI    0xFFFFFFFF
@@ -64,12 +63,11 @@ extern "C" {
 #define SYSTIMER_TIMER_LOAD_HI_V  0xFFFFFFFF
 #define SYSTIMER_TIMER_LOAD_HI_S  0
 
-
 /** SYSTIMER_LOAD_LO_REG register
  *  Low 32-bit load to system timer
  */
 #define SYSTIMER_LOAD_LO_REG (DR_REG_SYSTIMER_BASE + 0xc)
-/** SYSTIMER_TIMER_LOAD_LO : R/W; bitpos: [32:0]; default: 0;
+/** SYSTIMER_TIMER_LOAD_LO : R/W; bitpos: [31:0]; default: 0;
  *  Low 32-bit load to system timer
  */
 #define SYSTIMER_TIMER_LOAD_LO    0xFFFFFFFF
@@ -77,19 +75,18 @@ extern "C" {
 #define SYSTIMER_TIMER_LOAD_LO_V  0xFFFFFFFF
 #define SYSTIMER_TIMER_LOAD_LO_S  0
 
-
 /** SYSTIMER_STEP_REG register
  *  system timer accumulation step
  */
 #define SYSTIMER_STEP_REG (DR_REG_SYSTIMER_BASE + 0x10)
-/** SYSTIMER_TIMER_XTAL_STEP : R/W; bitpos: [10:0]; default: 80;
+/** SYSTIMER_TIMER_XTAL_STEP : R/W; bitpos: [9:0]; default: 80;
  *  system timer accumulation step when using XTAL
  */
 #define SYSTIMER_TIMER_XTAL_STEP    0x000003FF
 #define SYSTIMER_TIMER_XTAL_STEP_M  (SYSTIMER_TIMER_XTAL_STEP_V << SYSTIMER_TIMER_XTAL_STEP_S)
 #define SYSTIMER_TIMER_XTAL_STEP_V  0x000003FF
 #define SYSTIMER_TIMER_XTAL_STEP_S  0
-/** SYSTIMER_TIMER_PLL_STEP : R/W; bitpos: [20:10]; default: 1;
+/** SYSTIMER_TIMER_PLL_STEP : R/W; bitpos: [19:10]; default: 1;
  *  system timer accumulation step when using PLL
  */
 #define SYSTIMER_TIMER_PLL_STEP    0x000003FF
@@ -97,12 +94,11 @@ extern "C" {
 #define SYSTIMER_TIMER_PLL_STEP_V  0x000003FF
 #define SYSTIMER_TIMER_PLL_STEP_S  10
 
-
 /** SYSTIMER_TARGET0_HI_REG register
  *  System timer target0 high 32-bit
  */
 #define SYSTIMER_TARGET0_HI_REG (DR_REG_SYSTIMER_BASE + 0x14)
-/** SYSTIMER_TIMER_TARGET0_HI : R/W; bitpos: [32:0]; default: 0;
+/** SYSTIMER_TIMER_TARGET0_HI : R/W; bitpos: [31:0]; default: 0;
  *  System timer target0 high 32-bit
  */
 #define SYSTIMER_TIMER_TARGET0_HI    0xFFFFFFFF
@@ -110,12 +106,11 @@ extern "C" {
 #define SYSTIMER_TIMER_TARGET0_HI_V  0xFFFFFFFF
 #define SYSTIMER_TIMER_TARGET0_HI_S  0
 
-
 /** SYSTIMER_TARGET0_LO_REG register
  *  System timer target0 low 32-bit
  */
 #define SYSTIMER_TARGET0_LO_REG (DR_REG_SYSTIMER_BASE + 0x18)
-/** SYSTIMER_TIMER_TARGET0_LO : R/W; bitpos: [32:0]; default: 0;
+/** SYSTIMER_TIMER_TARGET0_LO : R/W; bitpos: [31:0]; default: 0;
  *  System timer target0 low 32-bit
  */
 #define SYSTIMER_TIMER_TARGET0_LO    0xFFFFFFFF
@@ -123,12 +118,11 @@ extern "C" {
 #define SYSTIMER_TIMER_TARGET0_LO_V  0xFFFFFFFF
 #define SYSTIMER_TIMER_TARGET0_LO_S  0
 
-
 /** SYSTIMER_TARGET1_HI_REG register
  *  System timer target1 high 32-bit
  */
 #define SYSTIMER_TARGET1_HI_REG (DR_REG_SYSTIMER_BASE + 0x1c)
-/** SYSTIMER_TIMER_TARGET1_HI : R/W; bitpos: [32:0]; default: 0;
+/** SYSTIMER_TIMER_TARGET1_HI : R/W; bitpos: [31:0]; default: 0;
  *  System timer target1 high 32-bit
  */
 #define SYSTIMER_TIMER_TARGET1_HI    0xFFFFFFFF
@@ -136,12 +130,11 @@ extern "C" {
 #define SYSTIMER_TIMER_TARGET1_HI_V  0xFFFFFFFF
 #define SYSTIMER_TIMER_TARGET1_HI_S  0
 
-
 /** SYSTIMER_TARGET1_LO_REG register
  *  System timer target1 low 32-bit
  */
 #define SYSTIMER_TARGET1_LO_REG (DR_REG_SYSTIMER_BASE + 0x20)
-/** SYSTIMER_TIMER_TARGET1_LO : R/W; bitpos: [32:0]; default: 0;
+/** SYSTIMER_TIMER_TARGET1_LO : R/W; bitpos: [31:0]; default: 0;
  *  System timer target1 low 32-bit
  */
 #define SYSTIMER_TIMER_TARGET1_LO    0xFFFFFFFF
@@ -149,12 +142,11 @@ extern "C" {
 #define SYSTIMER_TIMER_TARGET1_LO_V  0xFFFFFFFF
 #define SYSTIMER_TIMER_TARGET1_LO_S  0
 
-
 /** SYSTIMER_TARGET2_HI_REG register
  *  System timer target2 high 32-bit
  */
 #define SYSTIMER_TARGET2_HI_REG (DR_REG_SYSTIMER_BASE + 0x24)
-/** SYSTIMER_TIMER_TARGET2_HI : R/W; bitpos: [32:0]; default: 0;
+/** SYSTIMER_TIMER_TARGET2_HI : R/W; bitpos: [31:0]; default: 0;
  *  System timer target2 high 32-bit
  */
 #define SYSTIMER_TIMER_TARGET2_HI    0xFFFFFFFF
@@ -162,12 +154,11 @@ extern "C" {
 #define SYSTIMER_TIMER_TARGET2_HI_V  0xFFFFFFFF
 #define SYSTIMER_TIMER_TARGET2_HI_S  0
 
-
 /** SYSTIMER_TARGET2_LO_REG register
  *  System timer target2 low 32-bit
  */
 #define SYSTIMER_TARGET2_LO_REG (DR_REG_SYSTIMER_BASE + 0x28)
-/** SYSTIMER_TIMER_TARGET2_LO : R/W; bitpos: [32:0]; default: 0;
+/** SYSTIMER_TIMER_TARGET2_LO : R/W; bitpos: [31:0]; default: 0;
  *  System timer target2 low 32-bit
  */
 #define SYSTIMER_TIMER_TARGET2_LO    0xFFFFFFFF
@@ -175,12 +166,11 @@ extern "C" {
 #define SYSTIMER_TIMER_TARGET2_LO_V  0xFFFFFFFF
 #define SYSTIMER_TIMER_TARGET2_LO_S  0
 
-
 /** SYSTIMER_TARGET0_CONF_REG register
  *  Configure system timer target0 work mode
  */
 #define SYSTIMER_TARGET0_CONF_REG (DR_REG_SYSTIMER_BASE + 0x2c)
-/** SYSTIMER_TARGET0_PERIOD : R/W; bitpos: [30:0]; default: 0;
+/** SYSTIMER_TARGET0_PERIOD : R/W; bitpos: [29:0]; default: 0;
  *  System timer target0 alarm period
  */
 #define SYSTIMER_TARGET0_PERIOD    0x3FFFFFFF
@@ -202,12 +192,11 @@ extern "C" {
 #define SYSTIMER_TARGET0_WORK_EN_V  0x00000001
 #define SYSTIMER_TARGET0_WORK_EN_S  31
 
-
 /** SYSTIMER_TARGET1_CONF_REG register
  *  Configure system timer target1 work mode
  */
 #define SYSTIMER_TARGET1_CONF_REG (DR_REG_SYSTIMER_BASE + 0x30)
-/** SYSTIMER_TARGET1_PERIOD : R/W; bitpos: [30:0]; default: 0;
+/** SYSTIMER_TARGET1_PERIOD : R/W; bitpos: [29:0]; default: 0;
  *  System timer target1 alarm period
  */
 #define SYSTIMER_TARGET1_PERIOD    0x3FFFFFFF
@@ -229,12 +218,11 @@ extern "C" {
 #define SYSTIMER_TARGET1_WORK_EN_V  0x00000001
 #define SYSTIMER_TARGET1_WORK_EN_S  31
 
-
 /** SYSTIMER_TARGET2_CONF_REG register
  *  Configure system timer target2 work mode
  */
 #define SYSTIMER_TARGET2_CONF_REG (DR_REG_SYSTIMER_BASE + 0x34)
-/** SYSTIMER_TARGET2_PERIOD : R/W; bitpos: [30:0]; default: 0;
+/** SYSTIMER_TARGET2_PERIOD : R/W; bitpos: [29:0]; default: 0;
  *  System timer target2 alarm period
  */
 #define SYSTIMER_TARGET2_PERIOD    0x3FFFFFFF
@@ -256,7 +244,6 @@ extern "C" {
 #define SYSTIMER_TARGET2_WORK_EN_V  0x00000001
 #define SYSTIMER_TARGET2_WORK_EN_S  31
 
-
 /** SYSTIMER_UPDATE_REG register
  *  Read out system timer value
  */
@@ -276,12 +263,11 @@ extern "C" {
 #define SYSTIMER_TIMER_UPDATE_V  0x00000001
 #define SYSTIMER_TIMER_UPDATE_S  31
 
-
 /** SYSTIMER_VALUE_HI_REG register
  *  system timer high 32-bit
  */
 #define SYSTIMER_VALUE_HI_REG (DR_REG_SYSTIMER_BASE + 0x3c)
-/** SYSTIMER_TIMER_VALUE_HI : RO; bitpos: [32:0]; default: 0;
+/** SYSTIMER_TIMER_VALUE_HI : RO; bitpos: [31:0]; default: 0;
  *  system timer high 32-bit
  */
 #define SYSTIMER_TIMER_VALUE_HI    0xFFFFFFFF
@@ -289,12 +275,11 @@ extern "C" {
 #define SYSTIMER_TIMER_VALUE_HI_V  0xFFFFFFFF
 #define SYSTIMER_TIMER_VALUE_HI_S  0
 
-
 /** SYSTIMER_VALUE_LO_REG register
  *  system timer low 32-bit
  */
 #define SYSTIMER_VALUE_LO_REG (DR_REG_SYSTIMER_BASE + 0x40)
-/** SYSTIMER_TIMER_VALUE_LO : RO; bitpos: [32:0]; default: 0;
+/** SYSTIMER_TIMER_VALUE_LO : RO; bitpos: [31:0]; default: 0;
  *  system timer low 32-bit
  */
 #define SYSTIMER_TIMER_VALUE_LO    0xFFFFFFFF
@@ -302,93 +287,89 @@ extern "C" {
 #define SYSTIMER_TIMER_VALUE_LO_V  0xFFFFFFFF
 #define SYSTIMER_TIMER_VALUE_LO_S  0
 
-
 /** SYSTIMER_INT_ENA_REG register
  *  system timer interrupt enable
  */
 #define SYSTIMER_INT_ENA_REG (DR_REG_SYSTIMER_BASE + 0x44)
-/** SYSTIMER_INT0_ENA : R/W; bitpos: [0]; default: 0;
+/** SYSTIMER_SYSTIMER_INT0_ENA : R/W; bitpos: [0]; default: 0;
  *  system timer target0 interrupt enable
  */
-#define SYSTIMER_INT0_ENA    (BIT(0))
-#define SYSTIMER_INT0_ENA_M  (SYSTIMER_INT0_ENA_V << SYSTIMER_INT0_ENA_S)
-#define SYSTIMER_INT0_ENA_V  0x00000001
-#define SYSTIMER_INT0_ENA_S  0
-/** SYSTIMER_INT1_ENA : R/W; bitpos: [1]; default: 0;
+#define SYSTIMER_SYSTIMER_INT0_ENA    (BIT(0))
+#define SYSTIMER_SYSTIMER_INT0_ENA_M  (SYSTIMER_SYSTIMER_INT0_ENA_V << SYSTIMER_SYSTIMER_INT0_ENA_S)
+#define SYSTIMER_SYSTIMER_INT0_ENA_V  0x00000001
+#define SYSTIMER_SYSTIMER_INT0_ENA_S  0
+/** SYSTIMER_SYSTIMER_INT1_ENA : R/W; bitpos: [1]; default: 0;
  *  system timer target1 interrupt enable
  */
-#define SYSTIMER_INT1_ENA    (BIT(1))
-#define SYSTIMER_INT1_ENA_M  (SYSTIMER_INT1_ENA_V << SYSTIMER_INT1_ENA_S)
-#define SYSTIMER_INT1_ENA_V  0x00000001
-#define SYSTIMER_INT1_ENA_S  1
-/** SYSTIMER_INT2_ENA : R/W; bitpos: [2]; default: 0;
+#define SYSTIMER_SYSTIMER_INT1_ENA    (BIT(1))
+#define SYSTIMER_SYSTIMER_INT1_ENA_M  (SYSTIMER_SYSTIMER_INT1_ENA_V << SYSTIMER_SYSTIMER_INT1_ENA_S)
+#define SYSTIMER_SYSTIMER_INT1_ENA_V  0x00000001
+#define SYSTIMER_SYSTIMER_INT1_ENA_S  1
+/** SYSTIMER_SYSTIMER_INT2_ENA : R/W; bitpos: [2]; default: 0;
  *  system timer target2 interrupt enable
  */
-#define SYSTIMER_INT2_ENA    (BIT(2))
-#define SYSTIMER_INT2_ENA_M  (SYSTIMER_INT2_ENA_V << SYSTIMER_INT2_ENA_S)
-#define SYSTIMER_INT2_ENA_V  0x00000001
-#define SYSTIMER_INT2_ENA_S  2
-
+#define SYSTIMER_SYSTIMER_INT2_ENA    (BIT(2))
+#define SYSTIMER_SYSTIMER_INT2_ENA_M  (SYSTIMER_SYSTIMER_INT2_ENA_V << SYSTIMER_SYSTIMER_INT2_ENA_S)
+#define SYSTIMER_SYSTIMER_INT2_ENA_V  0x00000001
+#define SYSTIMER_SYSTIMER_INT2_ENA_S  2
 
 /** SYSTIMER_INT_RAW_REG register
  *  system timer interrupt raw
  */
 #define SYSTIMER_INT_RAW_REG (DR_REG_SYSTIMER_BASE + 0x48)
-/** SYSTIMER_INT0_RAW : RO; bitpos: [0]; default: 0;
+/** SYSTIMER_SYSTIMER_INT0_RAW : RO; bitpos: [0]; default: 0;
  *  system timer target0 interrupt raw
  */
-#define SYSTIMER_INT0_RAW    (BIT(0))
-#define SYSTIMER_INT0_RAW_M  (SYSTIMER_INT0_RAW_V << SYSTIMER_INT0_RAW_S)
-#define SYSTIMER_INT0_RAW_V  0x00000001
-#define SYSTIMER_INT0_RAW_S  0
-/** SYSTIMER_INT1_RAW : RO; bitpos: [1]; default: 0;
+#define SYSTIMER_SYSTIMER_INT0_RAW    (BIT(0))
+#define SYSTIMER_SYSTIMER_INT0_RAW_M  (SYSTIMER_SYSTIMER_INT0_RAW_V << SYSTIMER_SYSTIMER_INT0_RAW_S)
+#define SYSTIMER_SYSTIMER_INT0_RAW_V  0x00000001
+#define SYSTIMER_SYSTIMER_INT0_RAW_S  0
+/** SYSTIMER_SYSTIMER_INT1_RAW : RO; bitpos: [1]; default: 0;
  *  system timer target1 interrupt raw
  */
-#define SYSTIMER_INT1_RAW    (BIT(1))
-#define SYSTIMER_INT1_RAW_M  (SYSTIMER_INT1_RAW_V << SYSTIMER_INT1_RAW_S)
-#define SYSTIMER_INT1_RAW_V  0x00000001
-#define SYSTIMER_INT1_RAW_S  1
-/** SYSTIMER_INT2_RAW : RO; bitpos: [2]; default: 0;
+#define SYSTIMER_SYSTIMER_INT1_RAW    (BIT(1))
+#define SYSTIMER_SYSTIMER_INT1_RAW_M  (SYSTIMER_SYSTIMER_INT1_RAW_V << SYSTIMER_SYSTIMER_INT1_RAW_S)
+#define SYSTIMER_SYSTIMER_INT1_RAW_V  0x00000001
+#define SYSTIMER_SYSTIMER_INT1_RAW_S  1
+/** SYSTIMER_SYSTIMER_INT2_RAW : RO; bitpos: [2]; default: 0;
  *  system timer target2 interrupt raw
  */
-#define SYSTIMER_INT2_RAW    (BIT(2))
-#define SYSTIMER_INT2_RAW_M  (SYSTIMER_INT2_RAW_V << SYSTIMER_INT2_RAW_S)
-#define SYSTIMER_INT2_RAW_V  0x00000001
-#define SYSTIMER_INT2_RAW_S  2
-
+#define SYSTIMER_SYSTIMER_INT2_RAW    (BIT(2))
+#define SYSTIMER_SYSTIMER_INT2_RAW_M  (SYSTIMER_SYSTIMER_INT2_RAW_V << SYSTIMER_SYSTIMER_INT2_RAW_S)
+#define SYSTIMER_SYSTIMER_INT2_RAW_V  0x00000001
+#define SYSTIMER_SYSTIMER_INT2_RAW_S  2
 
 /** SYSTIMER_INT_CLR_REG register
  *  system timer interrupt clear
  */
 #define SYSTIMER_INT_CLR_REG (DR_REG_SYSTIMER_BASE + 0x4c)
-/** SYSTIMER_INT0_CLR : WO; bitpos: [0]; default: 0;
+/** SYSTIMER_SYSTIMER_INT0_CLR : WO; bitpos: [0]; default: 0;
  *  system timer target0 interrupt clear
  */
-#define SYSTIMER_INT0_CLR    (BIT(0))
-#define SYSTIMER_INT0_CLR_M  (SYSTIMER_INT0_CLR_V << SYSTIMER_INT0_CLR_S)
-#define SYSTIMER_INT0_CLR_V  0x00000001
-#define SYSTIMER_INT0_CLR_S  0
-/** SYSTIMER_INT1_CLR : WO; bitpos: [1]; default: 0;
+#define SYSTIMER_SYSTIMER_INT0_CLR    (BIT(0))
+#define SYSTIMER_SYSTIMER_INT0_CLR_M  (SYSTIMER_SYSTIMER_INT0_CLR_V << SYSTIMER_SYSTIMER_INT0_CLR_S)
+#define SYSTIMER_SYSTIMER_INT0_CLR_V  0x00000001
+#define SYSTIMER_SYSTIMER_INT0_CLR_S  0
+/** SYSTIMER_SYSTIMER_INT1_CLR : WO; bitpos: [1]; default: 0;
  *  system timer target1 interrupt clear
  */
-#define SYSTIMER_INT1_CLR    (BIT(1))
-#define SYSTIMER_INT1_CLR_M  (SYSTIMER_INT1_CLR_V << SYSTIMER_INT1_CLR_S)
-#define SYSTIMER_INT1_CLR_V  0x00000001
-#define SYSTIMER_INT1_CLR_S  1
-/** SYSTIMER_INT2_CLR : WO; bitpos: [2]; default: 0;
+#define SYSTIMER_SYSTIMER_INT1_CLR    (BIT(1))
+#define SYSTIMER_SYSTIMER_INT1_CLR_M  (SYSTIMER_SYSTIMER_INT1_CLR_V << SYSTIMER_SYSTIMER_INT1_CLR_S)
+#define SYSTIMER_SYSTIMER_INT1_CLR_V  0x00000001
+#define SYSTIMER_SYSTIMER_INT1_CLR_S  1
+/** SYSTIMER_SYSTIMER_INT2_CLR : WO; bitpos: [2]; default: 0;
  *  system timer target2 interrupt clear
  */
-#define SYSTIMER_INT2_CLR    (BIT(2))
-#define SYSTIMER_INT2_CLR_M  (SYSTIMER_INT2_CLR_V << SYSTIMER_INT2_CLR_S)
-#define SYSTIMER_INT2_CLR_V  0x00000001
-#define SYSTIMER_INT2_CLR_S  2
-
+#define SYSTIMER_SYSTIMER_INT2_CLR    (BIT(2))
+#define SYSTIMER_SYSTIMER_INT2_CLR_M  (SYSTIMER_SYSTIMER_INT2_CLR_V << SYSTIMER_SYSTIMER_INT2_CLR_S)
+#define SYSTIMER_SYSTIMER_INT2_CLR_V  0x00000001
+#define SYSTIMER_SYSTIMER_INT2_CLR_S  2
 
 /** SYSTIMER_DATE_REG register
  *  system timer register version
  */
 #define SYSTIMER_DATE_REG (DR_REG_SYSTIMER_BASE + 0xfc)
-/** SYSTIMER_DATE : R/W; bitpos: [32:0]; default: 25194848;
+/** SYSTIMER_DATE : R/W; bitpos: [31:0]; default: 25194848;
  *  system timer register version
  */
 #define SYSTIMER_DATE    0xFFFFFFFF
@@ -396,7 +377,6 @@ extern "C" {
 #define SYSTIMER_DATE_V  0xFFFFFFFF
 #define SYSTIMER_DATE_S  0
 
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/systimer_struct.h b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/systimer_struct.h
new file mode 100644
index 00000000..48b1d792
--- /dev/null
+++ b/tools/sdk/esp32s2/include/soc/esp32s2/include/soc/systimer_struct.h
@@ -0,0 +1,330 @@
+/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License");
+ *  you may not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS,
+ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#pragma once
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** SYSTEM TIMER REGISTER */
+/** Type of conf register
+ *  Configure system timer clock
+ */
+typedef union {
+    struct {
+        /** clk_fo : R/W; bitpos: [0]; default: 0;
+         *  system timer force clock enable
+         */
+        uint32_t clk_fo: 1;
+        uint32_t reserved_1: 30;
+        /** clk_en : R/W; bitpos: [31]; default: 0;
+         *  register clock enable
+         */
+        uint32_t clk_en: 1;
+    };
+    uint32_t val;
+} systimer_conf_reg_t;
+
+/** Type of load register
+ *  load value to system timer
+ */
+typedef union {
+    struct {
+        uint32_t reserved_0: 31;
+        /** timer_load : WO; bitpos: [31]; default: 0;
+         *  load value to system timer
+         */
+        uint32_t timer_load: 1;
+    };
+    uint32_t val;
+} systimer_load_reg_t;
+
+/** Type of load_hi register
+ *  High 32-bit load to system timer
+ */
+typedef union {
+    struct {
+        /** timer_load_hi : R/W; bitpos: [31:0]; default: 0;
+         *  High 32-bit load to system timer
+         */
+        uint32_t timer_load_hi: 32;
+    };
+    uint32_t val;
+} systimer_load_hi_reg_t;
+
+/** Type of load_lo register
+ *  Low 32-bit load to system timer
+ */
+typedef union {
+    struct {
+        /** timer_load_lo : R/W; bitpos: [31:0]; default: 0;
+         *  Low 32-bit load to system timer
+         */
+        uint32_t timer_load_lo: 32;
+    };
+    uint32_t val;
+} systimer_load_lo_reg_t;
+
+/** Type of step register
+ *  system timer accumulation step
+ */
+typedef union {
+    struct {
+        /** timer_xtal_step : R/W; bitpos: [9:0]; default: 80;
+         *  system timer accumulation step when using XTAL
+         */
+        uint32_t timer_xtal_step: 10;
+        /** timer_pll_step : R/W; bitpos: [19:10]; default: 1;
+         *  system timer accumulation step when using PLL
+         */
+        uint32_t timer_pll_step: 10;
+    };
+    uint32_t val;
+} systimer_step_reg_t;
+
+/** Type of target_val register
+ *  System timer target value
+ */
+typedef struct {
+    union {
+        struct {
+            /** timer_target_hi : R/W; bitpos: [31:0]; default: 0;
+             *  System timer target0 high 32-bit
+             */
+            uint32_t timer_target_hi: 32;
+        };
+        uint32_t val;
+    } hi;
+    union {
+        struct {
+            /** timer_target_lo : R/W; bitpos: [31:0]; default: 0;
+             *  System timer target0 low 32-bit
+             */
+            uint32_t timer_target_lo: 32;
+        };
+        uint32_t val;
+    } lo;
+} systimer_target_val_reg_t;
+
+/** Type of target_conf register
+ *  Configure system timer target work mode
+ */
+typedef union {
+    struct {
+        /** target_period : R/W; bitpos: [29:0]; default: 0;
+         *  System timer target alarm period
+         */
+        uint32_t target_period: 30;
+        /** target_period_mode : R/W; bitpos: [30]; default: 0;
+         *  Whether system timer target work in period mode
+         */
+        uint32_t target_period_mode: 1;
+        /** target_work_en : R/W; bitpos: [31]; default: 0;
+         *  system timer target work enable
+         */
+        uint32_t target_work_en: 1;
+    };
+    uint32_t val;
+} systimer_target_conf_reg_t;
+
+/** Type of update register
+ *  Read out system timer value
+ */
+typedef union {
+    struct {
+        uint32_t reserved_0: 30;
+        /** timer_value_valid : RO; bitpos: [30]; default: 0;
+         *  If it is valid to read out timer value from register
+         */
+        uint32_t timer_value_valid: 1;
+        /** timer_update : WO; bitpos: [31]; default: 0;
+         *  Update system timer value to register
+         */
+        uint32_t timer_update: 1;
+    };
+    uint32_t val;
+} systimer_update_reg_t;
+
+/** Type of value_hi register
+ *  system timer high 32-bit
+ */
+typedef union {
+    struct {
+        /** timer_value_hi : RO; bitpos: [31:0]; default: 0;
+         *  system timer high 32-bit
+         */
+        uint32_t timer_value_hi: 32;
+    };
+    uint32_t val;
+} systimer_value_hi_reg_t;
+
+/** Type of value_lo register
+ *  system timer low 32-bit
+ */
+typedef union {
+    struct {
+        /** timer_value_lo : RO; bitpos: [31:0]; default: 0;
+         *  system timer low 32-bit
+         */
+        uint32_t timer_value_lo: 32;
+    };
+    uint32_t val;
+} systimer_value_lo_reg_t;
+
+/** Type of int_ena register
+ *  system timer interrupt enable
+ */
+typedef union {
+    struct {
+        /** systimer_int0_ena : R/W; bitpos: [0]; default: 0;
+         *  system timer target0 interrupt enable
+         */
+        uint32_t systimer_int0_ena: 1;
+        /** systimer_int1_ena : R/W; bitpos: [1]; default: 0;
+         *  system timer target1 interrupt enable
+         */
+        uint32_t systimer_int1_ena: 1;
+        /** systimer_int2_ena : R/W; bitpos: [2]; default: 0;
+         *  system timer target2 interrupt enable
+         */
+        uint32_t systimer_int2_ena: 1;
+    };
+    uint32_t val;
+} systimer_int_ena_reg_t;
+
+/** Type of int_raw register
+ *  system timer interrupt raw
+ */
+typedef union {
+    struct {
+        /** systimer_int0_raw : RO; bitpos: [0]; default: 0;
+         *  system timer target0 interrupt raw
+         */
+        uint32_t systimer_int0_raw: 1;
+        /** systimer_int1_raw : RO; bitpos: [1]; default: 0;
+         *  system timer target1 interrupt raw
+         */
+        uint32_t systimer_int1_raw: 1;
+        /** systimer_int2_raw : RO; bitpos: [2]; default: 0;
+         *  system timer target2 interrupt raw
+         */
+        uint32_t systimer_int2_raw: 1;
+    };
+    uint32_t val;
+} systimer_int_raw_reg_t;
+
+/** Type of int_clr register
+ *  system timer interrupt clear
+ */
+typedef union {
+    struct {
+        /** systimer_int0_clr : WO; bitpos: [0]; default: 0;
+         *  system timer target0 interrupt clear
+         */
+        uint32_t systimer_int0_clr: 1;
+        /** systimer_int1_clr : WO; bitpos: [1]; default: 0;
+         *  system timer target1 interrupt clear
+         */
+        uint32_t systimer_int1_clr: 1;
+        /** systimer_int2_clr : WO; bitpos: [2]; default: 0;
+         *  system timer target2 interrupt clear
+         */
+        uint32_t systimer_int2_clr: 1;
+    };
+    uint32_t val;
+} systimer_int_clr_reg_t;
+
+
+/** DATE */
+/** Type of date register
+ *  system timer register version
+ */
+typedef union {
+    struct {
+        /** date : R/W; bitpos: [31:0]; default: 25194848;
+         *  system timer register version
+         */
+        uint32_t date: 32;
+    };
+    uint32_t val;
+} systimer_date_reg_t;
+
+
+typedef struct {
+    volatile systimer_conf_reg_t conf;
+    volatile systimer_load_reg_t load;
+    volatile systimer_load_hi_reg_t load_hi;
+    volatile systimer_load_lo_reg_t load_lo;
+    volatile systimer_step_reg_t step;
+    volatile systimer_target_val_reg_t target_val[3];
+    volatile systimer_target_conf_reg_t target_conf[3];
+    volatile systimer_update_reg_t update;
+    volatile systimer_value_hi_reg_t value_hi;
+    volatile systimer_value_lo_reg_t value_lo;
+    volatile systimer_int_ena_reg_t int_ena;
+    volatile systimer_int_raw_reg_t int_raw;
+    volatile systimer_int_clr_reg_t int_clr;
+    uint32_t reserved_050;
+    uint32_t reserved_054;
+    uint32_t reserved_058;
+    uint32_t reserved_05c;
+    uint32_t reserved_060;
+    uint32_t reserved_064;
+    uint32_t reserved_068;
+    uint32_t reserved_06c;
+    uint32_t reserved_070;
+    uint32_t reserved_074;
+    uint32_t reserved_078;
+    uint32_t reserved_07c;
+    uint32_t reserved_080;
+    uint32_t reserved_084;
+    uint32_t reserved_088;
+    uint32_t reserved_08c;
+    uint32_t reserved_090;
+    uint32_t reserved_094;
+    uint32_t reserved_098;
+    uint32_t reserved_09c;
+    uint32_t reserved_0a0;
+    uint32_t reserved_0a4;
+    uint32_t reserved_0a8;
+    uint32_t reserved_0ac;
+    uint32_t reserved_0b0;
+    uint32_t reserved_0b4;
+    uint32_t reserved_0b8;
+    uint32_t reserved_0bc;
+    uint32_t reserved_0c0;
+    uint32_t reserved_0c4;
+    uint32_t reserved_0c8;
+    uint32_t reserved_0cc;
+    uint32_t reserved_0d0;
+    uint32_t reserved_0d4;
+    uint32_t reserved_0d8;
+    uint32_t reserved_0dc;
+    uint32_t reserved_0e0;
+    uint32_t reserved_0e4;
+    uint32_t reserved_0e8;
+    uint32_t reserved_0ec;
+    uint32_t reserved_0f0;
+    uint32_t reserved_0f4;
+    uint32_t reserved_0f8;
+    volatile systimer_date_reg_t date;
+} systimer_dev_t;
+
+extern systimer_dev_t SYSTIMER;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/soc/include/soc/gdma_periph.h b/tools/sdk/esp32s2/include/soc/include/soc/gdma_periph.h
index 2ccba244..4cc9cb17 100644
--- a/tools/sdk/esp32s2/include/soc/include/soc/gdma_periph.h
+++ b/tools/sdk/esp32s2/include/soc/include/soc/gdma_periph.h
@@ -25,7 +25,8 @@ typedef struct {
     struct {
         const periph_module_t module;
         struct {
-            const int irq_id;
+            const int rx_irq_id;
+            const int tx_irq_id;
         } pairs[SOC_GDMA_PAIRS_PER_GROUP];
     } groups[SOC_GDMA_GROUPS];
 } gdma_signal_conn_t;
diff --git a/tools/sdk/esp32s2/include/soc/include/soc/lcd_periph.h b/tools/sdk/esp32s2/include/soc/include/soc/lcd_periph.h
index fd56a06f..6b1071b3 100644
--- a/tools/sdk/esp32s2/include/soc/include/soc/lcd_periph.h
+++ b/tools/sdk/esp32s2/include/soc/include/soc/lcd_periph.h
@@ -25,7 +25,7 @@ typedef struct {
     struct {
         const periph_module_t module;
         const int irq_id;
-        const int data_sigs[SOC_LCD_MAX_DATA_WIDTH];
+        const int data_sigs[SOC_LCD_I80_BUS_WIDTH];
         const int cs_sig;
         const int dc_sig;
         const int wr_sig;
@@ -33,7 +33,7 @@ typedef struct {
     struct {
         const periph_module_t module;
         const int irq_id;
-        const int data_sigs[SOC_LCD_MAX_DATA_WIDTH];
+        const int data_sigs[SOC_LCD_RGB_DATA_WIDTH];
         const int hsync_sig;
         const int vsync_sig;
         const int pclk_sig;
diff --git a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/ds_caps.h b/tools/sdk/esp32s2/include/soc/include/soc/usb_periph.h
similarity index 57%
rename from tools/sdk/esp32c3/include/soc/esp32c3/include/soc/ds_caps.h
rename to tools/sdk/esp32s2/include/soc/include/soc/usb_periph.h
index 4e5eb110..af18350a 100644
--- a/tools/sdk/esp32c3/include/soc/esp32c3/include/soc/ds_caps.h
+++ b/tools/sdk/esp32s2/include/soc/include/soc/usb_periph.h
@@ -14,12 +14,24 @@
 
 #pragma once
 
-/** The maximum length of a Digital Signature in bits. */
-#define DS_SIGNATURE_MAX_BIT_LEN (3072)
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/soc_pins.h"
+#include "soc/gpio_sig_map.h"
+#include "soc/usb_reg.h"
+#include "soc/usb_types.h"
+#include "soc/usb_struct.h"
+#include "soc/usb_wrap_reg.h"
+#include "soc/usb_wrap_struct.h"
 
-/** Initialization vector (IV) length for the RSA key parameter message digest (MD) in bytes. */
-#define DS_KEY_PARAM_MD_IV_LENGTH (16)
+/**
+ * @brief A pin descriptor for init
+ */
+typedef struct {
+    const int pin;
+    const int func;
+    const bool is_output;
+    const int ext_phy_only;
+} usb_iopin_dsc_t;
 
-/** Maximum wait time for DS parameter decryption key. If overdue, then key error.
-    See TRM DS chapter for more details */
-#define DS_KEY_CHECK_MAX_WAIT_US (1100)
+extern const usb_iopin_dsc_t usb_periph_iopins[];
diff --git a/tools/sdk/esp32s2/include/spi_flash/include/esp_partition.h b/tools/sdk/esp32s2/include/spi_flash/include/esp_partition.h
index 24c1d3df..e59babb4 100644
--- a/tools/sdk/esp32s2/include/spi_flash/include/esp_partition.h
+++ b/tools/sdk/esp32s2/include/spi_flash/include/esp_partition.h
@@ -45,6 +45,8 @@ extern "C" {
 typedef enum {
     ESP_PARTITION_TYPE_APP = 0x00,       //!< Application partition type
     ESP_PARTITION_TYPE_DATA = 0x01,      //!< Data partition type
+
+    ESP_PARTITION_TYPE_ANY = 0xff,       //!< Used to search for partitions with any type
 } esp_partition_type_t;
 
 /**
@@ -123,7 +125,9 @@ typedef struct {
 /**
  * @brief Find partition based on one or more parameters
  *
- * @param type Partition type, one of esp_partition_type_t values or an 8-bit unsigned integer
+ * @param type Partition type, one of esp_partition_type_t values or an 8-bit unsigned integer.
+ *             To find all partitions, no matter the type, use ESP_PARTITION_TYPE_ANY, and set
+ *             subtype argument to ESP_PARTITION_SUBTYPE_ANY.
  * @param subtype Partition subtype, one of esp_partition_subtype_t values or an 8-bit unsigned integer.
  *                To find all partitions of given type, use ESP_PARTITION_SUBTYPE_ANY.
  * @param label (optional) Partition label. Set this value if looking
@@ -139,7 +143,9 @@ esp_partition_iterator_t esp_partition_find(esp_partition_type_t type, esp_parti
 /**
  * @brief Find first partition based on one or more parameters
  *
- * @param type Partition type, one of esp_partition_type_t values or an 8-bit unsigned integer
+ * @param type Partition type, one of esp_partition_type_t values or an 8-bit unsigned integer.
+ *             To find all partitions, no matter the type, use ESP_PARTITION_TYPE_ANY, and set
+ *             subtype argument to ESP_PARTITION_SUBTYPE_ANY.
  * @param subtype Partition subtype, one of esp_partition_subtype_t values or an 8-bit unsigned integer
  *                To find all partitions of given type, use ESP_PARTITION_SUBTYPE_ANY.
  * @param label (optional) Partition label. Set this value if looking
diff --git a/tools/sdk/esp32s2/include/spi_flash/include/spi_flash/spi_flash_defs.h b/tools/sdk/esp32s2/include/spi_flash/include/spi_flash/spi_flash_defs.h
new file mode 100644
index 00000000..cf26fda1
--- /dev/null
+++ b/tools/sdk/esp32s2/include/spi_flash/include/spi_flash/spi_flash_defs.h
@@ -0,0 +1,70 @@
+// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+/* SPI commands (actual on-wire commands not SPI controller bitmasks)
+   Suitable for use with spi_flash_hal_common_command static function.
+*/
+#define CMD_RDID       0x9F
+#define CMD_RDUID      0x4B   /* Read the flash unique ID*/
+#define CMD_WRSR       0x01
+#define  SR_WIP         (1<<0) /* Status register write-in-progress bit */
+#define  SR_WREN        (1<<1) /* Status register write enable bit */
+#define CMD_WRSR2      0x31 /* Not all SPI flash uses this command */
+#define CMD_WREN       0x06
+#define CMD_WRDI       0x04
+#define CMD_RDSR       0x05
+#define CMD_RDSR2      0x35 /* Not all SPI flash uses this command */
+#define CMD_RDSCUR     0x2B /* on specific(MXIC) board, read security register */
+#define CMD_RDFR       0x48 /* on specific(ISSI) board, read function register */
+
+#define CMD_FASTRD_QIO      0xEB
+#define CMD_FASTRD_QIO_4B   0xEC
+#define CMD_FASTRD_QUAD     0x6B
+#define CMD_FASTRD_QUAD_4B  0x6C
+#define CMD_FASTRD_DIO      0xBB
+#define CMD_FASTRD_DIO_4B   0xBC
+#define CMD_FASTRD_DUAL     0x3B
+#define CMD_FASTRD_DUAL_4B  0x3C
+#define CMD_FASTRD          0x0B
+#define CMD_FASTRD_4B       0x0C
+#define CMD_READ            0x03 /* Speed limited */
+#define CMD_READ_4B         0x13 /* Speed limited */
+
+#define CMD_CHIP_ERASE          0xC7
+#define CMD_SECTOR_ERASE        0x20
+#define CMD_SECTOR_ERASE_4B     0x21
+#define CMD_LARGE_BLOCK_ERASE   0xD8 /* 64KB block erase command */
+#define CMD_LARGE_BLOCK_ERASE_4B 0xDC /* 64KB block erase command */
+#define CMD_PROGRAM_PAGE        0x02
+#define CMD_PROGRAM_PAGE_4B     0x12
+#define CMD_SUSPEND             0x75
+#define CMD_RESUME              0x7A
+
+#define CMD_RST_EN      0x66
+#define CMD_RST_DEV     0x99
+
+#define SPI_FLASH_DIO_ADDR_BITLEN       24
+#define SPI_FLASH_DIO_DUMMY_BITLEN      4
+#define SPI_FLASH_QIO_ADDR_BITLEN       24
+#define SPI_FLASH_QIO_DUMMY_BITLEN      6
+#define SPI_FLASH_QOUT_ADDR_BITLEN      24
+#define SPI_FLASH_QOUT_DUMMY_BITLEN     8
+#define SPI_FLASH_DOUT_ADDR_BITLEN      24
+#define SPI_FLASH_DOUT_DUMMY_BITLEN     8
+#define SPI_FLASH_FASTRD_ADDR_BITLEN    24
+#define SPI_FLASH_FASTRD_DUMMY_BITLEN   8
+#define SPI_FLASH_SLOWRD_ADDR_BITLEN    24
+#define SPI_FLASH_SLOWRD_DUMMY_BITLEN   0
diff --git a/tools/sdk/esp32s2/include/ulp/include/esp32/ulp.h b/tools/sdk/esp32s2/include/ulp/include/esp32/ulp.h
index a3fc455f..e5d673a2 100644
--- a/tools/sdk/esp32s2/include/ulp/include/esp32/ulp.h
+++ b/tools/sdk/esp32s2/include/ulp/include/esp32/ulp.h
@@ -464,10 +464,11 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) {
  * reg_addr register and offset_ field (this offset is expressed in 32-bit words).
  * 32 bits written to RTC memory are built as follows:
  * - bits [31:21] hold the PC of current instruction, expressed in 32-bit words
- * - bits [20:16] = 5'b1
+ * - bits [20:18] = 3'b0
+ * - bits [17:16] reg_addr (0..3)
  * - bits [15:0] are assigned the contents of reg_val
  *
- * RTC_SLOW_MEM[addr + offset_] = { 5'b0, insn_PC[10:0], val[15:0] }
+ * RTC_SLOW_MEM[addr + offset_] = { insn_PC[10:0], 3'b0, reg_addr, reg_val[15:0] }
  */
 #define I_ST(reg_val, reg_addr, offset_) { .st = { \
     .dreg = reg_val, \
diff --git a/tools/sdk/esp32s2/include/ulp/include/esp32s2/ulp.h b/tools/sdk/esp32s2/include/ulp/include/esp32s2/ulp.h
index 07ae895e..04d38c45 100644
--- a/tools/sdk/esp32s2/include/ulp/include/esp32s2/ulp.h
+++ b/tools/sdk/esp32s2/include/ulp/include/esp32s2/ulp.h
@@ -430,10 +430,11 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) {
  * reg_addr register and offset_ field (this offset is expressed in 32-bit words).
  * 32 bits written to RTC memory are built as follows:
  * - bits [31:21] hold the PC of current instruction, expressed in 32-bit words
- * - bits [20:16] = 5'b1
+ * - bits [20:18] = 3'b0
+ * - bits [17:16] reg_addr (0..3)
  * - bits [15:0] are assigned the contents of reg_val
  *
- * RTC_SLOW_MEM[addr + offset_] = { 5'b0, insn_PC[10:0], val[15:0] }
+ * RTC_SLOW_MEM[addr + offset_] = { insn_PC[10:0], 3'b0, reg_addr, reg_val[15:0] }
  */
 #define I_ST(reg_val, reg_addr, offset_) { .st = { \
     .dreg = reg_val, \
diff --git a/tools/sdk/esp32s2/include/unity/include/unity_config.h b/tools/sdk/esp32s2/include/unity/include/unity_config.h
index 8ebd88f2..32f97190 100644
--- a/tools/sdk/esp32s2/include/unity/include/unity_config.h
+++ b/tools/sdk/esp32s2/include/unity/include/unity_config.h
@@ -21,13 +21,16 @@
 #define UNITY_EXCLUDE_DOUBLE
 #endif //CONFIG_UNITY_ENABLE_DOUBLE
 
+#ifdef CONFIG_UNITY_ENABLE_64BIT
+#define UNITY_SUPPORT_64
+#endif
+
 #ifdef CONFIG_UNITY_ENABLE_COLOR
 #define UNITY_OUTPUT_COLOR
 #endif
 
 #define UNITY_EXCLUDE_TIME_H
 
-
 void unity_flush(void);
 void unity_putc(int c);
 void unity_gets(char* dst, size_t len);
diff --git a/tools/sdk/esp32s2/include/unity/include/unity_fixture_extras.h b/tools/sdk/esp32s2/include/unity/include/unity_fixture_extras.h
index 2eeaec2e..c6ad8ba4 100644
--- a/tools/sdk/esp32s2/include/unity/include/unity_fixture_extras.h
+++ b/tools/sdk/esp32s2/include/unity/include/unity_fixture_extras.h
@@ -1,25 +1,78 @@
-/* IDF-specific additions to "Unity Fixture" */
+// Copyright 2016-2021 Espressif Systems (Shanghai) Co. Ltd.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/* IDF-specific additions to "Unity Fixture".
+ * This file doesn't need to be included directly, it gets included into unity.h
+ * through unity_config.h.
+ */
+
 #pragma once
 
-#ifndef CONFIG_IDF_TARGET
+#include "sdkconfig.h"
 
-/* A shorthand for running one test group from the main function */
-#define UNITY_MAIN(group_) do { \
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(CONFIG_IDF_TARGET) || defined(CONFIG_IDF_TARGET_LINUX)
+#define UNITY_MAYBE_EXIT(rc)  do { exit(rc); } while(0)
+#else
+#define UNITY_MAYBE_EXIT(rc)  do { (void) rc; } while(0)
+#endif
+
+/* A shorthand for running all tests called from one function "func_", from the app_main function.
+ * Use this when there is more than one test group.
+ *
+ * Example:
+ *
+ *    #include "unity.h"
+ *    #include "unity_fixture.h"
+ *
+ *    static_void run_all_tests(void) {
+ *        RUN_TEST_GROUP(group1);   // test group defined in another file, e.g. test_group1.c
+ *        RUN_TEST_GROUP(group2);   // test group defined in another file, e.g. test_group2.c
+ *    }
+ *
+ *    void app_main(void) {
+ *        UNITY_MAIN_FUNC(run_all_tests);
+ *    }
+ */
+#define UNITY_MAIN_FUNC(func_) do { \
     const char* argv[] = { "test", "-v" }; \
     const int argc = sizeof(argv)/sizeof(argv[0]); \
-    int rc = UnityMain(argc, argv, TEST_ ## group_ ## _GROUP_RUNNER); \
+    int rc = UnityMain(argc, argv, func_); \
     printf("\nTests finished, rc=%d\n", rc); \
-    exit(rc); \
+    UNITY_MAYBE_EXIT(rc); \
 } while(0)
 
-#else // CONFIG_IDF_TARGET
+/* A shorthand for running one test group from the app_main function, when there is only
+ * one test group and it is defined in the same file.
+ *
+ * Example:
+ *
+ *    #include "unity.h"
+ *    #include "unity_fixture.h"
+ *
+ *    TEST_GROUP(my_feature);
+ *    // also define TEST_SETUP, TEST_TEARDOWN, TESTs, TEST_GROUP_RUNNER
+ *
+ *    void app_main(void) {
+ *        UNITY_MAIN(my_feature);
+ *    }
+ */
+#define UNITY_MAIN(group_) UNITY_MAIN_FUNC(TEST_ ## group_ ## _GROUP_RUNNER)
 
-/* A shorthand for running one test group from the main function */
-#define UNITY_MAIN(group_) do { \
-    const char* argv[] = { "test", "-v" }; \
-    const int argc = sizeof(argv)/sizeof(argv[0]); \
-    int rc = UnityMain(argc, argv, TEST_ ## group_ ## _GROUP_RUNNER); \
-    printf("\nTests finished, rc=%d\n", rc); \
-} while(0)
-
-#endif // CONFIG_IDF_TARGET
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/vfs/include/esp_vfs.h b/tools/sdk/esp32s2/include/vfs/include/esp_vfs.h
index ddbabd97..7ba63645 100644
--- a/tools/sdk/esp32s2/include/vfs/include/esp_vfs.h
+++ b/tools/sdk/esp32s2/include/vfs/include/esp_vfs.h
@@ -325,6 +325,15 @@ esp_err_t esp_vfs_register_with_id(const esp_vfs_t *vfs, void *ctx, esp_vfs_id_t
  */
 esp_err_t esp_vfs_unregister(const char* base_path);
 
+/**
+ * Unregister a virtual filesystem with the given index
+ *
+ * @param vfs_id  The VFS ID returned by esp_vfs_register_with_id
+ * @return ESP_OK if successful, ESP_ERR_INVALID_STATE if VFS for the given index
+ *         hasn't been registered
+ */
+esp_err_t esp_vfs_unregister_with_id(esp_vfs_id_t vfs_id);
+
 /**
  * Special function for registering another file descriptor for a VFS registered
  * by esp_vfs_register_with_id.
@@ -338,6 +347,21 @@ esp_err_t esp_vfs_unregister(const char* base_path);
  */
 esp_err_t esp_vfs_register_fd(esp_vfs_id_t vfs_id, int *fd);
 
+/**
+ * Special function for registering another file descriptor with given local_fd
+ * for a VFS registered by esp_vfs_register_with_id.
+ *
+ * @param vfs_id VFS identificator returned by esp_vfs_register_with_id.
+ * @param local_fd The fd in the local vfs. Passing -1 will set the local fd as the (*fd) value.
+ * @param permanent Whether the fd should be treated as permannet (not removed after close())
+ * @param fd The registered file descriptor will be written to this address.
+ *
+ * @return  ESP_OK if the registration is successful,
+ *          ESP_ERR_NO_MEM if too many file descriptors are registered,
+ *          ESP_ERR_INVALID_ARG if the arguments are incorrect.
+ */
+esp_err_t esp_vfs_register_fd_with_local_fd(esp_vfs_id_t vfs_id, int local_fd, bool permanent, int *fd);
+
 /**
  * Special function for unregistering a file descriptor belonging to a VFS
  * registered by esp_vfs_register_with_id.
diff --git a/tools/sdk/esp32s2/include/vfs/include/esp_vfs_eventfd.h b/tools/sdk/esp32s2/include/vfs/include/esp_vfs_eventfd.h
new file mode 100644
index 00000000..43011211
--- /dev/null
+++ b/tools/sdk/esp32s2/include/vfs/include/esp_vfs_eventfd.h
@@ -0,0 +1,71 @@
+// Copyright 2021 Espressif Systems (Shanghai) CO LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License
+
+#pragma once
+
+#include <stddef.h>
+#include <sys/types.h>
+
+#include "esp_err.h"
+
+#define EFD_SUPPORT_ISR (1 << 4)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Eventfd vfs initialization settings
+ */
+typedef struct {
+    size_t max_fds;     /*!< The maxinum number of eventfds supported */
+} esp_vfs_eventfd_config_t;
+
+#define ESP_VFS_EVENTD_CONFIG_DEFAULT() (esp_vfs_eventfd_config_t) { \
+      .max_fds = 5, \
+};
+
+/**
+ * @brief  Registers the event vfs.
+ *
+ * @return  ESP_OK if successful, ESP_ERR_NO_MEM if too many VFSes are
+ *          registered.
+ */
+esp_err_t esp_vfs_eventfd_register(const esp_vfs_eventfd_config_t *config);
+
+/**
+ * @brief  Unregisters the event vfs.
+ *
+ * @return ESP_OK if successful, ESP_ERR_INVALID_STATE if VFS for given prefix
+ *         hasn't been registered
+ */
+esp_err_t esp_vfs_eventfd_unregister(void);
+
+/*
+ * @brief Creates an event file descirptor.
+ *
+ * The behavior of read, write and select is the same as man(2) eventfd with
+ * EFD_SEMAPHORE **NOT** specified. A new flag EFD_SUPPORT_ISR has been added.
+ * This flag is required to write to event fds in interrupt handlers. Accessing
+ * the control blocks of event fds with EFD_SUPPORT_ISR will cause interrupts to
+ * be temporarily blocked (e.g. during read, write and beginning and ending of
+ * the * select).
+ *
+ * @return The file descriptor if successful, -1 if error happens.
+ */
+int eventfd(unsigned int initval, int flags);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/vfs/include/esp_vfs_usb_serial_jtag.h b/tools/sdk/esp32s2/include/vfs/include/esp_vfs_usb_serial_jtag.h
new file mode 100644
index 00000000..54ff1f4e
--- /dev/null
+++ b/tools/sdk/esp32s2/include/vfs/include/esp_vfs_usb_serial_jtag.h
@@ -0,0 +1,66 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "esp_err.h"
+#include "esp_vfs.h"
+#include "esp_vfs_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief add /dev/usbserjtag virtual filesystem driver
+ *
+ * This function is called from startup code to enable console output
+ */
+esp_err_t esp_vfs_dev_usb_serial_jtag_register(void);
+
+/**
+ * @brief Set the line endings expected to be received
+ *
+ * This specifies the conversion between line endings received and
+ * newlines ('\n', LF) passed into stdin:
+ *
+ * - ESP_LINE_ENDINGS_CRLF: convert CRLF to LF
+ * - ESP_LINE_ENDINGS_CR: convert CR to LF
+ * - ESP_LINE_ENDINGS_LF: no modification
+ *
+ * @note this function is not thread safe w.r.t. reading
+ *
+ * @param mode line endings expected
+ */
+void esp_vfs_dev_usb_serial_jtag_set_rx_line_endings(esp_line_endings_t mode);
+
+/**
+ * @brief Set the line endings to sent
+ *
+ * This specifies the conversion between newlines ('\n', LF) on stdout and line
+ * endings sent:
+ *
+ * - ESP_LINE_ENDINGS_CRLF: convert LF to CRLF
+ * - ESP_LINE_ENDINGS_CR: convert LF to CR
+ * - ESP_LINE_ENDINGS_LF: no modification
+ *
+ * @note this function is not thread safe w.r.t. writing
+ *
+ * @param mode line endings to send
+ */
+void esp_vfs_dev_usb_serial_jtag_set_tx_line_endings(esp_line_endings_t mode);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/tools/sdk/esp32s2/include/wpa_supplicant/port/include/os.h b/tools/sdk/esp32s2/include/wpa_supplicant/port/include/os.h
index 66eea39d..74e1e349 100644
--- a/tools/sdk/esp32s2/include/wpa_supplicant/port/include/os.h
+++ b/tools/sdk/esp32s2/include/wpa_supplicant/port/include/os.h
@@ -19,6 +19,7 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include "esp_err.h"
+#include "supplicant_opt.h"
 
 typedef time_t os_time_t;
 
@@ -308,4 +309,27 @@ static inline void * os_realloc_array(void *ptr, size_t nmemb, size_t size)
 		return NULL;
 	return os_realloc(ptr, nmemb * size);
 }
+
+#ifdef USE_MBEDTLS_CRYPTO
+void forced_memzero(void *ptr, size_t len);
+#else
+/* Try to prevent most compilers from optimizing out clearing of memory that
+ * becomes unaccessible after this function is called. This is mostly the case
+ * for clearing local stack variables at the end of a function. This is not
+ * exactly perfect, i.e., someone could come up with a compiler that figures out
+ * the pointer is pointing to memset and then end up optimizing the call out, so
+ * try go a bit further by storing the first octet (now zero) to make this even
+ * a bit more difficult to optimize out. Once memset_s() is available, that
+ * could be used here instead. */
+static void * (* const volatile memset_func)(void *, int, size_t) = memset;
+static uint8_t forced_memzero_val;
+
+static inline void forced_memzero(void *ptr, size_t len)
+{
+	memset_func(ptr, 0, len);
+	if (len) {
+		forced_memzero_val = ((uint8_t *) ptr)[0];
+	}
+}
+#endif
 #endif /* OS_H */
diff --git a/tools/sdk/esp32s2/include/xtensa/include/xtensa/xtensa_api.h b/tools/sdk/esp32s2/include/xtensa/include/xtensa/xtensa_api.h
index 95501936..deef36f7 100644
--- a/tools/sdk/esp32s2/include/xtensa/include/xtensa/xtensa_api.h
+++ b/tools/sdk/esp32s2/include/xtensa/include/xtensa/xtensa_api.h
@@ -136,45 +136,4 @@ extern void * xt_get_interrupt_handler_arg(int n);
 */
 bool xt_int_has_handler(int intr, int cpu);
 
-/*
--------------------------------------------------------------------------------
-  Call this function to disable non iram located interrupts.
-
-    newmask       - mask containing the interrupts to disable.
--------------------------------------------------------------------------------
-*/
-static inline uint32_t xt_int_disable_mask(uint32_t newmask)
-{
-    uint32_t oldint;
-    asm volatile (
-        "movi %0,0\n"
-        "xsr %0,INTENABLE\n"    //disable all ints first
-        "rsync\n"
-        "and a3,%0,%1\n"        //mask ints that need disabling
-        "wsr a3,INTENABLE\n"    //write back
-        "rsync\n"
-        :"=&r"(oldint):"r"(newmask):"a3");
-
-    return oldint;
-}
-
-/*
--------------------------------------------------------------------------------
-  Call this function to enable non iram located interrupts.
-
-    newmask       - mask containing the interrupts to enable.
--------------------------------------------------------------------------------
-*/
-static inline void xt_int_enable_mask(uint32_t newmask)
-{
-    asm volatile (
-        "movi a3,0\n"
-        "xsr a3,INTENABLE\n"
-        "rsync\n"
-        "or a3,a3,%0\n"
-        "wsr a3,INTENABLE\n"
-        "rsync\n"
-        ::"r"(newmask):"a3");
-}
-
 #endif /* __XTENSA_API_H__ */
diff --git a/tools/sdk/esp32s2/ld/esp32s2.ld b/tools/sdk/esp32s2/ld/esp32s2.ld
index 2ae61149..668d6fce 100644
--- a/tools/sdk/esp32s2/ld/esp32s2.ld
+++ b/tools/sdk/esp32s2/ld/esp32s2.ld
@@ -136,3 +136,13 @@ REGION_ALIAS("rtc_data_location", rtc_data_seg );
 #else
   REGION_ALIAS("default_rodata_seg", dram0_0_seg);
 #endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
+
+
+/**
+ *  If rodata default segment is placed in `drom0_0_seg`, then flash's first rodata section must
+ *  also be first in the segment.
+ */
+#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
+  ASSERT(_rodata_reserved_start == ORIGIN(default_rodata_seg),
+         ".flash.appdesc section must be placed at the beginning of the rodata segment.")
+#endif
diff --git a/tools/sdk/esp32s2/ld/esp32s2.peripherals.ld b/tools/sdk/esp32s2/ld/esp32s2.peripherals.ld
index 512d840f..48aa0414 100644
--- a/tools/sdk/esp32s2/ld/esp32s2.peripherals.ld
+++ b/tools/sdk/esp32s2/ld/esp32s2.peripherals.ld
@@ -20,6 +20,7 @@ PROVIDE ( LEDC = 0x3f419000 );
 PROVIDE ( CP_DMA = 0x3f4c3000 );
 PROVIDE ( TIMERG0 = 0x3f41F000 );
 PROVIDE ( TIMERG1 = 0x3f420000 );
+PROVIDE ( SYSTIMER = 0x3f423000 );
 PROVIDE ( GPSPI2 = 0x3f424000 );
 PROVIDE ( GPSPI3 = 0x3f425000 );
 PROVIDE ( SYSCON = 0x3f426000 );
diff --git a/tools/sdk/esp32s2/ld/esp32s2.project.ld b/tools/sdk/esp32s2/ld/esp32s2.project.ld
index 3be79c31..70009a5c 100644
--- a/tools/sdk/esp32s2/ld/esp32s2.project.ld
+++ b/tools/sdk/esp32s2/ld/esp32s2.project.ld
@@ -196,6 +196,7 @@ SECTIONS
     *libesp_ringbuf.a:(.literal .literal.* .text .text.*)
     *libesp_system.a:esp_err.*(.literal .literal.* .text .text.*)
     *libesp_system.a:esp_system.*(.literal.esp_system_abort .text.esp_system_abort)
+    *libesp_system.a:ubsan.*(.literal .literal.* .text .text.*)
     *libfreertos.a:(EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal.* EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text.*)
     *libfreertos.a:port.*(.literal.pxPortInitialiseStack .literal.unlikely.vPortEndScheduler .literal.vApplicationStackOverflowHook .literal.vPortAssertIfInISR .literal.vPortEnterCritical .literal.vPortExitCritical .literal.vPortSetStackWatchpoint .literal.vPortYieldOtherCore .literal.xPortInIsrContext .literal.xPortStartScheduler .literal.xPortSysTickHandler .text .text.pxPortInitialiseStack .text.unlikely.vPortEndScheduler .text.vApplicationStackOverflowHook .text.vPortAssertIfInISR .text.vPortEnterCritical .text.vPortExitCritical .text.vPortSetStackWatchpoint .text.vPortYieldOtherCore .text.xPortGetTickRateHz .text.xPortInIsrContext .text.xPortStartScheduler .text.xPortSysTickHandler)
     *libfreertos.a:port_common.*(.literal.esp_startup_start_app_common .text .text.esp_startup_start_app_common)
@@ -206,6 +207,7 @@ SECTIONS
     *libhal.a:i2c_hal_iram.*(.literal .literal.* .text .text.*)
     *libhal.a:ledc_hal_iram.*(.literal .literal.* .text .text.*)
     *libhal.a:soc_hal.*(.literal .literal.* .text .text.*)
+    *libhal.a:spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*)
     *libhal.a:spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
     *libhal.a:spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
     *libhal.a:spi_hal_iram.*(.literal .literal.* .text .text.*)
@@ -236,6 +238,7 @@ SECTIONS
     *libspi_flash.a:spi_flash_rom_patch.*(.literal .literal.* .text .text.*)
     *libxt_hal.a:(.literal .literal.* .text .text.*)
     *libxtensa.a:eri.*(.literal .literal.* .text .text.*)
+    *libxtensa.a:xtensa_intr_asm.*(.literal .literal.* .text .text.*)
 
     /* added to maintain compability */
     _coredump_iram_start = 0;
@@ -289,12 +292,14 @@ SECTIONS
     *libesp_hw_support.a:regi2c_ctrl.*(.rodata .rodata.*)
     *libesp_hw_support.a:rtc_clk.*(.rodata .rodata.*)
     *libesp_system.a:esp_err.*(.rodata .rodata.*)
+    *libesp_system.a:ubsan.*(.rodata .rodata.*)
     *libgcc.a:_divsf3.*(.rodata .rodata.*)
     *libgcov.a:(.rodata .rodata.*)
     *libhal.a:cpu_hal.*(.rodata .rodata.*)
     *libhal.a:i2c_hal_iram.*(.rodata .rodata.*)
     *libhal.a:ledc_hal_iram.*(.rodata .rodata.*)
     *libhal.a:soc_hal.*(.rodata .rodata.*)
+    *libhal.a:spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
     *libhal.a:spi_flash_hal_gpspi.*(.rodata .rodata.*)
     *libhal.a:spi_flash_hal_iram.*(.rodata .rodata.*)
     *libhal.a:spi_hal_iram.*(.rodata .rodata.*)
@@ -348,8 +353,8 @@ SECTIONS
     *(.ext_ram.bss*)
 
     *(.bss .bss.*)
-    *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
     *(.ext_ram.bss .ext_ram.bss.*)
+    *(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
     *(COMMON)
     _bt_bss_start = ABSOLUTE(.);
     *libbt.a:(.bss .bss.* COMMON)
@@ -380,8 +385,7 @@ SECTIONS
     _bss_end = ABSOLUTE(.);
   } > dram0_0_seg
 
-  /* When modifying the alignment, update tls_section_alignment in pxPortInitialiseStack */
-  .flash.rodata : ALIGN(0x10)
+  .flash.appdesc : ALIGN(0x10)
   {
     _rodata_reserved_start = ABSOLUTE(.);
     _rodata_start = ABSOLUTE(.);
@@ -389,7 +393,17 @@ SECTIONS
     *(.rodata_desc .rodata_desc.*)               /* Should be the first.  App version info.        DO NOT PUT ANYTHING BEFORE IT! */
     *(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
 
-    *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata.*)
+    /* Create an empty gap within this section. Thanks to this, the end of this
+     * section will match .flah.rodata's begin address. Thus, both sections
+     * will be merged when creating the final bin image. */
+    . = ALIGN(ALIGNOF(.flash.rodata));
+  } >default_rodata_seg
+
+  .flash.rodata : ALIGN(0x10)
+  {
+    _flash_rodata_start = ABSOLUTE(.);
+
+    *(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata.*)
 
     *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
     *(.gnu.linkonce.r.*)
@@ -445,13 +459,15 @@ SECTIONS
     . = ALIGN(4);
   } >default_rodata_seg
 
+  _flash_rodata_align = ALIGNOF(.flash.rodata);
+
   .flash.text :
   {
     _stext = .;
     _instruction_reserved_start = ABSOLUTE(.);
     _text_start = ABSOLUTE(.);
 
-    *(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.*) .text.*)
+    *(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text.*)
     *(.wifi0iram .wifi0iram.*)
     *(.wifiorslpiram .wifiorslpiram.*)
     *(.wifirxiram .wifirxiram.*)
diff --git a/tools/sdk/esp32s2/ld/esp32s2_out.ld b/tools/sdk/esp32s2/ld/esp32s2_out.ld
index b9acc20c..e08fe50f 100644
--- a/tools/sdk/esp32s2/ld/esp32s2_out.ld
+++ b/tools/sdk/esp32s2/ld/esp32s2_out.ld
@@ -57,3 +57,9 @@ _data_seg_org = ORIGIN(rtc_data_seg);
 REGION_ALIAS("rtc_data_location", rtc_slow_seg );
   REGION_ALIAS("default_code_seg", iram0_2_seg);
   REGION_ALIAS("default_rodata_seg", drom0_0_seg);
+/**
+ *  If rodata default segment is placed in `drom0_0_seg`, then flash's first rodata section must
+ *  also be first in the segment.
+ */
+  ASSERT(_rodata_reserved_start == ORIGIN(default_rodata_seg),
+         ".flash.appdesc section must be placed at the beginning of the rodata segment.")
diff --git a/tools/sdk/esp32s2/lib/libapp_trace.a b/tools/sdk/esp32s2/lib/libapp_trace.a
index 958202c4..77834e42 100644
Binary files a/tools/sdk/esp32s2/lib/libapp_trace.a and b/tools/sdk/esp32s2/lib/libapp_trace.a differ
diff --git a/tools/sdk/esp32s2/lib/libapp_update.a b/tools/sdk/esp32s2/lib/libapp_update.a
index ba2ca13c..97a99244 100644
Binary files a/tools/sdk/esp32s2/lib/libapp_update.a and b/tools/sdk/esp32s2/lib/libapp_update.a differ
diff --git a/tools/sdk/esp32s2/lib/libarduino_tinyusb.a b/tools/sdk/esp32s2/lib/libarduino_tinyusb.a
index 1505ccc5..8024a82e 100644
Binary files a/tools/sdk/esp32s2/lib/libarduino_tinyusb.a and b/tools/sdk/esp32s2/lib/libarduino_tinyusb.a differ
diff --git a/tools/sdk/esp32s2/lib/libasio.a b/tools/sdk/esp32s2/lib/libasio.a
index 2c48108e..2af8e110 100644
Binary files a/tools/sdk/esp32s2/lib/libasio.a and b/tools/sdk/esp32s2/lib/libasio.a differ
diff --git a/tools/sdk/esp32s2/lib/libbootloader_support.a b/tools/sdk/esp32s2/lib/libbootloader_support.a
index b81ce686..c965c2a2 100644
Binary files a/tools/sdk/esp32s2/lib/libbootloader_support.a and b/tools/sdk/esp32s2/lib/libbootloader_support.a differ
diff --git a/tools/sdk/esp32s2/lib/libcbor.a b/tools/sdk/esp32s2/lib/libcbor.a
index 9fa3e0c9..7ff08049 100644
Binary files a/tools/sdk/esp32s2/lib/libcbor.a and b/tools/sdk/esp32s2/lib/libcbor.a differ
diff --git a/tools/sdk/esp32s2/lib/libcmock.a b/tools/sdk/esp32s2/lib/libcmock.a
index b9186cee..e89a1dca 100644
Binary files a/tools/sdk/esp32s2/lib/libcmock.a and b/tools/sdk/esp32s2/lib/libcmock.a differ
diff --git a/tools/sdk/esp32s2/lib/libcoap.a b/tools/sdk/esp32s2/lib/libcoap.a
index 6ffea84e..bba4d760 100644
Binary files a/tools/sdk/esp32s2/lib/libcoap.a and b/tools/sdk/esp32s2/lib/libcoap.a differ
diff --git a/tools/sdk/esp32s2/lib/libcoexist.a b/tools/sdk/esp32s2/lib/libcoexist.a
index f5072249..5f16879e 100644
Binary files a/tools/sdk/esp32s2/lib/libcoexist.a and b/tools/sdk/esp32s2/lib/libcoexist.a differ
diff --git a/tools/sdk/esp32s2/lib/libconsole.a b/tools/sdk/esp32s2/lib/libconsole.a
index 2bd82b0e..c08cbbe6 100644
Binary files a/tools/sdk/esp32s2/lib/libconsole.a and b/tools/sdk/esp32s2/lib/libconsole.a differ
diff --git a/tools/sdk/esp32s2/lib/libcore.a b/tools/sdk/esp32s2/lib/libcore.a
index 901f8dda..1136cb25 100644
Binary files a/tools/sdk/esp32s2/lib/libcore.a and b/tools/sdk/esp32s2/lib/libcore.a differ
diff --git a/tools/sdk/esp32s2/lib/libcxx.a b/tools/sdk/esp32s2/lib/libcxx.a
index 780b93ba..53d66430 100644
Binary files a/tools/sdk/esp32s2/lib/libcxx.a and b/tools/sdk/esp32s2/lib/libcxx.a differ
diff --git a/tools/sdk/esp32s2/lib/libdriver.a b/tools/sdk/esp32s2/lib/libdriver.a
index e6191512..bb6c886e 100644
Binary files a/tools/sdk/esp32s2/lib/libdriver.a and b/tools/sdk/esp32s2/lib/libdriver.a differ
diff --git a/tools/sdk/esp32s2/lib/libefuse.a b/tools/sdk/esp32s2/lib/libefuse.a
index 17f2a6c9..4719778b 100644
Binary files a/tools/sdk/esp32s2/lib/libefuse.a and b/tools/sdk/esp32s2/lib/libefuse.a differ
diff --git a/tools/sdk/esp32s2/lib/libesp-dsp.a b/tools/sdk/esp32s2/lib/libesp-dsp.a
index 0dbc2195..19ec6948 100644
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diff --git a/tools/sdk/esp32s2/sdkconfig b/tools/sdk/esp32s2/sdkconfig
index a3a9bfb9..19434099 100644
--- a/tools/sdk/esp32s2/sdkconfig
+++ b/tools/sdk/esp32s2/sdkconfig
@@ -127,6 +127,7 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=115200
 # Partition Table
 #
 CONFIG_PARTITION_TABLE_SINGLE_APP=y
+# CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE is not set
 # CONFIG_PARTITION_TABLE_TWO_OTA is not set
 # CONFIG_PARTITION_TABLE_CUSTOM is not set
 CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
@@ -206,18 +207,11 @@ CONFIG_TINYUSB_MSC_BUFSIZE=512
 #
 # Human Interface (HID) driver
 #
-CONFIG_USB_HID_ENABLED=y
+CONFIG_TINYUSB_HID_ENABLED=y
+CONFIG_TINYUSB_DESC_HID_STRING="Espressif HID Device"
+CONFIG_TINYUSB_HID_BUFSIZE=64
 # end of Human Interface (HID) driver
 
-#
-# MIDI driver
-#
-CONFIG_TINYUSB_MIDI_ENABLED=y
-CONFIG_TINYUSB_DESC_MIDI_STRING="Espressif MIDI Device"
-CONFIG_TINYUSB_MIDI_RX_BUFSIZE=64
-CONFIG_TINYUSB_MIDI_TX_BUFSIZE=64
-# end of MIDI driver
-
 #
 # DFU Runtime driver
 #
@@ -474,6 +468,7 @@ CONFIG_ETH_ENABLED=y
 CONFIG_ETH_USE_SPI_ETHERNET=y
 CONFIG_ETH_SPI_ETHERNET_DM9051=y
 CONFIG_ETH_SPI_ETHERNET_W5500=y
+# CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL is not set
 # CONFIG_ETH_USE_OPENETH is not set
 # end of Ethernet
 
@@ -541,6 +536,11 @@ CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES=2
 # end of Sleep Config
 # end of Hardware Settings
 
+#
+# LCD and Touch Panel
+#
+# end of LCD and Touch Panel
+
 #
 # ESP NETIF Adapter
 #
@@ -633,9 +633,8 @@ CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32
 # CONFIG_ESP32_WIFI_IRAM_OPT is not set
 # CONFIG_ESP32_WIFI_RX_IRAM_OPT is not set
 # CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE is not set
-CONFIG_ESP_WIFI_FTM_INITIATOR_SUPPORT=y
-# CONFIG_ESP_WIFI_FTM_REPORT_LOG_ENABLE is not set
-CONFIG_ESP_WIFI_FTM_RESPONDER_SUPPORT=y
+# CONFIG_ESP_WIFI_SLP_IRAM_OPT is not set
+# CONFIG_ESP_WIFI_FTM_ENABLE is not set
 # CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE is not set
 # end of Wi-Fi
 
@@ -796,6 +795,12 @@ CONFIG_LOG_DEFAULT_LEVEL_ERROR=y
 # CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set
 # CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set
 CONFIG_LOG_DEFAULT_LEVEL=1
+CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT=y
+# CONFIG_LOG_MAXIMUM_LEVEL_WARN is not set
+# CONFIG_LOG_MAXIMUM_LEVEL_INFO is not set
+# CONFIG_LOG_MAXIMUM_LEVEL_DEBUG is not set
+# CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE is not set
+CONFIG_LOG_MAXIMUM_LEVEL=1
 # CONFIG_LOG_COLORS is not set
 CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y
 # CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set
@@ -828,6 +833,7 @@ CONFIG_LWIP_ESP_GRATUITOUS_ARP=y
 CONFIG_LWIP_GARP_TMR_INTERVAL=60
 CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32
 # CONFIG_LWIP_DHCP_DOES_ARP_CHECK is not set
+# CONFIG_LWIP_DHCP_DISABLE_CLIENT_ID is not set
 CONFIG_LWIP_DHCP_RESTORE_LAST_IP=y
 
 #
@@ -840,6 +846,9 @@ CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8
 # CONFIG_LWIP_AUTOIP is not set
 CONFIG_LWIP_IPV6=y
 # CONFIG_LWIP_IPV6_AUTOCONFIG is not set
+CONFIG_LWIP_IPV6_NUM_ADDRESSES=3
+# CONFIG_LWIP_IPV6_FORWARD is not set
+# CONFIG_LWIP_NETIF_STATUS_CALLBACK is not set
 CONFIG_LWIP_NETIF_LOOPBACK=y
 CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8
 
@@ -930,6 +939,9 @@ CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT=y
 CONFIG_LWIP_HOOK_IP6_ROUTE_NONE=y
 # CONFIG_LWIP_HOOK_IP6_ROUTE_DEFAULT is not set
 # CONFIG_LWIP_HOOK_IP6_ROUTE_CUSTOM is not set
+CONFIG_LWIP_HOOK_ND6_GET_GW_NONE=y
+# CONFIG_LWIP_HOOK_ND6_GET_GW_DEFAULT is not set
+# CONFIG_LWIP_HOOK_ND6_GET_GW_CUSTOM is not set
 CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE=y
 # CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_DEFAULT is not set
 # CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_CUSTOM is not set
@@ -942,6 +954,7 @@ CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE=y
 # mbedTLS
 #
 CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y
+# CONFIG_MBEDTLS_EXTERNAL_MEM_ALLOC is not set
 # CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC is not set
 # CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set
 CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN=16384
@@ -966,6 +979,7 @@ CONFIG_MBEDTLS_AES_USE_INTERRUPT=y
 CONFIG_MBEDTLS_HARDWARE_GCM=y
 # CONFIG_MBEDTLS_HARDWARE_MPI is not set
 # CONFIG_MBEDTLS_HARDWARE_SHA is not set
+CONFIG_MBEDTLS_ROM_MD5=y
 # CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set
 # CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set
 CONFIG_MBEDTLS_HAVE_TIME=y
@@ -1020,6 +1034,7 @@ CONFIG_MBEDTLS_RC4_DISABLED=y
 # CONFIG_MBEDTLS_XTEA_C is not set
 CONFIG_MBEDTLS_CCM_C=y
 CONFIG_MBEDTLS_GCM_C=y
+# CONFIG_MBEDTLS_NIST_KW_C is not set
 # end of Symmetric Ciphers
 
 # CONFIG_MBEDTLS_RIPEMD160_C is not set
@@ -1145,6 +1160,7 @@ CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=2
 CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=4096
 # CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set
 # CONFIG_SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED is not set
+# CONFIG_SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST is not set
 
 #
 # Auto-detect flash chips
@@ -1212,6 +1228,7 @@ CONFIG_WS_BUFFER_SIZE=1024
 #
 CONFIG_UNITY_ENABLE_FLOAT=y
 CONFIG_UNITY_ENABLE_DOUBLE=y
+# CONFIG_UNITY_ENABLE_64BIT is not set
 # CONFIG_UNITY_ENABLE_COLOR is not set
 CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER=y
 # CONFIG_UNITY_ENABLE_FIXTURE is not set
@@ -1308,6 +1325,22 @@ CONFIG_HP_NANO1=y
 # end of Pose Estimation
 # end of ESP-FACE Configuration
 
+#
+# Camera configuration
+#
+CONFIG_OV7670_SUPPORT=y
+# CONFIG_OV7725_SUPPORT is not set
+CONFIG_NT99141_SUPPORT=y
+CONFIG_OV2640_SUPPORT=y
+CONFIG_OV3660_SUPPORT=y
+CONFIG_OV5640_SUPPORT=y
+# CONFIG_SCCB_HARDWARE_I2C_PORT0 is not set
+CONFIG_SCCB_HARDWARE_I2C_PORT1=y
+CONFIG_CAMERA_CORE0=y
+# CONFIG_CAMERA_CORE1 is not set
+# CONFIG_CAMERA_NO_AFFINITY is not set
+# end of Camera configuration
+
 #
 # LittleFS
 #