CPU and APB Frequency support (#2220)
* Add support to HAL for APB frequencies different than 80MHz * Add support for CPU frequencies in the IDE board menu * Switch to fast set_config * Add method to uart so debug can be reassigned after apb frequency switch * Return real APB frequency
This commit is contained in:
parent
1628f533a1
commit
c827bb4177
30
boards.txt
30
boards.txt
@ -1,4 +1,5 @@
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menu.UploadSpeed=Upload Speed
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menu.UploadSpeed=Upload Speed
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menu.CPUFreq=CPU Frequency
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menu.FlashFreq=Flash Frequency
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menu.FlashFreq=Flash Frequency
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menu.FlashMode=Flash Mode
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menu.FlashMode=Flash Mode
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menu.FlashSize=Flash Size
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menu.FlashSize=Flash Size
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@ -49,6 +50,35 @@ esp32.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
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esp32.menu.PartitionScheme.fatflash=16M Fat
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esp32.menu.PartitionScheme.fatflash=16M Fat
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esp32.menu.PartitionScheme.fatflash.build.partitions=ffat
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esp32.menu.PartitionScheme.fatflash.build.partitions=ffat
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esp32.menu.CPUFreq.240=240MHz
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esp32.menu.CPUFreq.240.build.f_cpu=240000000L
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esp32.menu.CPUFreq.160=160MHz
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esp32.menu.CPUFreq.160.build.f_cpu=160000000L
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esp32.menu.CPUFreq.80=80MHz
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esp32.menu.CPUFreq.80.build.f_cpu=80000000L
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esp32.menu.CPUFreq.40=40MHz (40MHz XTAL)
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esp32.menu.CPUFreq.40.build.f_cpu=40000000L
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esp32.menu.CPUFreq.26=26MHz (26MHz XTAL)
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esp32.menu.CPUFreq.26.build.f_cpu=26000000L
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esp32.menu.CPUFreq.20=20MHz (40MHz XTAL)
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esp32.menu.CPUFreq.20.build.f_cpu=20000000L
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esp32.menu.CPUFreq.13=13MHz
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esp32.menu.CPUFreq.13.build.f_cpu=13000000L
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esp32.menu.CPUFreq.10=10MHz (40MHz XTAL)
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esp32.menu.CPUFreq.10.build.f_cpu=10000000L
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esp32.menu.CPUFreq.8=8MHz (40MHz XTAL)
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esp32.menu.CPUFreq.8.build.f_cpu=8000000L
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esp32.menu.CPUFreq.5=5MHz
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esp32.menu.CPUFreq.5.build.f_cpu=5000000L
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esp32.menu.CPUFreq.4=4MHz
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esp32.menu.CPUFreq.4.build.f_cpu=4000000L
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esp32.menu.CPUFreq.3=3MHz
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esp32.menu.CPUFreq.3.build.f_cpu=3000000L
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esp32.menu.CPUFreq.2=2MHz
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esp32.menu.CPUFreq.2.build.f_cpu=2000000L
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esp32.menu.CPUFreq.1=1MHz
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esp32.menu.CPUFreq.1.build.f_cpu=1000000L
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esp32.menu.FlashMode.qio=QIO
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esp32.menu.FlashMode.qio=QIO
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esp32.menu.FlashMode.qio.build.flash_mode=dio
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esp32.menu.FlashMode.qio.build.flash_mode=dio
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esp32.menu.FlashMode.qio.build.boot=qio
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esp32.menu.FlashMode.qio.build.boot=qio
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@ -1611,7 +1611,7 @@ i2c_err_t i2cSetFrequency(i2c_t * i2c, uint32_t clk_speed)
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}
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}
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I2C_FIFO_CONF_t f;
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I2C_FIFO_CONF_t f;
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uint32_t period = (APB_CLK_FREQ/clk_speed) / 2;
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uint32_t period = (getApbFrequency()/clk_speed) / 2;
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uint32_t halfPeriod = period/2;
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uint32_t halfPeriod = period/2;
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uint32_t quarterPeriod = period/4;
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uint32_t quarterPeriod = period/4;
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@ -1657,7 +1657,7 @@ uint32_t i2cGetFrequency(i2c_t * i2c)
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uint32_t result = 0;
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uint32_t result = 0;
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uint32_t old_count = (i2c->dev->scl_low_period.period+i2c->dev->scl_high_period.period);
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uint32_t old_count = (i2c->dev->scl_low_period.period+i2c->dev->scl_high_period.period);
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if(old_count>0) {
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if(old_count>0) {
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result = APB_CLK_FREQ / old_count;
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result = getApbFrequency() / old_count;
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} else {
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} else {
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result = 0;
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result = 0;
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}
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}
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@ -84,7 +84,7 @@ static void _ledcSetupTimer(uint8_t chan, uint32_t div_num, uint8_t bit_num, boo
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//max bit_num 0x1F (31)
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//max bit_num 0x1F (31)
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static double _ledcSetupTimerFreq(uint8_t chan, double freq, uint8_t bit_num)
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static double _ledcSetupTimerFreq(uint8_t chan, double freq, uint8_t bit_num)
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{
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{
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uint64_t clk_freq = APB_CLK_FREQ;
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uint64_t clk_freq = getApbFrequency();
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clk_freq <<= 8;//div_num is 8 bit decimal
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clk_freq <<= 8;//div_num is 8 bit decimal
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uint32_t div_num = (clk_freq >> bit_num) / freq;
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uint32_t div_num = (clk_freq >> bit_num) / freq;
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bool apb_clk = true;
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bool apb_clk = true;
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@ -117,7 +117,7 @@ static double _ledcTimerRead(uint8_t chan)
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LEDC_MUTEX_UNLOCK();
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LEDC_MUTEX_UNLOCK();
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uint64_t clk_freq = 1000000;
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uint64_t clk_freq = 1000000;
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if(apb_clk) {
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if(apb_clk) {
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clk_freq *= 80;
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clk_freq = getApbFrequency();
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}
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}
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clk_freq <<= 8;//div_num is 8 bit decimal
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clk_freq <<= 8;//div_num is 8 bit decimal
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return (clk_freq >> bit_num) / (double)div_num;
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return (clk_freq >> bit_num) / (double)div_num;
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@ -26,6 +26,8 @@
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#endif //CONFIG_BT_ENABLED
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#endif //CONFIG_BT_ENABLED
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#include <sys/time.h>
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#include <sys/time.h>
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#include "soc/rtc.h"
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#include "soc/rtc.h"
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#include "soc/rtc_cntl_reg.h"
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#include "rom/rtc.h"
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#include "esp32-hal.h"
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#include "esp32-hal.h"
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//Undocumented!!! Get chip temperature in Farenheit
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//Undocumented!!! Get chip temperature in Farenheit
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@ -42,31 +44,47 @@ void yield()
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vPortYield();
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vPortYield();
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}
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}
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static uint32_t _cpu_freq_mhz = 240;
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static uint32_t _cpu_freq_mhz = CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ;
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static uint32_t _sys_time_multiplier = 1;
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bool cpuFrequencySet(uint32_t cpu_freq_mhz){
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bool setCpuFrequency(uint32_t cpu_freq_mhz){
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if(_cpu_freq_mhz == cpu_freq_mhz){
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rtc_cpu_freq_config_t conf, cconf;
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rtc_clk_cpu_freq_get_config(&cconf);
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if(cconf.freq_mhz == cpu_freq_mhz && _cpu_freq_mhz == cpu_freq_mhz){
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return true;
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return true;
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}
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}
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rtc_cpu_freq_config_t conf;
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if(!rtc_clk_cpu_freq_mhz_to_config(cpu_freq_mhz, &conf)){
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if(!rtc_clk_cpu_freq_mhz_to_config(cpu_freq_mhz, &conf)){
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log_e("CPU clock could not be set to %u MHz", cpu_freq_mhz);
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log_e("CPU clock could not be set to %u MHz", cpu_freq_mhz);
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return false;
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return false;
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}
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}
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rtc_clk_cpu_freq_set_config(&conf);
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#if ARDUHAL_LOG_LEVEL >= ARDUHAL_LOG_LEVEL_INFO
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log_i("%s: %u / %u = %u Mhz", (conf.source == RTC_CPU_FREQ_SRC_PLL)?"PLL":((conf.source == RTC_CPU_FREQ_SRC_APLL)?"APLL":((conf.source == RTC_CPU_FREQ_SRC_XTAL)?"XTAL":"8M")), conf.source_freq_mhz, conf.div, conf.freq_mhz);
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delay(10);
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#endif
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rtc_clk_cpu_freq_set_config_fast(&conf);
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_cpu_freq_mhz = conf.freq_mhz;
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_cpu_freq_mhz = conf.freq_mhz;
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_sys_time_multiplier = 80 / getApbFrequency();
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return true;
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return true;
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}
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}
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uint32_t cpuFrequencyGet(){
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uint32_t getCpuFrequency(){
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rtc_cpu_freq_config_t conf;
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rtc_cpu_freq_config_t conf;
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rtc_clk_cpu_freq_get_config(&conf);
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rtc_clk_cpu_freq_get_config(&conf);
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return conf.freq_mhz;
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return conf.freq_mhz;
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}
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}
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uint32_t getApbFrequency(){
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rtc_cpu_freq_config_t conf;
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rtc_clk_cpu_freq_get_config(&conf);
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if(conf.freq_mhz >= 80){
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return 80000000;
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}
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return (conf.source_freq_mhz * 1000000) / conf.div;
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}
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unsigned long IRAM_ATTR micros()
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unsigned long IRAM_ATTR micros()
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{
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{
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return (unsigned long) ((esp_timer_get_time() * 240) / _cpu_freq_mhz);
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return (unsigned long) (esp_timer_get_time()) * _sys_time_multiplier;
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}
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}
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unsigned long IRAM_ATTR millis()
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unsigned long IRAM_ATTR millis()
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@ -109,6 +127,9 @@ bool btInUse(){ return false; }
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void initArduino()
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void initArduino()
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{
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{
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#ifdef F_CPU
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setCpuFrequency(F_CPU/1000000L);
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#endif
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#if CONFIG_SPIRAM_SUPPORT
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#if CONFIG_SPIRAM_SUPPORT
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psramInit();
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psramInit();
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#endif
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#endif
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@ -43,7 +43,8 @@ uint32_t sigmaDeltaSetup(uint8_t channel, uint32_t freq) //chan 0-7 freq 1220-31
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_sd_sys_lock = xSemaphoreCreateMutex();
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_sd_sys_lock = xSemaphoreCreateMutex();
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}
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}
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#endif
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#endif
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uint32_t prescale = (10000000/(freq*32)) - 1;
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uint32_t apb_freq = getApbFrequency();
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uint32_t prescale = (apb_freq/(freq*256)) - 1;
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if(prescale > 0xFF) {
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if(prescale > 0xFF) {
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prescale = 0xFF;
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prescale = 0xFF;
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}
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}
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@ -52,7 +53,7 @@ uint32_t sigmaDeltaSetup(uint8_t channel, uint32_t freq) //chan 0-7 freq 1220-31
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SIGMADELTA.cg.clk_en = 0;
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SIGMADELTA.cg.clk_en = 0;
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SIGMADELTA.cg.clk_en = 1;
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SIGMADELTA.cg.clk_en = 1;
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SD_MUTEX_UNLOCK();
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SD_MUTEX_UNLOCK();
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return 10000000/((prescale + 1) * 32);
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return apb_freq/((prescale + 1) * 256);
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}
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}
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void sigmaDeltaWrite(uint8_t channel, uint8_t duty) //chan 0-7 duty 8 bit
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void sigmaDeltaWrite(uint8_t channel, uint8_t duty) //chan 0-7 duty 8 bit
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@ -26,6 +26,7 @@
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#include "soc/io_mux_reg.h"
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#include "soc/io_mux_reg.h"
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#include "soc/gpio_sig_map.h"
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#include "soc/gpio_sig_map.h"
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#include "soc/dport_reg.h"
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#include "soc/dport_reg.h"
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#include "soc/rtc.h"
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#define SPI_CLK_IDX(p) ((p==0)?SPICLK_OUT_IDX:((p==1)?SPICLK_OUT_IDX:((p==2)?HSPICLK_OUT_IDX:((p==3)?VSPICLK_OUT_IDX:0))))
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#define SPI_CLK_IDX(p) ((p==0)?SPICLK_OUT_IDX:((p==1)?SPICLK_OUT_IDX:((p==2)?HSPICLK_OUT_IDX:((p==3)?VSPICLK_OUT_IDX:0))))
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#define SPI_MISO_IDX(p) ((p==0)?SPIQ_OUT_IDX:((p==1)?SPIQ_OUT_IDX:((p==2)?HSPIQ_OUT_IDX:((p==3)?VSPIQ_OUT_IDX:0))))
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#define SPI_MISO_IDX(p) ((p==0)?SPIQ_OUT_IDX:((p==1)?SPIQ_OUT_IDX:((p==2)?HSPIQ_OUT_IDX:((p==3)?VSPIQ_OUT_IDX:0))))
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@ -750,7 +751,7 @@ void spiEndTransaction(spi_t * spi)
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SPI_MUTEX_UNLOCK();
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SPI_MUTEX_UNLOCK();
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}
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}
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void spiWriteByteNL(spi_t * spi, uint8_t data)
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void IRAM_ATTR spiWriteByteNL(spi_t * spi, uint8_t data)
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{
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{
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if(!spi) {
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if(!spi) {
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return;
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return;
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@ -776,7 +777,7 @@ uint8_t spiTransferByteNL(spi_t * spi, uint8_t data)
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return data;
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return data;
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}
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}
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void spiWriteShortNL(spi_t * spi, uint16_t data)
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void IRAM_ATTR spiWriteShortNL(spi_t * spi, uint16_t data)
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{
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{
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if(!spi) {
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if(!spi) {
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return;
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return;
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@ -811,7 +812,7 @@ uint16_t spiTransferShortNL(spi_t * spi, uint16_t data)
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return data;
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return data;
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}
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}
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void spiWriteLongNL(spi_t * spi, uint32_t data)
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void IRAM_ATTR spiWriteLongNL(spi_t * spi, uint32_t data)
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{
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{
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if(!spi) {
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if(!spi) {
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return;
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return;
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@ -959,7 +960,7 @@ void spiTransferBitsNL(spi_t * spi, uint32_t data, uint32_t * out, uint8_t bits)
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}
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}
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}
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}
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void spiWritePixelsNL(spi_t * spi, const void * data_in, size_t len){
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void IRAM_ATTR spiWritePixelsNL(spi_t * spi, const void * data_in, size_t len){
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size_t longs = len >> 2;
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size_t longs = len >> 2;
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if(len & 3){
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if(len & 3){
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longs++;
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longs++;
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@ -1017,18 +1018,20 @@ typedef union {
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};
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};
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} spiClk_t;
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} spiClk_t;
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#define ClkRegToFreq(reg) (CPU_CLK_FREQ / (((reg)->regPre + 1) * ((reg)->regN + 1)))
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#define ClkRegToFreq(reg) (apb_freq / (((reg)->regPre + 1) * ((reg)->regN + 1)))
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uint32_t spiClockDivToFrequency(uint32_t clockDiv)
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uint32_t spiClockDivToFrequency(uint32_t clockDiv)
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{
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{
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uint32_t apb_freq = getApbFrequency();
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spiClk_t reg = { clockDiv };
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spiClk_t reg = { clockDiv };
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return ClkRegToFreq(®);
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return ClkRegToFreq(®);
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}
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}
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uint32_t spiFrequencyToClockDiv(uint32_t freq)
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uint32_t spiFrequencyToClockDiv(uint32_t freq)
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{
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{
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uint32_t apb_freq = getApbFrequency();
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if(freq >= CPU_CLK_FREQ) {
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if(freq >= apb_freq) {
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return SPI_CLK_EQU_SYSCLK;
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return SPI_CLK_EQU_SYSCLK;
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}
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}
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@ -1051,7 +1054,7 @@ uint32_t spiFrequencyToClockDiv(uint32_t freq)
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reg.regN = calN;
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reg.regN = calN;
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while(calPreVari++ <= 1) {
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while(calPreVari++ <= 1) {
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calPre = (((CPU_CLK_FREQ / (reg.regN + 1)) / freq) - 1) + calPreVari;
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calPre = (((apb_freq / (reg.regN + 1)) / freq) - 1) + calPreVari;
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if(calPre > 0x1FFF) {
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if(calPre > 0x1FFF) {
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reg.regPre = 0x1FFF;
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reg.regPre = 0x1FFF;
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} else if(calPre <= 0) {
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} else if(calPre <= 0) {
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@ -84,7 +84,7 @@ void IRAM_ATTR __timerISR(void * arg){
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i = 4;
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i = 4;
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//call callbacks
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//call callbacks
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while(i--){
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while(i--){
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if(__timerInterruptHandlers[i] && status & (1 << i)){
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if(__timerInterruptHandlers[i] && (status & (1 << i))){
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__timerInterruptHandlers[i]();
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__timerInterruptHandlers[i]();
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}
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}
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}
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}
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@ -27,6 +27,7 @@
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#include "soc/io_mux_reg.h"
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#include "soc/io_mux_reg.h"
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#include "soc/gpio_sig_map.h"
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#include "soc/gpio_sig_map.h"
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#include "soc/dport_reg.h"
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#include "soc/dport_reg.h"
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#include "soc/rtc.h"
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#include "esp_intr_alloc.h"
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#include "esp_intr_alloc.h"
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#define UART_REG_BASE(u) ((u==0)?DR_REG_UART_BASE:( (u==1)?DR_REG_UART1_BASE:( (u==2)?DR_REG_UART2_BASE:0)))
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#define UART_REG_BASE(u) ((u==0)?DR_REG_UART_BASE:( (u==1)?DR_REG_UART1_BASE:( (u==2)?DR_REG_UART2_BASE:0)))
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@ -352,7 +353,7 @@ void uartSetBaudRate(uart_t* uart, uint32_t baud_rate)
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return;
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return;
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}
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}
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UART_MUTEX_LOCK();
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UART_MUTEX_LOCK();
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uint32_t clk_div = ((UART_CLK_FREQ<<4)/baud_rate);
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uint32_t clk_div = ((getApbFrequency()<<4)/baud_rate);
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uart->dev->clk_div.div_int = clk_div>>4 ;
|
uart->dev->clk_div.div_int = clk_div>>4 ;
|
||||||
uart->dev->clk_div.div_frag = clk_div & 0xf;
|
uart->dev->clk_div.div_frag = clk_div & 0xf;
|
||||||
UART_MUTEX_UNLOCK();
|
UART_MUTEX_UNLOCK();
|
||||||
@ -385,17 +386,8 @@ static void IRAM_ATTR uart2_write_char(char c)
|
|||||||
ESP_REG(DR_REG_UART2_BASE) = c;
|
ESP_REG(DR_REG_UART2_BASE) = c;
|
||||||
}
|
}
|
||||||
|
|
||||||
void uartSetDebug(uart_t* uart)
|
void uart_install_putc()
|
||||||
{
|
{
|
||||||
if(uart == NULL || uart->num > 2) {
|
|
||||||
s_uart_debug_nr = -1;
|
|
||||||
ets_install_putc1(NULL);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
if(s_uart_debug_nr == uart->num) {
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
s_uart_debug_nr = uart->num;
|
|
||||||
switch(s_uart_debug_nr) {
|
switch(s_uart_debug_nr) {
|
||||||
case 0:
|
case 0:
|
||||||
ets_install_putc1((void (*)(char)) &uart0_write_char);
|
ets_install_putc1((void (*)(char)) &uart0_write_char);
|
||||||
@ -412,6 +404,20 @@ void uartSetDebug(uart_t* uart)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void uartSetDebug(uart_t* uart)
|
||||||
|
{
|
||||||
|
if(uart == NULL || uart->num > 2) {
|
||||||
|
s_uart_debug_nr = -1;
|
||||||
|
//ets_install_putc1(NULL);
|
||||||
|
//return;
|
||||||
|
} else
|
||||||
|
if(s_uart_debug_nr == uart->num) {
|
||||||
|
return;
|
||||||
|
} else
|
||||||
|
s_uart_debug_nr = uart->num;
|
||||||
|
uart_install_putc();
|
||||||
|
}
|
||||||
|
|
||||||
int uartGetDebug()
|
int uartGetDebug()
|
||||||
{
|
{
|
||||||
return s_uart_debug_nr;
|
return s_uart_debug_nr;
|
||||||
|
@ -72,8 +72,14 @@ void yield(void);
|
|||||||
//returns chip temperature in Celsius
|
//returns chip temperature in Celsius
|
||||||
float temperatureRead();
|
float temperatureRead();
|
||||||
|
|
||||||
bool cpuFrequencySet(uint32_t cpu_freq_mhz);
|
//function takes the following frequencies as valid values:
|
||||||
uint32_t cpuFrequencyGet();
|
// 240, 160, 80 <<< For all XTAL types
|
||||||
|
// 40, 20, 13, 10, 8, 5, 4, 3, 2, 1 <<< For 40MHz XTAL
|
||||||
|
// 26, 13, 5, 4, 3, 2, 1 <<< For 26MHz XTAL
|
||||||
|
// 24, 12, 8, 6, 4, 3, 2, 1 <<< For 24MHz XTAL
|
||||||
|
bool setCpuFrequency(uint32_t cpu_freq_mhz);
|
||||||
|
uint32_t getCpuFrequency();
|
||||||
|
uint32_t getApbFrequency();
|
||||||
|
|
||||||
unsigned long micros();
|
unsigned long micros();
|
||||||
unsigned long millis();
|
unsigned long millis();
|
||||||
|
Loading…
Reference in New Issue
Block a user