IDF release/v3.3 68b237fe5
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@ -395,5 +395,5 @@
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#define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_ERROR 1
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#define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_ERROR 1
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#define CONFIG_ESP32_WIFI_IRAM_OPT 1
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#define CONFIG_ESP32_WIFI_IRAM_OPT 1
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#define CONFIG_FATFS_API_ENCODING_ANSI_OEM 1
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#define CONFIG_FATFS_API_ENCODING_ANSI_OEM 1
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#define CONFIG_ARDUINO_IDF_COMMIT "44ec7972b"
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#define CONFIG_ARDUINO_IDF_COMMIT "68b237fe5"
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#define CONFIG_ARDUINO_IDF_BRANCH "release/v3.3"
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#define CONFIG_ARDUINO_IDF_BRANCH "release/v3.3"
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@ -20,6 +20,7 @@ extern "C"
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#ifndef __ASSEMBLER__
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#ifndef __ASSEMBLER__
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#include "esp_err.h"
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#include "esp_err.h"
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#include "soc/soc.h"
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/**
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/**
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@ -61,12 +62,36 @@ esp_err_t esp_set_watchpoint(int no, void *adr, int size, int flags);
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*/
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*/
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void esp_clear_watchpoint(int no);
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void esp_clear_watchpoint(int no);
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/**
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* @brief Checks stack pointer in dram
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*/
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inline static bool esp_stack_ptr_in_dram(uint32_t sp)
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{
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//Check if stack ptr is in between SOC_DRAM_LOW and SOC_DRAM_HIGH, and 16 byte aligned.
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return !(sp < SOC_DRAM_LOW + 0x10 || sp > SOC_DRAM_HIGH - 0x10 || ((sp & 0xF) != 0));
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}
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#if CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
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/**
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* @brief Checks stack pointer in external ram
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*/
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inline static bool esp_stack_ptr_in_extram(uint32_t sp)
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{
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//Check if stack ptr is in between SOC_EXTRAM_DATA_LOW and SOC_EXTRAM_DATA_HIGH, and 16 byte aligned.
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return !(sp < SOC_EXTRAM_DATA_LOW + 0x10 || sp > SOC_EXTRAM_DATA_HIGH - 0x10 || ((sp & 0xF) != 0));
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}
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#endif
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/**
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/**
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* @brief Checks stack pointer
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* @brief Checks stack pointer
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*/
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*/
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static inline bool esp_stack_ptr_is_sane(uint32_t sp)
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static inline bool esp_stack_ptr_is_sane(uint32_t sp)
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{
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{
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return !(sp < 0x3ffae010UL || sp > 0x3ffffff0UL || ((sp & 0xf) != 0));
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#if CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
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return (esp_stack_ptr_in_dram(sp) || esp_stack_ptr_in_extram(sp));
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#else
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return esp_stack_ptr_in_dram(sp);
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#endif
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}
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}
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#endif
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#endif
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