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add m5stack-core2 board (#4255)

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* add m5stack-core2 board
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Sean Kwok 2020-10-01 20:28:40 +08:00 committed by GitHub
parent c917ed2504
commit d93245d0f5
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2 changed files with 159 additions and 0 deletions
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99
boards.txt
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@ -2616,6 +2616,105 @@ m5stack-atom.menu.DebugLevel.verbose=Verbose
m5stack-atom.menu.DebugLevel.verbose.build.code_debug=5 m5stack-atom.menu.DebugLevel.verbose.build.code_debug=5
##############################################################
m5stack-core2.name=M5Stack-Core2
m5stack-core2.upload.tool=esptool_py
m5stack-core2.upload.maximum_size=6553600
m5stack-core2.upload.maximum_data_size=4521984
m5stack-core2.upload.wait_for_upload_port=true
m5stack-core2.serial.disableDTR=true
m5stack-core2.serial.disableRTS=true
m5stack-core2.build.mcu=esp32
m5stack-core2.build.core=esp32
m5stack-core2.build.variant=m5stack_core2
m5stack-core2.build.board=M5STACK_Core2
m5stack-core2.build.f_cpu=240000000L
m5stack-core2.build.flash_size=16MB
m5stack-core2.build.flash_freq=80m
m5stack-core2.build.flash_mode=dio
m5stack-core2.build.boot=dio
m5stack-core2.build.partitions=default_16MB
m5stack-core2.build.defines=
m5stack-core2.menu.PSRAM.enabled=Enabled
m5stack-core2.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM -mfix-esp32-psram-cache-issue
m5stack-core2.menu.PSRAM.disabled=Disabled
m5stack-core2.menu.PSRAM.disabled.build.defines=
m5stack-core2.menu.PartitionScheme.default=Default (2 x 6.5 MB app, 3.6 MB SPIFFS)
m5stack-core2.menu.PartitionScheme.default.build.partitions=default_16MB
m5stack-core2.menu.PartitionScheme.default.upload.maximum_size=6553600
m5stack-core2.menu.PartitionScheme.large_spiffs=Large SPIFFS (7 MB)
m5stack-core2.menu.PartitionScheme.large_spiffs.build.partitions=large_spiffs_16MB
m5stack-core2.menu.PartitionScheme.large_spiffs.upload.maximum_size=4685824
m5stack-core2.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
m5stack-core2.menu.PartitionScheme.minimal.build.partitions=minimal
m5stack-core2.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
m5stack-core2.menu.PartitionScheme.no_ota.build.partitions=no_ota
m5stack-core2.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
m5stack-core2.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
m5stack-core2.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
m5stack-core2.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
m5stack-core2.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
m5stack-core2.menu.PartitionScheme.huge_app.build.partitions=huge_app
m5stack-core2.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
m5stack-core2.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
m5stack-core2.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
m5stack-core2.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
m5stack-core2.menu.CPUFreq.240=240MHz (WiFi/BT)
m5stack-core2.menu.CPUFreq.240.build.f_cpu=240000000L
m5stack-core2.menu.CPUFreq.160=160MHz (WiFi/BT)
m5stack-core2.menu.CPUFreq.160.build.f_cpu=160000000L
m5stack-core2.menu.CPUFreq.80=80MHz (WiFi/BT)
m5stack-core2.menu.CPUFreq.80.build.f_cpu=80000000L
m5stack-core2.menu.CPUFreq.40=40MHz (40MHz XTAL)
m5stack-core2.menu.CPUFreq.40.build.f_cpu=40000000L
m5stack-core2.menu.CPUFreq.26=26MHz (26MHz XTAL)
m5stack-core2.menu.CPUFreq.26.build.f_cpu=26000000L
m5stack-core2.menu.CPUFreq.20=20MHz (40MHz XTAL)
m5stack-core2.menu.CPUFreq.20.build.f_cpu=20000000L
m5stack-core2.menu.CPUFreq.13=13MHz (26MHz XTAL)
m5stack-core2.menu.CPUFreq.13.build.f_cpu=13000000L
m5stack-core2.menu.CPUFreq.10=10MHz (40MHz XTAL)
m5stack-core2.menu.CPUFreq.10.build.f_cpu=10000000L
m5stack-core2.menu.UploadSpeed.921600=921600
m5stack-core2.menu.UploadSpeed.921600.upload.speed=921600
m5stack-core2.menu.UploadSpeed.115200=115200
m5stack-core2.menu.UploadSpeed.115200.upload.speed=115200
m5stack-core2.menu.UploadSpeed.256000.windows=256000
m5stack-core2.menu.UploadSpeed.256000.upload.speed=256000
m5stack-core2.menu.UploadSpeed.230400.windows.upload.speed=256000
m5stack-core2.menu.UploadSpeed.230400=230400
m5stack-core2.menu.UploadSpeed.230400.upload.speed=230400
m5stack-core2.menu.UploadSpeed.460800.linux=460800
m5stack-core2.menu.UploadSpeed.460800.macosx=460800
m5stack-core2.menu.UploadSpeed.460800.upload.speed=460800
m5stack-core2.menu.UploadSpeed.512000.windows=512000
m5stack-core2.menu.UploadSpeed.512000.upload.speed=512000
m5stack-core2.menu.UploadSpeed.1500000=1500000
m5stack-core2.menu.UploadSpeed.1500000.upload.speed=1500000
m5stack-core2.menu.DebugLevel.none=None
m5stack-core2.menu.DebugLevel.none.build.code_debug=0
m5stack-core2.menu.DebugLevel.error=Error
m5stack-core2.menu.DebugLevel.error.build.code_debug=1
m5stack-core2.menu.DebugLevel.warn=Warn
m5stack-core2.menu.DebugLevel.warn.build.code_debug=2
m5stack-core2.menu.DebugLevel.info=Info
m5stack-core2.menu.DebugLevel.info.build.code_debug=3
m5stack-core2.menu.DebugLevel.debug=Debug
m5stack-core2.menu.DebugLevel.debug.build.code_debug=4
m5stack-core2.menu.DebugLevel.verbose=Verbose
m5stack-core2.menu.DebugLevel.verbose.build.code_debug=5
############################################################## ##############################################################
odroid_esp32.name=ODROID ESP32 odroid_esp32.name=ODROID ESP32

60
variants/m5stack_core2/pins_arduino.h Normal file
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@ -0,0 +1,60 @@
#ifndef Pins_Arduino_h
#define Pins_Arduino_h
#include <stdint.h>
#define EXTERNAL_NUM_INTERRUPTS 16
#define NUM_DIGITAL_PINS 20
#define NUM_ANALOG_INPUTS 16
#define analogInputToDigitalPin(p) (((p)<20)?(esp32_adc2gpio[(p)]):-1)
#define digitalPinToInterrupt(p) (((p)<40)?(p):-1)
#define digitalPinHasPWM(p) (p < 34)
static const uint8_t TX = 1;
static const uint8_t RX = 3;
static const uint8_t TXD2 = 14;
static const uint8_t RXD2 = 13;
static const uint8_t SDA = 32;
static const uint8_t SCL = 33;
static const uint8_t SS = 5;
static const uint8_t MOSI = 23;
static const uint8_t MISO = 38;
static const uint8_t SCK = 18;
static const uint8_t G23 = 23;
static const uint8_t G38 = 38;
static const uint8_t G18 = 18;
static const uint8_t G3 = 3;
static const uint8_t G13 = 13;
static const uint8_t G21 = 21;
static const uint8_t G32 = 32;
static const uint8_t G27 = 27;
static const uint8_t G2 = 2;
static const uint8_t G35 = 35;
static const uint8_t G36 = 36;
static const uint8_t G25 = 25;
static const uint8_t G26 = 26;
static const uint8_t G1 = 1;
static const uint8_t G14 = 14;
static const uint8_t G22 = 22;
static const uint8_t G33 = 33;
static const uint8_t G19 = 19;
static const uint8_t G0 = 0;
static const uint8_t G34 = 34;
static const uint8_t G12 = 12;
static const uint8_t G15 = 15;
static const uint8_t G17 = 17;
static const uint8_t G5 = 5;
static const uint8_t DAC1 = 25;
static const uint8_t DAC2 = 26;
static const uint8_t ADC1 = 35;
static const uint8_t ADC2 = 36;
#endif /* Pins_Arduino_h */