Update IDF and Fix Error 88 for Client::available

This commit is contained in:
me-no-dev 2016-12-30 01:28:30 +02:00
parent 668c3811b8
commit f6d4843680
72 changed files with 3006 additions and 1350 deletions

View File

@ -8,25 +8,25 @@ runtime.tools.esptool.path={runtime.platform.path}/tools/esptool.py
compiler.warning_flags=-w compiler.warning_flags=-w
compiler.warning_flags.none=-w compiler.warning_flags.none=-w
compiler.warning_flags.default= compiler.warning_flags.default=
compiler.warning_flags.more=-Wall compiler.warning_flags.more=-Wall -Werror=all
compiler.warning_flags.all=-Wall -Wextra compiler.warning_flags.all=-Wall -Werror=all -Wextra
compiler.path={runtime.tools.xtensa-esp32-elf-gcc.path}/bin/ compiler.path={runtime.tools.xtensa-esp32-elf-gcc.path}/bin/
compiler.sdk.path={runtime.platform.path}/tools/sdk compiler.sdk.path={runtime.platform.path}/tools/sdk
compiler.cpreprocessor.flags=-DESP_PLATFORM -DMBEDTLS_CONFIG_FILE='"mbedtls/esp_config.h"' -DHAVE_CONFIG_H "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/bt" "-I{compiler.sdk.path}/include/driver" "-I{compiler.sdk.path}/include/esp32" "-I{compiler.sdk.path}/include/ethernet" "-I{compiler.sdk.path}/include/freertos" "-I{compiler.sdk.path}/include/log" "-I{compiler.sdk.path}/include/vfs" "-I{compiler.sdk.path}/include/newlib" "-I{compiler.sdk.path}/include/nvs_flash" "-I{compiler.sdk.path}/include/spi_flash" "-I{compiler.sdk.path}/include/openssl" "-I{compiler.sdk.path}/include/tcpip_adapter" "-I{compiler.sdk.path}/include/xtensa-debug-module" "-I{compiler.sdk.path}/include/wpa_supplicant" "-I{compiler.sdk.path}/include/expat" "-I{compiler.sdk.path}/include/json" "-I{compiler.sdk.path}/include/mbedtls" "-I{compiler.sdk.path}/include/nghttp" "-I{compiler.sdk.path}/include/lwip" compiler.cpreprocessor.flags=-DESP_PLATFORM -DMBEDTLS_CONFIG_FILE='"mbedtls/esp_config.h"' -DHAVE_CONFIG_H "-I{compiler.sdk.path}/include/config" "-I{compiler.sdk.path}/include/bt" "-I{compiler.sdk.path}/include/driver" "-I{compiler.sdk.path}/include/esp32" "-I{compiler.sdk.path}/include/ethernet" "-I{compiler.sdk.path}/include/freertos" "-I{compiler.sdk.path}/include/log" "-I{compiler.sdk.path}/include/vfs" "-I{compiler.sdk.path}/include/ulp" "-I{compiler.sdk.path}/include/newlib" "-I{compiler.sdk.path}/include/nvs_flash" "-I{compiler.sdk.path}/include/spi_flash" "-I{compiler.sdk.path}/include/openssl" "-I{compiler.sdk.path}/include/app_update" "-I{compiler.sdk.path}/include/tcpip_adapter" "-I{compiler.sdk.path}/include/xtensa-debug-module" "-I{compiler.sdk.path}/include/wpa_supplicant" "-I{compiler.sdk.path}/include/expat" "-I{compiler.sdk.path}/include/json" "-I{compiler.sdk.path}/include/mbedtls" "-I{compiler.sdk.path}/include/nghttp" "-I{compiler.sdk.path}/include/lwip"
compiler.c.cmd=xtensa-esp32-elf-gcc compiler.c.cmd=xtensa-esp32-elf-gcc
compiler.c.flags=-c {compiler.warning_flags} -Os -g3 -Wpointer-arith -Wno-error=unused-function -Wno-error=unused-but-set-variable -Wno-error=unused-variable -ffunction-sections -fdata-sections -mlongcalls -nostdlib -MMD -std=gnu99 -fstrict-volatile-bitfields compiler.c.flags=-std=gnu99 -Os -g3 -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -mlongcalls -nostdlib -Wpointer-arith {compiler.warning_flags} -Wno-error=unused-function -Wno-error=unused-but-set-variable -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -Wno-old-style-declaration -MMD -c
compiler.cpp.cmd=xtensa-esp32-elf-g++ compiler.cpp.cmd=xtensa-esp32-elf-g++
compiler.cpp.flags=-c {compiler.warning_flags} -Os -g3 -Wpointer-arith -Wno-error=unused-function -Wno-error=unused-but-set-variable -Wno-error=unused-variable -fno-rtti -ffunction-sections -fdata-sections -mlongcalls -nostdlib -MMD -std=gnu++11 -fno-exceptions -fstrict-volatile-bitfields compiler.cpp.flags=-std=gnu++11 -fno-exceptions -fno-rtti -Os -g3 -Wpointer-arith -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -mlongcalls -nostdlib {compiler.warning_flags} -Wno-error=unused-function -Wno-error=unused-but-set-variable -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wno-unused-parameter -Wno-sign-compare -fno-rtti -MMD -c
compiler.S.cmd=xtensa-esp32-elf-gcc compiler.S.cmd=xtensa-esp32-elf-gcc
compiler.S.flags=-c -g3 -x assembler-with-cpp -MMD -mlongcalls compiler.S.flags=-c -g3 -x assembler-with-cpp -MMD -mlongcalls
compiler.c.elf.cmd=xtensa-esp32-elf-gcc compiler.c.elf.cmd=xtensa-esp32-elf-gcc
compiler.c.elf.flags="-L{compiler.sdk.path}/lib" "-L{compiler.sdk.path}/ld" -nostdlib -T esp32_out.ld -T esp32.common.ld -T esp32.rom.ld -T esp32.peripherals.ld -u call_user_start_cpu0 -Wl,--gc-sections -Wl,-static -Wl,--undefined=uxTopUsedPriority compiler.c.elf.flags=-nostdlib "-L{compiler.sdk.path}/lib" "-L{compiler.sdk.path}/ld" -T esp32_out.ld -T esp32.common.ld -T esp32.rom.ld -T esp32.peripherals.ld -u call_user_start_cpu0 -Wl,--gc-sections -Wl,-static -Wl,--undefined=uxTopUsedPriority
compiler.c.elf.libs=-lapp_update -lbt -lbtdm_app -lc -lcoexist -lcore -ldriver -lesp32 -lethernet -lexpat -lfreertos -lg -lhal -ljson -llog -llwip -lm -lmbedtls -lnet80211 -lnewlib -lnghttp -lnvs_flash -lopenssl -lphy -lpp -lrtc -lsmartconfig -lspi_flash -ltcpip_adapter -lulp -lvfs -lwpa -lwpa2 -lwpa_supplicant -lwps -lxtensa-debug-module compiler.c.elf.libs=-lapp_update -lbootloader_support -lbt -lbtdm_app -lc -lc_nano -lcoexist -lcore -ldriver -lesp32 -lethernet -lexpat -lfreertos -lhal -ljson -llog -llwip -lm -lmbedtls -lmicro-ecc -lnet80211 -lnewlib -lnghttp -lnvs_flash -lopenssl -lphy -lpp -lrtc -lsmartconfig -lspi_flash -ltcpip_adapter -lulp -lvfs -lwpa -lwpa2 -lwpa_supplicant -lwps -lxtensa-debug-module -lgcc
compiler.as.cmd=xtensa-esp32-elf-as compiler.as.cmd=xtensa-esp32-elf-as
@ -66,13 +66,13 @@ recipe.S.o.pattern="{compiler.path}{compiler.c.cmd}" {compiler.cpreprocessor.fla
recipe.ar.pattern="{compiler.path}{compiler.ar.cmd}" {compiler.ar.flags} {compiler.ar.extra_flags} "{build.path}/arduino.ar" "{object_file}" recipe.ar.pattern="{compiler.path}{compiler.ar.cmd}" {compiler.ar.flags} {compiler.ar.extra_flags} "{build.path}/arduino.ar" "{object_file}"
## Combine gc-sections, archives, and objects ## Combine gc-sections, archives, and objects
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {compiler.c.elf.flags} {compiler.c.elf.extra_flags} -Wl,--start-group {object_files} "{build.path}/arduino.ar" {compiler.c.elf.libs} -Wl,--end-group -o "{build.path}/{build.project_name}.elf" recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {compiler.c.elf.flags} {compiler.c.elf.extra_flags} -Wl,--start-group {object_files} "{build.path}/arduino.ar" {compiler.c.elf.libs} -Wl,--end-group -Wl,-EL -o "{build.path}/{build.project_name}.elf"
## Create eeprom ## Create eeprom
recipe.objcopy.eep.pattern= recipe.objcopy.eep.pattern=
## Create hex ## Create hex
recipe.objcopy.hex.pattern="{compiler.python.cmd}" "{runtime.platform.path}/tools/esptool.py" --chip esp32 elf2image --flash_mode "{build.flash_mode}" --flash_freq "{build.flash_freq}" -o "{build.path}/{build.project_name}.bin" "{build.path}/{build.project_name}.elf" recipe.objcopy.hex.pattern="{compiler.python.cmd}" "{runtime.platform.path}/tools/esptool.py" --chip esp32 elf2image --flash_mode "{build.flash_mode}" --flash_freq "{build.flash_freq}" --flash_size "{build.flash_size}" -o "{build.path}/{build.project_name}.bin" "{build.path}/{build.project_name}.elf"
## Save hex ## Save hex
recipe.output.tmp_file={build.project_name}.bin recipe.output.tmp_file={build.project_name}.bin
@ -94,4 +94,4 @@ tools.esptool.network_cmd.windows=python.exe
tools.esptool.upload.protocol=esp32 tools.esptool.upload.protocol=esp32
tools.esptool.upload.params.verbose= tools.esptool.upload.params.verbose=
tools.esptool.upload.params.quiet= tools.esptool.upload.params.quiet=
tools.esptool.upload.pattern="{cmd}" "{path}" --chip esp32 --port "{serial.port}" --baud {upload.speed} write_flash -z --flash_freq {build.flash_freq} --flash_mode {build.flash_mode} 0x1000 "{runtime.platform.path}/tools/sdk/bin/bootloader.bin" 0x8000 "{runtime.platform.path}/tools/sdk/bin/partitions_singleapp.bin" 0x10000 "{build.path}/{build.project_name}.bin" tools.esptool.upload.pattern="{cmd}" "{path}" --chip esp32 --port "{serial.port}" --baud {upload.speed} write_flash -z --flash_freq {build.flash_freq} --flash_mode {build.flash_mode} --flash_size {build.flash_size} 0x1000 "{runtime.platform.path}/tools/sdk/bin/bootloader.bin" 0x8000 "{runtime.platform.path}/tools/sdk/bin/partitions_singleapp.bin" 0x10000 "{build.path}/{build.project_name}.bin"

View File

@ -51,7 +51,7 @@ def check_supported_function(func, check_func):
if check_func(obj): if check_func(obj):
return func(*args, **kwargs) return func(*args, **kwargs)
else: else:
raise NotImplementedInROMError(obj) raise NotImplementedInROMError(obj, func)
return inner return inner
@ -112,9 +112,8 @@ class ESPLoader(object):
# Maximum block sized for RAM and Flash writes, respectively. # Maximum block sized for RAM and Flash writes, respectively.
ESP_RAM_BLOCK = 0x1800 ESP_RAM_BLOCK = 0x1800
ESP_FLASH_BLOCK = 0x400
FLASH_WRITE_SIZE = ESP_FLASH_BLOCK FLASH_WRITE_SIZE = 0x400
# Default baudrate. The ROM auto-bauds, so we can use more or less whatever we want. # Default baudrate. The ROM auto-bauds, so we can use more or less whatever we want.
ESP_ROM_BAUD = 115200 ESP_ROM_BAUD = 115200
@ -126,7 +125,7 @@ class ESPLoader(object):
ESP_CHECKSUM_MAGIC = 0xef ESP_CHECKSUM_MAGIC = 0xef
# Flash sector size, minimum unit of erase. # Flash sector size, minimum unit of erase.
ESP_FLASH_SECTOR = 0x1000 FLASH_SECTOR_SIZE = 0x1000
UART_DATA_REG_ADDR = 0x60000078 UART_DATA_REG_ADDR = 0x60000078
@ -324,19 +323,23 @@ class ESPLoader(object):
return self.check_command("leave RAM download mode", self.ESP_MEM_END, return self.check_command("leave RAM download mode", self.ESP_MEM_END,
struct.pack('<II', int(entrypoint == 0), entrypoint)) struct.pack('<II', int(entrypoint == 0), entrypoint))
""" Start downloading to Flash (performs an erase) """ """ Start downloading to Flash (performs an erase)
Returns number of blocks (of size self.FLASH_WRITE_SIZE) to write.
"""
def flash_begin(self, size, offset): def flash_begin(self, size, offset):
old_tmo = self._port.timeout old_tmo = self._port.timeout
num_blocks = (size + self.ESP_FLASH_BLOCK - 1) / self.ESP_FLASH_BLOCK num_blocks = (size + self.FLASH_WRITE_SIZE - 1) / self.FLASH_WRITE_SIZE
erase_size = self.get_erase_size(offset, size) erase_size = self.get_erase_size(offset, size)
self._port.timeout = 20 self._port.timeout = 20
t = time.time() t = time.time()
self.check_command("enter Flash download mode", self.ESP_FLASH_BEGIN, self.check_command("enter Flash download mode", self.ESP_FLASH_BEGIN,
struct.pack('<IIII', erase_size, num_blocks, self.ESP_FLASH_BLOCK, offset)) struct.pack('<IIII', erase_size, num_blocks, self.FLASH_WRITE_SIZE, offset))
if size != 0: if size != 0 and not self.IS_STUB:
print "Took %.2fs to erase flash block" % (time.time() - t) print "Took %.2fs to erase flash block" % (time.time() - t)
self._port.timeout = old_tmo self._port.timeout = old_tmo
return num_blocks
""" Write block to flash """ """ Write block to flash """
def flash_block(self, data, seq): def flash_block(self, data, seq):
@ -407,20 +410,24 @@ class ESPLoader(object):
@stub_and_esp32_function_only @stub_and_esp32_function_only
def flash_defl_begin(self, size, compsize, offset): def flash_defl_begin(self, size, compsize, offset):
""" Start downloading compressed data to Flash (performs an erase) """ """ Start downloading compressed data to Flash (performs an erase)
Returns number of blocks (size self.FLASH_WRITE_SIZE) to write.
"""
old_tmo = self._port.timeout old_tmo = self._port.timeout
num_blocks = (compsize + self.ESP_FLASH_BLOCK - 1) / self.ESP_FLASH_BLOCK num_blocks = (compsize + self.FLASH_WRITE_SIZE - 1) / self.FLASH_WRITE_SIZE
erase_blocks = (size + self.ESP_FLASH_BLOCK - 1) / self.ESP_FLASH_BLOCK erase_blocks = (size + self.FLASH_WRITE_SIZE - 1) / self.FLASH_WRITE_SIZE
self._port.timeout = 20 self._port.timeout = 20
t = time.time() t = time.time()
print "Compressed %d bytes to %d..." % (size, compsize) print "Compressed %d bytes to %d..." % (size, compsize)
self.check_command("enter compressed flash mode", self.ESP_FLASH_DEFL_BEGIN, self.check_command("enter compressed flash mode", self.ESP_FLASH_DEFL_BEGIN,
struct.pack('<IIII', erase_blocks * self.ESP_FLASH_BLOCK, num_blocks, self.ESP_FLASH_BLOCK, offset)) struct.pack('<IIII', erase_blocks * self.FLASH_WRITE_SIZE, num_blocks, self.FLASH_WRITE_SIZE, offset))
if size != 0 and not self.IS_STUB: if size != 0 and not self.IS_STUB:
# (stub erases as it writes, but ROM loaders erase on begin) # (stub erases as it writes, but ROM loaders erase on begin)
print "Took %.2fs to erase flash block" % (time.time() - t) print "Took %.2fs to erase flash block" % (time.time() - t)
self._port.timeout = old_tmo self._port.timeout = old_tmo
return num_blocks
""" Write block to flash, send compressed """ """ Write block to flash, send compressed """
@stub_and_esp32_function_only @stub_and_esp32_function_only
@ -469,9 +476,9 @@ class ESPLoader(object):
@stub_function_only @stub_function_only
def erase_region(self, offset, size): def erase_region(self, offset, size):
if offset % self.ESP_FLASH_SECTOR != 0: if offset % self.FLASH_SECTOR_SIZE != 0:
raise FatalError("Offset to erase from must be a multiple of 4096") raise FatalError("Offset to erase from must be a multiple of 4096")
if size % self.ESP_FLASH_SECTOR != 0: if size % self.FLASH_SECTOR_SIZE != 0:
raise FatalError("Size of data to erase must be a multiple of 4096") raise FatalError("Size of data to erase must be a multiple of 4096")
self.check_command("erase region", self.ESP_ERASE_REGION, struct.pack('<II', offset, size)) self.check_command("erase region", self.ESP_ERASE_REGION, struct.pack('<II', offset, size))
@ -482,7 +489,7 @@ class ESPLoader(object):
struct.pack('<IIII', struct.pack('<IIII',
offset, offset,
length, length,
self.ESP_FLASH_BLOCK, self.FLASH_SECTOR_SIZE,
64)) 64))
# now we expect (length / block_size) SLIP frames with the data # now we expect (length / block_size) SLIP frames with the data
data = '' data = ''
@ -741,7 +748,7 @@ class ESP8266ROM(ESPLoader):
Provides a workaround for the bootloader erase bug.""" Provides a workaround for the bootloader erase bug."""
sectors_per_block = 16 sectors_per_block = 16
sector_size = self.ESP_FLASH_SECTOR sector_size = self.FLASH_SECTOR_SIZE
num_sectors = (size + sector_size - 1) / sector_size num_sectors = (size + sector_size - 1) / sector_size
start_sector = offset / sector_size start_sector = offset / sector_size
@ -765,6 +772,9 @@ class ESP8266StubLoader(ESP8266ROM):
self._port = rom_loader._port self._port = rom_loader._port
self.flush_input() # resets _slip_reader self.flush_input() # resets _slip_reader
def get_erase_size(self, offset, size):
return size # stub doesn't have same size bug as ROM loader
ESP8266ROM.STUB_CLASS = ESP8266StubLoader ESP8266ROM.STUB_CLASS = ESP8266StubLoader
@ -1083,7 +1093,7 @@ class OTAFirmwareImage(BaseFirmwareImage):
else: else:
irom_offs = 0 irom_offs = 0
return "%s-0x%05x.bin" % (os.path.splitext(input_file)[0], return "%s-0x%05x.bin" % (os.path.splitext(input_file)[0],
irom_offs & ~(ESPLoader.ESP_FLASH_SECTOR - 1)) irom_offs & ~(ESPLoader.FLASH_SECTOR_SIZE - 1))
def save(self, filename): def save(self, filename):
with open(filename, 'wb') as f: with open(filename, 'wb') as f:
@ -1120,11 +1130,16 @@ class ESP32FirmwareImage(BaseFirmwareImage):
self.flash_mode = 0 self.flash_mode = 0
self.flash_size_freq = 0 self.flash_size_freq = 0
self.version = 1 self.version = 1
self.additional_header = '\x00' * 16 self.encrypt_flag = False
if load_file is not None: if load_file is not None:
segments = self.load_common_header(load_file, ESPLoader.ESP_IMAGE_MAGIC) segments = self.load_common_header(load_file, ESPLoader.ESP_IMAGE_MAGIC)
self.additional_header = load_file.read(16) additional_header = list(struct.unpack("B" * 16, load_file.read(16)))
self.encrypt_flag = (additional_header[0] == 0x01)
# check remaining 14 bytes are unused
if additional_header[2:] != [0] * 14:
print "WARNING: ESP32 image header contains unknown flags. Possibly this image is from a newer version of esptool.py"
for i in xrange(segments): for i in xrange(segments):
self.load_segment(load_file) self.load_segment(load_file)
@ -1145,7 +1160,10 @@ class ESP32FirmwareImage(BaseFirmwareImage):
padding_segments = 0 padding_segments = 0
with open(filename, 'wb') as f: with open(filename, 'wb') as f:
self.write_common_header(f, self.segments) self.write_common_header(f, self.segments)
f.write(self.additional_header)
f.write(b'\x01' if self.encrypt_flag else b'\x00')
# remaining 15 bytes of header are unused
f.write(b'\x00' * 15)
checksum = ESPLoader.ESP_CHECKSUM_MAGIC checksum = ESPLoader.ESP_CHECKSUM_MAGIC
last_addr = None last_addr = None
@ -1319,7 +1337,6 @@ def div_roundup(a, b):
""" """
return (int(a) + int(b) - 1) / int(b) return (int(a) + int(b) - 1) / int(b)
def align_file_position(f, size): def align_file_position(f, size):
""" Align the position in the file to the next block of specified size """ """ Align the position in the file to the next block of specified size """
align = (size - 1) - (f.tell() % size) align = (size - 1) - (f.tell() % size)
@ -1372,8 +1389,8 @@ class NotImplementedInROMError(FatalError):
Wrapper class for the error thrown when a particular ESP bootloader function Wrapper class for the error thrown when a particular ESP bootloader function
is not implemented in the ROM bootloader. is not implemented in the ROM bootloader.
""" """
def __init__(self, bootloader): def __init__(self, bootloader, func):
FatalError.__init__(self, "%s ROM does not support this function." % bootloader.CHIP_NAME) FatalError.__init__(self, "%s ROM does not support function %s." % (bootloader.CHIP_NAME, func.func_name))
# "Operation" commands, executable at command line. One function each # "Operation" commands, executable at command line. One function each
# #
@ -1441,7 +1458,8 @@ def write_flash(esp, args):
argfile.seek(0) argfile.seek(0)
for address, argfile in args.addr_filename: for address, argfile in args.addr_filename:
print 'Erasing flash...' if args.no_stub:
print 'Erasing flash...'
image = argfile.read() image = argfile.read()
# Update header with flash parameters # Update header with flash parameters
if address == 0 and image[0] == '\xe9': if address == 0 and image[0] == '\xe9':
@ -1451,11 +1469,9 @@ def write_flash(esp, args):
if args.compress: if args.compress:
uncimage = image uncimage = image
image = zlib.compress(uncimage, 9) image = zlib.compress(uncimage, 9)
blocks = div_roundup(len(image), esp.FLASH_WRITE_SIZE) blocks = esp.flash_defl_begin(uncsize, len(image), address)
esp.flash_defl_begin(len(uncimage),len(image), address)
else: else:
blocks = div_roundup(len(image), esp.FLASH_WRITE_SIZE) blocks = esp.flash_begin(uncsize, address)
esp.flash_begin(blocks * esp.FLASH_WRITE_SIZE, address)
argfile.seek(0) # in case we need it again argfile.seek(0) # in case we need it again
seq = 0 seq = 0
written = 0 written = 0
@ -1484,13 +1500,17 @@ def write_flash(esp, args):
if t > 0.0: if t > 0.0:
speed_msg = " (%.1f kbit/s)" % (written / t * 8 / 1000) speed_msg = " (%.1f kbit/s)" % (written / t * 8 / 1000)
print '\rWrote %d bytes at 0x%08x in %.1f seconds%s...' % (written, address, t, speed_msg) print '\rWrote %d bytes at 0x%08x in %.1f seconds%s...' % (written, address, t, speed_msg)
res = esp.flash_md5sum(address, uncsize) try:
if res != calcmd5: res = esp.flash_md5sum(address, uncsize)
print 'File md5: %s' % calcmd5 if res != calcmd5:
print 'Flash md5: %s' % res print 'File md5: %s' % calcmd5
raise FatalError("MD5 of file does not match data in flash!") print 'Flash md5: %s' % res
else: print 'MD5 of 0xFF is %s' % (hashlib.md5(b'\xFF' * uncsize).hexdigest())
print 'Hash of data verified.' raise FatalError("MD5 of file does not match data in flash!")
else:
print 'Hash of data verified.'
except NotImplementedInROMError:
pass
print '\nLeaving...' print '\nLeaving...'
if args.flash_mode == 'dio' and esp.CHIP_NAME == "ESP8266": if args.flash_mode == 'dio' and esp.CHIP_NAME == "ESP8266":
esp.flash_unlock_dio() esp.flash_unlock_dio()
@ -1539,6 +1559,10 @@ def elf2image(args):
print "Creating image for ESP8266..." print "Creating image for ESP8266..."
args.chip == 'esp8266' args.chip == 'esp8266'
if args.chip != 'esp32':
if args.set_encrypt_flag:
raise FatalError("--encrypt-flag only applies to ESP32 images")
if args.chip == 'esp32': if args.chip == 'esp32':
image = ESP32FirmwareImage() image = ESP32FirmwareImage()
elif args.version == '1': # ESP8266 elif args.version == '1': # ESP8266
@ -1550,6 +1574,7 @@ def elf2image(args):
image.flash_mode = {'qio':0, 'qout':1, 'dio':2, 'dout': 3}[args.flash_mode] image.flash_mode = {'qio':0, 'qout':1, 'dio':2, 'dout': 3}[args.flash_mode]
image.flash_size_freq = image.ROM_LOADER.FLASH_SIZES[args.flash_size] image.flash_size_freq = image.ROM_LOADER.FLASH_SIZES[args.flash_size]
image.flash_size_freq += {'40m':0, '26m':1, '20m':2, '80m': 0xf}[args.flash_freq] image.flash_size_freq += {'40m':0, '26m':1, '20m':2, '80m': 0xf}[args.flash_freq]
image.encrypt_flag = args.set_encrypt_flag
if args.output is None: if args.output is None:
args.output = image.default_output_name(args.input) args.output = image.default_output_name(args.input)
@ -1558,8 +1583,14 @@ def elf2image(args):
def read_mac(esp, args): def read_mac(esp, args):
mac = esp.read_mac() mac = esp.read_mac()
print 'MAC: %s' % ':'.join(map(lambda x: '%02x' % x, mac)) def print_mac(label, mac):
print '%s: %s' % (label, ':'.join(map(lambda x: '%02x' % x, mac)))
print("%r" % (mac,))
if len(mac) == 1:
print_mac("MAC", mac)
else:
print_mac("WiFi MAC", mac[0])
print_mac("BT MAC", mac[1])
def chip_id(esp, args): def chip_id(esp, args):
chipid = esp.chip_id() chipid = esp.chip_id()
@ -1761,6 +1792,8 @@ def main():
parser_elf2image.add_argument('input', help='Input ELF file') parser_elf2image.add_argument('input', help='Input ELF file')
parser_elf2image.add_argument('--output', '-o', help='Output filename prefix (for version 1 image), or filename (for version 2 single image)', type=str) parser_elf2image.add_argument('--output', '-o', help='Output filename prefix (for version 1 image), or filename (for version 2 single image)', type=str)
parser_elf2image.add_argument('--version', '-e', help='Output image version', choices=['1','2'], default='1') parser_elf2image.add_argument('--version', '-e', help='Output image version', choices=['1','2'], default='1')
parser_elf2image.add_argument('--set-encrypt-flag', help='Flag image to be encrypted by bootloader after flashing.', action="store_true")
add_spi_flash_subparsers(parser_elf2image) add_spi_flash_subparsers(parser_elf2image)
subparsers.add_parser( subparsers.add_parser(
@ -1844,8 +1877,10 @@ def main():
esp = esp.run_stub() esp = esp.run_stub()
if args.baud > initial_baud: if args.baud > initial_baud:
esp.change_baud(args.baud) try:
# TODO: handle a NotImplementedInROMError esp.change_baud(args.baud)
except NotImplementedInROMError:
print "WARNING: ROM doesn't support changing baud rate. Keeping initial baud rate %d" % initial_baud
# override common SPI flash parameter stuff as required # override common SPI flash parameter stuff as required
if hasattr(args, "ucIsHspi"): if hasattr(args, "ucIsHspi"):
@ -1919,96 +1954,98 @@ class AddrFilenamePairAction(argparse.Action):
# Binary stub code (see flasher_stub dir for source & details) # Binary stub code (see flasher_stub dir for source & details)
ESP8266ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b""" ESP8266ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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"""))) """)))
ESP32ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b""" ESP32ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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"""))) """)))
if __name__ == '__main__': if __name__ == '__main__':

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@ -0,0 +1,110 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _OTA_OPS_H
#define _OTA_OPS_H
#include <stdint.h>
#include <stdbool.h>
#include <stddef.h>
#include "esp_err.h"
#include "esp_partition.h"
#include "esp_spi_flash.h"
#ifdef __cplusplus
extern "C"
{
#endif
#define OTA_SIZE_UNKNOWN 0xffffffff
#define ESP_ERR_OTA_BASE 0x1500 /*!< base error code for ota_ops api */
#define ESP_ERR_OTA_PARTITION_CONFLICT (ESP_ERR_OTA_BASE + 0x01) /*!< want to write or erase current running partition */
#define ESP_ERR_OTA_SELECT_INFO_INVALID (ESP_ERR_OTA_BASE + 0x02) /*!< ota data partition info is error */
#define ESP_ERR_OTA_VALIDATE_FAILED (ESP_ERR_OTA_BASE + 0x03) /*!< validate ota image failed */
/**
* @brief Opaque handle for application update obtained from app_ops.
*/
typedef uint32_t esp_ota_handle_t;
/**
* @brief format input partition in flash to 0xFF as input image size,
* if unkown image size ,pass 0x0 or 0xFFFFFFFF, it will erase all the
* partition ,Otherwise, erase the required range
*
* @param partition Pointer to partition structure which need to be updated
* Must be non-NULL.
* @param image_size size of image need to be updated
* @param out_handle handle which should be used for esp_ota_write or esp_ota_end call
* @return:
* - ESP_OK: if format ota image OK
* - ESP_ERR_OTA_PARTITION_CONFLICT: operate current running bin
* - ESP_ERR_OTA_SELECT_INFO_INVALID: ota bin select info invalid
*/
esp_err_t esp_ota_begin(const esp_partition_t* partition, size_t image_size, esp_ota_handle_t* out_handle);
/**
* @brief Write data to input input partition
*
* @param handle Handle obtained from esp_ota_begin
* @param data Pointer to data write to flash
* @param size data size of recieved data
*
* @return:
* - ESP_OK: if write flash data OK
* - ESP_ERR_OTA_PARTITION_CONFLICT: operate current running bin
* - ESP_ERR_OTA_SELECT_INFO_INVALID: ota bin select info invalid
*/
esp_err_t esp_ota_write(esp_ota_handle_t handle, const void* data, size_t size);
/**
* @brief Finish the update and validate written data
*
* @param handle Handle obtained from esp_ota_begin
*
* @return:
* - ESP_OK: if validate ota image pass
* - ESP_ERR_OTA_VALIDATE_FAILED: validate the ota image is invalid
*/
esp_err_t esp_ota_end(esp_ota_handle_t handle);
/**
* @brief Set next boot partition, call system_restart() will switch to run it
*
* @note if you want switch to run a bin file
* has never been checked before,please validate it's signature firstly
*
* @param partition Pointer to partition structure which need to boot
*
* @return:
* - ESP_OK: if set next boot partition OK
* - ESP_ERR_OTA_SELECT_INFO_INVALID: ota bin select info invalid
*/
esp_err_t esp_ota_set_boot_partition(const esp_partition_t* partition);
/**
* @brief Get partition info of current running image
*
* @return pointer to esp_partition_t structure, or NULL if no partition is found or
* operate flash failed,This pointer is valid for the lifetime of the application.
*/
const esp_partition_t* esp_ota_get_boot_partition(void);
#ifdef __cplusplus
}
#endif
#endif /* OTA_OPS_H */

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@ -8,11 +8,11 @@
#define CONFIG_TRACEMEM_RESERVE_DRAM 0x0 #define CONFIG_TRACEMEM_RESERVE_DRAM 0x0
#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE 1 #define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE 1
#define CONFIG_MEMMAP_BT 1 #define CONFIG_MEMMAP_BT 1
#define CONFIG_SECURE_BOOTLOADER_DISABLED 1
#define CONFIG_ESPTOOLPY_FLASHSIZE_4MB 1 #define CONFIG_ESPTOOLPY_FLASHSIZE_4MB 1
#define CONFIG_ESPTOOLPY_FLASHFREQ "80m" #define CONFIG_ESPTOOLPY_FLASHFREQ "80m"
#define CONFIG_NEWLIB_STDOUT_ADDCR 1 #define CONFIG_NEWLIB_STDOUT_ADDCR 1
#define CONFIG_ESPTOOLPY_FLASHSIZE "4MB" #define CONFIG_ESPTOOLPY_FLASHSIZE "4MB"
#define CONFIG_ETHERNET 1
#define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL 1 #define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL 1
#define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 1 #define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 1
#define CONFIG_BT_RESERVE_DRAM 0x10000 #define CONFIG_BT_RESERVE_DRAM 0x10000
@ -20,7 +20,7 @@
#define CONFIG_CONSOLE_UART_BAUDRATE 115200 #define CONFIG_CONSOLE_UART_BAUDRATE 115200
#define CONFIG_LWIP_MAX_SOCKETS 4 #define CONFIG_LWIP_MAX_SOCKETS 4
#define CONFIG_ESP32_ENABLE_STACK_BT 1 #define CONFIG_ESP32_ENABLE_STACK_BT 1
#define CONFIG_ULP_COPROC_RESERVE_MEM 0 #define CONFIG_ULP_COPROC_RESERVE_MEM 512
#define CONFIG_ESPTOOLPY_BAUD 921600 #define CONFIG_ESPTOOLPY_BAUD 921600
#define CONFIG_TOOLPREFIX "xtensa-esp32-elf-" #define CONFIG_TOOLPREFIX "xtensa-esp32-elf-"
#define CONFIG_CONSOLE_UART_NUM 0 #define CONFIG_CONSOLE_UART_NUM 0
@ -29,12 +29,15 @@
#define CONFIG_CONSOLE_UART_DEFAULT 1 #define CONFIG_CONSOLE_UART_DEFAULT 1
#define CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN 16384 #define CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN 16384
#define CONFIG_AUTOSTART_ARDUINO 1 #define CONFIG_AUTOSTART_ARDUINO 1
#define CONFIG_ESP32_ENABLE_STACK_WIFI 1
#define CONFIG_LOG_DEFAULT_LEVEL_ERROR 1 #define CONFIG_LOG_DEFAULT_LEVEL_ERROR 1
#define CONFIG_MBEDTLS_MPI_USE_INTERRUPT 1 #define CONFIG_MBEDTLS_MPI_USE_INTERRUPT 1
#define CONFIG_MAIN_TASK_STACK_SIZE 4096 #define CONFIG_MAIN_TASK_STACK_SIZE 4096
#define CONFIG_ESPTOOLPY_FLASHMODE "dio" #define CONFIG_ESPTOOLPY_FLASHMODE "dio"
#define CONFIG_BTC_TASK_STACK_SIZE 2048 #define CONFIG_BTC_TASK_STACK_SIZE 2048
#define CONFIG_LOG_DEFAULT_LEVEL 1 #define CONFIG_LOG_DEFAULT_LEVEL 1
#define CONFIG_ULP_COPROC_ENABLED 1
#define CONFIG_DMA_RX_BUF_NUM 10
#define CONFIG_ESPTOOLPY_FLASHMODE_DIO 1 #define CONFIG_ESPTOOLPY_FLASHMODE_DIO 1
#define CONFIG_PYTHON "python" #define CONFIG_PYTHON "python"
#define CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1 1 #define CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1 1
@ -42,11 +45,12 @@
#define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv" #define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
#define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1 #define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
#define CONFIG_PARTITION_TABLE_SINGLE_APP 1 #define CONFIG_PARTITION_TABLE_SINGLE_APP 1
#define CONFIG_WIFI_ENABLED 1
#define CONFIG_ESPTOOLPY_FLASHFREQ_80M 1 #define CONFIG_ESPTOOLPY_FLASHFREQ_80M 1
#define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE 2048 #define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE 2048
#define CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY 0
#define CONFIG_PHY_DATA_OFFSET 0xf000 #define CONFIG_PHY_DATA_OFFSET 0xf000
#define CONFIG_PARTITION_TABLE_CUSTOM_APP_BIN_OFFSET 0x10000 #define CONFIG_PARTITION_TABLE_CUSTOM_APP_BIN_OFFSET 0x10000
#define CONFIG_MBEDTLS_MPI_INTERRUPT_NUM 18
#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 240 #define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 240
#define CONFIG_MBEDTLS_HARDWARE_AES 1 #define CONFIG_MBEDTLS_HARDWARE_AES 1
#define CONFIG_FREERTOS_HZ 1000 #define CONFIG_FREERTOS_HZ 1000
@ -56,6 +60,7 @@
#define CONFIG_ESPTOOLPY_BAUD_OTHER_VAL 115200 #define CONFIG_ESPTOOLPY_BAUD_OTHER_VAL 115200
#define CONFIG_ESP32_DEFAULT_CPU_FREQ_240 1 #define CONFIG_ESP32_DEFAULT_CPU_FREQ_240 1
#define CONFIG_LWIP_SO_REUSE 1 #define CONFIG_LWIP_SO_REUSE 1
#define CONFIG_DMA_TX_BUF_NUM 10
#define CONFIG_BT_ENABLED 1 #define CONFIG_BT_ENABLED 1
#define CONFIG_MONITOR_BAUD 115200 #define CONFIG_MONITOR_BAUD 115200
#define CONFIG_MBEDTLS_HARDWARE_SHA 1 #define CONFIG_MBEDTLS_HARDWARE_SHA 1
@ -63,7 +68,6 @@
#define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv" #define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv"
#define CONFIG_MBEDTLS_HAVE_TIME 1 #define CONFIG_MBEDTLS_HAVE_TIME 1
#define CONFIG_FREERTOS_ISR_STACKSIZE 1536 #define CONFIG_FREERTOS_ISR_STACKSIZE 1536
#define CONFIG_OPTIMIZATION_LEVEL_DEBUG 1
#define CONFIG_SYSTEM_EVENT_QUEUE_SIZE 32 #define CONFIG_SYSTEM_EVENT_QUEUE_SIZE 32
#define CONFIG_ESPTOOLPY_BAUD_921600B 1 #define CONFIG_ESPTOOLPY_BAUD_921600B 1
#define CONFIG_APP_OFFSET 0x10000 #define CONFIG_APP_OFFSET 0x10000
@ -71,5 +75,6 @@
#define CONFIG_MBEDTLS_HARDWARE_MPI 1 #define CONFIG_MBEDTLS_HARDWARE_MPI 1
#define CONFIG_MONITOR_BAUD_OTHER_VAL 115200 #define CONFIG_MONITOR_BAUD_OTHER_VAL 115200
#define CONFIG_ESPTOOLPY_PORT "/dev/tty.SLAB_USBtoUART" #define CONFIG_ESPTOOLPY_PORT "/dev/tty.SLAB_USBtoUART"
#define CONFIG_OPTIMIZATION_LEVEL_RELEASE 1
#define CONFIG_ESP32_PANIC_PRINT_HALT 1 #define CONFIG_ESP32_PANIC_PRINT_HALT 1
#define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_ERROR 1 #define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_ERROR 1

View File

@ -23,6 +23,7 @@
#include "soc/gpio_sig_map.h" #include "soc/gpio_sig_map.h"
#include "rom/gpio.h" #include "rom/gpio.h"
#include "esp_attr.h" #include "esp_attr.h"
#include "esp_intr_alloc.h"
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
@ -203,6 +204,9 @@ typedef enum {
GPIO_FLOATING, /*!< Pad floating */ GPIO_FLOATING, /*!< Pad floating */
} gpio_pull_mode_t; } gpio_pull_mode_t;
typedef intr_handle_t gpio_isr_handle_t;
typedef void (*gpio_event_callback)(gpio_num_t gpio_intr_num); typedef void (*gpio_event_callback)(gpio_num_t gpio_intr_num);
/** /**
@ -343,19 +347,18 @@ esp_err_t gpio_wakeup_disable(gpio_num_t gpio_num);
* Users should know that which CPU is running and then pick a INUM that is not used by system. * Users should know that which CPU is running and then pick a INUM that is not used by system.
* We can find the information of INUM and interrupt level in soc.h. * We can find the information of INUM and interrupt level in soc.h.
* *
* @param gpio_intr_num GPIO interrupt number,check the info in soc.h, and please see the core-isa.h for more details
* @param fn Interrupt handler function. * @param fn Interrupt handler function.
* * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
* @note * ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
* Note that the handler function MUST be defined with attribution of "IRAM_ATTR".
*
* @param arg Parameter for handler function * @param arg Parameter for handler function
* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
* be returned here.
* *
* @return * @return
* - ESP_OK Success ; * - ESP_OK Success ;
* - ESP_ERR_INVALID_ARG GPIO error * - ESP_ERR_INVALID_ARG GPIO error
*/ */
esp_err_t gpio_isr_register(uint32_t gpio_intr_num, void (*fn)(void*), void * arg); esp_err_t gpio_isr_register(void (*fn)(void*), void * arg, int intr_alloc_flags, gpio_isr_handle_t *handle);
@ -415,7 +418,7 @@ esp_err_t gpio_pulldown_dis(gpio_num_t gpio_num);
*/ */
/** /**
*----------EXAMPLE TO CONIFGURE GPIO AS OUTPUT ------------ * *----------EXAMPLE TO CONFIGURE GPIO AS OUTPUT ------------ *
* @code{c} * @code{c}
* gpio_config_t io_conf; * gpio_config_t io_conf;
* io_conf.intr_type = GPIO_INTR_DISABLE; //disable interrupt * io_conf.intr_type = GPIO_INTR_DISABLE; //disable interrupt
@ -428,7 +431,7 @@ esp_err_t gpio_pulldown_dis(gpio_num_t gpio_num);
**/ **/
/** /**
*----------EXAMPLE TO CONIFGURE GPIO AS OUTPUT ------------ * *----------EXAMPLE TO CONFIGURE GPIO AS OUTPUT ------------ *
* @code{c} * @code{c}
* io_conf.intr_type = GPIO_INTR_POSEDGE; //set posedge interrupt * io_conf.intr_type = GPIO_INTR_POSEDGE; //set posedge interrupt
* io_conf.mode = GPIO_MODE_INPUT; //set as input * io_conf.mode = GPIO_MODE_INPUT; //set as input
@ -441,8 +444,7 @@ esp_err_t gpio_pulldown_dis(gpio_num_t gpio_num);
/** /**
*----------EXAMPLE TO SET ISR HANDLER ---------------------- *----------EXAMPLE TO SET ISR HANDLER ----------------------
* @code{c} * @code{c}
* //the first parameter is INUM, you can pick one form interrupt level 1/2 which is not used by the system. * gpio_isr_register(gpio_intr_test,NULL, 0); //hook the isr handler for GPIO interrupt
* gpio_isr_register(18,gpio_intr_test,NULL); //hook the isr handler for GPIO interrupt
* @endcode * @endcode
* @note * @note
* 1. user should arrange the INUMs that used, better not to use a same INUM for different interrupt. * 1. user should arrange the INUMs that used, better not to use a same INUM for different interrupt.

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@ -21,6 +21,7 @@
#include "soc/ledc_struct.h" #include "soc/ledc_struct.h"
#include "driver/gpio.h" #include "driver/gpio.h"
#include "driver/periph_ctrl.h" #include "driver/periph_ctrl.h"
#include "esp_intr_alloc.h"
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
@ -100,6 +101,7 @@ typedef struct {
uint32_t freq_hz; /*!< LEDC timer frequency(Hz)*/ uint32_t freq_hz; /*!< LEDC timer frequency(Hz)*/
} ledc_timer_config_t; } ledc_timer_config_t;
typedef intr_handle_t ledc_isr_handle_t;
/** /**
* @brief LEDC channel configuration * @brief LEDC channel configuration
@ -257,20 +259,20 @@ esp_err_t ledc_set_fade(ledc_mode_t speed_mode, uint32_t channel, uint32_t duty,
/** /**
* @brief register LEDC interrupt handler, the handler is an ISR. * @brief register LEDC interrupt handler, the handler is an ISR.
* The handler will be attached to the same CPU core that this function is running on. * The handler will be attached to the same CPU core that this function is running on.
* @note *
* Users should know that which CPU is running and then pick a INUM that is not used by system.
* We can find the information of INUM and interrupt level in soc.h.
* @param ledc_intr_num LEDC interrupt number, check the info in soc.h, and please see the core-isa.h for more details
* @param fn Interrupt handler function. * @param fn Interrupt handler function.
* @note * @param arg User-supplied argument passed to the handler function.
* Note that the handler function MUST be defined with attribution of "IRAM_ATTR". * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
* @param arg Parameter for handler function * @param arg Parameter for handler function
* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
* be returned here.
* *
* @return * @return
* - ESP_OK Success * - ESP_OK Success
* - ESP_ERR_INVALID_ARG Function pointer error. * - ESP_ERR_INVALID_ARG Function pointer error.
*/ */
esp_err_t ledc_isr_register(uint32_t ledc_intr_num, void (*fn)(void*), void * arg); esp_err_t ledc_isr_register(void (*fn)(void*), void * arg, int intr_alloc_flags, ledc_isr_handle_t *handle);
/** /**
* @brief configure LEDC settings * @brief configure LEDC settings
@ -398,13 +400,8 @@ esp_err_t ledc_bind_channel_timer(ledc_mode_t speed_mode, uint32_t channel, uint
* ----------------EXAMPLE OF LEDC INTERRUPT ------------------ * ----------------EXAMPLE OF LEDC INTERRUPT ------------------
* @code{c} * @code{c}
* //we have fade_end interrupt and counter overflow interrupt. we just give an example of fade_end interrupt here. * //we have fade_end interrupt and counter overflow interrupt. we just give an example of fade_end interrupt here.
* ledc_isr_register(18, ledc_isr_handler, NULL); //hook the isr handler for LEDC interrupt * ledc_isr_register(ledc_isr_handler, NULL, 0); //hook the isr handler for LEDC interrupt
* @endcode * @endcode
* @note
* 1. the first parameter is INUM, you can pick one form interrupt level 1/2 which is not used by the system.
* 2. user should arrange the INUMs that used, better not to use a same INUM for different interrupt source.
* 3. do not pick the INUM that already occupied by the system.
* 4. refer to soc.h to check which INUMs that can be used.
* *
* ----------------EXAMPLE OF INTERRUPT HANDLER --------------- * ----------------EXAMPLE OF INTERRUPT HANDLER ---------------
* @code{c} * @code{c}

View File

@ -12,6 +12,7 @@
#include "soc/pcnt_struct.h" #include "soc/pcnt_struct.h"
#include "soc/gpio_sig_map.h" #include "soc/gpio_sig_map.h"
#include "driver/gpio.h" #include "driver/gpio.h"
#include "esp_intr_alloc.h"
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
@ -76,6 +77,8 @@ typedef struct {
pcnt_channel_t channel; /*!< the PCNT channel */ pcnt_channel_t channel; /*!< the PCNT channel */
} pcnt_config_t; } pcnt_config_t;
typedef intr_handle_t pcnt_isr_handle_t;
/** /**
* @brief Configure Pulse Counter unit * @brief Configure Pulse Counter unit
* *
@ -213,21 +216,19 @@ esp_err_t pcnt_get_event_value(pcnt_unit_t unit, pcnt_evt_type_t evt_type, int16
/** /**
* @brief Register PCNT interrupt handler, the handler is an ISR. * @brief Register PCNT interrupt handler, the handler is an ISR.
* The handler will be attached to the same CPU core that this function is running on. * The handler will be attached to the same CPU core that this function is running on.
* @note
* Users should know that which CPU is running and then pick a INUM that is not used by system.
* We can find the information of INUM and interrupt level in soc.h.
* *
* @param pcnt_intr_num PCNT interrupt number, check the info in soc.h, and please see the core-isa.h for more details
* @param fn Interrupt handler function. * @param fn Interrupt handler function.
* @note
* Note that the handler function MUST be defined with attribution of "IRAM_ATTR".
* @param arg Parameter for handler function * @param arg Parameter for handler function
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
* be returned here.
* *
* @return * @return
* - ESP_OK Success * - ESP_OK Success
* - ESP_ERR_INVALID_ARG Function pointer error. * - ESP_ERR_INVALID_ARG Function pointer error.
*/ */
esp_err_t pcnt_isr_register(uint32_t pcnt_intr_num, void (*fn)(void*), void * arg); esp_err_t pcnt_isr_register(void (*fn)(void*), void * arg, int intr_alloc_flags, pcnt_isr_handle_t *handle);
/** /**
* @brief Configure PCNT pulse signal input pin and control input pin * @brief Configure PCNT pulse signal input pin and control input pin

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@ -117,6 +117,8 @@ typedef struct {
}; };
} rmt_config_t; } rmt_config_t;
typedef intr_handle_t rmt_isr_handle_t;
/** /**
* @brief Set RMT clock divider, channel clock is divided from source clock. * @brief Set RMT clock divider, channel clock is divided from source clock.
* *
@ -566,27 +568,32 @@ esp_err_t rmt_config(rmt_config_t* rmt_param);
* @brief register RMT interrupt handler, the handler is an ISR. * @brief register RMT interrupt handler, the handler is an ISR.
* *
* The handler will be attached to the same CPU core that this function is running on. * The handler will be attached to the same CPU core that this function is running on.
* Users should know that which CPU is running and then pick a INUM that is not used by system. * @note If you already called rmt_driver_install to use system RMT driver,
* We can find the information of INUM and interrupt level in soc.h.
* @note
* If you already called rmt_driver_install to use system RMT driver,
* please do not register ISR handler again. * please do not register ISR handler again.
* *
* @param rmt_intr_num RMT interrupt number, check the info in soc.h, and please see the core-isa.h for more details
*
* @param fn Interrupt handler function. * @param fn Interrupt handler function.
*
* @note
* the handler function MUST be defined with attribution of "IRAM_ATTR".
*
* @param arg Parameter for handler function * @param arg Parameter for handler function
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
* @param handle If non-zero, a handle to later clean up the ISR gets stored here.
* *
* @return * @return
* - ESP_OK Success * - ESP_OK Success
* - ESP_ERR_INVALID_ARG Function pointer error. * - ESP_ERR_INVALID_ARG Function pointer error.
* - ESP_FAIL System driver installed, can not register ISR handler for RMT * - ESP_FAIL System driver installed, can not register ISR handler for RMT
*/ */
esp_err_t rmt_isr_register(uint8_t rmt_intr_num, void (* fn)(void* ), void * arg); esp_err_t rmt_isr_register(void (* fn)(void* ), void * arg, int intr_alloc_flags, rmt_isr_handle_t *handle);
/**
* @brief Deregister previously registered RMT interrupt handler
*
* @param handle Handle obtained from rmt_isr_register
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Handle invalid
*/
esp_err_t rmt_isr_deregister(rmt_isr_handle_t handle);
/** /**
* @brief Fill memory data of channel with given RMT items. * @brief Fill memory data of channel with given RMT items.
@ -727,7 +734,7 @@ esp_err_t rmt_get_ringbuf_handler(rmt_channel_t channel, RingbufHandle_t* buf_ha
* rmt_config(&rmt_tx); * rmt_config(&rmt_tx);
* *
* //install system RMT driver, disable rx ringbuffer for transmitter. * //install system RMT driver, disable rx ringbuffer for transmitter.
* rmt_driver_install(rmt_tx.channel, 0, RMT_INTR_NUM); * rmt_driver_install(rmt_tx.channel, 0, 0);
* } * }
* *
* @endcode * @endcode
@ -747,25 +754,20 @@ esp_err_t rmt_get_ringbuf_handler(rmt_channel_t channel, RingbufHandle_t* buf_ha
* rmt_config(&rmt_rx); * rmt_config(&rmt_rx);
* *
* //install system RMT driver. * //install system RMT driver.
* rmt_driver_install(rmt_rx.channel, 1000, RMT_INTR_NUM); * rmt_driver_install(rmt_rx.channel, 1000, 0);
* } * }
* *
* ----------------EXAMPLE OF RMT INTERRUPT ------------------ * ----------------EXAMPLE OF RMT INTERRUPT ------------------
* @code{c} * @code{c}
* *
* rmt_isr_register(RMT_INTR_NUM, rmt_isr, NULL); //hook the ISR handler for RMT interrupt * rmt_isr_register(rmt_isr, NULL, 0); //hook the ISR handler for RMT interrupt
* @endcode * @endcode
* @note * @note
* 0. If you have called rmt_driver_install, you don't need to set ISR handler any more. * 0. If you have called rmt_driver_install, you don't need to set ISR handler any more.
* 1. the first parameter is INUM, you can pick one form interrupt level 1/2 which is not used by the system.
* 2. user should arrange the INUMs that used, better not to use a same INUM for different interrupt source.
* 3. do not pick the INUM that already occupied by the system.
* 4. refer to soc.h to check which INUMs that can be used.
* *
* ----------------EXAMPLE OF INTERRUPT HANDLER --------------- * ----------------EXAMPLE OF INTERRUPT HANDLER ---------------
* @code{c} * @code{c}
* #include "esp_attr.h" * #include "esp_attr.h"
* //we should add 'IRAM_ATTR' attribution when we declare the isr function
* void IRAM_ATTR rmt_isr_handler(void* arg) * void IRAM_ATTR rmt_isr_handler(void* arg)
* { * {
* //read RMT interrupt status. * //read RMT interrupt status.

View File

@ -27,139 +27,160 @@ extern "C" {
* @brief Pullup/pulldown information for a single GPIO pad * @brief Pullup/pulldown information for a single GPIO pad
*/ */
typedef struct { typedef struct {
uint32_t reg; /*!< Register of Rtc Pad */ uint32_t reg; /*!< Register of RTC pad, or 0 if not an RTC GPIO */
uint32_t mux; /*!< Mux seletct the Rtc pad is Digital Pad or Rtc pad */ uint32_t mux; /*!< Bit mask for selecting digital pad or RTC pad */
uint32_t func; /*!< Select Rtc Pad Func */ uint32_t func; /*!< Shift of pad function (FUN_SEL) field */
uint32_t ie; /*!< Input Enable */ uint32_t ie; /*!< Mask of input enable */
uint32_t pullup; /*!< Pullup Enable */ uint32_t pullup; /*!< Mask of pullup enable */
uint32_t pulldown; /*!< PullDown Enable */ uint32_t pulldown; /*!< Mask of pulldown enable */
int rtc_num; /*!< The Rtc number */ uint32_t slpsel; /*!< If slpsel bit is set, slpie will be used as pad input enabled signal in sleep mode */
uint32_t slpie; /*!< Mask of input enable in sleep mode */
uint32_t hold; /*!< Mask of hold_force bit for RTC IO in RTC_CNTL_HOLD_FORCE_REG */
int rtc_num; /*!< RTC IO number, or -1 if not an RTC GPIO */
} rtc_gpio_desc_t; } rtc_gpio_desc_t;
typedef enum { typedef enum {
RTC_GPIO_MODE_INPUT_ONLY , /*!< Pad output */ RTC_GPIO_MODE_INPUT_ONLY , /*!< Pad output */
RTC_GPIO_MODE_OUTPUT_ONLY, /*!< Pad input */ RTC_GPIO_MODE_OUTPUT_ONLY, /*!< Pad input */
RTC_GPIO_MODE_INPUT_OUTUT, /*!< Pad pull output + input */ RTC_GPIO_MODE_INPUT_OUTUT, /*!< Pad pull output + input */
RTC_GPIO_MODE_DISABLED, /*!< Pad (output + input) disable */ RTC_GPIO_MODE_DISABLED, /*!< Pad (output + input) disable */
} rtc_gpio_mode_t; } rtc_gpio_mode_t;
#define RTC_GPIO_IS_VALID_GPIO(gpio_num) ((gpio_num < GPIO_PIN_COUNT && rtc_gpio_desc[gpio_num].reg != 0)) //to decide whether it is a valid GPIO number #define RTC_GPIO_IS_VALID_GPIO(gpio_num) ((gpio_num < GPIO_PIN_COUNT && rtc_gpio_desc[gpio_num].reg != 0)) //to decide whether it is a valid GPIO number
extern const rtc_gpio_desc_t rtc_gpio_desc[GPIO_PIN_COUNT] ; extern const rtc_gpio_desc_t rtc_gpio_desc[GPIO_PIN_COUNT];
/* /**
* @brief Init a gpio as rtc gpio * @brief Init a GPIO as RTC GPIO
* *
* when init a pad as analog function,need to call this funciton * This function must be called when initializing a pad for an analog function.
* *
* @param gpio_num gpio_num GPIO number. If you want to set the trigger type of e.g. of GPIO16, gpio_num should be GPIO_NUM_12 (12); * @param gpio_num GPIO number (e.g. GPIO_NUM_12)
* *
* @return * @return
* - ESP_OK success * - ESP_OK success
* - ESP_ERR_INVALID_ARG Parameter error * - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
*/ */
esp_err_t rtc_gpio_init(gpio_num_t gpio_num); esp_err_t rtc_gpio_init(gpio_num_t gpio_num);
/** /**
* @brief Init a gpio as digital gpio * @brief Init a GPIO as digital GPIO
* *
* @param gpio_num gpio_num GPIO number. If you want to set the trigger type of e.g. of GPIO16, gpio_num should be GPIO_NUM_12 (12); * @param gpio_num GPIO number (e.g. GPIO_NUM_12)
* *
* @return * @return
* - ESP_OK success * - ESP_OK success
* - ESP_ERR_INVALID_ARG Parameter error * - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
*/ */
esp_err_t rtc_gpio_deinit(gpio_num_t gpio_num); esp_err_t rtc_gpio_deinit(gpio_num_t gpio_num);
/** /**
* @brief Get the rtc io input level * @brief Get the RTC IO input level
* *
* @param gpio_num gpio_num GPIO number. If you want to set the trigger type of e.g. of GPIO16, gpio_num should be GPIO_NUM_12 (12); * @param gpio_num GPIO number (e.g. GPIO_NUM_12)
* *
* @return * @return
* - 1 High level * - 1 High level
* - 0 Low level * - 0 Low level
* - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
*/ */
uint32_t rtc_gpio_get_level(gpio_num_t gpio_num); uint32_t rtc_gpio_get_level(gpio_num_t gpio_num);
/** /**
* @brief Set the rtc io output level * @brief Set the RTC IO output level
* *
* @param gpio_num GPIO number. If you want to set the trigger type of e.g. of GPIO16, gpio_num should be GPIO_NUM_12 (12); * @param gpio_num GPIO number (e.g. GPIO_NUM_12)
* @param level output level; * @param level output level
* *
* @return * @return
* - 1 High level * - ESP_OK Success
* - 0 Low level * - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
*/ */
esp_err_t rtc_gpio_set_level(gpio_num_t gpio_num, uint32_t level); esp_err_t rtc_gpio_set_level(gpio_num_t gpio_num, uint32_t level);
/** /**
* @brief Rtc gpio set direction * @brief RTC GPIO set direction
* *
* Configure Rtc gpio direction,such as output_only,input_only,output_and_input * Configure RTC GPIO direction, such as output only, input only,
* output and input.
* *
* @param gpio_num Configure GPIO pins number, it should be GPIO number. If you want to set direction of e.g. GPIO12, gpio_num should be GPIO_NUM_12 (12); * @param gpio_num GPIO number (e.g. GPIO_NUM_12)
* @param mode GPIO direction * @param mode GPIO direction
* *
* @return * @return
* - ESP_OK Success * - ESP_OK Success
* - ESP_ERR_INVALID_ARG GPIO error * - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
*/ */
esp_err_t rtc_gpio_set_direction(gpio_num_t gpio_num, rtc_gpio_mode_t mode); esp_err_t rtc_gpio_set_direction(gpio_num_t gpio_num, rtc_gpio_mode_t mode);
/** /**
* @brief Rtc gpio pullup enable * @brief RTC GPIO pullup enable
* *
* If the user needs to configure the GPIO pull ,Please call gpio_set_pull_mode.This function will be called in gpio_set_pull * This function only works for RTC IOs. In general, call gpio_pullup_en,
* which will work both for normal GPIOs and RTC IOs.
* *
* @param gpio_num GPIO number. If you want to set pull up or down mode for e.g. GPIO12, gpio_num should be GPIO_NUM_12 (12); * @param gpio_num GPIO number (e.g. GPIO_NUM_12)
* *
* @return * @return
* - True the gpio number is Rts pad * - ESP_OK Success
* - False the gpio number is Digital pad * - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
*/ */
esp_err_t rtc_gpio_pullup_en(gpio_num_t gpio_num); esp_err_t rtc_gpio_pullup_en(gpio_num_t gpio_num);
/** /**
* @brief Rtc gpio pulldown enable * @brief RTC GPIO pulldown enable
* *
* If the user needs to configure the GPIO pull ,Please call gpio_set_pull_mode.This function will be called in gpio_set_pull * This function only works for RTC IOs. In general, call gpio_pulldown_en,
* which will work both for normal GPIOs and RTC IOs.
* *
* @param gpio_num GPIO number. If you want to set pull up or down mode for e.g. GPIO12, gpio_num should be GPIO_NUM_12 (12); * @param gpio_num GPIO number (e.g. GPIO_NUM_12)
* *
* @return * @return
* - True the gpio number is Rts pad * - ESP_OK Success
* - False the gpio number is Digital pad * - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
*/ */
esp_err_t rtc_gpio_pulldown_en(gpio_num_t gpio_num); esp_err_t rtc_gpio_pulldown_en(gpio_num_t gpio_num);
/** /**
* @brief Rtc gpio pullup clear * @brief RTC GPIO pullup disable
* *
* If the user needs to configure the GPIO pull ,Please call gpio_set_pull_mode.This function will be called in gpio_set_pull * This function only works for RTC IOs. In general, call gpio_pullup_dis,
* which will work both for normal GPIOs and RTC IOs.
* *
* @param gpio_num GPIO number. If you want to set pull up or down mode for e.g. GPIO12, gpio_num should be GPIO_NUM_12 (12); * @param gpio_num GPIO number (e.g. GPIO_NUM_12)
* *
* @return * @return
* - True the gpio number is Rts pad * - ESP_OK Success
* - False the gpio number is Digital pad * - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
*/ */
esp_err_t rtc_gpio_pullup_dis(gpio_num_t gpio_num); esp_err_t rtc_gpio_pullup_dis(gpio_num_t gpio_num);
/** /**
* @brief Rtc gpio pulldown clear * @brief RTC GPIO pulldown disable
* *
* If the user needs to configure the GPIO pull ,Please call gpio_set_pull_mode.This function will be called in gpio_set_pull * This function only works for RTC IOs. In general, call gpio_pulldown_dis,
* which will work both for normal GPIOs and RTC IOs.
* *
* @param gpio_num GPIO number. If you want to set pull up or down mode for e.g. GPIO12, gpio_num should be GPIO_NUM_12 (12); * @param gpio_num GPIO number (e.g. GPIO_NUM_12)
* *
* @return * @return
* - True the gpio number is Rts pad * - ESP_OK Success
* - False the gpio number is Digital pad * - ESP_ERR_INVALID_ARG GPIO is not an RTC IO
*/ */
esp_err_t rtc_gpio_pulldown_dis(gpio_num_t gpio_num); esp_err_t rtc_gpio_pulldown_dis(gpio_num_t gpio_num);
/**
* @brief Disable "hold" signal for all RTC IOs
*
* Each RTC pad has a "hold" input signal from the RTC controller.
* If hold signal is set, pad latches current values of input enable,
* function, output enable, and other signals which come from the RTC mux.
* Hold signal is enabled before going into deep sleep for pins which
* are used for EXT1 wakeup.
*/
void rtc_gpio_unhold_all();
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

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@ -0,0 +1,108 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef __DRIVER_SIGMADELTA_H__
#define __DRIVER_SIGMADELTA_H__
#include <esp_types.h>
#include "soc/gpio_sd_struct.h"
#include "soc/gpio_sd_reg.h"
#include "driver/gpio.h"
#ifdef _cplusplus
extern "C" {
#endif
/**
* @brief Sigma-delta channel list
*/
typedef enum{
SIGMADELTA_CHANNEL_0 = 0, /*!< Sigma-delta channel0 */
SIGMADELTA_CHANNEL_1 = 1, /*!< Sigma-delta channel1 */
SIGMADELTA_CHANNEL_2 = 2, /*!< Sigma-delta channel2 */
SIGMADELTA_CHANNEL_3 = 3, /*!< Sigma-delta channel3 */
SIGMADELTA_CHANNEL_4 = 4, /*!< Sigma-delta channel4 */
SIGMADELTA_CHANNEL_5 = 5, /*!< Sigma-delta channel5 */
SIGMADELTA_CHANNEL_6 = 6, /*!< Sigma-delta channel6 */
SIGMADELTA_CHANNEL_7 = 7, /*!< Sigma-delta channel7 */
SIGMADELTA_CHANNEL_MAX,
} sigmadelta_channel_t;
/**
* @brief Sigma-delta configure struct
*/
typedef struct {
sigmadelta_channel_t channel; /*!< Sigma-delta channel number */
int8_t sigmadelta_duty; /*!< Sigma-delta duty, duty ranges from -128 to 127. */
uint8_t sigmadelta_prescale; /*!< Sigma-delta prescale, prescale ranges from 0 to 255. */
uint8_t sigmadelta_gpio; /*!< Sigma-delta output io number, refer to gpio.h for more details. */
} sigmadelta_config_t;
/**
* @brief Configure Sigma-delta channel
*
* @param config Pointer of Sigma-delta channel configuration struct
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
*/
esp_err_t sigmadelta_config(sigmadelta_config_t *config);
/**
* @brief Set Sigma-delta channel duty.
*
* This function is used to set Sigma-delta channel duty,
* If you add a capacitor between the output pin and ground,
* the average output voltage Vdc = VDDIO / 256 * duty + VDDIO/2, VDDIO is power supply voltage.
*
* @param channel Sigma-delta channel number
* @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
* The waveform is more like a random one in this range.
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
*/
esp_err_t sigmadelta_set_duty(sigmadelta_channel_t channel, int8_t duty);
/**
* @brief Set Sigma-delta channel's clock pre-scale value.
* The source clock is APP_CLK, 80MHz. The clock frequency of the sigma-delta channel is APP_CLK / pre_scale
*
* @param channel Sigma-delta channel number
* @param prescale The divider of source clock, ranges from 0 to 255
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
*/
esp_err_t sigmadelta_set_prescale(sigmadelta_channel_t channel, uint8_t prescale);
/**
* @brief Set Sigma-delta signal output pin
*
* @param channel Sigma-delta channel number
* @param gpio_num GPIO number of output pin.
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
*/
esp_err_t sigmadelta_set_pin(sigmadelta_channel_t channel, gpio_num_t gpio_num);
#ifdef _cplusplus
}
#endif
#endif

View File

@ -19,6 +19,7 @@
#include "soc/soc.h" #include "soc/soc.h"
#include "soc/timer_group_reg.h" #include "soc/timer_group_reg.h"
#include "soc/timer_group_struct.h" #include "soc/timer_group_struct.h"
#include "esp_intr_alloc.h"
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
@ -94,12 +95,19 @@ typedef enum {
typedef struct { typedef struct {
bool alarm_en; /*!< Timer alarm enable */ bool alarm_en; /*!< Timer alarm enable */
bool counter_en; /*!< Counter enable */ bool counter_en; /*!< Counter enable */
timer_count_dir_t counter_dir; /*!< Counter direction */
timer_intr_mode_t intr_type; /*!< Interrupt mode */ timer_intr_mode_t intr_type; /*!< Interrupt mode */
timer_count_dir_t counter_dir; /*!< Counter direction */
bool auto_reload; /*!< Timer auto-reload */ bool auto_reload; /*!< Timer auto-reload */
uint16_t divider; /*!< Counter clock divider*/ uint16_t divider; /*!< Counter clock divider*/
} timer_config_t; } timer_config_t;
/**
* @brief Interrupt handle, used in order to free the isr after use.
* Aliases to an int handle for now.
*/
typedef intr_handle_t timer_isr_handle_t;
/** /**
* @brief Read the counter value of hardware timer. * @brief Read the counter value of hardware timer.
* *
@ -245,21 +253,20 @@ esp_err_t timer_set_alarm(timer_group_t group_num, timer_idx_t timer_num, timer_
/** /**
* @brief register Timer interrupt handler, the handler is an ISR. * @brief register Timer interrupt handler, the handler is an ISR.
* The handler will be attached to the same CPU core that this function is running on. * The handler will be attached to the same CPU core that this function is running on.
* @note
* Users should know that which CPU is running and then pick a INUM that is not used by system.
* We can find the information of INUM and interrupt level in soc.h.
* *
* @param group_num Timer group number * @param group_num Timer group number
* @param timer_num Timer index of timer group * @param timer_num Timer index of timer group
* @param timer_intr_num TIMER interrupt number, check the info in soc.h, and please see the core-isa.h for more details
* @param intr_type Timer interrupt type
* @param fn Interrupt handler function. * @param fn Interrupt handler function.
* @note * @note
* Code inside the handler function can only call functions in IRAM, so cannot call other timer APIs. * In case the this is called with the INIRAM flag, code inside the handler function can
* Use direct register access to access timers from inside the ISR. * only call functions in IRAM, so it cannot call other timer APIs.
* Use direct register access to access timers from inside the ISR in this case.
* *
* @param arg Parameter for handler function * @param arg Parameter for handler function
* * @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
* be returned here.
* @return * @return
* - ESP_OK Success * - ESP_OK Success
* - ESP_ERR_INVALID_ARG Function pointer error. * - ESP_ERR_INVALID_ARG Function pointer error.
@ -268,7 +275,7 @@ esp_err_t timer_set_alarm(timer_group_t group_num, timer_idx_t timer_num, timer_
* - ESP_OK Success * - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error * - ESP_ERR_INVALID_ARG Parameter error
*/ */
esp_err_t timer_isr_register(timer_group_t group_num, timer_idx_t timer_num, int timer_intr_num, timer_intr_mode_t intr_type, void (*fn)(void*), void * arg); esp_err_t timer_isr_register(timer_group_t group_num, timer_idx_t timer_num, void (*fn)(void*), void * arg, int intr_alloc_flags, timer_isr_handle_t *handle);
/** @brief Initializes and configure the timer. /** @brief Initializes and configure the timer.
* *

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@ -19,6 +19,7 @@ extern "C" {
#endif #endif
#include "esp_intr.h" #include "esp_intr.h"
#include "esp_err.h" #include "esp_err.h"
#include "esp_intr_alloc.h"
#define TOUCH_PAD_SLEEP_CYCLE_CONFIG (0x1000)//The Time is 150Khz,the Max value is 0xffff #define TOUCH_PAD_SLEEP_CYCLE_CONFIG (0x1000)//The Time is 150Khz,the Max value is 0xffff
#define TOUCH_PAD_MEASURE_CYCLE_CONFIG (0xffff)//The Time is 8Mhz,the Max value is 0xffff #define TOUCH_PAD_MEASURE_CYCLE_CONFIG (0xffff)//The Time is 8Mhz,the Max value is 0xffff
typedef enum { typedef enum {
@ -34,6 +35,9 @@ typedef enum {
TOUCH_PAD_NUM9, /*!< Touch pad channel 0 is GPIO32*/ TOUCH_PAD_NUM9, /*!< Touch pad channel 0 is GPIO32*/
TOUCH_PAD_MAX, TOUCH_PAD_MAX,
} touch_pad_t; } touch_pad_t;
typedef intr_handle_t touch_isr_handle_t;
/** /**
* @brief Initialize touch module. * @brief Initialize touch module.
* *
@ -79,44 +83,40 @@ esp_err_t touch_pad_read(touch_pad_t touch_num, uint16_t * touch_value);
/** /**
* @brief register TouchPad interrupt handler, the handler is an ISR. * @brief register TouchPad interrupt handler, the handler is an ISR.
* The handler will be attached to the same CPU core that this function is running on. * The handler will be attached to the same CPU core that this function is running on.
* @note
* Users should know that which CPU is running and then pick a INUM that is not used by system.
* We can find the information of INUM and interrupt level in soc.h.
* *
* @param touch_intr_num Touch interrupt number,check the info in soc.h, and please see the core-isa.h for more details
* @param fn Interrupt handler function. * @param fn Interrupt handler function.
*
* @note
* Note that the handler function MUST be defined with attribution of "IRAM_ATTR".
*
* @param arg Parameter for handler function * @param arg Parameter for handler function
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
* be returned here.
* *
* @return * @return
* - ESP_OK Success ; * - ESP_OK Success ;
* - ESP_ERR_INVALID_ARG GPIO error * - ESP_ERR_INVALID_ARG GPIO error
*/ */
esp_err_t touch_pad_isr_handler_register(uint32_t touch_intr_num, void(*fn)(void*), void *arg); esp_err_t touch_pad_isr_handler_register(void(*fn)(void *), void *arg, int intr_alloc_flags, touch_isr_handle_t *handle);
/** /**
* *************** ATTENTION ********************/ * *************** ATTENTION ********************/
/** /**
*@attention *@attention
*Touch button is through the body's capacitive characteristics, *Touch button is through the body's capacitive characteristics,
*there is a charge discharge circuit inside the. When the hands touch, *there is a charge discharge circuit inside the. When the hands touch,
*the charge and discharge time will be slow. *the charge and discharge time will be slow.
*Because of the different hardware, each pad needs to be calibrated at the factory. *Because of the different hardware, each pad needs to be calibrated at the factory.
*We use touch_pad_read to determine factory parament. *We use touch_pad_read to determine factory parameters.
*/ */
/** /**
*----------EXAMPLE TO CONIFGURE GPIO AS OUTPUT ------------ * *----------EXAMPLE TO CONFIGURE GPIO AS OUTPUT ------------ *
* @code{c} * @code{c}
* touch_pad_init(); * touch_pad_init();
* void taskA(void* arg) * void taskA(void* arg)
* { * {
* for(;;){ * for(;;){
* vtaskDelay(20/portTICK_PERIOD_MS); * vtaskDelay(20/portTICK_PERIOD_MS);
* ets_printf("tocuch pad value %u\n",touch_pad_read(0));//Take the touched status and untouched status value * ets_printf("touch pad value %u\n",touch_pad_read(0));//Take the touched status and untouched status value
* } * }
* } * }
* @endcode * @endcode
@ -124,22 +124,17 @@ esp_err_t touch_pad_isr_handler_register(uint32_t touch_intr_num, void(*fn)(void
/** /**
*----------EXAMPLE TO SET ISR HANDLER ---------------------- *----------EXAMPLE TO SET ISR HANDLER ----------------------
* @code{c} * @code{c}
* //the first parameter is INUM, you can pick one form interrupt level 1/2 which is not used by the system. * touch_pad_isr_handler_register(rtc_intr,NULL, 0, NULL) //hook the isr handler for TouchPad interrupt
* touch_pad_isr_handler_register(19,rtc_intr,NULL); //hook the isr handler for TouchPad interrupt
* @endcode * @endcode
* @note
* 1. user should arrange the INUMs that used, better not to use a same INUM for different interrupt.
* 2. do not pick the INUM that already occupied by the system.
* 3. refer to soc.h to check which INUMs that can be used.
*/ */
/** /**
*----------EXAMPLE TO USE TOUCH_PAD------------ * *----------EXAMPLE TO USE TOUCH_PAD------------ *
* @code{c} * @code{c}
* touch_pad_init();//only init one time * touch_pad_init();//only init one time
* touch_pad_config(0,300);//set the intr threshold,use touch_pad_read to determine this threshold * touch_pad_config(0,300);//set the intr threshold,use touch_pad_read to determine this threshold
* touch_pad_isr_handler_register(19,rtc_intr,NULL) * touch_pad_isr_handler_register(rtc_intr,NULL, 0, NULL)
* #include "esp_attr.h" * #include "esp_attr.h"
* void IRAM_ATTR rtc_intr(void * arg) * void rtc_intr(void * arg)
* { * {
* uint32_t pad_intr = READ_PERI_REG(SARADC_SAR_TOUCH_CTRL2_REG) & 0x3ff; * uint32_t pad_intr = READ_PERI_REG(SARADC_SAR_TOUCH_CTRL2_REG) & 0x3ff;
* uint8_t i = 0; * uint8_t i = 0;

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@ -0,0 +1,233 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#include "esp_err.h"
#include "driver/gpio.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Logic function used for EXT1 wakeup mode.
*/
typedef enum {
ESP_EXT1_WAKEUP_ALL_LOW = 0, //!< Wake the chip when all selected GPIOs go low
ESP_EXT1_WAKEUP_ANY_HIGH = 1 //!< Wake the chip when any of the selected GPIOs go high
} esp_ext1_wakeup_mode_t;
/**
* @brief Power domains which can be powered down in deep sleep
*/
typedef enum {
ESP_PD_DOMAIN_RTC_PERIPH, //!< RTC IO, sensors and ULP co-processor
ESP_PD_DOMAIN_RTC_SLOW_MEM, //!< RTC slow memory
ESP_PD_DOMAIN_RTC_FAST_MEM, //!< RTC fast memory
ESP_PD_DOMAIN_MAX //!< Number of domains
} esp_deep_sleep_pd_domain_t;
/**
* @brief Power down options
*/
typedef enum {
ESP_PD_OPTION_OFF, //!< Power down the power domain in deep sleep
ESP_PD_OPTION_ON, //!< Keep power domain enabled during deep sleep
ESP_PD_OPTION_AUTO //!< Keep power domain enabled in deep sleep, if it is needed by one of the wakeup options. Otherwise power it down.
} esp_deep_sleep_pd_option_t;
/**
* @brief Enable wakeup by ULP coprocessor
* @return
* - ESP_OK on success
* - ESP_ERR_INVALID_STATE if ULP co-processor is not enabled.
*/
esp_err_t esp_deep_sleep_enable_ulp_wakeup();
/**
* @brief Enable wakeup by timer
* @param time_in_us time before wakeup, in microseconds
* @return
* - ESP_OK on success
* - ESP_ERR_INVALID_ARG if value is out of range (TBD)
*/
esp_err_t esp_deep_sleep_enable_timer_wakeup(uint64_t time_in_us);
/**
* @brief Enable wakeup using a pin
*
* This function uses external wakeup feature of RTC_IO peripheral.
* It will work only if RTC peripherals are kept on during deep sleep.
*
* This feature can monitor any pin which is an RTC IO. Once the pin transitions
* into the state given by level argument, the chip will be woken up.
*
* @note This function does not modify pin configuration. The pin is
* configured in esp_deep_sleep_start, immediately before
* entering deep sleep.
*
* @param gpio_num GPIO number used as wakeup source. Only GPIOs which are have RTC
* functionality can be used: 0,2,4,12-15,25-27,32-39.
* @param level input level which will trigger wakeup (0=low, 1=high)
* @return
* - ESP_OK on success
* - ESP_ERR_INVALID_ARG if the selected GPIO is not an RTC GPIO,
* or the mode is invalid
*/
esp_err_t esp_deep_sleep_enable_ext0_wakeup(gpio_num_t gpio_num, int level);
/**
* @brief Enable wakeup using multiple pins
*
* This function uses external wakeup feature of RTC controller.
* It will work even if RTC peripherals are shut down during deep sleep.
*
* This feature can monitor any number of pins which are in RTC IOs.
* Once any of the selected pins goes into the state given by mode argument,
* the chip will be woken up.
*
* @note This function does not modify pin configuration. The pins are
* configured in esp_deep_sleep_start, immediately before
* entering deep sleep.
*
* @note internal pullups and pulldowns don't work when RTC peripherals are
* shut down. In this case, external resistors need to be added.
* Alternatively, RTC peripherals (and pullups/pulldowns) may be
* kept enabled using esp_deep_sleep_pd_config function.
*
* @param mask bit mask of GPIO numbers which will cause wakeup. Only GPIOs
* which are have RTC functionality can be used in this bit map:
* 0,2,4,12-15,25-27,32-39.
* @param mode select logic function used to determine wakeup condition:
* - ESP_EXT1_WAKEUP_ALL_LOW: wake up when all selected GPIOs are low
* - ESP_EXT1_WAKEUP_ANY_HIGH: wake up when any of the selected GPIOs is high
* @return
* - ESP_OK on success
* - ESP_ERR_INVALID_ARG if any of the selected GPIOs is not an RTC GPIO,
* or mode is invalid
*/
esp_err_t esp_deep_sleep_enable_ext1_wakeup(uint64_t mask, esp_ext1_wakeup_mode_t mode);
/**
* @brief Get the bit mask of GPIOs which caused wakeup (ext1)
*
* If wakeup was caused by another source, this function will return 0.
*
* @return bit mask, if GPIOn caused wakeup, BIT(n) will be set
*/
uint64_t esp_deep_sleep_get_ext1_wakeup_status();
/**
* @brief Set power down mode for an RTC power domain in deep sleep
*
* If not set set using this API, all power domains default to ESP_PD_OPTION_AUTO.
*
* @param domain power domain to configure
* @param option power down option (ESP_PD_OPTION_OFF, ESP_PD_OPTION_ON, or ESP_PD_OPTION_AUTO)
* @return
* - ESP_OK on success
* - ESP_ERR_INVALID_ARG if either of the arguments is out of range
*/
esp_err_t esp_deep_sleep_pd_config(esp_deep_sleep_pd_domain_t domain,
esp_deep_sleep_pd_option_t option);
/**
* @brief Enter deep sleep with the configured wakeup options
*
* This function does not return.
*/
void esp_deep_sleep_start() __attribute__((noreturn));
/**
* @brief Enter deep-sleep mode
*
* The device will automatically wake up after the deep-sleep time
* Upon waking up, the device calls deep sleep wake stub, and then proceeds
* to load application.
*
* Call to this function is equivalent to a call to esp_deep_sleep_enable_timer_wakeup
* followed by a call to esp_deep_sleep_start.
*
* This function does not return.
*
* @param time_in_us deep-sleep time, unit: microsecond
*/
void esp_deep_sleep(uint64_t time_in_us) __attribute__((noreturn));
/**
* @brief Enter deep-sleep mode
*
* Function has been renamed to esp_deep_sleep.
* This name is deprecated and will be removed in a future version.
*
* @param time_in_us deep-sleep time, unit: microsecond
*/
void system_deep_sleep(uint64_t time_in_us) __attribute__((noreturn, deprecated));
/**
* @brief Default stub to run on wake from deep sleep.
*
* Allows for executing code immediately on wake from sleep, before
* the software bootloader or ESP-IDF app has started up.
*
* This function is weak-linked, so you can implement your own version
* to run code immediately when the chip wakes from
* sleep.
*
* See docs/deep-sleep-stub.rst for details.
*/
void esp_wake_deep_sleep(void);
/**
* @brief Function type for stub to run on wake from sleep.
*
*/
typedef void (*esp_deep_sleep_wake_stub_fn_t)(void);
/**
* @brief Install a new stub at runtime to run on wake from deep sleep
*
* If implementing esp_wake_deep_sleep() then it is not necessary to
* call this function.
*
* However, it is possible to call this function to substitute a
* different deep sleep stub. Any function used as a deep sleep stub
* must be marked RTC_IRAM_ATTR, and must obey the same rules given
* for esp_wake_deep_sleep().
*/
void esp_set_deep_sleep_wake_stub(esp_deep_sleep_wake_stub_fn_t new_stub);
/**
* @brief Get current wake from deep sleep stub
* @return Return current wake from deep sleep stub, or NULL if
* no stub is installed.
*/
esp_deep_sleep_wake_stub_fn_t esp_get_deep_sleep_wake_stub(void);
/**
* @brief The default esp-idf-provided esp_wake_deep_sleep() stub.
*
* See docs/deep-sleep-stub.rst for details.
*/
void esp_default_wake_deep_sleep(void);
#ifdef __cplusplus
}
#endif

View File

@ -1,114 +1,2 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD #warning esp_deepsleep.h has been renamed to esp_deep_sleep.h, please update include directives
// #include "esp_deep_sleep.h"
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef __ESP_DEEPSLEEP_H__
#define __ESP_DEEPSLEEP_H_
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup Deep_Sleep_API Deep Sleep API
* @brief API for putting device into deep sleep
*/
/** @addtogroup Deep_Sleep_API
* @{
*/
/**
* @brief Enter deep-sleep mode
*
* The device will automatically wake up after the deep-sleep time
* Upon waking up, the device calls deep sleep wake stub, and then proceeds
* to load application.
*
* This function does not return.
*
* @param time_in_us deep-sleep time, unit: microsecond
*/
void esp_deep_sleep(uint64_t time_in_us) __attribute__((noreturn));
/**
* @brief Enter deep-sleep mode
*
* Function has been renamed to esp_deep_sleep.
* This name is deprecated and will be removed in a future version.
*
* @param time_in_us deep-sleep time, unit: microsecond
*/
void system_deep_sleep(uint64_t time_in_us) __attribute__((noreturn, deprecated));
/**
* @brief Default stub to run on wake from deep sleep.
*
* Allows for executing code immediately on wake from sleep, before
* the software bootloader or ESP-IDF app has started up.
*
* This function is weak-linked, so you can implement your own version
* to run code immediately when the chip wakes from
* sleep.
*
* See docs/deep-sleep-stub.rst for details.
*/
void esp_wake_deep_sleep(void);
/**
* @brief Function type for stub to run on wake from sleep.
*
*/
typedef void (*esp_deep_sleep_wake_stub_fn_t)(void);
/**
* @brief Install a new stub at runtime to run on wake from deep sleep
*
* If implementing esp_wake_deep_sleep() then it is not necessary to
* call this function.
*
* However, it is possible to call this function to substitute a
* different deep sleep stub. Any function used as a deep sleep stub
* must be marked RTC_IRAM_ATTR, and must obey the same rules given
* for esp_wake_deep_sleep().
*/
void esp_set_deep_sleep_wake_stub(esp_deep_sleep_wake_stub_fn_t new_stub);
/**
* @brief Return current wake from deep sleep stub, or NULL if
* no stub is installed.
*/
esp_deep_sleep_wake_stub_fn_t esp_get_deep_sleep_wake_stub(void);
/* The default esp-idf-provided esp_wake_deep_sleep() stub.
See docs/deep-sleep-stub.rst for details.
*/
void esp_default_wake_deep_sleep(void);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __ESP_SYSTEM_H__ */

View File

@ -47,9 +47,24 @@ typedef struct {
uint8_t subtype; uint8_t subtype;
esp_partition_pos_t pos; esp_partition_pos_t pos;
uint8_t label[16]; uint8_t label[16];
uint8_t reserved[4]; uint32_t flags;
} esp_partition_info_t; } esp_partition_info_t;
#define PART_TYPE_APP 0x00
#define PART_SUBTYPE_FACTORY 0x00
#define PART_SUBTYPE_OTA_FLAG 0x10
#define PART_SUBTYPE_OTA_MASK 0x0f
#define PART_SUBTYPE_TEST 0x20
#define PART_TYPE_DATA 0x01
#define PART_SUBTYPE_DATA_OTA 0x00
#define PART_SUBTYPE_DATA_RF 0x01
#define PART_SUBTYPE_DATA_WIFI 0x02
#define PART_TYPE_END 0xff
#define PART_SUBTYPE_END 0xff
#define PART_FLAG_ENCRYPTED (1<<0)
#ifdef __cplusplus #ifdef __cplusplus
} }

View File

@ -14,21 +14,65 @@
#ifndef HEAP_ALLOC_CAPS_H #ifndef HEAP_ALLOC_CAPS_H
#define HEAP_ALLOC_CAPS_H #define HEAP_ALLOC_CAPS_H
#define MALLOC_CAP_EXEC (1<<0) //Memory must be able to run executable code /**
#define MALLOC_CAP_32BIT (1<<1) //Memory must allow for aligned 32-bit data accesses * @brief Flags to indicate the capabilities of the various memory systems
#define MALLOC_CAP_8BIT (1<<2) //Memory must allow for 8/16/...-bit data accesses */
#define MALLOC_CAP_DMA (1<<3) //Memory must be able to accessed by DMA #define MALLOC_CAP_EXEC (1<<0) ///< Memory must be able to run executable code
#define MALLOC_CAP_PID2 (1<<4) //Memory must be mapped to PID2 memory space #define MALLOC_CAP_32BIT (1<<1) ///< Memory must allow for aligned 32-bit data accesses
#define MALLOC_CAP_PID3 (1<<5) //Memory must be mapped to PID3 memory space #define MALLOC_CAP_8BIT (1<<2) ///< Memory must allow for 8/16/...-bit data accesses
#define MALLOC_CAP_PID4 (1<<6) //Memory must be mapped to PID4 memory space #define MALLOC_CAP_DMA (1<<3) ///< Memory must be able to accessed by DMA
#define MALLOC_CAP_PID5 (1<<7) //Memory must be mapped to PID5 memory space #define MALLOC_CAP_PID2 (1<<4) ///< Memory must be mapped to PID2 memory space
#define MALLOC_CAP_PID6 (1<<8) //Memory must be mapped to PID6 memory space #define MALLOC_CAP_PID3 (1<<5) ///< Memory must be mapped to PID3 memory space
#define MALLOC_CAP_PID7 (1<<9) //Memory must be mapped to PID7 memory space #define MALLOC_CAP_PID4 (1<<6) ///< Memory must be mapped to PID4 memory space
#define MALLOC_CAP_SPISRAM (1<<10) //Memory must be in SPI SRAM #define MALLOC_CAP_PID5 (1<<7) ///< Memory must be mapped to PID5 memory space
#define MALLOC_CAP_INVALID (1<<31) //Memory can't be used / list end marker #define MALLOC_CAP_PID6 (1<<8) ///< Memory must be mapped to PID6 memory space
#define MALLOC_CAP_PID7 (1<<9) ///< Memory must be mapped to PID7 memory space
#define MALLOC_CAP_SPISRAM (1<<10) ///< Memory must be in SPI SRAM
#define MALLOC_CAP_INVALID (1<<31) ///< Memory can't be used / list end marker
/**
* @brief Initialize the capability-aware heap allocator.
*
* For the ESP32, this is called once in the startup code.
*/
void heap_alloc_caps_init(); void heap_alloc_caps_init();
/**
* @brief Allocate a chunk of memory which has the given capabilities
*
* @param xWantedSize Size, in bytes, of the amount of memory to allocate
* @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type
* of memory to be returned
*
* @return A pointer to the memory allocated on success, NULL on failure
*/
void *pvPortMallocCaps(size_t xWantedSize, uint32_t caps); void *pvPortMallocCaps(size_t xWantedSize, uint32_t caps);
/**
* @brief Get the total free size of all the regions that have the given capabilities
*
* This function takes all regions capable of having the given capabilities allocated in them
* and adds up the free space they have.
*
* @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type
* of memory
*
* @return Amount of free bytes in the regions
*/
size_t xPortGetFreeHeapSizeCaps( uint32_t caps );
/**
* @brief Get the total minimum free memory of all regions with the given capabilities
*
* This adds all the lowmarks of the regions capable of delivering the memory with the
* given capabilities
*
* @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type
* of memory
*
* @return Amount of free bytes in the regions
*/
size_t xPortGetMinimumEverFreeHeapSizeCaps( uint32_t caps );
#endif #endif

View File

@ -0,0 +1,267 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef __ESP_INTR_ALLOC_H__
#define __ESP_INTR_ALLOC_H__
#include <stdint.h>
#include <stdbool.h>
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup Intr_Alloc
* @{
*/
/** @brief Interrupt allocation flags
*
* These flags can be used to specify which interrupt qualities the
* code calling esp_intr_alloc* needs.
*
*/
//Keep the LEVELx values as they are here; they match up with (1<<level)
#define ESP_INTR_FLAG_LEVEL1 (1<<1) ///< Accept a Level 1 interrupt vector
#define ESP_INTR_FLAG_LEVEL2 (1<<2) ///< Accept a Level 2 interrupt vector
#define ESP_INTR_FLAG_LEVEL3 (1<<3) ///< Accept a Level 3 interrupt vector
#define ESP_INTR_FLAG_LEVEL4 (1<<4) ///< Accept a Level 4 interrupt vector
#define ESP_INTR_FLAG_LEVEL5 (1<<5) ///< Accept a Level 5 interrupt vector
#define ESP_INTR_FLAG_LEVEL6 (1<<6) ///< Accept a Level 6 interrupt vector
#define ESP_INTR_FLAG_NMI (1<<7) ///< Accept a Level 7 interrupt vector
#define ESP_INTR_FLAG_SHARED (1<<8) ///< Interrupt can be shared between ISRs
#define ESP_INTR_FLAG_EDGE (1<<9) ///< Edge-triggered interrupt
#define ESP_INTR_FLAG_IRAM (1<<10) ///< ISR can be called if cache is disabled
#define ESP_INTR_FLAG_INTRDISABLED (1<<11) ///< Return with this interrupt disabled
#define ESP_INTR_FLAG_LOWMED (ESP_INTR_FLAG_LEVEL1|ESP_INTR_FLAG_LEVEL2|ESP_INTR_FLAG_LEVEL3) ///< Low and medium prio interrupts. These can be handled in C.
#define ESP_INTR_FLAG_HIGH (ESP_INTR_FLAG_LEVEL4|ESP_INTR_FLAG_LEVEL5|ESP_INTR_FLAG_LEVEL6|ESP_INTR_FLAG_NMI) ///< High level interrupts. Need to be handled in assembly.
#define ESP_INTR_FLAG_LEVELMASK (ESP_INTR_FLAG_LEVEL1|ESP_INTR_FLAG_LEVEL2|ESP_INTR_FLAG_LEVEL3| \
ESP_INTR_FLAG_LEVEL4|ESP_INTR_FLAG_LEVEL5|ESP_INTR_FLAG_LEVEL6| \
ESP_INTR_FLAG_NMI) ///< Mask for all level flags
/**@}*/
/** @addtogroup Intr_Alloc_Pseudo_Src
* @{
*/
/**
* The esp_intr_alloc* functions can allocate an int for all ETS_*_INTR_SOURCE interrupt sources that
* are routed through the interrupt mux. Apart from these sources, each core also has some internal
* sources that do not pass through the interrupt mux. To allocate an interrupt for these sources,
* pass these pseudo-sources to the functions.
*/
#define ETS_INTERNAL_TIMER0_INTR_SOURCE -1 ///< Xtensa timer 0 interrupt source
#define ETS_INTERNAL_TIMER1_INTR_SOURCE -2 ///< Xtensa timer 1 interrupt source
#define ETS_INTERNAL_TIMER2_INTR_SOURCE -3 ///< Xtensa timer 2 interrupt source
#define ETS_INTERNAL_SW0_INTR_SOURCE -4 ///< Software int source 1
#define ETS_INTERNAL_SW1_INTR_SOURCE -5 ///< Software int source 2
#define ETS_INTERNAL_PROFILING_INTR_SOURCE -6 ///< Int source for profiling
/**@}*/
typedef void (*intr_handler_t)(void *arg);
typedef struct intr_handle_data_t intr_handle_data_t;
typedef intr_handle_data_t* intr_handle_t ;
/**
* @brief Mark an interrupt as a shared interrupt
*
* This will mark a certain interrupt on the specified CPU as
* an interrupt that can be used to hook shared interrupt handlers
* to.
*
* @param intno The number of the interrupt (0-31)
* @param cpu CPU on which the interrupt should be marked as shared (0 or 1)
* @param is_in_iram Shared interrupt is for handlers that reside in IRAM and
* the int can be left enabled while the flash cache is disabled.
*
* @return ESP_ERR_INVALID_ARG if cpu or intno is invalid
* ESP_OK otherwise
*/
esp_err_t esp_intr_mark_shared(int intno, int cpu, bool is_in_iram);
/**
* @brief Reserve an interrupt to be used outside of this framewoek
*
* This will mark a certain interrupt on the specified CPU as
* reserved, not to be allocated for any reason.
*
* @param intno The number of the interrupt (0-31)
* @param cpu CPU on which the interrupt should be marked as shared (0 or 1)
*
* @return ESP_ERR_INVALID_ARG if cpu or intno is invalid
* ESP_OK otherwise
*/
esp_err_t esp_intr_reserve(int intno, int cpu);
/**
* @brief Allocate an interrupt with the given parameters.
*
* This finds an interrupt that matches the restrictions as given in the flags
* parameter, maps the given interrupt source to it and hooks up the given
* interrupt handler (with optional argument) as well. If needed, it can return
* a handle for the interrupt as well.
*
* The interrupt will always be allocated on the core that runs this function.
*
* @param source The interrupt source. One of the ETS_*_INTR_SOURCE interrupt mux
* sources, as defined in soc/soc.h, or one of the internal
* ETS_INTERNAL_*_INTR_SOURCE sources as defined in this header.
* @param flags An ORred mask of the ESP_INTR_FLAG_* defines. These restrict the
* choice of interrupts that this routine can choose from. If this value
* is 0, it will default to allocating a non-shared interrupt of level
* 1, 2 or 3. If this is ESP_INTR_FLAG_SHARED, it will allocate a shared
* interrupt of level 1. Setting ESP_INTR_FLAG_INTRDISABLED will return
* from this function with the interrupt disabled.
* @param handler The interrupt handler. Must be NULL when an interrupt of level >3
* is requested, because these types of interrupts aren't C-callable.
* @param arg Optional argument for passed to the interrupt handler
* @param ret_handle Pointer to an intr_handle_t to store a handle that can later be
* used to request details or free the interrupt. Can be NULL if no handle
* is required.
*
* @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid.
* ESP_ERR_NOT_FOUND No free interrupt found with the specified flags
* ESP_OK otherwise
*/
esp_err_t esp_intr_alloc(int source, int flags, intr_handler_t handler, void *arg, intr_handle_t *ret_handle);
/**
* @brief Allocate an interrupt with the given parameters.
*
*
* This essentially does the same as esp_intr_alloc, but allows specifying a register and mask
* combo. For shared interrupts, the handler is only called if a read from the specified
* register, ANDed with the mask, returns non-zero. By passing an interrupt status register
* address and a fitting mask, this can be used to accelerate interrupt handling in the case
* a shared interrupt is triggered; by checking the interrupt statuses first, the code can
* decide which ISRs can be skipped
*
* @param source The interrupt source. One of the ETS_*_INTR_SOURCE interrupt mux
* sources, as defined in soc/soc.h, or one of the internal
* ETS_INTERNAL_*_INTR_SOURCE sources as defined in this header.
* @param flags An ORred mask of the ESP_INTR_FLAG_* defines. These restrict the
* choice of interrupts that this routine can choose from. If this value
* is 0, it will default to allocating a non-shared interrupt of level
* 1, 2 or 3. If this is ESP_INTR_FLAG_SHARED, it will allocate a shared
* interrupt of level 1. Setting ESP_INTR_FLAG_INTRDISABLED will return
* from this function with the interrupt disabled.
* @param intrstatusreg The address of an interrupt status register
* @param intrstatusmask A mask. If a read of address intrstatusreg has any of the bits
* that are 1 in the mask set, the ISR will be called. If not, it will be
* skipped.
* @param handler The interrupt handler. Must be NULL when an interrupt of level >3
* is requested, because these types of interrupts aren't C-callable.
* @param arg Optional argument for passed to the interrupt handler
* @param ret_handle Pointer to an intr_handle_t to store a handle that can later be
* used to request details or free the interrupt. Can be NULL if no handle
* is required.
*
* @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid.
* ESP_ERR_NOT_FOUND No free interrupt found with the specified flags
* ESP_OK otherwise
*/
esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusreg, uint32_t intrstatusmask, intr_handler_t handler, void *arg, intr_handle_t *ret_handle);
/**
* @brief Disable and free an interrupt.
*
* Use an interrupt handle to disable the interrupt and release the resources
* associated with it.
*
* @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
*
* @return ESP_ERR_INVALID_ARG if handle is invalid, or esp_intr_free runs on another core than
* where the interrupt is allocated on.
* ESP_OK otherwise
*/
esp_err_t esp_intr_free(intr_handle_t handle);
/**
* @brief Get CPU number an interrupt is tied to
*
* @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
*
* @return The core number where the interrupt is allocated
*/
int esp_intr_get_cpu(intr_handle_t handle);
/**
* @brief Get the allocated interrupt for a certain handle
*
* @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
*
* @return The interrupt number
*/
int esp_intr_get_intno(intr_handle_t handle);
/**
* @brief Disable the interrupt associated with the handle
*
* @note For local interrupts (ESP_INTERNAL_* sources), this function has to be called on the
* CPU the interrupt is allocated on. Other interrupts have no such restriction.
*
* @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
*
* @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid.
* ESP_OK otherwise
*/
esp_err_t esp_intr_disable(intr_handle_t handle);
/**
* @brief Ensable the interrupt associated with the handle
*
* @note For local interrupts (ESP_INTERNAL_* sources), this function has to be called on the
* CPU the interrupt is allocated on. Other interrupts have no such restriction.
*
* @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
*
* @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid.
* ESP_OK otherwise
*/
esp_err_t esp_intr_enable(intr_handle_t handle);
/**
* @brief Disable interrupts that aren't specifically marked as running from IRAM
*/
void esp_intr_noniram_disable();
/**
* @brief Re-enable interrupts disabled by esp_intr_noniram_disable
*/
void esp_intr_noniram_enable();
/**@}*/
#ifdef __cplusplus
}
#endif
#endif

View File

@ -3,7 +3,7 @@
// Licensed under the Apache License, Version 2.0 (the "License"); // Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License. // you may not use this file except in compliance with the License.
// You may obtain a copy of the License at // You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0 // http://www.apache.org/licenses/LICENSE-2.0
// //
// Unless required by applicable law or agreed to in writing, software // Unless required by applicable law or agreed to in writing, software
@ -11,10 +11,12 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and // See the License for the specific language governing permissions and
// limitations under the License. // limitations under the License.
#ifndef __ESP_SMARTCONFIG_H__ #ifndef __ESP_SMARTCONFIG_H__
#define __ESP_SMARTCONFIG_H__ #define __ESP_SMARTCONFIG_H__
#include <stdint.h> #include <stdint.h>
#include <esp_types.h> #include <stdbool.h>
#include "esp_err.h" #include "esp_err.h"
#ifdef __cplusplus #ifdef __cplusplus
@ -22,11 +24,11 @@ extern "C" {
#endif #endif
typedef enum { typedef enum {
SC_STATUS_WAIT = 0, /**< waiting, do not start connection in this phase */ SC_STATUS_WAIT = 0, /**< Waiting to start connect */
SC_STATUS_FIND_CHANNEL, /**< find target channel, start connection by APP in this phase */ SC_STATUS_FIND_CHANNEL, /**< Finding target channel */
SC_STATUS_GETTING_SSID_PSWD, /**< getting SSID and password of target AP */ SC_STATUS_GETTING_SSID_PSWD, /**< Getting SSID and password of target AP */
SC_STATUS_LINK, /**< connecting to target AP */ SC_STATUS_LINK, /**< Connecting to target AP */
SC_STATUS_LINK_OVER, /**< got IP, connect to AP successfully */ SC_STATUS_LINK_OVER, /**< Connected to AP successfully */
} smartconfig_status_t; } smartconfig_status_t;
typedef enum { typedef enum {
@ -38,48 +40,38 @@ typedef enum {
/** /**
* @brief The callback of SmartConfig, executed when smart-config status changed. * @brief The callback of SmartConfig, executed when smart-config status changed.
* *
* @param smartconfig_status_t status : status of SmartConfig: * @param status Status of SmartConfig:
* - if status == SC_STATUS_GETTING_SSID_PSWD, parameter void *pdata is a pointer * - SC_STATUS_GETTING_SSID_PSWD : pdata is a pointer of smartconfig_type_t, means config type.
of smartconfig_type_t, means SmartConfig type: AirKiss or ESP-TOUCH. * - SC_STATUS_LINK : pdata is a pointer of struct station_config.
* - if status == SC_STATUS_LINK, parameter void *pdata is a pointer of struct station_config; * - SC_STATUS_LINK_OVER : pdata is a pointer of phone's IP address(4 bytes) if pdata unequal NULL.
* - if status == SC_STATUS_LINK_OVER, parameter void *pdata is a pointer of mobile * - otherwise : parameter void *pdata is NULL.
* phone's IP address, 4 bytes. This is only available in ESPTOUCH, otherwise, * @param pdata According to the different status have different values.
* it is NULL.
* - otherwise, parameter void *pdata is NULL.
* @param void *pdata : data of SmartConfig
* *
* @return null
*/ */
typedef void (*sc_callback_t)(smartconfig_status_t status, void *pdata); typedef void (*sc_callback_t)(smartconfig_status_t status, void *pdata);
/** /**
* @brief Get the version of SmartConfig. * @brief Get the version of SmartConfig.
* *
* @param null * @return
* * - SmartConfig version const char.
* @return SmartConfig version
*/ */
const char *esp_smartconfig_get_version(void); const char *esp_smartconfig_get_version(void);
/** /**
* @brief Start SmartConfig mode. * @brief Start SmartConfig, config ESP device to connect AP. You need to broadcast information by phone APP.
* Device sniffer special packets from the air that containing SSID and password of target AP.
* *
* Start SmartConfig mode, to connect ESP32 station to AP, by sniffing * @attention 1. This API can be called in station or softAP-station mode.
* for special packets from the air, containing SSID and password of desired AP. * @attention 2. Can not call esp_smartconfig_start twice before it finish, please call
* You need to broadcast the SSID and password (e.g. from mobile device or computer)
* with the SSID and password encoded.
*
* @attention 1. This API can only be called in station mode.
* @attention 2. During SmartConfig, ESP32 station and soft-AP are disabled.
* @attention 3. Can not call esp_smartconfig_start twice before it finish, please call
* esp_smartconfig_stop first. * esp_smartconfig_stop first.
* @attention 4. Don't call any other APIs during SmartConfig, please call esp_smartconfig_stop first.
* *
* @param sc_callback_t cb : SmartConfig callback; executed when SmartConfig status changed; * @param cb SmartConfig callback function.
* @param uint8 log : 1, UART output logs; otherwise, UART only outputs the result. * @param ... log 1: UART output logs; 0: UART only outputs the result.
* *
* @return ESP_OK : succeed * @return
* @return others : fail * - ESP_OK: succeed
* - others: fail
*/ */
esp_err_t esp_smartconfig_start(sc_callback_t cb, ...); esp_err_t esp_smartconfig_start(sc_callback_t cb, ...);
@ -89,23 +81,22 @@ esp_err_t esp_smartconfig_start(sc_callback_t cb, ...);
* @attention Whether connect to AP succeed or not, this API should be called to free * @attention Whether connect to AP succeed or not, this API should be called to free
* memory taken by smartconfig_start. * memory taken by smartconfig_start.
* *
* @param null * @return
* * - ESP_OK: succeed
* @return ESP_OK : succeed * - others: fail
* @return others : fail
*/ */
esp_err_t esp_smartconfig_stop(void); esp_err_t esp_smartconfig_stop(void);
/** /**
* @brief Set timeout of SmartConfig. * @brief Set timeout of SmartConfig process.
* *
* @attention SmartConfig timeout start at SC_STATUS_FIND_CHANNEL, SmartConfig will * @attention Timing starts from SC_STATUS_FIND_CHANNEL status. SmartConfig will restart if timeout.
* restart if timeout.
* *
* @param uint8 time_s : range 15s~255s, offset:45s. * @param time_s range 15s~255s, offset:45s.
* *
* @return ESP_OK : succeed * @return
* @return others : fail * - ESP_OK: succeed
* - others: fail
*/ */
esp_err_t esp_esptouch_set_timeout(uint8_t time_s); esp_err_t esp_esptouch_set_timeout(uint8_t time_s);
@ -115,27 +106,29 @@ esp_err_t esp_esptouch_set_timeout(uint8_t time_s);
* @attention If users need to set the SmartConfig type, please set it before calling * @attention If users need to set the SmartConfig type, please set it before calling
* esp_smartconfig_start. * esp_smartconfig_start.
* *
* @param smartconfig_type_t type : AirKiss, ESP-TOUCH or both. * @param type Choose from the smartconfig_type_t.
* *
* @return ESP_OK : succeed * @return
* @return others : fail * - ESP_OK: succeed
* - others: fail
*/ */
esp_err_t esp_smartconfig_set_type(smartconfig_type_t type); esp_err_t esp_smartconfig_set_type(smartconfig_type_t type);
/** /**
* @brief Set mode of SmartConfig. default normal mode. * @brief Set mode of SmartConfig. default normal mode.
* *
* @attention If users need to set the SmartConfig mode, please set it before calling * @attention 1. Please call it before API esp_smartconfig_start.
* esp_smartconfig_start. Different mode should match different APP(phone). * @attention 2. Fast mode have corresponding APP(phone).
* @attention 3. Two mode is compatible.
* *
* @param bool enable : false-disable(default); true-enable; * @param enable false-disable(default); true-enable;
* *
* @return ESP_OK : succeed * @return
* @return others : fail * - ESP_OK: succeed
* - others: fail
*/ */
esp_err_t esp_smartconfig_fast_mode(bool enable); esp_err_t esp_smartconfig_fast_mode(bool enable);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

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@ -18,7 +18,7 @@
#include <stdint.h> #include <stdint.h>
#include <stdbool.h> #include <stdbool.h>
#include "esp_err.h" #include "esp_err.h"
#include "esp_deepsleep.h" #include "esp_deep_sleep.h"
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {

12
tools/sdk/include/esp32/esp_wifi.h Normal file → Executable file
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@ -507,16 +507,14 @@ esp_err_t esp_wifi_set_mac(wifi_interface_t ifx, uint8_t mac[6]);
esp_err_t esp_wifi_get_mac(wifi_interface_t ifx, uint8_t mac[6]); esp_err_t esp_wifi_get_mac(wifi_interface_t ifx, uint8_t mac[6]);
/** /**
* @brief The RX callback function in the promiscuous mode. * @brief The RX callback function in the promiscuous mode.
* Each time a packet is received, the callback function will be called.
* *
* Each time a packet is received, the callback function will be called. * @param buf Data received. Type of data in buffer (wifi_promiscuous_pkt_t or wifi_pkt_rx_ctrl_t) indicated by 'type' parameter.
* @param type promiscuous packet type.
* *
* @param buf the data received
* @param len data length
*
* @return none
*/ */
typedef void (* wifi_promiscuous_cb_t)(void *buf, uint16_t len); typedef void (* wifi_promiscuous_cb_t)(void *buf, wifi_promiscuous_pkt_type_t type);
/** /**
* @brief Register the RX callback function in the promiscuous mode. * @brief Register the RX callback function in the promiscuous mode.

49
tools/sdk/include/esp32/esp_wifi_types.h Normal file → Executable file
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@ -150,13 +150,14 @@ typedef union {
typedef struct { typedef struct {
uint8_t mac[6]; /**< mac address of sta that associated with ESP32 soft-AP */ uint8_t mac[6]; /**< mac address of sta that associated with ESP32 soft-AP */
}wifi_sta_info_t; } wifi_sta_info_t;
#define ESP_WIFI_MAX_CONN_NUM (10) /**< max number of stations which can connect to ESP32 soft-AP */ #define ESP_WIFI_MAX_CONN_NUM (10) /**< max number of stations which can connect to ESP32 soft-AP */
typedef struct { typedef struct {
wifi_sta_info_t sta[ESP_WIFI_MAX_CONN_NUM]; /**< station list */ wifi_sta_info_t sta[ESP_WIFI_MAX_CONN_NUM]; /**< station list */
int num; /**< number of station that associated with ESP32 soft-AP */ int num; /**< number of station that associated with ESP32 soft-AP */
}wifi_sta_list_t; } wifi_sta_list_t;
typedef enum { typedef enum {
WIFI_STORAGE_FLASH, /**< all configuration will strore in both memory and flash */ WIFI_STORAGE_FLASH, /**< all configuration will strore in both memory and flash */
@ -184,10 +185,52 @@ typedef enum {
WIFI_VND_IE_ID_1, WIFI_VND_IE_ID_1,
} wifi_vendor_ie_id_t; } wifi_vendor_ie_id_t;
typedef struct {
signed rssi:8; /**< signal intensity of packet */
unsigned rate:5; /**< data rate */
unsigned :1; /**< reserve */
unsigned sig_mode:2; /**< 0:is not 11n packet; 1:is 11n packet */
unsigned :16; /**< reserve */
unsigned mcs:7; /**< if is 11n packet, shows the modulation(range from 0 to 76) */
unsigned cwb:1; /**< if is 11n packet, shows if is HT40 packet or not */
unsigned :16; /**< reserve */
unsigned smoothing:1; /**< reserve */
unsigned not_sounding:1; /**< reserve */
unsigned :1; /**< reserve */
unsigned aggregation:1; /**< Aggregation */
unsigned stbc:2; /**< STBC */
unsigned fec_coding:1; /**< if is 11n packet, shows if is LDPC packet or not */
unsigned sgi:1; /**< SGI */
unsigned noise_floor:8; /**< noise floor */
unsigned ampdu_cnt:8; /**< ampdu cnt */
unsigned channel:4; /**< which channel this packet in */
unsigned :12; /**< reserve */
unsigned timestamp:32; /**< timestamp */
unsigned :32; /**< reserve */
unsigned :32; /**< reserve */
unsigned sig_len:12; /**< It is really lenth of packet */
unsigned :12; /**< reserve */
unsigned rx_state:8; /**< rx state */
} wifi_pkt_rx_ctrl_t;
typedef struct {
wifi_pkt_rx_ctrl_t rx_ctrl;
char payload[0]; /**< ieee80211 packet buff, The length of payload is described by sig_len */
} wifi_promiscuous_pkt_t;
/**
* @brief Promiscuous frame type
*
*/
typedef enum {
WIFI_PKT_CTRL, /**< control type, receive packet buf is wifi_pkt_rx_ctrl_t */
WIFI_PKT_MGMT, /**< management type, receive packet buf is wifi_promiscuous_pkt_t */
WIFI_PKT_DATA, /**< data type, receive packet buf is wifi_promiscuous_pkt_t */
WIFI_PKT_MISC, /**< other type, receive packet buf is wifi_promiscuous_pkt_t */
} wifi_promiscuous_pkt_type_t;
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __ESP_WIFI_TYPES_H__ */ #endif /* __ESP_WIFI_TYPES_H__ */

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@ -3,7 +3,7 @@
// Licensed under the Apache License, Version 2.0 (the "License"); // Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License. // you may not use this file except in compliance with the License.
// You may obtain a copy of the License at // You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0 // http://www.apache.org/licenses/LICENSE-2.0
// //
// Unless required by applicable law or agreed to in writing, software // Unless required by applicable law or agreed to in writing, software
@ -384,8 +384,8 @@ SpiFlashOpResult SPIParamCfg(uint32_t deviceId, uint32_t chip_size, uint32_t blo
SpiFlashOpResult SPIEraseChip(void); SpiFlashOpResult SPIEraseChip(void);
/** /**
* @brief Erase a 32KB block of flash * @brief Erase a 64KB block of flash
* Uses SPI flash command 52h. * Uses SPI flash command D8H.
* Please do not call this function in SDK. * Please do not call this function in SDK.
* *
* @param uint32_t block_num : Which block to erase. * @param uint32_t block_num : Which block to erase.
@ -398,6 +398,7 @@ SpiFlashOpResult SPIEraseBlock(uint32_t block_num);
/** /**
* @brief Erase a sector of flash. * @brief Erase a sector of flash.
* Uses SPI flash command 20H.
* Please do not call this function in SDK. * Please do not call this function in SDK.
* *
* @param uint32_t sector_num : Which sector to erase. * @param uint32_t sector_num : Which sector to erase.
@ -412,12 +413,6 @@ SpiFlashOpResult SPIEraseSector(uint32_t sector_num);
* @brief Erase some sectors. * @brief Erase some sectors.
* Please do not call this function in SDK. * Please do not call this function in SDK.
* *
* @note If calling this function, first set
* g_rom_flashchip.block_size = 32768; or call SPIParamCfg()
* with appropriate parameters. This is due to a ROM bug, the
* block erase command in use is a 32KB erase but after reset
* the block_size field is incorrectly set to 65536.
*
* @param uint32_t start_addr : Start addr to erase, should be sector aligned. * @param uint32_t start_addr : Start addr to erase, should be sector aligned.
* *
* @param uint32_t area_len : Length to erase, should be sector aligned. * @param uint32_t area_len : Length to erase, should be sector aligned.
@ -495,16 +490,20 @@ SpiFlashOpResult SPI_Prepare_Encrypt_Data(uint32_t flash_addr, uint32_t *data);
void SPI_Write_Encrypt_Disable(void); void SPI_Write_Encrypt_Disable(void);
/** /**
* @brief Encrpto writing data to flash, you should Erase it yourself if need. * @brief Write data to flash with transparent encryption.
* Please do not call this function in SDK. * @note Sectors to be written should already be erased.
* *
* @param uint32_t flash_addr : Address to write, should be 32 bytes aligned. * @note Please do not call this function in SDK.
* *
* @param uint32_t *data : The pointer to data which is to write. * @param uint32_t flash_addr : Address to write, should be 32 byte aligned.
*
* @param uint32_t *data : The pointer to data to write. Note, this pointer must
* be 32 bit aligned and the content of the data will be
* modified by the encryption function.
* *
* @param uint32_t len : Length to write, should be 32 bytes aligned. * @param uint32_t len : Length to write, should be 32 bytes aligned.
* *
* @return SPI_FLASH_RESULT_OK : Encrypto write OK. * @return SPI_FLASH_RESULT_OK : Data written successfully.
* SPI_FLASH_RESULT_ERR : Encrypto write error. * SPI_FLASH_RESULT_ERR : Encrypto write error.
* SPI_FLASH_RESULT_TIMEOUT : Encrypto write timeout. * SPI_FLASH_RESULT_TIMEOUT : Encrypto write timeout.
*/ */

View File

@ -418,5 +418,5 @@
#define SIG_IN_FUNC226_IDX 226 #define SIG_IN_FUNC226_IDX 226
#define SIG_IN_FUNC227_IDX 227 #define SIG_IN_FUNC227_IDX 227
#define SIG_IN_FUNC228_IDX 228 #define SIG_IN_FUNC228_IDX 228
#define SIG_GPIO_OUT_IDX 256
#endif /* _SOC_GPIO_SIG_MAP_H_ */ #endif /* _SOC_GPIO_SIG_MAP_H_ */

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@ -79,8 +79,8 @@
//set bits of register controlled by mask //set bits of register controlled by mask
#define REG_SET_BITS(_r, _b, _m) (*(volatile uint32_t*)(_r) = (*(volatile uint32_t*)(_r) & ~(_m)) | ((_b) & (_m))) #define REG_SET_BITS(_r, _b, _m) (*(volatile uint32_t*)(_r) = (*(volatile uint32_t*)(_r) & ~(_m)) | ((_b) & (_m)))
//get field from register, used when _f is not left shifted by _f##_S //get field from register, uses field _S & _V to determine mask
#define REG_GET_FIELD(_r, _f) ((REG_READ(_r) >> (_f##_S)) & (_f)) #define REG_GET_FIELD(_r, _f) ((REG_READ(_r) >> (_f##_S)) & (_f##_V))
//set field to register, used when _f is not left shifted by _f##_S //set field to register, used when _f is not left shifted by _f##_S
#define REG_SET_FIELD(_r, _f, _v) (REG_WRITE((_r),((REG_READ(_r) & ~((_f) << (_f##_S)))|(((_v) & (_f))<<(_f##_S))))) #define REG_SET_FIELD(_r, _f, _v) (REG_WRITE((_r),((REG_READ(_r) & ~((_f) << (_f##_S)))|(((_v) & (_f))<<(_f##_S)))))
@ -264,14 +264,14 @@
* Intr num Level Type PRO CPU usage APP CPU uasge * Intr num Level Type PRO CPU usage APP CPU uasge
* 0 1 extern level WMAC Reserved * 0 1 extern level WMAC Reserved
* 1 1 extern level BT/BLE Host VHCI Reserved * 1 1 extern level BT/BLE Host VHCI Reserved
* 2 1 extern level FROM_CPU FROM_CPU * 2 1 extern level
* 3 1 extern level TG0_WDT Reserved * 3 1 extern level
* 4 1 extern level WBB * 4 1 extern level WBB
* 5 1 extern level BT Controller * 5 1 extern level BT Controller
* 6 1 timer FreeRTOS Tick(L1) FreeRTOS Tick(L1) * 6 1 timer FreeRTOS Tick(L1) FreeRTOS Tick(L1)
* 7 1 software Reserved Reserved * 7 1 software Reserved Reserved
* 8 1 extern level BLE Controller * 8 1 extern level BLE Controller
* 9 1 extern level EMAC * 9 1 extern level
* 10 1 extern edge Internal Timer * 10 1 extern edge Internal Timer
* 11 3 profiling * 11 3 profiling
* 12 1 extern level * 12 1 extern level
@ -300,10 +300,7 @@
//CPU0 Interrupt number reserved, not touch this. //CPU0 Interrupt number reserved, not touch this.
#define ETS_WMAC_INUM 0 #define ETS_WMAC_INUM 0
#define ETS_BT_HOST_INUM 1 #define ETS_BT_HOST_INUM 1
#define ETS_FROM_CPU_INUM 2
#define ETS_T0_WDT_INUM 3
#define ETS_WBB_INUM 4 #define ETS_WBB_INUM 4
#define ETS_EMAC_INUM 9
#define ETS_TG0_T1_INUM 10 /**< use edge interrupt*/ #define ETS_TG0_T1_INUM 10 /**< use edge interrupt*/
#define ETS_FRC1_INUM 22 #define ETS_FRC1_INUM 22
#define ETS_T1_WDT_INUM 24 #define ETS_T1_WDT_INUM 24

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@ -69,14 +69,14 @@
#define SPI_FLASH_PP_V 0x1 #define SPI_FLASH_PP_V 0x1
#define SPI_FLASH_PP_S 25 #define SPI_FLASH_PP_S 25
/* SPI_FLASH_SE : R/W ;bitpos:[24] ;default: 1'b0 ; */ /* SPI_FLASH_SE : R/W ;bitpos:[24] ;default: 1'b0 ; */
/*description: Sector erase enable(4KB). Sector erase operation will be triggered /*description: Sector erase enable. A 4KB sector is erased via SPI command 20H. Sector erase operation will be triggered
when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.*/ when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.*/
#define SPI_FLASH_SE (BIT(24)) #define SPI_FLASH_SE (BIT(24))
#define SPI_FLASH_SE_M (BIT(24)) #define SPI_FLASH_SE_M (BIT(24))
#define SPI_FLASH_SE_V 0x1 #define SPI_FLASH_SE_V 0x1
#define SPI_FLASH_SE_S 24 #define SPI_FLASH_SE_S 24
/* SPI_FLASH_BE : R/W ;bitpos:[23] ;default: 1'b0 ; */ /* SPI_FLASH_BE : R/W ;bitpos:[23] ;default: 1'b0 ; */
/*description: Block erase enable(32KB) . Block erase operation will be triggered /*description: Block erase enable. A 64KB block is erased via SPI command D8H. Block erase operation will be triggered
when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.*/ when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.*/
#define SPI_FLASH_BE (BIT(23)) #define SPI_FLASH_BE (BIT(23))
#define SPI_FLASH_BE_M (BIT(23)) #define SPI_FLASH_BE_M (BIT(23))

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@ -14,5 +14,7 @@
#pragma once #pragma once
#include "soc.h"
/* Hardware random number generator register */ /* Hardware random number generator register */
#define WDEV_RND_REG 0x60035144 #define WDEV_RND_REG 0x60035144

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@ -16,19 +16,81 @@
#include "freertos/FreeRTOS.h" #include "freertos/FreeRTOS.h"
/* The maximum amount of tags in use */
#define HEAPREGIONS_MAX_TAGCOUNT 16
/**
* @brief Structure to define a memory region
*/
typedef struct HeapRegionTagged typedef struct HeapRegionTagged
{ {
uint8_t *pucStartAddress; uint8_t *pucStartAddress; ///< Start address of the region
size_t xSizeInBytes; size_t xSizeInBytes; ///< Size of the region
BaseType_t xTag; BaseType_t xTag; ///< Tag for the region
uint32_t xExecAddr; uint32_t xExecAddr; ///< If non-zero, indicates the region also has an alias in IRAM.
} HeapRegionTagged_t; } HeapRegionTagged_t;
/**
* @brief Initialize the heap allocator by feeding it the usable memory regions and their tags.
*
* This takes an array of heapRegionTagged_t structs, the last entry of which is a dummy entry
* which has pucStartAddress set to NULL. It will initialize the heap allocator to serve memory
* from these ranges.
*
* @param pxHeapRegions Array of region definitions
*/
void vPortDefineHeapRegionsTagged( const HeapRegionTagged_t * const pxHeapRegions ); void vPortDefineHeapRegionsTagged( const HeapRegionTagged_t * const pxHeapRegions );
/**
* @brief Allocate memory from a region with a certain tag
*
* Like pvPortMalloc, this returns an allocated chunk of memory. This function,
* however, forces the allocator to allocate from a region specified by a
* specific tag.
*
* @param xWantedSize Size needed, in bytes
* @param tag Tag of the memory region the allocation has to be from
*
* @return Pointer to allocated memory if succesful.
* NULL if unsuccesful.
*/
void *pvPortMallocTagged( size_t xWantedSize, BaseType_t tag ); void *pvPortMallocTagged( size_t xWantedSize, BaseType_t tag );
/**
* @brief Free memory allocated with pvPortMallocTagged
*
* This is basically an implementation of free().
*
* @param pv Pointer to region allocated by pvPortMallocTagged
*/
void vPortFreeTagged( void *pv );
/**
* @brief Get the lowest amount of memory free for a certain tag
*
* This function allows the user to see what the least amount of
* free memory for a certain tag is.
*
* @param tag Tag of the memory region
*
* @return Minimum amount of free bytes available in the runtime of
* the program
*/
size_t xPortGetMinimumEverFreeHeapSizeTagged( BaseType_t tag );
/**
* @brief Get the amount of free bytes in a certain tagged region
*
* Works like xPortGetFreeHeapSize but allows the user to specify
* a specific tag
*
* @param tag Tag of the memory region
*
* @return Remaining amount of free bytes in region
*/
size_t xPortGetFreeHeapSizeTagged( BaseType_t tag );
#endif #endif

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@ -60,7 +60,7 @@ typedef struct _mem_dbg_ctl{
extern void mem_check_block(void * data); extern void mem_check_block(void * data);
extern void mem_init_dog(void *data); extern void mem_init_dog(void *data);
extern void mem_debug_init(size_t size, void *start, void *end, portMUX_TYPE *mutex, unsigned int alloc_bit); extern void mem_debug_init(size_t size, void *start, void *end, portMUX_TYPE *mutex);
extern void mem_malloc_block(void *data); extern void mem_malloc_block(void *data);
extern void mem_free_block(void *data); extern void mem_free_block(void *data);
extern void mem_check_all(void* pv); extern void mem_check_all(void* pv);

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@ -74,7 +74,9 @@
* *
* Comment if your system does not support time functions * Comment if your system does not support time functions
*/ */
//#define MBEDTLS_HAVE_TIME #ifdef CONFIG_MBEDTLS_HAVE_TIME
#define MBEDTLS_HAVE_TIME
#endif
/** /**
* \def MBEDTLS_HAVE_TIME_DATE * \def MBEDTLS_HAVE_TIME_DATE
@ -86,7 +88,9 @@
* *
* Comment if your system does not have a correct clock. * Comment if your system does not have a correct clock.
*/ */
//#define MBEDTLS_HAVE_TIME_DATE #ifdef CONFIG_MBEDTLS_HAVE_TIME_DATE
#define MBEDTLS_HAVE_TIME_DATE
#endif
/** /**
* \def MBEDTLS_PLATFORM_MEMORY * \def MBEDTLS_PLATFORM_MEMORY

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@ -89,6 +89,10 @@ typedef struct esp_partition_iterator_opaque_* esp_partition_iterator_t;
/** /**
* @brief partition information structure * @brief partition information structure
*
* This is not the format in flash, that format is esp_partition_info_t.
*
* However, this is the format used by this API.
*/ */
typedef struct { typedef struct {
esp_partition_type_t type; /*!< partition type (app/data) */ esp_partition_type_t type; /*!< partition type (app/data) */

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@ -16,6 +16,7 @@
#define ESP_SPI_FLASH_H #define ESP_SPI_FLASH_H
#include <stdint.h> #include <stdint.h>
#include <stdbool.h>
#include <stddef.h> #include <stddef.h>
#include "esp_err.h" #include "esp_err.h"
#include "sdkconfig.h" #include "sdkconfig.h"
@ -74,25 +75,39 @@ esp_err_t spi_flash_erase_range(size_t start_address, size_t size);
/** /**
* @brief Write data to Flash. * @brief Write data to Flash.
* *
* @note Address in flash, dest, has to be 4-byte aligned.
* This is a temporary limitation which will be removed.
* @note If source address is in DROM, this function will return * @note If source address is in DROM, this function will return
* ESP_ERR_INVALID_ARG. * ESP_ERR_INVALID_ARG.
* *
* @param dest destination address in Flash * @param dest destination address in Flash. Must be a multiple of 4 bytes.
* @param src pointer to the source buffer * @param src pointer to the source buffer.
* @param size length of data, in bytes * @param size length of data, in bytes. Must be a multiple of 4 bytes.
* *
* @return esp_err_t * @return esp_err_t
*/ */
esp_err_t spi_flash_write(size_t dest, const void *src, size_t size); esp_err_t spi_flash_write(size_t dest, const void *src, size_t size);
/**
* @brief Write data encrypted to Flash.
*
* @note Flash encryption must be enabled for this function to work.
*
* @note Address in flash, dest, has to be 32-byte aligned.
*
* @note If source address is in DROM, this function will return
* ESP_ERR_INVALID_ARG.
*
* @param dest destination address in Flash. Must be a multiple of 32 bytes.
* @param src pointer to the source buffer.
* @param size length of data, in bytes. Must be a multiple of 32 bytes.
*
* @return esp_err_t
*/
esp_err_t spi_flash_write_encrypted(size_t dest, const void *src, size_t size);
/** /**
* @brief Read data from Flash. * @brief Read data from Flash.
* *
* @note Both src and dest have to be 4-byte aligned.
* This is a temporary limitation which will be removed.
*
* @param src source address of the data in Flash. * @param src source address of the data in Flash.
* @param dest pointer to the destination buffer * @param dest pointer to the destination buffer
* @param size length of data * @param size length of data

View File

@ -0,0 +1,775 @@
// Copyright 2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#include <stddef.h>
#include <stdlib.h>
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup ulp_registers ULP coprocessor registers
* @{
*/
#define R0 0 /*!< general purpose register 0 */
#define R1 1 /*!< general purpose register 1 */
#define R2 2 /*!< general purpose register 2 */
#define R3 3 /*!< general purpose register 3 */
/**@}*/
/** @defgroup ulp_opcodes ULP coprocessor opcodes, sub opcodes, and various modifiers/flags
*
* These definitions are not intended to be used directly.
* They are used in definitions of instructions later on.
*
* @{
*/
#define OPCODE_WR_REG 1 /*!< Instruction: write peripheral register (RTC_CNTL/RTC_IO/SARADC) (not implemented yet) */
#define OPCODE_RD_REG 2 /*!< Instruction: read peripheral register (RTC_CNTL/RTC_IO/SARADC) (not implemented yet) */
#define RD_REG_PERIPH_RTC_CNTL 0 /*!< Identifier of RTC_CNTL peripheral for RD_REG and WR_REG instructions */
#define RD_REG_PERIPH_RTC_IO 1 /*!< Identifier of RTC_IO peripheral for RD_REG and WR_REG instructions */
#define RD_REG_PERIPH_SENS 2 /*!< Identifier of SARADC peripheral for RD_REG and WR_REG instructions */
#define OPCODE_I2C 3 /*!< Instruction: read/write I2C (not implemented yet) */
#define OPCODE_DELAY 4 /*!< Instruction: delay (nop) for a given number of cycles */
#define OPCODE_ADC 5 /*!< Instruction: SAR ADC measurement (not implemented yet) */
#define OPCODE_ST 6 /*!< Instruction: store indirect to RTC memory */
#define SUB_OPCODE_ST 4 /*!< Store 32 bits, 16 MSBs contain PC, 16 LSBs contain value from source register */
#define OPCODE_ALU 7 /*!< Arithmetic instructions */
#define SUB_OPCODE_ALU_REG 0 /*!< Arithmetic instruction, both source values are in register */
#define SUB_OPCODE_ALU_IMM 1 /*!< Arithmetic instruction, one source value is an immediate */
#define SUB_OPCODE_ALU_CNT 2 /*!< Arithmetic instruction between counter register and an immediate (not implemented yet)*/
#define ALU_SEL_ADD 0 /*!< Addition */
#define ALU_SEL_SUB 1 /*!< Subtraction */
#define ALU_SEL_AND 2 /*!< Logical AND */
#define ALU_SEL_OR 3 /*!< Logical OR */
#define ALU_SEL_MOV 4 /*!< Copy value (immediate to destination register or source register to destination register */
#define ALU_SEL_LSH 5 /*!< Shift left by given number of bits */
#define ALU_SEL_RSH 6 /*!< Shift right by given number of bits */
#define OPCODE_BRANCH 8 /*!< Branch instructions */
#define SUB_OPCODE_BX 0 /*!< Branch to absolute PC (immediate or in register) */
#define BX_JUMP_TYPE_DIRECT 0 /*!< Unconditional jump */
#define BX_JUMP_TYPE_ZERO 1 /*!< Branch if last ALU result is zero */
#define BX_JUMP_TYPE_OVF 2 /*!< Branch if last ALU operation caused and overflow */
#define SUB_OPCODE_B 1 /*!< Branch to a relative offset */
#define B_CMP_L 0 /*!< Branch if R0 is less than an immediate */
#define B_CMP_GE 1 /*!< Branch if R0 is greater than or equal to an immediate */
#define OPCODE_END 9 /*!< Stop executing the program (not implemented yet) */
#define SUB_OPCODE_END 0 /*!< Stop executing the program and optionally wake up the chip */
#define SUB_OPCODE_SLEEP 1 /*!< Stop executing the program and run it again after selected interval */
#define OPCODE_TSENS 10 /*!< Instruction: temperature sensor measurement (not implemented yet) */
#define OPCODE_HALT 11 /*!< Halt the coprocessor */
#define OPCODE_LD 13 /*!< Indirect load lower 16 bits from RTC memory */
#define OPCODE_MACRO 15 /*!< Not a real opcode. Used to identify labels and branches in the program */
#define SUB_OPCODE_MACRO_LABEL 0 /*!< Label macro */
#define SUB_OPCODE_MACRO_BRANCH 1 /*!< Branch macro */
/**@}*/
/**@{*/
#define ESP_ERR_ULP_BASE 0x1200 /*!< Offset for ULP-related error codes */
#define ESP_ERR_ULP_SIZE_TOO_BIG (ESP_ERR_ULP_BASE + 1) /*!< Program doesn't fit into RTC memory reserved for the ULP */
#define ESP_ERR_ULP_INVALID_LOAD_ADDR (ESP_ERR_ULP_BASE + 2) /*!< Load address is outside of RTC memory reserved for the ULP */
#define ESP_ERR_ULP_DUPLICATE_LABEL (ESP_ERR_ULP_BASE + 3) /*!< More than one label with the same number was defined */
#define ESP_ERR_ULP_UNDEFINED_LABEL (ESP_ERR_ULP_BASE + 4) /*!< Branch instructions references an undefined label */
#define ESP_ERR_ULP_BRANCH_OUT_OF_RANGE (ESP_ERR_ULP_BASE + 5) /*!< Branch target is out of range of B instruction (try replacing with BX) */
/**@}*/
/**
* @brief Instruction format structure
*
* All ULP instructions are 32 bit long.
* This union contains field layouts used by all of the supported instructions.
* This union also includes a special "macro" instruction layout.
* This is not a real instruction which can be executed by the CPU. It acts
* as a token which is removed from the program by the
* ulp_process_macros_and_load function.
*
* These structures are not intended to be used directly.
* Preprocessor definitions provided below fill the fields of these structure with
* the right arguments.
*/
typedef union {
struct {
uint32_t cycles : 16; /*!< Number of cycles to sleep */
uint32_t unused : 12; /*!< Unused */
uint32_t opcode : 4; /*!< Opcode (OPCODE_DELAY) */
} delay; /*!< Format of DELAY instruction */
struct {
uint32_t dreg : 2; /*!< Register which contains data to store */
uint32_t sreg : 2; /*!< Register which contains address in RTC memory (expressed in words) */
uint32_t unused1 : 6; /*!< Unused */
uint32_t offset : 11; /*!< Offset to add to sreg */
uint32_t unused2 : 4; /*!< Unused */
uint32_t sub_opcode : 3; /*!< Sub opcode (SUB_OPCODE_ST) */
uint32_t opcode : 4; /*!< Opcode (OPCODE_ST) */
} st; /*!< Format of ST instruction */
struct {
uint32_t dreg : 2; /*!< Register where the data should be loaded to */
uint32_t sreg : 2; /*!< Register which contains address in RTC memory (expressed in words) */
uint32_t unused1 : 6; /*!< Unused */
uint32_t offset : 11; /*!< Offset to add to sreg */
uint32_t unused2 : 7; /*!< Unused */
uint32_t opcode : 4; /*!< Opcode (OPCODE_LD) */
} ld; /*!< Format of LD instruction */
struct {
uint32_t unused : 28; /*!< Unused */
uint32_t opcode : 4; /*!< Opcode (OPCODE_HALT) */
} halt; /*!< Format of HALT instruction */
struct {
uint32_t dreg : 2; /*!< Register which contains target PC, expressed in words (used if .reg == 1) */
uint32_t addr : 11; /*!< Target PC, expressed in words (used if .reg == 0) */
uint32_t unused : 8; /*!< Unused */
uint32_t reg : 1; /*!< Target PC in register (1) or immediate (0) */
uint32_t type : 3; /*!< Jump condition (BX_JUMP_TYPE_xxx) */
uint32_t sub_opcode : 3; /*!< Sub opcode (SUB_OPCODE_BX) */
uint32_t opcode : 4; /*!< Opcode (OPCODE_BRANCH) */
} bx; /*!< Format of BRANCH instruction (absolute address) */
struct {
uint32_t imm : 16; /*!< Immediate value to compare against */
uint32_t cmp : 1; /*!< Comparison to perform: B_CMP_L or B_CMP_GE */
uint32_t offset : 7; /*!< Absolute value of target PC offset w.r.t. current PC, expressed in words */
uint32_t sign : 1; /*!< Sign of target PC offset: 0: positive, 1: negative */
uint32_t sub_opcode : 3; /*!< Sub opcode (SUB_OPCODE_B) */
uint32_t opcode : 4; /*!< Opcode (OPCODE_BRANCH) */
} b; /*!< Format of BRANCH instruction (relative address) */
struct {
uint32_t dreg : 2; /*!< Destination register */
uint32_t sreg : 2; /*!< Register with operand A */
uint32_t treg : 2; /*!< Register with operand B */
uint32_t unused : 15; /*!< Unused */
uint32_t sel : 4; /*!< Operation to perform, one of ALU_SEL_xxx */
uint32_t sub_opcode : 3; /*!< Sub opcode (SUB_OPCODE_ALU_REG) */
uint32_t opcode : 4; /*!< Opcode (OPCODE_ALU) */
} alu_reg; /*!< Format of ALU instruction (both sources are registers) */
struct {
uint32_t dreg : 2; /*!< Destination register */
uint32_t sreg : 2; /*!< Register with operand A */
uint32_t imm : 16; /*!< Immediate value of operand B */
uint32_t unused : 1; /*!< Unused */
uint32_t sel : 4; /*!< Operation to perform, one of ALU_SEL_xxx */
uint32_t sub_opcode : 3; /*!< Sub opcode (SUB_OPCODE_ALU_IMM) */
uint32_t opcode : 4; /*!< Opcode (OPCODE_ALU) */
} alu_imm; /*!< Format of ALU instruction (one source is an immediate) */
struct {
uint32_t addr : 8; /*!< Address within either RTC_CNTL, RTC_IO, or SARADC */
uint32_t periph_sel : 2; /*!< Select peripheral: RTC_CNTL (0), RTC_IO(1), SARADC(2) */
uint32_t data : 8; /*!< 8 bits of data to write */
uint32_t low : 5; /*!< Low bit */
uint32_t high : 5; /*!< High bit */
uint32_t opcode : 4; /*!< Opcode (OPCODE_WR_REG) */
} wr_reg; /*!< Format of WR_REG instruction */
struct {
uint32_t addr : 8; /*!< Address within either RTC_CNTL, RTC_IO, or SARADC */
uint32_t periph_sel : 2; /*!< Select peripheral: RTC_CNTL (0), RTC_IO(1), SARADC(2) */
uint32_t unused : 8; /*!< Unused */
uint32_t low : 5; /*!< Low bit */
uint32_t high : 5; /*!< High bit */
uint32_t opcode : 4; /*!< Opcode (OPCODE_WR_REG) */
} rd_reg; /*!< Format of RD_REG instruction */
struct {
uint32_t dreg : 2; /*!< Register where to store ADC result */
uint32_t mux : 4; /*!< Select SARADC pad (mux + 1) */
uint32_t sar_sel : 1; /*!< Select SARADC0 (0) or SARADC1 (1) */
uint32_t unused1 : 1; /*!< Unused */
uint32_t cycles : 16; /*!< TBD, cycles used for measurement */
uint32_t unused2 : 4; /*!< Unused */
uint32_t opcode: 4; /*!< Opcode (OPCODE_ADC) */
} adc; /*!< Format of ADC instruction */
struct {
uint32_t dreg : 2; /*!< Register where to store temperature measurement result */
uint32_t wait_delay: 14; /*!< Cycles to wait after measurement is done */
uint32_t cycles: 12; /*!< Cycles used to perform measurement */
uint32_t opcode: 4; /*!< Opcode (OPCODE_TSENS) */
} tsens; /*!< Format of TSENS instruction */
struct {
uint32_t i2c_addr : 8; /*!< I2C slave address */
uint32_t data : 8; /*!< Data to read or write */
uint32_t low_bits : 3; /*!< TBD */
uint32_t high_bits : 3; /*!< TBD */
uint32_t i2c_sel : 4; /*!< TBD, select reg_i2c_slave_address[7:0] */
uint32_t unused : 1; /*!< Unused */
uint32_t rw : 1; /*!< Write (1) or read (0) */
uint32_t opcode : 4; /*!< Opcode (OPCODE_I2C) */
} i2c; /*!< Format of I2C instruction */
struct {
uint32_t wakeup : 1; /*!< Set to 1 to wake up chip */
uint32_t unused : 24; /*!< Unused */
uint32_t sub_opcode : 3; /*!< Sub opcode (SUB_OPCODE_WAKEUP) */
uint32_t opcode : 4; /*!< Opcode (OPCODE_END) */
} end; /*!< Format of END instruction with wakeup */
struct {
uint32_t cycle_sel : 4; /*!< Select which one of SARADC_ULP_CP_SLEEP_CYCx_REG to get the sleep duration from */
uint32_t unused : 21; /*!< Unused */
uint32_t sub_opcode : 3; /*!< Sub opcode (SUB_OPCODE_SLEEP) */
uint32_t opcode : 4; /*!< Opcode (OPCODE_END) */
} sleep; /*!< Format of END instruction with sleep */
struct {
uint32_t label : 16; /*!< Label number */
uint32_t unused : 8; /*!< Unused */
uint32_t sub_opcode : 4; /*!< SUB_OPCODE_MACRO_LABEL or SUB_OPCODE_MACRO_BRANCH */
uint32_t opcode: 4; /*!< Opcode (OPCODE_MACRO) */
} macro; /*!< Format of tokens used by LABEL and BRANCH macros */
} ulp_insn_t;
_Static_assert(sizeof(ulp_insn_t) == 4, "ULP coprocessor instruction size should be 4 bytes");
/**
* Delay (nop) for a given number of cycles
*/
#define I_DELAY(cycles_) { .delay = {\
.opcode = OPCODE_DELAY, \
.unused = 0, \
.cycles = cycles_ } }
/**
* Halt the coprocessor
*/
#define I_HALT() { .halt = {\
.unused = 0, \
.opcode = OPCODE_HALT } }
/**
* Map SoC peripheral register to periph_sel field of RD_REG and WR_REG
* instructions.
*
* @param reg peripheral register in RTC_CNTL_, RTC_IO_, SENS_ peripherals.
* @return periph_sel value for the peripheral to which this register belongs.
*/
static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) {
uint32_t ret = 3;
if (reg < DR_REG_RTCCNTL_BASE) {
assert(0 && "invalid register base");
} else if (reg < DR_REG_RTCIO_BASE) {
ret = RD_REG_PERIPH_RTC_CNTL;
} else if (reg < DR_REG_SENS_BASE) {
ret = RD_REG_PERIPH_RTC_IO;
} else if (reg < DR_REG_RTCMEM0_BASE){
ret = RD_REG_PERIPH_SENS;
} else {
assert(0 && "invalid register base");
}
return ret;
}
/**
* Write literal value to a peripheral register
*
* reg[high_bit : low_bit] = val
* This instruction can access RTC_CNTL_, RTC_IO_, and SENS_ peripheral registers.
*/
#define I_WR_REG(reg, low_bit, high_bit, val) {.wr_reg = {\
.addr = reg & 0xff, \
.periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
.data = val, \
.low = low_bit, \
.high = high_bit, \
.opcode = OPCODE_WR_REG } }
/**
* Read from peripheral register into R0
*
* R0 = reg[high_bit : low_bit]
* This instruction can access RTC_CNTL_, RTC_IO_, and SENS_ peripheral registers.
*/
#define I_RD_REG(reg, low_bit, high_bit, val) {.wr_reg = {\
.addr = reg & 0xff, \
.periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
.unused = 0, \
.low = low_bit, \
.high = high_bit, \
.opcode = OPCODE_RD_REG } }
/**
* End program.
*
* If wake == 1, wake up main CPU.
*/
#define I_END(wake) { .end = { \
.wakeup = wake, \
.unused = 0, \
.sub_opcode = SUB_OPCODE_END, \
.opcode = OPCODE_END } }
/**
* Store value from register reg_val into RTC memory.
*
* The value is written to an offset calculated by adding value of
* reg_addr register and offset_ field (this offset is expressed in 32-bit words).
* 32 bits written to RTC memory are built as follows:
* - 5 MSBs are zero
* - next 11 bits hold the PC of current instruction, expressed in 32-bit words
* - next 16 bits hold the actual value to be written
*
* RTC_SLOW_MEM[addr + offset_] = { 5'b0, insn_PC[10:0], val[15:0] }
*/
#define I_ST(reg_val, reg_addr, offset_) { .st = { \
.dreg = reg_val, \
.sreg = reg_addr, \
.unused1 = 0, \
.offset = offset_, \
.unused2 = 0, \
.sub_opcode = SUB_OPCODE_ST, \
.opcode = OPCODE_ST } }
/**
* Load value from RTC memory into reg_dest register.
*
* Loads 16 LSBs from RTC memory word given by the sum of value in reg_addr and
* value of offset_.
*/
#define I_LD(reg_dest, reg_addr, offset_) { .ld = { \
.dreg = reg_dest, \
.sreg = reg_addr, \
.unused1 = 0, \
.offset = offset_, \
.unused2 = 0, \
.opcode = OPCODE_LD } }
/**
* Branch relative if R0 less than immediate value.
*
* pc_offset is expressed in words, and can be from -127 to 127
* imm_value is a 16-bit value to compare R0 against
*/
#define I_BL(pc_offset, imm_value) { .b = { \
.imm = imm_value, \
.cmp = B_CMP_L, \
.offset = abs(pc_offset), \
.sign = (pc_offset >= 0) ? 0 : 1, \
.sub_opcode = SUB_OPCODE_B, \
.opcode = OPCODE_BRANCH } }
/**
* Branch relative if R0 greater or equal than immediate value.
*
* pc_offset is expressed in words, and can be from -127 to 127
* imm_value is a 16-bit value to compare R0 against
*/
#define I_BGE(pc_offset, imm_value) { .b = { \
.imm = imm_value, \
.cmp = B_CMP_GE, \
.offset = abs(pc_offset), \
.sign = (pc_offset >= 0) ? 0 : 1, \
.sub_opcode = SUB_OPCODE_B, \
.opcode = OPCODE_BRANCH } }
/**
* Unconditional branch to absolute PC, address in register.
*
* reg_pc is the register which contains address to jump to.
* Address is expressed in 32-bit words.
*/
#define I_BXR(reg_pc) { .bx = { \
.dreg = reg_pc, \
.addr = 0, \
.unused = 0, \
.reg = 1, \
.type = BX_JUMP_TYPE_DIRECT, \
.sub_opcode = SUB_OPCODE_BX, \
.opcode = OPCODE_BRANCH } }
/**
* Unconditional branch to absolute PC, immediate address.
*
* Address imm_pc is expressed in 32-bit words.
*/
#define I_BXI(imm_pc) { .bx = { \
.dreg = 0, \
.addr = imm_pc, \
.unused = 0, \
.reg = 0, \
.type = BX_JUMP_TYPE_DIRECT, \
.sub_opcode = SUB_OPCODE_BX, \
.opcode = OPCODE_BRANCH } }
/**
* Branch to absolute PC if ALU result is zero, address in register.
*
* reg_pc is the register which contains address to jump to.
* Address is expressed in 32-bit words.
*/
#define I_BXZR(reg_pc) { .bx = { \
.dreg = reg_pc, \
.addr = 0, \
.unused = 0, \
.reg = 1, \
.type = BX_JUMP_TYPE_ZERO, \
.sub_opcode = SUB_OPCODE_BX, \
.opcode = OPCODE_BRANCH } }
/**
* Branch to absolute PC if ALU result is zero, immediate address.
*
* Address imm_pc is expressed in 32-bit words.
*/
#define I_BXZI(imm_pc) { .bx = { \
.dreg = 0, \
.addr = imm_pc, \
.unused = 0, \
.reg = 0, \
.type = BX_JUMP_TYPE_ZERO, \
.sub_opcode = SUB_OPCODE_BX, \
.opcode = OPCODE_BRANCH } }
/**
* Branch to absolute PC if ALU overflow, address in register
*
* reg_pc is the register which contains address to jump to.
* Address is expressed in 32-bit words.
*/
#define I_BXFR(reg_pc) { .bx = { \
.dreg = reg_pc, \
.addr = 0, \
.unused = 0, \
.reg = 1, \
.type = BX_JUMP_TYPE_OVF, \
.sub_opcode = SUB_OPCODE_BX, \
.opcode = OPCODE_BRANCH } }
/**
* Branch to absolute PC if ALU overflow, immediate address
*
* Address imm_pc is expressed in 32-bit words.
*/
#define I_BXFI(imm_pc) { .bx = { \
.dreg = 0, \
.addr = imm_pc, \
.unused = 0, \
.reg = 0, \
.type = BX_JUMP_TYPE_OVF, \
.sub_opcode = SUB_OPCODE_BX, \
.opcode = OPCODE_BRANCH } }
/**
* Addition: dest = src1 + src2
*/
#define I_ADDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \
.dreg = reg_dest, \
.sreg = reg_src1, \
.treg = reg_src2, \
.unused = 0, \
.sel = ALU_SEL_ADD, \
.sub_opcode = SUB_OPCODE_ALU_REG, \
.opcode = OPCODE_ALU } }
/**
* Subtraction: dest = src1 - src2
*/
#define I_SUBR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \
.dreg = reg_dest, \
.sreg = reg_src1, \
.treg = reg_src2, \
.unused = 0, \
.sel = ALU_SEL_SUB, \
.sub_opcode = SUB_OPCODE_ALU_REG, \
.opcode = OPCODE_ALU } }
/**
* Logical AND: dest = src1 & src2
*/
#define I_ANDR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \
.dreg = reg_dest, \
.sreg = reg_src1, \
.treg = reg_src2, \
.unused = 0, \
.sel = ALU_SEL_AND, \
.sub_opcode = SUB_OPCODE_ALU_REG, \
.opcode = OPCODE_ALU } }
/**
* Logical OR: dest = src1 | src2
*/
#define I_ORR(reg_dest, reg_src1, reg_src2) { .alu_reg = { \
.dreg = reg_dest, \
.sreg = reg_src1, \
.treg = reg_src2, \
.unused = 0, \
.sel = ALU_SEL_OR, \
.sub_opcode = SUB_OPCODE_ALU_REG, \
.opcode = OPCODE_ALU } }
/**
* Copy: dest = src
*/
#define I_MOVR(reg_dest, reg_src) { .alu_reg = { \
.dreg = reg_dest, \
.sreg = reg_src, \
.treg = 0, \
.unused = 0, \
.sel = ALU_SEL_MOV, \
.sub_opcode = SUB_OPCODE_ALU_REG, \
.opcode = OPCODE_ALU } }
/**
* Logical shift left: dest = src << shift
*/
#define I_LSHR(reg_dest, reg_src, reg_shift) { .alu_reg = { \
.dreg = reg_dest, \
.sreg = reg_src, \
.treg = reg_shift, \
.unused = 0, \
.sel = ALU_SEL_LSH, \
.sub_opcode = SUB_OPCODE_ALU_REG, \
.opcode = OPCODE_ALU } }
/**
* Logical shift right: dest = src >> shift
*/
#define I_RSHR(reg_dest, reg_src, reg_shift) { .alu_reg = { \
.dreg = reg_dest, \
.sreg = reg_src, \
.treg = reg_shift, \
.unused = 0, \
.sel = ALU_SEL_RSH, \
.sub_opcode = SUB_OPCODE_ALU_REG, \
.opcode = OPCODE_ALU } }
/**
* Add register and an immediate value: dest = src1 + imm
*/
#define I_ADDI(reg_dest, reg_src, imm_) { .alu_imm = { \
.dreg = reg_dest, \
.sreg = reg_src, \
.imm = imm_, \
.unused = 0, \
.sel = ALU_SEL_ADD, \
.sub_opcode = SUB_OPCODE_ALU_IMM, \
.opcode = OPCODE_ALU } }
/**
* Subtract register and an immediate value: dest = src - imm
*/
#define I_SUBI(reg_dest, reg_src, imm_) { .alu_imm = { \
.dreg = reg_dest, \
.sreg = reg_src, \
.imm = imm_, \
.unused = 0, \
.sel = ALU_SEL_SUB, \
.sub_opcode = SUB_OPCODE_ALU_IMM, \
.opcode = OPCODE_ALU } }
/**
* Logical AND register and an immediate value: dest = src & imm
*/
#define I_ANDI(reg_dest, reg_src, imm_) { .alu_imm = { \
.dreg = reg_dest, \
.sreg = reg_src, \
.imm = imm_, \
.unused = 0, \
.sel = ALU_SEL_AND, \
.sub_opcode = SUB_OPCODE_ALU_IMM, \
.opcode = OPCODE_ALU } }
/**
* Logical OR register and an immediate value: dest = src | imm
*/
#define I_ORI(reg_dest, reg_src, imm_) { .alu_imm = { \
.dreg = reg_dest, \
.sreg = reg_src, \
.imm = imm_, \
.unused = 0, \
.sel = ALU_SEL_OR, \
.sub_opcode = SUB_OPCODE_ALU_IMM, \
.opcode = OPCODE_ALU } }
/**
* Copy an immediate value into register: dest = imm
*/
#define I_MOVI(reg_dest, imm_) { .alu_imm = { \
.dreg = reg_dest, \
.sreg = 0, \
.imm = imm_, \
.unused = 0, \
.sel = ALU_SEL_MOV, \
.sub_opcode = SUB_OPCODE_ALU_IMM, \
.opcode = OPCODE_ALU } }
/**
* Logical shift left register value by an immediate: dest = src << imm
*/
#define I_LSHI(reg_dest, reg_src, imm_) { .alu_imm = { \
.dreg = reg_dest, \
.sreg = reg_src, \
.imm = imm_, \
.unused = 0, \
.sel = ALU_SEL_LSH, \
.sub_opcode = SUB_OPCODE_ALU_IMM, \
.opcode = OPCODE_ALU } }
/**
* Logical shift right register value by an immediate: dest = val >> imm
*/
#define I_RSHI(reg_dest, reg_src, imm_) { .alu_imm = { \
.dreg = reg_dest, \
.sreg = reg_src, \
.imm = imm_, \
.unused = 0, \
.sel = ALU_SEL_RSH, \
.sub_opcode = SUB_OPCODE_ALU_IMM, \
.opcode = OPCODE_ALU } }
/**
* Define a label with number label_num.
*
* This is a macro which doesn't generate a real instruction.
* The token generated by this macro is removed by ulp_process_macros_and_load
* function. Label defined using this macro can be used in branch macros defined
* below.
*/
#define M_LABEL(label_num) { .macro = { \
.label = label_num, \
.unused = 0, \
.sub_opcode = SUB_OPCODE_MACRO_LABEL, \
.opcode = OPCODE_MACRO } }
/**
* Token macro used by M_B and M_BX macros. Not to be used directly.
*/
#define M_BRANCH(label_num) { .macro = { \
.label = label_num, \
.unused = 0, \
.sub_opcode = SUB_OPCODE_MACRO_BRANCH, \
.opcode = OPCODE_MACRO } }
/**
* Macro: branch to label label_num if R0 is less than immediate value.
*
* This macro generates two ulp_insn_t values separated by a comma, and should
* be used when defining contents of ulp_insn_t arrays. First value is not a
* real instruction; it is a token which is removed by ulp_process_macros_and_load
* function.
*/
#define M_BL(label_num, imm_value) \
M_BRANCH(label_num), \
I_BL(0, imm_value)
/**
* Macro: branch to label label_num if R0 is greater or equal than immediate value
*
* This macro generates two ulp_insn_t values separated by a comma, and should
* be used when defining contents of ulp_insn_t arrays. First value is not a
* real instruction; it is a token which is removed by ulp_process_macros_and_load
* function.
*/
#define M_BGE(label_num, imm_value) \
M_BRANCH(label_num), \
I_BGE(0, imm_value)
/**
* Macro: unconditional branch to label
*
* This macro generates two ulp_insn_t values separated by a comma, and should
* be used when defining contents of ulp_insn_t arrays. First value is not a
* real instruction; it is a token which is removed by ulp_process_macros_and_load
* function.
*/
#define M_BX(label_num) \
M_BRANCH(label_num), \
I_BXI(0)
/**
* Macro: branch to label if ALU result is zero
*
* This macro generates two ulp_insn_t values separated by a comma, and should
* be used when defining contents of ulp_insn_t arrays. First value is not a
* real instruction; it is a token which is removed by ulp_process_macros_and_load
* function.
*/
#define M_BXZ(label_num) \
M_BRANCH(label_num), \
I_BXZI(0)
/**
* Macro: branch to label if ALU overflow
*
* This macro generates two ulp_insn_t values separated by a comma, and should
* be used when defining contents of ulp_insn_t arrays. First value is not a
* real instruction; it is a token which is removed by ulp_process_macros_and_load
* function.
*/
#define M_BXF(label_num) \
M_BRANCH(label_num), \
I_BXFI(0)
#define RTC_SLOW_MEM ((uint32_t*) 0x50000000) /*!< RTC slow memory, 8k size */
/**
* @brief Resolve all macro references in a program and load it into RTC memory
* @param load_addr address where the program should be loaded, expressed in 32-bit words
* @param program ulp_insn_t array with the program
* @param psize size of the program, expressed in 32-bit words
* @return
* - ESP_OK on success
* - ESP_ERR_NO_MEM if auxiliary temporary structure can not be allocated
* - one of ESP_ERR_ULP_xxx if program is not valid or can not be loaded
*/
esp_err_t ulp_process_macros_and_load(uint32_t load_addr, const ulp_insn_t* program, size_t* psize);
/**
* @brief Run the program loaded into RTC memory
* @param entry_point entry point, expressed in 32-bit words
* @return ESP_OK on success
*/
esp_err_t ulp_run(uint32_t entry_point);
#ifdef __cplusplus
}
#endif

View File

@ -26,14 +26,6 @@ PROVIDE ( asctime = 0x40059588 );
PROVIDE ( asctime_r = 0x40000ec8 ); PROVIDE ( asctime_r = 0x40000ec8 );
PROVIDE ( __ashldi3 = 0x4000c818 ); PROVIDE ( __ashldi3 = 0x4000c818 );
PROVIDE ( __ashrdi3 = 0x4000c830 ); PROVIDE ( __ashrdi3 = 0x4000c830 );
PROVIDE ( asiprintf = 0x40056d9c );
PROVIDE ( _asiprintf_r = 0x40056d4c );
PROVIDE ( asniprintf = 0x40056cd8 );
PROVIDE ( _asniprintf_r = 0x40056c64 );
PROVIDE ( asnprintf = 0x40056cd8 );
PROVIDE ( _asnprintf_r = 0x40056c64 );
PROVIDE ( asprintf = 0x40056d9c );
PROVIDE ( _asprintf_r = 0x40056d4c );
PROVIDE ( atoi = 0x400566c4 ); PROVIDE ( atoi = 0x400566c4 );
PROVIDE ( _atoi_r = 0x400566d4 ); PROVIDE ( _atoi_r = 0x400566d4 );
PROVIDE ( atol = 0x400566ec ); PROVIDE ( atol = 0x400566ec );
@ -177,12 +169,6 @@ PROVIDE ( ets_get_xtal_scale = 0x4000856c );
PROVIDE ( ets_install_putc1 = 0x40007d18 ); PROVIDE ( ets_install_putc1 = 0x40007d18 );
PROVIDE ( ets_install_putc2 = 0x40007d38 ); PROVIDE ( ets_install_putc2 = 0x40007d38 );
PROVIDE ( ets_install_uart_printf = 0x40007d28 ); PROVIDE ( ets_install_uart_printf = 0x40007d28 );
PROVIDE ( ets_intr_count = 0x3ffe03fc );
PROVIDE ( ets_intr_lock = 0x400067b0 );
PROVIDE ( ets_intr_unlock = 0x400067c4 );
PROVIDE ( ets_isr_attach = 0x400067ec );
PROVIDE ( ets_isr_mask = 0x400067fc );
PROVIDE ( ets_isr_unmask = 0x40006808 );
PROVIDE ( ets_post = 0x4000673c ); PROVIDE ( ets_post = 0x4000673c );
PROVIDE ( ets_printf = 0x40007d54 ); PROVIDE ( ets_printf = 0x40007d54 );
PROVIDE ( ets_readySet_ = 0x3ffe01f0 ); PROVIDE ( ets_readySet_ = 0x3ffe01f0 );
@ -230,10 +216,6 @@ PROVIDE ( __ffssi2 = 0x4000c804 );
PROVIDE ( FilePacketSendDeflatedReqMsgProc = 0x40008b24 ); PROVIDE ( FilePacketSendDeflatedReqMsgProc = 0x40008b24 );
PROVIDE ( FilePacketSendReqMsgProc = 0x40008860 ); PROVIDE ( FilePacketSendReqMsgProc = 0x40008860 );
PROVIDE ( _findenv_r = 0x40001f44 ); PROVIDE ( _findenv_r = 0x40001f44 );
PROVIDE ( fiprintf = 0x40056efc );
PROVIDE ( _fiprintf_r = 0x40056ed8 );
PROVIDE ( fiscanf = 0x40058884 );
PROVIDE ( _fiscanf_r = 0x400588b4 );
PROVIDE ( __fixdfdi = 0x40002ac4 ); PROVIDE ( __fixdfdi = 0x40002ac4 );
PROVIDE ( __fixdfsi = 0x40002a78 ); PROVIDE ( __fixdfsi = 0x40002a78 );
PROVIDE ( __fixsfdi = 0x4000244c ); PROVIDE ( __fixsfdi = 0x4000244c );
@ -255,16 +237,12 @@ PROVIDE ( __floatundisf = 0x4000c8b0 );
PROVIDE ( __floatunsidf = 0x4000c938 ); PROVIDE ( __floatunsidf = 0x4000c938 );
PROVIDE ( __floatunsisf = 0x4000c864 ); PROVIDE ( __floatunsisf = 0x4000c864 );
PROVIDE ( __fp_lock_all = 0x40001f1c ); PROVIDE ( __fp_lock_all = 0x40001f1c );
PROVIDE ( fprintf = 0x40056efc );
PROVIDE ( _fprintf_r = 0x40056ed8 );
PROVIDE ( __fp_unlock_all = 0x40001f30 ); PROVIDE ( __fp_unlock_all = 0x40001f30 );
PROVIDE ( fputwc = 0x40058ea8 ); PROVIDE ( fputwc = 0x40058ea8 );
PROVIDE ( __fputwc = 0x40058da0 ); PROVIDE ( __fputwc = 0x40058da0 );
PROVIDE ( _fputwc_r = 0x40058e4c ); PROVIDE ( _fputwc_r = 0x40058e4c );
PROVIDE ( free = 0x4000beb8 ); PROVIDE ( free = 0x4000beb8 );
PROVIDE ( _free_r = 0x4000bbcc ); PROVIDE ( _free_r = 0x4000bbcc );
PROVIDE ( fscanf = 0x40058884 );
PROVIDE ( _fscanf_r = 0x400588b4 );
PROVIDE ( _fstat_r = 0x4000bccc ); PROVIDE ( _fstat_r = 0x4000bccc );
PROVIDE ( _fwalk = 0x4000c738 ); PROVIDE ( _fwalk = 0x4000c738 );
PROVIDE ( _fwalk_reent = 0x4000c770 ); PROVIDE ( _fwalk_reent = 0x4000c770 );
@ -337,15 +315,11 @@ PROVIDE ( hmac_sha1_vector = 0x400609e4 );
PROVIDE ( hmac_sha256 = 0x40060d58 ); PROVIDE ( hmac_sha256 = 0x40060d58 );
PROVIDE ( hmac_sha256_vector = 0x40060c84 ); PROVIDE ( hmac_sha256_vector = 0x40060c84 );
PROVIDE ( intr_matrix_set = 0x4000681c ); PROVIDE ( intr_matrix_set = 0x4000681c );
PROVIDE ( iprintf = 0x40056978 );
PROVIDE ( _iprintf_r = 0x40056944 );
PROVIDE ( isalnum = 0x40000f04 ); PROVIDE ( isalnum = 0x40000f04 );
PROVIDE ( isalpha = 0x40000f18 ); PROVIDE ( isalpha = 0x40000f18 );
PROVIDE ( isascii = 0x4000c20c ); PROVIDE ( isascii = 0x4000c20c );
PROVIDE ( _isatty_r = 0x40000ea0 ); PROVIDE ( _isatty_r = 0x40000ea0 );
PROVIDE ( isblank = 0x40000f2c ); PROVIDE ( isblank = 0x40000f2c );
PROVIDE ( iscanf = 0x40058760 );
PROVIDE ( _iscanf_r = 0x4005879c );
PROVIDE ( iscntrl = 0x40000f50 ); PROVIDE ( iscntrl = 0x40000f50 );
PROVIDE ( isdigit = 0x40000f64 ); PROVIDE ( isdigit = 0x40000f64 );
PROVIDE ( isgraph = 0x40000f94 ); PROVIDE ( isgraph = 0x40000f94 );
@ -511,11 +485,6 @@ PROVIDE ( __powidf2 = 0x400638d4 );
PROVIDE ( __powisf2 = 0x4006389c ); PROVIDE ( __powisf2 = 0x4006389c );
PROVIDE ( _Pri_4_HandlerAddress = 0x3ffe0648 ); PROVIDE ( _Pri_4_HandlerAddress = 0x3ffe0648 );
PROVIDE ( _Pri_5_HandlerAddress = 0x3ffe064c ); PROVIDE ( _Pri_5_HandlerAddress = 0x3ffe064c );
PROVIDE ( printf = 0x40056978 );
PROVIDE ( _printf_common = 0x40057338 );
PROVIDE ( _printf_float = 0x4000befc );
PROVIDE ( _printf_i = 0x40057404 );
PROVIDE ( _printf_r = 0x40056944 );
PROVIDE ( qsort = 0x40056424 ); PROVIDE ( qsort = 0x40056424 );
PROVIDE ( _raise_r = 0x4000bc70 ); PROVIDE ( _raise_r = 0x4000bc70 );
PROVIDE ( rand = 0x40001058 ); PROVIDE ( rand = 0x40001058 );
@ -1500,11 +1469,6 @@ PROVIDE ( rwip_rf_p_get = 0x400558f4 );
PROVIDE ( r_XorKey = 0x400112c0 ); PROVIDE ( r_XorKey = 0x400112c0 );
PROVIDE ( sbrk = 0x400017f4 ); PROVIDE ( sbrk = 0x400017f4 );
PROVIDE ( _sbrk_r = 0x4000bce4 ); PROVIDE ( _sbrk_r = 0x4000bce4 );
PROVIDE ( scanf = 0x40058760 );
PROVIDE ( _scanf_chars = 0x40058384 );
PROVIDE ( _scanf_float = 0x4000bf18 );
PROVIDE ( _scanf_i = 0x4005845c );
PROVIDE ( _scanf_r = 0x4005879c );
PROVIDE ( __sccl = 0x4000c498 ); PROVIDE ( __sccl = 0x4000c498 );
PROVIDE ( __sclose = 0x400011b8 ); PROVIDE ( __sclose = 0x400011b8 );
PROVIDE ( SelectSpiFunction = 0x40061f84 ); PROVIDE ( SelectSpiFunction = 0x40061f84 );
@ -1549,13 +1513,9 @@ PROVIDE ( sip_is_active = 0x4000b3c0 );
PROVIDE ( sip_post_init = 0x4000aed8 ); PROVIDE ( sip_post_init = 0x4000aed8 );
PROVIDE ( sip_reclaim_from_host_cmd = 0x4000adbc ); PROVIDE ( sip_reclaim_from_host_cmd = 0x4000adbc );
PROVIDE ( sip_reclaim_tx_data_pkt = 0x4000ad5c ); PROVIDE ( sip_reclaim_tx_data_pkt = 0x4000ad5c );
PROVIDE ( siprintf = 0x40056c08 );
PROVIDE ( _siprintf_r = 0x40056bbc );
PROVIDE ( sip_send = 0x4000af54 ); PROVIDE ( sip_send = 0x4000af54 );
PROVIDE ( sip_to_host_chain_append = 0x4000aef8 ); PROVIDE ( sip_to_host_chain_append = 0x4000aef8 );
PROVIDE ( sip_to_host_evt_send_done = 0x4000ac04 ); PROVIDE ( sip_to_host_evt_send_done = 0x4000ac04 );
PROVIDE ( siscanf = 0x400587d0 );
PROVIDE ( _siscanf_r = 0x40058830 );
PROVIDE ( slc_add_credits = 0x4000baf4 ); PROVIDE ( slc_add_credits = 0x4000baf4 );
PROVIDE ( slc_enable = 0x4000b64c ); PROVIDE ( slc_enable = 0x4000b64c );
PROVIDE ( slc_from_host_chain_fetch = 0x4000b7e8 ); PROVIDE ( slc_from_host_chain_fetch = 0x4000b7e8 );
@ -1568,10 +1528,6 @@ PROVIDE ( slc_send_to_host_chain = 0x4000b6a0 );
PROVIDE ( slc_set_host_io_max_window = 0x4000b89c ); PROVIDE ( slc_set_host_io_max_window = 0x4000b89c );
PROVIDE ( slc_to_host_chain_recycle = 0x4000b758 ); PROVIDE ( slc_to_host_chain_recycle = 0x4000b758 );
PROVIDE ( __smakebuf_r = 0x40059108 ); PROVIDE ( __smakebuf_r = 0x40059108 );
PROVIDE ( sniprintf = 0x40056b4c );
PROVIDE ( _sniprintf_r = 0x40056ae4 );
PROVIDE ( snprintf = 0x40056b4c );
PROVIDE ( _snprintf_r = 0x40056ae4 );
PROVIDE ( software_reset = 0x4000824c ); PROVIDE ( software_reset = 0x4000824c );
PROVIDE ( software_reset_cpu = 0x40008264 ); PROVIDE ( software_reset_cpu = 0x40008264 );
PROVIDE ( specialModP256 = 0x4001600c ); PROVIDE ( specialModP256 = 0x4001600c );
@ -1607,20 +1563,13 @@ PROVIDE ( SPI_Write_Encrypt_Disable = 0x40062e60 );
PROVIDE ( SPI_Write_Encrypt_Enable = 0x40062df4 ); PROVIDE ( SPI_Write_Encrypt_Enable = 0x40062df4 );
/* This is static function, but can be used, not generated by script*/ /* This is static function, but can be used, not generated by script*/
PROVIDE ( SPI_write_status = 0x400622f0 ); PROVIDE ( SPI_write_status = 0x400622f0 );
PROVIDE ( sprintf = 0x40056c08 );
PROVIDE ( _sprintf_r = 0x40056bbc );
PROVIDE ( __sprint_r = 0x400577e4 );
PROVIDE ( srand = 0x40001004 ); PROVIDE ( srand = 0x40001004 );
PROVIDE ( __sread = 0x40001118 ); PROVIDE ( __sread = 0x40001118 );
PROVIDE ( __srefill_r = 0x400593d4 ); PROVIDE ( __srefill_r = 0x400593d4 );
PROVIDE ( sscanf = 0x400587d0 );
PROVIDE ( _sscanf_r = 0x40058830 );
PROVIDE ( __sseek = 0x40001184 ); PROVIDE ( __sseek = 0x40001184 );
PROVIDE ( __ssprint_r = 0x40056ff8 ); PROVIDE ( __ssprint_r = 0x40056ff8 );
PROVIDE ( __ssputs_r = 0x40056f2c ); PROVIDE ( __ssputs_r = 0x40056f2c );
PROVIDE ( __ssrefill_r = 0x40057fec ); PROVIDE ( __ssrefill_r = 0x40057fec );
PROVIDE ( __ssvfiscanf_r = 0x4005802c );
PROVIDE ( __ssvfscanf_r = 0x4005802c );
PROVIDE ( __stack = 0x3ffe3f20 ); PROVIDE ( __stack = 0x3ffe3f20 );
PROVIDE ( __stack_app = 0x3ffe7e30 ); PROVIDE ( __stack_app = 0x3ffe7e30 );
PROVIDE ( _stack_sentry = 0x3ffe1320 ); PROVIDE ( _stack_sentry = 0x3ffe1320 );
@ -1673,11 +1622,6 @@ PROVIDE ( SubtractFromSelfBigHexSign256 = 0x40015dc8 );
PROVIDE ( __subvdi3 = 0x40002d20 ); PROVIDE ( __subvdi3 = 0x40002d20 );
PROVIDE ( __subvsi3 = 0x40002cf8 ); PROVIDE ( __subvsi3 = 0x40002cf8 );
PROVIDE ( _sungetc_r = 0x40057f6c ); PROVIDE ( _sungetc_r = 0x40057f6c );
PROVIDE ( _svfiprintf_r = 0x40057100 );
PROVIDE ( __svfiscanf_r = 0x40057b08 );
PROVIDE ( _svfprintf_r = 0x40057100 );
PROVIDE ( __svfscanf = 0x40057f04 );
PROVIDE ( __svfscanf_r = 0x40057b08 );
PROVIDE ( __swbuf = 0x40058cb4 ); PROVIDE ( __swbuf = 0x40058cb4 );
PROVIDE ( __swbuf_r = 0x40058bec ); PROVIDE ( __swbuf_r = 0x40058bec );
PROVIDE ( __swrite = 0x40001150 ); PROVIDE ( __swrite = 0x40001150 );
@ -1756,44 +1700,8 @@ PROVIDE ( user_code_start = 0x3ffe0400 );
PROVIDE ( _UserExceptionVector = 0x40000340 ); PROVIDE ( _UserExceptionVector = 0x40000340 );
PROVIDE ( utoa = 0x40056258 ); PROVIDE ( utoa = 0x40056258 );
PROVIDE ( __utoa = 0x400561f0 ); PROVIDE ( __utoa = 0x400561f0 );
PROVIDE ( vasiprintf = 0x40056eb8 );
PROVIDE ( _vasiprintf_r = 0x40056e80 );
PROVIDE ( vasniprintf = 0x40056e58 );
PROVIDE ( _vasniprintf_r = 0x40056df8 );
PROVIDE ( vasnprintf = 0x40056e58 );
PROVIDE ( _vasnprintf_r = 0x40056df8 );
PROVIDE ( vasprintf = 0x40056eb8 );
PROVIDE ( _vasprintf_r = 0x40056e80 );
PROVIDE ( VerifyFlashMd5Proc = 0x40008c44 ); PROVIDE ( VerifyFlashMd5Proc = 0x40008c44 );
PROVIDE ( veryBigHexP256 = 0x3ff9736c ); PROVIDE ( veryBigHexP256 = 0x3ff9736c );
PROVIDE ( vfiprintf = 0x40057ae8 );
PROVIDE ( _vfiprintf_r = 0x40057850 );
PROVIDE ( vfiscanf = 0x40057eb8 );
PROVIDE ( _vfiscanf_r = 0x40057f24 );
PROVIDE ( vfprintf = 0x40057ae8 );
PROVIDE ( _vfprintf_r = 0x40057850 );
PROVIDE ( vfscanf = 0x40057eb8 );
PROVIDE ( _vfscanf_r = 0x40057f24 );
PROVIDE ( viprintf = 0x400569b4 );
PROVIDE ( _viprintf_r = 0x400569e4 );
PROVIDE ( viscanf = 0x40058698 );
PROVIDE ( _viscanf_r = 0x400586c8 );
PROVIDE ( vprintf = 0x400569b4 );
PROVIDE ( _vprintf_r = 0x400569e4 );
PROVIDE ( vscanf = 0x40058698 );
PROVIDE ( _vscanf_r = 0x400586c8 );
PROVIDE ( vsiprintf = 0x40056ac4 );
PROVIDE ( _vsiprintf_r = 0x40056a90 );
PROVIDE ( vsiscanf = 0x40058740 );
PROVIDE ( _vsiscanf_r = 0x400586f8 );
PROVIDE ( vsniprintf = 0x40056a68 );
PROVIDE ( _vsniprintf_r = 0x40056a14 );
PROVIDE ( vsnprintf = 0x40056a68 );
PROVIDE ( _vsnprintf_r = 0x40056a14 );
PROVIDE ( vsprintf = 0x40056ac4 );
PROVIDE ( _vsprintf_r = 0x40056a90 );
PROVIDE ( vsscanf = 0x40058740 );
PROVIDE ( _vsscanf_r = 0x400586f8 );
PROVIDE ( wcrtomb = 0x40058920 ); PROVIDE ( wcrtomb = 0x40058920 );
PROVIDE ( _wcrtomb_r = 0x400588d8 ); PROVIDE ( _wcrtomb_r = 0x400588d8 );
PROVIDE ( __wctomb = 0x3ff96540 ); PROVIDE ( __wctomb = 0x3ff96540 );
@ -1816,6 +1724,13 @@ PROVIDE ( Xthal_intlevel = 0x3ff9c2b4 );
PROVIDE ( xthal_memcpy = 0x4000c0bc ); PROVIDE ( xthal_memcpy = 0x4000c0bc );
PROVIDE ( xthal_set_ccompare = 0x4000c058 ); PROVIDE ( xthal_set_ccompare = 0x4000c058 );
PROVIDE ( xthal_set_intclear = 0x4000c1ec ); PROVIDE ( xthal_set_intclear = 0x4000c1ec );
PROVIDE ( _xtos_set_intlevel = 0x4000bfdc );
/*
These functions are xtos-related (or call xtos-related functions) and do not play well
with multicore FreeRTOS. Where needed, we provide alternatives that are multicore
compatible.
*/
/*
PROVIDE ( _xtos_alloca_handler = 0x40000010 ); PROVIDE ( _xtos_alloca_handler = 0x40000010 );
PROVIDE ( _xtos_cause3_handler = 0x40000dd8 ); PROVIDE ( _xtos_cause3_handler = 0x40000dd8 );
PROVIDE ( _xtos_c_handler_table = 0x3ffe0548 ); PROVIDE ( _xtos_c_handler_table = 0x3ffe0548 );
@ -1834,13 +1749,19 @@ PROVIDE ( _xtos_return_from_exc = 0x4000c034 );
PROVIDE ( _xtos_set_exception_handler = 0x4000074c ); PROVIDE ( _xtos_set_exception_handler = 0x4000074c );
PROVIDE ( _xtos_set_interrupt_handler = 0x4000bf78 ); PROVIDE ( _xtos_set_interrupt_handler = 0x4000bf78 );
PROVIDE ( _xtos_set_interrupt_handler_arg = 0x4000bf34 ); PROVIDE ( _xtos_set_interrupt_handler_arg = 0x4000bf34 );
PROVIDE ( _xtos_set_intlevel = 0x4000bfdc );
PROVIDE ( _xtos_set_min_intlevel = 0x4000bff8 ); PROVIDE ( _xtos_set_min_intlevel = 0x4000bff8 );
PROVIDE ( _xtos_set_vpri = 0x40000934 ); PROVIDE ( _xtos_set_vpri = 0x40000934 );
PROVIDE ( _xtos_syscall_handler = 0x40000790 ); PROVIDE ( _xtos_syscall_handler = 0x40000790 );
PROVIDE ( _xtos_unhandled_exception = 0x4000c024 ); PROVIDE ( _xtos_unhandled_exception = 0x4000c024 );
PROVIDE ( _xtos_unhandled_interrupt = 0x4000c01c ); PROVIDE ( _xtos_unhandled_interrupt = 0x4000c01c );
PROVIDE ( _xtos_vpri_enabled = 0x3ffe0654 ); PROVIDE ( _xtos_vpri_enabled = 0x3ffe0654 );
PROVIDE ( ets_intr_count = 0x3ffe03fc );
PROVIDE ( ets_intr_lock = 0x400067b0 );
PROVIDE ( ets_intr_unlock = 0x400067c4 );
PROVIDE ( ets_isr_attach = 0x400067ec );
PROVIDE ( ets_isr_mask = 0x400067fc );
PROVIDE ( ets_isr_unmask = 0x40006808 );
*/
/* Following are static data, but can be used, not generated by script <<<<< btdm data */ /* Following are static data, but can be used, not generated by script <<<<< btdm data */
PROVIDE ( ld_acl_env = 0x3ffb8258 ); PROVIDE ( ld_acl_env = 0x3ffb8258 );
PROVIDE ( ld_active_ch_map = 0x3ffb8334 ); PROVIDE ( ld_active_ch_map = 0x3ffb8334 );

View File

@ -0,0 +1,100 @@
/*
Address table for printf/scanf family of functions in ESP32 ROM.
These functions are compiled with newlib "nano" format option.
As such, they don's support 64-bit integer formats.
Floating point formats are supported by setting _printf_float and
_scanf_float entries in syscall table. This is done automatically
by startup code.
Generated for ROM with MD5sum:
ab8282ae908fe9e7a63fb2a4ac2df013 eagle.pro.rom.out
*/
PROVIDE ( asiprintf = 0x40056d9c );
PROVIDE ( _asiprintf_r = 0x40056d4c );
PROVIDE ( asniprintf = 0x40056cd8 );
PROVIDE ( _asniprintf_r = 0x40056c64 );
PROVIDE ( asnprintf = 0x40056cd8 );
PROVIDE ( _asnprintf_r = 0x40056c64 );
PROVIDE ( asprintf = 0x40056d9c );
PROVIDE ( _asprintf_r = 0x40056d4c );
PROVIDE ( fiprintf = 0x40056efc );
PROVIDE ( _fiprintf_r = 0x40056ed8 );
PROVIDE ( fiscanf = 0x40058884 );
PROVIDE ( _fiscanf_r = 0x400588b4 );
PROVIDE ( fprintf = 0x40056efc );
PROVIDE ( _fprintf_r = 0x40056ed8 );
PROVIDE ( iprintf = 0x40056978 );
PROVIDE ( _iprintf_r = 0x40056944 );
PROVIDE ( printf = 0x40056978 );
PROVIDE ( _printf_common = 0x40057338 );
PROVIDE ( _printf_float = 0x4000befc );
PROVIDE ( _printf_i = 0x40057404 );
PROVIDE ( _printf_r = 0x40056944 );
PROVIDE ( siprintf = 0x40056c08 );
PROVIDE ( _siprintf_r = 0x40056bbc );
PROVIDE ( sniprintf = 0x40056b4c );
PROVIDE ( _sniprintf_r = 0x40056ae4 );
PROVIDE ( snprintf = 0x40056b4c );
PROVIDE ( _snprintf_r = 0x40056ae4 );
PROVIDE ( sprintf = 0x40056c08 );
PROVIDE ( _sprintf_r = 0x40056bbc );
PROVIDE ( __sprint_r = 0x400577e4 );
PROVIDE ( _svfiprintf_r = 0x40057100 );
PROVIDE ( __svfiscanf_r = 0x40057b08 );
PROVIDE ( _svfprintf_r = 0x40057100 );
PROVIDE ( __svfscanf = 0x40057f04 );
PROVIDE ( __svfscanf_r = 0x40057b08 );
PROVIDE ( vasiprintf = 0x40056eb8 );
PROVIDE ( _vasiprintf_r = 0x40056e80 );
PROVIDE ( vasniprintf = 0x40056e58 );
PROVIDE ( _vasniprintf_r = 0x40056df8 );
PROVIDE ( vasnprintf = 0x40056e58 );
PROVIDE ( _vasnprintf_r = 0x40056df8 );
PROVIDE ( vasprintf = 0x40056eb8 );
PROVIDE ( _vasprintf_r = 0x40056e80 );
PROVIDE ( vfiprintf = 0x40057ae8 );
PROVIDE ( _vfiprintf_r = 0x40057850 );
PROVIDE ( vfiscanf = 0x40057eb8 );
PROVIDE ( _vfiscanf_r = 0x40057f24 );
PROVIDE ( vfprintf = 0x40057ae8 );
PROVIDE ( _vfprintf_r = 0x40057850 );
PROVIDE ( vfscanf = 0x40057eb8 );
PROVIDE ( _vfscanf_r = 0x40057f24 );
PROVIDE ( viprintf = 0x400569b4 );
PROVIDE ( _viprintf_r = 0x400569e4 );
PROVIDE ( viscanf = 0x40058698 );
PROVIDE ( _viscanf_r = 0x400586c8 );
PROVIDE ( vprintf = 0x400569b4 );
PROVIDE ( _vprintf_r = 0x400569e4 );
PROVIDE ( vscanf = 0x40058698 );
PROVIDE ( _vscanf_r = 0x400586c8 );
PROVIDE ( vsiprintf = 0x40056ac4 );
PROVIDE ( _vsiprintf_r = 0x40056a90 );
PROVIDE ( vsiscanf = 0x40058740 );
PROVIDE ( _vsiscanf_r = 0x400586f8 );
PROVIDE ( vsniprintf = 0x40056a68 );
PROVIDE ( _vsniprintf_r = 0x40056a14 );
PROVIDE ( vsnprintf = 0x40056a68 );
PROVIDE ( _vsnprintf_r = 0x40056a14 );
PROVIDE ( vsprintf = 0x40056ac4 );
PROVIDE ( _vsprintf_r = 0x40056a90 );
PROVIDE ( vsscanf = 0x40058740 );
PROVIDE ( _vsscanf_r = 0x400586f8 );
PROVIDE ( fscanf = 0x40058884 );
PROVIDE ( _fscanf_r = 0x400588b4 );
PROVIDE ( iscanf = 0x40058760 );
PROVIDE ( _iscanf_r = 0x4005879c );
PROVIDE ( scanf = 0x40058760 );
PROVIDE ( _scanf_chars = 0x40058384 );
PROVIDE ( _scanf_float = 0x4000bf18 );
PROVIDE ( _scanf_i = 0x4005845c );
PROVIDE ( _scanf_r = 0x4005879c );
PROVIDE ( siscanf = 0x400587d0 );
PROVIDE ( _siscanf_r = 0x40058830 );
PROVIDE ( sscanf = 0x400587d0 );
PROVIDE ( _sscanf_r = 0x40058830 );
PROVIDE ( __ssvfiscanf_r = 0x4005802c );
PROVIDE ( __ssvfscanf_r = 0x4005802c );

View File

@ -45,8 +45,8 @@ MEMORY
Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled. Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.
*/ */
rtc_slow_seg(RW) : org = 0x50000000 + 0, rtc_slow_seg(RW) : org = 0x50000000 + 512,
len = 0x1000 - 0 len = 0x1000 - 512
} }
/* Heap ends at top of dram0_0_seg */ /* Heap ends at top of dram0_0_seg */
_heap_end = 0x40000000 - 0x0; _heap_end = 0x40000000 - 0x0;

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tools/sdk/lib/libc_nano.a Normal file

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