525 lines
28 KiB
Plaintext
525 lines
28 KiB
Plaintext
/* Automatically generated file; DO NOT EDIT */
|
|
/* Espressif IoT Development Framework Linker Script */
|
|
/* Generated from: /Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/esp32c3/ld/esp32c3.project.ld.in */
|
|
|
|
/* Default entry point */
|
|
ENTRY(call_start_cpu0);
|
|
|
|
SECTIONS
|
|
{
|
|
/**
|
|
* RTC fast memory holds RTC wake stub code,
|
|
* including from any source file named rtc_wake_stub*.c
|
|
*/
|
|
.rtc.text :
|
|
{
|
|
. = ALIGN(4);
|
|
|
|
*(.rtc.literal .rtc.text .rtc.text.*)
|
|
|
|
*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
|
|
_rtc_text_end = ABSOLUTE(.);
|
|
} > rtc_iram_seg
|
|
|
|
/**
|
|
* This section is required to skip rtc.text area because rtc_iram_seg and
|
|
* rtc_data_seg are reflect the same address space on different buses.
|
|
*/
|
|
.rtc.dummy :
|
|
{
|
|
_rtc_dummy_start = ABSOLUTE(.);
|
|
_rtc_fast_start = ABSOLUTE(.);
|
|
. = SIZEOF(.rtc.text);
|
|
_rtc_dummy_end = ABSOLUTE(.);
|
|
} > rtc_data_seg
|
|
|
|
/**
|
|
* This section located in RTC FAST Memory area.
|
|
* It holds data marked with RTC_FAST_ATTR attribute.
|
|
* See the file "esp_attr.h" for more information.
|
|
*/
|
|
.rtc.force_fast :
|
|
{
|
|
. = ALIGN(4);
|
|
_rtc_force_fast_start = ABSOLUTE(.);
|
|
|
|
_coredump_rtc_fast_start = ABSOLUTE(.);
|
|
*(.rtc.fast.coredump .rtc.fast.coredump.*)
|
|
_coredump_rtc_fast_end = ABSOLUTE(.);
|
|
|
|
*(.rtc.force_fast .rtc.force_fast.*)
|
|
. = ALIGN(4) ;
|
|
_rtc_force_fast_end = ABSOLUTE(.);
|
|
} > rtc_data_seg
|
|
|
|
/**
|
|
* RTC data section holds RTC wake stub
|
|
* data/rodata, including from any source file
|
|
* named rtc_wake_stub*.c and the data marked with
|
|
* RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
|
|
* The memory location of the data is dependent on
|
|
* CONFIG_ESP32C3_RTCDATA_IN_FAST_MEM option.
|
|
*/
|
|
.rtc.data :
|
|
{
|
|
_rtc_data_start = ABSOLUTE(.);
|
|
|
|
_coredump_rtc_start = ABSOLUTE(.);
|
|
*(.rtc.coredump .rtc.coredump.*)
|
|
_coredump_rtc_end = ABSOLUTE(.);
|
|
*(.rtc.data .rtc.data.*)
|
|
*(.rtc.rodata .rtc.rodata.*)
|
|
|
|
*rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*)
|
|
_rtc_data_end = ABSOLUTE(.);
|
|
} > rtc_data_location
|
|
|
|
/* RTC bss, from any source file named rtc_wake_stub*.c */
|
|
.rtc.bss (NOLOAD) :
|
|
{
|
|
_rtc_bss_start = ABSOLUTE(.);
|
|
*rtc_wake_stub*.*(.bss .bss.*)
|
|
*rtc_wake_stub*.*(COMMON)
|
|
|
|
*(.rtc.bss)
|
|
|
|
_rtc_bss_end = ABSOLUTE(.);
|
|
} > rtc_data_location
|
|
|
|
/**
|
|
* This section holds data that should not be initialized at power up
|
|
* and will be retained during deep sleep.
|
|
* User data marked with RTC_NOINIT_ATTR will be placed
|
|
* into this section. See the file "esp_attr.h" for more information.
|
|
* The memory location of the data is dependent on CONFIG_ESP32C3_RTCDATA_IN_FAST_MEM option.
|
|
*/
|
|
.rtc_noinit (NOLOAD):
|
|
{
|
|
. = ALIGN(4);
|
|
_rtc_noinit_start = ABSOLUTE(.);
|
|
*(.rtc_noinit .rtc_noinit.*)
|
|
. = ALIGN(4) ;
|
|
_rtc_noinit_end = ABSOLUTE(.);
|
|
} > rtc_data_location
|
|
|
|
/**
|
|
* This section located in RTC SLOW Memory area.
|
|
* It holds data marked with RTC_SLOW_ATTR attribute.
|
|
* See the file "esp_attr.h" for more information.
|
|
*/
|
|
.rtc.force_slow :
|
|
{
|
|
. = ALIGN(4);
|
|
_rtc_force_slow_start = ABSOLUTE(.);
|
|
*(.rtc.force_slow .rtc.force_slow.*)
|
|
. = ALIGN(4) ;
|
|
_rtc_force_slow_end = ABSOLUTE(.);
|
|
} > rtc_slow_seg
|
|
|
|
/* Get size of rtc slow data based on rtc_data_location alias */
|
|
_rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
|
? (_rtc_force_slow_end - _rtc_data_start)
|
|
: (_rtc_force_slow_end - _rtc_force_slow_start);
|
|
|
|
_rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
|
? (_rtc_force_fast_end - _rtc_fast_start)
|
|
: (_rtc_noinit_end - _rtc_fast_start);
|
|
|
|
ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
|
|
"RTC_SLOW segment data does not fit.")
|
|
|
|
ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
|
|
"RTC_FAST segment data does not fit.")
|
|
|
|
.iram0.text :
|
|
{
|
|
_iram_start = ABSOLUTE(.);
|
|
/* Vectors go to start of IRAM */
|
|
ASSERT(ABSOLUTE(.) % 0x100 == 0, "vector address must be 256 byte aligned");
|
|
KEEP(*(.exception_vectors.text));
|
|
. = ALIGN(4);
|
|
|
|
_invalid_pc_placeholder = ABSOLUTE(.);
|
|
|
|
/* Code marked as running out of IRAM */
|
|
_iram_text_start = ABSOLUTE(.);
|
|
|
|
*(.iram1 .iram1.*)
|
|
*libapp_trace.a:app_trace.*(.literal .literal.* .text .text.*)
|
|
*libapp_trace.a:app_trace_util.*(.literal .literal.* .text .text.*)
|
|
*libesp_event.a:default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post)
|
|
*libesp_event.a:esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to)
|
|
*libesp_hw_support.a:cpu_util.*(.literal .literal.* .text .text.*)
|
|
*libesp_hw_support.a:rtc_clk.*(.literal .literal.* .text .text.*)
|
|
*libesp_hw_support.a:rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config)
|
|
*libesp_hw_support.a:rtc_pm.*(.literal .literal.* .text .text.*)
|
|
*libesp_hw_support.a:rtc_sleep.*(.literal .literal.* .text .text.*)
|
|
*libesp_hw_support.a:rtc_time.*(.literal .literal.* .text .text.*)
|
|
*libesp_ringbuf.a:(.literal .literal.* .text .text.*)
|
|
*libesp_system.a:esp_err.*(.literal .literal.* .text .text.*)
|
|
*libesp_system.a:panic.*(.literal .literal.* .text .text.*)
|
|
*libesp_system.a:panic_arch.*(.literal .literal.* .text .text.*)
|
|
*libesp_system.a:panic_handler.*(.literal .literal.* .text .text.*)
|
|
*libesp_system.a:reset_reason.*(.literal .literal.* .text .text.*)
|
|
*libesp_system.a:system_api.*(.literal.esp_system_abort .text.esp_system_abort)
|
|
*libfreertos.a:(EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal.* EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text.*)
|
|
*libfreertos.a:port.*(.text .text.prvTaskExitError .text.pxPortInitialiseStack .text.vApplicationStackOverflowHook .text.vPortCPUAcquireMutex .text.vPortCPUAcquireMutexTimeout .text.vPortCPUInitializeMutex .text.vPortCPUReleaseMutex .text.vPortClearInterruptMask .text.vPortEndScheduler .text.vPortEnterCritical .text.vPortExitCritical .text.vPortSetInterruptMask .text.vPortSetStackWatchpoint .text.vPortSetupTimer .text.vPortYield .text.vPortYieldFromISR .text.vPortYieldOtherCore .text.xPortGetTickRateHz .text.xPortInIsrContext .text.xPortStartScheduler)
|
|
*libfreertos.a:port_common.*(.text .text.esp_startup_start_app_common)
|
|
*libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*)
|
|
*libgcov.a:(.literal .literal.* .text .text.*)
|
|
*libhal.a:cpu_hal.*(.literal .literal.* .text .text.*)
|
|
*libhal.a:i2c_hal_iram.*(.literal .literal.* .text .text.*)
|
|
*libhal.a:ledc_hal_iram.*(.literal .literal.* .text .text.*)
|
|
*libhal.a:soc_hal.*(.literal .literal.* .text .text.*)
|
|
*libhal.a:spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
|
|
*libhal.a:spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
|
|
*libhal.a:spi_hal_iram.*(.literal .literal.* .text .text.*)
|
|
*libhal.a:spi_slave_hal_iram.*(.literal .literal.* .text .text.*)
|
|
*libhal.a:systimer_hal.*(.literal .literal.* .text .text.*)
|
|
*libhal.a:wdt_hal_iram.*(.literal .literal.* .text .text.*)
|
|
*libheap.a:heap_tlsf.*(.literal .literal.* .text .text.*)
|
|
*libheap.a:multi_heap.*(.literal .literal.* .text .text.*)
|
|
*liblog.a:log.*(.literal.esp_log_write .text.esp_log_write)
|
|
*liblog.a:log_freertos.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
|
|
*liblog.a:log_freertos.*(.literal.esp_log_impl_lock .text.esp_log_impl_lock)
|
|
*liblog.a:log_freertos.*(.literal.esp_log_impl_lock_timeout .text.esp_log_impl_lock_timeout)
|
|
*liblog.a:log_freertos.*(.literal.esp_log_impl_unlock .text.esp_log_impl_unlock)
|
|
*liblog.a:log_freertos.*(.literal.esp_log_timestamp .text.esp_log_timestamp)
|
|
*libnewlib.a:abort.*(.literal .literal.* .text .text.*)
|
|
*libnewlib.a:heap.*(.literal .literal.* .text .text.*)
|
|
*libnewlib.a:stdatomic.*(.literal .literal.* .text .text.*)
|
|
*libriscv.a:interrupt.*(.literal .literal.* .text .text.*)
|
|
*libriscv.a:vectors.*(.literal .literal.* .text .text.*)
|
|
*librtc.a:(.literal .literal.* .text .text.*)
|
|
*libsoc.a:lldesc.*(.literal .literal.* .text .text.*)
|
|
*libspi_flash.a:memspi_host_driver.*(.literal .literal.* .text .text.*)
|
|
*libspi_flash.a:spi_flash_chip_boya.*(.literal .literal.* .text .text.*)
|
|
*libspi_flash.a:spi_flash_chip_gd.*(.literal .literal.* .text .text.*)
|
|
*libspi_flash.a:spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
|
|
*libspi_flash.a:spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
|
|
*libspi_flash.a:spi_flash_chip_mxic.*(.literal .literal.* .text .text.*)
|
|
*libspi_flash.a:spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
|
|
*libspi_flash.a:spi_flash_rom_patch.*(.literal .literal.* .text .text.*)
|
|
|
|
} > iram0_0_seg
|
|
|
|
/**
|
|
* This section is required to skip .iram0.text area because iram0_0_seg and
|
|
* dram0_0_seg reflect the same address space on different buses.
|
|
*/
|
|
.dram0.dummy (NOLOAD):
|
|
{
|
|
. = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
|
|
} > dram0_0_seg
|
|
|
|
.dram0.data :
|
|
{
|
|
_data_start = ABSOLUTE(.);
|
|
*(.gnu.linkonce.d.*)
|
|
*(.data1)
|
|
__global_pointer$ = . + 0x800;
|
|
*(.sdata)
|
|
*(.sdata.*)
|
|
*(.gnu.linkonce.s.*)
|
|
*(.sdata2)
|
|
*(.sdata2.*)
|
|
*(.gnu.linkonce.s2.*)
|
|
*(.jcr)
|
|
|
|
_esp_system_init_fn_array_start = ABSOLUTE(.);
|
|
KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*)))
|
|
_esp_system_init_fn_array_end = ABSOLUTE(.);
|
|
|
|
*(EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data.*)
|
|
*(.dram1 .dram1.*)
|
|
_coredump_dram_start = ABSOLUTE(.);
|
|
*(.dram1.coredump .dram1.coredump.*)
|
|
_coredump_dram_end = ABSOLUTE(.);
|
|
*libapp_trace.a:app_trace.*(.rodata .rodata.*)
|
|
*libapp_trace.a:app_trace_util.*(.rodata .rodata.*)
|
|
_bt_data_start = ABSOLUTE(.);
|
|
*libbt.a:(.data .data.*)
|
|
. = ALIGN(4);
|
|
_bt_data_end = ABSOLUTE(.);
|
|
_btdm_data_start = ABSOLUTE(.);
|
|
*libbtdm_app.a:(.data .data.*)
|
|
. = ALIGN(4);
|
|
_btdm_data_end = ABSOLUTE(.);
|
|
*libesp_hw_support.a:rtc_clk.*(.rodata .rodata.*)
|
|
*libesp_system.a:esp_err.*(.rodata .rodata.*)
|
|
*libesp_system.a:panic.*(.rodata .rodata.*)
|
|
*libesp_system.a:panic_arch.*(.rodata .rodata.*)
|
|
*libesp_system.a:panic_handler.*(.rodata .rodata.*)
|
|
*libesp_system.a:reset_reason.*(.rodata .rodata.*)
|
|
*libgcov.a:(.rodata .rodata.*)
|
|
*libhal.a:cpu_hal.*(.rodata .rodata.*)
|
|
*libhal.a:i2c_hal_iram.*(.rodata .rodata.*)
|
|
*libhal.a:ledc_hal_iram.*(.rodata .rodata.*)
|
|
*libhal.a:soc_hal.*(.rodata .rodata.*)
|
|
*libhal.a:spi_flash_hal_gpspi.*(.rodata .rodata.*)
|
|
*libhal.a:spi_flash_hal_iram.*(.rodata .rodata.*)
|
|
*libhal.a:spi_hal_iram.*(.rodata .rodata.*)
|
|
*libhal.a:spi_slave_hal_iram.*(.rodata .rodata.*)
|
|
*libhal.a:systimer_hal.*(.rodata .rodata.*)
|
|
*libhal.a:wdt_hal_iram.*(.rodata .rodata.*)
|
|
*libheap.a:heap_tlsf.*(.rodata .rodata.*)
|
|
*libheap.a:multi_heap.*(.rodata .rodata.*)
|
|
*libnewlib.a:abort.*(.rodata .rodata.*)
|
|
*libnewlib.a:heap.*(.rodata .rodata.*)
|
|
*libnewlib.a:stdatomic.*(.rodata .rodata.*)
|
|
_nimble_data_start = ABSOLUTE(.);
|
|
*libnimble.a:(.data .data.*)
|
|
. = ALIGN(4);
|
|
_nimble_data_end = ABSOLUTE(.);
|
|
*libphy.a:(.rodata .rodata.*)
|
|
*libsoc.a:lldesc.*(.rodata .rodata.*)
|
|
*libspi_flash.a:memspi_host_driver.*(.rodata .rodata.*)
|
|
*libspi_flash.a:spi_flash_chip_boya.*(.rodata .rodata.*)
|
|
*libspi_flash.a:spi_flash_chip_gd.*(.rodata .rodata.*)
|
|
*libspi_flash.a:spi_flash_chip_generic.*(.rodata .rodata.*)
|
|
*libspi_flash.a:spi_flash_chip_issi.*(.rodata .rodata.*)
|
|
*libspi_flash.a:spi_flash_chip_mxic.*(.rodata .rodata.*)
|
|
*libspi_flash.a:spi_flash_chip_winbond.*(.rodata .rodata.*)
|
|
*libspi_flash.a:spi_flash_rom_patch.*(.rodata .rodata.*)
|
|
|
|
_data_end = ABSOLUTE(.);
|
|
. = ALIGN(4);
|
|
} > dram0_0_seg
|
|
|
|
/**
|
|
* This section holds data that should not be initialized at power up.
|
|
* The section located in Internal SRAM memory region. The macro _NOINIT
|
|
* can be used as attribute to place data into this section.
|
|
* See the "esp_attr.h" file for more information.
|
|
*/
|
|
.noinit (NOLOAD):
|
|
{
|
|
. = ALIGN(4);
|
|
_noinit_start = ABSOLUTE(.);
|
|
*(.noinit .noinit.*)
|
|
. = ALIGN(4) ;
|
|
_noinit_end = ABSOLUTE(.);
|
|
} > dram0_0_seg
|
|
|
|
/* Shared RAM */
|
|
.dram0.bss (NOLOAD) :
|
|
{
|
|
. = ALIGN (8);
|
|
_bss_start = ABSOLUTE(.);
|
|
|
|
*(.bss .bss.*)
|
|
*(COMMON)
|
|
_bt_bss_start = ABSOLUTE(.);
|
|
*libbt.a:(.bss .bss.* COMMON)
|
|
. = ALIGN(4);
|
|
_bt_bss_end = ABSOLUTE(.);
|
|
_btdm_bss_start = ABSOLUTE(.);
|
|
*libbtdm_app.a:(.bss .bss.* COMMON)
|
|
. = ALIGN(4);
|
|
_btdm_bss_end = ABSOLUTE(.);
|
|
_nimble_bss_start = ABSOLUTE(.);
|
|
*libnimble.a:(.bss .bss.* COMMON)
|
|
. = ALIGN(4);
|
|
_nimble_bss_end = ABSOLUTE(.);
|
|
|
|
*(.dynsbss)
|
|
*(.sbss)
|
|
*(.sbss.*)
|
|
*(.gnu.linkonce.sb.*)
|
|
*(.scommon)
|
|
*(.sbss2)
|
|
*(.sbss2.*)
|
|
*(.gnu.linkonce.sb2.*)
|
|
*(.dynbss)
|
|
*(.share.mem)
|
|
*(.gnu.linkonce.b.*)
|
|
|
|
. = ALIGN (8);
|
|
_bss_end = ABSOLUTE(.);
|
|
} > dram0_0_seg
|
|
|
|
ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.")
|
|
|
|
.flash.text :
|
|
{
|
|
_stext = .;
|
|
_instruction_reserved_start = ABSOLUTE(.);
|
|
_text_start = ABSOLUTE(.);
|
|
|
|
*(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:panic.* *libesp_system.a:panic_arch.* *libesp_system.a:panic_handler.* *libesp_system.a:reset_reason.* *libesp_system.a:system_api.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:panic.* *libesp_system.a:panic_arch.* *libesp_system.a:panic_handler.* *libesp_system.a:reset_reason.* *libesp_system.a:system_api.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:panic.* *libesp_system.a:panic_arch.* *libesp_system.a:panic_handler.* *libesp_system.a:reset_reason.* *libesp_system.a:system_api.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_system.a:esp_err.* *libesp_system.a:panic.* *libesp_system.a:panic_arch.* *libesp_system.a:panic_handler.* *libesp_system.a:reset_reason.* *libesp_system.a:system_api.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libriscv.a:interrupt.* *libriscv.a:vectors.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .text.*)
|
|
*(.wifi0iram .wifi0iram.*)
|
|
*(.wifiorslpiram .wifiorslpiram.*)
|
|
*(.wifirxiram .wifirxiram.*)
|
|
*(.wifislpiram .wifislpiram.*)
|
|
*(.wifislprxiram .wifislprxiram.*)
|
|
*libesp_event.a:default_event_loop.*(.text .text.esp_event_handler_instance_register .text.esp_event_handler_instance_unregister .text.esp_event_handler_register .text.esp_event_handler_unregister .text.esp_event_loop_create_default .text.esp_event_loop_delete_default .text.esp_event_post .text.esp_event_send_to_default_loop)
|
|
*libesp_event.a:esp_event.*(.text .text.base_node_add_handler .text.base_node_remove_all_handler .text.base_node_remove_handler .text.esp_event_dump .text.esp_event_handler_instance_register_with .text.esp_event_handler_instance_unregister_with .text.esp_event_handler_register_with .text.esp_event_handler_register_with_internal .text.esp_event_handler_unregister_with .text.esp_event_handler_unregister_with_internal .text.esp_event_loop_create .text.esp_event_loop_delete .text.esp_event_loop_run .text.esp_event_loop_run_task .text.esp_event_post_to .text.handler_execute .text.handler_instances_add .text.handler_instances_remove .text.handler_instances_remove_all .text.loop_node_add_handler .text.loop_node_remove_all_handler .text.loop_node_remove_handler)
|
|
*libesp_hw_support.a:rtc_init.*(.text .text.calibrate_ocode .text.rtc_init .text.rtc_vddsdio_get_config .text.set_ocode_by_efuse)
|
|
*libesp_system.a:system_api.*(.text .text.esp_get_free_heap_size .text.esp_get_free_internal_heap_size .text.esp_get_idf_version .text.esp_get_minimum_free_heap_size .text.esp_register_shutdown_handler .text.esp_unregister_shutdown_handler)
|
|
*libfreertos.a:port.*(.literal.esp_startup_start_app .text.esp_startup_start_app)
|
|
*libfreertos.a:port_common.*(.literal.main_task .text.main_task)
|
|
*liblog.a:log.*(.text .text.esp_log_level_set .text.esp_log_set_vprintf .text.esp_log_writev .text.heap_bubble_down)
|
|
*liblog.a:log_freertos.*(.text .text.esp_log_system_timestamp)
|
|
|
|
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
|
|
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
|
|
*(.fini.literal)
|
|
*(.fini)
|
|
*(.gnu.version)
|
|
|
|
/** CPU will try to prefetch up to 16 bytes of
|
|
* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
|
|
* safe access to up to 16 bytes after the last real instruction, add
|
|
* dummy bytes to ensure this
|
|
*/
|
|
. += 16;
|
|
|
|
_text_end = ABSOLUTE(.);
|
|
_instruction_reserved_end = ABSOLUTE(.);
|
|
_etext = .;
|
|
|
|
/**
|
|
* Similar to _iram_start, this symbol goes here so it is
|
|
* resolved by addr2line in preference to the first symbol in
|
|
* the flash.text segment.
|
|
*/
|
|
_flash_cache_start = ABSOLUTE(0);
|
|
} > default_code_seg
|
|
|
|
/**
|
|
* This dummy section represents the .flash.text section but in default_rodata_seg.
|
|
* Thus, it must have its alignement and (at least) its size.
|
|
*/
|
|
.flash_rodata_dummy (NOLOAD):
|
|
{
|
|
/* Start at the same alignement constraint than .flash.text */
|
|
. = ALIGN(ALIGNOF(.flash.text));
|
|
/* Create an empty gap as big as .flash.text section */
|
|
. = . + SIZEOF(.flash.text);
|
|
/* Prepare the alignement of the section above. Few bytes (0x20) must be
|
|
* added for the mapping header. */
|
|
. = ALIGN(0x10000) + 0x20;
|
|
_rodata_reserved_start = .;
|
|
} > default_rodata_seg
|
|
|
|
/* When modifying the alignment, don't forget to update tls_section_alignment in pxPortInitialiseStack */
|
|
.flash.rodata : ALIGN(0x10)
|
|
{
|
|
_rodata_start = ABSOLUTE(.);
|
|
|
|
*(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */
|
|
*(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
|
|
|
|
*(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:panic.* *libesp_system.a:panic_arch.* *libesp_system.a:panic_handler.* *libesp_system.a:reset_reason.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:panic.* *libesp_system.a:panic_arch.* *libesp_system.a:panic_handler.* *libesp_system.a:reset_reason.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata.*)
|
|
|
|
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
|
|
*(.gnu.linkonce.r.*)
|
|
*(.rodata1)
|
|
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
|
|
*(.xt_except_table)
|
|
*(.gcc_except_table .gcc_except_table.*)
|
|
*(.gnu.linkonce.e.*)
|
|
*(.gnu.version_r)
|
|
. = (. + 3) & ~ 3;
|
|
__eh_frame = ABSOLUTE(.);
|
|
KEEP(*(.eh_frame))
|
|
. = (. + 7) & ~ 3;
|
|
/*
|
|
* C++ constructor and destructor tables
|
|
* Don't include anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt.
|
|
*
|
|
* RISC-V gcc is configured with --enable-initfini-array so it emits an .init_array section instead.
|
|
* But the init_priority sections will be sorted for iteration in ascending order during startup.
|
|
* The rest of the init_array sections is sorted for iteration in descending order during startup, however.
|
|
* Hence a different section is generated for the init_priority functions which is iterated in
|
|
* ascending order during startup. The corresponding code can be found in startup.c.
|
|
*/
|
|
__init_priority_array_start = ABSOLUTE(.);
|
|
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*))
|
|
__init_priority_array_end = ABSOLUTE(.);
|
|
__init_array_start = ABSOLUTE(.);
|
|
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array))
|
|
__init_array_end = ABSOLUTE(.);
|
|
KEEP (*crtbegin.*(.dtors))
|
|
KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
|
|
KEEP (*(SORT(.dtors.*)))
|
|
KEEP (*(.dtors))
|
|
/* C++ exception handlers table: */
|
|
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
|
|
*(.xt_except_desc)
|
|
*(.gnu.linkonce.h.*)
|
|
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
|
|
*(.xt_except_desc_end)
|
|
*(.dynamic)
|
|
*(.gnu.version_d)
|
|
/* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
|
|
soc_reserved_memory_region_start = ABSOLUTE(.);
|
|
KEEP (*(.reserved_memory_address))
|
|
soc_reserved_memory_region_end = ABSOLUTE(.);
|
|
_rodata_end = ABSOLUTE(.);
|
|
/* Literals are also RO data. */
|
|
_lit4_start = ABSOLUTE(.);
|
|
*(*.lit4)
|
|
*(.lit4.*)
|
|
*(.gnu.linkonce.lit4.*)
|
|
_lit4_end = ABSOLUTE(.);
|
|
. = ALIGN(4);
|
|
_thread_local_start = ABSOLUTE(.);
|
|
*(.tdata)
|
|
*(.tdata.*)
|
|
*(.tbss)
|
|
*(.tbss.*)
|
|
*(.srodata)
|
|
*(.srodata.*)
|
|
_thread_local_end = ABSOLUTE(.);
|
|
_rodata_reserved_end = ABSOLUTE(.);
|
|
. = ALIGN(4);
|
|
} > default_rodata_seg
|
|
|
|
/* Marks the end of IRAM code segment */
|
|
.iram0.text_end (NOLOAD) :
|
|
{
|
|
/* C3 memprot requires 512 B alignment for split lines */
|
|
. = ALIGN (0x200);
|
|
_iram_text_end = ABSOLUTE(.);
|
|
} > iram0_0_seg
|
|
|
|
.iram0.data :
|
|
{
|
|
. = ALIGN(16);
|
|
_iram_data_start = ABSOLUTE(.);
|
|
|
|
*(.iram.data .iram.data.*)
|
|
_coredump_iram_start = ABSOLUTE(.);
|
|
*(.iram.data.coredump .iram.data.coredump.*)
|
|
_coredump_iram_end = ABSOLUTE(.);
|
|
|
|
_iram_data_end = ABSOLUTE(.);
|
|
} > iram0_0_seg
|
|
|
|
.iram0.bss (NOLOAD) :
|
|
{
|
|
. = ALIGN(16);
|
|
_iram_bss_start = ABSOLUTE(.);
|
|
|
|
*(.iram.bss .iram.bss.*)
|
|
|
|
_iram_bss_end = ABSOLUTE(.);
|
|
. = ALIGN(16);
|
|
_iram_end = ABSOLUTE(.);
|
|
} > iram0_0_seg
|
|
|
|
/* Marks the end of data, bss and possibly rodata */
|
|
.dram0.heap_start (NOLOAD) :
|
|
{
|
|
. = ALIGN (16);
|
|
_heap_start = ABSOLUTE(.);
|
|
} > dram0_0_seg
|
|
}
|
|
|
|
ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
|
|
"IRAM0 segment data does not fit.")
|
|
|
|
ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
|
|
"DRAM segment data does not fit.")
|