383 lines
11 KiB
C
383 lines
11 KiB
C
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "esp32-hal-i2c.h"
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#include "esp32-hal.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "rom/ets_sys.h"
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#include "soc/i2c_reg.h"
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#include "soc/i2c_struct.h"
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#include "soc/dport_reg.h"
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//#define I2C_DEV(i) (volatile i2c_dev_t *)((i)?DR_REG_I2C1_EXT_BASE:DR_REG_I2C_EXT_BASE)
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//#define I2C_DEV(i) ((i2c_dev_t *)(REG_I2C_BASE(i)))
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#define I2C_SCL_IDX(p) ((p==0)?I2CEXT0_SCL_OUT_IDX:((p==1)?I2CEXT1_SCL_OUT_IDX:0))
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#define I2C_SDA_IDX(p) ((p==0)?I2CEXT0_SDA_OUT_IDX:((p==1)?I2CEXT1_SDA_OUT_IDX:0))
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struct i2c_struct_t {
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i2c_dev_t * dev;
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xSemaphoreHandle lock;
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uint8_t num;
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};
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enum {
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I2C_CMD_RSTART,
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I2C_CMD_WRITE,
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I2C_CMD_READ,
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I2C_CMD_STOP,
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I2C_CMD_END
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};
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#define I2C_MUTEX_LOCK() do {} while (xSemaphoreTake(i2c->lock, portMAX_DELAY) != pdPASS)
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#define I2C_MUTEX_UNLOCK() xSemaphoreGive(i2c->lock)
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static i2c_t _i2c_bus_array[2] = {
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{(volatile i2c_dev_t *)(DR_REG_I2C_EXT_BASE), NULL, 0},
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{(volatile i2c_dev_t *)(DR_REG_I2C1_EXT_BASE), NULL, 1}
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};
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i2c_err_t i2cAttachSCL(i2c_t * i2c, int8_t scl)
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{
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if(i2c == NULL){
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return I2C_ERROR_DEV;
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}
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pinMode(scl, OUTPUT);
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pinMatrixOutAttach(scl, I2C_SCL_IDX(i2c->num), false, false);
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pinMatrixInAttach(scl, I2C_SCL_IDX(i2c->num), false);
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return I2C_ERROR_OK;
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}
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i2c_err_t i2cDetachSCL(i2c_t * i2c, int8_t scl)
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{
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if(i2c == NULL){
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return I2C_ERROR_DEV;
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}
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pinMatrixOutDetach(scl, false, false);
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pinMatrixInDetach(I2C_SCL_IDX(i2c->num), false, false);
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pinMode(scl, INPUT);
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return I2C_ERROR_OK;
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}
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i2c_err_t i2cAttachSDA(i2c_t * i2c, int8_t sda)
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{
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if(i2c == NULL){
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return I2C_ERROR_DEV;
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}
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pinMode(sda, OUTPUT_OPEN_DRAIN);
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pinMatrixOutAttach(sda, I2C_SDA_IDX(i2c->num), false, false);
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pinMatrixInAttach(sda, I2C_SDA_IDX(i2c->num), false);
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return I2C_ERROR_OK;
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}
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i2c_err_t i2cDetachSDA(i2c_t * i2c, int8_t sda)
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{
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if(i2c == NULL){
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return I2C_ERROR_DEV;
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}
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pinMatrixOutDetach(sda, false, false);
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pinMatrixInDetach(I2C_SDA_IDX(i2c->num), false, false);
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pinMode(sda, INPUT);
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return I2C_ERROR_OK;
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}
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/*
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* index - command index (0 to 15)
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* op_code - is the command
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* byte_num - This register is to store the amounts of data that is read and written. byte_num in RSTART, STOP, END is null.
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* ack_val - Each data byte is terminated by an ACK bit used to set the bit level.
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* ack_exp - This bit is to set an expected ACK value for the transmitter.
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* ack_check - This bit is to decide whether the transmitter checks ACK bit. 1 means yes and 0 means no.
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* */
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void i2cSetCmd(i2c_t * i2c, uint8_t index, uint8_t op_code, uint8_t byte_num, bool ack_val, bool ack_exp, bool ack_check)
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{
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i2c->dev->command[index].val = 0;
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i2c->dev->command[index].ack_en = ack_check;
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i2c->dev->command[index].ack_exp = ack_exp;
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i2c->dev->command[index].ack_val = ack_val;
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i2c->dev->command[index].byte_num = byte_num;
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i2c->dev->command[index].op_code = op_code;
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}
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void i2cResetFiFo(i2c_t * i2c)
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{
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i2c->dev->fifo_conf.tx_fifo_rst = 1;
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i2c->dev->fifo_conf.tx_fifo_rst = 0;
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i2c->dev->fifo_conf.rx_fifo_rst = 1;
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i2c->dev->fifo_conf.rx_fifo_rst = 0;
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}
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i2c_err_t i2cWrite(i2c_t * i2c, uint16_t address, bool addr_10bit, uint8_t * data, uint8_t len, bool sendStop)
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{
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int i;
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uint8_t index = 0;
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uint8_t dataLen = len + (addr_10bit?2:1);
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address = (address << 1);
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if(i2c == NULL){
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return I2C_ERROR_DEV;
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}
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I2C_MUTEX_LOCK();
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while(dataLen) {
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uint8_t willSend = (dataLen > 32)?32:dataLen;
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uint8_t dataSend = willSend;
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i2cResetFiFo(i2c);
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//CMD START
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i2cSetCmd(i2c, 0, I2C_CMD_RSTART, 0, false, false, false);
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//CMD WRITE(ADDRESS + DATA)
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if(!index) {
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i2c->dev->fifo_data.data = address & 0xFF;
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dataSend--;
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if(addr_10bit) {
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i2c->dev->fifo_data.data = (address >> 8) & 0xFF;
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dataSend--;
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}
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}
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i = 0;
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while(i<dataSend) {
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i++;
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i2c->dev->fifo_data.data = data[index++];
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}
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i2cSetCmd(i2c, 1, I2C_CMD_WRITE, willSend, false, false, true);
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dataLen -= willSend;
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//CMD STOP or CMD END if there is more data
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if(dataLen) {
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i2cSetCmd(i2c, 2, I2C_CMD_END, 0, false, false, false);
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} else if(sendStop) {
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i2cSetCmd(i2c, 2, I2C_CMD_STOP, 0, false, false, false);
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}
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//Clear Interrupts
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i2c->dev->int_clr.val = 0xFFFFFFFF;
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//START Transmission
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i2c->dev->ctr.trans_start = 1;
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//WAIT Transmission
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while(1) {
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//Bus failed (maybe check for this while waiting?
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if(i2c->dev->int_raw.arbitration_lost) {
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//log_e("Bus Fail! Addr: %x", address >> 1);
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I2C_MUTEX_UNLOCK();
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return I2C_ERROR_BUS;
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}
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//Bus timeout
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if(i2c->dev->int_raw.time_out) {
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//log_e("Bus Timeout! Addr: %x", address >> 1);
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I2C_MUTEX_UNLOCK();
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return I2C_ERROR_TIMEOUT;
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}
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//Transmission did not finish and ACK_ERR is set
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if(i2c->dev->int_raw.ack_err) {
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//log_e("Ack Error! Addr: %x", address >> 1);
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I2C_MUTEX_UNLOCK();
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return I2C_ERROR_ACK;
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}
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if(i2c->dev->ctr.trans_start || i2c->dev->status_reg.bus_busy || !(i2c->dev->int_raw.trans_complete) || !(i2c->dev->command[2].done)) {
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continue;
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} else if(i2c->dev->command[2].done) {
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break;
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}
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}
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}
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I2C_MUTEX_UNLOCK();
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return I2C_ERROR_OK;
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}
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i2c_err_t i2cRead(i2c_t * i2c, uint16_t address, bool addr_10bit, uint8_t * data, uint8_t len, bool sendStop)
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{
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address = (address << 1) | 1;
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uint8_t addrLen = (addr_10bit?2:1);
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uint8_t index = 0;
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uint8_t cmdIdx;
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uint8_t willRead;
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if(i2c == NULL){
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return I2C_ERROR_DEV;
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}
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I2C_MUTEX_LOCK();
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i2cResetFiFo(i2c);
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//CMD START
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i2cSetCmd(i2c, 0, I2C_CMD_RSTART, 0, false, false, false);
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//CMD WRITE ADDRESS
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i2c->dev->fifo_data.data = address & 0xFF;
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if(addr_10bit) {
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i2c->dev->fifo_data.data = (address >> 8) & 0xFF;
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}
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i2cSetCmd(i2c, 1, I2C_CMD_WRITE, addrLen, false, false, true);
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while(len) {
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cmdIdx = (index)?0:2;
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willRead = (len > 32)?32:(len-1);
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if(cmdIdx){
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i2cResetFiFo(i2c);
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}
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i2cSetCmd(i2c, cmdIdx++, I2C_CMD_READ, willRead, false, false, false);
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if((len - willRead) > 1) {
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i2cSetCmd(i2c, cmdIdx++, I2C_CMD_END, 0, false, false, false);
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} else {
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willRead++;
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i2cSetCmd(i2c, cmdIdx++, I2C_CMD_READ, 1, true, false, false);
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if(sendStop) {
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i2cSetCmd(i2c, cmdIdx++, I2C_CMD_STOP, 0, false, false, false);
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}
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}
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//Clear Interrupts
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i2c->dev->int_clr.val = 0xFFFFFFFF;
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//START Transmission
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i2c->dev->ctr.trans_start = 1;
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//WAIT Transmission
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while(1) {
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//Bus failed (maybe check for this while waiting?
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if(i2c->dev->int_raw.arbitration_lost) {
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//log_e("Bus Fail! Addr: %x", address >> 1);
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I2C_MUTEX_UNLOCK();
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return I2C_ERROR_BUS;
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}
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//Bus timeout
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if(i2c->dev->int_raw.time_out) {
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//log_e("Bus Timeout! Addr: %x", address >> 1);
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I2C_MUTEX_UNLOCK();
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return I2C_ERROR_TIMEOUT;
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}
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//Transmission did not finish and ACK_ERR is set
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if(i2c->dev->int_raw.ack_err) {
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//log_e("Ack Error! Addr: %x", address >> 1);
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I2C_MUTEX_UNLOCK();
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return I2C_ERROR_ACK;
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}
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if(i2c->dev->ctr.trans_start || i2c->dev->status_reg.bus_busy || !(i2c->dev->int_raw.trans_complete) || !(i2c->dev->command[cmdIdx-1].done)) {
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continue;
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} else if(i2c->dev->command[cmdIdx-1].done) {
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break;
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}
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}
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int i = 0;
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while(i<willRead) {
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i++;
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data[index++] = i2c->dev->fifo_data.data;
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}
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len -= willRead;
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}
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I2C_MUTEX_UNLOCK();
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return I2C_ERROR_OK;
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}
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i2c_err_t i2cSetFrequency(i2c_t * i2c, uint32_t clk_speed)
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{
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uint32_t period = (APB_CLK_FREQ/clk_speed) / 2;
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if(i2c == NULL){
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return I2C_ERROR_DEV;
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}
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I2C_MUTEX_LOCK();
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i2c->dev->scl_low_period.scl_low_period = period;
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i2c->dev->scl_high_period.period = period;
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i2c->dev->scl_start_hold.time = 50;
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i2c->dev->scl_rstart_setup.time = 50;
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i2c->dev->scl_stop_hold.time = 50;
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i2c->dev->scl_stop_setup.time = 50;
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i2c->dev->sda_hold.time = 25;
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i2c->dev->sda_sample.time = 25;
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I2C_MUTEX_UNLOCK();
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return I2C_ERROR_OK;
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}
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uint32_t i2cGetFrequency(i2c_t * i2c)
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{
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if(i2c == NULL){
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return 0;
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}
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return APB_CLK_FREQ/(i2c->dev->scl_low_period.scl_low_period+i2c->dev->scl_high_period.period);
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}
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/*
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* mode - 0 = Slave, 1 = Master
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* slave_addr - I2C Address
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* addr_10bit_en - enable slave 10bit address mode.
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* */
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i2c_t * i2cInit(uint8_t i2c_num, uint16_t slave_addr, bool addr_10bit_en)
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{
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if(i2c_num > 1){
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return NULL;
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}
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i2c_t * i2c = &_i2c_bus_array[i2c_num];
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if(i2c->lock == NULL){
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i2c->lock = xSemaphoreCreateMutex();
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if(i2c->lock == NULL) {
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return NULL;
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}
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}
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if(i2c_num == 0) {
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SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG,DPORT_I2C_EXT0_CLK_EN);
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CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG,DPORT_I2C_EXT0_RST);
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} else {
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SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG,DPORT_I2C_EXT1_CLK_EN);
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CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG,DPORT_I2C_EXT1_RST);
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}
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I2C_MUTEX_LOCK();
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i2c->dev->ctr.val = 0;
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i2c->dev->ctr.ms_mode = (slave_addr == 0);
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i2c->dev->ctr.sda_force_out = 1 ;
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i2c->dev->ctr.scl_force_out = 1 ;
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i2c->dev->ctr.clk_en = 1;
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i2c->dev->timeout.tout = 2000;
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i2c->dev->fifo_conf.nonfifo_en = 0;
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i2c->dev->slave_addr.val = 0;
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if (slave_addr) {
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i2c->dev->slave_addr.addr = slave_addr;
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i2c->dev->slave_addr.en_10bit = addr_10bit_en;
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}
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I2C_MUTEX_UNLOCK();
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return i2c;
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}
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