273 lines
7.1 KiB
C
273 lines
7.1 KiB
C
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "esp32-hal-uart.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "rom/ets_sys.h"
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#include "esp_attr.h"
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#include "esp_intr.h"
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#include "rom/uart.h"
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#include "soc/uart_reg.h"
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#include "soc/io_mux_reg.h"
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#include "soc/gpio_sig_map.h"
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#define ETS_UART2_INUM 5
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#define UART_REG_BASE(u) ((u==0)?DR_REG_UART_BASE:( (u==1)?DR_REG_UART1_BASE:( (u==2)?DR_REG_UART2_BASE:0)))
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#define UART_RXD_IDX(u) ((u==0)?U0RXD_IN_IDX:( (u==1)?U1RXD_IN_IDX:( (u==2)?U2RXD_IN_IDX:0)))
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#define UART_TXD_IDX(u) ((u==0)?U0TXD_OUT_IDX:( (u==1)?U1TXD_OUT_IDX:( (u==2)?U2TXD_OUT_IDX:0)))
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#define UART_INUM(u) ((u==0)?ETS_UART0_INUM:( (u==1)?ETS_UART1_INUM:( (u==2)?ETS_UART2_INUM:0)))
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#define UART_INTR_SOURCE(u) ((u==0)?ETS_UART0_INTR_SOURCE:( (u==1)?ETS_UART1_INTR_SOURCE:((u==2)?ETS_UART2_INTR_SOURCE:0)))
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static int s_uart_debug_nr = 0;
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static void IRAM_ATTR _uart_isr(void *arg)
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{
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uint8_t c;
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BaseType_t xHigherPriorityTaskWoken;
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uart_t* uart = (uart_t*)arg;
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uart->dev->int_clr.val = UART_RXFIFO_FULL_INT_ENA | UART_FRM_ERR_INT_ENA | UART_RXFIFO_TOUT_INT_ENA; //Acknowledge the interrupt
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while(uart->dev->status.rxfifo_cnt) {
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c = uart->dev->fifo.rw_byte;
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if(!xQueueIsQueueFullFromISR(uart->queue)) {
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xQueueSendFromISR(uart->queue, &c, &xHigherPriorityTaskWoken);
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}
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}
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if (xHigherPriorityTaskWoken) {
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portYIELD_FROM_ISR();
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}
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}
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uart_t* uartBegin(uint8_t uart_nr, uint32_t baudrate, uint32_t config, int8_t rxPin, int8_t txPin, uint16_t queueLen, bool inverted)
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{
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uint32_t conf1 = 0;
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if(uart_nr > 2) {
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return NULL;
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}
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if(rxPin == -1 && txPin == -1) {
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return NULL;
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}
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uart_t* uart = (uart_t*) malloc(sizeof(uart_t));
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if(uart == 0) {
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return NULL;
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}
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uart->dev = (uart_dev_t *)UART_REG_BASE(uart_nr);
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uart->num = uart_nr;
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uart->inverted = inverted;
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uart->rxPin = rxPin;
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uart->txPin = txPin;
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uart->rxEnabled = (uart->rxPin != -1);
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uart->txEnabled = (uart->txPin != -1);
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uartFlush(uart);
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if(uart->rxEnabled) {
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uart->queue = xQueueCreate(queueLen, sizeof(uint8_t)); //initialize the queue
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if(uart->queue == NULL) {
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free(uart);
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return NULL;
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}
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pinMode(uart->rxPin, INPUT);
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pinMatrixInAttach(uart->rxPin, UART_RXD_IDX(uart->num), uart->inverted);
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intr_matrix_set(xPortGetCoreID(), UART_INTR_SOURCE(uart->num), UART_INUM(uart->num));
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xt_set_interrupt_handler(UART_INUM(uart->num), _uart_isr, uart);
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ESP_INTR_ENABLE(UART_INUM(uart->num));
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conf1 = (112 << UART_RXFIFO_FULL_THRHD_S) | (0x02 << UART_RX_TOUT_THRHD_S) | UART_RX_TOUT_EN;
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uart->dev->int_ena.val = UART_RXFIFO_FULL_INT_ENA | UART_FRM_ERR_INT_ENA | UART_RXFIFO_TOUT_INT_ENA;
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uart->dev->int_clr.val = 0xffff;
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}
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if(uart->txEnabled) {
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pinMode(uart->txPin, OUTPUT);
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pinMatrixOutAttach(uart->txPin, UART_TXD_IDX(uart->num), uart->inverted, false);
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}
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uartSetBaudRate(uart, baudrate);
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uart->dev->conf0.val = config;
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uart->dev->conf1.val = conf1;
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return uart;
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}
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void uartEnd(uart_t* uart)
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{
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if(uart == 0) {
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return;
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}
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if(uart->rxEnabled) {
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pinMode(uart->rxPin, INPUT);
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if(uart->num || uart->rxPin != 3) {
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pinMatrixInDetach(UART_RXD_IDX(uart->num), uart->inverted, false);
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}
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ESP_INTR_DISABLE(UART_INUM(uart->num));
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xt_set_interrupt_handler(UART_INUM(uart->num), NULL, NULL);
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vQueueDelete(uart->queue);
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}
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if(uart->txEnabled) {
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pinMode(uart->txPin, INPUT);
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if(uart->num || uart->txPin != 1) {
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pinMatrixInDetach(UART_TXD_IDX(uart->num), !uart->inverted, uart->inverted);
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}
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}
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uart->dev->conf0.val = 0;
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uart->dev->conf1.val = 0;
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uart->dev->int_ena.val = 0;
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uart->dev->int_clr.val = 0xffff;
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free(uart);
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}
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uint32_t uartAvailable(uart_t* uart)
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{
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return uxQueueMessagesWaiting(uart->queue);
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}
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uint8_t uartRead(uart_t* uart)
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{
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uint8_t c;
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if(xQueueReceive(uart->queue, &c, 0)) {
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return c;
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}
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return 0;
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}
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uint8_t uartPeek(uart_t* uart)
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{
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uint8_t c;
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if(xQueuePeek(uart->queue, &c, 0)) {
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return c;
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}
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return 0;
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}
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void uartWrite(uart_t* uart, uint8_t c)
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{
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while(uart->dev->status.rxfifo_cnt == 0x7F);
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uart->dev->fifo.rw_byte = c;
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}
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void uartWriteBuf(uart_t* uart, const uint8_t * data, size_t len)
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{
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while(len) {
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while(len && uart->dev->status.txfifo_cnt < 0x7F) {
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uart->dev->fifo.rw_byte = *data++;
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len--;
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}
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}
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}
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void uartFlush(uart_t* uart)
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{
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uint32_t tmp = 0x00000000;
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if(uart == 0) {
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return;
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}
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if(uart->rxEnabled) {
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tmp |= UART_RXFIFO_RST;
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}
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if(uart->txEnabled) {
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while(uart->dev->status.txfifo_cnt);
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tmp |= UART_TXFIFO_RST;
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}
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uart->dev->conf0.val |= (tmp);
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uart->dev->conf0.val &= ~(tmp);
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}
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void uartSetBaudRate(uart_t* uart, uint32_t baud_rate)
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{
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if(uart == 0) {
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return;
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}
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uart->baud_rate = baud_rate;
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uint32_t clk_div = ((UART_CLK_FREQ<<4)/baud_rate);
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uart->dev->clk_div.div_int = clk_div>>4 ;
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uart->dev->clk_div.div_frag = clk_div & 0xf;
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}
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uint32_t uartGetBaudRate(uart_t* uart)
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{
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if(uart == 0) {
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return 0;
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}
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return uart->baud_rate;
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}
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static void IRAM_ATTR uart0_write_char(char c)
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{
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while(((ESP_REG(0x01C+DR_REG_UART_BASE) >> UART_TXFIFO_CNT_S) & 0x7F) == 0x7F);
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ESP_REG(DR_REG_UART_BASE) = c;
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}
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static void IRAM_ATTR uart1_write_char(char c)
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{
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while(((ESP_REG(0x01C+DR_REG_UART1_BASE) >> UART_TXFIFO_CNT_S) & 0x7F) == 0x7F);
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ESP_REG(DR_REG_UART1_BASE) = c;
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}
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static void IRAM_ATTR uart2_write_char(char c)
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{
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while(((ESP_REG(0x01C+DR_REG_UART2_BASE) >> UART_TXFIFO_CNT_S) & 0x7F) == 0x7F);
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ESP_REG(DR_REG_UART2_BASE) = c;
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}
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void uartSetDebug(uart_t* uart)
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{
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if(uart == NULL || uart->num > 2) {
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s_uart_debug_nr = -1;
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ets_install_putc1(NULL);
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return;
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}
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if(s_uart_debug_nr == uart->num) {
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return;
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}
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s_uart_debug_nr = uart->num;
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switch(s_uart_debug_nr) {
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case 0:
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ets_install_putc1((void (*)(char)) &uart0_write_char);
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break;
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case 1:
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ets_install_putc1((void (*)(char)) &uart1_write_char);
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break;
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case 2:
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ets_install_putc1((void (*)(char)) &uart2_write_char);
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break;
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default:
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ets_install_putc1(NULL);
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break;
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}
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}
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int uartGetDebug()
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{
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return s_uart_debug_nr;
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}
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