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Added JLCPCB order text

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Jacob Eva 2023-08-04 12:19:35 +01:00
parent f1a4a3f87a
commit 159c4a5428
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1 changed files with 3 additions and 0 deletions
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Electrical/opencom-lte.kicad_pcb
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@ -246867,6 +246867,9 @@
(gr_text "BOARD V1.0" (at 148.27 145.66) (layer "B.SilkS") (tstamp 0048fa71-ca4e-4d57-b020-fe7c447ce454) (gr_text "BOARD V1.0" (at 148.27 145.66) (layer "B.SilkS") (tstamp 0048fa71-ca4e-4d57-b020-fe7c447ce454)
(effects (font (size 1 1) (thickness 0.153)) (justify left bottom mirror)) (effects (font (size 1 1) (thickness 0.153)) (justify left bottom mirror))
) )
(gr_text "JLCJLCJLCJLC" (at 132.93 101.2 90) (layer "B.SilkS") (tstamp 2312c54a-bd3c-4a81-bd01-c2332babd050)
(effects (font (size 1 1) (thickness 0.153)) (justify left bottom mirror))
)
(gr_text "SIM SLOT" (at 142.45 129.175) (layer "B.SilkS") (tstamp 9837d7a6-4073-465e-ab40-3b2c97d9c369) (gr_text "SIM SLOT" (at 142.45 129.175) (layer "B.SilkS") (tstamp 9837d7a6-4073-465e-ab40-3b2c97d9c369)
(effects (font (size 1 1) (thickness 0.25) bold) (justify left bottom mirror)) (effects (font (size 1 1) (thickness 0.25) bold) (justify left bottom mirror))
) )