Commit Graph

54 Commits

Author SHA1 Message Date
70f102b2d0
Replaced sim holder 2023-08-04 10:10:24 +01:00
549a108ab1
Replaced LED and SIM holder models 2023-08-04 10:10:04 +01:00
9e8cda3414
Adjusted via location to be off silkscreen 2023-08-03 15:49:07 +01:00
6fbfaf6d6c Moved D4 silkscreen for DRC 2023-08-02 20:42:57 +01:00
dba561662a Created copper keep out area below U.FL connector 2023-08-02 20:11:35 +01:00
2e7cbce038 Moved polarised capacitor silkscreen 2023-08-02 19:58:56 +01:00
1645bbb780 Corrected TVS footprints 2023-08-02 19:57:02 +01:00
289033576f
Corrected D4 quantity and footprint 2023-08-02 18:41:16 +01:00
31dbf1d95c
Added skew matching on USB differential pair 2023-07-27 17:42:47 +01:00
4454cc6743
Add footprint links 2023-07-27 17:23:49 +01:00
388ac5fb78
Added BOM section and moved BOM directories 2023-07-27 16:38:55 +01:00
a606b6cfa5
Deleted old sim directories 2023-07-27 16:34:56 +01:00
aefee9e3f1 Removed JLCPCB order number 2023-07-27 15:36:17 +01:00
52af9a0f66 Corrected USB data traces for 90ohm impedance 2023-07-27 15:33:15 +01:00
5ea5e4a009 Remove old expansion card stl 2023-07-26 19:38:19 +01:00
27a7c728f7 Rename project to openCom LTE 2023-07-26 19:37:58 +01:00
4ab9f35913
Refill zones 2023-07-26 18:24:53 +01:00
1998dbf42e Moved trace to comply with DRC 2023-07-19 21:45:15 +01:00
f734cd84cd
Rearranged positioning of TVS diode by H2 2023-07-19 17:57:36 +01:00
ac95ee3748
Moved SMA connectors closer to board edge 2023-07-17 15:52:59 +01:00
bc9c421450
Moved wider PCB section up 0.5mm 2023-07-11 18:41:05 +01:00
e6a2505b57 Adjust component positioning on wider board section 2023-07-11 19:26:32 +01:00
2874232a3f
Resized edge cuts 2023-07-11 18:09:50 +01:00
c06af93822
Changed molex model path 2023-07-11 17:53:46 +01:00
01828790ec Moved J1, J2, deleted UART test points 2023-07-11 18:38:50 +01:00
032c79df9a
Changed J3 to u.FL, removed UART pins, adjusted edge cuts 2023-07-11 17:21:17 +01:00
125f9ff8c5 Replaced polarised capacitor 2023-07-09 16:16:06 +01:00
c575aac69a Corrected typo on pin 22 2023-07-08 12:57:43 +01:00
64914e2aaa Added JLCPCB order silkscreen 2023-07-08 12:47:33 +01:00
a4681854a6 Finishing touches 2023-06-27 15:21:49 +01:00
c00a545349 Added OSHW logo and SIM card holder label 2023-06-26 23:41:11 +01:00
dc52639504 Replaced common mode choke to murata component 2023-06-26 23:10:49 +01:00
167737a61d Completed the whole crapping thing 2023-06-10 11:27:50 +01:00
d20e97775d Updated crapping everything 2023-06-05 23:18:52 +01:00
7c3f04e593
Updated schematic 2023-05-28 10:28:52 +01:00
d66148192b Updated schematic to EG95 chip 2023-05-02 22:15:31 +01:00
9c88c37a86 Corrected spelling error 2023-04-24 15:03:58 +01:00
ce1d215d2a
Reverted trace width and moved H5 silkscreen 2023-04-22 18:49:36 +01:00
23da2edd95
Adjusted trace spacing 2023-04-22 18:34:26 +01:00
42ba2a3662 Updated PCB to reflect schematic 2023-04-20 13:24:24 +01:00
jacob.eva
4454626399
Updated TPS62 resistors 2023-04-20 12:01:46 +01:00
4f7d1fc43f Adjusted trace constraints and corrected to comply 2023-04-18 17:28:20 +01:00
1e70068cf4 Fixed unconnected GND 2023-04-18 15:49:21 +01:00
720b6a9aea Changed hole dimensions 2023-04-18 15:45:54 +01:00
jacob.eva
e281d636b0
Added mount holes to PCB 2023-04-18 13:47:49 +01:00
2f13a5a4e0 Added PWR and WWAN labels to diodes 2023-04-13 16:59:58 +01:00
1b475ef967 Added company logo, name and license 2023-04-13 16:52:16 +01:00
c40cb92a58 Added resistance note to DC to DC IC 2023-04-13 15:58:31 +01:00
43cb03715e Corrected card area length 2023-04-13 15:56:10 +01:00
cc3dac4df9 Finished main design (one commit fight me) 2023-04-13 15:49:30 +01:00