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a606b6cfa5
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Deleted old sim directories
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2023-07-27 16:34:56 +01:00 |
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aefee9e3f1
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Removed JLCPCB order number
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2023-07-27 15:36:17 +01:00 |
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52af9a0f66
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Corrected USB data traces for 90ohm impedance
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2023-07-27 15:33:15 +01:00 |
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5ea5e4a009
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Remove old expansion card stl
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2023-07-26 19:38:19 +01:00 |
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27a7c728f7
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Rename project to openCom LTE
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2023-07-26 19:37:58 +01:00 |
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4ab9f35913
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Refill zones
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2023-07-26 18:24:53 +01:00 |
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1998dbf42e
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Moved trace to comply with DRC
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2023-07-19 21:45:15 +01:00 |
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f734cd84cd
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Rearranged positioning of TVS diode by H2
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2023-07-19 17:57:36 +01:00 |
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ac95ee3748
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Moved SMA connectors closer to board edge
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2023-07-17 15:52:59 +01:00 |
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bc9c421450
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Moved wider PCB section up 0.5mm
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2023-07-11 18:41:05 +01:00 |
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e6a2505b57
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Adjust component positioning on wider board section
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2023-07-11 19:26:32 +01:00 |
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2874232a3f
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Resized edge cuts
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2023-07-11 18:09:50 +01:00 |
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c06af93822
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Changed molex model path
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2023-07-11 17:53:46 +01:00 |
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01828790ec
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Moved J1, J2, deleted UART test points
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2023-07-11 18:38:50 +01:00 |
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032c79df9a
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Changed J3 to u.FL, removed UART pins, adjusted edge cuts
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2023-07-11 17:21:17 +01:00 |
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125f9ff8c5
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Replaced polarised capacitor
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2023-07-09 16:16:06 +01:00 |
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c575aac69a
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Corrected typo on pin 22
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2023-07-08 12:57:43 +01:00 |
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64914e2aaa
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Added JLCPCB order silkscreen
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2023-07-08 12:47:33 +01:00 |
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a4681854a6
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Finishing touches
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2023-06-27 15:21:49 +01:00 |
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c00a545349
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Added OSHW logo and SIM card holder label
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2023-06-26 23:41:11 +01:00 |
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dc52639504
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Replaced common mode choke to murata component
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2023-06-26 23:10:49 +01:00 |
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167737a61d
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Completed the whole crapping thing
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2023-06-10 11:27:50 +01:00 |
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d20e97775d
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Updated crapping everything
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2023-06-05 23:18:52 +01:00 |
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7c3f04e593
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Updated schematic
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2023-05-28 10:28:52 +01:00 |
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d66148192b
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Updated schematic to EG95 chip
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2023-05-02 22:15:31 +01:00 |
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9c88c37a86
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Corrected spelling error
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2023-04-24 15:03:58 +01:00 |
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ce1d215d2a
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Reverted trace width and moved H5 silkscreen
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2023-04-22 18:49:36 +01:00 |
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23da2edd95
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Adjusted trace spacing
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2023-04-22 18:34:26 +01:00 |
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42ba2a3662
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Updated PCB to reflect schematic
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2023-04-20 13:24:24 +01:00 |
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jacob.eva
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4454626399
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Updated TPS62 resistors
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2023-04-20 12:01:46 +01:00 |
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4f7d1fc43f
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Adjusted trace constraints and corrected to comply
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2023-04-18 17:28:20 +01:00 |
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1e70068cf4
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Fixed unconnected GND
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2023-04-18 15:49:21 +01:00 |
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720b6a9aea
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Changed hole dimensions
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2023-04-18 15:45:54 +01:00 |
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jacob.eva
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e281d636b0
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Added mount holes to PCB
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2023-04-18 13:47:49 +01:00 |
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2f13a5a4e0
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Added PWR and WWAN labels to diodes
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2023-04-13 16:59:58 +01:00 |
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1b475ef967
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Added company logo, name and license
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2023-04-13 16:52:16 +01:00 |
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c40cb92a58
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Added resistance note to DC to DC IC
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2023-04-13 15:58:31 +01:00 |
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43cb03715e
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Corrected card area length
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2023-04-13 15:56:10 +01:00 |
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cc3dac4df9
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Finished main design (one commit fight me)
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2023-04-13 15:49:30 +01:00 |
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jacob.eva
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dab6156b19
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Updated PCB to Framework's specs
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2023-04-11 18:33:14 +01:00 |
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jacob.eva
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9664257e68
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Reformatted schematic
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2023-04-11 18:32:35 +01:00 |
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jacob.eva
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d1c4e4406d
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Added SIM slot footprint
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2023-04-06 17:02:56 +01:00 |
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jacob.eva
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8893f9c87e
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Added to git
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2023-04-05 19:24:53 +01:00 |
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