2018-06-20 08:45:49 +02:00
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#ifndef ROM_H
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#define ROM_H
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#define CHECKSUMMED_SIZE 0x0B
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2022-01-22 21:43:52 +01:00
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#define PRODUCT_RNODE 0x03
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#define PRODUCT_HMBRW 0xF0
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#define PRODUCT_TBEAM 0xE0
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#define PRODUCT_T32_20 0xB0
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#define PRODUCT_T32_21 0xB1
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2022-06-16 19:12:28 +02:00
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#define PRODUCT_H32_V2 0xC0
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2018-06-20 08:45:49 +02:00
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#define MODEL_A4 0xA4
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#define MODEL_A9 0xA9
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2022-06-16 19:12:28 +02:00
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#define MODEL_A3 0xA3
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#define MODEL_A8 0xA8
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#define MODEL_A2 0xA2
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#define MODEL_A7 0xA7
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2022-01-22 21:43:52 +01:00
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#define MODEL_B3 0xB3
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#define MODEL_B8 0xB8
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#define MODEL_B4 0xB4
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#define MODEL_B9 0xB9
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2022-06-16 19:12:28 +02:00
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#define MODEL_C4 0xC4
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#define MODEL_C9 0xC9
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2022-01-09 23:40:30 +01:00
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#define MODEL_E4 0xE4
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#define MODEL_E9 0xE9
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#define MODEL_FF 0xFF
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2018-06-20 08:45:49 +02:00
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#define ADDR_PRODUCT 0x00
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#define ADDR_MODEL 0x01
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#define ADDR_HW_REV 0x02
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#define ADDR_SERIAL 0x03
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#define ADDR_MADE 0x07
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#define ADDR_CHKSUM 0x0B
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#define ADDR_SIGNATURE 0x1B
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#define ADDR_INFO_LOCK 0x9B
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#define ADDR_CONF_SF 0x9C
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#define ADDR_CONF_CR 0x9D
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#define ADDR_CONF_TXP 0x9E
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#define ADDR_CONF_BW 0x9F
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#define ADDR_CONF_FREQ 0xA3
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#define ADDR_CONF_OK 0xA7
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#define INFO_LOCK_BYTE 0x73
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#define CONF_OK_BYTE 0x73
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#define EEPROM_RESERVED 200
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#endif
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