IDF master c69f0ec32 (#5449)
esp-dsp: master f4d7d6e esp-face: master 420fc7e esp-rainmaker: f1b82c7 esp32-camera: master 6a9497b esp_littlefs: master b58f00c
This commit is contained in:
Me No Dev
GitHub
parent
e0e5c88658
commit
6972695d95
18
platform.txt
18
platform.txt
File diff suppressed because one or more lines are too long
222
tools/esptool.py
222
tools/esptool.py
@ -317,7 +317,7 @@ class ESPLoader(object):
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"""
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self.secure_download_mode = False # flag is set to True if esptool detects the ROM is in Secure Download Mode
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self.stub_is_disabled = False # flag is set to True if esptool detects conditions which requires the stub to be disabled
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self.stub_is_disabled = False # flag is set to True if esptool detects conditions which require the stub to be disabled
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if isinstance(port, basestring):
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self._port = serial.serial_for_url(port)
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@ -531,9 +531,12 @@ class ESPLoader(object):
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if active_port.startswith("/dev/") and os.path.islink(active_port):
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active_port = os.path.realpath(active_port)
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# The "cu" (call-up) device has to be used for outgoing communication on MacOS
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if sys.platform == "darwin" and "tty" in active_port:
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active_port = [active_port, active_port.replace("tty", "cu")]
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ports = list_ports.comports()
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for p in ports:
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if p.device == active_port:
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if p.device in active_port:
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return p.pid
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print("\nFailed to get PID of a device on {}, using standard reset sequence.".format(active_port))
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@ -1739,18 +1742,41 @@ class ESP32S2ROM(ESP32ROM):
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[0x50000000, 0x50002000, "RTC_DATA"]]
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def get_pkg_version(self):
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num_word = 4
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block1_addr = self.EFUSE_BASE + 0x044
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word3 = self.read_reg(block1_addr + (4 * num_word))
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pkg_version = (word3 >> 0) & 0x0F
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return pkg_version
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def get_flash_version(self):
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num_word = 3
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block1_addr = self.EFUSE_BASE + 0x044
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word3 = self.read_reg(block1_addr + (4 * num_word))
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pkg_version = (word3 >> 21) & 0x0F
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return pkg_version
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def get_psram_version(self):
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num_word = 3
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block1_addr = self.EFUSE_BASE + 0x044
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word3 = self.read_reg(block1_addr + (4 * num_word))
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pkg_version = (word3 >> 28) & 0x0F
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return pkg_version
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def get_block2_version(self):
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num_word = 4
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block2_addr = self.EFUSE_BASE + 0x05C
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word4 = self.read_reg(block2_addr + (4 * num_word))
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block2_version = (word4 >> 4) & 0x07
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return block2_version
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def get_chip_description(self):
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chip_name = {
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0: "ESP32-S2",
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1: "ESP32-S2FH16",
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2: "ESP32-S2FH32",
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}.get(self.get_pkg_version(), "unknown ESP32-S2")
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1: "ESP32-S2FH2",
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2: "ESP32-S2FH4",
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102: "ESP32-S2FNR2",
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100: "ESP32-S2R2",
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}.get(self.get_flash_version() + self.get_psram_version() * 100, "unknown ESP32-S2")
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return "%s" % (chip_name)
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@ -1760,22 +1786,27 @@ class ESP32S2ROM(ESP32ROM):
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if self.secure_download_mode:
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features += ["Secure Download Mode Enabled"]
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pkg_version = self.get_pkg_version()
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flash_version = {
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0: "No Embedded Flash",
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1: "Embedded Flash 2MB",
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2: "Embedded Flash 4MB",
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}.get(self.get_flash_version(), "Unknown Embedded Flash")
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features += [flash_version]
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if pkg_version in [1, 2]:
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if pkg_version == 1:
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features += ["Embedded 2MB Flash"]
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elif pkg_version == 2:
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features += ["Embedded 4MB Flash"]
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features += ["105C temp rating"]
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psram_version = {
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0: "No Embedded PSRAM",
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1: "Embedded PSRAM 2MB",
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2: "Embedded PSRAM 4MB",
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}.get(self.get_psram_version(), "Unknown Embedded PSRAM")
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features += [psram_version]
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num_word = 4
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block2_addr = self.EFUSE_BASE + 0x05C
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word4 = self.read_reg(block2_addr + (4 * num_word))
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block2_version = (word4 >> 4) & 0x07
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block2_version = {
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0: "No calibration in BLK2 of efuse",
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1: "ADC and temperature sensor calibration in BLK2 of efuse V1",
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2: "ADC and temperature sensor calibration in BLK2 of efuse V2",
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}.get(self.get_block2_version(), "Unknown Calibration in BLK2")
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features += [block2_version]
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if block2_version == 1:
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features += ["ADC and temperature sensor calibration in BLK2 of efuse"]
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return features
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def get_crystal_freq(self):
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@ -1842,10 +1873,10 @@ class ESP32S2ROM(ESP32ROM):
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strap_reg = self.read_reg(self.GPIO_STRAP_REG)
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force_dl_reg = self.read_reg(self.RTC_CNTL_OPTION1_REG)
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if strap_reg & self.GPIO_STRAP_SPI_BOOT_MASK == 0 and force_dl_reg & self.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK == 0:
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print("ERROR: {} chip was placed into download mode using GPIO0.\n"
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print("WARNING: {} chip was placed into download mode using GPIO0.\n"
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"esptool.py can not exit the download mode over USB. "
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"To run the app, reset the chip manually.\n"
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"To suppress this error, set --after option to 'no_reset'.".format(self.get_chip_description()))
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"To suppress this note, set --after option to 'no_reset'.".format(self.get_chip_description()))
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raise SystemExit(1)
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def hard_reset(self):
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@ -2056,7 +2087,7 @@ class ESP32C3ROM(ESP32ROM):
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num_word = 3
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block1_addr = self.EFUSE_BASE + 0x044
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word3 = self.read_reg(block1_addr + (4 * num_word))
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pkg_version = (word3 >> 21) & 0x0F
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pkg_version = (word3 >> 21) & 0x07
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return pkg_version
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def get_chip_revision(self):
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@ -4266,7 +4297,7 @@ def main(argv=None, esp=None):
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if esp.secure_download_mode:
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print("WARNING: Stub loader is not supported in Secure Download Mode, setting --no-stub")
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args.no_stub = True
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elif esp.stub_is_disabled:
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elif not esp.IS_STUB and esp.stub_is_disabled:
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print("WARNING: Stub loader has been disabled for compatibility, setting --no-stub")
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args.no_stub = True
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else:
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@ -4604,80 +4635,83 @@ CVCBENeCsBTAdT6NcSsOl8ZiG2cFj9BsTQ8YsWfrs3haiLGiVsfW9Wq9s81W2032YujjtxJFWNpYVaPr
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""")))
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ESP32S3BETA2ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
5ukiwU73BV+vBHssT0nPuNcqOuwKt75CD9pcLH4U6zzhm13hq/H9P06xyUPPOQGaybeSgzI8vG7Ya6wJs7G8Hm2Nb/q45/uv2BsjELR/S1KeAUT5UKjpj4DPhQT1Xw07vun6oWkifyeywal+uv1NzMG5PF6jwSRz\
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||||
FTlZhqemxSdm0OFmxjZXn29P+Vwrich79zEzuIdG48Hgbioddux5abip3O9kfheu9mD1e8ltrNkNlz8b+RcHka3sdTGNc+ora2dvgv8+9M93S3sN/0SksqoqKpNVuf/Svllef5BCv71V6Qsbu7T830bJYd0Of0k7\
|
||||
8rTPzE3+5/8AACNy+Q==\
|
||||
""")))
|
||||
ESP32S3ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
0zdoVectVeK6bskdrWbxp0H4AIc1Xz6TqG+sFqCeAWIv/jwMPLYZyAUOGcPI9Z6d75gS6/qT2LeqZ0uuyrdb0NpG0m7ISl1y/uR+9uDBiZ/njl4yrFAScrFWFt6lNdaS8ZzhFCTdKa4sarWQR/DujyPRYBHjaIzT\
|
||||
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|
||||
KW9w+PCSe4PBDEVr2XGYJjFkPDBe09Ss42hBsF7hmF46m47L3DWa4A6RXtFVxr6Nus5PaUtsaM05aZ8l9tfyLoILJosRmEJHaB4P4SQrI26b4j9cxjUvMZTeIW9qTXT3oGkVC8Ib880IDBjkaN88Jo1VSP/ovlZo\
|
||||
/UWaImVvc4uQkVE9t9Vb5G8poG7oUw5weq3ec2icD15tcg03S0RlOGkNwSiw04gbyqI6BOKwAfKEO9TmDHfZyahq38kXFC4BfseBC2atuTTqpLgJ1RMzqGdgM7LEg76gJj1gJrh+qkGrco+q1FailrlccNOeuhJ4\
|
||||
MZFHhSigxFiImHl4XnL4hT7Jh1+BFeFDMx858WGK55INqERoqFj5mNCOOatF4csTs8R2AEKdyR5Jl/0ZEPxDGmLCi4kJga6lvs4VT+TdnyEb+ARn+RLWhroWti5RbYzUedqR9l77NxB4VGFY9usRLW63H8muD8N3\
|
||||
Szux3RI0abhJwS5McQnfqNmaD19ytNaq50cEEbb8Cta4JdRPa09JDQz7gpaOCYKxhoEd3dKADvw0Q5PgcZ7Zo/QYPEgTuh04AvDk37tK+h4t3mJAjoF32lyB16q0SVJZmKwBe0BdHQZVL3PaXIVeYfco4iVhyppg\
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||||
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||||
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|
||||
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|
||||
/Czaecx3vcJX4+d/kmKTh54zAjSTbyRHZniM3bDXWJFmY3s9Mo3v+rjn56/YGyMQtH9JSp4BRPl4qOmvgM+FJPXfDCe+7T6iaWL8TsEGl/rpVjhFDs7l8WINFpmrGJNleH5afOYIOlzW2OTu880pn3AlGXnvgmYG\
|
||||
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|
||||
""")))
|
||||
ESP32C3ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
|
||||
eNqVWn1/E8cR/iqObezAL7S70r2tSYxEJGQZTGkKIVDRcLd750ISNRgRTFt99+4zM3t7ki2Z/mFLutvbnZ155pmXvf8cLurLxeHRTnU4nF1qvTu7tMmB/9ebXarMf/q/Ks/9j+QN7k9ml67wl6s8kWtVPvK/i/uz\
|
||||
|
||||
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
Binary file not shown.
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Binary file not shown.
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Binary file not shown.
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Binary file not shown.
@ -14,6 +14,7 @@
|
||||
#include "esp_partition.h"
|
||||
#include "esp_image_format.h"
|
||||
#include "esp_flash_partitions.h"
|
||||
#include "soc/soc_caps.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
|
||||
@ -8,7 +8,8 @@
|
||||
#include "esp_flash_partitions.h"
|
||||
#include "esp_image_format.h"
|
||||
#include "esp_app_format.h"
|
||||
// RESET_REASON is declared in rom/rtc.h
|
||||
// [refactor-todo]: we shouldn't expose ROM header files in a public API header, remove them in v5.0
|
||||
// Tracked in IDF-1968
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
#include "esp32/rom/rtc.h"
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2
|
||||
@ -62,18 +63,37 @@ bool bootloader_common_ota_select_valid(const esp_ota_select_entry_t *s);
|
||||
bool bootloader_common_ota_select_invalid(const esp_ota_select_entry_t *s);
|
||||
|
||||
/**
|
||||
* @brief Check if the GPIO input is a long hold or a short hold.
|
||||
* @brief Check if a GPIO input is held low for a long period, short period, or not
|
||||
* at all.
|
||||
*
|
||||
* This function will configure the specified GPIO as an input with internal pull-up enabled.
|
||||
*
|
||||
* Number of the GPIO input will be configured as an input with internal pull-up enabled.
|
||||
* If the GPIO input is held low continuously for delay_sec period then it is a long hold.
|
||||
* If the GPIO input is held low for less period then it is a short hold.
|
||||
*
|
||||
* @param[in] num_pin Number of the GPIO input.
|
||||
* @param[in] delay_sec Input must be driven low for at least this long, continuously.
|
||||
* @return esp_comm_gpio_hold_t Defines type of hold a GPIO in low state.
|
||||
* @return esp_comm_gpio_hold_t Type of low level hold detected, if any.
|
||||
*/
|
||||
esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio(uint32_t num_pin, uint32_t delay_sec);
|
||||
|
||||
/**
|
||||
* @brief Check if a GPIO input is held low or high for a long period, short period, or not
|
||||
* at all.
|
||||
*
|
||||
* This function will configure the specified GPIO as an input with internal pull-up enabled.
|
||||
*
|
||||
* If the GPIO input is held at 'level' continuously for delay_sec period then it is a long hold.
|
||||
* If the GPIO input is held at 'level' for less period then it is a short hold.
|
||||
*
|
||||
* @param[in] num_pin Number of the GPIO input.
|
||||
* @param[in] delay_sec Input must be driven to 'level' for at least this long, continuously.
|
||||
* @param[in] level Input pin level to trigger on hold
|
||||
* @return esp_comm_gpio_hold_t Type of hold detected, if any.
|
||||
*/
|
||||
esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio_level(uint32_t num_pin, uint32_t delay_sec, bool level);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Erase the partition data that is specified in the transferred list.
|
||||
*
|
||||
|
||||
@ -25,6 +25,38 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BT_ENABLED
|
||||
|
||||
#define SOC_MEM_BT_DATA_START 0x3ffae6e0
|
||||
#define SOC_MEM_BT_DATA_END 0x3ffaff10
|
||||
#define SOC_MEM_BT_EM_START 0x3ffb0000
|
||||
#define SOC_MEM_BT_EM_END 0x3ffb7cd8
|
||||
#define SOC_MEM_BT_EM_BTDM0_START 0x3ffb0000
|
||||
#define SOC_MEM_BT_EM_BTDM0_END 0x3ffb09a8
|
||||
#define SOC_MEM_BT_EM_BLE_START 0x3ffb09a8
|
||||
#define SOC_MEM_BT_EM_BLE_END 0x3ffb1ddc
|
||||
#define SOC_MEM_BT_EM_BTDM1_START 0x3ffb1ddc
|
||||
#define SOC_MEM_BT_EM_BTDM1_END 0x3ffb2730
|
||||
#define SOC_MEM_BT_EM_BREDR_START 0x3ffb2730
|
||||
#define SOC_MEM_BT_EM_BREDR_NO_SYNC_END 0x3ffb6388 //Not calculate with synchronize connection support
|
||||
#define SOC_MEM_BT_EM_BREDR_END 0x3ffb7cd8 //Calculate with synchronize connection support
|
||||
#define SOC_MEM_BT_EM_SYNC0_START 0x3ffb6388
|
||||
#define SOC_MEM_BT_EM_SYNC0_END 0x3ffb6bf8
|
||||
#define SOC_MEM_BT_EM_SYNC1_START 0x3ffb6bf8
|
||||
#define SOC_MEM_BT_EM_SYNC1_END 0x3ffb7468
|
||||
#define SOC_MEM_BT_EM_SYNC2_START 0x3ffb7468
|
||||
#define SOC_MEM_BT_EM_SYNC2_END 0x3ffb7cd8
|
||||
#define SOC_MEM_BT_BSS_START 0x3ffb8000
|
||||
#define SOC_MEM_BT_BSS_END 0x3ffb9a20
|
||||
#define SOC_MEM_BT_MISC_START 0x3ffbdb28
|
||||
#define SOC_MEM_BT_MISC_END 0x3ffbdb5c
|
||||
|
||||
#define SOC_MEM_BT_EM_PER_SYNC_SIZE 0x870
|
||||
|
||||
#define SOC_MEM_BT_EM_BREDR_REAL_END (SOC_MEM_BT_EM_BREDR_NO_SYNC_END + CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF * SOC_MEM_BT_EM_PER_SYNC_SIZE)
|
||||
|
||||
#endif //CONFIG_BT_ENABLED
|
||||
|
||||
#define ESP_BT_CONTROLLER_CONFIG_MAGIC_VAL 0x20200622
|
||||
|
||||
/**
|
||||
|
||||
@ -327,6 +327,8 @@
|
||||
#define CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB 8
|
||||
#define CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS 1000
|
||||
#define CONFIG_FMB_PORT_TASK_PRIO 10
|
||||
#define CONFIG_FMB_PORT_TASK_AFFINITY_CPU0 1
|
||||
#define CONFIG_FMB_PORT_TASK_AFFINITY 0x0
|
||||
#define CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT 20
|
||||
#define CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE 20
|
||||
#define CONFIG_FMB_CONTROLLER_STACK_SIZE 4096
|
||||
@ -454,6 +456,8 @@
|
||||
#define CONFIG_MBEDTLS_SSL_PROTO_DTLS 1
|
||||
#define CONFIG_MBEDTLS_SSL_ALPN 1
|
||||
#define CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS 1
|
||||
#define CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE 1
|
||||
#define CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE 1
|
||||
#define CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS 1
|
||||
#define CONFIG_MBEDTLS_AES_C 1
|
||||
#define CONFIG_MBEDTLS_RC4_DISABLED 1
|
||||
@ -686,5 +690,5 @@
|
||||
#define CONFIG_ULP_COPROC_ENABLED CONFIG_ESP32_ULP_COPROC_ENABLED
|
||||
#define CONFIG_ULP_COPROC_RESERVE_MEM CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
|
||||
#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
|
||||
#define CONFIG_ARDUINO_IDF_COMMIT "d93887f9f"
|
||||
#define CONFIG_ARDUINO_IDF_COMMIT "c69f0ec32"
|
||||
#define CONFIG_ARDUINO_IDF_BRANCH "master"
|
||||
|
||||
@ -48,6 +48,7 @@ typedef struct {
|
||||
uint32_t task_stack_size; //!< repl task stack size
|
||||
uint32_t task_priority; //!< repl task priority
|
||||
const char *prompt; //!< prompt (NULL represents default: "esp> ")
|
||||
size_t max_cmdline_length; //!< maximum length of a command line. If 0, default value will be used
|
||||
} esp_console_repl_config_t;
|
||||
|
||||
/**
|
||||
@ -61,6 +62,7 @@ typedef struct {
|
||||
.task_stack_size = 4096, \
|
||||
.task_priority = 2, \
|
||||
.prompt = NULL, \
|
||||
.max_cmdline_length = 0, \
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@ -72,6 +72,7 @@ void linenoiseSetDumbMode(int set);
|
||||
bool linenoiseIsDumbMode(void);
|
||||
void linenoisePrintKeyCodes(void);
|
||||
void linenoiseAllowEmpty(bool);
|
||||
int linenoiseSetMaxLineLen(size_t len);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@ -74,14 +74,15 @@ typedef struct{
|
||||
|
||||
union {
|
||||
struct {
|
||||
uint32_t clk_speed; /*!< I2C clock frequency for master mode, (no higher than 1MHz for now) */
|
||||
} master; /*!< I2C master config */
|
||||
uint32_t clk_speed; /*!< I2C clock frequency for master mode, (no higher than 1MHz for now) */
|
||||
} master; /*!< I2C master config */
|
||||
struct {
|
||||
uint8_t addr_10bit_en; /*!< I2C 10bit address mode enable for slave mode */
|
||||
uint16_t slave_addr; /*!< I2C address for slave mode */
|
||||
} slave; /*!< I2C slave config */
|
||||
uint8_t addr_10bit_en; /*!< I2C 10bit address mode enable for slave mode */
|
||||
uint16_t slave_addr; /*!< I2C address for slave mode */
|
||||
uint32_t maximum_speed; /*!< I2C expected clock speed from SCL. */
|
||||
} slave; /*!< I2C slave config */
|
||||
};
|
||||
uint32_t clk_flags; /*!< Bitwise of ``I2C_SCLK_SRC_FLAG_**FOR_DFS**`` for clk source choice*/
|
||||
uint32_t clk_flags; /*!< Bitwise of ``I2C_SCLK_SRC_FLAG_**FOR_DFS**`` for clk source choice*/
|
||||
} i2c_config_t;
|
||||
|
||||
|
||||
|
||||
@ -105,7 +105,7 @@ typedef struct {
|
||||
#define SPI_TRANS_VARIABLE_ADDR (1<<6) ///< Use the ``address_bits`` in ``spi_transaction_ext_t`` rather than default value in ``spi_device_interface_config_t``.
|
||||
#define SPI_TRANS_VARIABLE_DUMMY (1<<7) ///< Use the ``dummy_bits`` in ``spi_transaction_ext_t`` rather than default value in ``spi_device_interface_config_t``.
|
||||
#define SPI_TRANS_SET_CD (1<<7) ///< Set the CD pin
|
||||
|
||||
#define SPI_TRANS_CS_KEEP_ACTIVE (1<<8) ///< Keep CS active after data transfer
|
||||
/**
|
||||
* This structure describes one SPI transaction. The descriptor should not be modified until the transaction finishes.
|
||||
*/
|
||||
@ -194,7 +194,8 @@ esp_err_t spi_bus_remove_device(spi_device_handle_t handle);
|
||||
* @param ticks_to_wait Ticks to wait until there's room in the queue; use portMAX_DELAY to
|
||||
* never time out.
|
||||
* @return
|
||||
* - ESP_ERR_INVALID_ARG if parameter is invalid
|
||||
* - ESP_ERR_INVALID_ARG if parameter is invalid. This can happen if SPI_DEVICE_CS_KEEP_LOW flag is specified while
|
||||
* the bus was not acquired (`spi_device_acquire_bus()` should be called first)
|
||||
* - ESP_ERR_TIMEOUT if there was no room in the queue before ticks_to_wait expired
|
||||
* - ESP_ERR_NO_MEM if allocating DMA-capable temporary buffer failed
|
||||
* - ESP_ERR_INVALID_STATE if previous transactions are not finished
|
||||
@ -257,7 +258,8 @@ esp_err_t spi_device_transmit(spi_device_handle_t handle, spi_transaction_t *tra
|
||||
* currently only portMAX_DELAY is supported.
|
||||
*
|
||||
* @return
|
||||
* - ESP_ERR_INVALID_ARG if parameter is invalid
|
||||
* - ESP_ERR_INVALID_ARG if parameter is invalid. This can happen if SPI_DEVICE_CS_KEEP_LOW flag is specified while
|
||||
* the bus was not acquired (`spi_device_acquire_bus()` should be called first)
|
||||
* - ESP_ERR_TIMEOUT if the device cannot get control of the bus before ``ticks_to_wait`` expired
|
||||
* - ESP_ERR_NO_MEM if allocating DMA-capable temporary buffer failed
|
||||
* - ESP_ERR_INVALID_STATE if previous transactions are not finished
|
||||
|
||||
@ -38,7 +38,8 @@ typedef enum {
|
||||
GDMA_TRIG_PERIPH_ADC, /*!< GDMA trigger peripheral: ADC */
|
||||
GDMA_TRIG_PERIPH_DAC, /*!< GDMA trigger peripheral: DAC */
|
||||
GDMA_TRIG_PERIPH_LCD, /*!< GDMA trigger peripheral: LCD */
|
||||
GDMA_TRIG_PERIPH_CAM /*!< GDMA trigger peripheral: CAM */
|
||||
GDMA_TRIG_PERIPH_CAM, /*!< GDMA trigger peripheral: CAM */
|
||||
GDMA_TRIG_PERIPH_RMT, /*!< GDMA trigger peripheral: RMT */
|
||||
} gdma_trigger_peripheral_t;
|
||||
|
||||
/**
|
||||
@ -58,10 +59,23 @@ typedef struct {
|
||||
gdma_channel_handle_t sibling_chan; /*!< DMA sibling channel handle (NULL means having sibling is not necessary) */
|
||||
gdma_channel_direction_t direction; /*!< DMA channel direction */
|
||||
struct {
|
||||
int reserve_sibling: 1; /*!< If set, DMA channel allocator would prefer to allocate new channel in a new pair, and reserve sibling channel for future use */
|
||||
int reserve_sibling: 1; /*!< If set, DMA channel allocator would prefer to allocate new channel in a new pair, and reserve sibling channel for future use */
|
||||
} flags;
|
||||
} gdma_channel_alloc_config_t;
|
||||
|
||||
/**
|
||||
* @brief GDMA transfer ability
|
||||
*
|
||||
* @note The alignment set in this structure is **not** a guarantee that gdma driver will take care of the nonalignment cases.
|
||||
* Actually the GDMA driver has no knowledge about the DMA buffer (address and size) used by upper layer.
|
||||
* So it's the responsibility of the **upper layer** to take care of the buffer address and size.
|
||||
*
|
||||
*/
|
||||
typedef struct {
|
||||
size_t sram_trans_align; /*!< DMA transfer alignment for memory in SRAM, in bytes. The driver enables/disables burst mode based on this value. 0 means no alignment is required */
|
||||
size_t psram_trans_align; /*!< DMA transfer alignment for memory in PSRAM, in bytes. The driver sets proper burst block size based on the alignment value. 0 means no alignment is required */
|
||||
} gdma_transfer_ability_t;
|
||||
|
||||
/**
|
||||
* @brief Type of GDMA event data
|
||||
*
|
||||
@ -79,6 +93,9 @@ typedef struct {
|
||||
* @param event_data GDMA event data
|
||||
* @param user_data User registered data from `gdma_register_tx_event_callbacks` or `gdma_register_rx_event_callbacks`
|
||||
*
|
||||
* @return Whether a task switch is needed after the callback function returns,
|
||||
* this is usually due to the callback wakes up some high priority task.
|
||||
*
|
||||
*/
|
||||
typedef bool (*gdma_event_callback_t)(gdma_channel_handle_t dma_chan, gdma_event_data_t *event_data, void *user_data);
|
||||
|
||||
@ -171,6 +188,18 @@ esp_err_t gdma_connect(gdma_channel_handle_t dma_chan, gdma_trigger_t trig_perip
|
||||
*/
|
||||
esp_err_t gdma_disconnect(gdma_channel_handle_t dma_chan);
|
||||
|
||||
/**
|
||||
* @brief Set DMA channel transfer ability
|
||||
*
|
||||
* @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
|
||||
* @param[in] ability Transfer ability, e.g. alignment
|
||||
* @return
|
||||
* - ESP_OK: Set DMA channel transfer ability successfully
|
||||
* - ESP_ERR_INVALID_ARG: Set DMA channel transfer ability failed because of invalid argument
|
||||
* - ESP_FAIL: Set DMA channel transfer ability failed because of other error
|
||||
*/
|
||||
esp_err_t gdma_set_transfer_ability(gdma_channel_handle_t dma_chan, const gdma_transfer_ability_t *ability);
|
||||
|
||||
/**
|
||||
* @brief Apply channel strategy for GDMA channel
|
||||
*
|
||||
|
||||
@ -30,7 +30,187 @@ extern "C" {
|
||||
return err_rc_; \
|
||||
} \
|
||||
} while(0)
|
||||
#else
|
||||
|
||||
/**
|
||||
* A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
|
||||
*/
|
||||
#define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do { \
|
||||
esp_err_t err_rc_ = (x); \
|
||||
if (unlikely(err_rc_ != ESP_OK)) { \
|
||||
return err_rc_; \
|
||||
} \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message,
|
||||
* sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
|
||||
*/
|
||||
#define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do { \
|
||||
esp_err_t err_rc_ = (x); \
|
||||
if (unlikely(err_rc_ != ESP_OK)) { \
|
||||
ret = err_rc_; \
|
||||
goto goto_tag; \
|
||||
} \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
|
||||
*/
|
||||
#define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do { \
|
||||
esp_err_t err_rc_ = (x); \
|
||||
if (unlikely(err_rc_ != ESP_OK)) { \
|
||||
ret = err_rc_; \
|
||||
goto goto_tag; \
|
||||
} \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* Macro which can be used to check the condition. If the condition is not 'true', it prints the message
|
||||
* and returns with the supplied 'err_code'.
|
||||
*/
|
||||
#define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do { \
|
||||
if (unlikely(!(a))) { \
|
||||
return err_code; \
|
||||
} \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
|
||||
*/
|
||||
#define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do { \
|
||||
if (unlikely(!(a))) { \
|
||||
return err_code; \
|
||||
} \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* Macro which can be used to check the condition. If the condition is not 'true', it prints the message,
|
||||
* sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
|
||||
*/
|
||||
#define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do { \
|
||||
if (unlikely(!(a))) { \
|
||||
ret = err_code; \
|
||||
goto goto_tag; \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
/**
|
||||
* A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
|
||||
*/
|
||||
#define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do { \
|
||||
if (unlikely(!(a))) { \
|
||||
ret = err_code; \
|
||||
goto goto_tag; \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#else // !CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT
|
||||
|
||||
/**
|
||||
* In the future, we want to switch to C++20. We also want to become compatible with clang.
|
||||
* Hence, we provide two versions of the following macros. The first one is using the GNU extension \#\#__VA_ARGS__.
|
||||
* The second one is using the C++20 feature __VA_OPT__(,). This allows users to compile their code with
|
||||
* standard C++20 enabled instead of the GNU extension. Below C++20, we haven't found any good alternative to
|
||||
* using \#\#__VA_ARGS__.
|
||||
*/
|
||||
#if defined(__cplusplus) && (__cplusplus > 201703L)
|
||||
|
||||
/**
|
||||
* Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message and returns.
|
||||
*/
|
||||
#define ESP_RETURN_ON_ERROR(x, log_tag, format, ...) do { \
|
||||
esp_err_t err_rc_ = (x); \
|
||||
if (unlikely(err_rc_ != ESP_OK)) { \
|
||||
ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__); \
|
||||
return err_rc_; \
|
||||
} \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
|
||||
*/
|
||||
#define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do { \
|
||||
esp_err_t err_rc_ = (x); \
|
||||
if (unlikely(err_rc_ != ESP_OK)) { \
|
||||
ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__); \
|
||||
return err_rc_; \
|
||||
} \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message,
|
||||
* sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
|
||||
*/
|
||||
#define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do { \
|
||||
esp_err_t err_rc_ = (x); \
|
||||
if (unlikely(err_rc_ != ESP_OK)) { \
|
||||
ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__); \
|
||||
ret = err_rc_; \
|
||||
goto goto_tag; \
|
||||
} \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
|
||||
*/
|
||||
#define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do { \
|
||||
esp_err_t err_rc_ = (x); \
|
||||
if (unlikely(err_rc_ != ESP_OK)) { \
|
||||
ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__); \
|
||||
ret = err_rc_; \
|
||||
goto goto_tag; \
|
||||
} \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* Macro which can be used to check the condition. If the condition is not 'true', it prints the message
|
||||
* and returns with the supplied 'err_code'.
|
||||
*/
|
||||
#define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do { \
|
||||
if (unlikely(!(a))) { \
|
||||
ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__); \
|
||||
return err_code; \
|
||||
} \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
|
||||
*/
|
||||
#define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do { \
|
||||
if (unlikely(!(a))) { \
|
||||
ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__); \
|
||||
return err_code; \
|
||||
} \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* Macro which can be used to check the condition. If the condition is not 'true', it prints the message,
|
||||
* sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
|
||||
*/
|
||||
#define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do { \
|
||||
if (unlikely(!(a))) { \
|
||||
ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__); \
|
||||
ret = err_code; \
|
||||
goto goto_tag; \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
/**
|
||||
* A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
|
||||
*/
|
||||
#define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do { \
|
||||
if (unlikely(!(a))) { \
|
||||
ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__ __VA_OPT__(,) __VA_ARGS__); \
|
||||
ret = err_code; \
|
||||
goto goto_tag; \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#else // !(defined(__cplusplus) && (__cplusplus > 201703L))
|
||||
|
||||
/**
|
||||
* Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message and returns.
|
||||
*/
|
||||
#define ESP_RETURN_ON_ERROR(x, log_tag, format, ...) do { \
|
||||
esp_err_t err_rc_ = (x); \
|
||||
if (unlikely(err_rc_ != ESP_OK)) { \
|
||||
@ -38,19 +218,10 @@ extern "C" {
|
||||
return err_rc_; \
|
||||
} \
|
||||
} while(0)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* A version of ESP_RETURN_ON_ERROR() macro that can be called from ISR.
|
||||
*/
|
||||
#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
|
||||
#define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do { \
|
||||
esp_err_t err_rc_ = (x); \
|
||||
if (unlikely(err_rc_ != ESP_OK)) { \
|
||||
return err_rc_; \
|
||||
} \
|
||||
} while(0)
|
||||
#else
|
||||
#define ESP_RETURN_ON_ERROR_ISR(x, log_tag, format, ...) do { \
|
||||
esp_err_t err_rc_ = (x); \
|
||||
if (unlikely(err_rc_ != ESP_OK)) { \
|
||||
@ -58,21 +229,11 @@ extern "C" {
|
||||
return err_rc_; \
|
||||
} \
|
||||
} while(0)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Macro which can be used to check the error code. If the code is not ESP_OK, it prints the message,
|
||||
* sets the local variable 'ret' to the code, and then exits by jumping to 'goto_tag'.
|
||||
*/
|
||||
#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
|
||||
#define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do { \
|
||||
esp_err_t err_rc_ = (x); \
|
||||
if (unlikely(err_rc_ != ESP_OK)) { \
|
||||
ret = err_rc_; \
|
||||
goto goto_tag; \
|
||||
} \
|
||||
} while(0)
|
||||
#else
|
||||
#define ESP_GOTO_ON_ERROR(x, goto_tag, log_tag, format, ...) do { \
|
||||
esp_err_t err_rc_ = (x); \
|
||||
if (unlikely(err_rc_ != ESP_OK)) { \
|
||||
@ -81,20 +242,10 @@ extern "C" {
|
||||
goto goto_tag; \
|
||||
} \
|
||||
} while(0)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* A version of ESP_GOTO_ON_ERROR() macro that can be called from ISR.
|
||||
*/
|
||||
#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
|
||||
#define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do { \
|
||||
esp_err_t err_rc_ = (x); \
|
||||
if (unlikely(err_rc_ != ESP_OK)) { \
|
||||
ret = err_rc_; \
|
||||
goto goto_tag; \
|
||||
} \
|
||||
} while(0)
|
||||
#else
|
||||
#define ESP_GOTO_ON_ERROR_ISR(x, goto_tag, log_tag, format, ...) do { \
|
||||
esp_err_t err_rc_ = (x); \
|
||||
if (unlikely(err_rc_ != ESP_OK)) { \
|
||||
@ -103,57 +254,32 @@ extern "C" {
|
||||
goto goto_tag; \
|
||||
} \
|
||||
} while(0)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Macro which can be used to check the condition. If the condition is not 'true', it prints the message
|
||||
* and returns with the supplied 'err_code'.
|
||||
*/
|
||||
#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
|
||||
#define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do { \
|
||||
if (unlikely(!(a))) { \
|
||||
return err_code; \
|
||||
} \
|
||||
} while(0)
|
||||
#else
|
||||
#define ESP_RETURN_ON_FALSE(a, err_code, log_tag, format, ...) do { \
|
||||
if (unlikely(!(a))) { \
|
||||
ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__); \
|
||||
return err_code; \
|
||||
} \
|
||||
} while(0)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* A version of ESP_RETURN_ON_FALSE() macro that can be called from ISR.
|
||||
*/
|
||||
#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
|
||||
#define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do { \
|
||||
if (unlikely(!(a))) { \
|
||||
return err_code; \
|
||||
} \
|
||||
} while(0)
|
||||
#else
|
||||
#define ESP_RETURN_ON_FALSE_ISR(a, err_code, log_tag, format, ...) do { \
|
||||
if (unlikely(!(a))) { \
|
||||
ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__); \
|
||||
return err_code; \
|
||||
} \
|
||||
} while(0)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Macro which can be used to check the condition. If the condition is not 'true', it prints the message,
|
||||
* sets the local variable 'ret' to the supplied 'err_code', and then exits by jumping to 'goto_tag'.
|
||||
*/
|
||||
#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
|
||||
#define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do { \
|
||||
if (unlikely(!(a))) { \
|
||||
ret = err_code; \
|
||||
goto goto_tag; \
|
||||
} \
|
||||
} while (0)
|
||||
#else
|
||||
#define ESP_GOTO_ON_FALSE(a, err_code, goto_tag, log_tag, format, ...) do { \
|
||||
if (unlikely(!(a))) { \
|
||||
ESP_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__); \
|
||||
@ -161,19 +287,10 @@ extern "C" {
|
||||
goto goto_tag; \
|
||||
} \
|
||||
} while (0)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* A version of ESP_GOTO_ON_FALSE() macro that can be called from ISR.
|
||||
*/
|
||||
#if defined(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT)
|
||||
#define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do { \
|
||||
if (unlikely(!(a))) { \
|
||||
ret = err_code; \
|
||||
goto goto_tag; \
|
||||
} \
|
||||
} while (0)
|
||||
#else
|
||||
#define ESP_GOTO_ON_FALSE_ISR(a, err_code, goto_tag, log_tag, format, ...) do { \
|
||||
if (unlikely(!(a))) { \
|
||||
ESP_EARLY_LOGE(log_tag, "%s(%d): " format, __FUNCTION__, __LINE__, ##__VA_ARGS__); \
|
||||
@ -181,7 +298,11 @@ extern "C" {
|
||||
goto goto_tag; \
|
||||
} \
|
||||
} while (0)
|
||||
#endif
|
||||
|
||||
#endif // !(defined(__cplusplus) && (__cplusplus > 201703L))
|
||||
|
||||
#endif // !CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@ -132,7 +132,7 @@ void _esp_error_check_failed_without_abort(esp_err_t rc, const char *file, int l
|
||||
* serial output.
|
||||
* In comparison with ESP_ERROR_CHECK(), this prints the same error message but isn't terminating the program.
|
||||
*/
|
||||
#ifdef NDEBUG
|
||||
#if defined NDEBUG || defined CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT
|
||||
#define ESP_ERROR_CHECK_WITHOUT_ABORT(x) ({ \
|
||||
esp_err_t err_rc_ = (x); \
|
||||
err_rc_; \
|
||||
|
||||
@ -287,17 +287,98 @@ struct esp_eth_mac_s {
|
||||
esp_err_t (*del)(esp_eth_mac_t *mac);
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief RMII Clock Mode Options
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
/**
|
||||
* @brief Default values configured using Kconfig are going to be used when "Default" selected.
|
||||
*
|
||||
*/
|
||||
EMAC_CLK_DEFAULT,
|
||||
|
||||
/**
|
||||
* @brief Input RMII Clock from external. EMAC Clock GPIO number needs to be configured when this option is selected.
|
||||
*
|
||||
* @note MAC will get RMII clock from outside. Note that ESP32 only supports GPIO0 to input the RMII clock.
|
||||
*
|
||||
*/
|
||||
EMAC_CLK_EXT_IN,
|
||||
|
||||
/**
|
||||
* @brief Output RMII Clock from internal APLL Clock. EMAC Clock GPIO number needs to be configured when this option is selected.
|
||||
*
|
||||
*/
|
||||
EMAC_CLK_OUT
|
||||
} emac_rmii_clock_mode_t;
|
||||
|
||||
/**
|
||||
* @brief RMII Clock GPIO number Options
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
/**
|
||||
* @brief MAC will get RMII clock from outside at this GPIO.
|
||||
*
|
||||
* @note ESP32 only supports GPIO0 to input the RMII clock.
|
||||
*
|
||||
*/
|
||||
EMAC_CLK_IN_GPIO = 0,
|
||||
|
||||
/**
|
||||
* @brief Output RMII Clock from internal APLL Clock available at GPIO0
|
||||
*
|
||||
* @note GPIO0 can be set to output a pre-divided PLL clock (test only!). Enabling this option will configure GPIO0 to output a 50MHz clock.
|
||||
* In fact this clock doesn’t have directly relationship with EMAC peripheral. Sometimes this clock won’t work well with your PHY chip.
|
||||
* You might need to add some extra devices after GPIO0 (e.g. inverter). Note that outputting RMII clock on GPIO0 is an experimental practice.
|
||||
* If you want the Ethernet to work with WiFi, don’t select GPIO0 output mode for stability.
|
||||
*
|
||||
*/
|
||||
EMAC_APPL_CLK_OUT_GPIO = 0,
|
||||
|
||||
/**
|
||||
* @brief Output RMII Clock from internal APLL Clock available at GPIO16
|
||||
*
|
||||
*/
|
||||
EMAC_CLK_OUT_GPIO = 16,
|
||||
|
||||
/**
|
||||
* @brief Inverted Output RMII Clock from internal APLL Clock available at GPIO17
|
||||
*
|
||||
*/
|
||||
EMAC_CLK_OUT_180_GPIO = 17
|
||||
} emac_rmii_clock_gpio_t;
|
||||
|
||||
/**
|
||||
* @brief Ethernet MAC Clock Configuration
|
||||
*
|
||||
*/
|
||||
typedef union {
|
||||
struct {
|
||||
// MII interface is not fully implemented...
|
||||
// Reserved for GPIO number, clock source, etc. in MII mode
|
||||
} mii; /*!< EMAC MII Clock Configuration */
|
||||
struct {
|
||||
emac_rmii_clock_mode_t clock_mode; /*!< RMII Clock Mode Configuration */
|
||||
emac_rmii_clock_gpio_t clock_gpio; /*!< RMII Clock GPIO Configuration */
|
||||
} rmii; /*!< EMAC RMII Clock Configuration */
|
||||
} eth_mac_clock_config_t;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Configuration of Ethernet MAC object
|
||||
*
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t sw_reset_timeout_ms; /*!< Software reset timeout value (Unit: ms) */
|
||||
uint32_t rx_task_stack_size; /*!< Stack size of the receive task */
|
||||
uint32_t rx_task_prio; /*!< Priority of the receive task */
|
||||
int smi_mdc_gpio_num; /*!< SMI MDC GPIO number, set to -1 could bypass the SMI GPIO configuration */
|
||||
int smi_mdio_gpio_num; /*!< SMI MDIO GPIO number, set to -1 could bypass the SMI GPIO configuration */
|
||||
uint32_t flags; /*!< Flags that specify extra capability for mac driver */
|
||||
uint32_t sw_reset_timeout_ms; /*!< Software reset timeout value (Unit: ms) */
|
||||
uint32_t rx_task_stack_size; /*!< Stack size of the receive task */
|
||||
uint32_t rx_task_prio; /*!< Priority of the receive task */
|
||||
int smi_mdc_gpio_num; /*!< SMI MDC GPIO number, set to -1 could bypass the SMI GPIO configuration */
|
||||
int smi_mdio_gpio_num; /*!< SMI MDIO GPIO number, set to -1 could bypass the SMI GPIO configuration */
|
||||
uint32_t flags; /*!< Flags that specify extra capability for mac driver */
|
||||
eth_data_interface_t interface; /*!< EMAC Data interface to PHY (MII/RMII) */
|
||||
eth_mac_clock_config_t clock_config; /*!< EMAC Interface clock configuration */
|
||||
} eth_mac_config_t;
|
||||
|
||||
#define ETH_MAC_FLAG_WORK_WITH_CACHE_DISABLE (1 << 0) /*!< MAC driver can work when cache is disabled */
|
||||
@ -307,14 +388,23 @@ typedef struct {
|
||||
* @brief Default configuration for Ethernet MAC object
|
||||
*
|
||||
*/
|
||||
#define ETH_MAC_DEFAULT_CONFIG() \
|
||||
{ \
|
||||
.sw_reset_timeout_ms = 100, \
|
||||
.rx_task_stack_size = 4096, \
|
||||
.rx_task_prio = 15, \
|
||||
.smi_mdc_gpio_num = 23, \
|
||||
.smi_mdio_gpio_num = 18, \
|
||||
.flags = 0, \
|
||||
#define ETH_MAC_DEFAULT_CONFIG() \
|
||||
{ \
|
||||
.sw_reset_timeout_ms = 100, \
|
||||
.rx_task_stack_size = 4096, \
|
||||
.rx_task_prio = 15, \
|
||||
.smi_mdc_gpio_num = 23, \
|
||||
.smi_mdio_gpio_num = 18, \
|
||||
.flags = 0, \
|
||||
.interface = EMAC_DATA_INTERFACE_RMII, \
|
||||
.clock_config = \
|
||||
{ \
|
||||
.rmii = \
|
||||
{ \
|
||||
.clock_mode = EMAC_CLK_DEFAULT, \
|
||||
.clock_gpio = EMAC_CLK_IN_GPIO \
|
||||
} \
|
||||
} \
|
||||
}
|
||||
|
||||
#if CONFIG_ETH_USE_ESP32_EMAC
|
||||
|
||||
@ -48,6 +48,7 @@ typedef struct {
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK: Success
|
||||
* - ESP_ERR_INVALID_ARG: event_loop_args or event_loop was NULL
|
||||
* - ESP_ERR_NO_MEM: Cannot allocate memory for event loops list
|
||||
* - ESP_FAIL: Failed to create task loop
|
||||
* - Others: Fail
|
||||
@ -57,7 +58,7 @@ esp_err_t esp_event_loop_create(const esp_event_loop_args_t *event_loop_args, es
|
||||
/**
|
||||
* @brief Delete an existing event loop.
|
||||
*
|
||||
* @param[in] event_loop event loop to delete
|
||||
* @param[in] event_loop event loop to delete, must not be NULL
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK: Success
|
||||
@ -102,7 +103,7 @@ esp_err_t esp_event_loop_delete_default(void);
|
||||
* In cases where waiting on the queue times out, ESP_OK is returned and not ESP_ERR_TIMEOUT, since it is
|
||||
* normal behavior.
|
||||
*
|
||||
* @param[in] event_loop event loop to dispatch posted events from
|
||||
* @param[in] event_loop event loop to dispatch posted events from, must not be NULL
|
||||
* @param[in] ticks_to_run number of ticks to run the loop
|
||||
*
|
||||
* @note encountering an unknown event that has been posted to the loop will only generate a warning, not an error.
|
||||
@ -158,7 +159,7 @@ esp_err_t esp_event_handler_register(esp_event_base_t event_base,
|
||||
* This function behaves in the same manner as esp_event_handler_register, except the additional
|
||||
* specification of the event loop to register the handler to.
|
||||
*
|
||||
* @param[in] event_loop the event loop to register this handler function to
|
||||
* @param[in] event_loop the event loop to register this handler function to, must not be NULL
|
||||
* @param[in] event_base the base id of the event to register the handler for
|
||||
* @param[in] event_id the id of the event to register the handler for
|
||||
* @param[in] event_handler the handler function which gets called when the event is dispatched
|
||||
@ -197,7 +198,7 @@ esp_err_t esp_event_handler_register_with(esp_event_loop_handle_t event_loop,
|
||||
* Each registration yields a distinct instance object which identifies it over the registration
|
||||
* lifetime.
|
||||
*
|
||||
* @param[in] event_loop the event loop to register this handler function to
|
||||
* @param[in] event_loop the event loop to register this handler function to, must not be NULL
|
||||
* @param[in] event_base the base id of the event to register the handler for
|
||||
* @param[in] event_id the id of the event to register the handler for
|
||||
* @param[in] event_handler the handler function which gets called when the event is dispatched
|
||||
@ -263,15 +264,15 @@ esp_err_t esp_event_handler_instance_register(esp_event_base_t event_base,
|
||||
* @note This function is obsolete and will be deprecated soon, please use esp_event_handler_instance_unregister()
|
||||
* instead.
|
||||
*
|
||||
* This function can be used to unregister a handler so that it no longer gets called during dispatch.
|
||||
* Handlers can be unregistered for either: (1) specific events, (2) all events of a certain event base,
|
||||
* or (3) all events known by the system event loop
|
||||
* Unregisters a handler so it will no longer be called during dispatch.
|
||||
* Handlers can be unregistered for any combination of event_base and event_id which were previously registered.
|
||||
* To unregister a handler, the event_base and event_id arguments must match exactly the arguments passed to
|
||||
* esp_event_handler_register() when that handler was registered. Passing ESP_EVENT_ANY_BASE and/or ESP_EVENT_ANY_ID
|
||||
* will only unregister handlers that were registered with the same wildcard arguments.
|
||||
*
|
||||
* - specific events: specify exact event_base and event_id
|
||||
* - all events of a certain base: specify exact event_base and use ESP_EVENT_ANY_ID as the event_id
|
||||
* - all events known by the loop: use ESP_EVENT_ANY_BASE for event_base and ESP_EVENT_ANY_ID as the event_id
|
||||
*
|
||||
* This function ignores unregistration of handlers that has not been previously registered.
|
||||
* @note When using ESP_EVENT_ANY_ID, handlers registered to specific event IDs using the same base will not be
|
||||
* unregistered. When using ESP_EVENT_ANY_BASE, events registered to specific bases will also not be
|
||||
* unregistered. This avoids accidental unregistration of handlers registered by other users or components.
|
||||
*
|
||||
* @param[in] event_base the base of the event with which to unregister the handler
|
||||
* @param[in] event_id the id of the event with which to unregister the handler
|
||||
@ -294,7 +295,7 @@ esp_err_t esp_event_handler_unregister(esp_event_base_t event_base,
|
||||
* This function behaves in the same manner as esp_event_handler_unregister, except the additional specification of
|
||||
* the event loop to unregister the handler with.
|
||||
*
|
||||
* @param[in] event_loop the event loop with which to unregister this handler function
|
||||
* @param[in] event_loop the event loop with which to unregister this handler function, must not be NULL
|
||||
* @param[in] event_base the base of the event with which to unregister the handler
|
||||
* @param[in] event_id the id of the event with which to unregister the handler
|
||||
* @param[in] event_handler the handler to unregister
|
||||
@ -312,17 +313,18 @@ esp_err_t esp_event_handler_unregister_with(esp_event_loop_handle_t event_loop,
|
||||
/**
|
||||
* @brief Unregister a handler instance from a specific event loop.
|
||||
*
|
||||
* This function can be used to unregister a handler so that it no longer gets called during dispatch.
|
||||
* Handlers can be unregistered for either: (1) specific events, (2) all events of a certain event base,
|
||||
* or (3) all events known by the system event loop
|
||||
* Unregisters a handler instance so it will no longer be called during dispatch.
|
||||
* Handler instances can be unregistered for any combination of event_base and event_id which were previously
|
||||
* registered. To unregister a handler instance, the event_base and event_id arguments must match exactly the
|
||||
* arguments passed to esp_event_handler_instance_register() when that handler instance was registered.
|
||||
* Passing ESP_EVENT_ANY_BASE and/or ESP_EVENT_ANY_ID will only unregister handler instances that were registered
|
||||
* with the same wildcard arguments.
|
||||
*
|
||||
* - specific events: specify exact event_base and event_id
|
||||
* - all events of a certain base: specify exact event_base and use ESP_EVENT_ANY_ID as the event_id
|
||||
* - all events known by the loop: use ESP_EVENT_ANY_BASE for event_base and ESP_EVENT_ANY_ID as the event_id
|
||||
* @note When using ESP_EVENT_ANY_ID, handlers registered to specific event IDs using the same base will not be
|
||||
* unregistered. When using ESP_EVENT_ANY_BASE, events registered to specific bases will also not be
|
||||
* unregistered. This avoids accidental unregistration of handlers registered by other users or components.
|
||||
*
|
||||
* This function ignores unregistration of handler instances that have not been previously registered.
|
||||
*
|
||||
* @param[in] event_loop the event loop with which to unregister this handler function
|
||||
* @param[in] event_loop the event loop with which to unregister this handler function, must not be NULL
|
||||
* @param[in] event_base the base of the event with which to unregister the handler
|
||||
* @param[in] event_id the id of the event with which to unregister the handler
|
||||
* @param[in] instance the instance object of the registration to be unregistered
|
||||
@ -388,7 +390,7 @@ esp_err_t esp_event_post(esp_event_base_t event_base,
|
||||
* This function behaves in the same manner as esp_event_post_to, except the additional specification of the event loop
|
||||
* to post the event to.
|
||||
*
|
||||
* @param[in] event_loop the event loop to post to
|
||||
* @param[in] event_loop the event loop to post to, must not be NULL
|
||||
* @param[in] event_base the event base that identifies the event
|
||||
* @param[in] event_id the event id that identifies the event
|
||||
* @param[in] event_data the data, specific to the event occurence, that gets passed to the handler
|
||||
@ -441,7 +443,7 @@ esp_err_t esp_event_isr_post(esp_event_base_t event_base,
|
||||
/**
|
||||
* @brief Special variant of esp_event_post_to for posting events from interrupt handlers
|
||||
*
|
||||
* @param[in] event_loop the event loop to post to
|
||||
* @param[in] event_loop the event loop to post to, must not be NULL
|
||||
* @param[in] event_base the event base that identifies the event
|
||||
* @param[in] event_id the event id that identifies the event
|
||||
* @param[in] event_data the data, specific to the event occurence, that gets passed to the handler
|
||||
|
||||
@ -167,6 +167,7 @@ typedef enum {
|
||||
#define ESP_ERR_HTTP_INVALID_TRANSPORT (ESP_ERR_HTTP_BASE + 5) /*!< There are no transport support for the input scheme */
|
||||
#define ESP_ERR_HTTP_CONNECTING (ESP_ERR_HTTP_BASE + 6) /*!< HTTP connection hasn't been established yet */
|
||||
#define ESP_ERR_HTTP_EAGAIN (ESP_ERR_HTTP_BASE + 7) /*!< Mapping of errno EAGAIN to esp_err_t */
|
||||
#define ESP_ERR_HTTP_CONNECTION_CLOSED (ESP_ERR_HTTP_BASE + 8) /*!< Read FIN from peer and the connection closed */
|
||||
|
||||
/**
|
||||
* @brief Start a HTTP session
|
||||
|
||||
@ -54,8 +54,10 @@ typedef bool (*async_memcpy_isr_cb_t)(async_memcpy_t mcp_hdl, async_memcpy_event
|
||||
*
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t backlog; /*!< Maximum number of streams that can be handled simultaneously */
|
||||
uint32_t flags; /*!< Extra flags to control async memcpy feature */
|
||||
uint32_t backlog; /*!< Maximum number of streams that can be handled simultaneously */
|
||||
size_t sram_trans_align; /*!< DMA transfer alignment (both in size and address) for SRAM memory */
|
||||
size_t psram_trans_align; /*!< DMA transfer alignment (both in size and address) for PSRAM memory */
|
||||
uint32_t flags; /*!< Extra flags to control async memcpy feature */
|
||||
} async_memcpy_config_t;
|
||||
|
||||
/**
|
||||
@ -63,9 +65,11 @@ typedef struct {
|
||||
*
|
||||
*/
|
||||
#define ASYNC_MEMCPY_DEFAULT_CONFIG() \
|
||||
{ \
|
||||
.backlog = 8, \
|
||||
.flags = 0, \
|
||||
{ \
|
||||
.backlog = 8, \
|
||||
.sram_trans_align = 0, \
|
||||
.psram_trans_align = 0, \
|
||||
.flags = 0, \
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@ -60,7 +60,9 @@ typedef enum {
|
||||
* @note If not using a valid OUI, set the "locally administered" bit
|
||||
* (bit value 0x02 in the first byte) to avoid collisions.
|
||||
*
|
||||
* @param mac base MAC address, length: 6 bytes.
|
||||
* @param mac base MAC address, length: 6 bytes/8 bytes.
|
||||
* length: 6 bytes for MAC-48
|
||||
* 8 bytes for EUI-64(used for IEEE 802.15.4)
|
||||
*
|
||||
* @return ESP_OK on success
|
||||
* ESP_ERR_INVALID_ARG If mac is NULL or is not a unicast MAC
|
||||
@ -72,7 +74,9 @@ esp_err_t esp_base_mac_addr_set(const uint8_t *mac);
|
||||
*
|
||||
* @note If no custom Base MAC has been set, this returns the pre-programmed Espressif base MAC address.
|
||||
*
|
||||
* @param mac base MAC address, length: 6 bytes.
|
||||
* @param mac base MAC address, length: 6 bytes/8 bytes.
|
||||
* length: 6 bytes for MAC-48
|
||||
* 8 bytes for EUI-64(used for IEEE 802.15.4)
|
||||
*
|
||||
* @return ESP_OK on success
|
||||
* ESP_ERR_INVALID_MAC base MAC address has not been set
|
||||
@ -91,7 +95,9 @@ esp_err_t esp_base_mac_addr_get(uint8_t *mac);
|
||||
*
|
||||
* @note This function is currently only supported on ESP32.
|
||||
*
|
||||
* @param mac base MAC address, length: 6 bytes.
|
||||
* @param mac base MAC address, length: 6 bytes/8 bytes.
|
||||
* length: 6 bytes for MAC-48
|
||||
* 8 bytes for EUI-64(used for IEEE 802.15.4)
|
||||
*
|
||||
* @return ESP_OK on success
|
||||
* ESP_ERR_INVALID_VERSION An invalid MAC version field was read from BLK3 of EFUSE
|
||||
@ -102,7 +108,9 @@ esp_err_t esp_efuse_mac_get_custom(uint8_t *mac);
|
||||
/**
|
||||
* @brief Return base MAC address which is factory-programmed by Espressif in EFUSE.
|
||||
*
|
||||
* @param mac base MAC address, length: 6 bytes.
|
||||
* @param mac base MAC address, length: 6 bytes/8 bytes.
|
||||
* length: 6 bytes for MAC-48
|
||||
* 8 bytes for EUI-64(used for IEEE 802.15.4)
|
||||
*
|
||||
* @return ESP_OK on success
|
||||
*/
|
||||
@ -115,12 +123,14 @@ esp_err_t esp_efuse_mac_get_default(uint8_t *mac);
|
||||
* Then calculates the MAC address of the specific interface requested,
|
||||
* refer to ESP-IDF Programming Guide for the algorithm.
|
||||
*
|
||||
* @param mac MAC address of the interface, length: 6 bytes.
|
||||
* @param mac base MAC address, length: 6 bytes/8 bytes.
|
||||
* length: 6 bytes for MAC-48
|
||||
* 8 bytes for EUI-64(used for IEEE 802.15.4)
|
||||
* @param type Type of MAC address to return
|
||||
*
|
||||
* @return ESP_OK on success
|
||||
*/
|
||||
esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type);
|
||||
esp_err_t esp_read_mac(uint8_t *mac, esp_mac_type_t type);
|
||||
|
||||
/**
|
||||
* @brief Derive local MAC address from universal MAC address.
|
||||
@ -133,12 +143,14 @@ esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type);
|
||||
* address, then the first octet is XORed with 0x4 in order to create a different
|
||||
* locally administered MAC address.
|
||||
*
|
||||
* @param local_mac Derived local MAC address, length: 6 bytes.
|
||||
* @param mac base MAC address, length: 6 bytes/8 bytes.
|
||||
* length: 6 bytes for MAC-48
|
||||
* 8 bytes for EUI-64(used for IEEE 802.15.4)
|
||||
* @param universal_mac Source universal MAC address, length: 6 bytes.
|
||||
*
|
||||
* @return ESP_OK on success
|
||||
*/
|
||||
esp_err_t esp_derive_local_mac(uint8_t* local_mac, const uint8_t* universal_mac);
|
||||
esp_err_t esp_derive_local_mac(uint8_t *local_mac, const uint8_t *universal_mac);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@ -17,7 +17,7 @@
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "soc/cpu.h"
|
||||
#include "soc/soc_memory_layout.h"
|
||||
#include "soc/soc_memory_types.h"
|
||||
|
||||
#if __XTENSA__
|
||||
#include "xtensa/xtruntime.h"
|
||||
|
||||
@ -108,9 +108,8 @@ esp_err_t esp_spiram_reserve_dma_pool(size_t size);
|
||||
*/
|
||||
bool esp_spiram_is_initialized(void);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __ESP_SPIRAM_H
|
||||
@ -20,6 +20,8 @@
|
||||
#pragma once
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#include "esp_attr.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
@ -0,0 +1,42 @@
|
||||
// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#ifndef _ESP_DPORT_ACCESS_H_
|
||||
#define _ESP_DPORT_ACCESS_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Read a sequence of DPORT registers to the buffer.
|
||||
*
|
||||
* @param[out] buff_out Contains the read data.
|
||||
* @param[in] address Initial address for reading registers.
|
||||
* @param[in] num_words The number of words.
|
||||
*/
|
||||
void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
|
||||
|
||||
#define DPORT_STALL_OTHER_CPU_START()
|
||||
#define DPORT_STALL_OTHER_CPU_END()
|
||||
#define DPORT_INTERRUPT_DISABLE()
|
||||
#define DPORT_INTERRUPT_RESTORE()
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _ESP_DPORT_ACCESS_H_ */
|
||||
@ -0,0 +1,76 @@
|
||||
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Acquire lock for HMAC cryptography peripheral
|
||||
*
|
||||
* Internally also locks the SHA peripheral, as the HMAC depends on the SHA peripheral
|
||||
*/
|
||||
void esp_crypto_hmac_lock_acquire(void);
|
||||
|
||||
/**
|
||||
* @brief Release lock for HMAC cryptography peripheral
|
||||
*
|
||||
* Internally also releases the SHA peripheral, as the HMAC depends on the SHA peripheral
|
||||
*/
|
||||
void esp_crypto_hmac_lock_release(void);
|
||||
|
||||
/**
|
||||
* @brief Acquire lock for DS cryptography peripheral
|
||||
*
|
||||
* Internally also locks the HMAC (which locks SHA), AES and MPI peripheral, as the DS depends on these peripherals
|
||||
*/
|
||||
void esp_crypto_ds_lock_acquire(void);
|
||||
|
||||
/**
|
||||
* @brief Release lock for DS cryptography peripheral
|
||||
*
|
||||
* Internally also releases the HMAC (which locks SHA), AES and MPI peripheral, as the DS depends on these peripherals
|
||||
*/
|
||||
void esp_crypto_ds_lock_release(void);
|
||||
|
||||
/**
|
||||
* @brief Acquire lock for the SHA and AES cryptography peripheral.
|
||||
*
|
||||
*/
|
||||
void esp_crypto_sha_aes_lock_acquire(void);
|
||||
|
||||
/**
|
||||
* @brief Release lock for the SHA and AES cryptography peripheral.
|
||||
*
|
||||
*/
|
||||
void esp_crypto_sha_aes_lock_release(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Acquire lock for the mpi cryptography peripheral.
|
||||
*
|
||||
*/
|
||||
void esp_crypto_mpi_lock_acquire(void);
|
||||
|
||||
/**
|
||||
* @brief Release lock for the mpi/rsa cryptography peripheral.
|
||||
*
|
||||
*/
|
||||
void esp_crypto_mpi_lock_release(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@ -0,0 +1,218 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "esp_hmac.h"
|
||||
#include "esp_err.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define ESP32H2_ERR_HW_CRYPTO_DS_HMAC_FAIL ESP_ERR_HW_CRYPTO_BASE + 0x1 /*!< HMAC peripheral problem */
|
||||
#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_KEY ESP_ERR_HW_CRYPTO_BASE + 0x2 /*!< given HMAC key isn't correct,
|
||||
HMAC peripheral problem */
|
||||
#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_DIGEST ESP_ERR_HW_CRYPTO_BASE + 0x4 /*!< message digest check failed,
|
||||
result is invalid */
|
||||
#define ESP32H2_ERR_HW_CRYPTO_DS_INVALID_PADDING ESP_ERR_HW_CRYPTO_BASE + 0x5 /*!< padding check failed, but result
|
||||
is produced anyway and can be read*/
|
||||
|
||||
#define ESP_DS_IV_BIT_LEN 128
|
||||
#define ESP_DS_IV_LEN (ESP_DS_IV_BIT_LEN / 8)
|
||||
#define ESP_DS_SIGNATURE_MAX_BIT_LEN 3072
|
||||
#define ESP_DS_SIGNATURE_MD_BIT_LEN 256
|
||||
#define ESP_DS_SIGNATURE_M_PRIME_BIT_LEN 32
|
||||
#define ESP_DS_SIGNATURE_L_BIT_LEN 32
|
||||
#define ESP_DS_SIGNATURE_PADDING_BIT_LEN 64
|
||||
|
||||
/* Length of parameter 'C' stored in flash, in bytes
|
||||
- Operands Y, M and r_bar; each 3072 bits
|
||||
- Operand MD (message digest); 256 bits
|
||||
- Operands M' and L; each 32 bits
|
||||
- Operand beta (padding value; 64 bits
|
||||
*/
|
||||
#define ESP_DS_C_LEN (((ESP_DS_SIGNATURE_MAX_BIT_LEN * 3 \
|
||||
+ ESP_DS_SIGNATURE_MD_BIT_LEN \
|
||||
+ ESP_DS_SIGNATURE_M_PRIME_BIT_LEN \
|
||||
+ ESP_DS_SIGNATURE_L_BIT_LEN \
|
||||
+ ESP_DS_SIGNATURE_PADDING_BIT_LEN) / 8))
|
||||
|
||||
typedef struct esp_ds_context esp_ds_context_t;
|
||||
|
||||
typedef enum {
|
||||
ESP_DS_RSA_1024 = (1024 / 32) - 1,
|
||||
ESP_DS_RSA_2048 = (2048 / 32) - 1,
|
||||
ESP_DS_RSA_3072 = (3072 / 32) - 1
|
||||
} esp_digital_signature_length_t;
|
||||
|
||||
/**
|
||||
* Encrypted private key data. Recommended to store in flash in this format.
|
||||
*
|
||||
* @note This struct has to match to one from the ROM code! This documentation is mostly taken from there.
|
||||
*/
|
||||
typedef struct esp_digital_signature_data {
|
||||
/**
|
||||
* RSA LENGTH register parameters
|
||||
* (number of words in RSA key & operands, minus one).
|
||||
*
|
||||
* Max value 127 (for RSA 3072).
|
||||
*
|
||||
* This value must match the length field encrypted and stored in 'c',
|
||||
* or invalid results will be returned. (The DS peripheral will
|
||||
* always use the value in 'c', not this value, so an attacker can't
|
||||
* alter the DS peripheral results this way, it will just truncate or
|
||||
* extend the message and the resulting signature in software.)
|
||||
*
|
||||
* @note In IDF, the enum type length is the same as of type unsigned, so they can be used interchangably.
|
||||
* See the ROM code for the original declaration of struct \c ets_ds_data_t.
|
||||
*/
|
||||
esp_digital_signature_length_t rsa_length;
|
||||
|
||||
/**
|
||||
* IV value used to encrypt 'c'
|
||||
*/
|
||||
uint32_t iv[ESP_DS_IV_BIT_LEN / 32];
|
||||
|
||||
/**
|
||||
* Encrypted Digital Signature parameters. Result of AES-CBC encryption
|
||||
* of plaintext values. Includes an encrypted message digest.
|
||||
*/
|
||||
uint8_t c[ESP_DS_C_LEN];
|
||||
} esp_ds_data_t;
|
||||
|
||||
/**
|
||||
* Plaintext parameters used by Digital Signature.
|
||||
*
|
||||
* This is only used for encrypting the RSA parameters by calling esp_ds_encrypt_params().
|
||||
* Afterwards, the result can be stored in flash or in other persistent memory.
|
||||
* The encryption is a prerequisite step before any signature operation can be done.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t Y[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA exponent
|
||||
uint32_t M[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA modulus
|
||||
uint32_t Rb[ESP_DS_SIGNATURE_MAX_BIT_LEN / 32]; //!< RSA r inverse operand
|
||||
uint32_t M_prime; //!< RSA M prime operand
|
||||
uint32_t length; //!< RSA length in words (32 bit)
|
||||
} esp_ds_p_data_t;
|
||||
|
||||
/**
|
||||
* @brief Sign the message with a hardware key from specific key slot.
|
||||
*
|
||||
* This function is a wrapper around \c esp_ds_finish_sign() and \c esp_ds_start_sign(), so do not use them
|
||||
* in parallel.
|
||||
* It blocks until the signing is finished and then returns the signature.
|
||||
*
|
||||
* @note This function locks the HMAC, SHA, AES and RSA components during its entire execution time.
|
||||
*
|
||||
* @param message the message to be signed; its length is determined by data->rsa_length
|
||||
* @param data the encrypted signing key data (AES encrypted RSA key + IV)
|
||||
* @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
|
||||
* signing key data
|
||||
* @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK if successful, the signature was written to the parameter \c signature.
|
||||
* - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
|
||||
* - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
|
||||
* - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
|
||||
* - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
|
||||
* - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
|
||||
* - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
|
||||
* since the message digest matches.
|
||||
*/
|
||||
esp_err_t esp_ds_sign(const void *message,
|
||||
const esp_ds_data_t *data,
|
||||
hmac_key_id_t key_id,
|
||||
void *signature);
|
||||
|
||||
/**
|
||||
* @brief Start the signing process.
|
||||
*
|
||||
* This function yields a context object which needs to be passed to \c esp_ds_finish_sign() to finish the signing
|
||||
* process.
|
||||
*
|
||||
* @note This function locks the HMAC, SHA, AES and RSA components, so the user has to ensure to call
|
||||
* \c esp_ds_finish_sign() in a timely manner.
|
||||
*
|
||||
* @param message the message to be signed; its length is determined by data->rsa_length
|
||||
* @param data the encrypted signing key data (AES encrypted RSA key + IV)
|
||||
* @param key_id the HMAC key ID determining the HMAC key of the HMAC which will be used to decrypt the
|
||||
* signing key data
|
||||
* @param esp_ds_ctx the context object which is needed for finishing the signing process later
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK if successful, the ds operation was started now and has to be finished with \c esp_ds_finish_sign()
|
||||
* - ESP_ERR_INVALID_ARG if one of the parameters is NULL or data->rsa_length is too long or 0
|
||||
* - ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL if there was an HMAC failure during retrieval of the decryption key
|
||||
* - ESP_ERR_NO_MEM if there hasn't been enough memory to allocate the context object
|
||||
* - ESP_ERR_HW_CRYPTO_DS_INVALID_KEY if there's a problem with passing the HMAC key to the DS component
|
||||
*/
|
||||
esp_err_t esp_ds_start_sign(const void *message,
|
||||
const esp_ds_data_t *data,
|
||||
hmac_key_id_t key_id,
|
||||
esp_ds_context_t **esp_ds_ctx);
|
||||
|
||||
/**
|
||||
* Return true if the DS peripheral is busy, otherwise false.
|
||||
*
|
||||
* @note Only valid if \c esp_ds_start_sign() was called before.
|
||||
*/
|
||||
bool esp_ds_is_busy(void);
|
||||
|
||||
/**
|
||||
* @brief Finish the signing process.
|
||||
*
|
||||
* @param signature the destination of the signature, should be (data->rsa_length + 1)*4 bytes long
|
||||
* @param esp_ds_ctx the context object retreived by \c esp_ds_start_sign()
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
|
||||
* - ESP_ERR_INVALID_ARG if one of the parameters is NULL
|
||||
* - ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST if the message digest didn't match; the signature is invalid.
|
||||
* This means that the encrypted RSA key parameters are invalid, indicating that they may have been tampered
|
||||
* with or indicating a flash error, etc.
|
||||
* - ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING if the message padding is incorrect, the signature can be read though
|
||||
* since the message digest matches (see TRM for more details).
|
||||
*/
|
||||
esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx);
|
||||
|
||||
/**
|
||||
* @brief Encrypt the private key parameters.
|
||||
*
|
||||
* The encryption is a prerequisite step before any signature operation can be done.
|
||||
* It is not strictly necessary to use this encryption function, the encryption could also happen on an external
|
||||
* device.
|
||||
*
|
||||
* @param data Output buffer to store encrypted data, suitable for later use generating signatures.
|
||||
* The allocated memory must be in internal memory and word aligned since it's filled by DMA. Both is asserted
|
||||
* at run time.
|
||||
* @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
|
||||
* @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process
|
||||
* is done and 'data' is stored.
|
||||
* @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the
|
||||
* corresponding HMAC key will be stored to efuse and then permanently erased.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK if successful, the ds operation has been finished and the result is written to signature.
|
||||
* - ESP_ERR_INVALID_ARG if one of the parameters is NULL or p_data->rsa_length is too long
|
||||
*/
|
||||
esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
|
||||
const void *iv,
|
||||
const esp_ds_p_data_t *p_data,
|
||||
const void *key);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@ -0,0 +1,67 @@
|
||||
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#ifndef _ESP_HMAC_H_
|
||||
#define _ESP_HMAC_H_
|
||||
|
||||
#include <stdbool.h>
|
||||
#include "esp_err.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* The possible efuse keys for the HMAC peripheral
|
||||
*/
|
||||
typedef enum {
|
||||
HMAC_KEY0 = 0,
|
||||
HMAC_KEY1,
|
||||
HMAC_KEY2,
|
||||
HMAC_KEY3,
|
||||
HMAC_KEY4,
|
||||
HMAC_KEY5,
|
||||
HMAC_KEY_MAX
|
||||
} hmac_key_id_t;
|
||||
|
||||
/**
|
||||
* @brief
|
||||
* Calculate the HMAC of a given message.
|
||||
*
|
||||
* Calculate the HMAC \c hmac of a given message \c message with length \c message_len.
|
||||
* SHA256 is used for the calculation (fixed on ESP32S2).
|
||||
*
|
||||
* @note Uses the HMAC peripheral in "upstream" mode.
|
||||
*
|
||||
* @param key_id Determines which of the 6 key blocks in the efuses should be used for the HMAC calcuation.
|
||||
* The corresponding purpose field of the key block in the efuse must be set to the HMAC upstream purpose value.
|
||||
* @param message the message for which to calculate the HMAC
|
||||
* @param message_len message length
|
||||
* return ESP_ERR_INVALID_STATE if unsuccessful
|
||||
* @param [out] hmac the hmac result; the buffer behind the provided pointer must be 32 bytes long
|
||||
*
|
||||
* @return
|
||||
* * ESP_OK, if the calculation was successful,
|
||||
* * ESP_FAIL, if the hmac calculation failed
|
||||
*/
|
||||
esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
|
||||
const void *message,
|
||||
size_t message_len,
|
||||
uint8_t *hmac);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // _ESP_HMAC_H_
|
||||
@ -0,0 +1,456 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
|
||||
/* INTERNAL API
|
||||
* generic interface to PMS memory protection features
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include "esp_attr.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifndef IRAM_SRAM_START
|
||||
#define IRAM_SRAM_START 0x4037C000
|
||||
#endif
|
||||
|
||||
#ifndef DRAM_SRAM_START
|
||||
#define DRAM_SRAM_START 0x3FC7C000
|
||||
#endif
|
||||
|
||||
#ifndef MAP_DRAM_TO_IRAM
|
||||
#define MAP_DRAM_TO_IRAM(addr) (addr - DRAM_SRAM_START + IRAM_SRAM_START)
|
||||
#endif
|
||||
|
||||
#ifndef MAP_IRAM_TO_DRAM
|
||||
#define MAP_IRAM_TO_DRAM(addr) (addr - IRAM_SRAM_START + DRAM_SRAM_START)
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
MEMPROT_NONE = 0x00000000,
|
||||
MEMPROT_IRAM0_SRAM = 0x00000001,
|
||||
MEMPROT_DRAM0_SRAM = 0x00000002,
|
||||
MEMPROT_ALL = 0xFFFFFFFF
|
||||
} mem_type_prot_t;
|
||||
|
||||
typedef enum {
|
||||
MEMPROT_SPLITLINE_NONE = 0,
|
||||
MEMPROT_IRAM0_DRAM0_SPLITLINE,
|
||||
MEMPROT_IRAM0_LINE_0_SPLITLINE,
|
||||
MEMPROT_IRAM0_LINE_1_SPLITLINE,
|
||||
MEMPROT_DRAM0_DMA_LINE_0_SPLITLINE,
|
||||
MEMPROT_DRAM0_DMA_LINE_1_SPLITLINE
|
||||
} split_line_t;
|
||||
|
||||
typedef enum {
|
||||
MEMPROT_PMS_AREA_NONE = 0,
|
||||
MEMPROT_IRAM0_PMS_AREA_0,
|
||||
MEMPROT_IRAM0_PMS_AREA_1,
|
||||
MEMPROT_IRAM0_PMS_AREA_2,
|
||||
MEMPROT_IRAM0_PMS_AREA_3,
|
||||
MEMPROT_DRAM0_PMS_AREA_0,
|
||||
MEMPROT_DRAM0_PMS_AREA_1,
|
||||
MEMPROT_DRAM0_PMS_AREA_2,
|
||||
MEMPROT_DRAM0_PMS_AREA_3
|
||||
} pms_area_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MEMPROT_PMS_WORLD_0 = 0,
|
||||
MEMPROT_PMS_WORLD_1,
|
||||
MEMPROT_PMS_WORLD_2,
|
||||
MEMPROT_PMS_WORLD_INVALID = 0xFFFFFFFF
|
||||
} pms_world_t;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MEMPROT_PMS_OP_READ = 0,
|
||||
MEMPROT_PMS_OP_WRITE,
|
||||
MEMPROT_PMS_OP_FETCH,
|
||||
MEMPROT_PMS_OP_INVALID = 0xFFFFFFFF
|
||||
} pms_operation_type_t;
|
||||
|
||||
/**
|
||||
* @brief Converts Memory protection type to string
|
||||
*
|
||||
* @param mem_type Memory protection type (see mem_type_prot_t enum)
|
||||
*/
|
||||
const char *esp_memprot_mem_type_to_str(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Converts Split line type to string
|
||||
*
|
||||
* @param line_type Split line type (see split_line_t enum)
|
||||
*/
|
||||
const char *esp_memprot_split_line_to_str(split_line_t line_type);
|
||||
|
||||
/**
|
||||
* @brief Converts PMS Area type to string
|
||||
*
|
||||
* @param area_type PMS Area type (see pms_area_t enum)
|
||||
*/
|
||||
const char *esp_memprot_pms_to_str(pms_area_t area_type);
|
||||
|
||||
/**
|
||||
* @brief Returns PMS splitting address for given Split line type
|
||||
*
|
||||
* The value is taken from PMS configuration registers (IRam0 range)
|
||||
* For details on split lines see 'esp_memprot_set_prot_int' function description
|
||||
*
|
||||
* @param line_type Split line type (see split_line_t enum)
|
||||
*
|
||||
* @return appropriate split line address
|
||||
*/
|
||||
uint32_t *esp_memprot_get_split_addr(split_line_t line_type);
|
||||
|
||||
/**
|
||||
* @brief Returns default main IRAM/DRAM splitting address
|
||||
*
|
||||
* The address value is given by _iram_text_end global (IRam0 range)
|
||||
|
||||
* @return Main I/D split line (IRam0_DRam0_Split_Addr)
|
||||
*/
|
||||
void *esp_memprot_get_default_main_split_addr(void);
|
||||
|
||||
/**
|
||||
* @brief Sets a lock for the main IRAM/DRAM splitting address
|
||||
*
|
||||
* Locks can be unlocked only by digital system reset
|
||||
*/
|
||||
void esp_memprot_set_split_line_lock(void);
|
||||
|
||||
/**
|
||||
* @brief Gets a lock status for the main IRAM/DRAM splitting address
|
||||
*
|
||||
* @return true/false (locked/unlocked)
|
||||
*/
|
||||
bool esp_memprot_get_split_line_lock(void);
|
||||
|
||||
/**
|
||||
* @brief Sets required split line address
|
||||
*
|
||||
* @param line_type Split line type (see split_line_t enum)
|
||||
* @param line_addr target address from a memory range relevant to given line_type (IRAM/DRAM)
|
||||
*/
|
||||
void esp_memprot_set_split_line(split_line_t line_type, const void *line_addr);
|
||||
|
||||
/**
|
||||
* @brief Sets a lock for PMS Area settings of required Memory type
|
||||
*
|
||||
* Locks can be unlocked only by digital system reset
|
||||
*
|
||||
* @param mem_type Memory protection type (see mem_type_prot_t enum)
|
||||
*/
|
||||
void esp_memprot_set_pms_lock(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Gets a lock status for PMS Area settings of required Memory type
|
||||
*
|
||||
* @param mem_type Memory protection type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return true/false (locked/unlocked)
|
||||
*/
|
||||
bool esp_memprot_get_pms_lock(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Sets permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
|
||||
*
|
||||
* @param area_type IRam0 PMS Area type (see pms_area_t enum)
|
||||
* @param r Read permission flag
|
||||
* @param w Write permission flag
|
||||
* @param x Execute permission flag
|
||||
*/
|
||||
void esp_memprot_iram_set_pms_area(pms_area_t area_type, bool r, bool w, bool x);
|
||||
|
||||
/**
|
||||
* @brief Gets current permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
|
||||
*
|
||||
* @param area_type IRam0 PMS Area type (see pms_area_t enum)
|
||||
* @param r Read permission flag holder
|
||||
* @param w Write permission flag holder
|
||||
* @param x Execute permission flag holder
|
||||
*/
|
||||
void esp_memprot_iram_get_pms_area(pms_area_t area_type, bool *r, bool *w, bool *x);
|
||||
|
||||
/**
|
||||
* @brief Sets permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
|
||||
*
|
||||
* @param area_type DRam0 PMS Area type (see pms_area_t enum)
|
||||
* @param r Read permission flag
|
||||
* @param w Write permission flag
|
||||
*/
|
||||
void esp_memprot_dram_set_pms_area(pms_area_t area_type, bool r, bool w);
|
||||
|
||||
/**
|
||||
* @brief Gets current permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
|
||||
*
|
||||
* @param area_type DRam0 PMS Area type (see pms_area_t enum)
|
||||
* @param r Read permission flag holder
|
||||
* @param w Write permission flag holder
|
||||
*/
|
||||
void esp_memprot_dram_get_pms_area(pms_area_t area_type, bool *r, bool *w);
|
||||
|
||||
/**
|
||||
* @brief Sets a lock for PMS interrupt monitor settings of required Memory type
|
||||
*
|
||||
* Locks can be unlocked only by digital system reset
|
||||
*
|
||||
* @param mem_type Memory protection type (see mem_type_prot_t enum)
|
||||
*/
|
||||
void esp_memprot_set_monitor_lock(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Gets a lock status for PMS interrupt monitor settings of required Memory type
|
||||
*
|
||||
* @param mem_type Memory protection type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return true/false (locked/unlocked)
|
||||
*/
|
||||
bool esp_memprot_get_monitor_lock(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Enable PMS violation interrupt monitoring of required Memory type
|
||||
*
|
||||
* @param mem_type Memory protection type (see mem_type_prot_t enum)
|
||||
* @param enable/disable
|
||||
*/
|
||||
void esp_memprot_set_monitor_en(mem_type_prot_t mem_type, bool enable);
|
||||
|
||||
/**
|
||||
* @brief Gets enable/disable status for PMS interrupt monitor settings of required Memory type
|
||||
*
|
||||
* @param mem_type Memory protection type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return true/false (enabled/disabled)
|
||||
*/
|
||||
bool esp_memprot_get_monitor_en(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Gets CPU ID for currently active PMS violation interrupt
|
||||
*
|
||||
* @return CPU ID (CPU_PRO for ESP32H2)
|
||||
*/
|
||||
int IRAM_ATTR esp_memprot_intr_get_cpuid(void);
|
||||
|
||||
/**
|
||||
* @brief Clears current interrupt ON flag for given Memory type
|
||||
*
|
||||
* Interrupt clearing happens in two steps:
|
||||
* 1. Interrupt CLR flag is set (to clear the interrupt ON status)
|
||||
* 2. Interrupt CLR flag is reset (to allow further monitoring)
|
||||
* This operation is non-atomic by PMS module design
|
||||
*
|
||||
* @param mem_type Memory protection type (see mem_type_prot_t enum)
|
||||
*/
|
||||
void IRAM_ATTR esp_memprot_monitor_clear_intr(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Returns active PMS violation interrupt (if any)
|
||||
*
|
||||
* This function iterates through supported Memory type status registers
|
||||
* and returns the first interrupt-on flag. If none is found active,
|
||||
* MEMPROT_NONE is returned.
|
||||
* Order of checking (in current version):
|
||||
* 1. MEMPROT_IRAM0_SRAM
|
||||
* 2. MEMPROT_DRAM0_SRAM
|
||||
*
|
||||
* @return mem_type Memory protection type related to active interrupt found (see mem_type_prot_t enum)
|
||||
*/
|
||||
mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
|
||||
|
||||
/**
|
||||
* @brief Checks whether any violation interrupt is active
|
||||
*
|
||||
* @return true/false (yes/no)
|
||||
*/
|
||||
bool IRAM_ATTR esp_memprot_is_locked_any(void);
|
||||
|
||||
/**
|
||||
* @brief Checks whether any violation interrupt is enabled
|
||||
*
|
||||
* @return true/false (yes/no)
|
||||
*/
|
||||
bool IRAM_ATTR esp_memprot_is_intr_ena_any(void);
|
||||
|
||||
/**
|
||||
* @brief Checks whether any violation interrupt is enabled
|
||||
*
|
||||
* @return true/false (yes/no)
|
||||
*/
|
||||
bool IRAM_ATTR esp_memprot_get_violate_intr_on(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Returns the address which caused the violation interrupt (if any)
|
||||
*
|
||||
* The address is taken from appropriate PMS violation status register, based given Memory type
|
||||
*
|
||||
* @param mem_type Memory protection type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return faulting address
|
||||
*/
|
||||
uint32_t IRAM_ATTR esp_memprot_get_violate_addr(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Returns the World identifier of the code causing the violation interrupt (if any)
|
||||
*
|
||||
* The value is taken from appropriate PMS violation status register, based given Memory type
|
||||
*
|
||||
* @param mem_type Memory protection type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return World identifier (see pms_world_t enum)
|
||||
*/
|
||||
pms_world_t IRAM_ATTR esp_memprot_get_violate_world(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Returns Read or Write operation type which caused the violation interrupt (if any)
|
||||
*
|
||||
* The value (bit) is taken from appropriate PMS violation status register, based given Memory type
|
||||
*
|
||||
* @param mem_type Memory protection type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return PMS operation type relevant to mem_type parameter (se pms_operation_type_t)
|
||||
*/
|
||||
pms_operation_type_t IRAM_ATTR esp_memprot_get_violate_wr(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Returns LoadStore flag of the operation type which caused the violation interrupt (if any)
|
||||
*
|
||||
* The value (bit) is taken from appropriate PMS violation status register, based given Memory type
|
||||
* Effective only on IRam0 access
|
||||
*
|
||||
* @param mem_type Memory protection type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return true/false (LoadStore bit on/off)
|
||||
*/
|
||||
bool IRAM_ATTR esp_memprot_get_violate_loadstore(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Returns byte-enables for the address which caused the violation interrupt (if any)
|
||||
*
|
||||
* The value is taken from appropriate PMS violation status register, based given Memory type
|
||||
*
|
||||
* @param mem_type Memory protection type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return byte-enables
|
||||
*/
|
||||
uint32_t IRAM_ATTR esp_memprot_get_violate_byte_en(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Returns raw contents of DRam0 status register 1
|
||||
*
|
||||
* @return 32-bit register value
|
||||
*/
|
||||
uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_1(void);
|
||||
|
||||
/**
|
||||
* @brief Returns raw contents of DRam0 status register 2
|
||||
*
|
||||
* @return 32-bit register value
|
||||
*/
|
||||
uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_2(void);
|
||||
|
||||
/**
|
||||
* @brief Returns raw contents of IRam0 status register
|
||||
*
|
||||
* @return 32-bit register value
|
||||
*/
|
||||
uint32_t IRAM_ATTR esp_memprot_get_iram_status_reg(void);
|
||||
|
||||
/**
|
||||
* @brief Register PMS violation interrupt in global interrupt matrix for given Memory type
|
||||
*
|
||||
* Memory protection components uses specific interrupt number, see ETS_MEMPROT_ERR_INUM
|
||||
* The registration makes the panic-handler routine being called when the interrupt appears
|
||||
*
|
||||
* @param mem_type Memory protection type (see mem_type_prot_t enum)
|
||||
*/
|
||||
void esp_memprot_set_intr_matrix(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Convenient routine for setting the PMS defaults
|
||||
*
|
||||
* Called on application startup, depending on CONFIG_ESP_SYSTEM_MEMPROT_FEATURE Kconfig settings
|
||||
* For implementation details see 'esp_memprot_set_prot_int' description
|
||||
*
|
||||
* @param invoke_panic_handler register all interrupts for panic handling (true/false)
|
||||
* @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
|
||||
* @param mem_type_mask 32-bit field of specific PMS parts to configure (see 'esp_memprot_set_prot_int')
|
||||
*/
|
||||
void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
|
||||
|
||||
/**
|
||||
* @brief Internal routine for setting the PMS defaults
|
||||
*
|
||||
* Called on application startup from within 'esp_memprot_set_prot'. Allows setting a specific splitting address
|
||||
* (main I/D split line) - see the parameter 'split_addr'. If the 'split_addr' equals to NULL, default I/D split line
|
||||
* is used (&_iram_text_end) and all the remaining lines share the same address.
|
||||
* The function sets all the split lines and PMS areas to the same space,
|
||||
* ie there is a single instruction space and single data space at the end.
|
||||
* The PMS split lines and permission areas scheme described below:
|
||||
*
|
||||
* DRam0/DMA IRam0
|
||||
* -----------------------------------------------
|
||||
* ... | IRam0_PMS_0 |
|
||||
* DRam0_PMS_0 ----------------------------------------------- IRam0_line1_Split_addr
|
||||
* ... | IRam0_PMS_1 |
|
||||
* ... ----------------------------------------------- IRam0_line0_Split_addr
|
||||
* | IRam0_PMS_2 |
|
||||
* =============================================== IRam0_DRam0_Split_addr (main I/D)
|
||||
* | DRam0_PMS_1 |
|
||||
* DRam0_DMA_line0_Split_addr ----------------------------------------------- ...
|
||||
* | DRam0_PMS_2 | ...
|
||||
* DRam0_DMA_line1_Split_addr ----------------------------------------------- IRam0_PMS_3
|
||||
* | DRam0_PMS_3 | ...
|
||||
* -----------------------------------------------
|
||||
*
|
||||
* Default settings provided by 'esp_memprot_set_prot_int' are as follows:
|
||||
*
|
||||
* DRam0/DMA IRam0
|
||||
* -----------------------------------------------
|
||||
* | IRam0_PMS_0 = IRam0_PMS_1 = IRam0_PMS_2 |
|
||||
* | DRam0_PMS_0 | IRam0_line1_Split_addr
|
||||
* DRam0_DMA_line0_Split_addr | | =
|
||||
* = =============================================== IRam0_line0_Split_addr
|
||||
* DRam0_DMA_line1_Split_addr | | =
|
||||
* | DRam0_PMS_1 = DRam0_PMS_2 = DRam0_PMS_3 | IRam0_DRam0_Split_addr (main I/D)
|
||||
* | IRam0_PMS_3 |
|
||||
* -----------------------------------------------
|
||||
*
|
||||
* Once the memprot feature is locked, it can be unlocked only by digital system reset
|
||||
*
|
||||
* @param invoke_panic_handler register all the violation interrupts for panic handling (true/false)
|
||||
* @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
|
||||
* @param split_addr specific main I/D adrees or NULL to use default ($_iram_text_end)
|
||||
* @param mem_type_mask 32-bit field of specific PMS parts to configure (members of mem_type_prot_t)
|
||||
*/
|
||||
void esp_memprot_set_prot_int(bool invoke_panic_handler, bool lock_feature, void *split_addr, uint32_t *mem_type_mask);
|
||||
|
||||
/**
|
||||
* @brief Returns raw contents of PMS interrupt monitor register for given Memory type
|
||||
*
|
||||
* @param mem_type Memory protection type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return 32-bit register value
|
||||
*/
|
||||
uint32_t esp_memprot_get_monitor_enable_reg(mem_type_prot_t mem_type);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@ -0,0 +1,40 @@
|
||||
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @file esp32h2/rtc.h
|
||||
*
|
||||
* This file contains declarations of rtc related functions.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Get current value of RTC counter in microseconds
|
||||
*
|
||||
* Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
|
||||
*
|
||||
* @return current value of RTC counter in microseconds
|
||||
*/
|
||||
uint64_t esp_rtc_get_time_us(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@ -15,6 +15,8 @@
|
||||
#ifndef _ESP_DPORT_ACCESS_H_
|
||||
#define _ESP_DPORT_ACCESS_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
@ -0,0 +1,42 @@
|
||||
// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#ifndef _ESP_DPORT_ACCESS_H_
|
||||
#define _ESP_DPORT_ACCESS_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Read a sequence of DPORT registers to the buffer.
|
||||
*
|
||||
* @param[out] buff_out Contains the read data.
|
||||
* @param[in] address Initial address for reading registers.
|
||||
* @param[in] num_words The number of words.
|
||||
*/
|
||||
void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
|
||||
|
||||
#define DPORT_STALL_OTHER_CPU_START()
|
||||
#define DPORT_STALL_OTHER_CPU_END()
|
||||
#define DPORT_INTERRUPT_DISABLE()
|
||||
#define DPORT_INTERRUPT_RESTORE()
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _ESP_DPORT_ACCESS_H_ */
|
||||
@ -0,0 +1,53 @@
|
||||
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* This API should be used by all components which use the SHA, AES, HMAC and DS crypto hardware on the ESP32S3.
|
||||
* Not all of them can be used in parallel because they use the same underlying module.
|
||||
* E.g., HMAC uses SHA or DS uses HMAC and AES. See the ESP32S3 Technical Reference Manual for more details.
|
||||
*
|
||||
* Other unrelated components must not use it.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Acquire lock for the SHA and AES cryptography peripheral.
|
||||
*
|
||||
*/
|
||||
void esp_crypto_sha_aes_lock_acquire(void);
|
||||
|
||||
/**
|
||||
* @brief Release lock for the SHA and AES cryptography peripheral.
|
||||
*
|
||||
*/
|
||||
void esp_crypto_sha_aes_lock_release(void);
|
||||
|
||||
/**
|
||||
* Acquire lock for the MPI/RSA cryptography peripheral
|
||||
*/
|
||||
void esp_crypto_mpi_lock_acquire(void);
|
||||
|
||||
/**
|
||||
* Release lock for the MPI/RSA cryptography peripheral
|
||||
*/
|
||||
void esp_crypto_mpi_lock_release(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@ -0,0 +1,492 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
|
||||
/* INTERNAL API
|
||||
* generic interface to MMU memory protection features
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include "esp_attr.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
MEMPROT_NONE = 0x00000000,
|
||||
MEMPROT_IRAM0_SRAM = 0x00000001,
|
||||
MEMPROT_DRAM0_SRAM = 0x00000002,
|
||||
MEMPROT_IRAM0_RTCFAST = 0x00000004,
|
||||
MEMPROT_DRAM0_RTCFAST = 0x00000008,
|
||||
MEMPROT_PERI1_RTCSLOW = 0x00000010,
|
||||
MEMPROT_PERI2_RTCSLOW_0 = 0x00000020,
|
||||
MEMPROT_PERI2_RTCSLOW_1 = 0x00000040,
|
||||
MEMPROT_ALL = 0xFFFFFFFF
|
||||
} mem_type_prot_t;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Returns splitting address for required memory region
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return Splitting address for the memory region required.
|
||||
* The address is given by region-specific global symbol exported from linker script,
|
||||
* it is not read out from related configuration register.
|
||||
*/
|
||||
uint32_t *IRAM_ATTR esp_memprot_get_split_addr(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Initializes illegal memory access control (MMU) for required memory section.
|
||||
*
|
||||
* All memory access interrupts share ETS_MEMACCESS_ERR_INUM input channel, it is caller's
|
||||
* responsibility to properly detect actual intr. source as well as possible prioritization in case
|
||||
* of multiple source reported during one intr.handling routine run
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
*/
|
||||
void esp_memprot_intr_init(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Enable/disable the memory protection interrupt
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param enable enable/disable
|
||||
*/
|
||||
void esp_memprot_intr_ena(mem_type_prot_t mem_type, bool enable);
|
||||
|
||||
/**
|
||||
* @brief Sets a request for clearing interrupt-on flag for specified memory region (register write)
|
||||
*
|
||||
* @note When called without actual interrupt-on flag set, subsequent occurrence of related interrupt is ignored.
|
||||
* Should be used only after the real interrupt appears, typically as the last step in interrupt handler's routine.
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
*/
|
||||
void esp_memprot_clear_intr(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Detects which memory protection interrupt is active
|
||||
*
|
||||
* @note Check order
|
||||
* MEMPROT_IRAM0_SRAM
|
||||
* MEMPROT_IRAM0_RTCFAST
|
||||
* MEMPROT_DRAM0_SRAM
|
||||
* MEMPROT_DRAM0_RTCFAST
|
||||
*
|
||||
* @return Memory protection area type (see mem_type_prot_t enum)
|
||||
*/
|
||||
mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
|
||||
|
||||
/**
|
||||
* @brief Gets interrupt status register contents for specified memory region
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return Contents of status register
|
||||
*/
|
||||
uint32_t esp_memprot_get_fault_reg(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Get details of given interrupt status
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param faulting_address Faulting address causing the interrupt [out]
|
||||
* @param op_type Operation being processed at the faulting address [out]
|
||||
* IRAM0: 0 - read, 1 - write
|
||||
* DRAM0: 0 - read, 1 - write
|
||||
* @param op_subtype Additional info for op_type [out]
|
||||
* IRAM0: 0 - instruction segment access, 1 - data segment access
|
||||
* DRAM0: 0 - non-atomic operation, 1 - atomic operation
|
||||
*/
|
||||
void IRAM_ATTR esp_memprot_get_fault_status(mem_type_prot_t mem_type, uint32_t **faulting_address, uint32_t *op_type, uint32_t *op_subtype);
|
||||
|
||||
/**
|
||||
* @brief Gets string representation of required memory region identifier
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return mem_type as string
|
||||
*/
|
||||
const char *IRAM_ATTR esp_memprot_type_to_str(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Detects whether any of the interrupt locks is active (requires digital system reset to unlock)
|
||||
*
|
||||
* @return true/false
|
||||
*/
|
||||
bool esp_memprot_is_locked_any(void);
|
||||
|
||||
/**
|
||||
* @brief Sets lock for specified memory region.
|
||||
*
|
||||
* Locks can be unlocked only by digital system reset
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
*/
|
||||
void esp_memprot_set_lock(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Gets lock status for required memory region
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return true/false (locked/unlocked)
|
||||
*/
|
||||
bool esp_memprot_get_lock(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Gets permission control configuration register contents for required memory region
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return Permission control register contents
|
||||
*/
|
||||
uint32_t esp_memprot_get_conf_reg(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Gets interrupt permission settings for unified management block
|
||||
*
|
||||
* Gets interrupt permission settings register contents for required memory region, returns settings for unified management blocks
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return Permission settings register contents
|
||||
*/
|
||||
uint32_t esp_memprot_get_perm_uni_reg(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Gets interrupt permission settings for split management block
|
||||
*
|
||||
* Gets interrupt permission settings register contents for required memory region, returns settings for split management blocks
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return Permission settings register contents
|
||||
*/
|
||||
uint32_t esp_memprot_get_perm_split_reg(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Detects whether any of the memory protection interrupts is enabled
|
||||
*
|
||||
* @return true/false
|
||||
*/
|
||||
bool esp_memprot_is_intr_ena_any(void);
|
||||
|
||||
/**
|
||||
* @brief Gets interrupt-enabled flag for given memory region
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return Interrupt-enabled value
|
||||
*/
|
||||
uint32_t esp_memprot_get_intr_ena_bit(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Gets interrupt-active flag for given memory region
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return Interrupt-active value
|
||||
*/
|
||||
uint32_t esp_memprot_get_intr_on_bit(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Gets interrupt-clear request flag for given memory region
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
*
|
||||
* @return Interrupt-clear request value
|
||||
*/
|
||||
uint32_t esp_memprot_get_intr_clr_bit(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Gets read permission value for specified block and memory region
|
||||
*
|
||||
* Returns read permission bit value for required unified-management block (0-3) in given memory region.
|
||||
* Applicable to all memory types.
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param block Memory block identifier (0-3)
|
||||
*
|
||||
* @return Read permission value for required block
|
||||
*/
|
||||
uint32_t esp_memprot_get_uni_block_read_bit(mem_type_prot_t mem_type, uint32_t block);
|
||||
|
||||
/**
|
||||
* @brief Gets write permission value for specified block and memory region
|
||||
*
|
||||
* Returns write permission bit value for required unified-management block (0-3) in given memory region.
|
||||
* Applicable to all memory types.
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param block Memory block identifier (0-3)
|
||||
*
|
||||
* @return Write permission value for required block
|
||||
*/
|
||||
uint32_t esp_memprot_get_uni_block_write_bit(mem_type_prot_t mem_type, uint32_t block);
|
||||
|
||||
/**
|
||||
* @brief Gets execute permission value for specified block and memory region
|
||||
*
|
||||
* Returns execute permission bit value for required unified-management block (0-3) in given memory region.
|
||||
* Applicable only to IRAM memory types
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param block Memory block identifier (0-3)
|
||||
*
|
||||
* @return Execute permission value for required block
|
||||
*/
|
||||
uint32_t esp_memprot_get_uni_block_exec_bit(mem_type_prot_t mem_type, uint32_t block);
|
||||
|
||||
/**
|
||||
* @brief Sets permissions for specified block in DRAM region
|
||||
*
|
||||
* Sets Read and Write permission for specified unified-management block (0-3) in given memory region.
|
||||
* Applicable only to DRAM memory types
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param block Memory block identifier (0-3)
|
||||
* @param write_perm Write permission flag
|
||||
* @param read_perm Read permission flag
|
||||
*/
|
||||
void esp_memprot_set_uni_block_perm_dram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm);
|
||||
|
||||
/**
|
||||
* @brief Sets permissions for high and low memory segment in DRAM region
|
||||
*
|
||||
* Sets Read and Write permission for both low and high memory segments given by splitting address.
|
||||
* The splitting address must be equal to or higher then beginning of block 5
|
||||
* Applicable only to DRAM memory types
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param split_addr Address to split the memory region to lower and higher segment
|
||||
* @param lw Low segment Write permission flag
|
||||
* @param lr Low segment Read permission flag
|
||||
* @param hw High segment Write permission flag
|
||||
* @param hr High segment Read permission flag
|
||||
*/
|
||||
void esp_memprot_set_prot_dram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
|
||||
|
||||
/**
|
||||
* @brief Sets permissions for specified block in IRAM region
|
||||
*
|
||||
* Sets Read, Write and Execute permission for specified unified-management block (0-3) in given memory region.
|
||||
* Applicable only to IRAM memory types
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param block Memory block identifier (0-3)
|
||||
* @param write_perm Write permission flag
|
||||
* @param exec_perm Execute permission flag
|
||||
*/
|
||||
void esp_memprot_set_uni_block_perm_iram(mem_type_prot_t mem_type, uint32_t block, bool write_perm, bool read_perm, bool exec_perm);
|
||||
|
||||
/**
|
||||
* @brief Sets permissions for high and low memory segment in IRAM region
|
||||
*
|
||||
* Sets Read, Write and Execute permission for both low and high memory segments given by splitting address.
|
||||
* The splitting address must be equal to or higher then beginning of block 5
|
||||
* Applicable only to IRAM memory types
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param split_addr Address to split the memory region to lower and higher segment
|
||||
* @param lw Low segment Write permission flag
|
||||
* @param lr Low segment Read permission flag
|
||||
* @param lx Low segment Execute permission flag
|
||||
* @param hw High segment Write permission flag
|
||||
* @param hr High segment Read permission flag
|
||||
* @param hx High segment Execute permission flag
|
||||
*/
|
||||
void esp_memprot_set_prot_iram(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
|
||||
|
||||
/**
|
||||
* @brief Activates memory protection for all supported memory region types
|
||||
*
|
||||
* @note The feature is disabled when JTAG interface is connected
|
||||
*
|
||||
* @param invoke_panic_handler map mem.prot interrupt to ETS_MEMACCESS_ERR_INUM and thus invokes panic handler when fired ('true' not suitable for testing)
|
||||
* @param lock_feature sets LOCK bit, see esp_memprot_set_lock() ('true' not suitable for testing)
|
||||
* @param mem_type_mask holds a set of required memory protection types (bitmask built of mem_type_prot_t). NULL means default (MEMPROT_ALL in this version)
|
||||
*/
|
||||
void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
|
||||
|
||||
/**
|
||||
* @brief Get permission settings bits for IRAM0 split mgmt. Only IRAM0 memory types allowed
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param lw Low segment Write permission flag
|
||||
* @param lr Low segment Read permission flag
|
||||
* @param lx Low segment Execute permission flag
|
||||
* @param hw High segment Write permission flag
|
||||
* @param hr High segment Read permission flag
|
||||
* @param hx High segment Execute permission flag
|
||||
*/
|
||||
void esp_memprot_get_perm_split_bits_iram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
|
||||
|
||||
/**
|
||||
* @brief Get permission settings bits for DRAM0 split mgmt. Only DRAM0 memory types allowed
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param lw Low segment Write permission flag
|
||||
* @param lr Low segment Read permission flag
|
||||
* @param hw High segment Write permission flag
|
||||
* @param hr High segment Read permission flag
|
||||
*/
|
||||
void esp_memprot_get_perm_split_bits_dram(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
|
||||
|
||||
/**
|
||||
* @brief Sets permissions for high and low memory segment in PERIBUS1 region
|
||||
*
|
||||
* Sets Read and Write permission for both low and high memory segments given by splitting address.
|
||||
* Applicable only to PERIBUS1 memory types
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param split_addr Address to split the memory region to lower and higher segment
|
||||
* @param lw Low segment Write permission flag
|
||||
* @param lr Low segment Read permission flag
|
||||
* @param hw High segment Write permission flag
|
||||
* @param hr High segment Read permission flag
|
||||
*/
|
||||
void esp_memprot_set_prot_peri1(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool hw, bool hr);
|
||||
|
||||
/**
|
||||
* @brief Get permission settings bits for PERIBUS1 split mgmt. Only PERIBUS1 memory types allowed
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param lw Low segment Write permission flag
|
||||
* @param lr Low segment Read permission flag
|
||||
* @param hw High segment Write permission flag
|
||||
* @param hr High segment Read permission flag
|
||||
*/
|
||||
void esp_memprot_get_perm_split_bits_peri1(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *hw, bool *hr);
|
||||
|
||||
/**
|
||||
* @brief Get permission settings bits for PERIBUS2 split mgmt. Only PERIBUS2 memory types allowed
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param lw Low segment Write permission flag
|
||||
* @param lr Low segment Read permission flag
|
||||
* @param lx Low segment Execute permission flag
|
||||
* @param hw High segment Write permission flag
|
||||
* @param hr High segment Read permission flag
|
||||
* @param hx High segment Execute permission flag
|
||||
*/
|
||||
void esp_memprot_get_perm_split_bits_peri2(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
|
||||
|
||||
/**
|
||||
* @brief Sets permissions for high and low memory segment in PERIBUS2 region
|
||||
*
|
||||
* Sets Read Write permission for both low and high memory segments given by splitting address.
|
||||
* Applicable only to PERIBUS2 memory types
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param split_addr Address to split the memory region to lower and higher segment
|
||||
* @param lw Low segment Write permission flag
|
||||
* @param lr Low segment Read permission flag
|
||||
* @param lx Low segment Execute permission flag
|
||||
* @param hw High segment Write permission flag
|
||||
* @param hr High segment Read permission flag
|
||||
* @param hx High segment Execute permission flag
|
||||
*/
|
||||
void esp_memprot_set_prot_peri2(mem_type_prot_t mem_type, uint32_t *split_addr, bool lw, bool lr, bool lx, bool hw, bool hr, bool hx);
|
||||
|
||||
/**
|
||||
* @brief Get permissions for specified memory type. Irrelevant bits are ignored
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param lw Low segment Write permission flag
|
||||
* @param lr Low segment Read permission flag
|
||||
* @param lx Low segment Execute permission flag
|
||||
* @param hw High segment Write permission flag
|
||||
* @param hr High segment Read permission flag
|
||||
* @param hx High segment Execute permission flag
|
||||
*/
|
||||
void esp_memprot_get_permissions(mem_type_prot_t mem_type, bool *lw, bool *lr, bool *lx, bool *hw, bool *hr, bool *hx);
|
||||
|
||||
/**
|
||||
* @brief Get Read permission settings for low and high regions of given memory type
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param lr Low segment Read permission flag
|
||||
* @param hr High segment Read permission flag
|
||||
*/
|
||||
void esp_memprot_get_perm_read(mem_type_prot_t mem_type, bool *lr, bool *hr);
|
||||
|
||||
/**
|
||||
* @brief Get Write permission settings for low and high regions of given memory type
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param lr Low segment Write permission flag
|
||||
* @param hr High segment Write permission flag
|
||||
*/
|
||||
void esp_memprot_get_perm_write(mem_type_prot_t mem_type, bool *lw, bool *hw);
|
||||
|
||||
/**
|
||||
* @brief Get Execute permission settings for low and high regions of given memory type
|
||||
* Applicable only to IBUS-compatible memory types
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param lr Low segment Exec permission flag
|
||||
* @param hr High segment Exec permission flag
|
||||
*/
|
||||
void esp_memprot_get_perm_exec(mem_type_prot_t mem_type, bool *lx, bool *hx);
|
||||
|
||||
/**
|
||||
* @brief Returns the lowest address in required memory region
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
*/
|
||||
uint32_t esp_memprot_get_low_limit(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Returns the highest address in required memory region
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
*/
|
||||
uint32_t esp_memprot_get_high_limit(mem_type_prot_t mem_type);
|
||||
|
||||
/**
|
||||
* @brief Sets READ permission bit for required memory region
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param lr Low segment Read permission flag
|
||||
* @param hr High segment Read permission flag
|
||||
*/
|
||||
void esp_memprot_set_read_perm(mem_type_prot_t mem_type, bool lr, bool hr);
|
||||
|
||||
/**
|
||||
* @brief Sets WRITE permission bit for required memory region
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param lr Low segment Write permission flag
|
||||
* @param hr High segment Write permission flag
|
||||
*/
|
||||
void esp_memprot_set_write_perm(mem_type_prot_t mem_type, bool lw, bool hw);
|
||||
|
||||
/**
|
||||
* @brief Sets EXECUTE permission bit for required memory region
|
||||
*
|
||||
* @param mem_type Memory protection area type (see mem_type_prot_t enum)
|
||||
* @param lr Low segment Exec permission flag
|
||||
* @param hr High segment Exec permission flag
|
||||
*/
|
||||
void esp_memprot_set_exec_perm(mem_type_prot_t mem_type, bool lx, bool hx);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@ -0,0 +1,39 @@
|
||||
// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#pragma once
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @file esp32s2/rtc.h
|
||||
*
|
||||
* This file contains declarations of rtc related functions.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Get current value of RTC counter in microseconds
|
||||
*
|
||||
* Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute
|
||||
*
|
||||
* @return current value of RTC counter in microseconds
|
||||
*/
|
||||
uint64_t esp_rtc_get_time_us(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@ -0,0 +1,146 @@
|
||||
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
|
||||
#ifndef __ESP_SPIRAM_H
|
||||
#define __ESP_SPIRAM_H
|
||||
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "esp_err.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Initialize spiram interface/hardware. Normally called from cpu_start.c.
|
||||
*
|
||||
* @return ESP_OK on success
|
||||
*/
|
||||
esp_err_t esp_spiram_init(void);
|
||||
|
||||
/**
|
||||
* @brief Configure Cache/MMU for access to external SPI RAM.
|
||||
*
|
||||
* Normally this function is called from cpu_start, if CONFIG_SPIRAM_BOOT_INIT
|
||||
* option is enabled. Applications which need to enable SPI RAM at run time
|
||||
* can disable CONFIG_SPIRAM_BOOT_INIT, and call this function later.
|
||||
*
|
||||
* @attention this function must be called with flash cache disabled.
|
||||
*/
|
||||
void esp_spiram_init_cache(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Memory test for SPI RAM. Should be called after SPI RAM is initialized and
|
||||
* (in case of a dual-core system) the app CPU is online. This test overwrites the
|
||||
* memory with crap, so do not call after e.g. the heap allocator has stored important
|
||||
* stuff in SPI RAM.
|
||||
*
|
||||
* @return true on success, false on failed memory test
|
||||
*/
|
||||
bool esp_spiram_test(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Add the initialized SPI RAM to the heap allocator.
|
||||
*/
|
||||
esp_err_t esp_spiram_add_to_heapalloc(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Get the size of the attached SPI RAM chip selected in menuconfig
|
||||
*
|
||||
* @return Size in bytes, or 0 if no external RAM chip support compiled in.
|
||||
*/
|
||||
size_t esp_spiram_get_size(void);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Force a writeback of the data in the SPI RAM cache. This is to be called whenever
|
||||
* cache is disabled, because disabling cache on the ESP32 discards the data in the SPI
|
||||
* RAM cache.
|
||||
*
|
||||
* This is meant for use from within the SPI flash code.
|
||||
*/
|
||||
void esp_spiram_writeback_cache(void);
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Reserve a pool of internal memory for specific DMA/internal allocations
|
||||
*
|
||||
* @param size Size of reserved pool in bytes
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK on success
|
||||
* - ESP_ERR_NO_MEM when no memory available for pool
|
||||
*/
|
||||
esp_err_t esp_spiram_reserve_dma_pool(size_t size);
|
||||
|
||||
#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS
|
||||
|
||||
extern int _instruction_reserved_start, _instruction_reserved_end;
|
||||
|
||||
/**
|
||||
* @brief Get the start page number of the instruction in SPI flash
|
||||
*
|
||||
* @return start page number
|
||||
*/
|
||||
uint32_t instruction_flash_start_page_get(void);
|
||||
/**
|
||||
* @brief Get the end page number of the instruction in SPI flash
|
||||
*
|
||||
* @return end page number
|
||||
*/
|
||||
uint32_t instruction_flash_end_page_get(void);
|
||||
/**
|
||||
* @brief Get the offset of instruction from SPI flash to SPI RAM
|
||||
*
|
||||
* @return instruction offset
|
||||
*/
|
||||
int instruction_flash2spiram_offset(void);
|
||||
#endif
|
||||
|
||||
#if CONFIG_SPIRAM_RODATA
|
||||
|
||||
extern int _rodata_reserved_start, _rodata_reserved_end;
|
||||
|
||||
/**
|
||||
* @brief Get the start page number of the rodata in SPI flash
|
||||
*
|
||||
* @return start page number
|
||||
*/
|
||||
uint32_t rodata_flash_start_page_get(void);
|
||||
/**
|
||||
* @brief Get the end page number of the rodata in SPI flash
|
||||
*
|
||||
* @return end page number
|
||||
*/
|
||||
uint32_t rodata_flash_end_page_get(void);
|
||||
/**
|
||||
* @brief Get the offset number of rodata from SPI flash to SPI RAM
|
||||
*
|
||||
* @return rodata offset
|
||||
*/
|
||||
int rodata_flash2spiram_offset(void);
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@ -18,7 +18,6 @@
|
||||
#include "sdkconfig.h"
|
||||
#include "soc/cpu.h"
|
||||
#include "hal/cpu_hal.h"
|
||||
#include "soc/soc_memory_layout.h"
|
||||
#include "soc/compare_set.h"
|
||||
|
||||
#if __XTENSA__
|
||||
|
||||
@ -0,0 +1,70 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _PSRAM_H
|
||||
#define _PSRAM_H
|
||||
#include "soc/spi_periph.h"
|
||||
#include "esp_err.h"
|
||||
#include "sdkconfig.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
PSRAM_CACHE_F80M_S40M = 0,
|
||||
PSRAM_CACHE_F40M_S40M,
|
||||
PSRAM_CACHE_F80M_S80M,
|
||||
PSRAM_CACHE_MAX,
|
||||
} psram_cache_mode_t;
|
||||
|
||||
typedef enum {
|
||||
PSRAM_SIZE_16MBITS = 0,
|
||||
PSRAM_SIZE_32MBITS = 1,
|
||||
PSRAM_SIZE_64MBITS = 2,
|
||||
PSRAM_SIZE_MAX,
|
||||
} psram_size_t;
|
||||
|
||||
/*
|
||||
See the TRM, chapter PID/MPU/MMU, header 'External RAM' for the definitions of these modes.
|
||||
|
||||
Important is that NORMAL works with the app CPU cache disabled, but gives huge cache coherency
|
||||
issues when both app and pro CPU are enabled. LOWHIGH and EVENODD do not have these coherency
|
||||
issues but cannot be used when the app CPU cache is disabled.
|
||||
*/
|
||||
|
||||
typedef enum {
|
||||
PSRAM_VADDR_MODE_NORMAL=0, ///< App and pro CPU use their own flash cache for external RAM access
|
||||
PSRAM_VADDR_MODE_LOWHIGH, ///< App and pro CPU share external RAM caches: pro CPU has low 2M, app CPU has high 2M
|
||||
PSRAM_VADDR_MODE_EVENODD, ///< App and pro CPU share external RAM caches: pro CPU does even 32yte ranges, app does odd ones.
|
||||
} psram_vaddr_mode_t;
|
||||
|
||||
/**
|
||||
* @brief get psram size
|
||||
* @return
|
||||
* - PSRAM_SIZE_MAX if psram not enabled or not valid
|
||||
* - PSRAM size
|
||||
*/
|
||||
psram_size_t psram_get_size(void);
|
||||
|
||||
/**
|
||||
* @brief psram cache enable function
|
||||
*
|
||||
* Esp-idf uses this to initialize cache for psram, mapping it into the main memory
|
||||
* address space.
|
||||
*
|
||||
* @param mode SPI mode to access psram in
|
||||
* @param vaddrmode Mode the psram cache works in.
|
||||
* @return ESP_OK on success, ESP_ERR_INVALID_STATE when VSPI peripheral is needed but cannot be claimed.
|
||||
*/
|
||||
esp_err_t psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vaddrmode);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@ -22,6 +22,7 @@
|
||||
|
||||
#include "soc/soc.h"
|
||||
#include "soc/rtc_cntl_reg.h"
|
||||
#include "soc/reset_reasons.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@ -98,6 +99,19 @@ typedef enum {
|
||||
RTCWDT_RTC_RESET = 16 /**<16, RTC Watch dog reset digital core and rtc module*/
|
||||
} RESET_REASON;
|
||||
|
||||
// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
|
||||
_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
|
||||
_Static_assert((soc_reset_reason_t)SW_RESET == RESET_REASON_CORE_SW, "SW_RESET != RESET_REASON_CORE_SW");
|
||||
_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
|
||||
_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
|
||||
_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
|
||||
_Static_assert((soc_reset_reason_t)TGWDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TGWDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
|
||||
_Static_assert((soc_reset_reason_t)SW_CPU_RESET == RESET_REASON_CPU0_SW, "SW_CPU_RESET != RESET_REASON_CPU0_SW");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
|
||||
|
||||
typedef enum {
|
||||
NO_SLEEP = 0,
|
||||
EXT_EVENT0_TRIG = BIT0,
|
||||
|
||||
@ -22,6 +22,7 @@
|
||||
|
||||
#include "soc/soc.h"
|
||||
#include "soc/rtc_cntl_reg.h"
|
||||
#include "soc/reset_reasons.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@ -99,6 +100,20 @@ typedef enum {
|
||||
SUPER_WDT_RESET = 18, /**<11, super watchdog reset digital core and rtc module*/
|
||||
} RESET_REASON;
|
||||
|
||||
// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
|
||||
_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
|
||||
_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
|
||||
_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
|
||||
_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
|
||||
_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
|
||||
_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
|
||||
_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
|
||||
_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
|
||||
|
||||
typedef enum {
|
||||
NO_SLEEP = 0,
|
||||
EXT_EVENT0_TRIG = BIT0,
|
||||
|
||||
@ -22,6 +22,7 @@
|
||||
|
||||
#include "soc/soc.h"
|
||||
#include "soc/rtc_cntl_reg.h"
|
||||
#include "soc/reset_reasons.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@ -99,6 +100,20 @@ typedef enum {
|
||||
SUPER_WDT_RESET = 18, /**<11, super watchdog reset digital core and rtc module*/
|
||||
} RESET_REASON;
|
||||
|
||||
// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
|
||||
_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
|
||||
_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
|
||||
_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
|
||||
_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
|
||||
_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
|
||||
_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
|
||||
_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
|
||||
_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
|
||||
|
||||
typedef enum {
|
||||
NO_SLEEP = 0,
|
||||
EXT_EVENT0_TRIG = BIT0,
|
||||
|
||||
@ -22,6 +22,7 @@
|
||||
|
||||
#include "soc/soc.h"
|
||||
#include "soc/rtc_cntl_reg.h"
|
||||
#include "soc/reset_reasons.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@ -98,6 +99,21 @@ typedef enum {
|
||||
GLITCH_RTC_RESET = 19, /**<19, glitch reset digital core and rtc module*/
|
||||
} RESET_REASON;
|
||||
|
||||
// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
|
||||
_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
|
||||
_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
|
||||
_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
|
||||
_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
|
||||
_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
|
||||
_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
|
||||
_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
|
||||
_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
|
||||
_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
|
||||
|
||||
typedef enum {
|
||||
NO_SLEEP = 0,
|
||||
EXT_EVENT0_TRIG = BIT0,
|
||||
|
||||
@ -17,6 +17,7 @@
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include "soc/rtc_cntl_reg.h"
|
||||
#include "soc/reset_reasons.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@ -93,6 +94,22 @@ typedef enum {
|
||||
EFUSE_RESET = 20, /**<20, efuse reset digital core*/
|
||||
} RESET_REASON;
|
||||
|
||||
// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
|
||||
_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
|
||||
_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
|
||||
_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
|
||||
_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
|
||||
_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
|
||||
_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
|
||||
_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
|
||||
_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
|
||||
_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
|
||||
_Static_assert((soc_reset_reason_t)EFUSE_RESET == RESET_REASON_CORE_EFUSE_CRC, "EFUSE_RESET != RESET_REASON_CORE_EFUSE_CRC");
|
||||
|
||||
typedef enum {
|
||||
NO_SLEEP = 0,
|
||||
EXT_EVENT0_TRIG = BIT0,
|
||||
|
||||
@ -14,12 +14,13 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
#include "soc/reset_reasons.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* @brief Print formated string to console device
|
||||
* @note float and long long data are not supported!
|
||||
@ -51,6 +52,14 @@ void esp_rom_install_channel_putc(int channel, void (*putc)(char c));
|
||||
*/
|
||||
void esp_rom_install_uart_printf(void);
|
||||
|
||||
/**
|
||||
* @brief Get reset reason of CPU
|
||||
*
|
||||
* @param cpu_no CPU number
|
||||
* @return Reset reason code (see in soc/reset_reasons.h)
|
||||
*/
|
||||
soc_reset_reason_t esp_rom_get_reset_reason(int cpu_no);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
35
tools/sdk/esp32/include/esp_system/include/eh_frame_parser.h
Normal file
35
tools/sdk/esp32/include/esp_system/include/eh_frame_parser.h
Normal file
@ -0,0 +1,35 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#ifndef EH_FRAME_PARSER_H
|
||||
#define EH_FRAME_PARSER_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Print backtrace for the given execution frame.
|
||||
*
|
||||
* @param frame_or Snapshot of the CPU registers when the program stopped its
|
||||
* normal execution. This frame is usually generated on the
|
||||
* stack when an exception or an interrupt occurs.
|
||||
*/
|
||||
void esp_eh_frame_print_backtrace(const void *frame_or);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@ -308,11 +308,22 @@ static inline void uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t comp
|
||||
void vPortYield( void );
|
||||
void vPortEvaluateYieldFromISR(int argc, ...);
|
||||
void _frxt_setup_switch( void );
|
||||
|
||||
/**
|
||||
* Macro to count number of arguments of a __VA_ARGS__ used to support portYIELD_FROM_ISR with,
|
||||
* or without arguments.
|
||||
* or without arguments. The macro counts only 0 or 1 arguments.
|
||||
*
|
||||
* In the future, we want to switch to C++20. We also want to become compatible with clang.
|
||||
* Hence, we provide two versions of the following macros which are using variadic arguments.
|
||||
* The first one is using the GNU extension ##__VA_ARGS__. The second one is using the C++20 feature __VA_OPT__(,).
|
||||
* This allows users to compile their code with standard C++20 enabled instead of the GNU extension.
|
||||
* Below C++20, we haven't found any good alternative to using ##__VA_ARGS__.
|
||||
*/
|
||||
#if defined(__cplusplus) && (__cplusplus > 201703L)
|
||||
#define portGET_ARGUMENT_COUNT(...) portGET_ARGUMENT_COUNT_INNER(0 __VA_OPT__(,) __VA_ARGS__,1,0)
|
||||
#else
|
||||
#define portGET_ARGUMENT_COUNT(...) portGET_ARGUMENT_COUNT_INNER(0, ##__VA_ARGS__,1,0)
|
||||
#endif
|
||||
#define portGET_ARGUMENT_COUNT_INNER(zero, one, count, ...) count
|
||||
|
||||
_Static_assert(portGET_ARGUMENT_COUNT() == 0, "portGET_ARGUMENT_COUNT() result does not match for 0 arguments");
|
||||
@ -325,7 +336,11 @@ _Static_assert(portGET_ARGUMENT_COUNT(1) == 1, "portGET_ARGUMENT_COUNT() result
|
||||
* it was developed to support both usages of portYIELD inside of an ISR. Any other usage form
|
||||
* might result in undesired behaviour
|
||||
*/
|
||||
#if defined(__cplusplus) && (__cplusplus > 201703L)
|
||||
#define portYIELD_FROM_ISR(...) vPortEvaluateYieldFromISR(portGET_ARGUMENT_COUNT(__VA_ARGS__) __VA_OPT__(,) __VA_ARGS__)
|
||||
#else
|
||||
#define portYIELD_FROM_ISR(...) vPortEvaluateYieldFromISR(portGET_ARGUMENT_COUNT(__VA_ARGS__), ##__VA_ARGS__)
|
||||
#endif
|
||||
|
||||
/* Yielding within an API call (when interrupts are off), means the yield should be delayed
|
||||
until interrupts are re-enabled.
|
||||
|
||||
@ -496,6 +496,16 @@ static inline void spi_ll_master_select_cs(spi_dev_t *hw, int cs_id)
|
||||
hw->pin.cs2_dis = (cs_id == 2) ? 0 : 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* Keep Chip Select activated after the current transaction.
|
||||
*
|
||||
* @param hw Beginning address of the peripheral registers.
|
||||
* @param keep_active if 0 don't keep CS activated, else keep CS activated
|
||||
*/
|
||||
static inline void spi_ll_master_keep_cs(spi_dev_t *hw, int keep_active) {
|
||||
hw->pin.cs_keep_active = (keep_active != 0) ? 1 : 0;
|
||||
}
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Configs: parameters
|
||||
*----------------------------------------------------------------------------*/
|
||||
@ -744,7 +754,7 @@ static inline void spi_ll_set_mosi_bitlen(spi_dev_t *hw, size_t bitlen)
|
||||
*/
|
||||
static inline void spi_ll_slave_set_rx_bitlen(spi_dev_t *hw, size_t bitlen)
|
||||
{
|
||||
hw->slv_wrbuf_dlen.bit_len = bitlen - 1;
|
||||
hw->slv_rdbuf_dlen.bit_len = bitlen - 1;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -755,7 +765,7 @@ static inline void spi_ll_slave_set_rx_bitlen(spi_dev_t *hw, size_t bitlen)
|
||||
*/
|
||||
static inline void spi_ll_slave_set_tx_bitlen(spi_dev_t *hw, size_t bitlen)
|
||||
{
|
||||
hw->slv_rdbuf_dlen.bit_len = bitlen - 1;
|
||||
hw->slv_wrbuf_dlen.bit_len = bitlen - 1;
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@ -133,7 +133,7 @@ typedef struct {
|
||||
- 2: 11 bit;
|
||||
- 3: 12 bit. */
|
||||
int8_t channel: 4; /*!< ADC channel index. */
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2
|
||||
uint8_t reserved: 2; /*!< reserved0 */
|
||||
uint8_t channel: 4; /*!< ADC channel index. */
|
||||
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
|
||||
@ -295,7 +295,7 @@ typedef struct {
|
||||
#endif
|
||||
} adc_digi_config_t;
|
||||
|
||||
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
|
||||
#if CONFIG_IDF_TARGET_ESP32S2
|
||||
/**
|
||||
* @brief ADC digital controller (DMA mode) interrupt type options.
|
||||
*/
|
||||
|
||||
@ -14,12 +14,12 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* @brief Type of DMA descriptor
|
||||
*
|
||||
@ -43,3 +43,7 @@ _Static_assert(sizeof(dma_descriptor_t) == 12, "dma_descriptor_t should occupy 1
|
||||
#define DMA_DESCRIPTOR_BUFFER_OWNER_CPU (0) /*!< DMA buffer is allowed to be accessed by CPU */
|
||||
#define DMA_DESCRIPTOR_BUFFER_OWNER_DMA (1) /*!< DMA buffer is allowed to be accessed by DMA engine */
|
||||
#define DMA_DESCRIPTOR_BUFFER_MAX_SIZE (4095) /*!< Maximum size of the buffer that can be attached to descriptor */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -24,8 +24,8 @@
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
EMAC_INTERFACE_MII, /*!< Media Independent Interface */
|
||||
EMAC_INTERFACE_RMII /*!< Reduced Media Independent Interface */
|
||||
EMAC_DATA_INTERFACE_RMII, /*!< Reduced Media Independent Interface */
|
||||
EMAC_DATA_INTERFACE_MII, /*!< Media Independent Interface */
|
||||
} eth_data_interface_t;
|
||||
|
||||
/**
|
||||
|
||||
@ -110,6 +110,16 @@ typedef struct {
|
||||
*/
|
||||
#define i2c_hal_slave_clr_rx_it(hal) i2c_ll_slave_clr_rx_it((hal)->dev)
|
||||
|
||||
/**
|
||||
* @brief Set the source clock. This function is meant to be used in
|
||||
* slave mode, in order to select a source clock abe to handle
|
||||
* the expected SCL frequency.
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param src_clk Source clock to use choosen from `i2c_sclk_t` type
|
||||
*/
|
||||
#define i2c_hal_set_source_clk(hal, src_clk) i2c_ll_set_source_clk((hal)->dev, src_clk)
|
||||
|
||||
/**
|
||||
* @brief Init the I2C master.
|
||||
*
|
||||
|
||||
@ -19,25 +19,26 @@
|
||||
/* Use enum from rom for backwards compatibility */
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
#include "esp32/rom/sha.h"
|
||||
typedef enum SHA_TYPE esp_sha_type;
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2
|
||||
#include "esp32s2/rom/sha.h"
|
||||
typedef SHA_TYPE esp_sha_type;
|
||||
#elif CONFIG_IDF_TARGET_ESP32S3
|
||||
#include "esp32s3/rom/sha.h"
|
||||
typedef SHA_TYPE esp_sha_type;
|
||||
#elif CONFIG_IDF_TARGET_ESP32C3
|
||||
#include "esp32c3/rom/sha.h"
|
||||
typedef SHA_TYPE esp_sha_type;
|
||||
#elif CONFIG_IDF_TARGET_ESP32H2
|
||||
#include "esp32h2/rom/sha.h"
|
||||
typedef SHA_TYPE esp_sha_type;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Use enum from rom for backwards compatibility */
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
typedef enum SHA_TYPE esp_sha_type;
|
||||
#else
|
||||
typedef SHA_TYPE esp_sha_type;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@ -25,7 +25,7 @@
|
||||
#include "hal/spi_flash_ll.h"
|
||||
#include "hal/spi_types.h"
|
||||
#include "hal/spi_flash_types.h"
|
||||
#include "soc/soc_memory_layout.h"
|
||||
#include "soc/soc_memory_types.h"
|
||||
|
||||
/* Hardware host-specific constants */
|
||||
#define SPI_FLASH_HAL_MAX_WRITE_BYTES 64
|
||||
|
||||
@ -101,6 +101,7 @@ typedef struct {
|
||||
uint8_t *send_buffer; ///< Data to be sent
|
||||
uint8_t *rcv_buffer; ///< Buffer to hold the receive data.
|
||||
spi_ll_io_mode_t io_mode; ///< IO mode of the master
|
||||
int cs_keep_active; ///< Keep CS active after transaction
|
||||
} spi_hal_trans_config_t;
|
||||
|
||||
/**
|
||||
|
||||
@ -61,9 +61,9 @@ extern "C" {
|
||||
* @note The available bit rates are dependent on the chip target and revision.
|
||||
*/
|
||||
#if (SOC_TWAI_BRP_MAX > 256)
|
||||
#define TWAI_TIMING_CONFIG_1KBITS() {.brp = 4000, .tseg_1 = 15, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
|
||||
#define TWAI_TIMING_CONFIG_5KBITS() {.brp = 800, .tseg_1 = 15, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
|
||||
#define TWAI_TIMING_CONFIG_10KBITS() {.brp = 400, .tseg_1 = 15, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
|
||||
#define TWAI_TIMING_CONFIG_1KBITS() {.brp = 4000, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
|
||||
#define TWAI_TIMING_CONFIG_5KBITS() {.brp = 800, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
|
||||
#define TWAI_TIMING_CONFIG_10KBITS() {.brp = 400, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
|
||||
#endif
|
||||
#if (SOC_TWAI_BRP_MAX > 128) || (CONFIG_ESP32_REV_MIN >= 2)
|
||||
#define TWAI_TIMING_CONFIG_12_5KBITS() {.brp = 256, .tseg_1 = 16, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
|
||||
|
||||
@ -124,6 +124,16 @@ typedef struct {
|
||||
*/
|
||||
#define uart_hal_is_tx_idle(hal) uart_ll_is_tx_idle((hal)->dev)
|
||||
|
||||
/**
|
||||
* @brief Configure the UART core reset
|
||||
*
|
||||
* @param hal Context of the HAL layer
|
||||
* @param Set true to enable the core reset, otherwise set it false
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
#define uart_hal_set_reset_core(hal, core_rst_en) uart_ll_set_reset_core((hal)->dev, core_rst_en)
|
||||
|
||||
/**
|
||||
* @brief Read data from the UART rxfifo
|
||||
*
|
||||
|
||||
113
tools/sdk/esp32/include/heap/include/heap_memory_layout.h
Normal file
113
tools/sdk/esp32/include/heap/include/heap_memory_layout.h
Normal file
@ -0,0 +1,113 @@
|
||||
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#pragma once
|
||||
#include <stdlib.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "sdkconfig.h"
|
||||
|
||||
#define SOC_MEMORY_TYPE_NO_PRIOS 3
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Type descriptor holds a description for a particular type of memory on a particular SoC.
|
||||
*/
|
||||
typedef struct {
|
||||
const char *name; ///< Name of this memory type
|
||||
uint32_t caps[SOC_MEMORY_TYPE_NO_PRIOS]; ///< Capabilities for this memory type (as a prioritised set)
|
||||
bool aliased_iram; ///< If true, this is data memory that is is also mapped in IRAM
|
||||
bool startup_stack; ///< If true, memory of this type is used for ROM stack during startup
|
||||
} soc_memory_type_desc_t;
|
||||
|
||||
/* Constant table of tag descriptors for all this SoC's tags */
|
||||
extern const soc_memory_type_desc_t soc_memory_types[];
|
||||
extern const size_t soc_memory_type_count;
|
||||
|
||||
/* Region descriptor holds a description for a particular region of memory on a particular SoC.
|
||||
*/
|
||||
typedef struct {
|
||||
intptr_t start; ///< Start address of the region
|
||||
size_t size; ///< Size of the region in bytes
|
||||
size_t type; ///< Type of the region (index into soc_memory_types array)
|
||||
intptr_t iram_address; ///< If non-zero, is equivalent address in IRAM
|
||||
} soc_memory_region_t;
|
||||
|
||||
extern const soc_memory_region_t soc_memory_regions[];
|
||||
extern const size_t soc_memory_region_count;
|
||||
|
||||
/* Region descriptor holds a description for a particular region of
|
||||
memory reserved on this SoC for a particular use (ie not available
|
||||
for stack/heap usage.) */
|
||||
typedef struct {
|
||||
intptr_t start;
|
||||
intptr_t end;
|
||||
} soc_reserved_region_t;
|
||||
|
||||
/* Use this macro to reserved a fixed region of RAM (hardcoded addresses)
|
||||
* for a particular purpose.
|
||||
*
|
||||
* Usually used to mark out memory addresses needed for hardware or ROM code
|
||||
* purposes.
|
||||
*
|
||||
* Don't call this macro from user code which can use normal C static allocation
|
||||
* instead.
|
||||
*
|
||||
* @param START Start address to be reserved.
|
||||
* @param END One after the address of the last byte to be reserved. (ie length of
|
||||
* the reserved region is (END - START) in bytes.
|
||||
* @param NAME Name for the reserved region. Must be a valid variable name,
|
||||
* unique to this source file.
|
||||
*/
|
||||
#define SOC_RESERVE_MEMORY_REGION(START, END, NAME) \
|
||||
__attribute__((section(".reserved_memory_address"))) __attribute__((used)) \
|
||||
static soc_reserved_region_t reserved_region_##NAME = { START, END };
|
||||
|
||||
/* Return available memory regions for this SoC. Each available memory
|
||||
* region is a contiguous piece of memory which is not being used by
|
||||
* static data, used by ROM code, or reserved by a component using
|
||||
* the SOC_RESERVE_MEMORY_REGION() macro.
|
||||
*
|
||||
* This result is soc_memory_regions[] minus all regions reserved
|
||||
* via the SOC_RESERVE_MEMORY_REGION() macro (which may also split
|
||||
* some regions up.)
|
||||
*
|
||||
* At startup, all available memory returned by this function is
|
||||
* registered as heap space.
|
||||
*
|
||||
* @note OS-level startup function only, not recommended to call from
|
||||
* app code.
|
||||
*
|
||||
* @param regions Pointer to an array for reading available regions into.
|
||||
* Size of the array should be at least the result of
|
||||
* soc_get_available_memory_region_max_count(). Entries in the array
|
||||
* will be ordered by memory address.
|
||||
*
|
||||
* @return Number of entries copied to 'regions'. Will be no greater than
|
||||
* the result of soc_get_available_memory_region_max_count().
|
||||
*/
|
||||
size_t soc_get_available_memory_regions(soc_memory_region_t *regions);
|
||||
|
||||
/* Return the maximum number of available memory regions which could be
|
||||
* returned by soc_get_available_memory_regions(). Used to size the
|
||||
* array passed to that function.
|
||||
*/
|
||||
size_t soc_get_available_memory_region_max_count(void);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
21
tools/sdk/esp32/include/heap/include/soc/soc_memory_layout.h
Normal file
21
tools/sdk/esp32/include/heap/include/soc/soc_memory_layout.h
Normal file
@ -0,0 +1,21 @@
|
||||
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
/**
|
||||
* Compatibility header file.
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
#include "heap_memory_layout.h"
|
||||
#include "soc/soc_memory_types.h"
|
||||
@ -98,7 +98,8 @@
|
||||
#endif
|
||||
|
||||
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
|
||||
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B 73500
|
||||
//Collect data and correct it later
|
||||
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B 0
|
||||
#endif
|
||||
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
|
||||
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B (261*1000)
|
||||
|
||||
367
tools/sdk/esp32/include/ieee802154/include/esp_ieee802154.h
Normal file
367
tools/sdk/esp32/include/ieee802154/include/esp_ieee802154.h
Normal file
@ -0,0 +1,367 @@
|
||||
// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "esp_err.h"
|
||||
#include "esp_ieee802154_types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Initialize the IEEE 802.15.4 subsystem.
|
||||
*
|
||||
*/
|
||||
void esp_ieee802154_enable(void);
|
||||
|
||||
/**
|
||||
* @brief Deinitialize the IEEE 802.15.4 subsystem.
|
||||
*
|
||||
*/
|
||||
void esp_ieee802154_disable(void);
|
||||
|
||||
/**
|
||||
* @brief Get the operational channel.
|
||||
*
|
||||
* @return The channel number (11~26).
|
||||
*
|
||||
*/
|
||||
uint8_t esp_ieee802154_get_channel(void);
|
||||
|
||||
/**
|
||||
* @brief Set the operational channel.
|
||||
*
|
||||
* @param[in] channel The channel number (11-26).
|
||||
*
|
||||
*/
|
||||
void esp_ieee802154_set_channnel(uint8_t channel);
|
||||
|
||||
/**
|
||||
* @brief Get the transmit power.
|
||||
*
|
||||
* @return The transmit power in dBm.
|
||||
*
|
||||
*/
|
||||
int8_t esp_ieee802154_get_txpower(void);
|
||||
|
||||
/**
|
||||
* @brief Set the transmit power.
|
||||
*
|
||||
* @param[in] power The transmit power in dBm.
|
||||
*
|
||||
*/
|
||||
void esp_ieee802154_set_txpower(int8_t power);
|
||||
|
||||
/**
|
||||
* @brief Get the promiscuous mode.
|
||||
*
|
||||
* @return
|
||||
* - True The promiscuous mode is enabled.
|
||||
* - False The promiscuous mode is disabled.
|
||||
*
|
||||
*/
|
||||
bool esp_ieee802154_get_promiscuous(void);
|
||||
|
||||
/**
|
||||
* @brief Set the promiscuous mode.
|
||||
*
|
||||
* @param[in] enable The promiscuous mode to be set.
|
||||
*
|
||||
*/
|
||||
void esp_ieee802154_set_promiscuous(bool enable);
|
||||
|
||||
/**
|
||||
* @brief Get the IEEE 802.15.4 Radio state.
|
||||
*
|
||||
* @return The IEEE 802.15.4 Radio state, refer to esp_ieee802154_state_t.
|
||||
*
|
||||
*/
|
||||
esp_ieee802154_state_t esp_ieee802154_get_state(void);
|
||||
|
||||
/**
|
||||
* @brief Set the IEEE 802.15.4 Radio to sleep state.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK on success.
|
||||
* - ESP_FAIL on failure due to invalid state.
|
||||
*
|
||||
*/
|
||||
esp_err_t esp_ieee802154_sleep(void);
|
||||
|
||||
/**
|
||||
* @brief Set the IEEE 802.15.4 Radio to receive state.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK on success
|
||||
* - ESP_FAIL on failure due to invalid state.
|
||||
*
|
||||
* Note: Radio will continue receiving until it receives a valid frame.
|
||||
* Ref to esp_ieee802154_receive_done().
|
||||
*
|
||||
*/
|
||||
esp_err_t esp_ieee802154_receive(void);
|
||||
|
||||
/**
|
||||
* @brief Transmit the given frame.
|
||||
*
|
||||
* @param[in] frame The pointer to the frame, the frame format:
|
||||
* |-----------------------------------------------------------------------|
|
||||
* | Len | MHR | MAC Payload | FCS |
|
||||
* |-----------------------------------------------------------------------|
|
||||
* @param[in] cca Perform CCA before transmission if it's true, otherwise transmit the frame directly.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK on success.
|
||||
* - ESP_FAIL on failure due to invalid state.
|
||||
*
|
||||
* Note: The transmit result will be reported via esp_ieee802154_transmit_done()
|
||||
* or esp_ieee802154_transmit_failed().
|
||||
*
|
||||
*/
|
||||
esp_err_t esp_ieee802154_transmit(const uint8_t *frame, bool cca);
|
||||
|
||||
/**
|
||||
* @brief Set the time to wait for the ack frame.
|
||||
*
|
||||
* @param[in] timeout The time to wait for the ack frame, in symbol unit (16 us).
|
||||
* Default: 0x006C, Range: 0x0000 - 0xFFFF.
|
||||
*
|
||||
*/
|
||||
void esp_ieee802154_set_ack_timeout(uint32_t timeout);
|
||||
|
||||
/**
|
||||
* @brief Get the device PAN ID.
|
||||
*
|
||||
* @return The device PAN ID.
|
||||
*
|
||||
*/
|
||||
uint16_t esp_ieee802154_get_panid(void);
|
||||
|
||||
/**
|
||||
* @brief Set the device PAN ID.
|
||||
*
|
||||
* @param[in] panid The device PAN ID.
|
||||
*
|
||||
*/
|
||||
void esp_ieee802154_set_panid(uint16_t panid);
|
||||
|
||||
/**
|
||||
* @brief Get the device short address.
|
||||
*
|
||||
* @return The device short address.
|
||||
*
|
||||
*/
|
||||
uint16_t esp_ieee802154_get_short_address(void);
|
||||
|
||||
/**
|
||||
* @brief Set the device short address.
|
||||
*
|
||||
* @param[in] short_address The device short address.
|
||||
*
|
||||
*/
|
||||
void esp_ieee802154_set_short_address(uint16_t short_address);
|
||||
|
||||
/**
|
||||
* @brief Get the device extended address.
|
||||
*
|
||||
* @param[out] ext_addr The pointer to the device extended address.
|
||||
*
|
||||
*/
|
||||
void esp_ieee802154_get_extended_address(uint8_t *ext_addr);
|
||||
|
||||
/**
|
||||
* @brief Set the device extended address.
|
||||
*
|
||||
* @param[in] ext_addr The pointer to the device extended address.
|
||||
*
|
||||
*/
|
||||
void esp_ieee802154_set_extended_address(const uint8_t *ext_addr);
|
||||
|
||||
/**
|
||||
* @brief Get the auto frame pending mode.
|
||||
*
|
||||
* @return The auto frame pending mode, refer to esp_ieee802154_pending_mode_t.
|
||||
*
|
||||
*/
|
||||
esp_ieee802154_pending_mode_t esp_ieee802154_get_pending_mode(void);
|
||||
|
||||
/**
|
||||
* @brief Set the auto frame pending mode.
|
||||
*
|
||||
* @param[in] pending_mode The auto frame pending mode, refer to esp_ieee802154_pending_mode_t.
|
||||
*
|
||||
*/
|
||||
void esp_ieee802154_set_pending_mode(esp_ieee802154_pending_mode_t pending_mode);
|
||||
|
||||
/**
|
||||
* @brief Add address to the source matching table.
|
||||
*
|
||||
* @param[in] addr The pointer to the address.
|
||||
* @param[in] is_short Short address or Extended address.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK on success.
|
||||
* - ESP_ERR_NO_MEM if the pending table is full.
|
||||
*
|
||||
*/
|
||||
esp_err_t esp_ieee802154_add_pending_addr(const uint8_t *addr, bool is_short);
|
||||
|
||||
/**
|
||||
* @brief Remove address from the source matching table.
|
||||
*
|
||||
* @param[in] addr The pointer to the address.
|
||||
* @param[in] is_short Short address or Extended address.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK on success.
|
||||
* - ESP_ERR_NOT_FOUND if the address was not found from the source matching table.
|
||||
*
|
||||
*/
|
||||
esp_err_t esp_ieee802154_clear_pending_addr(const uint8_t *addr, bool is_short);
|
||||
|
||||
/**
|
||||
* @brief Clear the source matching table to empty.
|
||||
*
|
||||
* @param[in] is_short Clear Short address table or Extended address table.
|
||||
*
|
||||
*/
|
||||
void esp_ieee802154_reset_pending_table(bool is_short);
|
||||
|
||||
/**
|
||||
* @brief Get the CCA threshold.
|
||||
*
|
||||
* @return The CCA threshold in dBm.
|
||||
*
|
||||
*/
|
||||
int8_t esp_ieee802154_get_cca_threshold(void);
|
||||
|
||||
/**
|
||||
* @brief Set the CCA threshold.
|
||||
*
|
||||
* @param[in] cca_threshold The CCA threshold in dBm.
|
||||
*
|
||||
*/
|
||||
void esp_ieee802154_set_cca_threshold(int8_t cca_threshold);
|
||||
|
||||
/**
|
||||
* @brief Get the CCA mode.
|
||||
*
|
||||
* @return The CCA mode, refer to esp_ieee802154_cca_mode_t.
|
||||
*
|
||||
*/
|
||||
esp_ieee802154_cca_mode_t esp_ieee802154_get_cca_mode(void);
|
||||
|
||||
/**
|
||||
* @brief Set the CCA mode.
|
||||
*
|
||||
* @param[in] cca_mode The CCA mode, refer to esp_ieee802154_cca_mode_t.
|
||||
*
|
||||
*/
|
||||
void esp_ieee802154_set_cca_mode(esp_ieee802154_cca_mode_t cca_mode);
|
||||
|
||||
/**
|
||||
* @brief Enable rx_on_when_idle mode, radio will receive during idle.
|
||||
*
|
||||
* @param[in] enable Enable/Disable rx_on_when_idle mode.
|
||||
*
|
||||
*/
|
||||
void esp_ieee802154_set_rx_when_idle(bool enable);
|
||||
|
||||
/**
|
||||
* @brief Get the rx_on_when_idle mode.
|
||||
*
|
||||
* @return rx_on_when_idle mode.
|
||||
*
|
||||
*/
|
||||
bool esp_ieee802154_get_rx_when_idle(void);
|
||||
|
||||
/**
|
||||
* @brief Perform energy detection.
|
||||
*
|
||||
* @param[in] duration The duration of energy detection, in symbol unit (16 us).
|
||||
* The result will be reported via esp_ieee802154_energy_detect_done().
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK on success.
|
||||
* - ESP_FAIL on failure due to invalid state.
|
||||
*
|
||||
*/
|
||||
esp_err_t esp_ieee802154_energy_detect(uint32_t duration);
|
||||
|
||||
|
||||
/** Below are the events generated by IEEE 802.15.4 subsystem, which are in ISR context **/
|
||||
/**
|
||||
* @brief A Frame was received.
|
||||
*
|
||||
* @param[in] frame The point to the received frame, frame format:
|
||||
* |-----------------------------------------------------------------------|
|
||||
* | Len | MHR | MAC Payload (no FCS) |
|
||||
* |-----------------------------------------------------------------------|
|
||||
* @param[in] frame_info More information of the received frame, refer to esp_ieee802154_frame_info_t.
|
||||
*
|
||||
*/
|
||||
extern void esp_ieee802154_receive_done(uint8_t *frame, esp_ieee802154_frame_info_t *frame_info);
|
||||
|
||||
/**
|
||||
* @brief The SFD field of the frame was received.
|
||||
*
|
||||
*/
|
||||
extern void esp_ieee802154_receive_sfd_done(void);
|
||||
|
||||
/**
|
||||
* @brief The Frame Transmission succeeded.
|
||||
*
|
||||
* @param[in] frame The pointer to the transmitted frame.
|
||||
* @param[in] ack The received ACK frame, it could be NULL if the transmitted frame's AR bit is not set.
|
||||
* @param[in] ack_frame_info More information of the ACK frame, refer to esp_ieee802154_frame_info_t.
|
||||
*
|
||||
* Note: refer to esp_ieee802154_transmit().
|
||||
*
|
||||
*/
|
||||
extern void esp_ieee802154_transmit_done(const uint8_t *frame, const uint8_t *ack, esp_ieee802154_frame_info_t *ack_frame_info);
|
||||
|
||||
/**
|
||||
* @brief The Frame Transmission failed.
|
||||
*
|
||||
* @param[in] frame The pointer to the frame.
|
||||
* @param[in] error The transmission failure reason, refer to esp_ieee802154_tx_error_t.
|
||||
*
|
||||
* Note: refer to esp_ieee802154_transmit().
|
||||
*
|
||||
*/
|
||||
extern void esp_ieee802154_transmit_failed(const uint8_t *frame, esp_ieee802154_tx_error_t error);
|
||||
|
||||
/**
|
||||
* @brief The SFD field of the frame was transmitted.
|
||||
*
|
||||
*/
|
||||
extern void esp_ieee802154_transmit_sfd_done(uint8_t *frame);
|
||||
|
||||
/**
|
||||
* @brief The energy detection done.
|
||||
*
|
||||
* @param[in] power The detected power level, in dBm.
|
||||
*
|
||||
* Note: refer to esp_ieee802154_energy_detect().
|
||||
*
|
||||
*/
|
||||
extern void esp_ieee802154_energy_detect_done(int8_t power);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@ -0,0 +1,79 @@
|
||||
// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief The radio state types.
|
||||
*/
|
||||
typedef enum {
|
||||
ESP_IEEE802154_RADIO_DISABLE, /*!< Radio not up */
|
||||
ESP_IEEE802154_RADIO_SLEEP, /*!< Radio in the sleep state */
|
||||
ESP_IEEE802154_RADIO_RECEIVE, /*!< Radio in the receive state */
|
||||
ESP_IEEE802154_RADIO_TRANSMIT, /*!< Radio in the transmit state */
|
||||
} esp_ieee802154_state_t;
|
||||
|
||||
/**
|
||||
* @brief The transmit error types.
|
||||
*/
|
||||
typedef enum {
|
||||
ESP_IEEE802154_TX_ERR_NONE, /*!< No transmit error */
|
||||
ESP_IEEE802154_TX_ERR_CCA_BUSY, /*!< Channel is busy */
|
||||
ESP_IEEE802154_TX_ERR_ABORT, /*!< Transmit abort */
|
||||
ESP_IEEE802154_TX_ERR_NO_ACK, /*!< No Ack frame received until timeout */
|
||||
ESP_IEEE802154_TX_ERR_INVALID_ACK, /*!< Invalid Ack frame */
|
||||
ESP_IEEE802154_TX_ERR_COEXIST, /*!< Rejected by coexist system */
|
||||
} esp_ieee802154_tx_error_t;
|
||||
|
||||
/**
|
||||
* @brief The CCA mode types.
|
||||
*/
|
||||
typedef enum {
|
||||
ESP_IEEE802154_CCA_MODE_CARRIER, /*!< Carrier only */
|
||||
ESP_IEEE802154_CCA_MODE_ED, /*!< Energy Detect only */
|
||||
ESP_IEEE802154_CCA_MODE_CARRIER_OR_ED, /*!< Carrier or Energy Detect */
|
||||
ESP_IEEE802154_CCA_MODE_CARRIER_AND_ED, /*!< Carrier and Energy Detect */
|
||||
} esp_ieee802154_cca_mode_t;
|
||||
|
||||
/**
|
||||
* @brief The frame pending mode types.
|
||||
*/
|
||||
typedef enum {
|
||||
ESP_IEEE802154_AUTO_PENDING_DISABLE, /*!< Frame pending bit always set to 1 in the ack to Data Request */
|
||||
ESP_IEEE802154_AUTO_PENDING_ENABLE, /*!< Frame pending bit set to 1 if src address matches, in the ack to Data Request */
|
||||
ESP_IEEE802154_AUTO_PENDING_ENHANCED, /*!< Frame pending bit set to 1 if src address matches, in all ack frames */
|
||||
} esp_ieee802154_pending_mode_t;
|
||||
|
||||
/**
|
||||
* @brief The information of received 15.4 frame.
|
||||
*
|
||||
*/
|
||||
typedef struct {
|
||||
bool pending; /*!< The frame was acked with frame pending set */
|
||||
uint8_t channel; /*!< Channel */
|
||||
int8_t rssi; /*!< RSSI */
|
||||
uint8_t lqi; /*!< LQI */
|
||||
uint64_t timestamp; /*!< The timestamp when the frame's SFD field was received */
|
||||
} esp_ieee802154_frame_info_t;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@ -295,6 +295,26 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
|
||||
/** @endcond */
|
||||
|
||||
/// macro to output logs in startup code, before heap allocator and syscalls have been initialized. log at ``ESP_LOG_ERROR`` level. @see ``printf``,``ESP_LOGE``,``ESP_DRAM_LOGE``
|
||||
#define portGET_ARGUMENT_COUNT_INNER(zero, one, count, ...) count
|
||||
|
||||
/**
|
||||
* In the future, we want to switch to C++20. We also want to become compatible with clang.
|
||||
* Hence, we provide two versions of the following macros which are using variadic arguments.
|
||||
* The first one is using the GNU extension \#\#__VA_ARGS__. The second one is using the C++20 feature __VA_OPT__(,).
|
||||
* This allows users to compile their code with standard C++20 enabled instead of the GNU extension.
|
||||
* Below C++20, we haven't found any good alternative to using \#\#__VA_ARGS__.
|
||||
*/
|
||||
#if defined(__cplusplus) && (__cplusplus > 201703L)
|
||||
#define ESP_EARLY_LOGE( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_ERROR, E __VA_OPT__(,) __VA_ARGS__)
|
||||
/// macro to output logs in startup code at ``ESP_LOG_WARN`` level. @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
|
||||
#define ESP_EARLY_LOGW( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_WARN, W __VA_OPT__(,) __VA_ARGS__)
|
||||
/// macro to output logs in startup code at ``ESP_LOG_INFO`` level. @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
|
||||
#define ESP_EARLY_LOGI( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_INFO, I __VA_OPT__(,) __VA_ARGS__)
|
||||
/// macro to output logs in startup code at ``ESP_LOG_DEBUG`` level. @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
|
||||
#define ESP_EARLY_LOGD( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_DEBUG, D __VA_OPT__(,) __VA_ARGS__)
|
||||
/// macro to output logs in startup code at ``ESP_LOG_VERBOSE`` level. @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
|
||||
#define ESP_EARLY_LOGV( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_VERBOSE, V __VA_OPT__(,) __VA_ARGS__)
|
||||
#else // !(defined(__cplusplus) && (__cplusplus > 201703L))
|
||||
#define ESP_EARLY_LOGE( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_ERROR, E, ##__VA_ARGS__)
|
||||
/// macro to output logs in startup code at ``ESP_LOG_WARN`` level. @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
|
||||
#define ESP_EARLY_LOGW( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_WARN, W, ##__VA_ARGS__)
|
||||
@ -304,6 +324,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
|
||||
#define ESP_EARLY_LOGD( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_DEBUG, D, ##__VA_ARGS__)
|
||||
/// macro to output logs in startup code at ``ESP_LOG_VERBOSE`` level. @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
|
||||
#define ESP_EARLY_LOGV( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_VERBOSE, V, ##__VA_ARGS__)
|
||||
#endif // !(defined(__cplusplus) && (__cplusplus > 201703L))
|
||||
|
||||
#ifdef BOOTLOADER_BUILD
|
||||
#define _ESP_LOG_EARLY_ENABLED(log_level) (LOG_LOCAL_LEVEL >= (log_level))
|
||||
@ -319,12 +340,21 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
|
||||
}} while(0)
|
||||
|
||||
#ifndef BOOTLOADER_BUILD
|
||||
#if defined(__cplusplus) && (__cplusplus > 201703L)
|
||||
#define ESP_LOGE( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_ERROR, tag, format __VA_OPT__(,) __VA_ARGS__)
|
||||
#define ESP_LOGW( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_WARN, tag, format __VA_OPT__(,) __VA_ARGS__)
|
||||
#define ESP_LOGI( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_INFO, tag, format __VA_OPT__(,) __VA_ARGS__)
|
||||
#define ESP_LOGD( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_DEBUG, tag, format __VA_OPT__(,) __VA_ARGS__)
|
||||
#define ESP_LOGV( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_VERBOSE, tag, format __VA_OPT__(,) __VA_ARGS__)
|
||||
#else // !(defined(__cplusplus) && (__cplusplus > 201703L))
|
||||
#define ESP_LOGE( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_ERROR, tag, format, ##__VA_ARGS__)
|
||||
#define ESP_LOGW( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_WARN, tag, format, ##__VA_ARGS__)
|
||||
#define ESP_LOGI( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_INFO, tag, format, ##__VA_ARGS__)
|
||||
#define ESP_LOGD( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_DEBUG, tag, format, ##__VA_ARGS__)
|
||||
#define ESP_LOGV( tag, format, ... ) ESP_LOG_LEVEL_LOCAL(ESP_LOG_VERBOSE, tag, format, ##__VA_ARGS__)
|
||||
#endif // !(defined(__cplusplus) && (__cplusplus > 201703L))
|
||||
#else
|
||||
|
||||
/**
|
||||
* Macro to output logs at ESP_LOG_ERROR level.
|
||||
*
|
||||
@ -334,6 +364,17 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
|
||||
*
|
||||
* @see ``printf``
|
||||
*/
|
||||
#if defined(__cplusplus) && (__cplusplus > 201703L)
|
||||
#define ESP_LOGE( tag, format, ... ) ESP_EARLY_LOGE(tag, format __VA_OPT__(,) __VA_ARGS__)
|
||||
/// macro to output logs at ``ESP_LOG_WARN`` level. @see ``ESP_LOGE``
|
||||
#define ESP_LOGW( tag, format, ... ) ESP_EARLY_LOGW(tag, format __VA_OPT__(,) __VA_ARGS__)
|
||||
/// macro to output logs at ``ESP_LOG_INFO`` level. @see ``ESP_LOGE``
|
||||
#define ESP_LOGI( tag, format, ... ) ESP_EARLY_LOGI(tag, format __VA_OPT__(,) __VA_ARGS__)
|
||||
/// macro to output logs at ``ESP_LOG_DEBUG`` level. @see ``ESP_LOGE``
|
||||
#define ESP_LOGD( tag, format, ... ) ESP_EARLY_LOGD(tag, format __VA_OPT__(,) __VA_ARGS__)
|
||||
/// macro to output logs at ``ESP_LOG_VERBOSE`` level. @see ``ESP_LOGE``
|
||||
#define ESP_LOGV( tag, format, ... ) ESP_EARLY_LOGV(tag, format __VA_OPT__(,) __VA_ARGS__)
|
||||
#else // !(defined(__cplusplus) && (__cplusplus > 201703L))
|
||||
#define ESP_LOGE( tag, format, ... ) ESP_EARLY_LOGE(tag, format, ##__VA_ARGS__)
|
||||
/// macro to output logs at ``ESP_LOG_WARN`` level. @see ``ESP_LOGE``
|
||||
#define ESP_LOGW( tag, format, ... ) ESP_EARLY_LOGW(tag, format, ##__VA_ARGS__)
|
||||
@ -343,6 +384,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
|
||||
#define ESP_LOGD( tag, format, ... ) ESP_EARLY_LOGD(tag, format, ##__VA_ARGS__)
|
||||
/// macro to output logs at ``ESP_LOG_VERBOSE`` level. @see ``ESP_LOGE``
|
||||
#define ESP_LOGV( tag, format, ... ) ESP_EARLY_LOGV(tag, format, ##__VA_ARGS__)
|
||||
#endif // !(defined(__cplusplus) && (__cplusplus > 201703L))
|
||||
#endif // BOOTLOADER_BUILD
|
||||
|
||||
/** runtime macro to output logs at a specified level.
|
||||
@ -354,6 +396,25 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
|
||||
*
|
||||
* @see ``printf``
|
||||
*/
|
||||
#if defined(__cplusplus) && (__cplusplus > 201703L)
|
||||
#if CONFIG_LOG_TIMESTAMP_SOURCE_RTOS
|
||||
#define ESP_LOG_LEVEL(level, tag, format, ...) do { \
|
||||
if (level==ESP_LOG_ERROR ) { esp_log_write(ESP_LOG_ERROR, tag, LOG_FORMAT(E, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
|
||||
else if (level==ESP_LOG_WARN ) { esp_log_write(ESP_LOG_WARN, tag, LOG_FORMAT(W, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
|
||||
else if (level==ESP_LOG_DEBUG ) { esp_log_write(ESP_LOG_DEBUG, tag, LOG_FORMAT(D, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
|
||||
else if (level==ESP_LOG_VERBOSE ) { esp_log_write(ESP_LOG_VERBOSE, tag, LOG_FORMAT(V, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
|
||||
else { esp_log_write(ESP_LOG_INFO, tag, LOG_FORMAT(I, format), esp_log_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
|
||||
} while(0)
|
||||
#elif CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM
|
||||
#define ESP_LOG_LEVEL(level, tag, format, ...) do { \
|
||||
if (level==ESP_LOG_ERROR ) { esp_log_write(ESP_LOG_ERROR, tag, LOG_SYSTEM_TIME_FORMAT(E, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
|
||||
else if (level==ESP_LOG_WARN ) { esp_log_write(ESP_LOG_WARN, tag, LOG_SYSTEM_TIME_FORMAT(W, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
|
||||
else if (level==ESP_LOG_DEBUG ) { esp_log_write(ESP_LOG_DEBUG, tag, LOG_SYSTEM_TIME_FORMAT(D, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
|
||||
else if (level==ESP_LOG_VERBOSE ) { esp_log_write(ESP_LOG_VERBOSE, tag, LOG_SYSTEM_TIME_FORMAT(V, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
|
||||
else { esp_log_write(ESP_LOG_INFO, tag, LOG_SYSTEM_TIME_FORMAT(I, format), esp_log_system_timestamp(), tag __VA_OPT__(,) __VA_ARGS__); } \
|
||||
} while(0)
|
||||
#endif //CONFIG_LOG_TIMESTAMP_SOURCE_xxx
|
||||
#else // !(defined(__cplusplus) && (__cplusplus > 201703L))
|
||||
#if CONFIG_LOG_TIMESTAMP_SOURCE_RTOS
|
||||
#define ESP_LOG_LEVEL(level, tag, format, ...) do { \
|
||||
if (level==ESP_LOG_ERROR ) { esp_log_write(ESP_LOG_ERROR, tag, LOG_FORMAT(E, format), esp_log_timestamp(), tag, ##__VA_ARGS__); } \
|
||||
@ -371,6 +432,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
|
||||
else { esp_log_write(ESP_LOG_INFO, tag, LOG_SYSTEM_TIME_FORMAT(I, format), esp_log_system_timestamp(), tag, ##__VA_ARGS__); } \
|
||||
} while(0)
|
||||
#endif //CONFIG_LOG_TIMESTAMP_SOURCE_xxx
|
||||
#endif // !(defined(__cplusplus) && (__cplusplus > 201703L))
|
||||
|
||||
/** runtime macro to output logs at a specified level. Also check the level with ``LOG_LOCAL_LEVEL``.
|
||||
*
|
||||
@ -397,6 +459,17 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
|
||||
*
|
||||
* @see ``esp_rom_printf``,``ESP_LOGE``
|
||||
*/
|
||||
#if defined(__cplusplus) && (__cplusplus > 201703L)
|
||||
#define ESP_DRAM_LOGE( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_ERROR, E __VA_OPT__(,) __VA_ARGS__)
|
||||
/// macro to output logs when the cache is disabled at ``ESP_LOG_WARN`` level. @see ``ESP_DRAM_LOGW``,``ESP_LOGW``, ``esp_rom_printf``
|
||||
#define ESP_DRAM_LOGW( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_WARN, W __VA_OPT__(,) __VA_ARGS__)
|
||||
/// macro to output logs when the cache is disabled at ``ESP_LOG_INFO`` level. @see ``ESP_DRAM_LOGI``,``ESP_LOGI``, ``esp_rom_printf``
|
||||
#define ESP_DRAM_LOGI( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_INFO, I __VA_OPT__(,) __VA_ARGS__)
|
||||
/// macro to output logs when the cache is disabled at ``ESP_LOG_DEBUG`` level. @see ``ESP_DRAM_LOGD``,``ESP_LOGD``, ``esp_rom_printf``
|
||||
#define ESP_DRAM_LOGD( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_DEBUG, D __VA_OPT__(,) __VA_ARGS__)
|
||||
/// macro to output logs when the cache is disabled at ``ESP_LOG_VERBOSE`` level. @see ``ESP_DRAM_LOGV``,``ESP_LOGV``, ``esp_rom_printf``
|
||||
#define ESP_DRAM_LOGV( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_VERBOSE, V __VA_OPT__(,) __VA_ARGS__)
|
||||
#else // !(defined(__cplusplus) && (__cplusplus > 201703L))
|
||||
#define ESP_DRAM_LOGE( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_ERROR, E, ##__VA_ARGS__)
|
||||
/// macro to output logs when the cache is disabled at ``ESP_LOG_WARN`` level. @see ``ESP_DRAM_LOGW``,``ESP_LOGW``, ``esp_rom_printf``
|
||||
#define ESP_DRAM_LOGW( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_WARN, W, ##__VA_ARGS__)
|
||||
@ -406,14 +479,22 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
|
||||
#define ESP_DRAM_LOGD( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_DEBUG, D, ##__VA_ARGS__)
|
||||
/// macro to output logs when the cache is disabled at ``ESP_LOG_VERBOSE`` level. @see ``ESP_DRAM_LOGV``,``ESP_LOGV``, ``esp_rom_printf``
|
||||
#define ESP_DRAM_LOGV( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_VERBOSE, V, ##__VA_ARGS__)
|
||||
#endif // !(defined(__cplusplus) && (__cplusplus > 201703L))
|
||||
|
||||
/** @cond */
|
||||
#define _ESP_LOG_DRAM_LOG_FORMAT(letter, format) DRAM_STR(#letter " %s: " format "\n")
|
||||
|
||||
#if defined(__cplusplus) && (__cplusplus > 201703L)
|
||||
#define ESP_DRAM_LOG_IMPL(tag, format, log_level, log_tag_letter, ...) do { \
|
||||
if (_ESP_LOG_EARLY_ENABLED(log_level)) { \
|
||||
esp_rom_printf(_ESP_LOG_DRAM_LOG_FORMAT(log_tag_letter, format), tag __VA_OPT__(,) __VA_ARGS__); \
|
||||
}} while(0)
|
||||
#else // !(defined(__cplusplus) && (__cplusplus > 201703L))
|
||||
#define ESP_DRAM_LOG_IMPL(tag, format, log_level, log_tag_letter, ...) do { \
|
||||
if (_ESP_LOG_EARLY_ENABLED(log_level)) { \
|
||||
esp_rom_printf(_ESP_LOG_DRAM_LOG_FORMAT(log_tag_letter, format), tag, ##__VA_ARGS__); \
|
||||
}} while(0)
|
||||
#endif // !(defined(__cplusplus) && (__cplusplus > 201703L))
|
||||
/** @endcond */
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
@ -88,14 +88,14 @@
|
||||
/* MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED is deprecated and should not be used. */
|
||||
#define MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED -0x0058 /**< ARIA hardware accelerator failed. */
|
||||
|
||||
#if !defined(MBEDTLS_ARIA_ALT)
|
||||
// Regular implementation
|
||||
//
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if !defined(MBEDTLS_ARIA_ALT)
|
||||
// Regular implementation
|
||||
//
|
||||
|
||||
/**
|
||||
* \brief The ARIA context-type definition.
|
||||
*/
|
||||
|
||||
@ -71,6 +71,46 @@
|
||||
|
||||
#include "bignum.h"
|
||||
|
||||
|
||||
/*
|
||||
* Conversion macros for embedded constants:
|
||||
* build lists of mbedtls_mpi_uint's from lists of unsigned char's grouped by 8, 4 or 2
|
||||
*/
|
||||
#if defined(MBEDTLS_HAVE_INT32)
|
||||
|
||||
#define MBEDTLS_BYTES_TO_T_UINT_4( a, b, c, d ) \
|
||||
( (mbedtls_mpi_uint) (a) << 0 ) | \
|
||||
( (mbedtls_mpi_uint) (b) << 8 ) | \
|
||||
( (mbedtls_mpi_uint) (c) << 16 ) | \
|
||||
( (mbedtls_mpi_uint) (d) << 24 )
|
||||
|
||||
#define MBEDTLS_BYTES_TO_T_UINT_2( a, b ) \
|
||||
MBEDTLS_BYTES_TO_T_UINT_4( a, b, 0, 0 )
|
||||
|
||||
#define MBEDTLS_BYTES_TO_T_UINT_8( a, b, c, d, e, f, g, h ) \
|
||||
MBEDTLS_BYTES_TO_T_UINT_4( a, b, c, d ), \
|
||||
MBEDTLS_BYTES_TO_T_UINT_4( e, f, g, h )
|
||||
|
||||
#else /* 64-bits */
|
||||
|
||||
#define MBEDTLS_BYTES_TO_T_UINT_8( a, b, c, d, e, f, g, h ) \
|
||||
( (mbedtls_mpi_uint) (a) << 0 ) | \
|
||||
( (mbedtls_mpi_uint) (b) << 8 ) | \
|
||||
( (mbedtls_mpi_uint) (c) << 16 ) | \
|
||||
( (mbedtls_mpi_uint) (d) << 24 ) | \
|
||||
( (mbedtls_mpi_uint) (e) << 32 ) | \
|
||||
( (mbedtls_mpi_uint) (f) << 40 ) | \
|
||||
( (mbedtls_mpi_uint) (g) << 48 ) | \
|
||||
( (mbedtls_mpi_uint) (h) << 56 )
|
||||
|
||||
#define MBEDTLS_BYTES_TO_T_UINT_4( a, b, c, d ) \
|
||||
MBEDTLS_BYTES_TO_T_UINT_8( a, b, c, d, 0, 0, 0, 0 )
|
||||
|
||||
#define MBEDTLS_BYTES_TO_T_UINT_2( a, b ) \
|
||||
MBEDTLS_BYTES_TO_T_UINT_8( a, b, 0, 0, 0, 0, 0, 0 )
|
||||
|
||||
#endif /* bits in mbedtls_mpi_uint */
|
||||
|
||||
#if defined(MBEDTLS_HAVE_ASM)
|
||||
|
||||
#ifndef asm
|
||||
|
||||
@ -453,7 +453,7 @@
|
||||
* be overridden, but the wrapper functions mbedtls_aes_decrypt and mbedtls_aes_encrypt
|
||||
* must stay untouched.
|
||||
*
|
||||
* \note If you use the AES_xxx_ALT macros, then is is recommended to also set
|
||||
* \note If you use the AES_xxx_ALT macros, then it is recommended to also set
|
||||
* MBEDTLS_AES_ROM_TABLES in order to help the linker garbage-collect the AES
|
||||
* tables.
|
||||
*
|
||||
@ -1746,6 +1746,23 @@
|
||||
*/
|
||||
//#define MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
|
||||
|
||||
/**
|
||||
* \def MBEDTLS_TEST_HOOKS
|
||||
*
|
||||
* Enable features for invasive testing such as introspection functions and
|
||||
* hooks for fault injection. This enables additional unit tests.
|
||||
*
|
||||
* Merely enabling this feature should not change the behavior of the product.
|
||||
* It only adds new code, and new branching points where the default behavior
|
||||
* is the same as when this feature is disabled.
|
||||
* However, this feature increases the attack surface: there is an added
|
||||
* risk of vulnerabilities, and more gadgets that can make exploits easier.
|
||||
* Therefore this feature must never be enabled in production.
|
||||
*
|
||||
* Uncomment to enable invasive tests.
|
||||
*/
|
||||
//#define MBEDTLS_TEST_HOOKS
|
||||
|
||||
/**
|
||||
* \def MBEDTLS_THREADING_ALT
|
||||
*
|
||||
|
||||
@ -214,6 +214,13 @@ typedef struct mbedtls_ctr_drbg_context
|
||||
void *p_entropy; /*!< The context for the entropy function. */
|
||||
|
||||
#if defined(MBEDTLS_THREADING_C)
|
||||
/* Invariant: the mutex is initialized if and only if f_entropy != NULL.
|
||||
* This means that the mutex is initialized during the initial seeding
|
||||
* in mbedtls_ctr_drbg_seed() and freed in mbedtls_ctr_drbg_free().
|
||||
*
|
||||
* Note that this invariant may change without notice. Do not rely on it
|
||||
* and do not access the mutex directly in application code.
|
||||
*/
|
||||
mbedtls_threading_mutex_t mutex;
|
||||
#endif
|
||||
}
|
||||
@ -277,6 +284,15 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
|
||||
* device.
|
||||
*/
|
||||
#endif
|
||||
#if defined(MBEDTLS_THREADING_C)
|
||||
/**
|
||||
* \note When Mbed TLS is built with threading support,
|
||||
* after this function returns successfully,
|
||||
* it is safe to call mbedtls_ctr_drbg_random()
|
||||
* from multiple threads. Other operations, including
|
||||
* reseeding, are not thread-safe.
|
||||
*/
|
||||
#endif /* MBEDTLS_THREADING_C */
|
||||
/**
|
||||
* \param ctx The CTR_DRBG context to seed.
|
||||
* It must have been initialized with
|
||||
@ -286,6 +302,8 @@ void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
|
||||
* the same context unless you call
|
||||
* mbedtls_ctr_drbg_free() and mbedtls_ctr_drbg_init()
|
||||
* again first.
|
||||
* After a failed call to mbedtls_ctr_drbg_seed(),
|
||||
* you must call mbedtls_ctr_drbg_free().
|
||||
* \param f_entropy The entropy callback, taking as arguments the
|
||||
* \p p_entropy context, the buffer to fill, and the
|
||||
* length of the buffer.
|
||||
@ -377,6 +395,11 @@ void mbedtls_ctr_drbg_set_reseed_interval( mbedtls_ctr_drbg_context *ctx,
|
||||
* \brief This function reseeds the CTR_DRBG context, that is
|
||||
* extracts data from the entropy source.
|
||||
*
|
||||
* \note This function is not thread-safe. It is not safe
|
||||
* to call this function if another thread might be
|
||||
* concurrently obtaining random numbers from the same
|
||||
* context or updating or reseeding the same context.
|
||||
*
|
||||
* \param ctx The CTR_DRBG context.
|
||||
* \param additional Additional data to add to the state. Can be \c NULL.
|
||||
* \param len The length of the additional data.
|
||||
@ -394,6 +417,11 @@ int mbedtls_ctr_drbg_reseed( mbedtls_ctr_drbg_context *ctx,
|
||||
/**
|
||||
* \brief This function updates the state of the CTR_DRBG context.
|
||||
*
|
||||
* \note This function is not thread-safe. It is not safe
|
||||
* to call this function if another thread might be
|
||||
* concurrently obtaining random numbers from the same
|
||||
* context or updating or reseeding the same context.
|
||||
*
|
||||
* \param ctx The CTR_DRBG context.
|
||||
* \param additional The data to update the state with. This must not be
|
||||
* \c NULL unless \p add_len is \c 0.
|
||||
@ -417,6 +445,11 @@ int mbedtls_ctr_drbg_update_ret( mbedtls_ctr_drbg_context *ctx,
|
||||
* This function automatically reseeds if the reseed counter is exceeded
|
||||
* or prediction resistance is enabled.
|
||||
*
|
||||
* \note This function is not thread-safe. It is not safe
|
||||
* to call this function if another thread might be
|
||||
* concurrently obtaining random numbers from the same
|
||||
* context or updating or reseeding the same context.
|
||||
*
|
||||
* \param p_rng The CTR_DRBG context. This must be a pointer to a
|
||||
* #mbedtls_ctr_drbg_context structure.
|
||||
* \param output The buffer to fill.
|
||||
@ -445,8 +478,16 @@ int mbedtls_ctr_drbg_random_with_add( void *p_rng,
|
||||
*
|
||||
* This function automatically reseeds if the reseed counter is exceeded
|
||||
* or prediction resistance is enabled.
|
||||
*
|
||||
*
|
||||
*/
|
||||
#if defined(MBEDTLS_THREADING_C)
|
||||
/**
|
||||
* \note When Mbed TLS is built with threading support,
|
||||
* it is safe to call mbedtls_ctr_drbg_random()
|
||||
* from multiple threads. Other operations, including
|
||||
* reseeding, are not thread-safe.
|
||||
*/
|
||||
#endif /* MBEDTLS_THREADING_C */
|
||||
/**
|
||||
* \param p_rng The CTR_DRBG context. This must be a pointer to a
|
||||
* #mbedtls_ctr_drbg_context structure.
|
||||
* \param output The buffer to fill.
|
||||
|
||||
@ -154,6 +154,40 @@ typedef struct mbedtls_ecp_point
|
||||
}
|
||||
mbedtls_ecp_point;
|
||||
|
||||
/* Determine the minimum safe value of MBEDTLS_ECP_MAX_BITS. */
|
||||
#if !defined(MBEDTLS_ECP_C)
|
||||
#define MBEDTLS_ECP_MAX_BITS_MIN 0
|
||||
/* Note: the curves must be listed in DECREASING size! */
|
||||
#elif defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
|
||||
#define MBEDTLS_ECP_MAX_BITS_MIN 521
|
||||
#elif defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
|
||||
#define MBEDTLS_ECP_MAX_BITS_MIN 512
|
||||
#elif defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
|
||||
#define MBEDTLS_ECP_MAX_BITS_MIN 448
|
||||
#elif defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
|
||||
#define MBEDTLS_ECP_MAX_BITS_MIN 384
|
||||
#elif defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
|
||||
#define MBEDTLS_ECP_MAX_BITS_MIN 384
|
||||
#elif defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
|
||||
#define MBEDTLS_ECP_MAX_BITS_MIN 256
|
||||
#elif defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
|
||||
#define MBEDTLS_ECP_MAX_BITS_MIN 256
|
||||
#elif defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
|
||||
#define MBEDTLS_ECP_MAX_BITS_MIN 256
|
||||
#elif defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED)
|
||||
#define MBEDTLS_ECP_MAX_BITS_MIN 255
|
||||
#elif defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
|
||||
#define MBEDTLS_ECP_MAX_BITS_MIN 225 // n is slightly above 2^224
|
||||
#elif defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
|
||||
#define MBEDTLS_ECP_MAX_BITS_MIN 224
|
||||
#elif defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
|
||||
#define MBEDTLS_ECP_MAX_BITS_MIN 192
|
||||
#elif defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
|
||||
#define MBEDTLS_ECP_MAX_BITS_MIN 192
|
||||
#else
|
||||
#error "MBEDTLS_ECP_C enabled, but no curve?"
|
||||
#endif
|
||||
|
||||
#if !defined(MBEDTLS_ECP_ALT)
|
||||
/*
|
||||
* default mbed TLS elliptic curve arithmetic implementation
|
||||
@ -228,7 +262,13 @@ mbedtls_ecp_group;
|
||||
* \{
|
||||
*/
|
||||
|
||||
#if !defined(MBEDTLS_ECP_MAX_BITS)
|
||||
#if defined(MBEDTLS_ECP_MAX_BITS)
|
||||
|
||||
#if MBEDTLS_ECP_MAX_BITS < MBEDTLS_ECP_MAX_BITS_MIN
|
||||
#error "MBEDTLS_ECP_MAX_BITS is smaller than the largest supported curve"
|
||||
#endif
|
||||
|
||||
#else
|
||||
/**
|
||||
* The maximum size of the groups, that is, of \c N and \c P.
|
||||
*/
|
||||
|
||||
@ -147,13 +147,15 @@ mbedtls_entropy_source_state;
|
||||
*/
|
||||
typedef struct mbedtls_entropy_context
|
||||
{
|
||||
int accumulator_started;
|
||||
int accumulator_started; /* 0 after init.
|
||||
* 1 after the first update.
|
||||
* -1 after free. */
|
||||
#if defined(MBEDTLS_ENTROPY_SHA512_ACCUMULATOR)
|
||||
mbedtls_sha512_context accumulator;
|
||||
#else
|
||||
mbedtls_sha256_context accumulator;
|
||||
#endif
|
||||
int source_count;
|
||||
int source_count; /* Number of entries used in source. */
|
||||
mbedtls_entropy_source_state source[MBEDTLS_ENTROPY_MAX_SOURCES];
|
||||
#if defined(MBEDTLS_HAVEGE_C)
|
||||
mbedtls_havege_state havege_data;
|
||||
|
||||
@ -128,6 +128,14 @@ typedef struct mbedtls_hmac_drbg_context
|
||||
void *p_entropy; /*!< context for the entropy function */
|
||||
|
||||
#if defined(MBEDTLS_THREADING_C)
|
||||
/* Invariant: the mutex is initialized if and only if
|
||||
* md_ctx->md_info != NULL. This means that the mutex is initialized
|
||||
* during the initial seeding in mbedtls_hmac_drbg_seed() or
|
||||
* mbedtls_hmac_drbg_seed_buf() and freed in mbedtls_ctr_drbg_free().
|
||||
*
|
||||
* Note that this invariant may change without notice. Do not rely on it
|
||||
* and do not access the mutex directly in application code.
|
||||
*/
|
||||
mbedtls_threading_mutex_t mutex;
|
||||
#endif
|
||||
} mbedtls_hmac_drbg_context;
|
||||
@ -177,7 +185,17 @@ void mbedtls_hmac_drbg_init( mbedtls_hmac_drbg_context *ctx );
|
||||
* \note During the initial seeding, this function calls
|
||||
* the entropy source to obtain a nonce
|
||||
* whose length is half the entropy length.
|
||||
*
|
||||
*/
|
||||
#if defined(MBEDTLS_THREADING_C)
|
||||
/**
|
||||
* \note When Mbed TLS is built with threading support,
|
||||
* after this function returns successfully,
|
||||
* it is safe to call mbedtls_hmac_drbg_random()
|
||||
* from multiple threads. Other operations, including
|
||||
* reseeding, are not thread-safe.
|
||||
*/
|
||||
#endif /* MBEDTLS_THREADING_C */
|
||||
/**
|
||||
* \param ctx HMAC_DRBG context to be seeded.
|
||||
* \param md_info MD algorithm to use for HMAC_DRBG.
|
||||
* \param f_entropy The entropy callback, taking as arguments the
|
||||
@ -216,7 +234,17 @@ int mbedtls_hmac_drbg_seed( mbedtls_hmac_drbg_context *ctx,
|
||||
*
|
||||
* This function is meant for use in algorithms that need a pseudorandom
|
||||
* input such as deterministic ECDSA.
|
||||
*
|
||||
*/
|
||||
#if defined(MBEDTLS_THREADING_C)
|
||||
/**
|
||||
* \note When Mbed TLS is built with threading support,
|
||||
* after this function returns successfully,
|
||||
* it is safe to call mbedtls_hmac_drbg_random()
|
||||
* from multiple threads. Other operations, including
|
||||
* reseeding, are not thread-safe.
|
||||
*/
|
||||
#endif /* MBEDTLS_THREADING_C */
|
||||
/**
|
||||
* \param ctx HMAC_DRBG context to be initialised.
|
||||
* \param md_info MD algorithm to use for HMAC_DRBG.
|
||||
* \param data Concatenation of the initial entropy string and
|
||||
@ -279,6 +307,11 @@ void mbedtls_hmac_drbg_set_reseed_interval( mbedtls_hmac_drbg_context *ctx,
|
||||
/**
|
||||
* \brief This function updates the state of the HMAC_DRBG context.
|
||||
*
|
||||
* \note This function is not thread-safe. It is not safe
|
||||
* to call this function if another thread might be
|
||||
* concurrently obtaining random numbers from the same
|
||||
* context or updating or reseeding the same context.
|
||||
*
|
||||
* \param ctx The HMAC_DRBG context.
|
||||
* \param additional The data to update the state with.
|
||||
* If this is \c NULL, there is no additional data.
|
||||
@ -295,6 +328,11 @@ int mbedtls_hmac_drbg_update_ret( mbedtls_hmac_drbg_context *ctx,
|
||||
* \brief This function reseeds the HMAC_DRBG context, that is
|
||||
* extracts data from the entropy source.
|
||||
*
|
||||
* \note This function is not thread-safe. It is not safe
|
||||
* to call this function if another thread might be
|
||||
* concurrently obtaining random numbers from the same
|
||||
* context or updating or reseeding the same context.
|
||||
*
|
||||
* \param ctx The HMAC_DRBG context.
|
||||
* \param additional Additional data to add to the state.
|
||||
* If this is \c NULL, there is no additional data
|
||||
@ -320,6 +358,11 @@ int mbedtls_hmac_drbg_reseed( mbedtls_hmac_drbg_context *ctx,
|
||||
* This function automatically reseeds if the reseed counter is exceeded
|
||||
* or prediction resistance is enabled.
|
||||
*
|
||||
* \note This function is not thread-safe. It is not safe
|
||||
* to call this function if another thread might be
|
||||
* concurrently obtaining random numbers from the same
|
||||
* context or updating or reseeding the same context.
|
||||
*
|
||||
* \param p_rng The HMAC_DRBG context. This must be a pointer to a
|
||||
* #mbedtls_hmac_drbg_context structure.
|
||||
* \param output The buffer to fill.
|
||||
@ -349,7 +392,16 @@ int mbedtls_hmac_drbg_random_with_add( void *p_rng,
|
||||
*
|
||||
* This function automatically reseeds if the reseed counter is exceeded
|
||||
* or prediction resistance is enabled.
|
||||
*
|
||||
*/
|
||||
#if defined(MBEDTLS_THREADING_C)
|
||||
/**
|
||||
* \note When Mbed TLS is built with threading support,
|
||||
* it is safe to call mbedtls_ctr_drbg_random()
|
||||
* from multiple threads. Other operations, including
|
||||
* reseeding, are not thread-safe.
|
||||
*/
|
||||
#endif /* MBEDTLS_THREADING_C */
|
||||
/**
|
||||
* \param p_rng The HMAC_DRBG context. This must be a pointer to a
|
||||
* #mbedtls_hmac_drbg_context structure.
|
||||
* \param output The buffer to fill.
|
||||
|
||||
@ -151,6 +151,7 @@ int mbedtls_net_connect( mbedtls_net_context *ctx, const char *host, const char
|
||||
*
|
||||
* \return 0 if successful, or one of:
|
||||
* MBEDTLS_ERR_NET_SOCKET_FAILED,
|
||||
* MBEDTLS_ERR_NET_UNKNOWN_HOST,
|
||||
* MBEDTLS_ERR_NET_BIND_FAILED,
|
||||
* MBEDTLS_ERR_NET_LISTEN_FAILED
|
||||
*
|
||||
@ -170,6 +171,8 @@ int mbedtls_net_bind( mbedtls_net_context *ctx, const char *bind_ip, const char
|
||||
* can be NULL if client_ip is null
|
||||
*
|
||||
* \return 0 if successful, or
|
||||
* MBEDTLS_ERR_NET_SOCKET_FAILED,
|
||||
* MBEDTLS_ERR_NET_BIND_FAILED,
|
||||
* MBEDTLS_ERR_NET_ACCEPT_FAILED, or
|
||||
* MBEDTLS_ERR_NET_BUFFER_TOO_SMALL if buf_size is too small,
|
||||
* MBEDTLS_ERR_SSL_WANT_READ if bind_fd was set to
|
||||
@ -182,6 +185,10 @@ int mbedtls_net_accept( mbedtls_net_context *bind_ctx,
|
||||
/**
|
||||
* \brief Check and wait for the context to be ready for read/write
|
||||
*
|
||||
* \note The current implementation of this function uses
|
||||
* select() and returns an error if the file descriptor
|
||||
* is \c FD_SETSIZE or greater.
|
||||
*
|
||||
* \param ctx Socket to check
|
||||
* \param rw Bitflag composed of MBEDTLS_NET_POLL_READ and
|
||||
* MBEDTLS_NET_POLL_WRITE specifying the events
|
||||
@ -263,16 +270,21 @@ int mbedtls_net_send( void *ctx, const unsigned char *buf, size_t len );
|
||||
* 'timeout' seconds. If no error occurs, the actual amount
|
||||
* read is returned.
|
||||
*
|
||||
* \note The current implementation of this function uses
|
||||
* select() and returns an error if the file descriptor
|
||||
* is \c FD_SETSIZE or greater.
|
||||
*
|
||||
* \param ctx Socket
|
||||
* \param buf The buffer to write to
|
||||
* \param len Maximum length of the buffer
|
||||
* \param timeout Maximum number of milliseconds to wait for data
|
||||
* 0 means no timeout (wait forever)
|
||||
*
|
||||
* \return the number of bytes received,
|
||||
* or a non-zero error code:
|
||||
* MBEDTLS_ERR_SSL_TIMEOUT if the operation timed out,
|
||||
* \return The number of bytes received if successful.
|
||||
* MBEDTLS_ERR_SSL_TIMEOUT if the operation timed out.
|
||||
* MBEDTLS_ERR_SSL_WANT_READ if interrupted by a signal.
|
||||
* Another negative error code (MBEDTLS_ERR_NET_xxx)
|
||||
* for other failures.
|
||||
*
|
||||
* \note This function will block (until data becomes available or
|
||||
* timeout is reached) even if the socket is set to
|
||||
|
||||
@ -98,7 +98,7 @@ extern "C" {
|
||||
*
|
||||
* \param feature The feature to detect
|
||||
*
|
||||
* \return 1 if CPU has support for the feature, 0 otherwise
|
||||
* \return non-zero if CPU has support for the feature, 0 otherwise
|
||||
*/
|
||||
int mbedtls_padlock_has_support( int feature );
|
||||
|
||||
|
||||
@ -124,7 +124,10 @@ extern "C" {
|
||||
*/
|
||||
typedef struct mbedtls_rsa_context
|
||||
{
|
||||
int ver; /*!< Always 0.*/
|
||||
int ver; /*!< Reserved for internal purposes.
|
||||
* Do not set this field in application
|
||||
* code. Its meaning might change without
|
||||
* notice. */
|
||||
size_t len; /*!< The size of \p N in Bytes. */
|
||||
|
||||
mbedtls_mpi N; /*!< The public modulus. */
|
||||
@ -154,6 +157,7 @@ typedef struct mbedtls_rsa_context
|
||||
mask generating function used in the
|
||||
EME-OAEP and EMSA-PSS encodings. */
|
||||
#if defined(MBEDTLS_THREADING_C)
|
||||
/* Invariant: the mutex is initialized iff ver != 0. */
|
||||
mbedtls_threading_mutex_t mutex; /*!< Thread-safety mutex. */
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -2237,7 +2237,7 @@ void mbedtls_ssl_conf_dhm_min_bitlen( mbedtls_ssl_config *conf,
|
||||
#if defined(MBEDTLS_ECP_C)
|
||||
/**
|
||||
* \brief Set the allowed curves in order of preference.
|
||||
* (Default: all defined curves.)
|
||||
* (Default: all defined curves in order of decreasing size.)
|
||||
*
|
||||
* On server: this only affects selection of the ECDHE curve;
|
||||
* the curves used for ECDH and ECDSA are determined by the
|
||||
@ -2269,7 +2269,9 @@ void mbedtls_ssl_conf_curves( mbedtls_ssl_config *conf,
|
||||
#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
|
||||
/**
|
||||
* \brief Set the allowed hashes for signatures during the handshake.
|
||||
* (Default: all available hashes except MD5.)
|
||||
* (Default: all SHA-2 hashes, largest first. Also SHA-1 if
|
||||
* the compile-time option
|
||||
* `MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE` is enabled.)
|
||||
*
|
||||
* \note This only affects which hashes are offered and can be used
|
||||
* for signatures during the handshake. Hashes for message
|
||||
|
||||
@ -124,7 +124,7 @@ void mbedtls_ssl_ticket_init( mbedtls_ssl_ticket_context *ctx );
|
||||
* Recommended value: 86400 (one day).
|
||||
*
|
||||
* \note It is highly recommended to select a cipher that is at
|
||||
* least as strong as the the strongest ciphersuite
|
||||
* least as strong as the strongest ciphersuite
|
||||
* supported. Usually that means a 256-bit key.
|
||||
*
|
||||
* \note The lifetime of the keys is twice the lifetime of tickets.
|
||||
|
||||
@ -73,6 +73,9 @@ extern "C" {
|
||||
typedef struct mbedtls_threading_mutex_t
|
||||
{
|
||||
pthread_mutex_t mutex;
|
||||
/* is_valid is 0 after a failed init or a free, and nonzero after a
|
||||
* successful init. This field is not considered part of the public
|
||||
* API of Mbed TLS and may change without notice. */
|
||||
char is_valid;
|
||||
} mbedtls_threading_mutex_t;
|
||||
#endif
|
||||
|
||||
@ -65,16 +65,16 @@
|
||||
*/
|
||||
#define MBEDTLS_VERSION_MAJOR 2
|
||||
#define MBEDTLS_VERSION_MINOR 16
|
||||
#define MBEDTLS_VERSION_PATCH 9
|
||||
#define MBEDTLS_VERSION_PATCH 11
|
||||
|
||||
/**
|
||||
* The single version number has the following structure:
|
||||
* MMNNPP00
|
||||
* Major version | Minor version | Patch version
|
||||
*/
|
||||
#define MBEDTLS_VERSION_NUMBER 0x02100900
|
||||
#define MBEDTLS_VERSION_STRING "2.16.9"
|
||||
#define MBEDTLS_VERSION_STRING_FULL "mbed TLS 2.16.9"
|
||||
#define MBEDTLS_VERSION_NUMBER 0x02100B00
|
||||
#define MBEDTLS_VERSION_STRING "2.16.11"
|
||||
#define MBEDTLS_VERSION_STRING_FULL "mbed TLS 2.16.11"
|
||||
|
||||
#if defined(MBEDTLS_VERSION_C)
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user