* TX Flow Control and Code cleanup
* Use semaphore instead of delay
TX functionality is done.
* Use single buffer and empty queue on exit
* Fix compile issues because of LwIP code relocation
* Add temporary header to fix Azure not compiling
* Fix AsyncUDP early init
* AsyncUDP Multicast fixes
* Add source mac address and rework multicast
* Allow redefinition of default pins for Serials 1 and 2
* Update IDF to 3276a13
* Update esptool.py to 2.5.0
* Fix sketches
* Fix log level in BluetoothSetial
* rmt driver initial version
* supporting conti mode plus interrupts
* using conitnous mode for sending more data
* working continous mode
* rmt driver cleanup after conti mode
* initial version of rmt driver
* adding a simple example
* adding channel and block locks
* modified of rmt interface for simpler/easier usage
* adding header sentinels, split interface to common and additional settings
* Fixes per code review + support for rx callback mode
* renamed internal structures and enums, fixed formatting
* cmake support for rmt
* refactored tx-conti interrupts to function to make it more readable
* added Tx and Rx examples
* added license headers
* minor updates per review
* used struct access, renamed defines, corrected diagram
* First commit of FFat library
* Fixed reboot loops if no fat present. Added CMakeLists
* Functionalize the partition checks
* Cleanup, especially in format
* Dont format if mounted. More wording cleanup
* 16M ffat should only be on 16M board
* Fix some casting issues that trip up the compiler when building as ESP-IDF component
Few testers let me know, they were unable with connection to Eduroam network under PEAP+MsCHAPv2 methods.
They were trying many modifications. Solution is very absurd.
Change board to STA mode manually.
One tester from Italy was able to connect to Eduroam network under TTLS + MsCHAPv2 with that sketch too!
Sketch was tested and worked almost for all testers with that problem.
If the esp32 is reset during a i2c read cycle the slave device may be in control of the SDA line.
If the SDA line is held low, the esp32 cannot issue a START or STOP to recover the bus.
The previous code did not correctly configure the SCL output pin, and it cycled SCL 9 times with SDA Low. Since the slave device was in a READ cycle, it just continued outputting the bits of the current byte. When the ACK/NAK bit space occurred, The low output value of SDA was interpreted as ACK so the slave device continued with the next byte. It never terminated the READ cycle.
This new code will correctly recover from an interrupted READ
* ReSTART fix, Sequencing fix
pr #1665 introduce a problem with ReSTART, when solving this problem I found an interaction between the TxFifo refill, RxFifo empty and CMD[] fill. during certain sequences a dataqueue command would be skipped, this skipping resulted in a mismatch between the contents of the TxFifo and the i2c command sequence. The problem manifested as an ACK error.
In addition to this required bug fix I propose:
* `Wire.begin()` be changed from a `void` to a `bool` this will allow the reset functionality of `Wire.begin()` to be reported. Currently `Wire.begin()` attempts to reset the i2c Peripheral, but cannot report success/failure.
* `Wire.busy()` be added. this `bool` function returns the hardware status of the bus. This status can be use in multi-master environments for application level interleaving of commands, also in single master environment, it can be used to detect a 'hung' bus. With the functional change to `Wire.begin()` this allows app level recover of a hung bus.
* `Wire.lastError()` value updated for all errors, previously when interleaving `Wire.endTransmission(false)` and `Wire.readTransmission(false)`, the 128 byte `Wire.write()` buffer was exhausted without generating and error(very exotic). I discovered this error when I created a sequence of directed reads to a EEPROM. Each directed read used 2 bytes of the 128 byte `write()` buffer, so after 64 consecutive ReSTART writes with ReSTART reads, `Wire()` had no room to record the directed address bytes. It generated just a NAK check without setting the EEPROMs internal register address. The succeeding ReSTART read succeeded at incorrect address.
* Changes to the HAL layer:
** added `i2cGetStatus()` which returns the i2c peripheral status word, used to detect bus_busy currently
** added `i2cDebug()` programmatic control of debug buffer output
** changed `i2cAddQueue()` to allow data_only queue element this will allow a i2c transaction to use multiple data pointers.
** removed direct access to DumpInts(), DumpI2c() from app, use i2cDebug() to set trigger points
*
* Update esp32-hal-i2c.c
* Update Wire.cpp
* ReSTART, Sequencing
pr #1665 introduce a problem with ReSTART, when solving this problem I found an interaction between the TxFifo refill, RxFifo empty and CMD[] fill. during certain sequences a dataqueue command would be skipped, this skipping resulted in a mismatch between the contents of the TxFifo and the i2c command sequence. The problem manifested as an ACK error.
In addition to this required bug fix I propose:
* `Wire.begin()` be changed from a `void` to a `bool` this will allow the reset functionality of `Wire.begin()` to be reported. Currently `Wire.begin()` attempts to reset the i2c Peripheral, but cannot report success/failure.
* `Wire.busy()` be added. this `bool` function returns the hardware status of the bus. This status can be use in multi-master environments for application level interleaving of commands, also in single master environment, it can be used to detect a 'hung' bus. With the functional change to `Wire.begin()` this allows app level recover of a hung bus.
* `Wire.lastError()` value updated for all errors, previously when interleaving `Wire.endTransmission(false)` and `Wire.readTransmission(false)`, the 128 byte `Wire.write()` buffer was exhausted without generating and error(very exotic). I discovered this error when I created a sequence of directed reads to a EEPROM. Each directed read used 2 bytes of the 128 byte `write()` buffer, so after 64 consecutive ReSTART writes with ReSTART reads, `Wire()` had no room to record the directed address bytes. It generated just a NAK check without setting the EEPROMs internal register address. The succeeding ReSTART read succeeded at incorrect address.
* Changes to the HAL layer:
** added `i2cGetStatus()` which returns the i2c peripheral status word, used to detect bus_busy currently
** added `i2cDebug()` programmatic control of debug buffer output
** changed `i2cAddQueue()` to allow data_only queue element this will allow a i2c transaction to use multiple data pointers.
** removed direct access to DumpInts(), DumpI2c() from app, use i2cDebug() to set trigger points
*
* Forgot DebugFlags Return
@andriyadi found this, total brain fade on my part.
* Added instructions for installation with boards manager (stolen directly from esp8266)
* changed to production link instead of dev
* Added to main README. Made mods to images as requested.
* Added links for development package
* Moved version images to README.md
* Just a little change for cleaner look
* Cleaned up README.md and boards_manager.md to make installation easier.
* Added instructions for installation with boards manager (stolen directly from esp8266)
* changed to production link instead of dev
* Added to main README. Made mods to images as requested.
* Added links for development package
If you receive a package with a data length of zero, parsePacket returns 0, but rx_buffer will exist. So if another parsePacket with no read access returns to zeros, there is still data that can be read. This example would not work: https://www.arduino.cc/en/Reference/EthernetUDPParsePacket
Also I added a check if rx_buffer exit when you try to flush it.
* Add ttgo-lora32-v1 folder to variants folder
* Add ttgo-lora32-v1 info to boards.txt
* Add defs to pins_arduino.h for I2C OLED and SPI LoRa radio pinouts as per @stickbreaker
This version no longer needs an interrupt for each byte transferred. It only needs interrupts for START, STOP, FIFO empty/Full or error conditions. This dramatically reduces the interrupt overhead. I think the prior version was causing an interrupt overload condition where the ISR was not able to process every interrupt as they happened.
