16f4b0f5ba
* Update toolchain * Update package_esp32_index.template.json * add optional component dependencies after Kconfig options are known (#5404) Until this commit, Kconfig options (e.g. CONFIG_TINYUSB_ENABLED) were used in conditions preceding idf_component_register to determine which components need to be added to `arduino` component requirements. However the Kconfig options aren't known at the early expansion stage, when the component CMakeLists.txt files are expanded the first time and requirements are evaluated. So all the conditions evaluated as if the options were not set. This commit changes the logic to only add these components as dependencies when the Kconfig options are known. Dependencies become "weak", which means that if one of the components isn't included into the build for some reason, it is not added as a dependency. This may happen, for example, if the component is not present in the `components` directory or is excluded by setting `COMPONENTS` variable in the project CMakeLists.txt file. This also ensures that if the component is not present, it will not be added as a dependency, and this will allow the build to proceed. Follow-up to https://github.com/espressif/arduino-esp32/pull/5391. Closes https://github.com/espressif/arduino-esp32/issues/5319. * IDF master d93887f9f * PlatformIO updates for CI (#5387) * Update PlatformIO CI build script - Switch to the latest toolchains 8.4.0 for ESP32, ESP32S2, ESP32C3 - Use PlatformIO from master branch for better robustness * Update package.json for PlatformIO Co-authored-by: Ivan Grokhotkov <ivan@espressif.com> Co-authored-by: Valerii Koval <valeros@users.noreply.github.com>
539 lines
30 KiB
Plaintext
539 lines
30 KiB
Plaintext
/* Automatically generated file; DO NOT EDIT */
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/* Espressif IoT Development Framework Linker Script */
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/* Generated from: /Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/esp32s2/ld/esp32s2.project.ld.in */
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/* Default entry point: */
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ENTRY(call_start_cpu0);
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SECTIONS
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{
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/* RTC fast memory holds RTC wake stub code,
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including from any source file named rtc_wake_stub*.c
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*/
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.rtc.text :
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{
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_rtc_text_start = ABSOLUTE(.);
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. = ALIGN(4);
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_rtc_code_start = .;
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*(.rtc.literal .rtc.text .rtc.text.*)
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*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
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_rtc_code_end = .;
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/* possibly align + add 16B for CPU dummy speculative instr. fetch */
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. = ((_rtc_code_end - _rtc_code_start) == 0) ? ALIGN(0) : ALIGN(4) + 16;
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_rtc_text_end = ABSOLUTE(.);
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} > rtc_iram_seg
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/*
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This section is required to skip rtc.text area because rtc_iram_seg and
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rtc_data_seg are reflect the same address space on different buses.
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*/
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.rtc.dummy :
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{
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_rtc_dummy_start = ABSOLUTE(.);
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_rtc_fast_start = ABSOLUTE(.);
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. = SIZEOF(.rtc.text);
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_rtc_dummy_end = ABSOLUTE(.);
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} > rtc_data_seg
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/* This section located in RTC FAST Memory area.
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It holds data marked with RTC_FAST_ATTR attribute.
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See the file "esp_attr.h" for more information.
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*/
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.rtc.force_fast :
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{
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. = ALIGN(4);
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_rtc_force_fast_start = ABSOLUTE(.);
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_coredump_rtc_fast_start = ABSOLUTE(.);
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*(.rtc.fast.coredump .rtc.fast.coredump.*)
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_coredump_rtc_fast_end = ABSOLUTE(.);
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*(.rtc.force_fast .rtc.force_fast.*)
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. = ALIGN(4) ;
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_rtc_force_fast_end = ABSOLUTE(.);
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} > rtc_data_seg
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/* RTC data section holds RTC wake stub
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data/rodata, including from any source file
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named rtc_wake_stub*.c and the data marked with
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RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
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The memory location of the data is dependent on
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CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM option.
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*/
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.rtc.data :
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{
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_rtc_data_start = ABSOLUTE(.);
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_coredump_rtc_start = ABSOLUTE(.);
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*(.rtc.coredump .rtc.coredump.*)
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_coredump_rtc_end = ABSOLUTE(.);
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*(.rtc.data .rtc.data.*)
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*(.rtc.rodata .rtc.rodata.*)
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*rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*)
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_rtc_data_end = ABSOLUTE(.);
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} > rtc_data_location
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/* RTC bss, from any source file named rtc_wake_stub*.c */
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.rtc.bss (NOLOAD) :
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{
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_rtc_bss_start = ABSOLUTE(.);
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*rtc_wake_stub*.*(.bss .bss.*)
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*rtc_wake_stub*.*(COMMON)
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*(.rtc.bss)
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_rtc_bss_end = ABSOLUTE(.);
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} > rtc_data_location
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/* This section holds data that should not be initialized at power up
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and will be retained during deep sleep.
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User data marked with RTC_NOINIT_ATTR will be placed
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into this section. See the file "esp_attr.h" for more information.
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The memory location of the data is dependent on
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CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM option.
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*/
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.rtc_noinit (NOLOAD):
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{
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. = ALIGN(4);
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_rtc_noinit_start = ABSOLUTE(.);
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*(.rtc_noinit .rtc_noinit.*)
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. = ALIGN(4) ;
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_rtc_noinit_end = ABSOLUTE(.);
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} > rtc_data_location
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/* This section located in RTC SLOW Memory area.
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It holds data marked with RTC_SLOW_ATTR attribute.
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See the file "esp_attr.h" for more information.
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*/
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.rtc.force_slow :
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{
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. = ALIGN(4);
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_rtc_force_slow_start = ABSOLUTE(.);
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*(.rtc.force_slow .rtc.force_slow.*)
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. = ALIGN(4) ;
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_rtc_force_slow_end = ABSOLUTE(.);
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} > rtc_slow_seg
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/* Get size of rtc slow data based on rtc_data_location alias */
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_rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
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? (_rtc_force_slow_end - _rtc_data_start)
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: (_rtc_force_slow_end - _rtc_force_slow_start);
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_rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
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? (_rtc_force_fast_end - _rtc_fast_start)
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: (_rtc_noinit_end - _rtc_fast_start);
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ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
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"RTC_SLOW segment data does not fit.")
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ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
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"RTC_FAST segment data does not fit.")
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/* Send .iram0 code to iram */
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.iram0.vectors :
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{
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_iram_start = ABSOLUTE(.);
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/* Vectors go to IRAM */
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_vector_table = ABSOLUTE(.);
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/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
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. = 0x0;
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KEEP(*(.WindowVectors.text));
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. = 0x180;
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KEEP(*(.Level2InterruptVector.text));
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. = 0x1c0;
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KEEP(*(.Level3InterruptVector.text));
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. = 0x200;
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KEEP(*(.Level4InterruptVector.text));
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. = 0x240;
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KEEP(*(.Level5InterruptVector.text));
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. = 0x280;
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KEEP(*(.DebugExceptionVector.text));
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. = 0x2c0;
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KEEP(*(.NMIExceptionVector.text));
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. = 0x300;
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KEEP(*(.KernelExceptionVector.text));
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. = 0x340;
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KEEP(*(.UserExceptionVector.text));
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. = 0x3C0;
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KEEP(*(.DoubleExceptionVector.text));
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. = 0x400;
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_invalid_pc_placeholder = ABSOLUTE(.);
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*(.*Vector.literal)
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*(.UserEnter.literal);
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*(.UserEnter.text);
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. = ALIGN (16);
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*(.entry.text)
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*(.init.literal)
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*(.init)
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_init_end = ABSOLUTE(.);
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} > iram0_0_seg
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.iram0.text :
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{
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/* Code marked as runnning out of IRAM */
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_iram_text_start = ABSOLUTE(.);
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*(.iram1 .iram1.*)
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*libapp_trace.a:app_trace.*(.literal .literal.* .text .text.*)
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*libapp_trace.a:app_trace_util.*(.literal .literal.* .text .text.*)
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*libesp_event.a:default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post)
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*libesp_event.a:esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to)
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*libesp_hw_support.a:cpu_util.*(.literal .literal.* .text .text.*)
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*libesp_hw_support.a:regi2c_ctrl.*(.literal .literal.* .text .text.*)
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*libesp_hw_support.a:rtc_clk.*(.literal .literal.* .text .text.*)
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*libesp_hw_support.a:rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config)
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*libesp_hw_support.a:rtc_pm.*(.literal .literal.* .text .text.*)
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*libesp_hw_support.a:rtc_sleep.*(.literal .literal.* .text .text.*)
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*libesp_hw_support.a:rtc_time.*(.literal .literal.* .text .text.*)
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*libesp_hw_support.a:rtc_wdt.*(.literal .literal.* .text .text.*)
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*libesp_ringbuf.a:(.literal .literal.* .text .text.*)
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*libesp_system.a:esp_err.*(.literal .literal.* .text .text.*)
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*libesp_system.a:esp_system.*(.literal.esp_system_abort .text.esp_system_abort)
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*libesp_system.a:ubsan.*(.literal .literal.* .text .text.*)
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*libfreertos.a:(EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .literal.* EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text EXCLUDE_FILE(*libfreertos.a:port.* *libfreertos.a:port_common.*) .text.*)
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*libfreertos.a:port.*(.literal.pxPortInitialiseStack .literal.unlikely.vPortEndScheduler .literal.vApplicationStackOverflowHook .literal.vPortAssertIfInISR .literal.vPortEnterCritical .literal.vPortExitCritical .literal.vPortSetStackWatchpoint .literal.vPortYieldOtherCore .literal.xPortInIsrContext .literal.xPortStartScheduler .literal.xPortSysTickHandler .text .text.pxPortInitialiseStack .text.unlikely.vPortEndScheduler .text.vApplicationStackOverflowHook .text.vPortAssertIfInISR .text.vPortEnterCritical .text.vPortExitCritical .text.vPortSetStackWatchpoint .text.vPortYieldOtherCore .text.xPortGetTickRateHz .text.xPortInIsrContext .text.xPortStartScheduler .text.xPortSysTickHandler)
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*libfreertos.a:port_common.*(.literal.esp_startup_start_app_common .text .text.esp_startup_start_app_common)
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*libgcc.a:_divsf3.*(.literal .literal.* .text .text.*)
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*libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*)
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*libgcov.a:(.literal .literal.* .text .text.*)
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*libhal.a:cpu_hal.*(.literal .literal.* .text .text.*)
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*libhal.a:i2c_hal_iram.*(.literal .literal.* .text .text.*)
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*libhal.a:ledc_hal_iram.*(.literal .literal.* .text .text.*)
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*libhal.a:soc_hal.*(.literal .literal.* .text .text.*)
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*libhal.a:spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*)
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*libhal.a:spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
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*libhal.a:spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
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*libhal.a:spi_hal_iram.*(.literal .literal.* .text .text.*)
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*libhal.a:spi_slave_hal_iram.*(.literal .literal.* .text .text.*)
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*libhal.a:systimer_hal.*(.literal .literal.* .text .text.*)
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*libhal.a:wdt_hal_iram.*(.literal .literal.* .text .text.*)
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*libheap.a:heap_tlsf.*(.literal .literal.* .text .text.*)
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*libheap.a:multi_heap.*(.literal .literal.* .text .text.*)
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*libheap.a:multi_heap_poisoning.*(.literal .literal.* .text .text.*)
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*liblog.a:log.*(.literal.esp_log_write .text.esp_log_write)
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*liblog.a:log_freertos.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
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*liblog.a:log_freertos.*(.literal.esp_log_impl_lock .text.esp_log_impl_lock)
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*liblog.a:log_freertos.*(.literal.esp_log_impl_lock_timeout .text.esp_log_impl_lock_timeout)
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*liblog.a:log_freertos.*(.literal.esp_log_impl_unlock .text.esp_log_impl_unlock)
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*liblog.a:log_freertos.*(.literal.esp_log_timestamp .text.esp_log_timestamp)
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*libnewlib.a:abort.*(.literal .literal.* .text .text.*)
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*libnewlib.a:heap.*(.literal .literal.* .text .text.*)
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*libnewlib.a:stdatomic.*(.literal .literal.* .text .text.*)
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*librtc.a:(.literal .literal.* .text .text.*)
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*libsoc.a:lldesc.*(.literal .literal.* .text .text.*)
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*libspi_flash.a:memspi_host_driver.*(.literal .literal.* .text .text.*)
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*libspi_flash.a:spi_flash_chip_boya.*(.literal .literal.* .text .text.*)
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*libspi_flash.a:spi_flash_chip_gd.*(.literal .literal.* .text .text.*)
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*libspi_flash.a:spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
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*libspi_flash.a:spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
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*libspi_flash.a:spi_flash_chip_mxic.*(.literal .literal.* .text .text.*)
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*libspi_flash.a:spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
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*libspi_flash.a:spi_flash_rom_patch.*(.literal .literal.* .text .text.*)
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*libxt_hal.a:(.literal .literal.* .text .text.*)
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*libxtensa.a:eri.*(.literal .literal.* .text .text.*)
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*libxtensa.a:xtensa_intr_asm.*(.literal .literal.* .text .text.*)
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/* added to maintain compability */
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_coredump_iram_start = 0;
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_coredump_iram_end = 0;
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/* align + add 16B for CPU dummy speculative instr. fetch */
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. = ALIGN(4) + 16;
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/* iram_end_test section exists for use by memprot unit tests only */
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*(.iram_end_test)
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_iram_text_end = ABSOLUTE(.);
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_iram_end = ABSOLUTE(.);
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} > iram0_0_seg
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.dram0_reserved_for_iram (NOLOAD):
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{
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. = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
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} > dram0_0_seg
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.dram0.data :
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{
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_data_start = ABSOLUTE(.);
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*(.gnu.linkonce.d.*)
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*(.data1)
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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*(.jcr)
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_esp_system_init_fn_array_start = ABSOLUTE(.);
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KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*)))
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_esp_system_init_fn_array_end = ABSOLUTE(.);
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*(EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data EXCLUDE_FILE(*libbt.a *libbtdm_app.a *libnimble.a) .data.*)
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*(.dram1 .dram1.*)
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_coredump_dram_start = ABSOLUTE(.);
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*(.dram1.coredump .dram1.coredump.*)
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_coredump_dram_end = ABSOLUTE(.);
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*libapp_trace.a:app_trace.*(.rodata .rodata.*)
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*libapp_trace.a:app_trace_util.*(.rodata .rodata.*)
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_bt_data_start = ABSOLUTE(.);
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*libbt.a:(.data .data.*)
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. = ALIGN(4);
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_bt_data_end = ABSOLUTE(.);
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_btdm_data_start = ABSOLUTE(.);
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*libbtdm_app.a:(.data .data.*)
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. = ALIGN(4);
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_btdm_data_end = ABSOLUTE(.);
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*libesp_hw_support.a:regi2c_ctrl.*(.rodata .rodata.*)
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*libesp_hw_support.a:rtc_clk.*(.rodata .rodata.*)
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*libesp_system.a:esp_err.*(.rodata .rodata.*)
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*libesp_system.a:ubsan.*(.rodata .rodata.*)
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*libgcc.a:_divsf3.*(.rodata .rodata.*)
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*libgcov.a:(.rodata .rodata.*)
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*libhal.a:cpu_hal.*(.rodata .rodata.*)
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*libhal.a:i2c_hal_iram.*(.rodata .rodata.*)
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*libhal.a:ledc_hal_iram.*(.rodata .rodata.*)
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*libhal.a:soc_hal.*(.rodata .rodata.*)
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*libhal.a:spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
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*libhal.a:spi_flash_hal_gpspi.*(.rodata .rodata.*)
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*libhal.a:spi_flash_hal_iram.*(.rodata .rodata.*)
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*libhal.a:spi_hal_iram.*(.rodata .rodata.*)
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*libhal.a:spi_slave_hal_iram.*(.rodata .rodata.*)
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*libhal.a:systimer_hal.*(.rodata .rodata.*)
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*libhal.a:wdt_hal_iram.*(.rodata .rodata.*)
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*libheap.a:heap_tlsf.*(.rodata .rodata.*)
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*libheap.a:multi_heap.*(.rodata .rodata.*)
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*libheap.a:multi_heap_poisoning.*(.rodata .rodata.*)
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*libnewlib.a:abort.*(.rodata .rodata.*)
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*libnewlib.a:heap.*(.rodata .rodata.*)
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*libnewlib.a:stdatomic.*(.rodata .rodata.*)
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_nimble_data_start = ABSOLUTE(.);
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*libnimble.a:(.data .data.*)
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. = ALIGN(4);
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_nimble_data_end = ABSOLUTE(.);
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*libphy.a:(.rodata .rodata.*)
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*libsoc.a:lldesc.*(.rodata .rodata.*)
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*libspi_flash.a:memspi_host_driver.*(.rodata .rodata.*)
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*libspi_flash.a:spi_flash_chip_boya.*(.rodata .rodata.*)
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*libspi_flash.a:spi_flash_chip_gd.*(.rodata .rodata.*)
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*libspi_flash.a:spi_flash_chip_generic.*(.rodata .rodata.*)
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*libspi_flash.a:spi_flash_chip_issi.*(.rodata .rodata.*)
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*libspi_flash.a:spi_flash_chip_mxic.*(.rodata .rodata.*)
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*libspi_flash.a:spi_flash_chip_winbond.*(.rodata .rodata.*)
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*libspi_flash.a:spi_flash_rom_patch.*(.rodata .rodata.*)
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_data_end = ABSOLUTE(.);
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. = ALIGN(4);
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} > dram0_0_seg
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/*This section holds data that should not be initialized at power up.
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The section located in Internal SRAM memory region. The macro _NOINIT
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can be used as attribute to place data into this section.
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See the esp_attr.h file for more information.
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*/
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.noinit (NOLOAD):
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{
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. = ALIGN(4);
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_noinit_start = ABSOLUTE(.);
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*(.noinit .noinit.*)
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. = ALIGN(4) ;
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_noinit_end = ABSOLUTE(.);
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|
} > dram0_0_seg
|
|
|
|
/* Shared RAM */
|
|
.dram0.bss (NOLOAD) :
|
|
{
|
|
. = ALIGN (8);
|
|
_bss_start = ABSOLUTE(.);
|
|
*(.ext_ram.bss*)
|
|
|
|
*(.bss .bss.*)
|
|
*(.ext_ram.bss .ext_ram.bss.*)
|
|
*(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
|
|
*(COMMON)
|
|
_bt_bss_start = ABSOLUTE(.);
|
|
*libbt.a:(.bss .bss.* COMMON)
|
|
. = ALIGN(4);
|
|
_bt_bss_end = ABSOLUTE(.);
|
|
_btdm_bss_start = ABSOLUTE(.);
|
|
*libbtdm_app.a:(.bss .bss.* COMMON)
|
|
. = ALIGN(4);
|
|
_btdm_bss_end = ABSOLUTE(.);
|
|
_nimble_bss_start = ABSOLUTE(.);
|
|
*libnimble.a:(.bss .bss.* COMMON)
|
|
. = ALIGN(4);
|
|
_nimble_bss_end = ABSOLUTE(.);
|
|
|
|
*(.dynsbss)
|
|
*(.sbss)
|
|
*(.sbss.*)
|
|
*(.gnu.linkonce.sb.*)
|
|
*(.scommon)
|
|
*(.sbss2)
|
|
*(.sbss2.*)
|
|
*(.gnu.linkonce.sb2.*)
|
|
*(.dynbss)
|
|
*(.share.mem)
|
|
*(.gnu.linkonce.b.*)
|
|
|
|
. = ALIGN (8);
|
|
_bss_end = ABSOLUTE(.);
|
|
} > dram0_0_seg
|
|
|
|
.flash.appdesc : ALIGN(0x10)
|
|
{
|
|
_rodata_reserved_start = ABSOLUTE(.);
|
|
_rodata_start = ABSOLUTE(.);
|
|
|
|
*(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */
|
|
*(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
|
|
|
|
/* Create an empty gap within this section. Thanks to this, the end of this
|
|
* section will match .flah.rodata's begin address. Thus, both sections
|
|
* will be merged when creating the final bin image. */
|
|
. = ALIGN(ALIGNOF(.flash.rodata));
|
|
} >default_rodata_seg
|
|
|
|
.flash.rodata : ALIGN(0x10)
|
|
{
|
|
_flash_rodata_start = ABSOLUTE(.);
|
|
|
|
*(EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata EXCLUDE_FILE(*libgcov.a *libphy.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_system.a:esp_err.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.*) .rodata.*)
|
|
*(.rodata_wlog_error .rodata_wlog_error.*)
|
|
|
|
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
|
|
*(.gnu.linkonce.r.*)
|
|
*(.rodata1)
|
|
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
|
|
*(.xt_except_table)
|
|
*(.gcc_except_table .gcc_except_table.*)
|
|
*(.gnu.linkonce.e.*)
|
|
*(.gnu.version_r)
|
|
. = (. + 3) & ~ 3;
|
|
__eh_frame = ABSOLUTE(.);
|
|
KEEP(*(.eh_frame))
|
|
. = (. + 7) & ~ 3;
|
|
/* C++ constructor and destructor tables
|
|
|
|
Make a point of not including anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt
|
|
*/
|
|
__init_array_start = ABSOLUTE(.);
|
|
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*)))
|
|
__init_array_end = ABSOLUTE(.);
|
|
KEEP (*crtbegin.*(.dtors))
|
|
KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
|
|
KEEP (*(SORT(.dtors.*)))
|
|
KEEP (*(.dtors))
|
|
/* C++ exception handlers table: */
|
|
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
|
|
*(.xt_except_desc)
|
|
*(.gnu.linkonce.h.*)
|
|
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
|
|
*(.xt_except_desc_end)
|
|
*(.dynamic)
|
|
*(.gnu.version_d)
|
|
/* Addresses of memory regions reserved via
|
|
SOC_RESERVE_MEMORY_REGION() */
|
|
soc_reserved_memory_region_start = ABSOLUTE(.);
|
|
KEEP (*(.reserved_memory_address))
|
|
soc_reserved_memory_region_end = ABSOLUTE(.);
|
|
_rodata_end = ABSOLUTE(.);
|
|
/* Literals are also RO data. */
|
|
_lit4_start = ABSOLUTE(.);
|
|
*(*.lit4)
|
|
*(.lit4.*)
|
|
*(.gnu.linkonce.lit4.*)
|
|
_lit4_end = ABSOLUTE(.);
|
|
. = ALIGN(4);
|
|
_thread_local_start = ABSOLUTE(.);
|
|
*(.tdata)
|
|
*(.tdata.*)
|
|
*(.tbss)
|
|
*(.tbss.*)
|
|
_thread_local_end = ABSOLUTE(.);
|
|
_rodata_reserved_end = ABSOLUTE(.);
|
|
. = ALIGN(4);
|
|
} >default_rodata_seg
|
|
|
|
_flash_rodata_align = ALIGNOF(.flash.rodata);
|
|
|
|
.flash.rodata_noload (NOLOAD) :
|
|
{
|
|
. = ALIGN (4);
|
|
*(.rodata_wlog_debug .rodata_wlog_debug.*)
|
|
*(.rodata_wlog_info .rodata_wlog_info.*)
|
|
*(.rodata_wlog_verbose .rodata_wlog_verbose.*)
|
|
*(.rodata_wlog_warning .rodata_wlog_warning.*)
|
|
} > default_rodata_seg
|
|
|
|
.flash.text :
|
|
{
|
|
_stext = .;
|
|
_instruction_reserved_start = ABSOLUTE(.);
|
|
_text_start = ABSOLUTE(.);
|
|
|
|
*(EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .literal.* EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text EXCLUDE_FILE(*libesp_ringbuf.a *libfreertos.a *libgcov.a *librtc.a *libxt_hal.a *libapp_trace.a:app_trace.* *libapp_trace.a:app_trace_util.* *libesp_event.a:default_event_loop.* *libesp_event.a:esp_event.* *libesp_hw_support.a:cpu_util.* *libesp_hw_support.a:regi2c_ctrl.* *libesp_hw_support.a:rtc_clk.* *libesp_hw_support.a:rtc_init.* *libesp_hw_support.a:rtc_pm.* *libesp_hw_support.a:rtc_sleep.* *libesp_hw_support.a:rtc_time.* *libesp_hw_support.a:rtc_wdt.* *libesp_system.a:esp_err.* *libesp_system.a:esp_system.* *libesp_system.a:ubsan.* *libgcc.a:_divsf3.* *libgcc.a:lib2funcs.* *libhal.a:cpu_hal.* *libhal.a:i2c_hal_iram.* *libhal.a:ledc_hal_iram.* *libhal.a:soc_hal.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_slave_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:wdt_hal_iram.* *libheap.a:heap_tlsf.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.* *liblog.a:log.* *liblog.a:log_freertos.* *libnewlib.a:abort.* *libnewlib.a:heap.* *libnewlib.a:stdatomic.* *libsoc.a:lldesc.* *libspi_flash.a:memspi_host_driver.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_rom_patch.* *libxtensa.a:eri.* *libxtensa.a:xtensa_intr_asm.*) .text.*)
|
|
*(.wifi0iram .wifi0iram.*)
|
|
*(.wifiorslpiram .wifiorslpiram.*)
|
|
*(.wifirxiram .wifirxiram.*)
|
|
*(.wifislpiram .wifislpiram.*)
|
|
*(.wifislprxiram .wifislprxiram.*)
|
|
*libesp_event.a:default_event_loop.*(.literal.esp_event_handler_instance_register .literal.esp_event_handler_instance_unregister .literal.esp_event_handler_register .literal.esp_event_handler_unregister .literal.esp_event_loop_create_default .literal.esp_event_loop_delete_default .literal.esp_event_post .literal.esp_event_send_to_default_loop .text .text.esp_event_handler_instance_register .text.esp_event_handler_instance_unregister .text.esp_event_handler_register .text.esp_event_handler_unregister .text.esp_event_loop_create_default .text.esp_event_loop_delete_default .text.esp_event_post .text.esp_event_send_to_default_loop)
|
|
*libesp_event.a:esp_event.*(.literal.base_node_add_handler .literal.esp_event_handler_instance_register_with .literal.esp_event_handler_instance_unregister_with .literal.esp_event_handler_register_with .literal.esp_event_handler_register_with_internal .literal.esp_event_handler_unregister_with .literal.esp_event_handler_unregister_with_internal .literal.esp_event_loop_create .literal.esp_event_loop_delete .literal.esp_event_loop_run .literal.esp_event_loop_run_task .literal.esp_event_post_to .literal.handler_instances_add .literal.handler_instances_remove .literal.handler_instances_remove_all$isra$1 .literal.loop_node_add_handler .text .text.base_node_add_handler .text.esp_event_dump .text.esp_event_handler_instance_register_with .text.esp_event_handler_instance_unregister_with .text.esp_event_handler_register_with .text.esp_event_handler_register_with_internal .text.esp_event_handler_unregister_with .text.esp_event_handler_unregister_with_internal .text.esp_event_loop_create .text.esp_event_loop_delete .text.esp_event_loop_run .text.esp_event_loop_run_task .text.esp_event_post_to .text.handler_instances_add .text.handler_instances_remove .text.handler_instances_remove_all$isra$1 .text.loop_node_add_handler)
|
|
*libesp_hw_support.a:rtc_init.*(.literal.rtc_init .literal.rtc_vddsdio_get_config .text .text.rtc_init .text.rtc_vddsdio_get_config)
|
|
*libesp_system.a:esp_system.*(.literal.esp_get_free_heap_size .literal.esp_get_free_internal_heap_size .literal.esp_get_idf_version .literal.esp_get_minimum_free_heap_size .literal.esp_register_shutdown_handler .literal.esp_unregister_shutdown_handler .text .text.esp_get_free_heap_size .text.esp_get_free_internal_heap_size .text.esp_get_idf_version .text.esp_get_minimum_free_heap_size .text.esp_register_shutdown_handler .text.esp_unregister_shutdown_handler)
|
|
*libfreertos.a:port.*(.literal.esp_startup_start_app .text.esp_startup_start_app)
|
|
*libfreertos.a:port_common.*(.literal.main_task .text.main_task)
|
|
*liblog.a:log.*(.literal.esp_log_level_get .literal.esp_log_level_set .literal.esp_log_set_vprintf .literal.esp_log_writev .literal.heap_bubble_down .literal.s_log_level_get_and_unlock .text .text.esp_log_level_get .text.esp_log_level_set .text.esp_log_set_vprintf .text.esp_log_writev .text.heap_bubble_down .text.s_log_level_get_and_unlock)
|
|
*liblog.a:log_freertos.*(.literal.esp_log_system_timestamp .text .text.esp_log_system_timestamp)
|
|
|
|
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
|
|
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
|
|
*(.fini.literal)
|
|
*(.fini)
|
|
*(.gnu.version)
|
|
|
|
/** CPU will try to prefetch up to 16 bytes of
|
|
* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
|
|
* safe access to up to 16 bytes after the last real instruction, add
|
|
* dummy bytes to ensure this
|
|
*/
|
|
. += 16;
|
|
|
|
_text_end = ABSOLUTE(.);
|
|
_instruction_reserved_end = ABSOLUTE(.);
|
|
_etext = .;
|
|
|
|
/* Similar to _iram_start, this symbol goes here so it is
|
|
resolved by addr2line in preference to the first symbol in
|
|
the flash.text segment.
|
|
*/
|
|
_flash_cache_start = ABSOLUTE(0);
|
|
} >default_code_seg
|
|
|
|
/* Marks the end of IRAM code segment */
|
|
.iram0.text_end (NOLOAD) :
|
|
{
|
|
. = ALIGN (4);
|
|
_iram_end = ABSOLUTE(.);
|
|
} > iram0_0_seg
|
|
|
|
/* Marks the end of data, bss and possibly rodata */
|
|
.dram0.heap_start (NOLOAD) :
|
|
{
|
|
. = ALIGN (8);
|
|
_heap_start = ABSOLUTE(.);
|
|
} > dram0_0_seg
|
|
}
|
|
|
|
ASSERT(((_iram_text_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
|
|
"IRAM0 segment data does not fit.")
|
|
|
|
ASSERT(((_heap_start - _data_start) <= LENGTH(dram0_0_seg)),
|
|
"DRAM segment data does not fit.")
|