9ad860758c
* `ledcWriteTone()` added a `apbcallback()` evertime the tone value was non zero. * `addApbChangeCallback()` did not detect duplicate callbacks. * changed the apbcallback list to a double link to support roll forward, roll back execution. This made the sequences of clock change callback start with the newest registered -> to oldest on the `before` then oldest -> newest after the clock change. This made the UART debug log output have minimal gibberish during the clock change. * change how the UART callback handled the MUTEX because if any `apbchangeCallback()` executed a `log_x()` a deadlock would occur. This fixes #3555
281 lines
11 KiB
C
281 lines
11 KiB
C
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "esp32-hal.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "rom/ets_sys.h"
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#include "esp32-hal-matrix.h"
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#include "soc/dport_reg.h"
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#include "soc/ledc_reg.h"
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#include "soc/ledc_struct.h"
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#if CONFIG_DISABLE_HAL_LOCKS
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#define LEDC_MUTEX_LOCK()
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#define LEDC_MUTEX_UNLOCK()
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#else
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#define LEDC_MUTEX_LOCK() do {} while (xSemaphoreTake(_ledc_sys_lock, portMAX_DELAY) != pdPASS)
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#define LEDC_MUTEX_UNLOCK() xSemaphoreGive(_ledc_sys_lock)
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xSemaphoreHandle _ledc_sys_lock = NULL;
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#endif
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/*
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* LEDC Chan to Group/Channel/Timer Mapping
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** ledc: 0 => Group: 0, Channel: 0, Timer: 0
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** ledc: 1 => Group: 0, Channel: 1, Timer: 0
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** ledc: 2 => Group: 0, Channel: 2, Timer: 1
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** ledc: 3 => Group: 0, Channel: 3, Timer: 1
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** ledc: 4 => Group: 0, Channel: 4, Timer: 2
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** ledc: 5 => Group: 0, Channel: 5, Timer: 2
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** ledc: 6 => Group: 0, Channel: 6, Timer: 3
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** ledc: 7 => Group: 0, Channel: 7, Timer: 3
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** ledc: 8 => Group: 1, Channel: 0, Timer: 0
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** ledc: 9 => Group: 1, Channel: 1, Timer: 0
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** ledc: 10 => Group: 1, Channel: 2, Timer: 1
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** ledc: 11 => Group: 1, Channel: 3, Timer: 1
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** ledc: 12 => Group: 1, Channel: 4, Timer: 2
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** ledc: 13 => Group: 1, Channel: 5, Timer: 2
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** ledc: 14 => Group: 1, Channel: 6, Timer: 3
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** ledc: 15 => Group: 1, Channel: 7, Timer: 3
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*/
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#define LEDC_CHAN(g,c) LEDC.channel_group[(g)].channel[(c)]
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#define LEDC_TIMER(g,t) LEDC.timer_group[(g)].timer[(t)]
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static void _on_apb_change(void * arg, apb_change_ev_t ev_type, uint32_t old_apb, uint32_t new_apb){
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if(ev_type == APB_AFTER_CHANGE && old_apb != new_apb){
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uint16_t iarg = *(uint16_t*)arg;
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uint8_t chan = 0;
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old_apb /= 1000000;
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new_apb /= 1000000;
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while(iarg){ // run though all active channels, adjusting timing configurations
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if(iarg & 1) {// this channel is active
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uint8_t group=(chan/8), timer=((chan/2)%4);
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if(LEDC_TIMER(group, timer).conf.tick_sel){
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LEDC_MUTEX_LOCK();
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uint32_t old_div = LEDC_TIMER(group, timer).conf.clock_divider;
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uint32_t div_num = (new_apb * old_div) / old_apb;
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if(div_num > LEDC_DIV_NUM_HSTIMER0_V){
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div_num = ((REF_CLK_FREQ /1000000) * old_div) / old_apb;
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if(div_num > LEDC_DIV_NUM_HSTIMER0_V) {
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div_num = LEDC_DIV_NUM_HSTIMER0_V;//lowest clock possible
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}
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LEDC_TIMER(group, timer).conf.tick_sel = 0;
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} else if(div_num < 256) {
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div_num = 256;//highest clock possible
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}
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LEDC_TIMER(group, timer).conf.clock_divider = div_num;
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LEDC_MUTEX_UNLOCK();
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}
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else {
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log_d("using REF_CLK chan=%d",chan);
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}
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}
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iarg = iarg >> 1;
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chan++;
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}
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}
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}
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//uint32_t frequency = (80MHz or 1MHz)/((div_num / 256.0)*(1 << bit_num));
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static void _ledcSetupTimer(uint8_t chan, uint32_t div_num, uint8_t bit_num, bool apb_clk)
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{
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uint8_t group=(chan/8), timer=((chan/2)%4);
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static bool tHasStarted = false;
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static uint16_t _activeChannels = 0;
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if(!tHasStarted) {
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tHasStarted = true;
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DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_LEDC_CLK_EN);
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DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_LEDC_RST);
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LEDC.conf.apb_clk_sel = 1;//LS use apb clock
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addApbChangeCallback((void*)&_activeChannels, _on_apb_change);
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#if !CONFIG_DISABLE_HAL_LOCKS
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_ledc_sys_lock = xSemaphoreCreateMutex();
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#endif
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}
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LEDC_MUTEX_LOCK();
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LEDC_TIMER(group, timer).conf.clock_divider = div_num;//18 bit (10.8) This register is used to configure parameter for divider in timer the least significant eight bits represent the decimal part.
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LEDC_TIMER(group, timer).conf.duty_resolution = bit_num;//5 bit This register controls the range of the counter in timer. the counter range is [0 2**bit_num] the max bit width for counter is 20.
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LEDC_TIMER(group, timer).conf.tick_sel = apb_clk;//apb clock
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if(group) {
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LEDC_TIMER(group, timer).conf.low_speed_update = 1;//This bit is only useful for low speed timer channels, reserved for high speed timers
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}
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LEDC_TIMER(group, timer).conf.pause = 0;
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LEDC_TIMER(group, timer).conf.rst = 1;//This bit is used to reset timer the counter will be 0 after reset.
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LEDC_TIMER(group, timer).conf.rst = 0;
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LEDC_MUTEX_UNLOCK();
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_activeChannels |= (1 << chan); // mark as active for APB callback
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}
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//max div_num 0x3FFFF (262143)
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//max bit_num 0x1F (31)
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static double _ledcSetupTimerFreq(uint8_t chan, double freq, uint8_t bit_num)
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{
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uint64_t clk_freq = getApbFrequency();
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clk_freq <<= 8;//div_num is 8 bit decimal
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uint32_t div_num = (clk_freq >> bit_num) / freq;
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bool apb_clk = true;
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if(div_num > LEDC_DIV_NUM_HSTIMER0_V) {
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clk_freq /= 80;
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div_num = (clk_freq >> bit_num) / freq;
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if(div_num > LEDC_DIV_NUM_HSTIMER0_V) {
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div_num = LEDC_DIV_NUM_HSTIMER0_V;//lowest clock possible
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}
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apb_clk = false;
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} else if(div_num < 256) {
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div_num = 256;//highest clock possible
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}
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_ledcSetupTimer(chan, div_num, bit_num, apb_clk);
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//log_i("Fin: %f, Fclk: %uMhz, bits: %u, DIV: %u, Fout: %f",
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// freq, apb_clk?80:1, bit_num, div_num, (clk_freq >> bit_num) / (double)div_num);
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return (clk_freq >> bit_num) / (double)div_num;
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}
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static double _ledcTimerRead(uint8_t chan)
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{
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uint32_t div_num;
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uint8_t bit_num;
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bool apb_clk;
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uint8_t group=(chan/8), timer=((chan/2)%4);
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LEDC_MUTEX_LOCK();
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div_num = LEDC_TIMER(group, timer).conf.clock_divider;//18 bit (10.8) This register is used to configure parameter for divider in timer the least significant eight bits represent the decimal part.
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bit_num = LEDC_TIMER(group, timer).conf.duty_resolution;//5 bit This register controls the range of the counter in timer. the counter range is [0 2**bit_num] the max bit width for counter is 20.
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apb_clk = LEDC_TIMER(group, timer).conf.tick_sel;//apb clock
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LEDC_MUTEX_UNLOCK();
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uint64_t clk_freq = 1000000;
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if(apb_clk) {
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clk_freq = getApbFrequency();
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}
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clk_freq <<= 8;//div_num is 8 bit decimal
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return (clk_freq >> bit_num) / (double)div_num;
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}
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static void _ledcSetupChannel(uint8_t chan, uint8_t idle_level)
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{
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uint8_t group=(chan/8), channel=(chan%8), timer=((chan/2)%4);
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LEDC_MUTEX_LOCK();
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LEDC_CHAN(group, channel).conf0.timer_sel = timer;//2 bit Selects the timer to attach 0-3
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LEDC_CHAN(group, channel).conf0.idle_lv = idle_level;//1 bit This bit is used to control the output value when channel is off.
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LEDC_CHAN(group, channel).hpoint.hpoint = 0;//20 bit The output value changes to high when timer selected by channel has reached hpoint
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LEDC_CHAN(group, channel).conf1.duty_inc = 1;//1 bit This register is used to increase the duty of output signal or decrease the duty of output signal for high speed channel
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LEDC_CHAN(group, channel).conf1.duty_num = 1;//10 bit This register is used to control the number of increased or decreased times for channel
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LEDC_CHAN(group, channel).conf1.duty_cycle = 1;//10 bit This register is used to increase or decrease the duty every duty_cycle cycles for channel
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LEDC_CHAN(group, channel).conf1.duty_scale = 0;//10 bit This register controls the increase or decrease step scale for channel.
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LEDC_CHAN(group, channel).duty.duty = 0;
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LEDC_CHAN(group, channel).conf0.sig_out_en = 0;//This is the output enable control bit for channel
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LEDC_CHAN(group, channel).conf1.duty_start = 0;//When duty_num duty_cycle and duty_scale has been configured. these register won't take effect until set duty_start. this bit is automatically cleared by hardware.
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if(group) {
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LEDC_CHAN(group, channel).conf0.low_speed_update = 1;
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} else {
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LEDC_CHAN(group, channel).conf0.clk_en = 0;
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}
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LEDC_MUTEX_UNLOCK();
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}
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double ledcSetup(uint8_t chan, double freq, uint8_t bit_num)
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{
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if(chan > 15) {
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return 0;
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}
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double res_freq = _ledcSetupTimerFreq(chan, freq, bit_num);
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_ledcSetupChannel(chan, LOW);
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return res_freq;
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}
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void ledcWrite(uint8_t chan, uint32_t duty)
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{
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if(chan > 15) {
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return;
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}
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uint8_t group=(chan/8), channel=(chan%8);
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LEDC_MUTEX_LOCK();
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LEDC_CHAN(group, channel).duty.duty = duty << 4;//25 bit (21.4)
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if(duty) {
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LEDC_CHAN(group, channel).conf0.sig_out_en = 1;//This is the output enable control bit for channel
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LEDC_CHAN(group, channel).conf1.duty_start = 1;//When duty_num duty_cycle and duty_scale has been configured. these register won't take effect until set duty_start. this bit is automatically cleared by hardware.
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if(group) {
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LEDC_CHAN(group, channel).conf0.low_speed_update = 1;
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} else {
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LEDC_CHAN(group, channel).conf0.clk_en = 1;
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}
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} else {
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LEDC_CHAN(group, channel).conf0.sig_out_en = 0;//This is the output enable control bit for channel
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LEDC_CHAN(group, channel).conf1.duty_start = 0;//When duty_num duty_cycle and duty_scale has been configured. these register won't take effect until set duty_start. this bit is automatically cleared by hardware.
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if(group) {
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LEDC_CHAN(group, channel).conf0.low_speed_update = 1;
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} else {
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LEDC_CHAN(group, channel).conf0.clk_en = 0;
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}
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}
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LEDC_MUTEX_UNLOCK();
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}
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uint32_t ledcRead(uint8_t chan)
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{
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if(chan > 15) {
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return 0;
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}
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return LEDC.channel_group[chan/8].channel[chan%8].duty.duty >> 4;
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}
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double ledcReadFreq(uint8_t chan)
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{
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if(!ledcRead(chan)){
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return 0;
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}
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return _ledcTimerRead(chan);
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}
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double ledcWriteTone(uint8_t chan, double freq)
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{
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if(chan > 15) {
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return 0;
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}
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if(!freq) {
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ledcWrite(chan, 0);
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return 0;
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}
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double res_freq = _ledcSetupTimerFreq(chan, freq, 10);
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ledcWrite(chan, 0x1FF);
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return res_freq;
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}
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double ledcWriteNote(uint8_t chan, note_t note, uint8_t octave){
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const uint16_t noteFrequencyBase[12] = {
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// C C# D Eb E F F# G G# A Bb B
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4186, 4435, 4699, 4978, 5274, 5588, 5920, 6272, 6645, 7040, 7459, 7902
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};
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if(octave > 8 || note >= NOTE_MAX){
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return 0;
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}
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double noteFreq = (double)noteFrequencyBase[note] / (double)(1 << (8-octave));
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return ledcWriteTone(chan, noteFreq);
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}
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void ledcAttachPin(uint8_t pin, uint8_t chan)
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{
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if(chan > 15) {
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return;
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}
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pinMode(pin, OUTPUT);
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pinMatrixOutAttach(pin, ((chan/8)?LEDC_LS_SIG_OUT0_IDX:LEDC_HS_SIG_OUT0_IDX) + (chan%8), false, false);
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}
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void ledcDetachPin(uint8_t pin)
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{
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pinMatrixOutDetach(pin, false, false);
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}
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