chuck todd 8d7fb58672 Fix for spurious interrupts during I2C communications (#1665)
This version no longer needs an interrupt for each byte transferred. It only needs interrupts for START, STOP, FIFO empty/Full or error conditions.  This dramatically reduces the interrupt overhead.  I think the prior version was causing an interrupt overload condition where the ISR was not able to process every interrupt as they happened.
2018-07-24 19:43:45 +02:00
..
2017-05-06 18:56:25 +03:00
2016-10-06 07:09:44 -06:00
2016-10-06 07:09:44 -06:00
2016-10-06 07:09:44 -06:00
2018-06-27 09:01:06 +02:00
2018-06-27 09:01:06 +02:00
2018-01-18 00:56:58 +02:00
2017-01-09 18:05:30 +02:00
2018-06-27 09:01:06 +02:00
2016-10-06 07:09:44 -06:00
2016-10-06 07:09:44 -06:00
2016-12-09 17:47:30 +02:00
2016-12-12 01:32:55 +02:00
2016-12-12 01:32:55 +02:00
2017-01-06 00:54:50 +02:00
2017-01-06 00:54:50 +02:00
2016-10-06 07:09:44 -06:00
2016-10-06 07:09:44 -06:00
2016-10-06 07:09:44 -06:00
2018-06-27 09:01:06 +02:00
2016-10-06 07:09:44 -06:00
2016-10-06 07:09:45 -06:00
2016-10-06 07:09:44 -06:00
2016-10-06 07:09:44 -06:00
2016-10-06 07:09:45 -06:00
2017-01-20 21:49:17 +02:00
2016-11-13 16:53:56 +02:00
2016-12-02 13:42:31 +02:00
2018-06-27 09:01:06 +02:00
2018-06-27 09:01:06 +02:00