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23da2edd95
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Adjusted trace spacing
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2023-04-22 18:34:26 +01:00 |
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158326ad9f
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Delete old lid file
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2023-04-20 16:42:26 +01:00 |
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55f521adb5
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Delete old named files
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2023-04-20 16:42:03 +01:00 |
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8fa249a2ca
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Updated screw holes to M2.5 and added external screws
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2023-04-20 16:41:18 +01:00 |
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e5cceb8f22
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Updated holes to M2.5
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2023-04-20 13:30:47 +01:00 |
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42ba2a3662
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Updated PCB to reflect schematic
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2023-04-20 13:24:24 +01:00 |
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jacob.eva
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4454626399
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Updated TPS62 resistors
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2023-04-20 12:01:46 +01:00 |
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4f7d1fc43f
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Adjusted trace constraints and corrected to comply
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2023-04-18 17:28:20 +01:00 |
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1e70068cf4
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Fixed unconnected GND
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2023-04-18 15:49:21 +01:00 |
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720b6a9aea
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Changed hole dimensions
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2023-04-18 15:45:54 +01:00 |
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jacob.eva
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e281d636b0
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Added mount holes to PCB
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2023-04-18 13:47:49 +01:00 |
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jacob.eva
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00828b2ab7
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Fixed logo engraving scuffedness
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2023-04-17 22:13:45 +01:00 |
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Zeos-ctrl
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3abf4ab609
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added basic lid shape
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2023-04-16 12:47:17 +01:00 |
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jacob.eva
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115f7ba6cb
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Updated dimensions
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2023-04-15 12:13:58 +01:00 |
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2f13a5a4e0
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Added PWR and WWAN labels to diodes
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2023-04-13 16:59:58 +01:00 |
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1b475ef967
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Added company logo, name and license
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2023-04-13 16:52:16 +01:00 |
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c40cb92a58
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Added resistance note to DC to DC IC
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2023-04-13 15:58:31 +01:00 |
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43cb03715e
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Corrected card area length
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2023-04-13 15:56:10 +01:00 |
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cc3dac4df9
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Finished main design (one commit fight me)
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2023-04-13 15:49:30 +01:00 |
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jacob.eva
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dab6156b19
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Updated PCB to Framework's specs
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2023-04-11 18:33:14 +01:00 |
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jacob.eva
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9664257e68
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Reformatted schematic
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2023-04-11 18:32:35 +01:00 |
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jacob.eva
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34f224a20e
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Exported card as STL
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2023-04-06 17:05:21 +01:00 |
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jacob.eva
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d1c4e4406d
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Added SIM slot footprint
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2023-04-06 17:02:56 +01:00 |
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jacob.eva
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8893f9c87e
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Added to git
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2023-04-05 19:24:53 +01:00 |
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