Commit Graph

16 Commits

Author SHA1 Message Date
23da2edd95
Adjusted trace spacing 2023-04-22 18:34:26 +01:00
42ba2a3662 Updated PCB to reflect schematic 2023-04-20 13:24:24 +01:00
jacob.eva
4454626399
Updated TPS62 resistors 2023-04-20 12:01:46 +01:00
4f7d1fc43f Adjusted trace constraints and corrected to comply 2023-04-18 17:28:20 +01:00
1e70068cf4 Fixed unconnected GND 2023-04-18 15:49:21 +01:00
720b6a9aea Changed hole dimensions 2023-04-18 15:45:54 +01:00
jacob.eva
e281d636b0
Added mount holes to PCB 2023-04-18 13:47:49 +01:00
2f13a5a4e0 Added PWR and WWAN labels to diodes 2023-04-13 16:59:58 +01:00
1b475ef967 Added company logo, name and license 2023-04-13 16:52:16 +01:00
c40cb92a58 Added resistance note to DC to DC IC 2023-04-13 15:58:31 +01:00
43cb03715e Corrected card area length 2023-04-13 15:56:10 +01:00
cc3dac4df9 Finished main design (one commit fight me) 2023-04-13 15:49:30 +01:00
jacob.eva
dab6156b19
Updated PCB to Framework's specs 2023-04-11 18:33:14 +01:00
jacob.eva
9664257e68
Reformatted schematic 2023-04-11 18:32:35 +01:00
jacob.eva
d1c4e4406d
Added SIM slot footprint 2023-04-06 17:02:56 +01:00
jacob.eva
8893f9c87e
Added to git 2023-04-05 19:24:53 +01:00