Commit Graph

45 Commits

Author SHA1 Message Date
chuck todd
91508030d8 Hide log_v behind conditional define, reduce excessive logging (#2641)
@cyberman54 from #2250 recommended reducing unnecessary logging.
2019-04-10 02:43:21 +02:00
chuck todd
8ec76405b9 Fix compile warning, esp32-hal-i2c.c (#2434)
@tread-Qualitrol discovered this error.
2019-02-14 13:09:05 +01:00
chuck todd
9a7946e685 I2C fix READ of zero bytes hardware hang (#2301)
The i2c peripheral will hang if a READ request is issued with a zero data length.  The peripheral
drops into a continuous timeout interrupt response.  The STOP command can not be set out to the I2C
bus. The SLAVE device correctly ACK'd the address byte, with READ bit set, it has control of the SDA
 pin.  The ESP32 send out the next SCL HIGH pulse but, since the SLAVE is in READ Mode, and the First
bit it is sending happened to be a ZERO, the ESP32 cannot send the STOP.  When it releases SDA during
the SCL HIGH, the pin does not change state.  The pin stays low because the SLAVE is outputing a LOW!
The ESP32 drops into a perminent WAIT state waiting for SDA to go HIGH (the STOP).

**esp32-hal-i2c.c**
* add databuff length checks to `i2cRead()` and `i2cWrite()`
2019-01-10 21:37:13 +01:00
Me No Dev
2fd39b1aff
Handle APB frequency change (#2250)
* Add APB change callbacks and move cpu code to own file

* Properly set esp_timer and FreeRTOS tick dividers

* Improve updated devisors

* No need to update REF_TICK yet

* Add initial handling for UART baud change

* fix uartWriteBuf and uartDetectBaudrate

* trigger callbacks even when APB did not change

* toggle UART ISR on CPU change

* add XTAL freq getter and add cpu freq validation

* Support CPU frequency changes in I2C (#2287)

**esp32-hal-i2c.c**
* add callback for cpu frequency changes
* adjust fifo thresholds based on cpu frequency and i2c bus frequency
* reduce i2c bus frequency if differential is too small
**Wire.h**
* version to 1.1.0

* Implement clock change for the other peripherals

* remove bad CPU clock values from the menu

* Add note to CPU freqs that support WiFi and BT
2019-01-09 10:07:54 +01:00
chuck todd
310e78e6fd Support CPU frequency changes (#2222)
The I2C hardware has limitations on min and max bus frequency directly related to CPU frequency, bus speed cannot be greater than 1/100 CPU clock, nor less than CPU clock / 8192.
2018-12-20 08:56:02 +01:00
Me No Dev
c827bb4177
CPU and APB Frequency support (#2220)
* Add support to HAL for APB frequencies different than 80MHz

* Add support for CPU frequencies in the IDE board menu

* Switch to fast set_config

* Add method to uart so debug can be reassigned after apb frequency switch

* Return real APB frequency
2018-12-20 01:57:32 +01:00
Luc
ce340faf94 Clean warnings when all warning enabled (#2112)
* Clean warnings when all warning enabled

Not used variables / functions due to debug log

Dual define with different values :
cores\esp32/binary.h
#define B110 6
#define B1000000 64

tools/sdk/include/newlib/sys/termios.h
#define B110        3
#define B1000000   23

Local variable returned in WiFiclient Secure

* change due to deprecated function

* Update with proper variable and label

* Update esp32-hal-i2c.c

* Apply changes requested

* Fix warnings due to #define conflict thanks @atanisoft
2018-11-29 11:34:55 +01:00
me-no-dev
fcd734a13c Some fixes found by gcc 8 2018-11-28 00:35:43 +01:00
chuck todd
e5ea089a7f Reduce resource requirements, Share Interrupt (#1877)
#1869 exposed a resource exhaustion issue. The current HAL layer for I2C support is designed to use a shared interrupt, But, during debugging to solve the interrupt overloading condition identified in #1588, and the generation of pr #1717, the interrupt allocation parameters were changed.  This change was unnecessary, the code will work successfully with shared interrupts.  So, there is no need to assign a private interrupt for each I2C peripheral.
2018-09-21 08:40:01 +02:00
chuck todd
9db207afbe Improve bus recovery (#1767)
If the esp32 is reset during a i2c read cycle the slave device may be in control of the SDA line.  

If the SDA line is held low, the esp32 cannot issue a START or STOP to recover the bus. 

The previous code did not correctly configure the SCL output pin, and it cycled SCL 9 times with SDA Low.  Since the slave device was in a READ cycle, it just continued outputting the bits of the current byte.  When the ACK/NAK bit space occurred, The low output value of SDA was interpreted as ACK so the slave device continued with the next byte.  It never terminated the READ cycle. 

This new code will correctly recover from an interrupted READ
2018-08-18 08:50:59 +02:00
chuck todd
b05430cfd9 Wire ReSTART fix, with others (#1717)
* ReSTART fix, Sequencing fix

pr #1665 introduce a problem with ReSTART, when solving this problem I found an interaction between the TxFifo refill, RxFifo empty and CMD[] fill.  during certain sequences a dataqueue command would be skipped, this skipping resulted in a mismatch between the contents of the TxFifo and the i2c command sequence.  The problem manifested as an ACK error. 
In addition to this required bug fix I propose:
* `Wire.begin()` be changed from a `void` to a `bool` this will allow the reset functionality of `Wire.begin()` to be reported.  Currently `Wire.begin()` attempts to reset the i2c Peripheral, but cannot report success/failure.
* `Wire.busy()` be added. this `bool` function returns the hardware status of the bus. This status can be use in multi-master environments for application level interleaving of commands, also in single master environment, it can be used to detect a 'hung' bus.  With the functional change to `Wire.begin()` this allows app level recover of a hung bus.
* `Wire.lastError()` value updated for all errors, previously when interleaving `Wire.endTransmission(false)` and `Wire.readTransmission(false)`, the 128 byte `Wire.write()` buffer was exhausted without generating and error(very exotic). I discovered this error when I created a sequence of directed reads to a EEPROM. Each directed read used 2 bytes of the 128 byte `write()` buffer, so after 64 consecutive ReSTART writes with ReSTART reads, `Wire()`  had no room to record the directed address bytes.  It generated just a NAK check without setting the EEPROMs internal register address.  The succeeding ReSTART read succeeded at incorrect address.
* Changes to the HAL layer:
** added `i2cGetStatus()` which returns the i2c peripheral status word, used to detect bus_busy currently
** added `i2cDebug()` programmatic control of debug buffer output
** changed `i2cAddQueue()` to allow data_only queue element this will allow a i2c transaction to use multiple data pointers.
** removed direct access to DumpInts(), DumpI2c() from app, use i2cDebug() to set trigger points 
 
*

* Update esp32-hal-i2c.c

* Update Wire.cpp

* ReSTART, Sequencing

pr #1665 introduce a problem with ReSTART, when solving this problem I found an interaction between the TxFifo refill, RxFifo empty and CMD[] fill.  during certain sequences a dataqueue command would be skipped, this skipping resulted in a mismatch between the contents of the TxFifo and the i2c command sequence.  The problem manifested as an ACK error. 
In addition to this required bug fix I propose:
* `Wire.begin()` be changed from a `void` to a `bool` this will allow the reset functionality of `Wire.begin()` to be reported.  Currently `Wire.begin()` attempts to reset the i2c Peripheral, but cannot report success/failure.
* `Wire.busy()` be added. this `bool` function returns the hardware status of the bus. This status can be use in multi-master environments for application level interleaving of commands, also in single master environment, it can be used to detect a 'hung' bus.  With the functional change to `Wire.begin()` this allows app level recover of a hung bus.
* `Wire.lastError()` value updated for all errors, previously when interleaving `Wire.endTransmission(false)` and `Wire.readTransmission(false)`, the 128 byte `Wire.write()` buffer was exhausted without generating and error(very exotic). I discovered this error when I created a sequence of directed reads to a EEPROM. Each directed read used 2 bytes of the 128 byte `write()` buffer, so after 64 consecutive ReSTART writes with ReSTART reads, `Wire()`  had no room to record the directed address bytes.  It generated just a NAK check without setting the EEPROMs internal register address.  The succeeding ReSTART read succeeded at incorrect address.
* Changes to the HAL layer:
** added `i2cGetStatus()` which returns the i2c peripheral status word, used to detect bus_busy currently
** added `i2cDebug()` programmatic control of debug buffer output
** changed `i2cAddQueue()` to allow data_only queue element this will allow a i2c transaction to use multiple data pointers.
** removed direct access to DumpInts(), DumpI2c() from app, use i2cDebug() to set trigger points 
 
*

* Forgot DebugFlags Return

@andriyadi found this, total brain fade on my part.
2018-08-14 11:51:15 +02:00
me-no-dev
f9a382ab9f fix some compilation error and warnings in i2c 2018-07-24 22:06:50 +02:00
chuck todd
8d7fb58672 Fix for spurious interrupts during I2C communications (#1665)
This version no longer needs an interrupt for each byte transferred. It only needs interrupts for START, STOP, FIFO empty/Full or error conditions.  This dramatically reduces the interrupt overhead.  I think the prior version was causing an interrupt overload condition where the ISR was not able to process every interrupt as they happened.
2018-07-24 19:43:45 +02:00
chuck todd
28a410dd50 Spurious Interrupts Temporary fix 20180711 (#1625)
the 'eject' ERROR is and indication of an interrupt triggering without an source.  I am working to eliminate these serviceable interrupt.  This update increase stability on a HelTek Wifi Lora 32 board. with a SSD1306 OLED.  This update fixes a glaring error in the interrupt allocation code, the Interrupt mask was wrong.  I also dynamically adjust the FiFo thresholds based on Bus clockrate. The change to FiFo thresholds has reduced the number for 'eject' events.  I also change 'eject' from and ERROR to DEBUG.  An 'eject' event does not compromise i2c transmissions. It happens after a transaction has completed. 

Chuck.
2018-07-12 15:18:26 +02:00
chuck todd
6411ac4e3c Remove confusing Debug output. (#1574)
If Core Debug Level is at DEBUG, a confusing debug message will be emitted if the I2C transaction takes longer complete than the  calculated minimum time.  This original debug message was just to prove that this new i2c code could correctly handle SCL stretching or interrupt latency issues. This delay is not a problem, or an error.  Usually it is caused by a higher priory interrupt starving the i2c ISR.  Usually WiFi is the culprit.  As long of this delay is within the configured timeout (by default 50ms, or can be set with Wire.setTimeOut(milliseconds);) no problem will occur and the transaction will successfully complete.
Chuck.
2018-07-02 18:22:05 +02:00
Me No Dev
a59eafbc9d
Update IDF to aaf1239 (#1539)
* fix sdmmc config

* Fix warnings in EEPROM

from @Curclamas

* remove leftover TAG in EEPROM

* Initial add of @stickbreaker i2c

* Add log_n

* fix warnings when log is off

* i2c code clean up and reorganization

* add flags to interrupt allocator

* fix sdmmc config

* Fix warnings in EEPROM

from @Curclamas

* remove leftover TAG in EEPROM

* fix errors with latest IDF

* fix debug optimization (#1365)

incorrect optimization for debugging tick markers.

* Fix some missing BT header

* Change BTSerial log calls

* Update BLE lib

* Arduino-ESP32 release management scripted (#1515)

* Calculate an absolute path for a custom partitions table (#1452)

* * Arduino-ESP32 release management scripted
(ready-to-merge)

* * secure env for espressif/arduino-esp32

* * build tests enabled
* gitter webhook enabled

* * gitter room link fixed
* better comment

* * filepaths fixed

* BT Serial adjustments

* * don't run sketch builds & tests for tagged builds

* Return false from WiFi.hostByName() if hostname is not resolved

* Free BT Memory when BT is not used

* WIFI_MODE_NULL is not supported anymore

* Select some key examples to build with PlatformIO to save some time

* Update BLE lib

* Fixed BLE lib

* Major WiFi overhaul

- auto reconnect on connection loss now works
- moved to event groups
- some code clean up and procedure optimizations
- new methods to get a more elaborate system ststus

* Add cmake tests to travis

* Add initial AsyncUDP

* Add NetBIOS lib and fix CMake includes

* Add Initial WebServer

* Fix WebServer and examples

* travis not quiting on build fail

* Try different travis build

* Update IDF to aaf1239

* Fix WPS Example

* fix script permission and add some fail tests to sketch builder

* Add missing space in WiFiClient::write(Stream &stream)
2018-06-27 09:01:06 +02:00
chuck todd
1cf42702dd Add Hardware Reset when Initing I2C peripheral (#1201)
This change uses the `_RST` bit of the i2c peripheral to force the hardware into power on reset state.  The prior code assumed the peripheral was already in a reset, it just cleared the reset bit.  

Chuck.
2018-04-06 19:13:59 +03:00
Me No Dev
55289a45af Update IDF to 9274814 (#767)
* Update IDF to 9274814

* Fix error in i2c and Arduino
2017-10-24 00:21:00 +02:00
Jason K
11565343e6 Merge branch 'master' into master 2017-10-23 14:40:33 -04:00
chuck todd
a695187de8 Correct 10bit Device address handling.
The existing code did not follow protocol with 10bit addressed devices.  Per _Philps/NXP Semiconductors UM10204 I2C-bus specification and user manual Rev. 6 4April2014_ pg.15 3.1.11 10-bit addressing:
~The first seven bits of the first byte are the combination of 1111 0xx of which the last two bits (xx) are the two Most-Significant Bits (MSB) of the 10-bit address; the eighth bit of the first byte is the R/!W! bit the determines the direction of the message~
2017-10-21 13:14:14 -06:00
Jason K
1270f40066 Add initial handling for long I2C reads. 2017-10-21 08:26:46 -04:00
chuck todd
7eff707ba6 Fix Early return when Address NAK is received (#750)
The i2cWrite() function was returning to the app before the i2c transaction had completed.  This caused the next Wire() call to return a I2C_ERROR_BUSY.
2017-10-21 08:40:53 +02:00
me-no-dev
28be506ce3 uncomment I2C debug so it can be used 2017-09-29 21:24:06 +08:00
Jason K
0cd62852da I2c reset functionality (#678)
* Addition of a i2cReset method and timeout handling for the case where the i2c hardware FSM (state machine) gets stuck in a busy state.

* Use newly added i2cReset function within the wire library.
2017-09-29 21:17:13 +08:00
me-no-dev
befebb7242 Change DPORT access macros 2017-05-15 20:53:09 +03:00
me-no-dev
90322ae7eb Make I2C work reliably with interrupts
Thanks @marcmerlin and @MartyMacGyver
2017-03-26 00:27:27 +02:00
me-no-dev
8b96b1a5f4 update IDF libs and esptool.py
adds autoreset after firmware upload
2017-01-05 13:54:40 +02:00
me-no-dev
668c3811b8 Wire: wait while bus is busy if ack failed 2016-12-15 01:41:54 +02:00
me-no-dev
b86fb30b1d cleanup read commands 2016-12-14 23:31:28 +02:00
me-no-dev
04e0902ca6 Wire: if we are reading only one byte, do not send empty read command 2016-12-14 18:43:32 +02:00
me-no-dev
917a4fd6f0 allow setting internal pull resistors for any mode and enable them for I2C 2016-12-14 13:11:10 +02:00
me-no-dev
c19fc061b0 Hopefully fix I2C/Wire
Tested with (all at the same time):
- MPU9250
- HTU21
- TMP102
- BMP180
- AM2320
- SSD1306
2016-12-14 02:41:22 +02:00
me-no-dev
8e7d00b9a8 i2c revert to old fifo write 2016-12-09 18:07:59 +02:00
Me No Dev
d1025b6b5d Update esp32-hal-i2c.c
wait for data to be latched and increase timeout in attempt to fix clock stretch issues
Connected issues:
http://esp32.com/viewtopic.php?f=19&t=632&p=2832#p2801
https://github.com/espressif/arduino-esp32/issues/81
https://github.com/espressif/arduino-esp32/issues/53
https://github.com/espressif/arduino-esp32/issues/11
2016-12-09 12:51:36 +02:00
Me No Dev
be2a26b3ff set SCL to OUTPUT_OPEN_DRAIN
fixes: https://github.com/espressif/arduino-esp32/issues/69
2016-11-25 11:25:50 +02:00
me-no-dev
c30012ab78 Add Kconfig for IDF and option to disable HAL mutexes
IDF Options:
- Autostart Arduino (implements app_main)
- Disable HAL locks
- Set HAL debug level
- Auto-connect STA if configured (else will connect after WiFi.begin())
2016-11-18 15:07:25 +02:00
me-no-dev
7abb15ca62 reset i2c cmd buffer before read/write
related to [issue
53](https://github.com/espressif/arduino-esp32/issues/53)
2016-11-17 00:46:56 +02:00
me-no-dev
9116cc4311 remove unnecessary locks 2016-10-14 03:24:20 +03:00
me-no-dev
f9f895797a return proper errors 2016-10-11 15:11:51 +03:00
me-no-dev
9ec4389889 implement thread-safe i2c 2016-10-11 14:20:02 +03:00
me-no-dev
3ecb32c4ba Prevent I2C Bus locks and wrong data being sent on retry 2016-10-10 14:54:36 +03:00
me-no-dev
45f5449fbf prevent some devices from locking the SCL line 2016-10-10 14:10:43 +03:00
me-no-dev
f3af437774 I2C SDA should properly register the ACK bit from some slaves 2016-10-10 13:53:55 +03:00
me-no-dev
cc3c55bbb1 fix i2c hal 2016-10-08 17:32:11 +03:00
me-no-dev
5f3a205955 initial import 2016-10-06 07:09:44 -06:00